mirror of
https://gitlab.rtems.org/rtems/rtos/rtems.git
synced 2026-10-06 10:59:48 +08:00
The exception codes occupied the interrupt vectors below MIPS_INTERRUPT_BASE. A handler reached them through rtems_interrupt_handler_install(), which passes a vector number and no frame. mips_vector_exceptions() therefore stored the frame in the global mips_exception_frame around the dispatch, and bsp_interrupt_handler_default() read it back. That global is a hidden argument of the dispatch. Two processors which take an exception at the same time overwrite it, so the port cannot support SMP in that form. Give the port its own registration. mips_exc_set_handler() installs the handler of one exception code and the handler takes a CPU_Exception_frame pointer. ppc_exc_set_handler() of the PowerPC port is the model. The default handler calls rtems_fatal() with RTEMS_FATAL_SOURCE_EXCEPTION and the frame. bsp_interrupt_is_valid_vector() rejects every vector below MIPS_INTERRUPT_BASE, so the interrupt manager owns none of them. An application which installed a handler on an exception vector with rtems_interrupt_handler_install() moves to the new call. MIPS_INTERRUPT_BASE keeps its value. No BSP renumbers its interrupt vectors. Update #5752. Assisted-by: Claude:claude-opus-5 claude-code Signed-off-by: Sebastian Huber <sebastian.huber@embedded-brains.de>