Sebastian Huber 5cc075712e irq/arm-gicv3.h: Customize CPU Interface init ...

Use the existing WRITE_SR() abstraction to access the interrupt group 0 and 1
enable registers.  This fixes the build for the AArch32 target.

Add BSP options which define the initial values of CPU Interface registers.

2022-07-12 08:26:46 +02:00

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clock

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i2c

bsps/zynq: Moved general i2c files to shared directories

2021-09-09 14:19:57 -05:00

irq

irq/arm-gicv3.h: Customize CPU Interface init

2022-07-12 08:26:46 +02:00

serial

bsps/include: Change license to BSD-2

2022-07-11 17:14:47 -05:00

spi

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