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https://gitlab.rtems.org/rtems/rtos/rtems.git
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30ca711d19
This adds Xilinx's driver for the Xilinx NAND controller embedded in the ZynqMP SoC. Within that device alone, it is possible to access this peripheral from MicroBlaze, ARMv7, and ARMv8 cores. This has been added to the hardware ZynqMP BSPs since QEMU does not support emulation of this peripheral. This driver supports polled operation only. The imported files are and should be able to remain unmodified. Import information is kept in bsps/shared/dev/nand/VERSION.
48 lines
1.5 KiB
C
48 lines
1.5 KiB
C
/******************************************************************************
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* Copyright (C) 2015 - 2022 Xilinx, Inc. All rights reserved.
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* SPDX-License-Identifier: MIT
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******************************************************************************/
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/*****************************************************************************/
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/**
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*
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* @file xnandpsu_g.c
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* @addtogroup nandpsu_v1_10
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* @{
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*
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* This file contains a configuration table where each entry is a configuration
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* structure for an XNandPsu device in the system.
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*
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* <pre>
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* MODIFICATION HISTORY:
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*
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* Ver Who Date Changes
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* ----- ---- ---------- -----------------------------------------------
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* 1.0 nm 05/06/2014 First release
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* 1.0 nm 06/02/2014 Changed the copyright to new copyright
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* </pre>
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*
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******************************************************************************/
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/***************************** Include Files ********************************/
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#include "xparameters.h"
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#include "xnandpsu.h"
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/************************** Constant Definitions ****************************/
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/**************************** Type Definitions ******************************/
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/***************** Macros (Inline Functions) Definitions ********************/
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/************************** Variable Definitions ****************************/
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/**
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* Each XNandPsu device in the system has an entry in this table.
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*/
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XNandPsu_Config XNandPsu_ConfigTable[] = {
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{
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0U,
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(u32)XPAR_XNANDPSU_0_BASEADDR
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}
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};
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/** @} */
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