Sebastian Huber e58ecb8433 bsps/arm: Initialize priorities of PPIs ...

At least on GICv1 the interrupts 0 up to including 31 are so called
Peripheral Private Interrupts (PPIs).  We have to initialize the
priority of the PPIs on secondary processors.

2020-02-24 09:21:47 +01:00

..

cache

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clock

bsps/arm: Unmask generic timer in interrupt handler

2019-12-05 07:25:52 +01:00

cp15

bsps/arm: Add support for small pages MMU

2019-10-31 09:48:05 +01:00

cpucounter

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fb

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irq

bsps/arm: Initialize priorities of PPIs

2020-02-24 09:21:47 +01:00

net

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serial

arm/xilinx-zynq: Split console driver files

2020-02-12 09:08:35 +01:00

start

score: Statically allocate idle/MPCI stacks

2020-02-12 09:08:36 +01:00

doxygen.h

bsps/arm: Adjust CMSIS Doxygen groups

2019-03-08 07:42:54 +01:00