mirror of
https://gitlab.rtems.org/rtems/rtos/rtems.git
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bsps: Move start files to bsps
This patch is a part of the BSP source reorganization. Update #3285.
This commit is contained in:
@@ -0,0 +1,278 @@
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/*
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* Mini-loader for the SVGM BSP.
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*
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* Author: Till Straumann, 10/2001 <strauman@slac.stanford.edu>
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*
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* Some ideas are borrowed from the powerpc/shared/bootloader
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* by
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* Copyright (C) 1998, 1999 Gabriel Paubert, paubert@iram.es
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* Copyright (C) 1999 Eric Valette. valette@crf.canon.fr
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*
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* The SMON firmware is unable to load the RTEMS image below
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* 0x2000 (I believe their stack is growing below 0x1000).
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*
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* The code provided by this file is responsible for the performing
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* the following steps:
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*
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* 1) Save commandline parameters to an area that is
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* a) not covered by the downloaded image
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* b) will not be overwritten by the moved image
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* nor the final BSS segment (rtems clears BSS
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* before saving the command line).
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* 2) Move the entire image (including this very file) to
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* its final location starting at 0x0000.
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* It is important to note that _NO_STACK_ is available
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* during this step. Also, there is probably no return to
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* SMON because relocating RTEMS will destroy vital SMON
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* data (such as its stack).
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* 3) Flush the cache to make sure the relocated image is actually
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* in memory.
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* 4) setup RTEMS environment (initial register values), most
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* notably an initial STACK. The initial stack may be small and
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* is used by RTEMS only at a very early stage.
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* A safe place for the stack seems to be the 00..0x7f area.
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* NOTE: we should respect the MAILBOX area 0x80..0xff!
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* 5) switch the MMU off (because that's what RTEMS is expecting
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* it to be at startup).
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* 6) fire up rtems...
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*
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*
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* Calling convention:
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* R1: SMON SP
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* R3: command line string start
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* R4: command line string end + 1
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* R5: where SMON put the image
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* if R5 is 0, the preloader will use its entry point
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* as the image starting address.
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* See NOTE below.
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* R6: end of the image (i.e. R6-R5 is the image length)
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* if R6 is 0, _edata will be used as the image length
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* See NOTE below.
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*
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* NOTE: if the symbol DONT_USE_R5_ENTRY is defined,
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* R5/R6 are never used and the necessary parameters are
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* determined at runtime (R5) / linkage (R6) [_edata]
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*
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* ASSUMPTIONS:
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* The code RELIES on the assumption that the image will be
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* moved DOWNWARDS in memory and that the this loader is
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* prepended to the image, i.e. it is safe to do
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* codemove(codemove,0,codemove_end - codemove);
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* (*0)(codemove_end, codemove_end-codemove, __rtems_end-codemove_end);
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* where codemove(from, to, nbytes) is defined as
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* codemove(from, to, nbytes) { while (nbytes--) *(to++)=*(from++); }
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* Implicit to these assumptions is the assumption that the destination
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* address is cache block aligned.
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* Furthermore, the byte count is assumed to be a multiple
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* of four
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*
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*/
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#if 0
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#include <rtems/score/powerpc.h>
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#else
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#ifndef PPC_CACHE_ALIGNMENT
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#define PPC_CACHE_ALIGNMENT 32
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#endif
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#endif
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#include <rtems/score/cpu.h>
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#include <rtems/asm.h>
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/* Note that major modifications may be needed
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* if DESTINATION_ADDR is not 0
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*/
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#define KERNELBASE 0x0
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#define INITIAL_STACK 0x70 /* 16-byte aligned */
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#define CACHE_LINE_SIZE PPC_CACHE_ALIGNMENT /* autodetect doesn't work, see below */
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#define ASSUME_RTEMS_INSTALLS_VECTORS /* assume we need not load vectors */
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#define DONT_USE_R5_ENTRY /* always dynamically determine the address we're running from */
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/* put this into its own section which we want to
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* be loaded at the very beginning. We should probably
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* not use more than 255 bytes.
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*/
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PUBLIC_VAR(__rtems_start)
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PUBLIC_VAR(__rtems_entry_point)
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PUBLIC_VAR(__rtems_end)
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.section .entry_point_section,"awx",@progbits
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preload:
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/* find out where we are */
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bl here
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here:
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xor r0,r0,r0
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mtmsr r0 /* clear MSR to known state */
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mflr r5
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addi r5,r5,-(here-preload)
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lis r27,_edata@h
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ori r27,r27,_edata@l
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/* at this point the register contents are
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* R3: command line start
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* R4: R3 + command line length
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* R5: address we are running from / loaded to
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* R27: image end
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*/
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/* save command line start */
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mr r6, r3
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/* save the command line parameters if they are to be overwritten */
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sub. r17, r4, r3 /* string length */
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ble leaveparms /* <=0 -> no parameters */
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/* copy has to be out of the way of the bss; therefore we must
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* put the string out of the way of both, the current end of
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* the image (without bss) AND the end of the loaded image
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* (including bss):
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* |......image.........| downloaded image
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* |image_bss...........| loaded image with bss appended
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*
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* ^ safe place for string
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*
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* the alternative scenario looks like this:
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* |..image.............| downloaded image
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* |image_bss...........| loaded image with bss appended
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* ^ safe place for string
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*/
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lis r18, __rtems_end+0x10000@h /* round up, save one instruction */
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add r16, r5, r27 /* image end + 1 */
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cmpw r16, r18
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bge ishighenough
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mr r16,r18 /* __rtems_end is higher than the image end
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* (without bss)
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*/
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ishighenough:
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cmpw r16, r3 /* destination start > current string start ? */
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ble leaveparms /* string already after dst, leave it */
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/* copy string from the last byte downwards */
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add r6, r16, r17 /* last byte of destination + 1 */
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mtctr r17
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1:
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lbzu r3, -1(r4)
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stbu r3, -1(r6)
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bdnz 1b
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leaveparms:
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add r7, r6, r17 /* destination + strlen */
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#ifndef CACHE_LINE_SIZE
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/* Oh well, SMON has inhibited the cache, so this
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* nice routine doesn't work...
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*/
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/* figure out the cache line size */
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li r16, 0x80
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cmpw r5, r16 /* 'from' must be > 0x80 */
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blt panic
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1: /* store some arbitrary, nonzero stuff in 0..0x7c */
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stwu r16,-4(r16)
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cmpwi r16,0
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bne 1b
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dcbz 0,r16 /* zero out one cache line */
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subi r16,r16,4
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2: lwzu r0,4(r16) /* search for a non-zero word */
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cmpwi r0,0
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beq 2b
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/* OK, r16 now hold the size of a cache line in bytes */
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#else
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li r16,CACHE_LINE_SIZE
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#endif
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lis r3,preload@h
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ori r3,r3,preload@l
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mr r4,r5 /* from-addr */
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li r5,_preload_size/* this is never > 16k */
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/* now move ourselves to the link address ('preload').
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* We set up the LR, so domove() 'returns' to the
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* relocated copy
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*/
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lis r0,return_here@h
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ori r0,r0,return_here@l
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mtlr r0
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b domove /* move the preloader itself */
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return_here:
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/* now we move the entire rest of the image */
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#ifdef ASSUME_RTEMS_INSTALLS_VECTORS
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lis r3,__rtems_start@h
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ori r3,r3,__rtems_start@l
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lis r0,preload@h /* calculate/adjust from address */
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ori r0,r0,preload@l
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sub r0,r3,r0
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add r4,r4,r0
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sub r5,r27,r3
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#else
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add r3,r3,r5 /* add preloader size to destination */
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add r4,r4,r5 /* and source addresses */
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sub r5,r27,r5 /* length of the remaining rest */
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#endif
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bl domove
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/* OK, now everything should be in place.
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* we are ready to start...
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*/
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/* setup initial stack for rtems early boot */
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li r1,INITIAL_STACK
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/* tag TOS with a NULL pointer (for stack trace) */
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li r0, 0
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stw r0, 0(r1)
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/* disable the MMU and fire up rtems */
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mfmsr r0
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ori r0,r0,MSR_IR|MSR_DR|MSR_IP|MSR_ME
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xori r0,r0,MSR_IR|MSR_DR
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mtsrr1 r0
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lis r0,__rtems_entry_point@h
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ori r0,r0,__rtems_entry_point@l
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mtsrr0 r0
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/* R6: start of command line */
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/* R7: end of command line +1 */
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rfi
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/* domove(to, from, nbytes):
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*
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* move a R5 bytes from R4 to R3 and flush
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* the caches for the destination memory
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* region. R16 provides the cache line size.
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* DESTROYS: R0, R17, R18, CTR, CR
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*/
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domove:
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addi r0,r5,3 /* convert to word count */
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srwi. r0,r0,2
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beq 3f /* nothing to do */
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cmpw r3,r4 /* from == to ? */
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beq 3f
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mtctr r0
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la r18,-4(r4)
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la r17,-4(r3)
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1: lwzu r0,4(r18)
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stwu r0,4(r17)
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bdnz 1b /* move data */
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/* now, we must flush the destination cache region */
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#ifndef CACHE_LINE_SIZE
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cmpwi r16,0
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beq 3f /* nothing to do */
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#endif
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#if defined(CACHE_LINE_SIZE) && CACHE_LINE_SIZE > 0
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add r17,r3,r5 /* target end pointer */
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subi r0,r16,1
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add r17,r17,r0
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andc r17,r17,r0 /* cache aligned target end pointer */
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mr r18,r3
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2: cmpw r18,r17
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dcbst 0,r18 /* write out data cache line */
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icbi 0,r18 /* invalidate corresponding i-cache line */
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add r18,r18,r16
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blt 2b
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sync /* make sure data is written back */
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isync /* invalidate possibly preloaded instructions */
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#endif
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3:
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blr
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#if !defined(CACHE_LINE_SIZE)
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panic:
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li r10,0x63
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mfmsr r0
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ori r0,r0,MSR_IP
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mtmsr r0
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sc
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#endif
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/* DONT PUT ANY CODE BELOW HERE */
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_preload_size = . - preload
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@@ -0,0 +1,68 @@
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/*
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* Copyright (c) 2017 embedded brains GmbH. All rights reserved.
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*
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* embedded brains GmbH
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* Dornierstr. 4
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* 82178 Puchheim
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* Germany
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* <rtems@embedded-brains.de>
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*
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* The license and distribution terms for this file may be
|
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* found in the file LICENSE in this distribution or at
|
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* http://www.rtems.org/license/LICENSE.
|
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*/
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/* rtems_crti.S */
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#include <rtems/asm.h>
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#include <rtems/score/cpu.h>
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#if defined(__powerpc64__)
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.section ".init","ax"
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.align 2
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.globl _init
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.type _init,@function
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_init:
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mflr r0
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std r0,16(1)
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stdu r1,-96(1)
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.section ".fini","ax"
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.align 2
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.globl _fini
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.type _fini,@function
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_fini:
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mflr r0
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std r0,16(r1)
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stdu r1,-96(r1)
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#else
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/* terminate the __init() function and create
|
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* a new head '_init' for use by RTEMS to
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* invoke C++ global constructors
|
||||
* NOTE: it is essential that this snippet
|
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* is hooked between ecrti and crtbegin
|
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*
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* ecrti has the following .init section:
|
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* __init:
|
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* stwu r1,-16(r1)
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* mflr r0
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* stw r0,20(r1)
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*
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* The reason for this is that we want to call
|
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* __eabi() at an early stage but prevent __eabi()
|
||||
* from branching to __init (C++ exception init
|
||||
* and global CTORs). Hence we make __init a no-op
|
||||
* and create a new entry point:
|
||||
*/
|
||||
.section ".init","ax"
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.align 2
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lwz r0,r20(r1)
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mtlr r0
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addi r1,r1,16
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blr
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.globl _init
|
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.type _init,@function
|
||||
_init:
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stwu r1,-16(r1)
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mflr r0
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||||
stw r0,20(r1)
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#endif
|
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@@ -0,0 +1,27 @@
|
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/*
|
||||
* Copyright (c) 2017 embedded brains GmbH. All rights reserved.
|
||||
*
|
||||
* embedded brains GmbH
|
||||
* Dornierstr. 4
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* 82178 Puchheim
|
||||
* Germany
|
||||
* <rtems@embedded-brains.de>
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://www.rtems.org/license/LICENSE.
|
||||
*/
|
||||
|
||||
#if defined(__powerpc64__)
|
||||
.section ".init","ax"
|
||||
addi 1,1,96
|
||||
ld 0,16(1)
|
||||
mtlr 0
|
||||
blr
|
||||
|
||||
.section ".fini","ax"
|
||||
addi 1,1,96
|
||||
ld 0,16(1)
|
||||
mtlr 0
|
||||
blr
|
||||
#endif
|
||||
@@ -0,0 +1,207 @@
|
||||
/*
|
||||
* start.S : RTEMS entry point
|
||||
*
|
||||
* Copyright (C) 1999 Eric Valette. valette@crf.canon.fr
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://www.rtems.org/license/LICENSE.
|
||||
*
|
||||
*/
|
||||
|
||||
#include <rtems/asm.h>
|
||||
#include <rtems/score/cpu.h>
|
||||
#include <rtems/powerpc/powerpc.h>
|
||||
|
||||
#include <libcpu/io.h>
|
||||
#include <libcpu/bat.h>
|
||||
#include <bspopts.h>
|
||||
|
||||
#define SYNC \
|
||||
sync; \
|
||||
isync
|
||||
|
||||
#define KERNELBASE 0x0
|
||||
|
||||
#define MONITOR_ENTER \
|
||||
mfmsr r10 ; \
|
||||
ori r10,r10,MSR_IP ; \
|
||||
mtmsr r10 ; \
|
||||
li r10,0x63 ; \
|
||||
sc
|
||||
|
||||
.text
|
||||
.globl __rtems_entry_point
|
||||
.type __rtems_entry_point,@function
|
||||
__rtems_entry_point:
|
||||
#ifdef DEBUG_EARLY_START
|
||||
MONITOR_ENTER
|
||||
#endif
|
||||
|
||||
/*
|
||||
* PREP
|
||||
* This is jumped to on prep systems right after the kernel is relocated
|
||||
* to its proper place in memory by the boot loader. The expected layout
|
||||
* of the regs is:
|
||||
* r3: ptr to residual data
|
||||
* r4: initrd_start or if no initrd then 0
|
||||
* r5: initrd_end - unused if r4 is 0
|
||||
* r6: Start of command line string
|
||||
* r7: End of command line string
|
||||
*
|
||||
* The Prep boot loader insure that the MMU is currently off...
|
||||
*
|
||||
*/
|
||||
|
||||
mr r31,r3 /* save parameters */
|
||||
mr r30,r4
|
||||
mr r29,r5
|
||||
mr r28,r6
|
||||
mr r27,r7
|
||||
|
||||
#ifdef __ALTIVEC__
|
||||
/* enable altivec; gcc may use it! */
|
||||
mfmsr r0
|
||||
oris r0, r0, (1<<(31-16-6))
|
||||
mtmsr r0
|
||||
isync
|
||||
/*
|
||||
* set vscr and vrsave to known values
|
||||
*/
|
||||
li r0, 0
|
||||
mtvrsave r0
|
||||
vxor 0,0,0
|
||||
mtvscr 0
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Make sure we have nothing in BATS and TLB
|
||||
*/
|
||||
bl CPU_clear_bats_early
|
||||
bl flush_tlbs
|
||||
/*
|
||||
* Use the first pair of BAT registers to map the 1st 256MB
|
||||
* of RAM to KERNELBASE.
|
||||
*/
|
||||
lis r11,KERNELBASE@h
|
||||
/* set up BAT registers for 604 */
|
||||
ori r11,r11,0x1ffe
|
||||
li r8,2 /* R/W access */
|
||||
isync
|
||||
mtspr DBAT0L,r8 /* N.B. 6xx (not 601) have valid */
|
||||
mtspr DBAT0U,r11 /* bit in upper BAT register */
|
||||
mtspr IBAT0L,r8
|
||||
mtspr IBAT0U,r11
|
||||
isync
|
||||
/* Map section where residual is located if outside
|
||||
* the first 256Mb of RAM. This is to support cases
|
||||
* where the available system memory is larger than
|
||||
* 256Mb of RAM.
|
||||
*/
|
||||
mr r9, r1 /* Get where residual was mapped */
|
||||
lis r12,0xf0000000@h
|
||||
and r9,r9,r12
|
||||
cmpi 0,1,r9, 0
|
||||
beq enter_C_code
|
||||
isync
|
||||
ori r11,r9,0x1ffe
|
||||
mtspr DBAT1L,r8 /* N.B. 6xx (not 601) have valid */
|
||||
mtspr DBAT1U,r11 /* bit in upper BAT register */
|
||||
mtspr IBAT1L,r8
|
||||
mtspr IBAT1U,r11
|
||||
isync
|
||||
|
||||
/*
|
||||
* we now have the 1st 256M of ram mapped with the bats. We are still
|
||||
* running on the bootloader stack and cannot switch to an RTEMS allocated
|
||||
* init stack before copying the residual data that may have been set just after
|
||||
* rtems_end address. This bug has been experienced on MVME2304. Thank to
|
||||
* Till Straumann <strauman@SLAC.Stanford.EDU> for hunting it and suggesting
|
||||
* the appropriate code.
|
||||
*/
|
||||
|
||||
enter_C_code:
|
||||
bl MMUon
|
||||
bl __eabi /* setup EABI and SYSV environment */
|
||||
bl zero_bss
|
||||
/*
|
||||
* restore prep boot params
|
||||
*/
|
||||
mr r3,r31
|
||||
mr r4,r30
|
||||
mr r5,r29
|
||||
mr r6,r28
|
||||
mr r7,r27
|
||||
bl save_boot_params
|
||||
/*
|
||||
* stack = &__rtems_end + 4096
|
||||
*/
|
||||
addis r9,r0, __stack-PPC_MINIMUM_STACK_FRAME_SIZE@ha
|
||||
addi r9,r9, __stack-PPC_MINIMUM_STACK_FRAME_SIZE@l
|
||||
/*
|
||||
* align initial stack
|
||||
* (we hope that the bootloader stack was 16-byte aligned
|
||||
* or we haven't used altivec yet...)
|
||||
*/
|
||||
li r0, (CPU_STACK_ALIGNMENT-1)
|
||||
andc r1, r9, r0
|
||||
/*
|
||||
* Tag TOS with a NULL (terminator for stack dump)
|
||||
*/
|
||||
li r0, 0
|
||||
stw r0, 0(r1)
|
||||
|
||||
/*
|
||||
* We are now in a environment that is totally independent from
|
||||
* bootloader setup.
|
||||
*/
|
||||
/* pass result of 'save_boot_params' to 'boot_card' in R3 */
|
||||
bl boot_card
|
||||
bl _return_to_ppcbug
|
||||
|
||||
.globl MMUon
|
||||
.type MMUon,@function
|
||||
MMUon:
|
||||
mfmsr r0
|
||||
ori r0,r0, MSR_IP | MSR_RI | MSR_IR | MSR_DR | MSR_EE | MSR_FE0 | MSR_FE1 | MSR_FP
|
||||
#if (PPC_HAS_FPU == 0)
|
||||
xori r0, r0, MSR_EE | MSR_IP | MSR_FP
|
||||
#else
|
||||
xori r0, r0, MSR_EE | MSR_IP | MSR_FE0 | MSR_FE1
|
||||
#endif
|
||||
mflr r11
|
||||
mtsrr0 r11
|
||||
mtsrr1 r0
|
||||
SYNC
|
||||
rfi
|
||||
|
||||
.globl MMUoff
|
||||
.type MMUoff,@function
|
||||
MMUoff:
|
||||
mfmsr r0
|
||||
ori r0,r0,MSR_IR| MSR_DR | MSR_IP
|
||||
mflr r11
|
||||
xori r0,r0,MSR_IR|MSR_DR
|
||||
mtsrr0 r11
|
||||
mtsrr1 r0
|
||||
SYNC
|
||||
rfi
|
||||
|
||||
.globl _return_to_ppcbug
|
||||
.type _return_to_ppcbug,@function
|
||||
|
||||
_return_to_ppcbug:
|
||||
mflr r30
|
||||
bl MMUoff
|
||||
MONITOR_ENTER
|
||||
bl MMUon
|
||||
mtctr r30
|
||||
bctr
|
||||
|
||||
flush_tlbs:
|
||||
lis r20, 0x1000
|
||||
1: addic. r20, r20, -0x1000
|
||||
tlbie r20
|
||||
bgt 1b
|
||||
sync
|
||||
blr
|
||||
@@ -0,0 +1,22 @@
|
||||
/*
|
||||
* (c) 2007, Thomas Doerfler <Thomas.Doerfler@embedded-brains.de>
|
||||
*
|
||||
*
|
||||
* This file contains the entry point vector needed by some bootloaders
|
||||
* derived from "vectors.S"
|
||||
*/
|
||||
|
||||
#include <rtems/asm.h>
|
||||
#include <rtems/score/cpu.h>
|
||||
|
||||
PUBLIC_VAR (__rtems_start)
|
||||
.section .entry_point_section,"awx",@progbits
|
||||
/*
|
||||
* Entry point information used by bootloader code
|
||||
*/
|
||||
SYM (__rtems_start):
|
||||
.long __rtems_entry_point
|
||||
|
||||
/*
|
||||
* end of special Entry point section
|
||||
*/
|
||||
Reference in New Issue
Block a user