dev/irq: Improve Doxgyen group assignments

Make the GIC interrupt controller support a subgroup of the generic interrupt
controller support.

bsps/include/dev/irq/arm-gic-irq.h

@@ -1,11 +1,12 @@
 /* SPDX-License-Identifier: BSD-2-Clause */
 
 /**
- *  @file
+ * @file
  *
- *  @ingroup arm_gic
+ * @ingroup DevIRQGIC
  *
- *  @brief ARM GIC IRQ
+ * @brief This header file provides interfaces of the ARM Generic Interrupt
+ *   Controller (GIC) support.
  */
 
 /*
@@ -43,6 +44,12 @@
 extern "C" {
 #endif /* __cplusplus */
 
+/**
+ * @addtogroup DevIRQGIC
+ *
+ * @{
+ */
+
 #define ARM_GIC_IRQ_SGI_0 0
 #define ARM_GIC_IRQ_SGI_1 1
 #define ARM_GIC_IRQ_SGI_2 2
@@ -108,6 +115,8 @@ uint32_t arm_gic_irq_processor_count(void);
 void arm_gic_irq_initialize_secondary_cpu(void);
 #endif
 
+/** @} */
+
 #ifdef __cplusplus
 }
 #endif /* __cplusplus */

bsps/include/dev/irq/arm-gic-regs.h

@@ -1,11 +1,12 @@
 /* SPDX-License-Identifier: BSD-2-Clause */
 
 /**
- *  @file
+ * @file
  *
- *  @ingroup arm_gic
+ * @ingroup DevIRQGIC
  *
- *  @brief ARM GIC Register definitions
+ * @brief This header file provides interfaces of the ARM Generic Interrupt
+ *   Controller (GIC) memory-mapped registers.
  */
 
 /*
@@ -38,6 +39,12 @@
 
 #include <bsp/utility.h>
 
+/**
+ * @addtogroup DevIRQGIC
+ *
+ * @{
+ */
+
 typedef struct {
   uint32_t iccicr;
 #define GIC_CPUIF_ICCICR_CBPR BSP_BIT32(4)
@@ -225,4 +232,6 @@ typedef struct {
   uint32_t icspigrpmodr[64];
 } gic_sgi_ppi;
 
+/** @} */
+
 #endif /* LIBBSP_ARM_SHARED_ARM_GIC_REGS_H */

bsps/include/dev/irq/arm-gic-tm27.h

@@ -1,11 +1,12 @@
 /* SPDX-License-Identifier: BSD-2-Clause */
 
 /**
- *  @file
+ * @file
  *
- *  @ingroup arm_gic
+ * @ingroup DevIRQGIC
  *
- *  @brief ARM GIC TM27 Support
+ * @brief This header file provides the TM27 support for the ARM Generic
+ *   Interrupt Controller (GIC).
  */
 
 /*

bsps/include/dev/irq/arm-gic.h

@@ -1,11 +1,12 @@
 /* SPDX-License-Identifier: BSD-2-Clause */
 
 /**
- *  @file
+ * @file
  *
- *  @ingroup arm_gic
+ * @ingroup DevIRQGIC
  *
- *  @brief ARM GIC Support
+ * @brief This header file provides interfaces of the ARM Generic Interrupt
+ *   Controller (GIC) support.
  */
 
 /*
@@ -45,11 +46,14 @@ extern "C" {
 #endif /* __cplusplus */
 
 /**
- *  @defgroup arm_gic ARM GIC
+ * @defgroup DevIRQGIC ARM Generic Interrupt Controller (GIC) Support
  *
- *  @ingroup RTEMSBSPsARMShared
+ * @ingroup RTEMSImplClassicIntr
  *
- *  @brief ARM_GIC Support Package
+ * @brief This group contains the Interrupt Manager implementation parts
+ *   specific to the ARM Generic Interrupt Controller.
+ *
+ * @{
  */
 
 #define GIC_ID_TO_ONE_BIT_REG_INDEX(id) ((id) >> 5)
@@ -248,6 +252,8 @@ static inline void gic_id_set_handling_model(
   dist->icdicfr[i] = icdicfr;
 }
 
+/* @} */
+
 #ifdef __cplusplus
 }
 #endif /* __cplusplus */

bsps/include/dev/irq/arm-gicv3.h

@@ -3,9 +3,10 @@
 /**
  * @file
  *
- * @ingroup arm_gic
+ * @ingroup DevIRQGIC
  *
- * @brief This header file contains interfaces to access an Arm GICv3.
+ * @brief This header file provides interfaces of the ARM Generic Interrupt
+ *   Controller (GIC) support specific to the GICv3.
  */
 
 /*
@@ -44,6 +45,12 @@
 extern "C" {
 #endif
 
+/**
+ * @addtogroup DevIRQGIC
+ *
+ * @{
+ */
+
 #define PRIORITY_DEFAULT 127
 
 #define MPIDR_AFFINITY2(val) BSP_FLD64(val, 16, 23)
@@ -387,6 +394,8 @@ static inline void gicv3_get_attributes(
   }
 }
 
+/** @} */
+
 #ifdef __cplusplus
 }
 #endif