diff --git a/c/src/lib/libbsp/powerpc/qoriq/configure.ac b/c/src/lib/libbsp/powerpc/qoriq/configure.ac index a02f209455..bc78d7dfbb 100644 --- a/c/src/lib/libbsp/powerpc/qoriq/configure.ac +++ b/c/src/lib/libbsp/powerpc/qoriq/configure.ac @@ -164,6 +164,10 @@ RTEMS_BSPOPTS_SET([QORIQ_MMU_DEVICE_MAS7],[qoriq_t*],[0xf]) RTEMS_BSPOPTS_SET([QORIQ_MMU_DEVICE_MAS7],[*],[0x0]) RTEMS_BSPOPTS_HELP([QORIQ_MMU_DEVICE_MAS7],[MAS7 value for device TLB1 entries]) +RTEMS_BSPOPTS_SET([QORIQ_HAS_HYPERVISOR_MODE],[qoriq_t*],[1]) +RTEMS_BSPOPTS_SET([QORIQ_HAS_HYPERVISOR_MODE],[*],[]) +RTEMS_BSPOPTS_HELP([QORIQ_HAS_HYPERVISOR_MODE],[defined if the processor core has a hypervisor mode]) + RTEMS_BSPOPTS_SET([QORIQ_L2CSR0],[qoriq_t*],[0xfec20000]) RTEMS_BSPOPTS_SET([QORIQ_L2CSR0],[*],[]) RTEMS_BSPOPTS_HELP([QORIQ_L2CSR0],[address of L2CSR0 register]) diff --git a/c/src/lib/libbsp/powerpc/qoriq/startup/mmu-tlb1.S b/c/src/lib/libbsp/powerpc/qoriq/startup/mmu-tlb1.S index dfd0be938a..5d04c2f211 100644 --- a/c/src/lib/libbsp/powerpc/qoriq/startup/mmu-tlb1.S +++ b/c/src/lib/libbsp/powerpc/qoriq/startup/mmu-tlb1.S @@ -7,10 +7,10 @@ */ /* - * Copyright (c) 2011 embedded brains GmbH. All rights reserved. + * Copyright (c) 2011, 2016 embedded brains GmbH. All rights reserved. * * embedded brains GmbH - * Obere Lagerstr. 30 + * Dornierstr. 4 * 82178 Puchheim * Germany * @@ -20,6 +20,8 @@ * http://www.rtems.org/license/LICENSE. */ +#include + #include .global qoriq_tlb1_write @@ -42,6 +44,10 @@ qoriq_tlb1_write: or r6, r8, r6 mtspr FSL_EIS_MAS3, r6 mtspr FSL_EIS_MAS7, r7 +#ifdef QORIQ_HAS_HYPERVISOR_MODE + li r0, 0 + mtspr FSL_EIS_MAS8, r0 +#endif tlbwe sync isync @@ -56,6 +62,9 @@ qoriq_tlb1_invalidate: mtspr FSL_EIS_MAS2, r0 mtspr FSL_EIS_MAS3, r0 mtspr FSL_EIS_MAS7, r0 +#ifdef QORIQ_HAS_HYPERVISOR_MODE + mtspr FSL_EIS_MAS8, r0 +#endif tlbwe sync isync