From 8cb6e36e966e3d6659370b515a6da6f24dde0ca1 Mon Sep 17 00:00:00 2001 From: Bernd Moessner Date: Tue, 21 Nov 2023 11:42:03 -0800 Subject: [PATCH] Fix add missing clock settings for zc706 --- spec/build/bsps/arm/xilinx-zynq/opta9periphclk.yml | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/spec/build/bsps/arm/xilinx-zynq/opta9periphclk.yml b/spec/build/bsps/arm/xilinx-zynq/opta9periphclk.yml index 7233f73d5a..52133eca6e 100644 --- a/spec/build/bsps/arm/xilinx-zynq/opta9periphclk.yml +++ b/spec/build/bsps/arm/xilinx-zynq/opta9periphclk.yml @@ -6,7 +6,9 @@ build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH & Co. KG default: -- enabled-by: arm/xilinx_zynq_zc702 +- enabled-by: + - arm/xilinx_zynq_zc702 + - arm/xilinx_zynq_zc706 value: 333333333 - enabled-by: arm/xilinx_zynq_zedboard value: 666666667