diff --git a/bsps/riscv/riscv/clock/clockdrv.c b/bsps/riscv/riscv/clock/clockdrv.c
index 8be203757c..6a5d2dbfcd 100644
--- a/bsps/riscv/riscv/clock/clockdrv.c
+++ b/bsps/riscv/riscv/clock/clockdrv.c
@@ -33,6 +33,7 @@
  */
 
 #include <rtems/timecounter.h>
+#include <rtems/score/riscv-utility.h>
 
 #include <bsp.h>
 #include <bsp/fatal.h>
diff --git a/cpukit/score/cpu/riscv/cpu.c b/cpukit/score/cpu/riscv/cpu.c
index 7c14a8bffd..deae25d34f 100644
--- a/cpukit/score/cpu/riscv/cpu.c
+++ b/cpukit/score/cpu/riscv/cpu.c
@@ -29,10 +29,9 @@
  * SUCH DAMAGE.
  */
 
-#include <rtems/system.h>
-#include <rtems/score/isr.h>
-#include <rtems/score/wkspace.h>
 #include <rtems/score/cpu.h>
+#include <rtems/score/isr.h>
+#include <rtems/score/riscv-utility.h>
 
 /* bsp_start_vector_table_begin is the start address of the vector table
  * containing addresses to ISR Handlers. It's defined at the BSP linkcmds
diff --git a/cpukit/score/cpu/riscv/include/rtems/score/cpu.h b/cpukit/score/cpu/riscv/include/rtems/score/cpu.h
index 15a75c8af3..30adbbca38 100644
--- a/cpukit/score/cpu/riscv/include/rtems/score/cpu.h
+++ b/cpukit/score/cpu/riscv/include/rtems/score/cpu.h
@@ -40,13 +40,7 @@ extern "C" {
 #endif
 
 #include <rtems/score/basedefs.h>
-#include <rtems/score/riscv.h> /* pick up machine definitions */
-#include <rtems/score/riscv-utility.h>
-#ifndef ASM
-#include <rtems/bspIo.h>
-#include <stdint.h>
-#include <stdio.h> /* for printk */
-#endif
+#include <rtems/score/riscv.h>
 
 #define RISCV_MSTATUS_MIE 0x8
 
diff --git a/cpukit/score/cpu/riscv/riscv-context-switch.S b/cpukit/score/cpu/riscv/riscv-context-switch.S
index 705cd77175..b5e43522c7 100644
--- a/cpukit/score/cpu/riscv/riscv-context-switch.S
+++ b/cpukit/score/cpu/riscv/riscv-context-switch.S
@@ -32,6 +32,7 @@
 
 #include <rtems/asm.h>
 #include <rtems/score/cpu.h>
+#include <rtems/score/riscv-utility.h>
 
 	.section	.text, "ax", @progbits
 	.align	2