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Remove make preinstall

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A speciality of the RTEMS build system was the make preinstall step.  It
copied header files from arbitrary locations into the build tree.  The
header files were included via the -Bsome/build/tree/path GCC command
line option.

This has at least seven problems:

* The make preinstall step itself needs time and disk space.

* Errors in header files show up in the build tree copy.  This makes it
  hard for editors to open the right file to fix the error.

* There is no clear relationship between source and build tree header
  files.  This makes an audit of the build process difficult.

* The visibility of all header files in the build tree makes it
  difficult to enforce API barriers.  For example it is discouraged to
  use BSP-specifics in the cpukit.

* An introduction of a new build system is difficult.

* Include paths specified by the -B option are system headers.  This
  may suppress warnings.

* The parallel build had sporadic failures on some hosts.

This patch removes the make preinstall step.   All installed header
files are moved to dedicated include directories in the source tree.
Let @RTEMS_CPU@ be the target architecture, e.g. arm, powerpc, sparc,
etc.  Let @RTEMS_BSP_FAMILIY@ be a BSP family base directory, e.g.
erc32, imx, qoriq, etc.

The new cpukit include directories are:

* cpukit/include

* cpukit/score/cpu/@RTEMS_CPU@/include

* cpukit/libnetworking

The new BSP include directories are:

* bsps/include

* bsps/@RTEMS_CPU@/include

* bsps/@RTEMS_CPU@/@RTEMS_BSP_FAMILIY@/include

There are build tree include directories for generated files.

The include directory order favours the most general header file, e.g.
it is not possible to override general header files via the include path
order.

The "bootstrap -p" option was removed.  The new "bootstrap -H" option
should be used to regenerate the "headers.am" files.

Update #3254.
This commit is contained in:
Chris Johns
2018-01-25 08:45:26 +01:00
committed by Sebastian Huber
parent 9704efb4ec
commit 2afb22b7e1
2356 changed files with 4032 additions and 19788 deletions
Download Patch File Download Diff File Expand all files Collapse all files
cpukit/include/adainclude/preinstall.am
-177
View File
@@ -1,177 +0,0 @@
## Automatically generated by ampolish3 - Do not edit
if AMPOLISH3
$(srcdir)/preinstall.am: Makefile.am
$(AMPOLISH3) $(srcdir)/Makefile.am > $(srcdir)/preinstall.am
endif
PREINSTALL_DIRS =
DISTCLEANFILES = $(PREINSTALL_DIRS)
all-am: $(PREINSTALL_FILES)
PREINSTALL_FILES =
CLEANFILES = $(PREINSTALL_FILES)
if RTEMS_ADA
$(PROJECT_INCLUDE)/adainclude/$(dirstamp):
@$(MKDIR_P) $(PROJECT_INCLUDE)/adainclude
@: > $(PROJECT_INCLUDE)/adainclude/$(dirstamp)
PREINSTALL_DIRS += $(PROJECT_INCLUDE)/adainclude/$(dirstamp)
$(PROJECT_INCLUDE)/adainclude/rtems.adb: rtems.adb $(PROJECT_INCLUDE)/adainclude/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/adainclude/rtems.adb
PREINSTALL_FILES += $(PROJECT_INCLUDE)/adainclude/rtems.adb
$(PROJECT_INCLUDE)/adainclude/rtems.ads: rtems.ads $(PROJECT_INCLUDE)/adainclude/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/adainclude/rtems.ads
PREINSTALL_FILES += $(PROJECT_INCLUDE)/adainclude/rtems.ads
$(PROJECT_INCLUDE)/adainclude/rtems-barrier.adb: rtems-barrier.adb $(PROJECT_INCLUDE)/adainclude/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/adainclude/rtems-barrier.adb
PREINSTALL_FILES += $(PROJECT_INCLUDE)/adainclude/rtems-barrier.adb
$(PROJECT_INCLUDE)/adainclude/rtems-barrier.ads: rtems-barrier.ads $(PROJECT_INCLUDE)/adainclude/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/adainclude/rtems-barrier.ads
PREINSTALL_FILES += $(PROJECT_INCLUDE)/adainclude/rtems-barrier.ads
$(PROJECT_INCLUDE)/adainclude/rtems-clock.adb: rtems-clock.adb $(PROJECT_INCLUDE)/adainclude/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/adainclude/rtems-clock.adb
PREINSTALL_FILES += $(PROJECT_INCLUDE)/adainclude/rtems-clock.adb
$(PROJECT_INCLUDE)/adainclude/rtems-clock.ads: rtems-clock.ads $(PROJECT_INCLUDE)/adainclude/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/adainclude/rtems-clock.ads
PREINSTALL_FILES += $(PROJECT_INCLUDE)/adainclude/rtems-clock.ads
$(PROJECT_INCLUDE)/adainclude/rtems-cpu_usage.ads: rtems-cpu_usage.ads $(PROJECT_INCLUDE)/adainclude/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/adainclude/rtems-cpu_usage.ads
PREINSTALL_FILES += $(PROJECT_INCLUDE)/adainclude/rtems-cpu_usage.ads
$(PROJECT_INCLUDE)/adainclude/rtems-event.adb: rtems-event.adb $(PROJECT_INCLUDE)/adainclude/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/adainclude/rtems-event.adb
PREINSTALL_FILES += $(PROJECT_INCLUDE)/adainclude/rtems-event.adb
$(PROJECT_INCLUDE)/adainclude/rtems-event.ads: rtems-event.ads $(PROJECT_INCLUDE)/adainclude/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/adainclude/rtems-event.ads
PREINSTALL_FILES += $(PROJECT_INCLUDE)/adainclude/rtems-event.ads
$(PROJECT_INCLUDE)/adainclude/rtems-extension.adb: rtems-extension.adb $(PROJECT_INCLUDE)/adainclude/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/adainclude/rtems-extension.adb
PREINSTALL_FILES += $(PROJECT_INCLUDE)/adainclude/rtems-extension.adb
$(PROJECT_INCLUDE)/adainclude/rtems-extension.ads: rtems-extension.ads $(PROJECT_INCLUDE)/adainclude/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/adainclude/rtems-extension.ads
PREINSTALL_FILES += $(PROJECT_INCLUDE)/adainclude/rtems-extension.ads
$(PROJECT_INCLUDE)/adainclude/rtems-fatal.adb: rtems-fatal.adb $(PROJECT_INCLUDE)/adainclude/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/adainclude/rtems-fatal.adb
PREINSTALL_FILES += $(PROJECT_INCLUDE)/adainclude/rtems-fatal.adb
$(PROJECT_INCLUDE)/adainclude/rtems-fatal.ads: rtems-fatal.ads $(PROJECT_INCLUDE)/adainclude/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/adainclude/rtems-fatal.ads
PREINSTALL_FILES += $(PROJECT_INCLUDE)/adainclude/rtems-fatal.ads
$(PROJECT_INCLUDE)/adainclude/rtems-interrupt.ads: rtems-interrupt.ads $(PROJECT_INCLUDE)/adainclude/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/adainclude/rtems-interrupt.ads
PREINSTALL_FILES += $(PROJECT_INCLUDE)/adainclude/rtems-interrupt.ads
$(PROJECT_INCLUDE)/adainclude/rtems-io.adb: rtems-io.adb $(PROJECT_INCLUDE)/adainclude/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/adainclude/rtems-io.adb
PREINSTALL_FILES += $(PROJECT_INCLUDE)/adainclude/rtems-io.adb
$(PROJECT_INCLUDE)/adainclude/rtems-io.ads: rtems-io.ads $(PROJECT_INCLUDE)/adainclude/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/adainclude/rtems-io.ads
PREINSTALL_FILES += $(PROJECT_INCLUDE)/adainclude/rtems-io.ads
$(PROJECT_INCLUDE)/adainclude/rtems-message_queue.adb: rtems-message_queue.adb $(PROJECT_INCLUDE)/adainclude/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/adainclude/rtems-message_queue.adb
PREINSTALL_FILES += $(PROJECT_INCLUDE)/adainclude/rtems-message_queue.adb
$(PROJECT_INCLUDE)/adainclude/rtems-message_queue.ads: rtems-message_queue.ads $(PROJECT_INCLUDE)/adainclude/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/adainclude/rtems-message_queue.ads
PREINSTALL_FILES += $(PROJECT_INCLUDE)/adainclude/rtems-message_queue.ads
$(PROJECT_INCLUDE)/adainclude/rtems-multiprocessing.adb: rtems-multiprocessing.adb $(PROJECT_INCLUDE)/adainclude/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/adainclude/rtems-multiprocessing.adb
PREINSTALL_FILES += $(PROJECT_INCLUDE)/adainclude/rtems-multiprocessing.adb
$(PROJECT_INCLUDE)/adainclude/rtems-multiprocessing.ads: rtems-multiprocessing.ads $(PROJECT_INCLUDE)/adainclude/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/adainclude/rtems-multiprocessing.ads
PREINSTALL_FILES += $(PROJECT_INCLUDE)/adainclude/rtems-multiprocessing.ads
$(PROJECT_INCLUDE)/adainclude/rtems-object.adb: rtems-object.adb $(PROJECT_INCLUDE)/adainclude/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/adainclude/rtems-object.adb
PREINSTALL_FILES += $(PROJECT_INCLUDE)/adainclude/rtems-object.adb
$(PROJECT_INCLUDE)/adainclude/rtems-object.ads: rtems-object.ads $(PROJECT_INCLUDE)/adainclude/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/adainclude/rtems-object.ads
PREINSTALL_FILES += $(PROJECT_INCLUDE)/adainclude/rtems-object.ads
$(PROJECT_INCLUDE)/adainclude/rtems-partition.adb: rtems-partition.adb $(PROJECT_INCLUDE)/adainclude/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/adainclude/rtems-partition.adb
PREINSTALL_FILES += $(PROJECT_INCLUDE)/adainclude/rtems-partition.adb
$(PROJECT_INCLUDE)/adainclude/rtems-partition.ads: rtems-partition.ads $(PROJECT_INCLUDE)/adainclude/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/adainclude/rtems-partition.ads
PREINSTALL_FILES += $(PROJECT_INCLUDE)/adainclude/rtems-partition.ads
$(PROJECT_INCLUDE)/adainclude/rtems-port.adb: rtems-port.adb $(PROJECT_INCLUDE)/adainclude/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/adainclude/rtems-port.adb
PREINSTALL_FILES += $(PROJECT_INCLUDE)/adainclude/rtems-port.adb
$(PROJECT_INCLUDE)/adainclude/rtems-port.ads: rtems-port.ads $(PROJECT_INCLUDE)/adainclude/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/adainclude/rtems-port.ads
PREINSTALL_FILES += $(PROJECT_INCLUDE)/adainclude/rtems-port.ads
$(PROJECT_INCLUDE)/adainclude/rtems-rate_monotonic.adb: rtems-rate_monotonic.adb $(PROJECT_INCLUDE)/adainclude/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/adainclude/rtems-rate_monotonic.adb
PREINSTALL_FILES += $(PROJECT_INCLUDE)/adainclude/rtems-rate_monotonic.adb
$(PROJECT_INCLUDE)/adainclude/rtems-rate_monotonic.ads: rtems-rate_monotonic.ads $(PROJECT_INCLUDE)/adainclude/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/adainclude/rtems-rate_monotonic.ads
PREINSTALL_FILES += $(PROJECT_INCLUDE)/adainclude/rtems-rate_monotonic.ads
$(PROJECT_INCLUDE)/adainclude/rtems-region.adb: rtems-region.adb $(PROJECT_INCLUDE)/adainclude/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/adainclude/rtems-region.adb
PREINSTALL_FILES += $(PROJECT_INCLUDE)/adainclude/rtems-region.adb
$(PROJECT_INCLUDE)/adainclude/rtems-region.ads: rtems-region.ads $(PROJECT_INCLUDE)/adainclude/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/adainclude/rtems-region.ads
PREINSTALL_FILES += $(PROJECT_INCLUDE)/adainclude/rtems-region.ads
$(PROJECT_INCLUDE)/adainclude/rtems-semaphore.adb: rtems-semaphore.adb $(PROJECT_INCLUDE)/adainclude/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/adainclude/rtems-semaphore.adb
PREINSTALL_FILES += $(PROJECT_INCLUDE)/adainclude/rtems-semaphore.adb
$(PROJECT_INCLUDE)/adainclude/rtems-semaphore.ads: rtems-semaphore.ads $(PROJECT_INCLUDE)/adainclude/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/adainclude/rtems-semaphore.ads
PREINSTALL_FILES += $(PROJECT_INCLUDE)/adainclude/rtems-semaphore.ads
$(PROJECT_INCLUDE)/adainclude/rtems-signal.adb: rtems-signal.adb $(PROJECT_INCLUDE)/adainclude/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/adainclude/rtems-signal.adb
PREINSTALL_FILES += $(PROJECT_INCLUDE)/adainclude/rtems-signal.adb
$(PROJECT_INCLUDE)/adainclude/rtems-signal.ads: rtems-signal.ads $(PROJECT_INCLUDE)/adainclude/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/adainclude/rtems-signal.ads
PREINSTALL_FILES += $(PROJECT_INCLUDE)/adainclude/rtems-signal.ads
$(PROJECT_INCLUDE)/adainclude/rtems-stack_checker.ads: rtems-stack_checker.ads $(PROJECT_INCLUDE)/adainclude/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/adainclude/rtems-stack_checker.ads
PREINSTALL_FILES += $(PROJECT_INCLUDE)/adainclude/rtems-stack_checker.ads
$(PROJECT_INCLUDE)/adainclude/rtems-tasks.adb: rtems-tasks.adb $(PROJECT_INCLUDE)/adainclude/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/adainclude/rtems-tasks.adb
PREINSTALL_FILES += $(PROJECT_INCLUDE)/adainclude/rtems-tasks.adb
$(PROJECT_INCLUDE)/adainclude/rtems-tasks.ads: rtems-tasks.ads $(PROJECT_INCLUDE)/adainclude/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/adainclude/rtems-tasks.ads
PREINSTALL_FILES += $(PROJECT_INCLUDE)/adainclude/rtems-tasks.ads
$(PROJECT_INCLUDE)/adainclude/rtems-timer.adb: rtems-timer.adb $(PROJECT_INCLUDE)/adainclude/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/adainclude/rtems-timer.adb
PREINSTALL_FILES += $(PROJECT_INCLUDE)/adainclude/rtems-timer.adb
$(PROJECT_INCLUDE)/adainclude/rtems-timer.ads: rtems-timer.ads $(PROJECT_INCLUDE)/adainclude/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/adainclude/rtems-timer.ads
PREINSTALL_FILES += $(PROJECT_INCLUDE)/adainclude/rtems-timer.ads
endif
cpukit/include/aio.h
+193
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@@ -0,0 +1,193 @@
/**
* @file
*
* @brief POSIX Asynchronous Input and Output
*
* This file contains the definitions related to POSIX Asynchronous
* Input and Output,
*/
/*
* COPYRIGHT (c) 1989-2011.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*/
#ifndef _AIO_H
#define _AIO_H
#include <sys/cdefs.h>
#include <unistd.h>
#ifdef __cplusplus
extern "C" {
#endif
/**
* @defgroup POSIX_AIO POSIX Asynchronous I/O Support
*
* @ingroup POSIXAPI
*
* @brief POSIX Asynchronous Input and Output
*
*/
/**@{**/
#if defined(_POSIX_ASYNCHRONOUS_IO)
/*
* 6.7.1 Data Definitions for Asynchronous Input and Output,
* P1003.1b-1993, p. 151
*/
#include <sys/types.h>
#include <signal.h>
#include <time.h>
#include <fcntl.h>
/*
* 6.7.1.2 Manifest Constants, P1003.1b-1993, p. 153
*/
#define AIO_CANCELED 0 /* all requested operations have been canceled */
#define AIO_NOTCANCELED 1 /* some of the operations could not be canceled */
/* since they are in progress */
#define AIO_ALLDONE 2 /* none of the requested operations could be */
/* canceled since they are already complete */
/* lio_listio() options */
/*
* LIO modes
*/
#define LIO_WAIT 0 /* calling process is to suspend until the */
/* operation is complete */
#define LIO_NOWAIT 1 /* calling process is to continue execution while */
/* the operation is performed and no notification */
/* shall be given when the operation is completed */
/*
* LIO opcodes
*/
#define LIO_NOP 0 /* no transfer is requested */
#define LIO_READ 1 /* request a read() */
#define LIO_WRITE 2 /* request a write() */
#define LIO_SYNC 3 /* needed by aio_fsync() */
/*
* 6.7.1.1 Asynchronous I/O Control Block, P1003.1b-1993, p. 151
*/
struct aiocb {
/* public */
int aio_fildes; /* File descriptor */
off_t aio_offset; /* File offset */
volatile void *aio_buf; /* Location of buffer */
size_t aio_nbytes; /* Length of transfer */
int aio_reqprio; /* Request priority offset */
struct sigevent aio_sigevent; /* Signal number and value */
int aio_lio_opcode; /* Operation to be performed */
/* private */
int error_code; /* Used for aio_error() */
ssize_t return_value; /* Used for aio_return() */
};
/*
* 6.7.2 Asynchronous Read, P1003.1b-1993, p. 154
*/
int aio_read(
struct aiocb *aiocbp
);
/*
* 6.7.3 Asynchronous Write, P1003.1b-1993, p. 155
*/
int aio_write(
struct aiocb *aiocbp
);
/*
* 6.7.4 List Directed I/O, P1003.1b-1993, p. 158
*/
int lio_listio(
int mode,
struct aiocb *__restrict const list[__restrict],
int nent,
struct sigevent *__restrict sig
);
/*
* 6.7.5 Retrieve Error of Asynchronous I/O Operation, P1003.1b-1993, p. 161
*/
int aio_error(
const struct aiocb *aiocbp
);
/*
* 6.7.6 Retrieve Return Status of Asynchronous I/O Operation,
* P1003.1b-1993, p. 162
*/
ssize_t aio_return(
const struct aiocb *aiocbp
);
/**
* @brief Cancel asynchronous I/O operation.
*
* 6.7.7 Cancel Asynchronous I/O Operation, P1003.1b-1993, p. 163
*
* @param[in] filedes is the file descriptor
* @param[in] aiocbp is a pointer to the asynchronous I/O control block
*
* @retval AIO_CANCELED The requested operation(s) were canceled.
* @retval AIO_NOTCANCELED Some of the requested operation(s) cannot be
* canceled since they are in progress.
* @retval AIO_ALLDONE None of the requested operation(s) could be canceled
* since they are already complete
*/
int aio_cancel(
int filedes,
struct aiocb *aiocbp
);
/*
* 6.7.7 Wait for Asynchronous I/O Request, P1003.1b-1993, p. 164
*/
int aio_suspend(
const struct aiocb * const list[],
int nent,
const struct timespec *timeout
);
#if defined(_POSIX_SYNCHRONIZED_IO)
/*
* 6.7.9 Asynchronous File Synchronization, P1003.1b-1993, p. 166
*/
int aio_fsync(
int op,
struct aiocb *aiocbp
);
#endif /* _POSIX_SYNCHRONIZED_IO */
#endif /* _POSIX_ASYNCHRONOUS_IO */
/** @} */
#ifdef __cplusplus
}
#endif
#endif
/* end of include file */
cpukit/include/dev/i2c/eeprom.h
+58
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@@ -0,0 +1,58 @@
/**
* @file
*
* @brief EEPROM Driver API
*
* @ingroup I2CEEPROM
*/
/*
* Copyright (c) 2014 embedded brains GmbH. All rights reserved.
*
* embedded brains GmbH
* Dornierstr. 4
* 82178 Puchheim
* Germany
* <rtems@embedded-brains.de>
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*/
#ifndef _DEV_I2C_EEPROM_H
#define _DEV_I2C_EEPROM_H
#include <dev/i2c/i2c.h>
#ifdef __cplusplus
extern "C" {
#endif /* __cplusplus */
/**
* @defgroup I2CEEPROM EEPROM Driver
*
* @ingroup I2CDevice
*
* @brief Driver for EEPROM device.
*
* @{
*/
int i2c_dev_register_eeprom(
const char *bus_path,
const char *dev_path,
uint16_t i2c_address,
uint16_t address_bytes,
uint16_t page_size_in_bytes,
uint32_t size_in_bytes,
uint32_t program_timeout_in_ms
);
/** @} */
#ifdef __cplusplus
}
#endif /* __cplusplus */
#endif /* _DEV_I2C_EEPROM_H */
cpukit/include/dev/i2c/fpga-i2c-slave.h
+25
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@@ -0,0 +1,25 @@
/*
* Copyright (c) 2016-2017 Chris Johns <chrisj@rtems.org>
* All rights reserved.
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*/
/*
* I2C slave for testing:
* https://github.com/oetr/FPGA-I2C-Slave
*/
#ifndef FPGA_I2C_SLAVE_H
#define FPGA_I2C_SLAVE_H
#include <dev/i2c/i2c.h>
int i2c_dev_register_fpga_i2c_slave(const char* bus_path,
const char* dev_path,
uint16_t address,
size_t size);
#endif
cpukit/include/dev/i2c/gpio-nxp-pca9535.h
+123
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@@ -0,0 +1,123 @@
/**
* @file
*
* @brief GPIO NXP PCA9535 Driver API
*
* @ingroup I2CGPIONXPPCA9535
*/
/*
* Copyright (c) 2014 embedded brains GmbH. All rights reserved.
*
* embedded brains GmbH
* Dornierstr. 4
* 82178 Puchheim
* Germany
* <rtems@embedded-brains.de>
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*/
#ifndef _DEV_I2C_GPIO_NXP_PCA9539_H
#define _DEV_I2C_GPIO_NXP_PCA9539_H
#include <dev/i2c/i2c.h>
#ifdef __cplusplus
extern "C" {
#endif /* __cplusplus */
/**
* @defgroup I2CGPIONXPPCA9535 GPIO NXP PCA9535 Driver
*
* @ingroup I2CDevice
*
* @brief Driver for NXP PCA9535 16-bit GPIO device.
*
* @{
*/
int i2c_dev_register_gpio_nxp_pca9535(
const char *bus_path,
const char *dev_path,
uint16_t address
);
#define GPIO_NXP_PCA9535_GET_INPUT (I2C_DEV_IO_CONTROL + 0)
#define GPIO_NXP_PCA9535_GET_OUTPUT (I2C_DEV_IO_CONTROL + 1)
#define GPIO_NXP_PCA9535_SET_OUTPUT (I2C_DEV_IO_CONTROL + 2)
#define GPIO_NXP_PCA9535_CLEAR_AND_SET_OUTPUT (I2C_DEV_IO_CONTROL + 3)
#define GPIO_NXP_PCA9535_GET_POL_INV (I2C_DEV_IO_CONTROL + 4)
#define GPIO_NXP_PCA9535_SET_POL_INV (I2C_DEV_IO_CONTROL + 5)
#define GPIO_NXP_PCA9535_GET_CONFIG (I2C_DEV_IO_CONTROL + 6)
#define GPIO_NXP_PCA9535_SET_CONFIG (I2C_DEV_IO_CONTROL + 7)
static inline int gpio_nxp_pca9535_get_input(int fd, uint16_t *val)
{
return ioctl(fd, GPIO_NXP_PCA9535_GET_INPUT, val);
}
static inline int gpio_nxp_pca9535_get_output(int fd, uint16_t *val)
{
return ioctl(fd, GPIO_NXP_PCA9535_GET_OUTPUT, val);
}
static inline int gpio_nxp_pca9535_set_output(int fd, uint16_t val)
{
return ioctl(fd, GPIO_NXP_PCA9535_SET_OUTPUT, (void *)(uintptr_t) val);
}
static inline int gpio_nxp_pca9535_clear_and_set_output(
int fd,
uint16_t clear,
uint16_t set
)
{
uint32_t clear_and_set = ((uint32_t) set << 16) | (uint32_t) clear;
return ioctl(
fd,
GPIO_NXP_PCA9535_CLEAR_AND_SET_OUTPUT,
(void *)(uintptr_t) clear_and_set
);
}
static inline int gpio_nxp_pca9535_get_polarity_inversion(
int fd,
uint16_t *val
)
{
return ioctl(fd, GPIO_NXP_PCA9535_GET_POL_INV, val);
}
static inline int gpio_nxp_pca9535_set_polarity_inversion(int fd, uint16_t val)
{
return ioctl(fd, GPIO_NXP_PCA9535_SET_POL_INV, (void *)(uintptr_t) val);
}
static inline int gpio_nxp_pca9535_get_config(int fd, uint16_t *val)
{
return ioctl(fd, GPIO_NXP_PCA9535_GET_CONFIG, val);
}
static inline int gpio_nxp_pca9535_set_config(int fd, uint16_t val)
{
return ioctl(fd, GPIO_NXP_PCA9535_SET_CONFIG, (void *)(uintptr_t) val);
}
/** @} */
#ifdef __cplusplus
}
#endif /* __cplusplus */
#endif /* _DEV_I2C_GPIO_NXP_PCA9539_H */
cpukit/include/dev/i2c/i2c.h
+432
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/**
* @file
*
* @brief Inter-Integrated Circuit (I2C) Driver API
*
* @ingroup I2C
*/
/*
* Copyright (c) 2014 embedded brains GmbH. All rights reserved.
*
* embedded brains GmbH
* Dornierstr. 4
* 82178 Puchheim
* Germany
* <rtems@embedded-brains.de>
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*/
#ifndef _DEV_I2C_I2C_H
#define _DEV_I2C_I2C_H
#include <linux/i2c.h>
#include <linux/i2c-dev.h>
#include <rtems.h>
#include <rtems/seterr.h>
#include <sys/ioctl.h>
#include <sys/stat.h>
#ifdef __cplusplus
extern "C" {
#endif /* __cplusplus */
typedef struct i2c_msg i2c_msg;
typedef struct i2c_bus i2c_bus;
typedef struct i2c_dev i2c_dev;
typedef struct i2c_rdwr_ioctl_data i2c_rdwr_ioctl_data;
/**
* @defgroup I2C Inter-Integrated Circuit (I2C) Driver
*
* @brief Inter-Integrated Circuit (I2C) bus and device driver support.
*
* @{
*/
/**
* @defgroup I2CBus I2C Bus Driver
*
* @ingroup I2C
*
* @{
*/
/**
* @name I2C IO Control Commands
*
* @{
*/
/**
* @brief Obtains the bus.
*
* This command has no argument.
*/
#define I2C_BUS_OBTAIN 0x800
/**
* @brief Releases the bus.
*
* This command has no argument.
*/
#define I2C_BUS_RELEASE 0x801
/**
* @brief Gets the bus control.
*
* The argument type is a pointer to i2c_bus pointer.
*/
#define I2C_BUS_GET_CONTROL 0x802
/**
* @brief Sets the bus clock in Hz.
*
* The argument type is unsigned long.
*/
#define I2C_BUS_SET_CLOCK 0x803
/** @} */
/**
* @brief Default I2C bus clock in Hz.
*/
#define I2C_BUS_CLOCK_DEFAULT 100000
/**
* @brief I2C bus control.
*/
struct i2c_bus {
/**
* @brief Transfers I2C messages.
*
* @param[in] bus The bus control.
* @param[in] msgs The messages to transfer.
* @param[in] msg_count The count of messages to transfer. It must be
* positive.
*
* @retval 0 Successful operation.
* @retval negative Negative error number in case of an error.
*/
int (*transfer)(i2c_bus *bus, i2c_msg *msgs, uint32_t msg_count);
/**
* @brief Sets the bus clock.
*
* @param[in] bus The bus control.
* @param[in] clock The desired bus clock in Hz.
*
* @retval 0 Successful operation.
* @retval negative Negative error number in case of an error.
*/
int (*set_clock)(i2c_bus *bus, unsigned long clock);
/**
* @brief Destroys the bus.
*
* @param[in] bus The bus control.
*/
void (*destroy)(i2c_bus *bus);
/**
* @brief Mutex to protect the bus access.
*/
rtems_id mutex;
/**
* @brief Default slave device address.
*/
uint16_t default_address;
/**
* @brief Use 10-bit addresses.
*/
bool ten_bit_address;
/**
* @brief Use SMBus PEC.
*/
bool use_pec;
/**
* @brief Transfer retry count.
*/
unsigned long retries;
/**
* @brief Transaction timeout in ticks.
*/
rtems_interval timeout;
/**
* @brief Controller functionality.
*/
unsigned long functionality;
};
/**
* @brief Initializes a bus control.
*
* After a sucessful initialization the bus control must be destroyed via
* i2c_bus_destroy(). A registered bus control will be automatically destroyed
* in case the device file is unlinked. Make sure to call i2c_bus_destroy() in
* a custom destruction handler.
*
* @param[in] bus The bus control.
*
* @retval 0 Successful operation.
* @retval -1 An error occurred. The errno is set to indicate the error.
*
* @see i2c_bus_register()
*/
int i2c_bus_init(i2c_bus *bus);
/**
* @brief Allocates a bus control from the heap and initializes it.
*
* After a sucessful allocation and initialization the bus control must be
* destroyed via i2c_bus_destroy_and_free(). A registered bus control will be
* automatically destroyed in case the device file is unlinked. Make sure to
* call i2c_bus_destroy_and_free() in a custom destruction handler.
*
* @param[in] size The size of the bus control. This enables the addition of
* bus controller specific data to the base bus control. The bus control is
* zero initialized.
*
* @retval non-NULL The new bus control.
* @retval NULL An error occurred. The errno is set to indicate the error.
*
* @see i2c_bus_register()
*/
i2c_bus *i2c_bus_alloc_and_init(size_t size);
/**
* @brief Destroys a bus control.
*
* @param[in] bus The bus control.
*/
void i2c_bus_destroy(i2c_bus *bus);
/**
* @brief Destroys a bus control and frees its memory.
*
* @param[in] bus The bus control.
*/
void i2c_bus_destroy_and_free(i2c_bus *bus);
/**
* @brief Registers a bus control.
*
* This function claims ownership of the bus control regardless if the
* registration is successful or not.
*
* @param[in] bus The bus control.
* @param[in] bus_path The path to the bus device file.
*
* @retval 0 Successful operation.
* @retval -1 An error occurred. The errno is set to indicate the error.
*/
int i2c_bus_register(
i2c_bus *bus,
const char *bus_path
);
/**
* @brief Obtains the bus.
*
* @param[in] bus The bus control.
*/
void i2c_bus_obtain(i2c_bus *bus);
/**
* @brief Releases the bus.
*
* @param[in] bus The bus control.
*/
void i2c_bus_release(i2c_bus *bus);
/**
* @brief Transfers I2C messages.
*
* The bus is obtained before the transfer and released afterwards.
*
* @param[in] bus The bus control.
* @param[in] msgs The messages to transfer.
* @param[in] msg_count The count of messages to transfer. It must be
* positive.
*
* @retval 0 Successful operation.
* @retval negative Negative error number in case of an error.
*/
int i2c_bus_transfer(i2c_bus *bus, i2c_msg *msgs, uint32_t msg_count);
/** @} */
/**
* @defgroup I2CDevice I2C Device Driver
*
* @ingroup I2C
*
* @{
*/
/**
* @brief Base number for device IO control commands.
*/
#define I2C_DEV_IO_CONTROL 0x900
/**
* @brief I2C slave device control.
*/
struct i2c_dev {
/**
* @brief Reads from the device.
*
* @retval non-negative Bytes transferred from device.
* @retval negative Negative error number in case of an error.
*/
ssize_t (*read)(i2c_dev *dev, void *buf, size_t n, off_t offset);
/**
* @brief Writes to the device.
*
* @retval non-negative Bytes transferred to device.
* @retval negative Negative error number in case of an error.
*/
ssize_t (*write)(i2c_dev *dev, const void *buf, size_t n, off_t offset);
/**
* @brief Device IO control.
*
* @retval 0 Successful operation.
* @retval negative Negative error number in case of an error.
*/
int (*ioctl)(i2c_dev *dev, ioctl_command_t command, void *arg);
/**
* @brief Gets the file size.
*/
off_t (*get_size)(i2c_dev *dev);
/**
* @brief Gets the file block size.
*/
blksize_t (*get_block_size)(i2c_dev *dev);
/**
* @brief Destroys the device.
*/
void (*destroy)(i2c_dev *dev);
/**
* @brief The bus control.
*/
i2c_bus *bus;
/**
* @brief The device address.
*/
uint16_t address;
/**
* @brief File descriptor of the bus.
*
* This prevents destruction of the bus since we hold a reference to it with
* this.
*/
int bus_fd;
};
/**
* @brief Initializes a device control.
*
* After a sucessful initialization the device control must be destroyed via
* i2c_dev_destroy(). A registered device control will be automatically
* destroyed in case the device file is unlinked. Make sure to call
* i2c_dev_destroy_and_free() in a custom destruction handler.
*
* @param[in] device The device control.
* @param[in] bus_path The path to the bus device file.
* @param[in] address The address of the device.
*
* @retval 0 Successful operation.
* @retval -1 An error occurred. The errno is set to indicate the error.
*
* @see i2c_dev_register()
*/
int i2c_dev_init(i2c_dev *dev, const char *bus_path, uint16_t address);
/**
* @brief Allocates a device control from the heap and initializes it.
*
* After a sucessful allocation and initialization the device control must be
* destroyed via i2c_dev_destroy_and_free(). A registered device control will
* be automatically destroyed in case the device file is unlinked. Make sure
* to call i2c_dev_destroy_and_free() in a custom destruction handler.
*
* @param[in] size The size of the device control. This enables the addition
* of device specific data to the base device control. The device control is
* zero initialized.
* @param[in] bus_path The path to the bus device file.
* @param[in] address The address of the device.
*
* @retval non-NULL The new device control.
* @retval NULL An error occurred. The errno is set to indicate the error.
*
* @see i2c_dev_register()
*/
i2c_dev *i2c_dev_alloc_and_init(
size_t size,
const char *bus_path,
uint16_t address
);
/**
* @brief Destroys a device control.
*
* @param[in] dev The device control.
*/
void i2c_dev_destroy(i2c_dev *dev);
/**
* @brief Destroys a device control and frees its memory.
*
* @param[in] dev The device control.
*/
void i2c_dev_destroy_and_free(i2c_dev *dev);
/**
* @brief Registers a device control.
*
* This function claims ownership of the device control regardless if the
* registration is successful or not.
*
* @param[in] dev The dev control.
* @param[in] dev_path The path to the device file of the device.
*
* @retval 0 Successful operation.
* @retval -1 An error occurred. The errno is set to indicate the error.
*/
int i2c_dev_register(
i2c_dev *dev,
const char *dev_path
);
/** @} */ /* end of i2c device driver */
/** @} */
#ifdef __cplusplus
}
#endif /* __cplusplus */
#endif /* _DEV_I2C_I2C_H */
cpukit/include/dev/i2c/sensor-lm75a.h
+125
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/**
* @file
*
* @brief Temperature Sensor LM75A Driver API
*
* @ingroup I2CSensorLM75A
*/
/*
* Copyright (c) 2017 embedded brains GmbH. All rights reserved.
*
* embedded brains GmbH
* Dornierstr. 4
* 82178 Puchheim
* Germany
* <rtems@embedded-brains.de>
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*/
#ifndef _DEV_I2C_SENSOR_LM75A_H
#define _DEV_I2C_SENSOR_LM75A_H
#include <dev/i2c/i2c.h>
#ifdef __cplusplus
extern "C" {
#endif /* __cplusplus */
/**
* @defgroup I2CSensorLM75A Temperature Sensor LM75A Driver
*
* @ingroup I2CDevice
*
* @brief Driver for NXP or Texas Instruments LM75A temperature sensor.
*
* @{
*/
int i2c_dev_register_sensor_lm75a(
const char *bus_path,
const char *dev_path,
uint16_t address
);
typedef enum {
SENSOR_LM75A_GET_CONF = I2C_DEV_IO_CONTROL,
SENSOR_LM75A_SET_CONF,
SENSOR_LM75A_CLEAR_AND_SET_CONF,
SENSOR_LM75A_GET_TEMP,
SENSOR_LM75A_GET_TOS,
SENSOR_LM75A_SET_TOS,
SENSOR_LM75A_GET_THYST,
SENSOR_LM75A_SET_THYST
} sensor_lm75a_command;
static inline int sensor_lm75a_get_conf(int fd, uint8_t *val)
{
return ioctl(fd, SENSOR_LM75A_GET_CONF, val);
}
static inline int sensor_lm75a_set_conf(int fd, uint8_t val)
{
return ioctl(fd, SENSOR_LM75A_SET_CONF, (void *)(uintptr_t) val);
}
static inline int sensor_lm75a_clear_and_set_conf(
int fd,
uint8_t clear,
uint8_t set
)
{
uint16_t clear_and_set = (uint16_t) (((uint16_t) set << 8) | clear);
return ioctl(
fd,
SENSOR_LM75A_CLEAR_AND_SET_CONF,
(void *)(uintptr_t) clear_and_set
);
}
static inline int sensor_lm75a_get_temp(int fd, int16_t *val)
{
return ioctl(fd, SENSOR_LM75A_GET_TEMP, val);
}
static inline int sensor_lm75a_get_temp_celsius(int fd, double *celsius)
{
int rv;
int16_t val;
rv = ioctl(fd, SENSOR_LM75A_GET_TEMP, &val);
*celsius = (((int) val) >> 5) * 0.125;
return rv;
}
static inline int sensor_lm75a_get_tos(int fd, uint16_t *val)
{
return ioctl(fd, SENSOR_LM75A_GET_TOS, val);
}
static inline int sensor_lm75a_set_tos(int fd, uint16_t val)
{
return ioctl(fd, SENSOR_LM75A_SET_TOS, (void *)(uintptr_t) val);
}
static inline int sensor_lm75a_get_thyst(int fd, uint16_t *val)
{
return ioctl(fd, SENSOR_LM75A_GET_THYST, val);
}
static inline int sensor_lm75a_set_thyst(int fd, uint16_t val)
{
return ioctl(fd, SENSOR_LM75A_SET_THYST, (void *)(uintptr_t) val);
}
/** @} */
#ifdef __cplusplus
}
#endif /* __cplusplus */
#endif /* _DEV_I2C_SENSOR_LM75A_H */
cpukit/include/dev/i2c/switch-nxp-pca9548a.h
+68
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/**
* @file
*
* @brief Switch NXP PCA9548A Driver API
*
* @ingroup I2CSWITCHNXPPCA9548A
*/
/*
* Copyright (c) 2014 embedded brains GmbH. All rights reserved.
*
* embedded brains GmbH
* Dornierstr. 4
* 82178 Puchheim
* Germany
* <rtems@embedded-brains.de>
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*/
#ifndef _DEV_I2C_SWITCH_NXP_PCA9548A_H
#define _DEV_I2C_SWITCH_NXP_PCA9548A_H
#include <dev/i2c/i2c.h>
#ifdef __cplusplus
extern "C" {
#endif /* __cplusplus */
/**
* @defgroup I2CSWITCHNXPPCA9548A Switch NXP PCA9535 Driver
*
* @ingroup I2CDevice
*
* @brief Driver for NXP PCA9548A 8-channel switch device.
*
* @{
*/
int i2c_dev_register_switch_nxp_pca9548a(
const char *bus_path,
const char *dev_path,
uint16_t address
);
#define SWITCH_NXP_PCA9548A_GET_CONTROL (I2C_DEV_IO_CONTROL + 0)
#define SWITCH_NXP_PCA9548A_SET_CONTROL (I2C_DEV_IO_CONTROL + 1)
static inline int switch_nxp_pca9548a_get_control(int fd, uint8_t *val)
{
return ioctl(fd, SWITCH_NXP_PCA9548A_GET_CONTROL, val);
}
static inline int switch_nxp_pca9548a_set_control(int fd, uint8_t val)
{
return ioctl(fd, SWITCH_NXP_PCA9548A_SET_CONTROL, (void *)(uintptr_t) val);
}
/** @} */
#ifdef __cplusplus
}
#endif /* __cplusplus */
#endif /* _DEV_I2C_SWITCH_NXP_PCA9548A_H */
cpukit/include/dev/i2c/ti-ads-16bit-adc.h
+203
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/*
* Copyright (c) 2016-2017 Chris Johns <chrisj@rtems.org>
* All rights reserved.
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*/
/*
* TI ADS1113 and ADS1115.
* http://www.ti.com/product/ads1113/description
*/
#ifndef TI_ADS1113_ADS1115_H
#define TI_ADS1113_ADS1115_H
#include <dev/i2c/i2c.h>
/*
* Supported devices. Please others once tested.
*/
typedef enum {
TI_ADS1113,
TI_ADS1114,
TI_ADS1115
} ti_ads_adc;
/*
* Multiplexer interface. Avalable on ADS1115.
*/
typedef enum {
TI_ADS_MUX_ApA0_AnA1 = 0, /* default */
TI_ADS_MUX_ApA0_AnA3 = 1,
TI_ADS_MUX_ApA1_AnA3 = 2,
TI_ADS_MUX_ApA2_AnA3 = 3,
TI_ADS_MUX_ApA0_AnGND = 4,
TI_ADS_MUX_ApA1_AnGND = 5,
TI_ADS_MUX_ApA2_AnGND = 6,
TI_ADS_MUX_ApA3_AnGND = 7
} ti_ads_adc_mux;
/*
* Programmable Gain Amplifier. Avalable on ADS1114 and ADS1115.
*/
typedef enum {
TI_ADS_PGA_FS_6_144V = 0,
TI_ADS_PGA_FS_4_096V = 1,
TI_ADS_PGA_FS_2_048V = 2, /* default */
TI_ADS_PGA_FS_1_024V = 3,
TI_ADS_PGA_FS_0_512V = 4,
TI_ADS_PGA_FS_0_256V = 5,
TI_ADS_PGA_FS_0_256V_2 = 6,
TI_ADS_PGA_FS_0_256V_3 = 7,
} ti_ads_adc_pga;
/*
* Mode.
*/
typedef enum {
TI_ADS_MODE_CONTINUOUS = 0,
TI_ADS_MODE_SINGLE_SHOT = 1, /* default */
} ti_ads_adc_mode;
/*
* Data rate.
*/
typedef enum {
TI_ADS_DATARATE_8SPS = 0,
TI_ADS_DATARATE_16SPS = 1,
TI_ADS_DATARATE_32SPS = 2,
TI_ADS_DATARATE_64SPS = 3,
TI_ADS_DATARATE_128SPS = 4, /* default */
TI_ADS_DATARATE_250SPS = 5,
TI_ADS_DATARATE_475SPS = 6,
TI_ADS_DATARATE_860SPS = 7,
} ti_ads_adc_data_rate;
/*
* Comparitor interface. Avalable on ADS1114 and ADS1115.
*
* Create a value to write.
*/
#define TI_ADS_COMP_MODE_HYSTERESIS (0 << 4) /* default */
#define TI_ADS_COMP_MODE_WINDOW (1 << 4)
#define TI_ADS_COMP_POL_ACTIVE_LOW (0 << 3) /* default */
#define TI_ADS_COMP_POL_ACTIVE_HIGH (1 << 3)
#define TI_ADS_COMP_LAT_NON_LATCHING (0 << 2) /* default */
#define TI_ADS_COMP_LAT_LATCHING (1 << 2)
#define TI_ADS_COMP_QUE_DISABLE_COMP (3 << 0) /* default */
#define TI_ADS_COMP_QUE_AFTER_4 (2 << 0)
#define TI_ADS_COMP_QUE_AFTER_2 (1 << 0)
#define TI_ADS_COMP_QUE_AFTER_1 (0 << 0)
/*
* IO control interface.
*
* Note: if in Power-down single-shot mode (default) a conversion requires the
* device to power up and perform a conversion and this can take
* while. The TI_ADS_ADC_GET_CONV_WAIT call sets the micro-seconds to
* wait between polls. The actual rate will depend on the system tick.
*/
#define TI_ADS_ADC_GET_CONVERSION (I2C_DEV_IO_CONTROL + 0)
#define TI_ADS_ADC_SET_MUX (I2C_DEV_IO_CONTROL + 1)
#define TI_ADS_ADC_SET_PGA (I2C_DEV_IO_CONTROL + 2)
#define TI_ADS_ADC_SET_MODE (I2C_DEV_IO_CONTROL + 3)
#define TI_ADS_ADC_SET_DATA_RATE (I2C_DEV_IO_CONTROL + 4)
#define TI_ADS_ADC_SET_COMP (I2C_DEV_IO_CONTROL + 5)
#define TI_ADS_ADC_SET_LO_THRESH (I2C_DEV_IO_CONTROL + 6)
#define TI_ADS_ADC_SET_HI_THRESH (I2C_DEV_IO_CONTROL + 7)
#define TI_ADS_ADC_SET_CONV_WAIT (I2C_DEV_IO_CONTROL + 8)
/*
* Register the device.
*/
int i2c_dev_register_ti_ads_adc(const char* bus_path,
const char* dev_path,
uint16_t address,
ti_ads_adc device);
/*
* Perform a conversion. If the mode is single shot a single shot conversion is
* started and the call waits for the conversion to complete.
*/
static inline int
ti_ads_adc_convert(int fd, uint16_t* sample)
{
return ioctl(fd, TI_ADS_ADC_GET_CONVERSION, sample);
}
/*
* Set the multipler.
*/
static inline int
ti_ads_adc_set_mux(int fd, ti_ads_adc_mux mux)
{
return ioctl(fd, TI_ADS_ADC_SET_MUX, (void *)(uintptr_t) mux);
}
/*
* Set the PGA.
*/
static inline int
ti_ads_adc_set_pga(int fd, ti_ads_adc_pga pga)
{
return ioctl(fd, TI_ADS_ADC_SET_PGA, (void *)(uintptr_t) pga);
}
/*
* Set the mode.
*/
static inline int
ti_ads_adc_set_mode(int fd, ti_ads_adc_mode mode)
{
return ioctl(fd, TI_ADS_ADC_SET_MODE, (void *)(uintptr_t) mode);
}
/*
* Set the data rate.
*/
static inline int
ti_ads_adc_set_data_rate(int fd, ti_ads_adc_data_rate rate)
{
return ioctl(fd, TI_ADS_ADC_SET_DATA_RATE, (void *)(uintptr_t) rate);
}
/*
* Configure the comparator.
*/
static inline int
ti_ads_adc_set_comparator(int fd, uint16_t comp)
{
return ioctl(fd, TI_ADS_ADC_SET_COMP, (void *)(uintptr_t) comp);
}
/*
* Set the lower threshold.
*/
static inline int
ti_ads_adc_set_low_threshold(int fd, uint16_t level)
{
return ioctl(fd, TI_ADS_ADC_SET_LO_THRESH, (void *)(uintptr_t) level);
}
/*
* Set the upper threshold.
*/
static inline int
ti_ads_adc_set_high_threshold(int fd, uint16_t level)
{
return ioctl(fd, TI_ADS_ADC_SET_HI_THRESH, (void *)(uintptr_t) level);
}
/*
* Set the conversion poll wait period.
*/
static inline int
ti_ads_adc_set_conversion_poll_wait(int fd, uint32_t micro_seconds)
{
return ioctl(fd, TI_ADS_ADC_SET_CONV_WAIT, (void *)(uintptr_t) micro_seconds);
}
#endif
cpukit/include/dev/i2c/ti-lm25066a.h
+190
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/*
* Copyright (c) 2016-2017 Chris Johns <chrisj@rtems.org>
* All rights reserved.
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*/
/*
* TI LM25066A
* http://www.ti.com/product/LM25066A
*/
#ifndef TI_LM25066A_H
#define TI_LM25066A_H
#include <dev/i2c/i2c.h>
/*
* PM Bus Command interface.
*
* The keys are:
* IO : IO direction R=read W=write
* SZ : Size in bytes.
*/
typedef enum
{ /* IO SZ Name */
TI_LM25066A_OPERATION = 0, /* R 1 PMBus */
TI_LM25066A_CLEAR_FAULTS = 1, /* W 0 PMBus */
TI_LM25066A_CAPABILITY = 2, /* R 1 PMBus */
TI_LM25066A_VOUT_UV_WARN_LIMIT = 3, /* RW 2 PMBus */
TI_LM25066A_OT_FAULT_LIMIT = 4, /* RW 2 PMBus */
TI_LM25066A_OT_WARN_LIMIT = 5, /* RW 2 PMBus */
TI_LM25066A_VIN_OV_WARN_LIMIT = 6, /* RW 2 PMBus */
TI_LM25066A_VIN_UV_WARN_LIMIT = 7, /* RW 2 PMBus */
TI_LM25066A_STATUS_BYTE = 8, /* R 1 PMBus */
TI_LM25066A_STATUS_WORD = 9, /* R 2 PMBus */
TI_LM25066A_STATUS_VOUT = 10, /* R 1 PMBus */
TI_LM25066A_STATUS_INPUT = 11, /* R 1 PMBus */
TI_LM25066A_STATUS_TEMPERATURE = 12, /* R 1 PMBus */
TI_LM25066A_STATUS_CML = 13, /* R 1 PMBus */
TI_LM25066A_STATUS_MFR_SPECIFIC = 14, /* R 1 PMBus */
TI_LM25066A_READ_VIN = 15, /* R 2 PMBus */
TI_LM25066A_READ_VOUT = 16, /* R 2 PMBus */
TI_LM25066A_READ_TEMPERATURE_1 = 17, /* R 2 PMBus */
TI_LM25066A_MFR_ID = 18, /* R 3 PMBus */
TI_LM25066A_MFR_MODEL = 19, /* R 8 PMBus */
TI_LM25066A_MFR_REVISION = 20, /* R 2 PMBus */
TI_LM25066A_MFR_READ_VAUX = 21, /* R 2 MFR_SPECIFIC_00 */
TI_LM25066A_MFR_READ_IIN = 22, /* R 2 MFR_SPECIFIC_01 */
TI_LM25066A_MFR_READ_PIN = 23, /* R 2 MFR_SPECIFIC_02 */
TI_LM25066A_MFR_IIN_OC_WARN_LIMIT = 24, /* RW 2 MFR_SPECIFIC_03 */
TI_LM25066A_MFR_PIN_OP_WARN_LIMIT = 25, /* RW 2 MFR_SPECIFIC_04 */
TI_LM25066A_MFR_PIN_PEAK = 26, /* R 2 MFR_SPECIFIC_05 */
TI_LM25066A_MFR_CLEAR_PIN_PEAK = 27, /* W 0 MFR_SPECIFIC_06 */
TI_LM25066A_MFR_GATE_MASK = 28, /* RW 1 MFR_SPECIFIC_07 */
TI_LM25066A_MFR_ALERT_MASK = 29, /* RW 2 MFR_SPECIFIC_08 */
TI_LM25066A_MFR_DEVICE_SETUP = 30, /* RW 1 MFR_SPECIFIC_09 */
TI_LM25066A_MFR_BLOCK_READ = 31, /* R 12 MFR_SPECIFIC_10 */
TI_LM25066A_MFR_SAMPLES_FOR_AVG = 32, /* RW 1 MFR_SPECIFIC_11 */
TI_LM25066A_MFR_READ_AVG_VIN = 33, /* R 2 MFR_SPECIFIC_12 */
TI_LM25066A_MFR_READ_AVG_VOUT = 34, /* R 2 MFR_SPECIFIC_13 */
TI_LM25066A_MFR_READ_AVG_IIN = 35, /* R 2 MFR_SPECIFIC_14 */
TI_LM25066A_MFR_READ_AVG_PIN = 36, /* R 2 MFR_SPECIFIC_15 */
TI_LM25066A_MFR_BLACK_BOX_READ = 37, /* R 12 MFR_SPECIFIC_16 */
TI_LM25066A_MFR_DIAGNOSTIC_WORD_READ = 38, /* R 2 MFR_SPECIFIC_17 */
TI_LM25066A_MFR_AVG_BLOCK_READ = 39, /* R 12 MFR_SPECIFIC_18 */
} ti_lm25066a_cmd;
/*
* Real world converters. Page 46 of the datasheet discusses reading and
* writing telemtry data and obtaining the real world values. There are 8
* separate conversions using the same formula.
*
* The formula is:
*
* 1 -R
* X = - (Y x 10 - b)
* m
*
* X: the calculated "real world" value (volts, amps, watt, etc.)
* m: the slope coefficient
* Y: a two byte two's complement integer received from device
* b: the offset, a two byte two's complement integer
* R: the exponent, a one byte two's complement integer
*
* R in the table is inverted because we cannot store 0.01 in an int. This
* makes the equation:
*
* 1 Y
* X = - (- - b)
* m R
*
* The R value lets the integer result have decimal places.
*
* There are 8 conversion table entries listed in Table 41 of the
* data sheet. They are:
*
* 1. READ_VIN, READ_AVG_VIN, VIN_OV_WARN_LIMIT, VIN_UV_WARN_LIMIT
* 2. READ_VOUT, READ_AVG_VOUT, VOUT_UV_WARN_LIMIT
* 3. READ_VAUX
* 4.GND READ_IIN, READ_AVG_IIN, MFR_IIN_OC_WARN_LIMIT
* 4.VDD READ_IIN, READ_AVG_IIN, MFR_IIN_OC_WARN_LIMIT
* 5.GND READ_PIN, READ_AVG_PIN, READ_PIN_PEAK, MFR_PIN_OP_WARN_LIMIT
* 5.VCC READ_PIN, READ_AVG_PIN, READ_PIN_PEAK, MFR_PIN_OP_WARN_LIMIT
* 6. READ_TEMPERATURE_1, OT_WARN_LIMIT, OT_FAULT_LIMIT
*
* You need to provide 6 sets of conversion factors. Row 4 and 5 depend on how
* the device is wired. The driver will use the matching table row to convert
* the 2-complement 12 bit to a real world value.
*/
#define TI_LM25066A_CONVERSION_SIZE (6)
typedef struct
{
int m; /* The slope coefficient */
int b; /* The offset */
int R; /* The inverted power of 10 of -R */
} ti_lm25066a_conversion;
/*
* IO control interface.
*/
#define TI_LM25066A_GET (I2C_DEV_IO_CONTROL + 0)
#define TI_LM25066A_SET (I2C_DEV_IO_CONTROL + 1)
/*
* IO data types.
*/
typedef enum
{
TI_LM25066A_8BIT = 0,
TI_LM25066A_16BIT = 1,
TI_LM25066A_VALUE = 2,
TI_LM25066A_VALUES = 3,
TI_LM25066A_STRING = 4,
TI_LM25066A_RAW = 5
} ti_lm25066a_data;
/*
* Struct to move data into and out of the driver.
*/
typedef struct
{
ti_lm25066a_cmd cmd;
ti_lm25066a_data type;
union {
uint8_t u8;
uint16_t u16;
int value;
int values[6];
char string[9];
uint8_t* raw;
} data;
} ti_lm25066a_io;
/*
* Register the device.
*
* The conversions table has 6 columns.
*
* The values are an integer so the decimal_point value scales the value so it
* can fit in an integer with the required number of decimal points.
*/
int i2c_dev_register_ti_lm25066a(const char* bus_path,
const char* dev_path,
uint16_t address,
const ti_lm25066a_conversion* const conversions,
const int decimal_points);
/*
* Get.
*/
static inline int
ti_lm25066a_get(int fd, ti_lm25066a_io* io)
{
return ioctl(fd, TI_LM25066A_GET, io);
}
/*
* Set.
*/
static inline int
ti_lm25066a_set(int fd, ti_lm25066a_io* io)
{
return ioctl(fd, TI_LM25066A_SET, io);
}
#endif
cpukit/include/dev/i2c/ti-tmp112.h
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/*
* Copyright (c) 2016-2017 Chris Johns <chrisj@rtems.org>
* All rights reserved.
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*/
/*
* TI TMP112
* http://www.ti.com/product/TMP112
*/
#ifndef TI_TMP112_H
#define TI_TMP112_H
#include <dev/i2c/i2c.h>
/*
* Confirguration.
*/
#define TI_TMP112_CR_0_25Hz (0 << 6)
#define TI_TMP112_CR_1Hz (1 << 6)
#define TI_TMP112_CR_4Hz (2 << 6) /* default */
#define TI_TMP112_CR_8Hz (3 << 6)
#define TI_TMP112_EM_NORMAL (0 << 4) /* default */
#define TI_TMP112_EM_EXTENDED (1 << 4)
#define TI_TMP112_SD_ON (0 << 8) /* default */
#define TI_TMP112_SD_SHUTDOWN (1 << 8)
#define TI_TMP112_TM_COMPARATOR (0 << 9) /* default */
#define TI_TMP112_TM_INTERRUPT (1 << 9)
#define TI_TMP112_POL_ALERT_LOW (0 << 10) /* default */
#define TI_TMP112_POL_ALERT_HIGH (1 << 10)
#define TI_TMP112_FQL_1 (0 << 11) /* default */
#define TI_TMP112_FQL_2 (1 << 11)
#define TI_TMP112_FQL_4 (2 << 11)
#define TI_TMP112_FQL_6 (3 << 11)
/*
* IO control interface.
*/
#define TI_TMP112_GET_TEMP (I2C_DEV_IO_CONTROL + 0)
#define TI_TMP112_GET_TEMP_RAW (I2C_DEV_IO_CONTROL + 1)
#define TI_TMP112_SET_CONFIG (I2C_DEV_IO_CONTROL + 2)
#define TI_TMP112_SET_LOW_TEMP (I2C_DEV_IO_CONTROL + 3)
#define TI_TMP112_SET_HIGH_TEMP (I2C_DEV_IO_CONTROL + 4)
/*
* Register the device.
*/
int i2c_dev_register_ti_tmp112(const char* bus_path,
const char* dev_path,
uint16_t address);
/*
* Get the temperature in degrees C x 10000. To print you would so:
*
* printf("Temperature is %3d.%04d\n", temp / 10000, temp % 10000);
*
* If the device is shutdown a single conversion is made waiting for the
* conversion to complete.
*/
static inline int
ti_tmp112_get_temperature(int fd, int* temp)
{
return ioctl(fd, TI_TMP112_GET_TEMP, temp);
}
/*
* Get the temperature as the raw register value.
*
* If the device is shutdown a single conversion is made waiting for the
* conversion to complete.
*/
static inline int
ti_tmp112_get_temperature_raw(int fd, unsigned int* temp)
{
return ioctl(fd, TI_TMP112_GET_TEMP_RAW, temp);
}
/*
* Set the configuration.
*/
static inline int
ti_tmp112_adc_set_config(int fd, uint16_t config)
{
return ioctl(fd, TI_TMP112_SET_CONFIG, (void *)(uintptr_t) config);
}
/*
* Set the low temperature.
*/
static inline int
ti_tmp112_set_low_temperator(int fd, uint16_t temp)
{
return ioctl(fd, TI_TMP112_SET_LOW_TEMP, (void *)(uintptr_t) temp);
}
/*
* Set the high temperature.
*/
static inline int
ti_tmp112_adc_set_high_threshold(int fd, uint16_t level)
{
return ioctl(fd, TI_TMP112_SET_HIGH_TEMP, (void *)(uintptr_t) level);
}
#endif
cpukit/include/dev/i2c/xilinx-axi-i2c.h
+86
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/*
* Copyright (c) 2016-2017 Chris Johns <chrisj@rtems.org> All rights reserved.
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*/
/*
* Xilinx AXI IIC Interface v2.0. See PG090.pdf.
*
* Note, only master support is provided and no dynamic mode by design.
*
* The clock set up is to be handled by the IP integrator. There are too many
* factors handling this in software.
*/
#ifndef XILINX_AXI_I2C_H
#define XILINX_AXI_I2C_H
#include <dev/i2c/i2c.h>
/*
* The PL integrator controls the timing. This interface allows software to
* override those settings. It pays to check the timing with ChipScope.
*
* If you set the AXI bus frequency you can use the clock speed ioctl call to
* change the speed dymanically. The ioctl call overrides the defaults passed
* in.
*
* Set the valid mask to the values that are to be set.
*/
#define XILINX_AIX_I2C_AXI_CLOCK (1 << 0)
#define XILINX_AIX_I2C_TSUSTA (1 << 1)
#define XILINX_AIX_I2C_TSUSTO (1 << 2)
#define XILINX_AIX_I2C_THDSTA (1 << 3)
#define XILINX_AIX_I2C_TSUDAT (1 << 4)
#define XILINX_AIX_I2C_TBUF (1 << 5)
#define XILINX_AIX_I2C_THIGH (1 << 6)
#define XILINX_AIX_I2C_TLOW (1 << 7)
#define XILINX_AIX_I2C_THDDAT (1 << 8)
#define XILINX_AIX_I2C_ALL_REGS (XILINX_AIX_I2C_TSUSTA | \
XILINX_AIX_I2C_TSUSTO | \
XILINX_AIX_I2C_THDSTA | \
XILINX_AIX_I2C_TSUDAT | \
XILINX_AIX_I2C_TBUF | \
XILINX_AIX_I2C_THIGH | \
XILINX_AIX_I2C_TLOW | \
XILINX_AIX_I2C_THDDAT)
typedef struct
{
uint32_t valid_mask;
uint32_t AXI_CLOCK;
uint32_t SCL_INERTIAL_DELAY;
uint32_t TSUSTA;
uint32_t TSUSTO;
uint32_t THDSTA;
uint32_t TSUDAT;
uint32_t TBUF;
uint32_t THIGH;
uint32_t TLOW;
uint32_t THDDAT;
} xilinx_aix_i2c_timing;
/*
* Register the driver.
*
* The driver can multipex a number of I2C buses (in master mode only) using
* the GPO port. The PL designer can use the output pins to select a bus. This
* is useful if connecting a number of slave devices that have limit selectable
* addresses.
*
* @param bus_path The driver's device path.
* @param register_base AXI base address.
* @param irq AXI FPGA interrupt.
* @param gpio_address Bits 12:15 of a slave address it written to the GPO.
* @param timing Override the default timing. NULL means no changes.
*/
int i2c_bus_register_xilinx_aix_i2c(const char* bus_path,
uintptr_t register_base,
rtems_vector_number irq,
bool ten_gpio,
const xilinx_aix_i2c_timing* timing);
#endif
cpukit/include/dev/serial/sc16is752.h
+262
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/*
* Copyright (c) 2016 embedded brains GmbH. All rights reserved.
*
* embedded brains GmbH
* Dornierstr. 4
* 82178 Puchheim
* Germany
* <info@embedded-brains.de>
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*/
#ifndef _DEV_SERIAL_SC16IS752_H
#define _DEV_SERIAL_SC16IS752_H
#include <sys/ioccom.h>
#include <rtems/termiostypes.h>
#ifdef __cplusplus
extern "C" {
#endif /* __cplusplus */
/**
* @defgroup SC16IS752 SC16IS752 Serial Device Driver
*
* @ingroup TermiostypesSupport
*/
typedef enum {
SC16IS752_MODE_RS232,
SC16IS752_MODE_RS485
} sc16is752_mode;
typedef struct sc16is752_context sc16is752_context;
/**
* @brief SC16IS752 device context.
*/
struct sc16is752_context {
rtems_termios_device_context base;
/**
* @brief Writes a register.
*
* Internal handler.
*/
int (*write_reg)(
sc16is752_context *ctx,
uint8_t addr,
const uint8_t *data,
size_t len
);
/**
* @brief Reads a register.
*
* Internal handler.
*/
int (*read_reg)(
sc16is752_context *ctx,
uint8_t addr,
uint8_t *data,
size_t len
);
/**
* @brief Reads two registers.
*
* Internal handler.
*/
int (*read_2_reg)(
sc16is752_context *ctx,
uint8_t addr_0,
uint8_t addr_1,
uint8_t data[2]
);
/**
* @brief First open.
*
* Internal handler.
*/
bool (*first_open)(sc16is752_context *ctx);
/**
* @brief Last close.
*
* Internal handler.
*/
void (*last_close)(sc16is752_context *ctx);
/**
* @brief Shall install the interrupt handler.
*
* Must be initialized by the user before the device creation.
*/
bool (*install_irq)(sc16is752_context *ctx);
/**
* @brief Shall remove the interrupt handler.
*
* Must be initialized by the user before the device creation.
*/
void (*remove_irq)(sc16is752_context *ctx);
/**
* @brief Device mode.
*
* Must be initialized by the user before the device creation.
*/
sc16is752_mode mode;
/**
* @brief Input frequency in Hertz (dependent on crystal, see XTAL1 and XTAL2
* pins).
*
* Must be initialized by the user before the device creation.
*/
uint32_t input_frequency;
/**
* @brief Corresponding Termios structure.
*
* Internal variable.
*/
rtems_termios_tty *tty;
/**
* @brief Shadow Interrupt Enable Register (IER).
*
* Internal variable.
*/
uint8_t ier;
/**
* @brief Characters placed into transmit FIFO.
*
* Internal variable.
*/
uint8_t tx_in_progress;
/**
* @brief Count of free characters in the transmit FIFO.
*
* Internal variable.
*/
uint8_t tx_fifo_free;
/**
* @brief Shadow Line Control Register (LCR).
*
* Internal variable.
*/
uint8_t lcr;
/**
* @brief Shadow Extra Features Control Register (EFCR).
*
* Internal variable.
*/
uint8_t efcr;
};
/**
* @brief SC16IS752 SPI context.
*/
typedef struct {
sc16is752_context base;
/**
* @brief The SPI bus device file descriptor.
*
* Internal variable.
*/
int fd;
/**
* @brief The SPI device chip select.
*
* Must be initialized by the user before the call to sc16is752_spi_create().
*/
uint8_t cs;
/**
* @brief The SPI bus speed in Hertz.
*
* Must be initialized by the user before the call to sc16is752_spi_create().
*/
uint32_t speed_hz;
/**
* @brief The SPI bus device path.
*
* Must be initialized by the user before the call to sc16is752_spi_create().
*/
const char *spi_path;
} sc16is752_spi_context;
/**
* @brief SC16IS752 I2C context.
*/
typedef struct {
sc16is752_context base;
/**
* @brief The I2C bus device file descriptor.
*
* Internal variable.
*/
int fd;
/**
* @brief The I2C bus device path.
*
* Must be initialized before the call to sc16is752_i2c_create().
*/
const char *bus_path;
} sc16is752_i2c_context;
const rtems_termios_device_handler sc16is752_termios_handler;
/**
* @brief The interrupt handler for receive and transmit operations.
*
* @param[in] arg The device context.
*/
void sc16is752_interrupt_handler(void *arg);
/**
* @brief Creates an SPI connected SC16IS752 device.
*
* @param[in] ctx The SPI SC16IS752 device context.
* @param[in] device_path The device file path for the new device.
*
* @retval RTEMS_SUCCESSFUL Successful operation.
* @retval other See rtems_termios_device_install().
*/
rtems_status_code sc16is752_spi_create(
sc16is752_spi_context *ctx,
const char *device_path
);
/**
* @brief Enables the sleep mode if non-zero, otherwise disables it.
*
* The sleep mode is disabled by default.
*/
#define SC16IS752_SET_SLEEP_MODE _IOW('d', 0, int)
/**
* @brief Returns non-zero in case the sleep mode is enabled, otherwise zero.
*/
#define SC16IS752_GET_SLEEP_MODE _IOR('d', 0, int)
#ifdef __cplusplus
}
#endif /* __cplusplus */
#endif /* _DEV_SERIAL_SC16IS752_H */
cpukit/include/dev/spi/spi.h
+216
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/**
* @file
*
* @brief Serial Peripheral Interface (SPI) Driver API
*
* @ingroup SPI
*/
/*
* Copyright (c) 2016 embedded brains GmbH. All rights reserved.
*
* embedded brains GmbH
* Dornierstr. 4
* 82178 Puchheim
* Germany
* <rtems@embedded-brains.de>
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*/
#ifndef _DEV_SPI_SPI_H
#define _DEV_SPI_SPI_H
#include <linux/spi/spidev.h>
#include <rtems.h>
#include <rtems/seterr.h>
#ifdef __cplusplus
extern "C" {
#endif /* __cplusplus */
typedef struct spi_ioc_transfer spi_ioc_transfer;
typedef struct spi_bus spi_bus;
/**
* @defgroup SPI Serial Peripheral Interface (SPI) Driver
*
* @brief Serial Peripheral Interface (SPI) bus driver support.
*
* @{
*/
/**
* @brief Obtains the bus.
*
* This command has no argument.
*/
#define SPI_BUS_OBTAIN _IO(SPI_IOC_MAGIC, 13)
/**
* @brief Releases the bus.
*
* This command has no argument.
*/
#define SPI_BUS_RELEASE _IO(SPI_IOC_MAGIC, 23)
/**
* @brief SPI bus control.
*/
struct spi_bus {
/**
* @brief Transfers SPI messages.
*
* @param[in] bus The bus control.
* @param[in] msgs The messages to transfer.
* @param[in] msg_count The count of messages to transfer. It must be
* positive.
*
* @retval 0 Successful operation.
* @retval negative Negative error number in case of an error.
*/
int (*transfer)(spi_bus *bus, const spi_ioc_transfer *msgs, uint32_t msg_count);
/**
* @brief Checks if maximum speed and bits per word are in a valid range
* for the device
*
* @param[in] bus The bus control.
*
* @retval 0 Successful operation.
* @retval negative Negative error number in case of an error.
*/
int (*setup)(spi_bus *bus);
/**
* @brief Destroys the bus.
*
* @param[in] bus The bus control.
*/
void (*destroy)(spi_bus *bus);
/**
* @brief Mutex to protect the bus access.
*/
rtems_id mutex;
/**
* @brief Maximum Speed in Hz
*/
uint32_t max_speed_hz;
/**
* @brief Indicates the speed of the current device message.
*/
uint32_t speed_hz;
/**
* @brief Indicates if chip select must be set high after transfer.
*/
bool cs_change;
/**
* @brief Indicates which device is selected by chip select
*/
uint8_t cs;
/**
* @brief Indicates the bits per word used on the device.
*/
uint8_t bits_per_word;
/**
* @brief Indicates if LSB is supposed to be transmitted first.
*/
bool lsb_first;
/**
* @brief Current mode.
*/
uint32_t mode;
/**
* @brief Indicates the delay between transfers on different chip select
* devices.
*/
uint16_t delay_usecs;
};
/**
* @brief Initializes a bus control.
*
* After a sucessful initialization the bus control must be destroyed via
* spi_bus_destroy(). A registered bus control will be automatically destroyed
* in case the device file is unlinked. Make sure to call spi_bus_destroy() in
* a custom destruction handler.
*
* @param[in] bus The bus control.
*
* @retval 0 Successful operation.
* @retval -1 An error occurred. The errno is set to indicate the error.
*
* @see spi_bus_register()
*/
int spi_bus_init(spi_bus *bus);
/**
* @brief Allocates a bus control from the heap and initializes it.
*
* After a sucessful allocation and initialization the bus control must be
* destroyed via spi_bus_destroy_and_free(). A registered bus control will be
* automatically destroyed in case the device file is unlinked. Make sure to
* call spi_bus_destroy_and_free() in a custom destruction handler.
*
* @param[in] size The size of the bus control. This enables the addition of
* bus controller specific data to the base bus control. The bus control is
* zero initialized.
*
* @retval non-NULL The new bus control.
* @retval NULL An error occurred. The errno is set to indicate the error.
*
* @see spi_bus_register()
*/
spi_bus *spi_bus_alloc_and_init(size_t size);
/**
* @brief Destroys a bus control.
*
* @param[in] bus The bus control.
*/
void spi_bus_destroy(spi_bus *bus);
/**
* @brief Destroys a bus control and frees its memory.
*
* @param[in] bus The bus control.
*/
void spi_bus_destroy_and_free(spi_bus *bus);
/**
* @brief Registers a bus control.
*
* This function claims ownership of the bus control regardless if the
* registration is successful or not.
*
* @param[in] bus The bus control.
* @param[in] bus_path The path to the bus device file.
*
* @retval 0 Successful operation.
* @retval -1 An error occurred. The errno is set to indicate the error.
*/
int spi_bus_register(
spi_bus *bus,
const char *bus_path
);
/** @} */
#ifdef __cplusplus
}
#endif /* __cplusplus */
#endif /* _DEV_SPI_SPI_H */
cpukit/include/dlfcn.h
+112
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/* $NetBSD: dlfcn.h,v 1.21 2010/01/07 07:35:35 skrll Exp $ */
/*-
* Copyright (c) 1998 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Paul Kranenburg.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _DLFCN_H_
#define _DLFCN_H_
//#include <sys/featuretest.h>
#include <sys/cdefs.h>
#if defined(_NETBSD_SOURCE)
typedef struct _dl_info {
const char *dli_fname; /* File defining the symbol */
void *dli_fbase; /* Base address */
const char *dli_sname; /* Symbol name */
const void *dli_saddr; /* Symbol address */
} Dl_info;
#endif /* defined(_NETBSD_SOURCE) */
/*
* User interface to the run-time linker.
*/
__BEGIN_DECLS
void *dlopen(const char *, int);
int dlclose(void *);
void *dlsym(void * __restrict, const char * __restrict);
#if defined(_NETBSD_SOURCE)
int dladdr(void * __restrict, Dl_info * __restrict);
int dlctl(void *, int, void *);
#endif
int dlinfo(void *, int, void *);
const char *dlerror(void);
__END_DECLS
/* Values for dlopen `mode'. */
#define RTLD_LAZY 1
#define RTLD_NOW 2
#define RTLD_GLOBAL 0x100 /* Allow global searches in object */
#define RTLD_LOCAL 0x200
#if defined(_NETBSD_SOURCE)
#define DL_LAZY RTLD_LAZY /* Compat */
#endif
/*
* Special handle arguments for dlsym().
*/
#define RTLD_NEXT ((void *) -1) /* Search subsequent objects. */
#define RTLD_DEFAULT ((void *) -2) /* Use default search algorithm. */
#define RTLD_SELF ((void *) -3) /* Search the caller itself. */
/*
* dlctl() commands
*/
#if defined(_NETBSD_SOURCE)
#define DL_GETERRNO 1
#define DL_GETSYMBOL 2
#if 0
#define DL_SETSRCHPATH x
#define DL_GETLIST x
#define DL_GETREFCNT x
#define DL_GETLOADADDR x
#endif /* 0 */
#endif /* defined(_NETBSD_SOURCE) */
/*
* dlinfo() commands
*
* From Solaris: http://docs.sun.com/app/docs/doc/816-5168/dlinfo-3c?a=view
*/
#define RTLD_DI_UNRESOLVED 10
#if defined(_NETBSD_SOURCE)
#define RTLD_DI_LINKMAP 3
#if 0
#define RTLD_DI_ARGSINFO 1
#define RTLD_DI_CONFIGADDR 2
#define RTLD_DI_LMID 4
#define RTLD_DI_SERINFO 5
#define RTLD_DI_SERINFOSIZE 6
#define RTLD_DI_ORIGIN 7
#define RTLD_DI_GETSIGNAL 8
#define RTLD_DI_SETSIGNAL 9
#endif
#endif /* _NETBSD_SOURCE */
#endif /* !defined(_DLFCN_H_) */
cpukit/include/drvmgr/drvmgr.h
+988
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cpukit/include/drvmgr/drvmgr_confdefs.h
+258
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@@ -0,0 +1,258 @@
/* Driver Manager Configuration file.
*
* COPYRIGHT (c) 2009 Cobham Gaisler AB.
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*/
/*
* The configuration consist of an array with function pointers that
* register one or more drivers that will be used by the Driver Manger.
*
* The Functions are called in the order they are declared.
*
*/
#ifndef _DRIVER_MANAGER_CONFDEFS_H_
#define _DRIVER_MANAGER_CONFDEFS_H_
#include "drvmgr.h"
#ifdef __cplusplus
extern "C" {
#endif
extern drvmgr_drv_reg_func drvmgr_drivers[];
#ifdef CONFIGURE_INIT
/*** AMBA Plug & Play Drivers ***/
extern void gptimer_register_drv(void);
extern void apbuart_cons_register_drv(void);
extern void greth_register_drv(void);
extern void grspw_register_drv(void);
extern void grspw2_register_drv(void);
extern void grcan_register_drv(void);
extern void occan_register_drv(void);
extern void gr1553_register(void);
extern void gr1553bc_register(void);
extern void gr1553bm_register(void);
extern void gr1553rt_register(void);
extern void b1553brm_register_drv(void);
extern void b1553rt_register_drv(void);
extern void grtm_register_drv(void);
extern void grtc_register_drv(void);
extern void pcif_register_drv(void);
extern void grpci_register_drv(void);
extern void mctrl_register_drv(void);
extern void l2cache_register_drv(void);
extern void griommu_register_drv(void);
extern void grpci2_register_drv(void);
extern void spictrl_register_drv(void);
extern void i2cmst_register_drv(void);
extern void grgpio_register_drv(void);
extern void grpwm_register_drv(void);
extern void gradcdac_register_drv(void);
extern void spwcuc_register(void);
extern void grctm_register(void);
extern void router_register_drv(void);
extern void ahbstat_register_drv(void);
extern void memscrub_register_drv(void);
extern void l4stat_register_drv(void);
/*** LEON2 AMBA Hard coded bus Drivers ***/
extern void at697pci_register_drv(void);
extern void ambapp_leon2_register(void);
/*** PCI Bus Drivers (PCI Target drivers) ***/
extern void gr_rasta_adcdac_register_drv(void);
extern void gr_rasta_io_register_drv(void);
extern void gr_rasta_tmtc_register_drv(void);
extern void gr701_register_drv(void);
extern void gr_tmtc_1553_register_drv(void);
extern void gr_rasta_spw_router_register_drv(void);
extern void gr_cpci_leon4_n2x_register_drv(void);
extern void gr_cpci_gr740_register_drv(void);
/* CONFIGURE DRIVER MANAGER */
drvmgr_drv_reg_func drvmgr_drivers[] = {
/*** AMBA Plug & Play Drivers ***/
#ifdef CONFIGURE_DRIVER_AMBAPP_GAISLER_GPTIMER
gptimer_register_drv,
#endif
#ifdef CONFIGURE_DRIVER_AMBAPP_GAISLER_APBUART
apbuart_cons_register_drv,
#endif
#ifdef CONFIGURE_DRIVER_AMBAPP_GAISLER_GRETH
greth_register_drv,
#endif
#ifdef CONFIGURE_DRIVER_AMBAPP_GAISLER_GRSPW
grspw_register_drv,
#endif
#ifdef CONFIGURE_DRIVER_AMBAPP_GAISLER_GRSPW2
grspw2_register_drv,
#endif
#ifdef CONFIGURE_DRIVER_AMBAPP_GAISLER_GRCAN
grcan_register_drv,
#endif
#ifdef CONFIGURE_DRIVER_AMBAPP_GAISLER_OCCAN
occan_register_drv,
#endif
#ifdef CONFIGURE_DRIVER_AMBAPP_GAISLER_GR1553B
gr1553_register,
#endif
#ifdef CONFIGURE_DRIVER_AMBAPP_GAISLER_GR1553BC
gr1553bc_register,
#endif
#ifdef CONFIGURE_DRIVER_AMBAPP_GAISLER_GR1553BM
gr1553bm_register,
#endif
#ifdef CONFIGURE_DRIVER_AMBAPP_GAISLER_GR1553RT
gr1553rt_register,
#endif
#ifdef CONFIGURE_DRIVER_AMBAPP_GAISLER_B1553BRM
b1553brm_register_drv,
#endif
#ifdef CONFIGURE_DRIVER_AMBAPP_GAISLER_B1553RT
b1553rt_register_drv,
#endif
#ifdef CONFIGURE_DRIVER_AMBAPP_GAISLER_GRTM
grtm_register_drv,
#endif
#ifdef CONFIGURE_DRIVER_AMBAPP_GAISLER_GRTC
grtc_register_drv,
#endif
#ifdef CONFIGURE_DRIVER_AMBAPP_GAISLER_PCIF
pcif_register_drv,
#endif
#ifdef CONFIGURE_DRIVER_AMBAPP_GAISLER_GRPCI
grpci_register_drv,
#endif
#ifdef CONFIGURE_DRIVER_AMBAPP_GAISLER_GRPCI2
grpci2_register_drv,
#endif
#ifdef CONFIGURE_DRIVER_AMBAPP_MCTRL
mctrl_register_drv,
#endif
#ifdef CONFIGURE_DRIVER_AMBAPP_GAISLER_L2CACHE
l2cache_register_drv,
#endif
#ifdef CONFIGURE_DRIVER_AMBAPP_GAISLER_GRIOMMU
griommu_register_drv,
#endif
#ifdef CONFIGURE_DRIVER_AMBAPP_GAISLER_SPICTRL
spictrl_register_drv,
#endif
#ifdef CONFIGURE_DRIVER_AMBAPP_GAISLER_I2CMST
i2cmst_register_drv,
#endif
#ifdef CONFIGURE_DRIVER_AMBAPP_GAISLER_GRGPIO
grgpio_register_drv,
#endif
#ifdef CONFIGURE_DRIVER_AMBAPP_GAISLER_GRPWM
grpwm_register_drv,
#endif
#ifdef CONFIGURE_DRIVER_AMBAPP_GAISLER_GRADCDAC
gradcdac_register_drv,
#endif
#ifdef CONFIGURE_DRIVER_AMBAPP_GAISLER_SPWCUC
spwcuc_register,
#endif
#ifdef CONFIGURE_DRIVER_AMBAPP_GAISLER_GRCTM
grctm_register,
#endif
#ifdef CONFIGURE_DRIVER_AMBAPP_GAISLER_SPW_ROUTER
router_register_drv,
#endif
#ifdef CONFIGURE_DRIVER_AMBAPP_GAISLER_AHBSTAT
ahbstat_register_drv,
#endif
#ifdef CONFIGURE_DRIVER_AMBAPP_GAISLER_MEMSCRUB
memscrub_register_drv,
#endif
#ifdef CONFIGURE_DRIVER_AMBAPP_GAISLER_L4STAT
l4stat_register_drv,
#endif
/*** LEON2 AMBA Drivers ***/
#ifdef CONFIGURE_DRIVER_LEON2_AT697PCI
at697pci_register_drv,
#endif
#ifdef CONFIGURE_DRIVER_LEON2_AMBAPP
ambapp_leon2_register,
#endif
/*** PCI Target Drivers ***/
#ifdef CONFIGURE_DRIVER_PCI_GR_RASTA_ADCDAC
gr_rasta_adcdac_register_drv,
#endif
#ifdef CONFIGURE_DRIVER_PCI_GR_RASTA_IO
gr_rasta_io_register_drv,
#endif
#ifdef CONFIGURE_DRIVER_PCI_GR_RASTA_TMTC
gr_rasta_tmtc_register_drv,
#endif
#ifdef CONFIGURE_DRIVER_PCI_GR_701
gr701_register_drv,
#endif
#ifdef CONFIGURE_DRIVER_PCI_GR_TMTC_1553
gr_tmtc_1553_register_drv,
#endif
#ifdef CONFIGURE_DRIVER_PCI_GR_RASTA_SPW_ROUTER
gr_rasta_spw_router_register_drv,
#endif
#ifdef CONFIGURE_DRIVER_PCI_GR_LEON4_N2X
gr_cpci_leon4_n2x_register_drv,
#endif
#ifdef CONFIGURE_DRIVER_PCI_GR_CPCI_GR740
gr_cpci_gr740_register_drv,
#endif
/* Macros for adding custom drivers without needing to recompile
* kernel.
*/
#ifdef CONFIGURE_DRIVER_CUSTOM1
DRIVER_CUSTOM1_REG,
#endif
#ifdef CONFIGURE_DRIVER_CUSTOM2
DRIVER_CUSTOM2_REG,
#endif
#ifdef CONFIGURE_DRIVER_CUSTOM3
DRIVER_CUSTOM3_REG,
#endif
#ifdef CONFIGURE_DRIVER_CUSTOM4
DRIVER_CUSTOM4_REG,
#endif
#ifdef CONFIGURE_DRIVER_CUSTOM5
DRIVER_CUSTOM5_REG,
#endif
#ifdef CONFIGURE_DRIVER_CUSTOM6
DRIVER_CUSTOM6_REG,
#endif
#ifdef CONFIGURE_DRIVER_CUSTOM7
DRIVER_CUSTOM7_REG,
#endif
#ifdef CONFIGURE_DRIVER_CUSTOM8
DRIVER_CUSTOM8_REG,
#endif
#ifdef CONFIGURE_DRIVER_CUSTOM9
DRIVER_CUSTOM9_REG,
#endif
/* End array with NULL */
NULL
};
#endif /* CONFIGURE_INIT */
#ifdef __cplusplus
}
#endif
#endif /* _DRIVER_MANAGER_CONFDEFS_H_ */
cpukit/include/drvmgr/drvmgr_list.h
+78
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@@ -0,0 +1,78 @@
/* Linked list help functions used by driver manager.
*
* COPYRIGHT (c) 2009 Cobham Gaisler AB.
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*/
/*
* Help functions for the Driver Manager. Implements a singly linked list
* with head and tail pointers for fast insertions/deletions to head and
* tail in list.
*/
#ifndef _DRVIVER_MANAGER_LIST_H_
#define _DRVIVER_MANAGER_LIST_H_
#ifdef __cplusplus
extern "C" {
#endif
/*! List description, Singly link list with head and tail pointers. */
struct drvmgr_list {
void *head; /*!< First entry in queue */
void *tail; /*!< Last entry in queue */
int ofs; /*!< Offset into head and tail to find next field */
};
/* Static initialization of list */
#define LIST_INITIALIZER(type, field) {NULL, NULL, offsetof(type, field)}
/* Return the first element in list */
#define LIST_HEAD(list, type) ((type *)(list)->head)
/* Return the last element in list */
#define LIST_TAIL(list, type) ((type *)(list)->tail)
/* Get the next pointer of an entry */
#define LIST_FIELD(list, entry) (*(void **)((char *)(entry) + (list)->ofs))
/* Return the next emlement in list */
#define LIST_NEXT(list, entry, type) ((type *)(LIST_FIELD(list, entry)))
/* Iterate through all entries in list */
#define LIST_FOR_EACH(list, entry, type) \
for (entry = LIST_HEAD(list, type); \
entry; \
entry = LIST_NEXT(list, entry, type))
/*! Initialize a list during runtime
*
* \param list The list to initialize
* \param offset The number of bytes into the entry structure the next pointer
* is found
*/
extern void drvmgr_list_init(struct drvmgr_list *list, int offset);
/*! Clear list */
extern void drvmgr_list_empty(struct drvmgr_list *list);
/*! Add entry to front of list */
extern void drvmgr_list_add_head(struct drvmgr_list *list, void *entry);
/*! Add entry to end of list */
extern void drvmgr_list_add_tail(struct drvmgr_list *list, void *entry);
/*! Remove entry from front of list */
extern void drvmgr_list_remove_head(struct drvmgr_list *list);
/*! Remove entry from anywhere in list */
extern void drvmgr_list_remove(struct drvmgr_list *list, void *entry);
#ifdef __cplusplus
}
#endif
#endif
cpukit/include/drvmgr/pci_bus.h
+161
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@@ -0,0 +1,161 @@
/* PCI bus driver Interface.
*
* COPYRIGHT (c) 2008 Cobham Gaisler AB.
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*
*/
/* General part of drvmgr PCI Bus driver. The driver is typically
* initialized from the PCI host driver separating the host
* driver from the common parts in PCI drivers.
* The PCI library must be initialized before starting the
* PCI bus driver. The PCI library have set up BARs and
* assigned system IRQs for targets.
* This PCI bus driver rely on the PCI library (pci.c) for
* interrupt registeration (pci_interrupt_register) and PCI
* target set up.
*/
#ifndef __PCI_BUS_H__
#define __PCI_BUS_H__
#include <drvmgr/drvmgr.h>
#include <pci.h>
#include <pci/access.h>
#ifdef __cplusplus
extern "C" {
#endif
/* PCI Driver ID generation (VENDOR: 16-bit, DEVICE: 16-bit) */
#define DRIVER_PCI_ID(vendor, device) \
DRIVER_ID(DRVMGR_BUS_TYPE_PCI, \
((((vendor) & 0xffff) << 16) | ((device) & 0xffff)))
/* PCI Driver ID generation (CLASS: 24-bit) */
#define DRIVER_PCI_CLASS(class) \
DRIVER_ID(DRVMGR_BUS_TYPE_PCI, ((1 << 32) | ((class) & 0xffffff)))
/* PCI driver IDs (DRIVER_PCI_VENDOR_DEVICE or DRIVER_PCI_CLASS_NAME) */
#define DRIVER_PCI_GAISLER_RASTAIO_ID DRIVER_PCI_ID(PCIID_VENDOR_GAISLER, PCIID_DEVICE_GR_RASTA_IO)
#define DRIVER_PCI_GAISLER_RASTATMTC_ID DRIVER_PCI_ID(PCIID_VENDOR_GAISLER, PCIID_DEVICE_GR_RASTA_TMTC)
#define DRIVER_PCI_GAISLER_GR701_ID DRIVER_PCI_ID(PCIID_VENDOR_GAISLER, PCIID_DEVICE_GR_701)
#define DRIVER_PCI_GAISLER_RASTAADCDAC_ID DRIVER_PCI_ID(PCIID_VENDOR_GAISLER, PCIID_DEVICE_GR_RASTA_ADCDAC)
#define DRIVER_PCI_GAISLER_TMTC_1553_ID DRIVER_PCI_ID(PCIID_VENDOR_GAISLER, PCIID_DEVICE_GR_TMTC_1553)
#define DRIVER_PCI_GAISLER_RASTA_SPW_ROUTER_ID DRIVER_PCI_ID(PCIID_VENDOR_GAISLER, PCIID_DEVICE_GR_RASTA_SPW_RTR)
#define DRIVER_PCI_GAISLER_LEON4_N2X_ID DRIVER_PCI_ID(PCIID_VENDOR_GAISLER, PCIID_DEVICE_GR_LEON4_N2X)
#define DRIVER_PCI_GAISLER_CPCI_GR740_ID DRIVER_PCI_ID(PCIID_VENDOR_GAISLER, PCIID_DEVICE_GR_CPCI_GR740)
struct pci_dev_id {
uint16_t vendor;
uint16_t device;
uint16_t subvendor;
uint16_t subdevice;
uint32_t class; /* 24 lower bits */
};
struct pci_dev_id_match {
uint16_t vendor;
uint16_t device;
uint16_t subvendor;
uint16_t subdevice;
uint32_t class; /* 24 lower bits */
uint32_t class_mask; /* 24 lower bits */
};
#define PCIID_DEVVEND(vendor, device) \
{vendor, device, PCI_ID_ANY, PCI_ID_ANY, 0, 0}
#define PCIID_END_TABLE {0, 0, 0, 0, 0, 0}
enum {
/* A Device has up to 6 BARs and an optional ROM BAR */
PCIDEV_RES_BAR1 = 0,
PCIDEV_RES_BAR2 = 1,
PCIDEV_RES_BAR3 = 2,
PCIDEV_RES_BAR4 = 3,
PCIDEV_RES_BAR5 = 4,
PCIDEV_RES_BAR6 = 5,
PCIDEV_RES_ROM = 6,
};
/* Maximum Number of Resources of a device */
#define PCIDEV_RES_CNT (PCIDEV_RES_ROM + 1)
/* IO, MEMIO or MEM resource. Can be BAR, ROM or Bridge Window */
struct pcibus_res {
uint32_t address; /* Base Address, CPU accessible */
uint32_t size; /* 0=Unimplemented, 0!=Resource Size */
struct pci_res *res; /* PCI-layer resource */
};
struct pci_dev_info {
struct pci_dev_id id;
uint8_t rev;
uint8_t irq; /* 0 = NO IRQ */
pci_dev_t pcidev;
struct pcibus_res resources[PCIDEV_RES_CNT];
struct pci_dev *pci_device;
};
struct pci_drv_info {
struct drvmgr_drv general; /* General bus info */
/* PCI specific bus information */
struct pci_dev_id_match *ids; /* Supported hardware */
};
/* Access routines */
struct pcibus_regmem_ops {
drvmgr_r8 r8;
drvmgr_r16 r16;
drvmgr_r32 r32;
drvmgr_r64 r64;
drvmgr_w8 w8;
drvmgr_w16 w16;
drvmgr_w32 w32;
drvmgr_w64 w64;
};
/* Let driver configure PCI bus driver */
struct pcibus_config {
struct drvmgr_map_entry *maps_up;
struct drvmgr_map_entry *maps_down;
};
/* PCI Configuration Space Access - Not implemented (use PCI Lib directly) */
#define PCI_FUNC_CFG_R8 DRVMGR_RWFUNC(RW_SIZE_1|RW_READ|RW_CFG)
#define PCI_FUNC_CFG_R16 DRVMGR_RWFUNC(RW_SIZE_2|RW_READ|RW_CFG)
#define PCI_FUNC_CFG_R32 DRVMGR_RWFUNC(RW_SIZE_4|RW_READ|RW_CFG)
#define PCI_FUNC_CFG_W8 DRVMGR_RWFUNC(RW_SIZE_1|RW_WRITE|RW_CFG)
#define PCI_FUNC_CFG_W16 DRVMGR_RWFUNC(RW_SIZE_2|RW_WRITE|RW_CFG)
#define PCI_FUNC_CFG_W32 DRVMGR_RWFUNC(RW_SIZE_4|RW_WRITE|RW_CFG)
/* PCI I/O Register Access - Not implemented (use PCI Lib directly) */
#define PCI_FUNC_IO_R8 DRVMGR_RWFUNC(RW_SIZE_1|RW_READ|RW_IO)
#define PCI_FUNC_IO_R16 DRVMGR_RWFUNC(RW_SIZE_2|RW_READ|RW_IO)
#define PCI_FUNC_IO_R32 DRVMGR_RWFUNC(RW_SIZE_4|RW_READ|RW_IO)
#define PCI_FUNC_IO_W8 DRVMGR_RWFUNC(RW_SIZE_1|RW_WRITE|RW_IO)
#define PCI_FUNC_IO_W16 DRVMGR_RWFUNC(RW_SIZE_2|RW_WRITE|RW_IO)
#define PCI_FUNC_IO_W32 DRVMGR_RWFUNC(RW_SIZE_4|RW_WRITE|RW_IO)
/* PCI Register Access over Memory Space (Little Endian) */
#define PCI_FUNC_MREG_R8 DRVMGR_RWFUNC(RW_SIZE_1|RW_READ|RW_MEMREG)
#define PCI_FUNC_MREG_R16 DRVMGR_RWFUNC(RW_SIZE_2|RW_READ|RW_MEMREG|RW_LITTLE)
#define PCI_FUNC_MREG_R32 DRVMGR_RWFUNC(RW_SIZE_4|RW_READ|RW_MEMREG|RW_LITTLE)
#define PCI_FUNC_MREG_W8 DRVMGR_RWFUNC(RW_SIZE_1|RW_WRITE|RW_MEMREG)
#define PCI_FUNC_MREG_W16 DRVMGR_RWFUNC(RW_SIZE_2|RW_WRITE|RW_MEMREG|RW_LITTLE)
#define PCI_FUNC_MREG_W32 DRVMGR_RWFUNC(RW_SIZE_4|RW_WRITE|RW_MEMREG|RW_LITTLE)
/* Weak default PCI driver resources, override this from project configuration
* to set PCI Bus resources used to configure PCI device drivers.
*/
extern struct drvmgr_bus_res pcibus_drv_resources;
/* Attach a PCI bus on top of a PCI Host device */
extern int pcibus_register(struct drvmgr_dev *dev, struct pcibus_config *cfg);
#ifdef __cplusplus
}
#endif
#endif
cpukit/include/fdt.h
+111
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#ifndef _FDT_H
#define _FDT_H
/*
* libfdt - Flat Device Tree manipulation
* Copyright (C) 2006 David Gibson, IBM Corporation.
* Copyright 2012 Kim Phillips, Freescale Semiconductor.
*
* libfdt is dual licensed: you can use it either under the terms of
* the GPL, or the BSD license, at your option.
*
* a) This library is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public
* License along with this library; if not, write to the Free
* Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
* MA 02110-1301 USA
*
* Alternatively,
*
* b) Redistribution and use in source and binary forms, with or
* without modification, are permitted provided that the following
* conditions are met:
*
* 1. Redistributions of source code must retain the above
* copyright notice, this list of conditions and the following
* disclaimer.
* 2. Redistributions in binary form must reproduce the above
* copyright notice, this list of conditions and the following
* disclaimer in the documentation and/or other materials
* provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef __ASSEMBLY__
struct fdt_header {
fdt32_t magic; /* magic word FDT_MAGIC */
fdt32_t totalsize; /* total size of DT block */
fdt32_t off_dt_struct; /* offset to structure */
fdt32_t off_dt_strings; /* offset to strings */
fdt32_t off_mem_rsvmap; /* offset to memory reserve map */
fdt32_t version; /* format version */
fdt32_t last_comp_version; /* last compatible version */
/* version 2 fields below */
fdt32_t boot_cpuid_phys; /* Which physical CPU id we're
booting on */
/* version 3 fields below */
fdt32_t size_dt_strings; /* size of the strings block */
/* version 17 fields below */
fdt32_t size_dt_struct; /* size of the structure block */
};
struct fdt_reserve_entry {
fdt64_t address;
fdt64_t size;
};
struct fdt_node_header {
fdt32_t tag;
char name[0];
};
struct fdt_property {
fdt32_t tag;
fdt32_t len;
fdt32_t nameoff;
char data[0];
};
#endif /* !__ASSEMBLY */
#define FDT_MAGIC 0xd00dfeed /* 4: version, 4: total size */
#define FDT_TAGSIZE sizeof(fdt32_t)
#define FDT_BEGIN_NODE 0x1 /* Start node: full name */
#define FDT_END_NODE 0x2 /* End node */
#define FDT_PROP 0x3 /* Property: name off,
size, content */
#define FDT_NOP 0x4 /* nop */
#define FDT_END 0x9
#define FDT_V1_SIZE (7*sizeof(fdt32_t))
#define FDT_V2_SIZE (FDT_V1_SIZE + sizeof(fdt32_t))
#define FDT_V3_SIZE (FDT_V2_SIZE + sizeof(fdt32_t))
#define FDT_V16_SIZE FDT_V3_SIZE
#define FDT_V17_SIZE (FDT_V16_SIZE + sizeof(fdt32_t))
#endif /* _FDT_H */
cpukit/include/libfdt.h
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cpukit/include/libfdt_env.h
+111
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#ifndef _LIBFDT_ENV_H
#define _LIBFDT_ENV_H
/*
* libfdt - Flat Device Tree manipulation
* Copyright (C) 2006 David Gibson, IBM Corporation.
* Copyright 2012 Kim Phillips, Freescale Semiconductor.
*
* libfdt is dual licensed: you can use it either under the terms of
* the GPL, or the BSD license, at your option.
*
* a) This library is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public
* License along with this library; if not, write to the Free
* Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
* MA 02110-1301 USA
*
* Alternatively,
*
* b) Redistribution and use in source and binary forms, with or
* without modification, are permitted provided that the following
* conditions are met:
*
* 1. Redistributions of source code must retain the above
* copyright notice, this list of conditions and the following
* disclaimer.
* 2. Redistributions in binary form must reproduce the above
* copyright notice, this list of conditions and the following
* disclaimer in the documentation and/or other materials
* provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <stddef.h>
#include <stdint.h>
#include <string.h>
#ifdef __CHECKER__
#define __force __attribute__((force))
#define __bitwise __attribute__((bitwise))
#else
#define __force
#define __bitwise
#endif
typedef uint16_t __bitwise fdt16_t;
typedef uint32_t __bitwise fdt32_t;
typedef uint64_t __bitwise fdt64_t;
#define EXTRACT_BYTE(x, n) ((unsigned long long)((uint8_t *)&x)[n])
#define CPU_TO_FDT16(x) ((EXTRACT_BYTE(x, 0) << 8) | EXTRACT_BYTE(x, 1))
#define CPU_TO_FDT32(x) ((EXTRACT_BYTE(x, 0) << 24) | (EXTRACT_BYTE(x, 1) << 16) | \
(EXTRACT_BYTE(x, 2) << 8) | EXTRACT_BYTE(x, 3))
#define CPU_TO_FDT64(x) ((EXTRACT_BYTE(x, 0) << 56) | (EXTRACT_BYTE(x, 1) << 48) | \
(EXTRACT_BYTE(x, 2) << 40) | (EXTRACT_BYTE(x, 3) << 32) | \
(EXTRACT_BYTE(x, 4) << 24) | (EXTRACT_BYTE(x, 5) << 16) | \
(EXTRACT_BYTE(x, 6) << 8) | EXTRACT_BYTE(x, 7))
static inline uint16_t fdt16_to_cpu(fdt16_t x)
{
return (__force uint16_t)CPU_TO_FDT16(x);
}
static inline fdt16_t cpu_to_fdt16(uint16_t x)
{
return (__force fdt16_t)CPU_TO_FDT16(x);
}
static inline uint32_t fdt32_to_cpu(fdt32_t x)
{
return (__force uint32_t)CPU_TO_FDT32(x);
}
static inline fdt32_t cpu_to_fdt32(uint32_t x)
{
return (__force fdt32_t)CPU_TO_FDT32(x);
}
static inline uint64_t fdt64_to_cpu(fdt64_t x)
{
return (__force uint64_t)CPU_TO_FDT64(x);
}
static inline fdt64_t cpu_to_fdt64(uint64_t x)
{
return (__force fdt64_t)CPU_TO_FDT64(x);
}
#undef CPU_TO_FDT64
#undef CPU_TO_FDT32
#undef CPU_TO_FDT16
#undef EXTRACT_BYTE
#endif /* _LIBFDT_ENV_H */
cpukit/include/librtemsNfs.h
+234
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/**
* @file
*
* @brief Public Interface to the NFS Client Library for RTEMS
*
* @ingroup rtems-nfsclient
*/
/*
* Author: Till Straumann <strauman@slac.stanford.edu> 2002-2003
*
* Authorship
* ----------
* This software (NFS-2 client implementation for RTEMS) was created by
* Till Straumann <strauman@slac.stanford.edu>, 2002-2007,
* Stanford Linear Accelerator Center, Stanford University.
*
* Acknowledgement of sponsorship
* ------------------------------
* The NFS-2 client implementation for RTEMS was produced by
* the Stanford Linear Accelerator Center, Stanford University,
* under Contract DE-AC03-76SFO0515 with the Department of Energy.
*
* Government disclaimer of liability
* ----------------------------------
* Neither the United States nor the United States Department of Energy,
* nor any of their employees, makes any warranty, express or implied, or
* assumes any legal liability or responsibility for the accuracy,
* completeness, or usefulness of any data, apparatus, product, or process
* disclosed, or represents that its use would not infringe privately owned
* rights.
*
* Stanford disclaimer of liability
* --------------------------------
* Stanford University makes no representations or warranties, express or
* implied, nor assumes any liability for the use of this software.
*
* Stanford disclaimer of copyright
* --------------------------------
* Stanford University, owner of the copyright, hereby disclaims its
* copyright and all other rights in this software. Hence, anyone may
* freely use it for any purpose without restriction.
*
* Maintenance of notices
* ----------------------
* In the interest of clarity regarding the origin and status of this
* SLAC software, this and all the preceding Stanford University notices
* are to remain affixed to any copy or derivative of this software made
* or distributed by the recipient and are to be affixed to any copy of
* software made or distributed by the recipient that contains a copy or
* derivative of this software.
*
* ------------------ SLAC Software Notices, Set 4 OTT.002a, 2004 FEB 03
*/
#ifndef LIB_RTEMS_NFS_CLIENT_H
#define LIB_RTEMS_NFS_CLIENT_H
/**
* @defgroup rtems-nfsclient NFS Client Library
*
* @ingroup nfsclient
* @{
*/
#ifdef HAVE_CONFIG_H
#include <config.h>
#endif
#include <rtems.h>
#include <rtems/libio.h>
#include <rtems/libio_.h>
#include <rtems/seterr.h>
#include <string.h>
#include <stdio.h>
#include <stdlib.h>
#include <assert.h>
#include <sys/stat.h>
#include <dirent.h>
#include <netdb.h>
#include <ctype.h>
#include <netinet/in.h>
#include <arpa/inet.h>
#ifdef __cplusplus
extern "C" {
#endif
/** RPCIO driver interface.
* If you need RPCIO for other purposes than NFS
* you may want to include <rpcio.h>
#include "rpcio.h"
*/
/** Priority of daemon; may be setup prior to calling rpcUdpInit();
* otherwise the network task priority from the rtems_bsdnet_config
* is used...
*/
extern rtems_task_priority rpciodPriority;
#ifdef RTEMS_SMP
/** CPU affinity of daemon; may be setup prior to calling rpcUdpInit();
* otherwise the network task CPU affinity from the rtems_bsdnet_config
* is used...
*/
extern const cpu_set_t *rpciodCpuset;
extern size_t rpciodCpusetSize;
#endif
/**
* @brief Sets the XIDs of the RPC transaction hash table.
*
* The active RPC transactions are stored in a hash table. Each table entry
* contains the XID of its corresponding transaction. The XID consists of two
* parts. The lower part is determined by the hash table index. The upper
* part is incremented in each send operation.
*
* This function sets the upper part of the XID in all hash table entries.
* This can be used to ensure that the XIDs are not reused in a short interval
* for example during a boot process or after resets.
*
* @param[in] xid The upper part is used to set the upper XID part of the hash
* table entries.
*/
void
rpcSetXIDs(uint32_t xid);
/** Initialize the driver.
*
* Note, called in nfsfs initialise when mount is called.
*
* @retval 0 on success, -1 on failure
*/
int
rpcUdpInit(void);
/**
* @brief RPC cleanup and stop.
*
* @retval 0 on success, nonzero if still in use
*/
int
rpcUdpCleanup(void);
/** NFS driver interface */
/**
* @brief Initialize the NFS driver.
*
* The RPCIO driver must have been initialized prior to calling this.
*
* Note, called in nfsfs initialise when mount is called with defaults.
*
* ARGS: depth of the small and big
* transaction pools, i.e. how
* many transactions (buffers)
* should always be kept around.
*
* (If more transactions are needed,
* they are created and destroyed
* on the fly).
*
* Supply zero values to have the
* driver chose reasonable defaults.
*
* @retval 0 Successful operation.
* @retval -1 An error occurred. The errno is set to indicate the error.
*/
int
nfsInit(int smallPoolDepth, int bigPoolDepth);
/**
* @brief Driver cleanup code.
*
* @retval 0 on success, nonzero if still in use
*/
int
nfsCleanup(void);
/**
* @brief Dump a list of the currently mounted NFS to a file.
*
* Dump a list of the currently mounted NFS to a file
* (stdout is used in case f==NULL)
*/
int
nfsMountsShow(FILE *f);
/**
* @brief Filesystem mount table mount handler.
*
* Filesystem mount table mount handler. Do not call, use the mount call.
*/
int
rtems_nfs_initialize(rtems_filesystem_mount_table_entry_t *mt_entry,
const void *data);
/**
* @brief A utility routine to find the path leading to a
* rtems_filesystem_location_info_t node.
*
* This should really be present in libcsupport...
*
* @param[in] 'loc' and a buffer 'buf' (length 'len') to hold the path.
*
* @param[out] path copied into 'buf'
*
* @retval 0 on success, RTEMS error code on error.
*/
rtems_status_code
rtems_filesystem_resolve_location(char *buf, int len, rtems_filesystem_location_info_t *loc);
/**
* @brief Set the timeout (initial default: 10s) for NFS and mount calls.
*
* Set the timeout (initial default: 10s) for NFS and mount calls.
*
* @retval 0 on success, nonzero if the requested timeout is less than
* a clock tick or if the system clock rate cannot be determined.
*/
int
nfsSetTimeout(uint32_t timeout_ms);
/** Read current timeout (in milliseconds) */
uint32_t
nfsGetTimeout(void);
#ifdef __cplusplus
}
#endif
/** @} */
#endif
cpukit/include/link.h
+45
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/* $NetBSD: link.h,v 1.13 2008/04/28 20:22:54 martin Exp $ */
/*-
* Copyright (c) 1999 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
* NASA Ames Research Center.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _LINK_H_
#define _LINK_H_
/*
* Pull in the correct definitions for our toolchain target.
*/
#ifdef __ELF__
#include <link_elf.h>
#else
#include <link_aout.h>
#endif
#endif /* _LINK_H_ */
cpukit/include/link_elf.h
+79
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/* $NetBSD: link_elf.h,v 1.8 2009/11/04 19:28:03 pooka Exp $ */
/*
* This only exists for GDB.
*/
#ifndef _LINK_ELF_H_
#define _LINK_ELF_H_
#include <sys/types.h>
#include <machine/elf_machdep.h>
#include <stdint.h>
#include <rtems/rtl/rtl-obj-fwd.h>
enum sections
{
rap_text = 0,
rap_const = 1,
rap_ctor = 2,
rap_dtor = 3,
rap_data = 4,
rap_bss = 5,
rap_secs = 6
};
/**
* Object details.
*/
typedef struct
{
const char* name; /**< Section name. */
uint32_t offset; /**< The offset in the elf file. */
uint32_t size; /**< The size of the section. */
uint32_t rap_id; /**< Which obj does this section belongs to. */
}section_detail;
/**
* link map structure will be used for GDB support.
*/
struct link_map {
const char* name; /**< Name of the obj. */
uint32_t sec_num; /**< The count of section. */
section_detail* sec_detail; /**< The section details. */
uint32_t* sec_addr[rap_secs]; /**< The RAP section addr. */
uint32_t rpathlen; /**< The length of the path. */
char* rpath; /**< The path of object files. */
struct link_map* l_next; /**< Linked list of mapped libs. */
struct link_map* l_prev;
};
/**
* r_debug is used to manage the debug related structures.
*/
struct r_debug {
int r_version; /* not used */
struct link_map *r_map; /* list of loaded images */
enum {
RT_CONSISTENT, /* things are stable */
RT_ADD, /* adding a shared library */
RT_DELETE /* removing a shared library */
} r_state;
};
/*
* stub function. It is empty.
*/
void _rtld_debug_state (void);
/*
* add link map to the list.
*/
int _rtld_linkmap_add (rtems_rtl_obj_t* obj);
/*
* Remove link map from the list.
*/
void _rtld_linkmap_delete (rtems_rtl_obj_t* obj);
#endif /* _LINK_ELF_H_ */
cpukit/include/linux/i2c-dev.h
+137
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/**
* @file
*
* @brief RTEMS Port of Linux I2C Device API
*
* @ingroup I2CLinux
*/
/*
* Copyright (c) 2014 embedded brains GmbH. All rights reserved.
*
* embedded brains GmbH
* Dornierstr. 4
* 82178 Puchheim
* Germany
* <rtems@embedded-brains.de>
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*/
#ifndef _UAPI_LINUX_I2C_DEV_H
#define _UAPI_LINUX_I2C_DEV_H
#include <stdint.h>
/**
* @addtogroup I2CLinux
*
* @{
*/
/**
* @name I2C IO Control Commands
*
* @{
*/
/**
* @brief Sets the count of transfer retries in case a slave
* device does not acknowledge a transaction.
*
* The argument type is unsigned long.
*/
#define I2C_RETRIES 0x701
/**
* @brief Sets the transfer timeout in 10ms units.
*
* The argument type is unsigned long.
*/
#define I2C_TIMEOUT 0x702
/**
* @brief Sets the slave address.
*
* It is an error to set a slave address already used by another slave device.
*
* The argument type is unsigned long.
*/
#define I2C_SLAVE 0x703
/**
* @brief Forces setting the slave address.
*
* The argument type is unsigned long.
*/
#define I2C_SLAVE_FORCE 0x706
/**
* @brief Enables 10-bit addresses if argument is non-zero, otherwise
* disables 10-bit addresses.
*
* The argument type is unsigned long.
*/
#define I2C_TENBIT 0x704
/**
* @brief Gets the I2C controller functionality information.
*
* The argument type is a pointer to an unsigned long.
*/
#define I2C_FUNCS 0x705
/**
* @brief Performs a combined read/write transfer.
*
* Only one stop condition is signalled.
*
* The argument type is a pointer to struct i2c_rdwr_ioctl_data.
*/
#define I2C_RDWR 0x707
/**
* @brief Enables System Management Bus (SMBus) Packet Error Checking (PEC)
* if argument is non-zero, otherwise disables PEC.
*
* The argument type is unsigned long.
*/
#define I2C_PEC 0x708
/**
* @brief Performs an SMBus transfer.
*
* The argument type is a pointer to struct i2c_smbus_ioctl_data.
*/
#define I2C_SMBUS 0x720
/** @} */
/**
* @brief Argument type for I2C_SMBUS IO control call.
*/
struct i2c_smbus_ioctl_data {
uint8_t read_write;
uint8_t command;
uint32_t size;
union i2c_smbus_data *data;
};
/**
* @brief Argument type for I2C_RDWR IO control call.
*/
struct i2c_rdwr_ioctl_data {
struct i2c_msg *msgs;
uint32_t nmsgs;
};
/**
* @brief Maximum count of messages for one IO control call.
*/
#define I2C_RDRW_IOCTL_MAX_MSGS 42
/** @} */
#endif /* _UAPI_LINUX_I2C_DEV_H */
cpukit/include/linux/i2c.h
+275
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/**
* @file
*
* @brief RTEMS Port of Linux I2C API
*
* @ingroup I2CLinux
*/
/*
* Copyright (c) 2014 embedded brains GmbH. All rights reserved.
*
* embedded brains GmbH
* Dornierstr. 4
* 82178 Puchheim
* Germany
* <rtems@embedded-brains.de>
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*/
#ifndef _UAPI_LINUX_I2C_H
#define _UAPI_LINUX_I2C_H
#include <stdint.h>
/**
* @defgroup I2CLinux Linux I2C User-Space API
*
* @ingroup I2C
*
* @brief RTEMS port of Linux I2C user-space API.
*
* Additional documentation is available through the Linux sources, see:
*
* - /usr/src/linux/include/uapi/linux/i2c.h,
* - /usr/src/linux/include/uapi/linux/i2c-dev.h
* - https://www.kernel.org/doc/Documentation/i2c/i2c-protocol
* - https://www.kernel.org/doc/Documentation/i2c/dev-interface
*
* @{
*/
/**
* @name I2C Message Flags
*
* @{
*/
/**
* @brief I2C message flag to indicate a 10-bit address.
*
* The controller must support this as indicated by the I2C_FUNC_10BIT_ADDR
* functionality.
*
* @see i2c_msg.
*/
#define I2C_M_TEN 0x0010
/**
* @brief I2C message flag to indicate a read transfer (from slave to master).
*
* @see i2c_msg.
*/
#define I2C_M_RD 0x0001
/**
* @brief I2C message flag to signal a stop condition even if this is not the
* last message.
*
* The controller must support this as indicated by the
* @ref I2C_FUNC_PROTOCOL_MANGLING functionality.
*
* @see i2c_msg.
*/
#define I2C_M_STOP 0x8000
/**
* @brief I2C message flag to omit start condition and slave address.
*
* The controller must support this as indicated by the
* @ref I2C_FUNC_NOSTART functionality.
*
* @see i2c_msg.
*/
#define I2C_M_NOSTART 0x4000
/**
* @brief I2C message flag to reverse the direction flag.
*
* The controller must support this as indicated by the
* @ref I2C_FUNC_PROTOCOL_MANGLING functionality.
*
* @see i2c_msg.
*/
#define I2C_M_REV_DIR_ADDR 0x2000
/**
* @brief I2C message flag to ignore a non-acknowledge.
*
* The controller must support this as indicated by the
* @ref I2C_FUNC_PROTOCOL_MANGLING functionality.
*
* @see i2c_msg.
*/
#define I2C_M_IGNORE_NAK 0x1000
/**
* @brief I2C message flag to omit a master acknowledge/non-acknowledge in a
* read transfer.
*
* The controller must support this as indicated by the
* @ref I2C_FUNC_PROTOCOL_MANGLING functionality.
*
* @see i2c_msg.
*/
#define I2C_M_NO_RD_ACK 0x0800
/**
* @brief I2C message flag to indicate that the message data length is the
* first received byte.
*
* The message data buffer must be large enough to store up to 32 bytes, the
* initial length byte and the SMBus PEC (if used). Initialize the message
* length to one. The message length is incremented by the count of received
* data bytes.
*
* @see i2c_msg.
*/
#define I2C_M_RECV_LEN 0x0400
/** @} */
/**
* @brief I2C transfer message.
*/
struct i2c_msg {
/**
* @brief The slave address.
*
* In case the @ref I2C_M_TEN flag is set, then this is a 10-bit address,
* otherwise it is a 7-bit address.
*/
uint16_t addr;
/**
* @brief The message flags.
*
* Valid flags are
* - @ref I2C_M_TEN,
* - @ref I2C_M_RD,
* - @ref I2C_M_STOP,
* - @ref I2C_M_NOSTART,
* - @ref I2C_M_REV_DIR_ADDR,
* - @ref I2C_M_IGNORE_NAK,
* - @ref I2C_M_NO_RD_ACK, and
* - @ref I2C_M_RECV_LEN.
*/
uint16_t flags;
/**
* @brief The message data length in bytes.
*/
uint16_t len;
/**
* @brief Pointer to the message data.
*/
uint8_t *buf;
};
/**
* @name I2C Controller Functionality
*
* @{
*/
#define I2C_FUNC_I2C 0x00000001
#define I2C_FUNC_10BIT_ADDR 0x00000002
#define I2C_FUNC_PROTOCOL_MANGLING 0x00000004
#define I2C_FUNC_SMBUS_PEC 0x00000008
#define I2C_FUNC_NOSTART 0x00000010
#define I2C_FUNC_SMBUS_BLOCK_PROC_CALL 0x00008000
#define I2C_FUNC_SMBUS_QUICK 0x00010000
#define I2C_FUNC_SMBUS_READ_BYTE 0x00020000
#define I2C_FUNC_SMBUS_WRITE_BYTE 0x00040000
#define I2C_FUNC_SMBUS_READ_BYTE_DATA 0x00080000
#define I2C_FUNC_SMBUS_WRITE_BYTE_DATA 0x00100000
#define I2C_FUNC_SMBUS_READ_WORD_DATA 0x00200000
#define I2C_FUNC_SMBUS_WRITE_WORD_DATA 0x00400000
#define I2C_FUNC_SMBUS_PROC_CALL 0x00800000
#define I2C_FUNC_SMBUS_READ_BLOCK_DATA 0x01000000
#define I2C_FUNC_SMBUS_WRITE_BLOCK_DATA 0x02000000
#define I2C_FUNC_SMBUS_READ_I2C_BLOCK 0x04000000
#define I2C_FUNC_SMBUS_WRITE_I2C_BLOCK 0x08000000
#define I2C_FUNC_SMBUS_BYTE \
(I2C_FUNC_SMBUS_READ_BYTE | I2C_FUNC_SMBUS_WRITE_BYTE)
#define I2C_FUNC_SMBUS_BYTE_DATA \
(I2C_FUNC_SMBUS_READ_BYTE_DATA | I2C_FUNC_SMBUS_WRITE_BYTE_DATA)
#define I2C_FUNC_SMBUS_WORD_DATA \
(I2C_FUNC_SMBUS_READ_WORD_DATA | I2C_FUNC_SMBUS_WRITE_WORD_DATA)
#define I2C_FUNC_SMBUS_BLOCK_DATA \
(I2C_FUNC_SMBUS_READ_BLOCK_DATA | I2C_FUNC_SMBUS_WRITE_BLOCK_DATA)
#define I2C_FUNC_SMBUS_I2C_BLOCK \
(I2C_FUNC_SMBUS_READ_I2C_BLOCK | I2C_FUNC_SMBUS_WRITE_I2C_BLOCK)
#define I2C_FUNC_SMBUS_EMUL \
(I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE | I2C_FUNC_SMBUS_BYTE_DATA \
| I2C_FUNC_SMBUS_WORD_DATA | I2C_FUNC_SMBUS_PROC_CALL \
| I2C_FUNC_SMBUS_WRITE_BLOCK_DATA | I2C_FUNC_SMBUS_I2C_BLOCK \
| I2C_FUNC_SMBUS_PEC)
/** @} */
/**
* @brief Maximum SMBus data block count.
*/
#define I2C_SMBUS_BLOCK_MAX 32
/**
* @brief SMBus data.
*/
union i2c_smbus_data {
uint8_t byte;
uint16_t word;
uint8_t block[I2C_SMBUS_BLOCK_MAX + 2];
};
/**
* @name SMBus Transfer Read and Write Markers
*
* @{
*/
#define I2C_SMBUS_READ 1
#define I2C_SMBUS_WRITE 0
/** @} */
/**
* @name SMBus Transaction Types
*
* @{
*/
#define I2C_SMBUS_QUICK 0
#define I2C_SMBUS_BYTE 1
#define I2C_SMBUS_BYTE_DATA 2
#define I2C_SMBUS_WORD_DATA 3
#define I2C_SMBUS_PROC_CALL 4
#define I2C_SMBUS_BLOCK_DATA 5
#define I2C_SMBUS_I2C_BLOCK_BROKEN 6
#define I2C_SMBUS_BLOCK_PROC_CALL 7
#define I2C_SMBUS_I2C_BLOCK_DATA 8
/** @} */
/** @} */
#endif /* _UAPI_LINUX_I2C_H */
cpukit/include/linux/spi/spidev.h
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/**
* @file
*
* @brief RTEMS Port of Linux SPI API
*
* @ingroup SPILinux
*/
/*
* Copyright (c) 2016 embedded brains GmbH. All rights reserved.
*
* embedded brains GmbH
* Dornierstr. 4
* 82178 Puchheim
* Germany
* <rtems@embedded-brains.de>
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*/
#ifndef _UAPI_LINUX_SPI_H
#define _UAPI_LINUX_SPI_H
#include <sys/ioccom.h>
#include <stddef.h>
#include <stdint.h>
/**
* @defgroup SPILinux Linux SPI User-Space API
*
* @ingroup SPI
*
* @brief RTEMS port of Linux SPI user-space API.
*
* Additional documentation is available through the Linux sources, see
*
* /usr/src/linux/include/uapi/linux/spidev.h.
*
* @{
*/
/**
* @name SPI Transfer Flags
*
* @{
*/
/**
* @brief SPI transfer flag which sets the clock phase.
*/
#define SPI_CPHA 0x01
/**
* @brief SPI transfer flag which sets the clock polarity.
*/
#define SPI_CPOL 0x02
/**
* @brief SPI transfer flag which sets SPI Mode 0 (clock starts low, sample on
* leading edge).
*/
#define SPI_MODE_0 0
/**
* @brief SPI transfer flag which sets SPI Mode 0 (clock starts low, sample on
* trailing edge).
*/
#define SPI_MODE_1 SPI_CPHA
/**
* @brief SPI transfer flag which sets SPI Mode 0 (clock starts high, sample on
* leading edge).
*/
#define SPI_MODE_2 SPI_CPOL
/**
* @brief SPI transfer flag which sets SPI Mode 0 (clock starts high, sample on
* trailing edge).
*/
#define SPI_MODE_3 (SPI_CPOL | SPI_CPHA)
/**
* @brief SPI transfer flag which selects the device by setting the chip select
* line.
*/
#define SPI_CS_HIGH 0x04
/**
* @brief SPI transfer flag which triggers data transmission with the LSB being
* sent first.
*/
#define SPI_LSB_FIRST 0x08
/**
* @brief SPI transfer flag which uses a shared wire for master input/slave
* output as well as master output/slave input.
*/
#define SPI_3WIRE 0x10
/**
* @brief SPI transfer flag which initiates the loopback mode.
*/
#define SPI_LOOP 0x20
/**
* @brief SPI transfer flag which indicates that no chip select is needed due to
* only one device on the bus.
*/
#define SPI_NO_CS 0x40
/**
* @brief SPI transfer flag which pulls the slave to low level during pause.
*/
#define SPI_READY 0x80
/**
* @brief SPI transfer flag which sets up dual mode for transmission.
*/
#define SPI_TX_DUAL 0x100
/**
* @brief SPI transfer flag which sets up quad mode for transmission.
*/
#define SPI_TX_QUAD 0x200
/**
* @brief SPI transfer flag which sets up dual mode for reception.
*/
#define SPI_RX_DUAL 0x400
/**
* @brief SPI transfer flag which sets up quad mode for reception.
*/
#define SPI_RX_QUAD 0x800
/** @} */
#define SPI_IOC_MAGIC 's'
/**
* @brief SPI transfer message.
*/
struct spi_ioc_transfer {
/**
* @brief Buffer for receive data.
*/
void *rx_buf;
/**
* @brief Buffer for transmit data.
*/
const void *tx_buf;
/**
* @brief Length of receive and transmit buffers in bytes.
*/
size_t len;
/**
* @brief Sets the bit-rate of the device.
*/
uint32_t speed_hz;
/**
* @brief Sets the delay after a transfer before the chip select status is
* changed and the next transfer is triggered.
*/
uint16_t delay_usecs;
/**
* @brief Sets the device wordsize.
*/
uint8_t bits_per_word;
/**
* @brief If true, device is deselected after transfer ended and before a new
* transfer is started.
*/
uint8_t cs_change;
/**
* @brief Amount of bits that are used for reading.
*/
uint8_t rx_nbits;
/**
* @brief Amount of bits that are used for writing.
*/
uint8_t tx_nbits;
/**
* @brief Sets one of the possible modes that can be used for SPI transfers
* (dependent on clock phase and polarity).
*/
uint32_t mode;
/**
* @brief Indicates which device is currently used.
*/
uint8_t cs;
};
/**
* @brief Calculates the size of the SPI message array.
*/
#define SPI_MSGSIZE(n) \
(((n) * sizeof(struct spi_ioc_transfer) < IOCPARM_MAX) ? \
(n) * sizeof(struct spi_ioc_transfer) : 0)
/**
* @brief Transfers an array with SPI messages.
*/
#define SPI_IOC_MESSAGE(n) _IOW(SPI_IOC_MAGIC, 0, char[SPI_MSGSIZE(n)])
/**
* @brief Reads the least-significant 8-bits of the SPI default mode.
*/
#define SPI_IOC_RD_MODE _IOR(SPI_IOC_MAGIC, 1, uint8_t)
/**
* @brief Writes the SPI default mode (the most-significant 24-bits of the mode are
* set to zero).
*/
#define SPI_IOC_WR_MODE _IOW(SPI_IOC_MAGIC, 1, uint8_t)
/**
* @brief Reads the SPI default least-significant bit first setting.
*/
#define SPI_IOC_RD_LSB_FIRST _IOR(SPI_IOC_MAGIC, 2, uint8_t)
/**
* @brief Writes the SPI default least-significant-bit first setting.
*/
#define SPI_IOC_WR_LSB_FIRST _IOW(SPI_IOC_MAGIC, 2, uint8_t)
/**
* @brief Reads the SPI default bits per word.
*/
#define SPI_IOC_RD_BITS_PER_WORD _IOR(SPI_IOC_MAGIC, 3, uint8_t)
/**
* @brief Writes the SPI default bits per word.
*/
#define SPI_IOC_WR_BITS_PER_WORD _IOW(SPI_IOC_MAGIC, 3, uint8_t)
/**
* @brief Reads the SPI default speed in Hz.
*/
#define SPI_IOC_RD_MAX_SPEED_HZ _IOR(SPI_IOC_MAGIC, 4, uint32_t)
/**
* @brief Writes the SPI default speed in Hz.
*/
#define SPI_IOC_WR_MAX_SPEED_HZ _IOW(SPI_IOC_MAGIC, 4, uint32_t)
/**
* @brief Reads the full 32-bit SPI default mode.
*/
#define SPI_IOC_RD_MODE32 _IOR(SPI_IOC_MAGIC, 5, uint32_t)
/**
* @brief Writes the full 32-bit SPI default mode.
*/
#define SPI_IOC_WR_MODE32 _IOW(SPI_IOC_MAGIC, 5, uint32_t)
#endif /* _UAPI_LINUX_SPI_H */
cpukit/include/machine/_kernel_cpuset.h
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cpukit/include/machine/_kernel_param.h
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#include <sys/cdefs.h>
#include <sys/errno.h>
#include <sys/time.h>
#include <sys/priority.h>
#ifndef FALSE
#define FALSE 0
#endif
#ifndef TRUE
#define TRUE 1
#endif
#ifndef _BYTEORDER_PROTOTYPED
#define _BYTEORDER_PROTOTYPED
__BEGIN_DECLS
__uint32_t htonl(__uint32_t);
__uint16_t htons(__uint16_t);
__uint32_t ntohl(__uint32_t);
__uint16_t ntohs(__uint16_t);
__END_DECLS
#endif
#ifndef _BYTEORDER_FUNC_DEFINED
#define _BYTEORDER_FUNC_DEFINED
#define htonl(x) __htonl(x)
#define htons(x) __htons(x)
#define ntohl(x) __ntohl(x)
#define ntohs(x) __ntohs(x)
#endif /* !_BYTEORDER_FUNC_DEFINED */
cpukit/include/machine/_kernel_time.h
+173
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/*-
* Copyright (c) 2016 embedded brains GmbH
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#if !defined(_SYS_TIME_H_) || !defined(_KERNEL)
#error "must be included via <sys/time.h> in kernel space"
#endif
#include <machine/_timecounter.h>
/* Operations on timespecs */
#define timespecclear(tvp) ((tvp)->tv_sec = (tvp)->tv_nsec = 0)
#define timespecisset(tvp) ((tvp)->tv_sec || (tvp)->tv_nsec)
#define timespeccmp(tvp, uvp, cmp) \
(((tvp)->tv_sec == (uvp)->tv_sec) ? \
((tvp)->tv_nsec cmp (uvp)->tv_nsec) : \
((tvp)->tv_sec cmp (uvp)->tv_sec))
#define timespecadd(vvp, uvp) \
do { \
(vvp)->tv_sec += (uvp)->tv_sec; \
(vvp)->tv_nsec += (uvp)->tv_nsec; \
if ((vvp)->tv_nsec >= 1000000000) { \
(vvp)->tv_sec++; \
(vvp)->tv_nsec -= 1000000000; \
} \
} while (0)
#define timespecsub(vvp, uvp) \
do { \
(vvp)->tv_sec -= (uvp)->tv_sec; \
(vvp)->tv_nsec -= (uvp)->tv_nsec; \
if ((vvp)->tv_nsec < 0) { \
(vvp)->tv_sec--; \
(vvp)->tv_nsec += 1000000000; \
} \
} while (0)
/* Operations on timevals. */
#define timevalclear(tvp) ((tvp)->tv_sec = (tvp)->tv_usec = 0)
#define timevalisset(tvp) ((tvp)->tv_sec || (tvp)->tv_usec)
#define timevalcmp(tvp, uvp, cmp) \
(((tvp)->tv_sec == (uvp)->tv_sec) ? \
((tvp)->tv_usec cmp (uvp)->tv_usec) : \
((tvp)->tv_sec cmp (uvp)->tv_sec))
/* timevaladd and timevalsub are not inlined */
/*
* Kernel to clock driver interface.
*/
void inittodr(time_t base);
void resettodr(void);
#define time_second _Timecounter_Time_second
#define time_uptime _Timecounter_Time_uptime
extern struct timeval boottime;
extern struct bintime tc_tick_bt;
extern sbintime_t tc_tick_sbt;
extern struct bintime tick_bt;
extern sbintime_t tick_sbt;
extern int tc_precexp;
extern int tc_timepercentage;
extern struct bintime bt_timethreshold;
extern struct bintime bt_tickthreshold;
extern sbintime_t sbt_timethreshold;
extern sbintime_t sbt_tickthreshold;
/*
* Functions for looking at our clock: [get]{bin,nano,micro}[up]time()
*
* Functions without the "get" prefix returns the best timestamp
* we can produce in the given format.
*
* "bin" == struct bintime == seconds + 64 bit fraction of seconds.
* "nano" == struct timespec == seconds + nanoseconds.
* "micro" == struct timeval == seconds + microseconds.
*
* Functions containing "up" returns time relative to boot and
* should be used for calculating time intervals.
*
* Functions without "up" returns UTC time.
*
* Functions with the "get" prefix returns a less precise result
* much faster than the functions without "get" prefix and should
* be used where a precision of 1/hz seconds is acceptable or where
* performance is priority. (NB: "precision", _not_ "resolution" !)
*/
#define binuptime(_bt) _Timecounter_Binuptime(_bt)
#define nanouptime(_tsp) _Timecounter_Nanouptime(_tsp)
#define microuptime(_tvp) _Timecounter_Microuptime(_tvp)
static __inline sbintime_t
sbinuptime(void)
{
struct bintime _bt;
binuptime(&_bt);
return (bttosbt(_bt));
}
#define bintime(_bt) _Timecounter_Bintime(_bt)
#define nanotime(_tsp) _Timecounter_Nanotime(_tsp)
#define microtime(_tvp) _Timecounter_Microtime(_tvp)
#define getbinuptime(_bt) _Timecounter_Getbinuptime(_bt)
#define getnanouptime(_tsp) _Timecounter_Getnanouptime(_tsp)
#define getmicrouptime(_tvp) _Timecounter_Getmicrouptime(_tvp)
static __inline sbintime_t
getsbinuptime(void)
{
struct bintime _bt;
getbinuptime(&_bt);
return (bttosbt(_bt));
}
#define getbintime(_bt) _Timecounter_Getbintime(_bt)
#define getnanotime(_tsp) _Timecounter_Getnanotime(_tsp)
#define getmicrotime(_tvp) _Timecounter_Getmicrotime(_tvp)
#define getboottime(_tvp) _Timecounter_Getboottime(_tvp)
#define getboottimebin(_bt) _Timecounter_Getboottimebin(_bt)
/* Other functions */
int itimerdecr(struct itimerval *itp, int usec);
int itimerfix(struct timeval *tv);
int ppsratecheck(struct timeval *, int *, int);
int ratecheck(struct timeval *, const struct timeval *);
void timevaladd(struct timeval *t1, const struct timeval *t2);
void timevalsub(struct timeval *t1, const struct timeval *t2);
int tvtohz(struct timeval *tv);
#define TC_DEFAULTPERC 5
#define BT2FREQ(bt) \
(((uint64_t)0x8000000000000000 + ((bt)->frac >> 2)) / \
((bt)->frac >> 1))
#define SBT2FREQ(sbt) ((SBT_1S + ((sbt) >> 1)) / (sbt))
#define FREQ2BT(freq, bt) \
{ \
(bt)->sec = 0; \
(bt)->frac = ((uint64_t)0x8000000000000000 / (freq)) << 1; \
}
#define TIMESEL(sbt, sbt2) \
(((sbt2) >= sbt_timethreshold) ? \
((*(sbt) = getsbinuptime()), 1) : ((*(sbt) = sbinuptime()), 0))
cpukit/include/machine/_kernel_types.h
+34
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/*-
* Copyright (c) 2016 embedded brains GmbH
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#if !defined(_SYS_TYPES_H) || !defined(_KERNEL)
#error "must be included via <sys/types.h> in kernel space"
#endif
typedef int boolean_t;
typedef struct device *device_t;
typedef char vm_memattr_t; /* memory attribute codes */
typedef struct vm_page *vm_page_t;
cpukit/include/machine/_timecounter.h
+53
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/*-
* Copyright (c) 2016 embedded brains GmbH
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#ifndef _SYS_TIME_H_
#error "<sys/time.h> must be included first"
#endif /* !_SYS_TIME_H_ */
#ifndef _MACHINE__TIMECOUNTER_H_
#define _MACHINE__TIMECOUNTER_H_
__BEGIN_DECLS
extern volatile time_t _Timecounter_Time_second;
extern volatile int32_t _Timecounter_Time_uptime;
extern struct bintime _Timecounter_Boottimebin;
void _Timecounter_Binuptime(struct bintime *);
void _Timecounter_Nanouptime(struct timespec *);
void _Timecounter_Microuptime(struct timeval *);
void _Timecounter_Bintime(struct bintime *);
void _Timecounter_Nanotime(struct timespec *);
void _Timecounter_Microtime(struct timeval *);
void _Timecounter_Getbinuptime(struct bintime *);
void _Timecounter_Getnanouptime(struct timespec *);
void _Timecounter_Getmicrouptime(struct timeval *);
void _Timecounter_Getbintime(struct bintime *);
void _Timecounter_Getnanotime(struct timespec *);
void _Timecounter_Getmicrotime(struct timeval *);
__END_DECLS
#endif /* _MACHINE__TIMECOUNTER_H_ */
cpukit/include/md4.h
+56
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/*
** ********************************************************************
** md4.h -- Header file for implementation of **
** MD4 Message Digest Algorithm **
** Updated: 2/13/90 by Ronald L. Rivest **
** (C) 1990 RSA Data Security, Inc. **
** ********************************************************************
*/
#include <stdint.h>
/* MDstruct is the data structure for a message digest computation.
*/
typedef struct {
uint32_t buffer[4]; /* Holds 4-word result of MD computation */
uint8_t count[8]; /* Number of bits processed so far */
uint32_t done; /* Nonzero means MD computation finished */
} MD4_CTX;
/* MD4Init(MD4_CTX *)
** Initialize the MD4_CTX prepatory to doing a message digest
** computation.
*/
extern void MD4Init(MD4_CTX *MD);
/* MD4Update(MD,X,count)
** Input: X -- a pointer to an array of unsigned characters.
** count -- the number of bits of X to use (an unsigned int).
** Updates MD using the first "count" bits of X.
** The array pointed to by X is not modified.
** If count is not a multiple of 8, MD4Update uses high bits of
** last byte.
** This is the basic input routine for a user.
** The routine terminates the MD computation when count < 512, so
** every MD computation should end with one call to MD4Update with a
** count less than 512. Zero is OK for a count.
*/
extern void MD4Update(MD4_CTX *MD, unsigned char *X, unsigned int count);
/* MD4Print(MD)
** Prints message digest buffer MD as 32 hexadecimal digits.
** Order is from low-order byte of buffer[0] to high-order byte
** of buffer[3].
** Each byte is printed with high-order hexadecimal digit first.
*/
extern void MD4Print(MD4_CTX *);
/* MD4Final(buf, MD)
** Returns message digest from MD and terminates the message
** digest computation.
*/
extern void MD4Final(unsigned char *, MD4_CTX *);
/*
** End of md4.h
****************************(cut)***********************************/
cpukit/include/md5.h
+71
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/*
***********************************************************************
** md5.h -- header file for implementation of MD5 **
** RSA Data Security, Inc. MD5 Message-Digest Algorithm **
** Created: 2/17/90 RLR **
** Revised: 12/27/90 SRD,AJ,BSK,JT Reference C version **
** Revised (for MD5): RLR 4/27/91 **
** -- G modified to have y&~z instead of y&z **
** -- FF, GG, HH modified to add in last register done **
** -- Access pattern: round 2 works mod 5, round 3 works mod 3 **
** -- distinct additive constant for each step **
** -- round 4 added, working mod 7 **
***********************************************************************
*/
/*
***********************************************************************
** Copyright (C) 1990, RSA Data Security, Inc. All rights reserved. **
** **
** License to copy and use this software is granted provided that **
** it is identified as the "RSA Data Security, Inc. MD5 Message- **
** Digest Algorithm" in all material mentioning or referencing this **
** software or this function. **
** **
** License is also granted to make and use derivative works **
** provided that such works are identified as "derived from the RSA **
** Data Security, Inc. MD5 Message-Digest Algorithm" in all **
** material mentioning or referencing the derived work. **
** **
** RSA Data Security, Inc. makes no representations concerning **
** either the merchantability of this software or the suitability **
** of this software for any particular purpose. It is provided "as **
** is" without express or implied warranty of any kind. **
** **
** These notices must be retained in any copies of any part of this **
** documentation and/or software. **
***********************************************************************
*/
#ifndef __MD5_INCLUDE__
#include <stdint.h>
#ifdef __cplusplus
extern "C" {
#endif /* __cplusplus */
/* typedef a 32-bit type */
typedef uint32_t UINT4;
#define MD5_BLOCK_LENGTH 64
#define MD5_DIGEST_LENGTH 16
/* Data structure for MD5 (Message-Digest) computation */
typedef struct {
UINT4 i[2]; /* number of _bits_ handled mod 2^64 */
UINT4 buf[4]; /* scratch buffer */
unsigned char in[64]; /* input buffer */
unsigned char digest[16]; /* actual digest after MD5Final call */
} MD5_CTX;
void MD5Init (MD5_CTX *);
void MD5Update (MD5_CTX *, const void *, unsigned int);
void MD5Final (unsigned char [16], MD5_CTX *);
#ifdef __cplusplus
}
#endif /* __cplusplus */
#define __MD5_INCLUDE__
#endif /* __MD5_INCLUDE__ */
cpukit/include/mghttpd/mongoose.h
+390
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// Copyright (c) 2004-2012 Sergey Lyubka
//
// Permission is hereby granted, free of charge, to any person obtaining a copy
// of this software and associated documentation files (the "Software"), to deal
// in the Software without restriction, including without limitation the rights
// to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
// copies of the Software, and to permit persons to whom the Software is
// furnished to do so, subject to the following conditions:
//
// The above copyright notice and this permission notice shall be included in
// all copies or substantial portions of the Software.
//
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
// THE SOFTWARE.
#ifndef MONGOOSE_HEADER_INCLUDED
#define MONGOOSE_HEADER_INCLUDED
#include <stdio.h>
#include <stddef.h>
#ifdef __cplusplus
extern "C" {
#endif // __cplusplus
struct mg_context; // Handle for the HTTP service itself
struct mg_connection; // Handle for the individual connection
// This structure contains information about the HTTP request.
struct mg_request_info {
const char *request_method; // "GET", "POST", etc
const char *uri; // URL-decoded URI
const char *http_version; // E.g. "1.0", "1.1"
const char *query_string; // URL part after '?', not including '?', or NULL
const char *remote_user; // Authenticated user, or NULL if no auth used
long remote_ip; // Client's IP address
int remote_port; // Client's port
int is_ssl; // 1 if SSL-ed, 0 if not
void *user_data; // User data pointer passed to mg_start()
void *conn_data; // Connection-specific user data
int num_headers; // Number of HTTP headers
struct mg_header {
const char *name; // HTTP header name
const char *value; // HTTP header value
} http_headers[64]; // Maximum 64 headers
};
// This structure needs to be passed to mg_start(), to let mongoose know
// which callbacks to invoke. For detailed description, see
// https://github.com/valenok/mongoose/blob/master/UserManual.md
struct mg_callbacks {
// Called when mongoose has received new HTTP request.
// If callback returns non-zero,
// callback must process the request by sending valid HTTP headers and body,
// and mongoose will not do any further processing.
// If callback returns 0, mongoose processes the request itself. In this case,
// callback must not send any data to the client.
int (*begin_request)(struct mg_connection *);
// Called when mongoose has finished processing request.
void (*end_request)(const struct mg_connection *, int reply_status_code);
// Called when mongoose is about to log a message. If callback returns
// non-zero, mongoose does not log anything.
int (*log_message)(const struct mg_connection *, const char *message);
// Called when mongoose initializes SSL library.
int (*init_ssl)(void *ssl_context, void *user_data);
// Called when websocket request is received, before websocket handshake.
// If callback returns 0, mongoose proceeds with handshake, otherwise
// cinnection is closed immediately.
int (*websocket_connect)(const struct mg_connection *);
// Called when websocket handshake is successfully completed, and
// connection is ready for data exchange.
void (*websocket_ready)(struct mg_connection *);
// Called when data frame has been received from the client.
// Parameters:
// bits: first byte of the websocket frame, see websocket RFC at
// http://tools.ietf.org/html/rfc6455, section 5.2
// data, data_len: payload, with mask (if any) already applied.
// Return value:
// non-0: keep this websocket connection opened.
// 0: close this websocket connection.
int (*websocket_data)(struct mg_connection *, int bits,
char *data, size_t data_len);
// Called when mongoose tries to open a file. Used to intercept file open
// calls, and serve file data from memory instead.
// Parameters:
// path: Full path to the file to open.
// data_len: Placeholder for the file size, if file is served from memory.
// Return value:
// NULL: do not serve file from memory, proceed with normal file open.
// non-NULL: pointer to the file contents in memory. data_len must be
// initilized with the size of the memory block.
const char * (*open_file)(const struct mg_connection *,
const char *path, size_t *data_len);
// Called when mongoose is about to serve Lua server page (.lp file), if
// Lua support is enabled.
// Parameters:
// lua_context: "lua_State *" pointer.
void (*init_lua)(struct mg_connection *, void *lua_context);
// Called when mongoose has uploaded a file to a temporary directory as a
// result of mg_upload() call.
// Parameters:
// file_file: full path name to the uploaded file.
void (*upload)(struct mg_connection *, const char *file_name);
// Called when mongoose is about to send HTTP error to the client.
// Implementing this callback allows to create custom error pages.
// Parameters:
// status: HTTP error status code.
int (*http_error)(struct mg_connection *, int status);
};
// Start web server.
//
// Parameters:
// callbacks: mg_callbacks structure with user-defined callbacks.
// options: NULL terminated list of option_name, option_value pairs that
// specify Mongoose configuration parameters.
//
// Side-effects: on UNIX, ignores SIGCHLD and SIGPIPE signals. If custom
// processing is required for these, signal handlers must be set up
// after calling mg_start().
//
//
// Example:
// const char *options[] = {
// "document_root", "/var/www",
// "listening_ports", "80,443s",
// NULL
// };
// struct mg_context *ctx = mg_start(&my_func, NULL, options);
//
// Refer to https://github.com/valenok/mongoose/blob/master/UserManual.md
// for the list of valid option and their possible values.
//
// Return:
// web server context, or NULL on error.
struct mg_context *mg_start(const struct mg_callbacks *callbacks,
void *user_data,
const char **configuration_options);
// Stop the web server.
//
// Must be called last, when an application wants to stop the web server and
// release all associated resources. This function blocks until all Mongoose
// threads are stopped. Context pointer becomes invalid.
void mg_stop(struct mg_context *);
// Get the value of particular configuration parameter.
// The value returned is read-only. Mongoose does not allow changing
// configuration at run time.
// If given parameter name is not valid, NULL is returned. For valid
// names, return value is guaranteed to be non-NULL. If parameter is not
// set, zero-length string is returned.
const char *mg_get_option(const struct mg_context *ctx, const char *name);
// Return array of strings that represent valid configuration options.
// For each option, option name and default value is returned, i.e. the
// number of entries in the array equals to number_of_options x 2.
// Array is NULL terminated.
const char **mg_get_valid_option_names(void);
// Add, edit or delete the entry in the passwords file.
//
// This function allows an application to manipulate .htpasswd files on the
// fly by adding, deleting and changing user records. This is one of the
// several ways of implementing authentication on the server side. For another,
// cookie-based way please refer to the examples/chat.c in the source tree.
//
// If password is not NULL, entry is added (or modified if already exists).
// If password is NULL, entry is deleted.
//
// Return:
// 1 on success, 0 on error.
int mg_modify_passwords_file(const char *passwords_file_name,
const char *domain,
const char *user,
const char *password);
// Return information associated with the request.
struct mg_request_info *mg_get_request_info(struct mg_connection *);
// Send data to the client.
// Return:
// 0 when the connection has been closed
// -1 on error
// >0 number of bytes written on success
int mg_write(struct mg_connection *, const void *buf, size_t len);
// Send data to a websocket client wrapped in a websocket frame.
// It is unsafe to read/write to this connection from another thread.
// This function is available when mongoose is compiled with -DUSE_WEBSOCKET
//
// Return:
// 0 when the connection has been closed
// -1 on error
// >0 number of bytes written on success
int mg_websocket_write(struct mg_connection* conn, int opcode,
const char *data, size_t data_len);
// Opcodes, from http://tools.ietf.org/html/rfc6455
enum {
WEBSOCKET_OPCODE_CONTINUATION = 0x0,
WEBSOCKET_OPCODE_TEXT = 0x1,
WEBSOCKET_OPCODE_BINARY = 0x2,
WEBSOCKET_OPCODE_CONNECTION_CLOSE = 0x8,
WEBSOCKET_OPCODE_PING = 0x9,
WEBSOCKET_OPCODE_PONG = 0xa
};
// Macros for enabling compiler-specific checks for printf-like arguments.
#undef PRINTF_FORMAT_STRING
#if defined(_MSC_VER) && _MSC_VER >= 1400
#include <sal.h>
#if defined(_MSC_VER) && _MSC_VER > 1400
#define PRINTF_FORMAT_STRING(s) _Printf_format_string_ s
#else
#define PRINTF_FORMAT_STRING(s) __format_string s
#endif
#else
#define PRINTF_FORMAT_STRING(s) s
#endif
#ifdef __GNUC__
#define PRINTF_ARGS(x, y) __attribute__((format(printf, x, y)))
#else
#define PRINTF_ARGS(x, y)
#endif
// Send data to the client using printf() semantics.
//
// Works exactly like mg_write(), but allows to do message formatting.
int mg_printf(struct mg_connection *,
PRINTF_FORMAT_STRING(const char *fmt), ...) PRINTF_ARGS(2, 3);
#ifdef __rtems__
struct rtems_printer;
void rtems_print_printer_mg_printf(struct rtems_printer *, struct mg_connection *);
#endif /* __rtems__ */
// Send contents of the entire file together with HTTP headers.
void mg_send_file(struct mg_connection *conn, const char *path);
// Read data from the remote end, return number of bytes read.
// Return:
// 0 connection has been closed by peer. No more data could be read.
// < 0 read error. No more data could be read from the connection.
// > 0 number of bytes read into the buffer.
int mg_read(struct mg_connection *, void *buf, size_t len);
// Get the value of particular HTTP header.
//
// This is a helper function. It traverses request_info->http_headers array,
// and if the header is present in the array, returns its value. If it is
// not present, NULL is returned.
const char *mg_get_header(const struct mg_connection *, const char *name);
// Get a value of particular form variable.
//
// Parameters:
// data: pointer to form-uri-encoded buffer. This could be either POST data,
// or request_info.query_string.
// data_len: length of the encoded data.
// var_name: variable name to decode from the buffer
// dst: destination buffer for the decoded variable
// dst_len: length of the destination buffer
//
// Return:
// On success, length of the decoded variable.
// On error:
// -1 (variable not found).
// -2 (destination buffer is NULL, zero length or too small to hold the
// decoded variable).
//
// Destination buffer is guaranteed to be '\0' - terminated if it is not
// NULL or zero length.
int mg_get_var(const char *data, size_t data_len,
const char *var_name, char *dst, size_t dst_len);
// Fetch value of certain cookie variable into the destination buffer.
//
// Destination buffer is guaranteed to be '\0' - terminated. In case of
// failure, dst[0] == '\0'. Note that RFC allows many occurrences of the same
// parameter. This function returns only first occurrence.
//
// Return:
// On success, value length.
// On error:
// -1 (either "Cookie:" header is not present at all or the requested
// parameter is not found).
// -2 (destination buffer is NULL, zero length or too small to hold the
// value).
int mg_get_cookie(const char *cookie, const char *var_name,
char *buf, size_t buf_len);
// Download data from the remote web server.
// host: host name to connect to, e.g. "foo.com", or "10.12.40.1".
// port: port number, e.g. 80.
// use_ssl: wether to use SSL connection.
// error_buffer, error_buffer_size: error message placeholder.
// request_fmt,...: HTTP request.
// Return:
// On success, valid pointer to the new connection, suitable for mg_read().
// On error, NULL. error_buffer contains error message.
// Example:
// char ebuf[100];
// struct mg_connection *conn;
// conn = mg_download("google.com", 80, 0, ebuf, sizeof(ebuf),
// "%s", "GET / HTTP/1.0\r\nHost: google.com\r\n\r\n");
struct mg_connection *mg_download(const char *host, int port, int use_ssl,
char *error_buffer, size_t error_buffer_size,
PRINTF_FORMAT_STRING(const char *request_fmt),
...) PRINTF_ARGS(6, 7);
// Close the connection opened by mg_download().
void mg_close_connection(struct mg_connection *conn);
// File upload functionality. Each uploaded file gets saved into a temporary
// file and MG_UPLOAD event is sent.
// Return number of uploaded files.
int mg_upload(struct mg_connection *conn, const char *destination_dir);
// Convenience function -- create detached thread.
// Return: 0 on success, non-0 on error.
typedef void * (*mg_thread_func_t)(void *);
int mg_start_thread(mg_thread_func_t f, void *p);
// Return builtin mime type for the given file name.
// For unrecognized extensions, "text/plain" is returned.
const char *mg_get_builtin_mime_type(const char *file_name);
// Return Mongoose version.
const char *mg_version(void);
// URL-decode input buffer into destination buffer.
// 0-terminate the destination buffer.
// form-url-encoded data differs from URI encoding in a way that it
// uses '+' as character for space, see RFC 1866 section 8.2.1
// http://ftp.ics.uci.edu/pub/ietf/html/rfc1866.txt
// Return: length of the decoded data, or -1 if dst buffer is too small.
int mg_url_decode(const char *src, int src_len, char *dst,
int dst_len, int is_form_url_encoded);
// MD5 hash given strings.
// Buffer 'buf' must be 33 bytes long. Varargs is a NULL terminated list of
// ASCIIz strings. When function returns, buf will contain human-readable
// MD5 hash. Example:
// char buf[33];
// mg_md5(buf, "aa", "bb", NULL);
char *mg_md5(char buf[33], ...);
#ifdef __cplusplus
}
#endif // __cplusplus
#endif // MONGOOSE_HEADER_INCLUDED
cpukit/include/mqueue.h
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/**
* @file
*
* @brief POSIX Message Queues
*
* This file contains the definitions related to POSIX Message Queues.
*
* The structure of the routines is identical to that of POSIX
* Message_queues to leave the option of having unnamed message
* queues at a future date. They are currently not part of the
* POSIX standard but unnamed message_queues are. This is also
* the reason for the apparently unnecessary tracking of
* the process_shared attribute. [In addition to the fact that
* it would be trivial to add pshared to the mq_attr structure
* and have process private message queues.]
*
* This code ignores the O_RDONLY/O_WRONLY/O_RDWR flag at open
* time.
*/
/*
* COPYRIGHT (c) 1989-2011.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*/
#ifndef _MQUEUE_H
#define _MQUEUE_H
#include <unistd.h>
#if defined(_POSIX_MESSAGE_PASSING)
#include <sys/types.h>
#include <rtems/system.h>
#include <rtems/score/object.h>
/**
* @defgroup POSIX_MQUEUE POSIX Message Queues
*
* @ingroup POSIXAPI
*
*/
/**@{**/
#ifdef __cplusplus
extern "C" {
#endif
/*
* 15.1.1 Data Structures, P1003.1b-1993, p. 271
*/
/**
* Message queue id type.
*
* NOTE: Use uint32_t since all POSIX Ids are 32-bit currently.
*/
typedef uint32_t mqd_t;
/**
* This is the message queue attributes structure.
*/
struct mq_attr {
/** This is the message queue flags */
long mq_flags;
/** This is the maximum number of messages */
long mq_maxmsg;
/** This is the maximum message size */
long mq_msgsize;
/** This is the mumber of messages currently queued */
long mq_curmsgs;
};
/**
* 15.2.2 Open a Message Queue, P1003.1b-1993, p. 272
*/
mqd_t mq_open(
const char *name,
int oflag,
...
);
/**
* 15.2.2 Close a Message Queue, P1003.1b-1993, p. 275
*/
int mq_close(
mqd_t mqdes
);
/**
* @brief Remove a message queue.
*
* 15.2.2 Remove a Message Queue, P1003.1b-1993, p. 276
*
* NOTE: The structure of the routines is identical to that of POSIX
* Message_queues to leave the option of having unnamed message
* queues at a future date. They are currently not part of the
* POSIX standard but unnamed message_queues are. This is also
* the reason for the apparently unnecessary tracking of
* the process_shared attribute. [In addition to the fact that
* it would be trivial to add pshared to the mq_attr structure
* and have process private message queues.]
*
* This code ignores the O_RDONLY/O_WRONLY/O_RDWR flag at open
* time.
*/
int mq_unlink(
const char *name
);
/**
* 15.2.4 Send a Message to a Message Queue, P1003.1b-1993, p. 277
*
* NOTE; P1003.4b/D8, p. 45 adds mq_timedsend().
*/
int mq_send(
mqd_t mqdes,
const char *msg_ptr,
size_t msg_len,
unsigned int msg_prio
);
#if defined(_POSIX_TIMEOUTS)
#include <time.h>
/**
* @brief Send a message to a message queue.
*
* @see mq_send()
*/
int mq_timedsend(
mqd_t mqdes,
const char *msg_ptr,
size_t msg_len,
unsigned int msg_prio,
const struct timespec *abstime
);
#endif /* _POSIX_TIMEOUTS */
/**
* @brief Receive a message from a message queue.
*
* 15.2.5 Receive a Message From a Message Queue, P1003.1b-1993, p. 279
*
* NOTE: P1003.4b/D8, p. 45 adds mq_timedreceive().
*/
ssize_t mq_receive(
mqd_t mqdes,
char *msg_ptr,
size_t msg_len,
unsigned int *msg_prio
);
#if defined(_POSIX_TIMEOUTS)
ssize_t mq_timedreceive(
mqd_t mqdes,
char *__restrict msg_ptr,
size_t msg_len,
unsigned int *__restrict msg_prio,
const struct timespec *__restrict abstime
);
#endif /* _POSIX_TIMEOUTS */
#if defined(_POSIX_REALTIME_SIGNALS)
/**
* @brief Notify process that a message is available on a queue.
*
* 15.2.6 Notify Process that a Message is Available on a Queue,
* P1003.1b-1993, p. 280
*/
int mq_notify(
mqd_t mqdes,
const struct sigevent *notification
);
#endif /* _POSIX_REALTIME_SIGNALS */
/**
* @brief Set message queue attributes.
*
* 15.2.7 Set Message Queue Attributes, P1003.1b-1993, p. 281
*/
int mq_setattr(
mqd_t mqdes,
const struct mq_attr *__restrict mqstat,
struct mq_attr *__restrict omqstat
);
/*
* 15.2.8 Get Message Queue Attributes, P1003.1b-1993, p. 283
*/
int mq_getattr(
mqd_t mqdes,
struct mq_attr *mqstat
);
/** @} */
#ifdef __cplusplus
}
#endif
#endif /* _POSIX_MESSAGE_PASSING */
#endif
/* end of include file */
cpukit/include/pci.h
+114
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/*
* PCI library. Defines in this file was taken from FreeBSD and auto-generated
* pci_ids.h reused from RTEMS.
*
* COPYRIGHT (c) 2009 Cobham Gaisler AB.
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*/
#ifndef __PCI_H__
#define __PCI_H__
#include <pci/pcireg.h>
#include <pci/ids.h>
#define PCI_INVALID_VENDORDEVICEID 0xffffffff
#define PCID_CLASS(class, dev) ((class << 8) | dev)
#define PCID_PCI2PCI_BRIDGE PCID_CLASS(PCIC_BRIDGE, PCIS_BRIDGE_PCI)
#include <pci/access.h>
#ifdef __cplusplus
extern "C" {
#endif
/* The PCI Library have the following build time configuration options. It is
* up to the BSP header file (bsp.h) to set options properly.
*
* BSP_PCI_BIG_ENDIAN - Access inline routines will be for a big-endian PCI
* bus, if not defined the routines will assume that
* PCI is as the standard defines: little-endian.
*
* Note that drivers may be run-time configurable,
* meaning that they may adopt to either big-endian or
* little-endian PCI bus, the host driver or BSP may
* detect endianness during run-time.
*/
/* Error return values */
enum {
PCISTS_ERR = -1, /* Undefined Error */
PCISTS_OK = 0,
PCISTS_EINVAL = 1, /* Bad input arguments */
PCISTS_MSTABRT = 2, /* CFG space access error (can be ignored) */
};
/* PCI System type can be used to determine system for drivers. Normally
* the system is Host, but the peripheral configuration library also supports
* being PCI peripheral not allowed to access configuration space.
*
* The active configuration Library set this variable.
*/
enum pci_system_type {
PCI_SYSTEM_NONE = 0,
PCI_SYSTEM_HOST = 1,
PCI_SYSTEM_PERIPHERAL = 2,
};
extern enum pci_system_type pci_system_type;
/* PCI Bus Endianness. The PCI specification is little endian, however on some
* embedded systems (AT697-LEON2 for example) the PCI bus is defined as big
* endian (non-standard) in order to avoid byte-twisting.
*/
enum {
PCI_LITTLE_ENDIAN = 0,
PCI_BIG_ENDIAN = 1,
};
extern int pci_endian;
/* Return the number of PCI busses in the system */
extern int pci_bus_count(void);
/* Scan the PCI bus and print the PCI device/functions/bridges and their
* current resources and size to the system console.
*/
extern void pci_print(void);
/* Print current configuration of a single PCI device by reading PCI
* configuration space
*/
extern void pci_print_dev(pci_dev_t dev);
extern void pci_print_device(int bus, int slot, int function);
/*** PCI Configuration Space direct access routines ***/
/* Function iterates over all PCI buses/devices/functions and calls
* func(PCIDEV,arg) for each present device. The iteration is stopped if
* func() returns non-zero result the same result is returned. As long
* as func() returns zero the function will keep on iterating, when all
* devices has been processed the function return zero.
*
* The function iterates over all devices/functions on all buses by accessing
* configuration space directly (PCI RAM data structures not used). This
* function is valid to call after PCI buses have been enumrated.
*/
extern int pci_for_each(int (*func)(pci_dev_t, void*), void *arg);
/* Get PCI Configuration space BUS|SLOT|FUNC for a device matching PCI
* Vendor, Device and instance number 'index'.
*
* Return Values
* -1 pci_find_dev did not find a device matching the criterion.
* 0 device was found, *pdev was updated with the device's BUS|SLOT|FUNC
*/
extern int pci_find(uint16_t ven, uint16_t dev, int index, pci_dev_t *pdev);
#ifdef __cplusplus
}
#endif
#endif /* __PCI_H__ */
cpukit/include/pci/access.h
+258
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/* Routines to access PCI memory/configuration space and other PCI related
* functions the PCI Library provides.
*
* COPYRIGHT (c) 2010 Cobham Gaisler AB.
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*/
#ifndef __PCI_ACCESS_H__
#define __PCI_ACCESS_H__
#include <stdint.h>
#include <libcpu/byteorder.h>
#include <rtems/score/basedefs.h>
#include <pci.h>
#ifdef __cplusplus
extern "C" {
#endif
/* Identification of a PCI configuration space device (16-bit) */
typedef uint16_t pci_dev_t;
/* Create a PCI Configuration Space ID */
#define PCI_DEV(bus, slot, func) (((bus)<<8) | ((slot)<<3) | (func))
/* Get Bus of a PCI Configuration Space ID */
#define PCI_DEV_BUS(dev) (((dev) >> 8) & 0xff)
/* Get Slot/Device of a PCI Configuration Space ID */
#define PCI_DEV_SLOT(dev) (((dev) >> 3) & 0x1f)
/* Get Function of a PCI Configuration Space ID */
#define PCI_DEV_FUNC(dev) ((dev) & 0x7)
/* Get Device and Function of a PCI Configuration Space ID */
#define PCI_DEV_DEVFUNC(dev) ((dev) & 0xff)
/* Expand Device into argument lists */
#define PCI_DEV_EXPAND(dev) PCI_DEV_BUS((dev)), PCI_DEV_SLOT((dev)), PCI_DEV_FUNC((dev))
/* Configuration Space Read/Write Operations */
struct pci_cfg_ops {
/* Configuration Space Access and Setup Routines */
int (*read8)(pci_dev_t dev, int ofs, uint8_t *data);
int (*read16)(pci_dev_t dev, int ofs, uint16_t *data);
int (*read32)(pci_dev_t dev, int ofs, uint32_t *data);
int (*write8)(pci_dev_t dev, int ofs, uint8_t data);
int (*write16)(pci_dev_t dev, int ofs, uint16_t data);
int (*write32)(pci_dev_t dev, int ofs, uint32_t data);
};
/* Read a register over PCI I/O Space, and swap it if necessary (due to
* PCI endianness)
*/
struct pci_io_ops {
uint8_t (*read8)(uint8_t *adr);
uint16_t(*read16)(uint16_t *adr);
uint32_t (*read32)(uint32_t *adr);
void (*write8)(uint8_t *adr, uint8_t data);
void (*write16)(uint16_t *adr, uint16_t data);
void (*write32)(uint32_t *adr, uint32_t data);
};
/* Read a register over PCI Memory Space (non-prefetchable memory), and
* swap it if necessary (due to PCI endianness)
*/
struct pci_memreg_ops {
uint8_t (*ld8)(uint8_t *adr);
void (*st8)(uint8_t *adr, uint8_t data);
uint16_t(*ld_le16)(uint16_t *adr);
void (*st_le16)(uint16_t *adr, uint16_t data);
uint16_t(*ld_be16)(uint16_t *adr);
void (*st_be16)(uint16_t *adr, uint16_t data);
uint32_t (*ld_le32)(uint32_t *adr);
void (*st_le32)(uint32_t *adr, uint32_t data);
uint32_t (*ld_be32)(uint32_t *adr);
void (*st_be32)(uint32_t *adr, uint32_t data);
};
typedef uint8_t (*pci_ld8_t)(uint8_t *adr);
typedef void (*pci_st8_t)(uint8_t *adr, uint8_t data);
typedef uint16_t(pci_ld16_t)(uint16_t *adr);
typedef void (*pci_st16_t)(uint16_t *adr, uint16_t data);
typedef uint32_t (*pci_ld32_t)(uint32_t *adr);
typedef void (*pci_st32_t)(uint32_t *adr, uint32_t data);
struct pci_access_drv {
/* Configuration */
struct pci_cfg_ops cfg;
/* I/O Access operations */
struct pci_io_ops io;
/* Registers over Memory Access operations. Note that these funcs
* are only for code that need to be compatible with both Big-Endian
* and Little-Endian PCI bus or for some other reason need function
* pointers to access functions. Normally drivers use the inline
* functions for Registers-over-Memory access to avoid extra function
* call.
*/
struct pci_memreg_ops *memreg;
/* Translate from PCI address to CPU address (dir=0). Translate
* CPU address to PCI address (dir!=0). The address will can be
* used to perform I/O access or memory access by CPU or PCI DMA
* peripheral.
*
* address In/Out. CPU address or PCI address.
* type Access type. 1=I/O, 2=MEMIO, 3=MEM
* dir Translate direction. 0=PCI-to-CPU, 0!=CPU-to-PCI,
*
* Return Value
* 0 = Success
* -1 = Requested Address not mapped into other address space
* i.e. not accessible
*/
int (*translate)(uint32_t *address, int type, int dir);
};
/* Access Routines valid after a PCI-Access-Driver has registered */
extern struct pci_access_drv pci_access_ops;
/* Register PCI Access Driver */
extern int pci_access_drv_register(struct pci_access_drv *drv);
/* Set/unset bits in command and status register of a PCI device */
extern void pci_modify_cmdsts(pci_dev_t dev, uint32_t mask, uint32_t val);
/* Enable Memory in command register */
RTEMS_INLINE_ROUTINE void pci_mem_enable(pci_dev_t dev)
{
pci_modify_cmdsts(dev, PCIM_CMD_MEMEN, PCIM_CMD_MEMEN);
}
RTEMS_INLINE_ROUTINE void pci_mem_disable(pci_dev_t dev)
{
pci_modify_cmdsts(dev, PCIM_CMD_MEMEN, 0);
}
RTEMS_INLINE_ROUTINE void pci_io_enable(pci_dev_t dev)
{
pci_modify_cmdsts(dev, PCIM_CMD_PORTEN, PCIM_CMD_PORTEN);
}
RTEMS_INLINE_ROUTINE void pci_io_disable(pci_dev_t dev)
{
pci_modify_cmdsts(dev, PCIM_CMD_PORTEN, 0);
}
RTEMS_INLINE_ROUTINE void pci_master_enable(pci_dev_t dev)
{
pci_modify_cmdsts(dev, PCIM_CMD_BUSMASTEREN, PCIM_CMD_BUSMASTEREN);
}
RTEMS_INLINE_ROUTINE void pci_master_disable(pci_dev_t dev)
{
pci_modify_cmdsts(dev, PCIM_CMD_BUSMASTEREN, 0);
}
/* Configuration Space Access Read Routines */
extern int pci_cfg_r8(pci_dev_t dev, int ofs, uint8_t *data);
extern int pci_cfg_r16(pci_dev_t dev, int ofs, uint16_t *data);
extern int pci_cfg_r32(pci_dev_t dev, int ofs, uint32_t *data);
/* Configuration Space Access Write Routines */
extern int pci_cfg_w8(pci_dev_t dev, int ofs, uint8_t data);
extern int pci_cfg_w16(pci_dev_t dev, int ofs, uint16_t data);
extern int pci_cfg_w32(pci_dev_t dev, int ofs, uint32_t data);
/* Read a register over PCI I/O Space */
extern uint8_t pci_io_r8(uint32_t adr);
extern uint16_t pci_io_r16(uint32_t adr);
extern uint32_t pci_io_r32(uint32_t adr);
/* Write a register over PCI I/O Space */
extern void pci_io_w8(uint32_t adr, uint8_t data);
extern void pci_io_w16(uint32_t adr, uint16_t data);
extern void pci_io_w32(uint32_t adr, uint32_t data);
/* Translate PCI address into CPU accessible address */
RTEMS_INLINE_ROUTINE int pci_pci2cpu(uint32_t *address, int type)
{
return pci_access_ops.translate(address, type, 0);
}
/* Translate CPU accessible address into PCI address (for DMA) */
RTEMS_INLINE_ROUTINE int pci_cpu2pci(uint32_t *address, int type)
{
return pci_access_ops.translate(address, type, 1);
}
/*** Read/Write a register over PCI Memory Space ***/
RTEMS_INLINE_ROUTINE uint8_t pci_ld8(volatile uint8_t *addr)
{
return *addr;
}
RTEMS_INLINE_ROUTINE void pci_st8(volatile uint8_t *addr, uint8_t val)
{
*addr = val;
}
/* Registers-over-Memory Space access routines. The routines are not inlined
* so it is possible during run-time to select which function implemention
* to use. The use of these functions are not recommended since it will have a
* performance penalty.
*
* 8-bit accesses are the same for Little and Big endian PCI buses.
*/
uint8_t pci_mem_ld8(uint8_t *adr);
void pci_mem_st8(uint8_t *adr, uint8_t data);
/* Registers-over-Memory Space - Generic Big endian PCI bus definitions */
uint16_t pci_mem_be_ld_le16(uint16_t *adr);
uint16_t pci_mem_be_ld_be16(uint16_t *adr);
uint32_t pci_mem_be_ld_le32(uint32_t *adr);
uint32_t pci_mem_be_ld_be32(uint32_t *adr);
void pci_mem_be_st_le16(uint16_t *adr, uint16_t data);
void pci_mem_be_st_be16(uint16_t *adr, uint16_t data);
void pci_mem_be_st_le32(uint32_t *adr, uint32_t data);
void pci_mem_be_st_be32(uint32_t *adr, uint32_t data);
/* Registers-over-Memory Space - Generic Little endian PCI bus definitions */
uint16_t pci_mem_le_ld_le16(uint16_t *adr);
uint16_t pci_mem_le_ld_be16(uint16_t *adr);
uint32_t pci_mem_le_ld_le32(uint32_t *adr);
uint32_t pci_mem_le_ld_be32(uint32_t *adr);
void pci_mem_le_st_le16(uint16_t *adr, uint16_t data);
void pci_mem_le_st_be16(uint16_t *adr, uint16_t data);
void pci_mem_le_st_le32(uint32_t *adr, uint32_t data);
void pci_mem_le_st_be32(uint32_t *adr, uint32_t data);
/* Get Read/Write function for accessing a register over PCI Memory Space
* (non-inline functions).
*
* Arguments
* wr 0(Read), 1(Write)
* size 1(Byte), 2(Word), 4(Double Word)
* func Where function pointer will be stored
* endian PCI_LITTLE_ENDIAN or PCI_BIG_ENDIAN
* type 1(I/O), 3(REG over MEM), 4(CFG)
*
* Return
* 0 Found function
* others No such function defined by host driver or BSP
*/
extern int pci_access_func(int wr, int size, void **func, int endian, int type);
/* Predefined functions for Host drivers or BSPs that define the
* register-over-memory space functions operations.
*/
extern struct pci_memreg_ops pci_mem_le_ops; /* For Little-Endian PCI bus */
extern struct pci_memreg_ops pci_mem_be_ops; /* For Big-Endian PCI bus */
#ifdef __cplusplus
}
#endif
#endif /* !__PCI_ACCESS_H__ */
cpukit/include/pci/cfg.h
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/* PCI Configuration Library
*
* COPYRIGHT (c) 2010 Cobham Gaisler AB.
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*/
/* Four versions of the library exists:
* - auto configuration (default)
* - read configuration from PnP (inherit BIOS set up)
* - static configuration (user defined config)
* - peripheral configuration, no CFG space accesses are possible instead a
* device tree known at compile-time have been built in.
* all versions are defined through here.
*/
#ifndef __PCI_CFG_H__
#define __PCI_CFG_H__
#include <pci.h>
/* PCI Configuration library */
/* Return the number of PCI buses in system */
extern int pci_bus_count(void);
/* PCI Address assigned to BARs which failed to fit into the PCI Window or
* is disabled by any other cause.
*/
extern uint32_t pci_invalid_address;
/* PCI Configuration Library of the system */
enum {
PCI_CONFIG_LIB_NONE = 0,
PCI_CONFIG_LIB_AUTO = 1,
PCI_CONFIG_LIB_STATIC = 2,
PCI_CONFIG_LIB_READ = 3,
PCI_CONFIG_LIB_PERIPHERAL = 4,
};
extern const int pci_config_lib_type;
/* Configuration library function pointers, these are set in <rtems/confdefs.h>
* by project configuration or by the BSP. The configuration will pull in the
* PCI Library needed and the PCI initialization functions will call these
* functions on initialization from the host driver.
*/
extern int (*pci_config_lib_init)(void);
extern void (*pci_config_lib_register)(void *config);
/* Configure PCI devices and bridges, and setup the RAM data structures
* describing the PCI devices currently present in the system.
*
* Returns 0 on success, -1 on failure.
*/
extern int pci_config_init(void);
/* Register a config-library specific configuration used by the libarary in
* pci_config_init().
*/
extern void pci_config_register(void *config);
/* Print current PCI configuration (C-code) to terminal, can be used in
* static and peripheral PCI configuration library. The configuration is
* taken from the current configuration library setup.
*/
extern void pci_cfg_print(void);
struct pci_bus; /* Bridge Device and secondary bus information */
struct pci_dev; /* Device/function */
struct pci_res; /* Resource: BAR, ROM or Bridge Window */
/* The Host Bridge and all subdevices (the PCI RAM data structure) */
extern struct pci_bus pci_hb;
/* Arguments for pci_for_each_child() search option */
#define SEARCH_CHILDREN 0 /* direct children of bus only */
#define SEARCH_DEPTH 1 /* all children of bus */
/* Iterate over all PCI devices on a bus (see search options) and call func(),
* iteration is stopped if a non-zero value is returned by func().
*
* The function iterates over the PCI RAM data structure, it is not
* available until after all devices have been found and pci_hb is populated,
* typically after pci_config_init() is called.
*
* search options: 0 (no child buses), 1 (depth first, recursive)
*
* Return Values
* 0 All PCI devices were processed, func() returned 0 on every call
* X func() returned non-zero X value, the search was stopped
*/
extern int pci_for_each_child(
struct pci_bus *bus,
int (*func)(struct pci_dev *, void *arg),
void *arg,
int search);
/* Depth first search of all PCI devices in PCI RAM data structure and call
* func(dev, arg), iteration is stopped if a non-zero value is returned by
* func().
*
* The function iterates over the PCI RAM data structure, it is not
* available until after all devices have been found and pci_hb is populated,
* typically after pci_config_init() is called.
*
* Return Values
* 0 All PCI devices were processed, func() returned 0 on every call
* X func() returned non-zero X value, the search was stopped
*/
extern int pci_for_each_dev(
int (*func)(struct pci_dev *, void *arg),
void *arg);
/* Get PCI device from RAM device tree for a device matching PCI Vendor, Device
* and instance number 'index'.
*
* Return Values
* -1 pci_find_dev did not find a device matching the criterion.
* 0 device was found, *ppdev was updated with the PCI device address
*/
extern int pci_find_dev(uint16_t ven, uint16_t dev, int index,
struct pci_dev **ppdev);
/* Get PCI device from RAM device tree by BUS|SLOT|FUNC.
*
* Return Values
* -1 pci_get_dev did not find a device matching the criterion
* 0 device was found, *ppdev was updated with the PCI device address
*/
extern int pci_get_dev(pci_dev_t pcidev, struct pci_dev **ppdev);
/* Resource flags */
#define PCI_RES_IO 1
#define PCI_RES_MEMIO 2
#define PCI_RES_MEM_PREFETCH 1
#define PCI_RES_MEM (PCI_RES_MEMIO | PCI_RES_MEM_PREFETCH)
#define PCI_RES_TYPE_MASK 0x3
#define PCI_RES_IO32 0x08
#define PCI_RES_FAIL 0x10 /* Alloc Failed */
/* BAR Resouces entry */
struct pci_res {
struct pci_res *next;
uint32_t size;
uint32_t boundary;
unsigned char flags; /* I/O, MEM or MEMIO */
unsigned char bar;
/* Assigned Resource (PCI address), zero if not assigned */
uint32_t start;
uint32_t end;
};
/* Get Device from resource pointer. bar is the index of the pci_dev.resources
* array and used to get the device base address of which the resource is
* associated with.
*/
#define RES2DEV(res) ((struct pci_dev *) \
((uintptr_t)res - (uintptr_t)(res->bar * (sizeof(struct pci_res)))))
/* Device flags */
#define PCI_DEV_BRIDGE 0x01 /* Device is a Bridge (struct pci_bus) */
#define PCI_DEV_RES_FAIL 0x02 /* Resource alloction for device BARs failed */
/* Bus Flags */
#define PCI_BUS_IO 0x01 /* 16-bit I/O address decoding */
#define PCI_BUS_MEMIO 0x02 /* Bus support non-prefetchable mem (always) */
#define PCI_BUS_MEM 0x04 /* Bus support prefetchable memory space */
#define PCI_BUS_IO32 0x08 /* 32-bit I/O address decoding */
#define BRIDGE_RES_COUNT 2 /* Number of BAR resources a bridge can have */
#define BUS_RES_START BRIDGE_RES_COUNT
/* Bus Resources Array */
enum {
BUS_RES_IO = 0,
BUS_RES_MEMIO = 1,
BUS_RES_MEM = 2,
};
/* Device Resource array index meaning */
enum {
/* A Device has up to 6 BARs and an optional ROM BAR */
DEV_RES_BAR1 = 0,
DEV_RES_BAR2 = 1,
DEV_RES_BAR3 = 2,
DEV_RES_BAR4 = 3,
DEV_RES_BAR5 = 4,
DEV_RES_BAR6 = 5,
DEV_RES_ROM = 6,
/* Bridges have 2 BARs (BAR1 and BAR2) and 3 Windows to secondary bus
* and an optional ROM BAR
*/
BRIDGE_RES_BAR1 = 0,
BRIDGE_RES_BAR2 = 1,
BRIDGE_RES_IO = 2,
BRIDGE_RES_MEMIO = 3,
BRIDGE_RES_MEM = 4,
BRIDGE_RES_UNUSED1 = 5,
BRIDGE_RES_ROM = 6,
};
/* Maximum Number of Resources of a device */
#define DEV_RES_CNT (DEV_RES_ROM + 1)
/* PCI Device (Bus|Slot|Function) description */
struct pci_dev {
struct pci_res resources[DEV_RES_CNT]; /* must be topmost field */
struct pci_dev *next;
struct pci_bus *bus;
pci_dev_t busdevfun;
uint8_t flags;
uint8_t sysirq;
uint16_t vendor;
uint16_t device;
uint16_t subvendor;
uint16_t subdevice;
uint32_t classrev;
/* static configuration settings */
uint16_t command;
};
/* PCI Bus description */
struct pci_bus {
struct pci_dev dev; /* PCI Bridge */
struct pci_dev *devs; /* Devices on child (secondary) Bus */
unsigned int flags;
/* Bridge Information */
int num; /* Bus number (0=Root-PCI-bus) */
int pri; /* Primary Bus Number */
int sord; /* Subordinate Buses (Child bus count) */
#if defined(PCI_CFG_AUTO_LIB)
/* Resources of devices on bus. USED INTERNALLY IN AUTO-CFG LIBRARY.
*
* BUS_RES_IO = 0: I/O resources
* BUS_RES_MEMIO = 1: Prefetchable memory resources
* BUS_RES_MEM = 2: Non-Prefetchable memory resources
*/
struct pci_res *busres[3];
#endif
};
#include <pci/cfg_auto.h>
#include <pci/cfg_static.h>
#include <pci/cfg_read.h>
#include <pci/cfg_peripheral.h>
#endif
cpukit/include/pci/cfg_auto.h
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/* PCI Auto Configuration Library
*
* COPYRIGHT (c) 2010 Cobham Gaisler AB.
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*/
#ifndef __PCI_CFG_AUTO_H__
#define __PCI_CFG_AUTO_H__
#define CFGOPT_NOSETUP_IRQ 0x1 /* Skip IRQ setup */
/* PCI Memory Layout setup, used by the auto-config library in order to
* determine the addresses of PCI BARs and Buses.
*
* All addresses are in PCI address space, the actual address the CPU access
* may be different, and taken care of elsewhere.
*/
struct pci_auto_setup {
int options;
/* PCI prefetchable Memory space (OPTIONAL) */
uint32_t mem_start;
uint32_t mem_size; /* 0 = Use MEMIO space for prefetchable mem BARs */
/* PCI non-prefetchable Memory */
uint32_t memio_start;
uint32_t memio_size;
/* PCI I/O space (OPTIONAL) */
uint32_t io_start;
uint32_t io_size; /* 0 = No I/O space */
/* Get System IRQ connected to a PCI line of a PCI device on bus0.
* The return IRQ value zero equals no IRQ (IRQ disabled).
*/
uint8_t (*irq_map)(pci_dev_t dev, int irq_pin);
/* IRQ Bridge routing. Returns the interrupt pin (0..3 = A..D) that
* a device is connected to on parent bus.
*/
int (*irq_route)(pci_dev_t dev, int irq_pin);
};
/* Do PCI initialization: Enumrate buses, scan buses for devices, assign
* I/O MEM and MEMIO resources, assign IRQ and so on.
*/
extern int pci_config_auto(void);
/* Register a configuration for the auto library (struct pci_auto_setup *) */
extern void pci_config_auto_register(void *config);
/* PCI memory map */
extern struct pci_auto_setup pci_auto_cfg;
#endif
cpukit/include/pci/cfg_peripheral.h
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/* PCI Peripheral Configuration Library
*
* COPYRIGHT (c) 2010 Cobham Gaisler AB.
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*/
#ifndef __PCI_CFG_PERIPHERAL_H__
#define __PCI_CFG_PERIPHERAL_H__
/* The user must provide a PCI configuration using the "struct pci_bus pci_hb"
* structure. Nothing else than setting pci_system_type and pci_bus_cnt is done
* by the peripheral library.
*/
extern int pci_config_peripheral(void);
#endif
cpukit/include/pci/cfg_read.h
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/* PCI Read Configuration Library. Read current config that bootloader/BIOS
* has setup.
*
* COPYRIGHT (c) 2010 Cobham Gaisler AB.
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*/
#ifndef __PCI_CFG_READ_H__
#define __PCI_CFG_READ_H__
/* Build PCI device tree in "struct pci_bus pci_hb" according to current setup
* in hardware. Devices/buses are created by reading the resource assignments
* that the BIOS/bootloader has already setup for us.
*/
extern int pci_config_read(void);
#endif
cpukit/include/pci/cfg_static.h
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/* Static PCI Auto Configuration Library
*
* COPYRIGHT (c) 2010 Cobham Gaisler AB.
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*/
#ifndef __PCI_CFG_STATIC_H__
#define __PCI_CFG_STATIC_H__
/* This function initializes all buses and device accorind to a user defined
* "static" configuration. The configuration can manually created with C
* data structures. Or it can be automatically created on a running target
* using the pci_cfg_print() routine after the AUTO or READ Configuration
* Library has setup the PCI bus
*/
extern int pci_config_static(void);
#endif
cpukit/include/pci/ids.h
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cpukit/include/pci/ids_extra.h
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/* RTEMS local PCI data base */
/* Only included from pci_ids.h */
#ifndef __PCI_IDS_H__
#error pci/ids_extra.h should only be included from pci/ids.h
#endif
/* Gaisler PCI IDs */
#define PCIID_VENDOR_GAISLER 0x1AC8
#define PCIID_VENDOR_GAISLER_OLD 0x16E3
/* Gaisler PCI Devices */
#define PCIID_DEVICE_GR_RASTA_IO 0x0010 /* GR-RASTA-IO */
#define PCIID_DEVICE_GR_RASTA_IO_OLD 0x0210 /* old GR-RASTA-IO ID*/
#define PCIID_DEVICE_GR_RASTA_TMTC 0x0011 /* GR-RASTA-TMTC */
#define PCIID_DEVICE_GR_RASTA_ADCDAC 0x0014 /* GR-RASTA-ADCDAC */
#define PCIID_DEVICE_GR_701 0x0701 /* GR-701 */
#define PCIID_DEVICE_GR_TMTC_1553 0x0198 /* GR-TMTC-1553 */
#define PCIID_DEVICE_GR_RASTA_SPW_RTR 0x0062 /* GR-RASTA-SPW-ROUTER */
#define PCIID_DEVICE_GR_LEON4_N2X 0x0061 /* GR-CPCI-LEON4-N2X */
#define PCIID_DEVICE_GR_NGMP_PROTO 0x0064 /* GR-NGMP_PROTO */
#define PCIID_DEVICE_GR_CPCI_GR740 0x0740 /* GR-CPCI-GR740 */
cpukit/include/pci/irq.h
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/* PCI IRQ Library
*
* COPYRIGHT (c) 2010 Cobham Gaisler AB.
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*/
/* IRQ handling does not have so much with PCI to do, this library depends
* on the BSP to implement shared interrupts.
*/
#ifndef __PCI_IRQ_H__
#define __PCI_IRQ_H__
#include <rtems/irq-extension.h>
#include <rtems/score/basedefs.h>
/*
* FIXME: This should be available via the IRQ extensions API.
*
* https://devel.rtems.org/ticket/3269
*/
void BSP_shared_interrupt_clear(int irq);
void BSP_shared_interrupt_unmask(int irq);
void BSP_shared_interrupt_mask(int irq);
/* PCI Handler (ISR) called when IRQ is generated by any of the PCI devices
* connected to the same PCI IRQ Pin. This has been defined the same way as
* rtems_interrupt_handler in order for BSPs to "direct-map" the register
* and unregister functions rtems_interrupt_handler_install/remove
*/
typedef void (*pci_isr)(void *arg);
/* Get assigned system IRQ to a PCI Device. If no IRQ 0 is returned */
extern int pci_dev_irq(pci_dev_t dev);
/* Register shared PCI IRQ handler, but does not enable it. The system interrupt
* number is read from the PCI board's PCI configuration space header iline
* field. The iline field is initialized by the PCI subsystem during start up,
* the ipin field is translated into a system IRQ and written to iline. The
* board's driver should use the iline field as the irq argument to this
* function.
*
* Arguments
* irq System IRQ number, normally taken from the PCI configuration area
* isr Function pointer to the ISR
* arg Second argument to function isr
*/
RTEMS_INLINE_ROUTINE int pci_interrupt_register(int irq, const char *info,
pci_isr isr, void *arg)
{
return rtems_interrupt_handler_install(irq, info,
RTEMS_INTERRUPT_SHARED, isr,
arg);
}
/* Unregister previously registered shared PCI IRQ handler
*
* Arguments
* irq System IRQ number, normally taken from the PCI configuration area
* isr Function pointer to the ISR
* arg Second argument to function isr
*/
RTEMS_INLINE_ROUTINE int pci_interrupt_unregister(int irq, pci_isr isr,
void *arg)
{
return rtems_interrupt_handler_remove(irq, isr, arg);
}
/* Enable shared PCI IRQ handler. This function will unmask the interrupt
* controller and mark this interrupt handler ready to handle interrupts. Note
* that since it is a shared interrupt handler service the interrupt may
* already be enabled, however no calls to this specific handler is made
* until it is enabled.
*
* Arguments
* irq System IRQ number, normally taken from the PCI configuration area
* isr Function pointer to the ISR
* arg Second argument to function isr
*/
RTEMS_INLINE_ROUTINE void pci_interrupt_unmask(int irq)
{
BSP_shared_interrupt_unmask(irq);
}
/* Disable shared PCI IRQ handler. This function will mask the interrupt
* controller and mark this interrupt handler not ready to receive interrupts.
* Note that since it is a shared interrupt handler service the interrupt may
* still be enabled, however no calls to this specific handler is made
* while it is disabled.
*
* Arguments
* irq System IRQ number, normally taken from the PCI configuration area
* isr Function pointer to the ISR
* arg Second argument to function isr
*/
RTEMS_INLINE_ROUTINE void pci_interrupt_mask(int irq)
{
BSP_shared_interrupt_mask(irq);
}
/* Acknowledge the interrupt controller by writing to the interrupt controller.
* Note that since it is a shared interrupt handler service, clearing the
* interrupt source may affect other ISRs registered to this IRQ.
*
* Arguments
* irq System IRQ number, normally taken from the PCI configuration area
* isr Function pointer to the ISR
* arg Second argument to function isr
*/
RTEMS_INLINE_ROUTINE void pci_interrupt_clear(int irq)
{
BSP_shared_interrupt_clear(irq);
}
#endif /* !__PCI_IRQ_H__ */
cpukit/include/pci/pcireg.h
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cpukit/include/rpc/auth.h
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/*
* Sun RPC is a product of Sun Microsystems, Inc. and is provided for
* unrestricted use provided that this legend is included on all tape
* media and as a part of the software program in whole or part. Users
* may copy or modify Sun RPC without charge, but are not authorized
* to license or distribute it to anyone else except as part of a product or
* program developed by the user.
*
* SUN RPC IS PROVIDED AS IS WITH NO WARRANTIES OF ANY KIND INCLUDING THE
* WARRANTIES OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE, OR ARISING FROM A COURSE OF DEALING, USAGE OR TRADE PRACTICE.
*
* Sun RPC is provided with no support and without any obligation on the
* part of Sun Microsystems, Inc. to assist in its use, correction,
* modification or enhancement.
*
* SUN MICROSYSTEMS, INC. SHALL HAVE NO LIABILITY WITH RESPECT TO THE
* INFRINGEMENT OF COPYRIGHTS, TRADE SECRETS OR ANY PATENTS BY SUN RPC
* OR ANY PART THEREOF.
*
* In no event will Sun Microsystems, Inc. be liable for any lost revenue
* or profits or other special, indirect and consequential damages, even if
* Sun has been advised of the possibility of such damages.
*
* Sun Microsystems, Inc.
* 2550 Garcia Avenue
* Mountain View, California 94043
*
* from: @(#)auth.h 1.17 88/02/08 SMI
* from: @(#)auth.h 2.3 88/08/07 4.0 RPCSRC
* $FreeBSD: src/include/rpc/auth.h,v 1.15 1999/08/27 23:45:02 peter Exp $
*/
/*
* auth.h, Authentication interface.
*
* Copyright (C) 1984, Sun Microsystems, Inc.
*
* The data structures are completely opaque to the client. The client
* is required to pass a AUTH * to routines that create rpc
* "sessions".
*/
#ifndef _RPC_AUTH_H
#define _RPC_AUTH_H
#include <sys/cdefs.h>
#include <sys/socket.h>
#include <rpc/xdr.h>
#define MAX_AUTH_BYTES 400
#define MAXNETNAMELEN 255 /* maximum length of network user's name */
/*
* Status returned from authentication check
*/
enum auth_stat {
AUTH_OK=0,
/*
* failed at remote end
*/
AUTH_BADCRED=1, /* bogus credentials (seal broken) */
AUTH_REJECTEDCRED=2, /* client should begin new session */
AUTH_BADVERF=3, /* bogus verifier (seal broken) */
AUTH_REJECTEDVERF=4, /* verifier expired or was replayed */
AUTH_TOOWEAK=5, /* rejected due to security reasons */
/*
* failed locally
*/
AUTH_INVALIDRESP=6, /* bogus response verifier */
AUTH_FAILED=7, /* some unknown reason */
_AUTH_STAT = 0xffffffff
};
union des_block {
struct {
u_int32_t high;
u_int32_t low;
} key;
char c[8];
};
typedef union des_block des_block;
__BEGIN_DECLS
extern bool_t xdr_des_block (XDR *, des_block *);
__END_DECLS
/*
* Authentication info. Opaque to client.
*/
struct opaque_auth {
enum_t oa_flavor; /* flavor of auth */
caddr_t oa_base; /* address of more auth stuff */
u_int oa_length; /* not to exceed MAX_AUTH_BYTES */
};
__BEGIN_DECLS
bool_t xdr_opaque_auth (XDR *xdrs, struct opaque_auth *ap);
__END_DECLS
/*
* Auth handle, interface to client side authenticators.
*/
typedef struct __rpc_auth {
struct opaque_auth ah_cred;
struct opaque_auth ah_verf;
union des_block ah_key;
struct auth_ops {
void (*ah_nextverf) (struct __rpc_auth *);
/* nextverf & serialize */
int (*ah_marshal) (struct __rpc_auth *, XDR *);
/* validate verifier */
int (*ah_validate) (struct __rpc_auth *,
struct opaque_auth *);
/* refresh credentials */
int (*ah_refresh) (struct __rpc_auth *);
/* destroy this structure */
void (*ah_destroy) (struct __rpc_auth *);
} *ah_ops;
caddr_t ah_private;
} AUTH;
/*
* Authentication ops.
* The ops and the auth handle provide the interface to the authenticators.
*
* AUTH *auth;
* XDR *xdrs;
* struct opaque_auth verf;
*/
#define AUTH_NEXTVERF(auth) \
((*((auth)->ah_ops->ah_nextverf))(auth))
#define auth_nextverf(auth) \
((*((auth)->ah_ops->ah_nextverf))(auth))
#define AUTH_MARSHALL(auth, xdrs) \
((*((auth)->ah_ops->ah_marshal))(auth, xdrs))
#define auth_marshall(auth, xdrs) \
((*((auth)->ah_ops->ah_marshal))(auth, xdrs))
#define AUTH_VALIDATE(auth, verfp) \
((*((auth)->ah_ops->ah_validate))((auth), verfp))
#define auth_validate(auth, verfp) \
((*((auth)->ah_ops->ah_validate))((auth), verfp))
#define AUTH_REFRESH(auth) \
((*((auth)->ah_ops->ah_refresh))(auth))
#define auth_refresh(auth) \
((*((auth)->ah_ops->ah_refresh))(auth))
#define AUTH_DESTROY(auth) \
((*((auth)->ah_ops->ah_destroy))(auth))
#define auth_destroy(auth) \
((*((auth)->ah_ops->ah_destroy))(auth))
extern struct opaque_auth _null_auth;
/*
* These are the various implementations of client side authenticators.
*/
/*
* Unix style authentication
* AUTH *authunix_create(machname, uid, gid, len, aup_gids)
* char *machname;
* int uid;
* int gid;
* int len;
* int *aup_gids;
*/
__BEGIN_DECLS
struct sockaddr_in;
extern AUTH *authunix_create (char *, int, int, int, int *);
extern AUTH *authunix_create_default (void);
extern AUTH *authnone_create (void);
__END_DECLS
/* Forward compatibility with TI-RPC */
#define authsys_create authunix_create
#define authsys_create_default authunix_create_default
/*
* DES style authentication
* AUTH *authdes_create(servername, window, timehost, ckey)
* char *servername; - network name of server
* u_int window; - time to live
* struct sockaddr *timehost; - optional hostname to sync with
* des_block *ckey; - optional conversation key to use
*/
__BEGIN_DECLS
extern AUTH *authdes_create ( char *, u_int, struct sockaddr *, des_block * );
#ifdef NOTYET
/*
* TI-RPC supports this call, but it requires the inclusion of
* NIS+-specific headers which would require the inclusion of other
* headers which would result in a tangled mess. For now, the NIS+
* code prototypes this routine internally.
*/
extern AUTH *authdes_pk_create ( char *, netobj *, u_int,
struct sockaddr *, des_block *,
nis_server * );
#endif
__END_DECLS
/*
* Netname manipulation routines.
*/
__BEGIN_DECLS
extern int netname2user ( char *, uid_t *, gid_t *, int *, gid_t *);
extern int netname2host ( char *, char *, int );
extern int getnetname ( char * );
extern int user2netname ( char *, uid_t, char * );
extern int host2netname ( char *, char *, char * );
extern void passwd2des ( char *, char * );
__END_DECLS
/*
* Keyserv interface routines.
* XXX Should not be here.
*/
#ifndef HEXKEYBYTES
#define HEXKEYBYTES 48
#endif
typedef char kbuf[HEXKEYBYTES];
typedef char *namestr;
struct netstarg {
kbuf st_priv_key;
kbuf st_pub_key;
namestr st_netname;
};
__BEGIN_DECLS
extern int key_decryptsession ( const char *, des_block * );
extern int key_decryptsession_pk ( char *, netobj *, des_block * );
extern int key_encryptsession ( const char *, des_block * );
extern int key_encryptsession_pk ( char *, netobj *, des_block * );
extern int key_gendes ( des_block * );
extern int key_setsecret ( const char * );
extern int key_secretkey_is_set ( void );
extern int key_setnet ( struct netstarg * );
extern int key_get_conv ( char *, des_block * );
__END_DECLS
/*
* Publickey routines.
*/
__BEGIN_DECLS
extern int getpublickey ( char *, char * );
extern int getpublicandprivatekey ( char *, char * );
extern int getsecretkey ( char *, char *, char * );
__END_DECLS
#define AUTH_NONE 0 /* no authentication */
#define AUTH_NULL 0 /* backward compatibility */
#define AUTH_UNIX 1 /* unix style (uid, gids) */
#define AUTH_SYS 1 /* forward compatibility */
#define AUTH_SHORT 2 /* short hand unix style */
#define AUTH_DES 3 /* des style (encrypted timestamps) */
#endif /* !_RPC_AUTH_H */
cpukit/include/rpc/auth_unix.h
+85
View File
@@ -0,0 +1,85 @@
/*
* Sun RPC is a product of Sun Microsystems, Inc. and is provided for
* unrestricted use provided that this legend is included on all tape
* media and as a part of the software program in whole or part. Users
* may copy or modify Sun RPC without charge, but are not authorized
* to license or distribute it to anyone else except as part of a product or
* program developed by the user.
*
* SUN RPC IS PROVIDED AS IS WITH NO WARRANTIES OF ANY KIND INCLUDING THE
* WARRANTIES OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE, OR ARISING FROM A COURSE OF DEALING, USAGE OR TRADE PRACTICE.
*
* Sun RPC is provided with no support and without any obligation on the
* part of Sun Microsystems, Inc. to assist in its use, correction,
* modification or enhancement.
*
* SUN MICROSYSTEMS, INC. SHALL HAVE NO LIABILITY WITH RESPECT TO THE
* INFRINGEMENT OF COPYRIGHTS, TRADE SECRETS OR ANY PATENTS BY SUN RPC
* OR ANY PART THEREOF.
*
* In no event will Sun Microsystems, Inc. be liable for any lost revenue
* or profits or other special, indirect and consequential damages, even if
* Sun has been advised of the possibility of such damages.
*
* Sun Microsystems, Inc.
* 2550 Garcia Avenue
* Mountain View, California 94043
*
* from: @(#)auth_unix.h 1.8 88/02/08 SMI
* from: @(#)auth_unix.h 2.2 88/07/29 4.0 RPCSRC
* $FreeBSD: src/include/rpc/auth_unix.h,v 1.10 1999/08/27 23:45:03 peter Exp $
*/
/*
* auth_unix.h, Protocol for UNIX style authentication parameters for RPC
*
* Copyright (C) 1984, Sun Microsystems, Inc.
*/
/*
* The system is very weak. The client uses no encryption for it
* credentials and only sends null verifiers. The server sends backs
* null verifiers or optionally a verifier that suggests a new short hand
* for the credentials.
*/
#ifndef _RPC_AUTH_UNIX_H
#define _RPC_AUTH_UNIX_H
#include <sys/cdefs.h>
#include <rpc/auth.h> /* opaque_auth */
/* The machine name is part of a credential; it may not exceed 255 bytes */
#define MAX_MACHINE_NAME 255
/* gids compose part of a credential; there may not be more than 16 of them */
#define NGRPS 16
/*
* Unix style credentials.
*/
struct authunix_parms {
u_long aup_time;
char *aup_machname;
int aup_uid;
int aup_gid;
u_int aup_len;
int *aup_gids;
};
#define authsys_parms authunix_parms
__BEGIN_DECLS
extern bool_t xdr_authunix_parms(XDR *, struct authunix_parms *);
__END_DECLS
/*
* If a response verifier has flavor AUTH_SHORT,
* then the body of the response verifier encapsulates the following structure;
* again it is serialized in the obvious fashion.
*/
struct short_hand_verf {
struct opaque_auth new_cred;
};
#endif /* !_RPC_AUTH_UNIX_H */

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