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bsps: Move libchip to bsps

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This patch is a part of the BSP source reorganization.

Update #3285.
This commit is contained in:
Sebastian Huber
2018-04-04 10:13:28 +02:00
parent 8621ed3806
commit 27de4e1fb8
83 changed files with 55 additions and 91 deletions
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bsps/shared/net/README
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This is the network interface controller portion of the libchip library.
This directory contains the source code for reusable TCP/IP network driver
support code. Each driver has its own configuration table and its
chip specific attach routine must be called by a board specific
attach routine. The board specific chip routine passes the chip
configuration and network configuration to the resuable device driver.
The reusable chip drivers do not directly access the controller.
They access the registers on the controller via a set of
functions which are provided by the BSP. These functions set and get
general registers and data buffers.
bsps/shared/net/README.3com
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#
# README.3com
#
bsps/shared/net/README.cs8900
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Target Support
==============
The target is required to provide the low level support routines as
listed in the Configuration section of this file.
The file cs8900.[ch].bsp are an example BSP files for DIMMPC target.
Conditionals
============
CS8900_DATA_BUS_SWAPPED - XXX
CS8900_TRACE - XXX
CS8900_VERBOSE - XXX
Todo
====
+ Build two versions -- one with swapped, one without.
+ Document conditionals.
Configuration
=============
See the cs8900.h header file for the documentation.
bsps/shared/net/README.dec21140
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This TULIP driver can be used on BSPs that support PCI bus.
It can handle any DEC21140 and DEC21143 based Ethernet controller
although the DEC21143 support has only been tested on Intel.
It works on big or little endian target.
The DEC21140 has been tested with powerpc/mcp750 BSP (OnBoard Ethernet
controller) and i386/pc386 BSP (D-Link DFE-500TX Ethernet board).
The DEC21143 has been tested only on the i386/pc386 using
the Kingston KNE100TX with 21143PD chip.
*****************************************************************
******** ***************
******** tests with ttcp benchmark for DEC driver ***************
******** optimization ***************
******** ***************
*****************************************************************
LINUX -> LINUX-ix86
Transmitter :
ttcp-t: buflen=8192, nbuf=2048, align=16384/0, port=5001 tcp -> genesis
ttcp-t: 16777216 bytes in 1.87 real seconds = 8775.25 KB/sec +++
ttcp-t: 2048 I/O calls, msec/call = 0.93, calls/sec = 1096.91
ttcp-t: 0.0user 0.9sys 0:01real 51% 0i+0d 0maxrss 0+2pf 0+0csw
Receiver :
ttcp-r: buflen=8192, nbuf=2048, align=16384/0, port=5001 tcp
ttcp-r: 16777216 bytes in 1.88 real seconds = 8706.53 KB/sec +++
ttcp-r: 10802 I/O calls, msec/call = 0.18, calls/sec = 5740.23
ttcp-r: 0.0user 0.2sys 0:01real 13% 0i+0d 0maxrss 0+2pf 0+0csw
==============================================================
==============================================================
==============================================================
LINUX -> RTEMS-ix86 with tulip driver from pc386 bsp
Transmitter :
ttcp-t: buflen=8192, nbuf=2048, align=16384/0, port=5001 tcp -> neil-young-100
ttcp-t: 16777216 bytes in 1.98 real seconds = 8294.76 KB/sec +++
ttcp-t: 2048 I/O calls, msec/call = 0.99, calls/sec = 1036.85
ttcp-t: 0.0user 0.1sys 0:01real 9% 0i+0d 0maxrss 0+2pf 0+0csw
Receiver :
ttcp-r: buflen=8192, nbuf=2048, align=16384/0, port=5001 tcp
ttcp-r: 16777216 bytes in 2.03 real seconds = 8065.14 KB/sec +++
ttcp-r: 3088 I/O calls, msec/call = 0.67, calls/sec = 1520.09
ttcp-r: 0.0user 2.0sys 0:02real 100% 0i+0d 0maxrss 0+0pf 0+0csw
==============================================================
==============================================================
==============================================================
RTEMS-ix86 with tulip driver from pc386 bsp -> LINUX
Transmitter :
ttcp-t: buflen=8192, nbuf=2048, align=16384/0, port=5001 tcp -> 194.2.81.126
ttcp-t: 16777216 bytes in 2.76 real seconds = 5938.77 KB/sec +++
ttcp-t: 2048 I/O calls, msec/call = 1.38, calls/sec = 742.35
ttcp-t: 0.0user 2.5sys 0:02real 100% 0i+0d 0maxrss 0+0pf 0+0csw
Receiver :
ttcp-r: buflen=8192, nbuf=2048, align=16384/0, port=5001 tcp
ttcp-r: 16777216 bytes in 2.75 real seconds = 5948.53 KB/sec +++
ttcp-r: 11349 I/O calls, msec/call = 0.25, calls/sec = 4120.48
ttcp-r: 0.0user 0.1sys 0:02real 6% 0i+0d 0maxrss 0+2pf 0+0csw
==============================================================
==============================================================
==============================================================
LINUX -> RTEMS-ix86 with optimized tulip driver
Transmitter :
ttcp-t: buflen=8192, nbuf=2048, align=16384/0, port=5001 tcp -> neil-young-100
ttcp-t: 16777216 bytes in 1.73 real seconds = 9470.13 KB/sec +++
ttcp-t: 2048 I/O calls, msec/call = 0.87, calls/sec = 1183.77
ttcp-t: 0.0user 0.1sys 0:01real 6% 0i+0d 0maxrss 0+2pf 0+0csw
Receiver :
ttcp-r: buflen=8192, nbuf=2048, align=16384/0, port=5001 tcp
ttcp-r: 16777216 bytes in 1.76 real seconds = 9315.33 KB/sec +++
ttcp-r: 4558 I/O calls, msec/call = 0.40, calls/sec = 2591.51
ttcp-r: 0.0user 1.7sys 0:01real 100% 0i+0d 0maxrss 0+0pf 0+0csw
==============================================================
==============================================================
==============================================================
RTEMS-ix86 with optimized tulip driver -> LINUX
Transmitter :
ttcp-t: buflen=8192, nbuf=2048, align=16384/0, port=5001 tcp -> 194.2.81.126
ttcp-t: 16777216 bytes in 2.09 real seconds = 7847.80 KB/sec +++
ttcp-t: 2048 I/O calls, msec/call = 1.04, calls/sec = 980.98
ttcp-t: 0.0user 2.0sys 0:02real 100% 0i+0d 0maxrss 0+0pf 0+0csw
Receiver :
ttcp-r: buflen=8192, nbuf=2048, align=16384/0, port=5001 tcp
ttcp-r: 16777216 bytes in 2.08 real seconds = 7874.23 KB/sec +++
ttcp-r: 11404 I/O calls, msec/call = 0.19, calls/sec = 5480.82
ttcp-r: 0.0user 0.1sys 0:02real 8% 0i+0d 0maxrss 0+2pf 0+0csw
bsps/shared/net/README.i82586
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TBD
bsps/shared/net/README.open_eth
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Driver for opencores ethernet MAC - README
------------------------------------------
The device name for the driver is 'open_eth1', the attach
function for the leon bsp is rtems_leon_open_eth_driver_attach().
No cache flushing is made when a frame is received. On leon,
this means that cache snooping must be configured in the
vhdl model and enabled by software.
TX interrupts are not used and masked in the interrupt mask
register.
For now, only 10 Mbit/s half-duplex is supported.
100 Mbit/s operations does not work reliably, the transmitter
locks up or skips frames. Seems to depend on the TX fifo
implementation in the opencores MAC. Send a mail to
jiri@gaisler.com if you know how to fix this.
Tested only on leon, using the GR-PCI-XC2V board @ 40 MHz.
Output from ttcp receiving 1 Mbyte file:
>>> ttcp -r -s
ttcp-r: buflen=8192, nbuf=2048, align=16384/0, port=5001 tcp
ttcp-r: socket
ttcp-r: accept from 192.168.0.2
ttcp-r: 1145339 bytes in 1.18 real seconds = 947.88 KB/sec +++
ttcp-r: 792 I/O calls, msec/call = 1.53, calls/sec = 671.19
ttcp-r: 0.0user 1.1sys 0:01real 100% 0i+0d 0maxrss 0+0pf 0+0csw
************ MBUF STATISTICS ************
mbufs:1024 clusters: 128 free: 112
drops: 0 waits: 0 drains: 0
free:1007 data:17 header:0 socket:0
pcb:0 rtable:0 htable:0 atable:0
soname:0 soopts:0 ftable:0 rights:0
ifaddr:0 control:0 oobdata:0
************ INTERFACE STATISTICS ************
***** open_eth1 *****
Address:192.168.0.66 Broadcast Address:192.168.0.255
Flags: Up Broadcast Running Simplex
Send queue limit:50 length:0 Dropped:0
Rx Packets:796 Rx Interrupts:796 Length:0
Bad CRC:0 Overrun:0 Miss:0
Tx Interrupts:0 Deferred:0 Missed Hearbeat:0
No Carrier:0 Retransmit Limit:0 Late Collision:0
Underrun:0 Raw output wait:0
************ IP Statistics ************
total packets received 795
datagrams delivered to upper level 795
total ip packets generated here 401
************ TCP Statistics ************
connections accepted 1
connections established 1
conn. closed (includes drops) 1
segs where we tried to get rtt 2
times we succeeded 2
delayed acks sent 4
total packets sent 401
ack-only packets sent 6
window update-only packets sent 394
control (SYN|FIN|RST) packets sent 1
total packets received 795
packets received in sequence 792
bytes received in sequence 1145339
rcvd ack packets 2
bytes acked by rcvd acks 2
times hdr predict ok for data pkts 791
bsps/shared/net/README.sonic
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This SONIC driver does not make any attempt to support the SONIC chip
in any of the following modes:
+ 16-bit
+ little endian
It does not attempt to handle SONIC's older than Revision C. There is
a bug in chips before that revision that must be handled in the driver.
The configuration table should be discussed here but if you look in the
include file for the sonic, it is reasonably obvious. :)
The performance impact of transforming this driver into libchip format
was minimal.
The powerpc/dmv177 BSP used this driver and the following should
serve as an example configuration table. This BSP was obsoleted after
the 4.6 release series so the code is included here.
======================================================================
/*
* DMV177 SONIC Configuration Information
*
* References:
*
* 1) SVME/DMV-171 Single Board Computer Documentation Package, #805905,
* DY 4 Systems Inc., Kanata, Ontario, September, 1996.
*/
#include <bsp.h>
#include <rtems/rtems_bsdnet.h>
#include <libchip/sonic.h>
void dmv177_sonic_write_register(
void *base,
unsigned32 regno,
unsigned32 value
)
{
volatile unsigned32 *p = base;
#if (SONIC_DEBUG & SONIC_DEBUG_PRINT_REGISTERS)
printf( "%p Write 0x%04x to %s (0x%02x)\n",
&p[regno], value, SONIC_Reg_name[regno], regno );
fflush( stdout );
#endif
p[regno] = value;
}
unsigned32 dmv177_sonic_read_register(
void *base,
unsigned32 regno
)
{
volatile unsigned32 *p = base;
unsigned32 value;
value = p[regno];
#if (SONIC_DEBUG & SONIC_DEBUG_PRINT_REGISTERS)
printf( "%p Read 0x%04x from %s (0x%02x)\n",
&p[regno], value, SONIC_Reg_name[regno], regno );
fflush( stdout );
#endif
return value;
}
/*
* Default sizes of transmit and receive descriptor areas
*/
#define RDA_COUNT 20 /* 20 */
#define TDA_COUNT 20 /* 10 */
/*
* Default device configuration register values
* Conservative, generic values.
* DCR:
* No extended bus mode
* Unlatched bus retry
* Programmable outputs unused
* Asynchronous bus mode
* User definable pins unused
* No wait states (access time controlled by DTACK*)
* 32-bit DMA
* Empty/Fill DMA mode
* Maximum Transmit/Receive FIFO
* DC2:
* Extended programmable outputs unused
* Normal HOLD request
* Packet compress output unused
* No reject on CAM match
*/
#define SONIC_DCR \
(DCR_DW32 | DCR_WAIT0 | DCR_PO0 | DCR_PO1 | DCR_RFT24 | DCR_TFT28)
#ifndef SONIC_DCR
# define SONIC_DCR (DCR_DW32 | DCR_TFT28)
#endif
#ifndef SONIC_DC2
# define SONIC_DC2 (0)
#endif
/*
* Default location of device registers
*/
#ifndef SONIC_BASE_ADDRESS
# define SONIC_BASE_ADDRESS 0xF3000000
# warning "Using default SONIC_BASE_ADDRESS."
#endif
/*
* Default interrupt vector
*/
#ifndef SONIC_VECTOR
# define SONIC_VECTOR 1
# warning "Using default SONIC_VECTOR."
#endif
sonic_configuration_t dmv177_sonic_configuration = {
SONIC_BASE_ADDRESS, /* base address */
SONIC_VECTOR, /* vector number */
SONIC_DCR, /* DCR register value */
SONIC_DC2, /* DC2 register value */
TDA_COUNT, /* number of transmit descriptors */
RDA_COUNT, /* number of receive descriptors */
dmv177_sonic_write_register,
dmv177_sonic_read_register
};
int rtems_dmv177_sonic_driver_attach(struct rtems_bsdnet_ifconfig *config)
{
return rtems_sonic_driver_attach( config, &dmv177_sonic_configuration );
}
======================================================================
bsps/shared/net/README.tulipclone
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*****************************************************************
******** ***************
******** ttcp benchmark tests of dec2114x driver ***************
******** adapted from FreeBSD's if_dc.c for RTEMS ***************
******** by: Daron Chabot (12/15/03), ***************
******** <daron@nucleus.usask.ca> ***************
*****************************************************************
Test Equipment:
-----------------------
- Intel 450 MHz P3's
- RH Linux v7.3, 2.4.7-10 kernel, D-Link DFE-530TX (via-rhine)
- RTEMS rtems-ss-20030703, pc386 BSP, Linksys LNE100TX ( actually,
a cleverly disguised ADMtek Centaur, aka "Comet").
- the PCs were directly connected ( RJ-45 X-over cable ) on a class C
subnet (private)
NOTE:
-----------------------
- the following lines must be added to the BSP's "bsp.h" file, or
inserted into an application header (e.g. a "network_config.h" file, or
similar):
extern int rtems_dc_driver_attach(struct rtems_bsdnet_ifconfig *, int);
#define BSP_DEC_NETWORK_DRIVER_NAME "tl1" /* "tl" as in "tulip-clone" */
#define BSP_DEC_NETWORK_DRIVER_ATTACH rtems_dc_driver_attach
**************************
Linux Tx ----> RTEMS Rx: *
**************************
TRANSMITTER:
ttcp-t: buflen=8192, nbuf=65536, align=16384/0, port=5001 tcp -> rtems
ttcp-t: 536870912 bytes in 45.72 real seconds = 11468.54 KB/sec +++
ttcp-t: 536870912 bytes in 6.87 CPU seconds = 76315.57 KB/cpu sec
ttcp-t: 65536 I/O calls, msec/call = 0.71, calls/sec = 1433.57
ttcp-t: 0.1user 6.7sys 0:45real 15% 0i+0d 0maxrss 0+2pf 0+0csw
RECEIVER:
ttcp-r: buflen=8192, nbuf=65536, align=16384/0, port=5001 tcp
ttcp-r: 536870912 bytes in 45.72 real seconds = 11467.37 KB/sec +++
ttcp-r: 536870912 bytes in 45.87 CPU seconds = 11467.37 KB/cpu sec
ttcp-r: 370837 I/O calls, msec/call = 0.13, calls/sec = 8111.05
ttcp-r: 0.0user 45.7sys 0:45real 100% 0i+0d 0maxrss 0+0pf 0+0csw
**************************
RTEMS Tx ----> Linux Rx: *
**************************
TRANSMITTER:
ttcp-t: buflen=8192, nbuf=65536, align=16384/0, port=5001 tcp ->192.168.1.1
ttcp-t: 536870912 bytes in 46.22 real seconds = 11343.31 KB/sec +++
ttcp-t: 536870912 bytes in 46.22 CPU seconds = 11343.31 KB/cpu sec
ttcp-t: 65536 I/O calls, msec/call = 0.72, calls/sec = 1417.91
ttcp-t: 0.0user 46.2sys 0:46real 100% 0i+0d 0maxrss 0+0pf 0+0csw
RECEIVER:
ttcp-r: buflen=8192, nbuf=65536, align=16384/0, port=5001 tcp
ttcp-r: 536870912 bytes in 46.22 real seconds = 11343.05 KB/sec +++
ttcp-r: 536870912 bytes in 11.60 CPU seconds = 45197.24 KB/cpu sec
ttcp-r: 356183 I/O calls, msec/call = 0.13, calls/sec = 7706.07
ttcp-r: 0.6user 10.9sys 0:46real 25% 0i+0d 0maxrss 0+2pf 0+0csw
****************************************************************************
****************************************************************************
****************************************************************************
******************* Test with 40kB buffer size *****************************
****************************************************************************
****************************************************************************
****************************************************************************
**************************
RTEMS Tx ----> Linux Rx: *
**************************
TRANSMITTER:
ttcp-t: buflen=40960, nbuf=13107, align=16384/0, port=5001 tcp -> 192.168.1.1
ttcp-t: 536862720 bytes in 46.23 real seconds = 11340.69 KB/sec +++
ttcp-t: 536862720 bytes in 46.23 CPU seconds = 11340.69 KB/cpu sec
ttcp-t: 13107 I/O calls, msec/call = 3.61, calls/sec = 283.52
ttcp-t: 0.0user 46.2sys 0:46real 100% 0i+0d 0maxrss 0+0pf 0+0csw
RECEIVER:
ttcp-r: buflen=40960, nbuf=13107, align=16384/0, port=5001 tcp
ttcp-r: 536862720 bytes in 46.23 real seconds = 11339.54 KB/sec +++
ttcp-r: 536862720 bytes in 10.70 CPU seconds = 48998.13 KB/cpu sec
ttcp-r: 355970 I/O calls, msec/call = 0.13, calls/sec = 7699.20
ttcp-r: 0.5user 10.1sys 0:46real 23% 0i+0d 0maxrss 0+5pf 0+0csw
****************************************************************************
****************************************************************************
bsps/shared/net/cs8900.c
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bsps/shared/net/cs8900.c.bsp
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bsps/shared/net/cs8900.h.bsp
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/*
* RTEMS CS8900 Driver Setup for the DIMM-PC/i386 made by Kontron.
*
* Port to the DIMM PC copyright (c) 2004 Angelo Fraietta
* This project has been assisted by the Commonwealth Government
* through the Australia Council, its arts funding and advisory body.
*
* Port performed by Chris Johns, Cybertec Pty Ltd, Jan 2004.
* Based on the Cybertec CS8900 driver setup for the SFP-101.
*/
#if !defined (__BSP_CS8900_H__)
#define __BSP_CS8900_H__
/**
* BSP CS8900 Device initialisation and interface attach.
*
* @param io_base The I/O base address of the device.
*
* @param mem_base The memory base address. Currently not used.
*
* @param intrp The ISA bus IRQ. These are currently limited to
* 5, 10, 11, and 12 as documented in the CS8900
* manual.
*
* @param ip IP address in ASCII. For example 10.10.10.10. If the
* pointer is a NULL (0) the interface will BOOTP.
*
* @param nm Network Mask in ASCII. For example 10.10.10.255.
*
* @param gw Address of the gateway machine. For example
* 10.10.10.1.
*/
void BSP_cs8900_attach (unsigned long io_base, unsigned long mem_base, int intrp,
const char* ip, const char* nm, const char* gw);
#endif
bsps/shared/net/dec21140.c
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bsps/shared/net/elnk.c
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bsps/shared/net/greth2.c
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bsps/shared/net/i82586.c
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bsps/shared/net/i82586reg.h
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/* $NetBSD: i82586reg.h,v 1.7 1998/02/28 01:07:45 pk Exp $ */
/*-
* Copyright (c) 1998 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Paul Kranenburg.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the NetBSD
* Foundation, Inc. and its contributors.
* 4. Neither the name of The NetBSD Foundation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/*-
* Copyright (c) 1992, University of Vermont and State Agricultural College.
* Copyright (c) 1992, Garrett A. Wollman.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the University of
* Vermont and State Agricultural College and Garrett A. Wollman.
* 4. Neither the name of the University nor the name of the author
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE UNIVERSITY OR AUTHOR BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
/*
* Intel 82586 Ethernet chip
* Register, bit, and structure definitions.
*
* Written by GAW with reference to the Clarkson Packet Driver code for this
* chip written by Russ Nelson and others.
*/
/*
* NOTE, the structure definitions in here are for reference only.
* We use integer offsets exclusively to access the i82586 data structures.
*/
#if 0
/*
* This is the master configuration block.
* It tells the hardware where all the rest of the stuff is.
*/
struct __ie_sys_conf_ptr {
u_int16_t mbz; /* must be zero */
u_int8_t ie_bus_use; /* true if 8-bit only */
u_int8_t mbz2[5]; /* must be zero */
u_int32_t ie_iscp_ptr; /* 24-bit physaddr of ISCP */
};
#endif
#define IE_SCP_SZ 12
#define IE_SCP_BUS_USE(base) ((base) + 2)
#define IE_SCP_ISCP(base) ((base) + 8)
/*
* Note that this is wired in hardware; the SCP is always located here, no
* matter what.
*/
#define IE_SCP_ADDR 0xfffff4
#if 0
/*
* The tells the hardware where all the rest of the stuff is, too.
* FIXME: some of these should be re-commented after we figure out their
* REAL function.
*/
struct __ie_int_sys_conf_ptr {
u_int8_t ie_busy; // zeroed after init
u_int8_t mbz;
u_int16_t ie_scb_offset; // 16-bit physaddr of next struct
caddr_t ie_base; // 24-bit physaddr for all 16-bit vars
};
#endif
#define IE_ISCP_SZ 8
#define IE_ISCP_BUSY(base) ((base) + 0)
#define IE_ISCP_SCB(base) ((base) + 2)
#define IE_ISCP_BASE(base) ((base) + 4)
#if 0
/*
* This FINALLY tells the hardware what to do and where to put it.
*/
struct __ie_sys_ctl_block {
u_int16_t ie_status; // status word
u_int16_t ie_command; // command word
u_int16_t ie_command_list; // 16-pointer to command block list
u_int16_t ie_recv_list; // 16-pointer to receive frame list
u_int16_t ie_err_crc; // CRC errors
u_int16_t ie_err_align; // Alignment errors
u_int16_t ie_err_resource; // Resource errors
u_int16_t ie_err_overrun; // Overrun errors
};
#endif
#define IE_SCB_SZ 16
#define IE_SCB_STATUS(base) ((base) + 0)
#define IE_SCB_CMD(base) ((base) + 2)
#define IE_SCB_CMDLST(base) ((base) + 4)
#define IE_SCB_RCVLST(base) ((base) + 6)
#define IE_SCB_ERRCRC(base) ((base) + 8)
#define IE_SCB_ERRALN(base) ((base) + 10)
#define IE_SCB_ERRRES(base) ((base) + 12)
#define IE_SCB_ERROVR(base) ((base) + 14)
/* Command values */
#define IE_RUC_MASK 0x0070 /* mask for RU command */
#define IE_RUC_NOP 0 /* for completeness */
#define IE_RUC_START 0x0010 /* start receive unit command */
#define IE_RUC_RESUME 0x0020 /* resume a suspended receiver command */
#define IE_RUC_SUSPEND 0x0030 /* suspend receiver command */
#define IE_RUC_ABORT 0x0040 /* abort current receive operation */
#define IE_CUC_MASK 0x0700 /* mask for CU command */
#define IE_CUC_NOP 0 /* included for completeness */
#define IE_CUC_START 0x0100 /* do-command command */
#define IE_CUC_RESUME 0x0200 /* resume a suspended cmd list */
#define IE_CUC_SUSPEND 0x0300 /* suspend current command */
#define IE_CUC_ABORT 0x0400 /* abort current command */
#define IE_ACK_COMMAND 0xf000 /* mask for ACK command */
#define IE_ACK_CX 0x8000 /* ack IE_ST_CX */
#define IE_ACK_FR 0x4000 /* ack IE_ST_FR */
#define IE_ACK_CNA 0x2000 /* ack IE_ST_CNA */
#define IE_ACK_RNR 0x1000 /* ack IE_ST_RNR */
#define IE_ACTION_COMMAND(x) (((x) & IE_CUC_MASK) == IE_CUC_START)
/* is this command an action command? */
/* Status values */
#define IE_ST_WHENCE 0xf000 /* mask for cause of interrupt */
#define IE_ST_CX 0x8000 /* command with I bit completed */
#define IE_ST_FR 0x4000 /* frame received */
#define IE_ST_CNA 0x2000 /* all commands completed */
#define IE_ST_RNR 0x1000 /* receive not ready */
#define IE_CUS_MASK 0x0700 /* mask for command unit status */
#define IE_CUS_ACTIVE 0x0200 /* command unit is active */
#define IE_CUS_SUSPEND 0x0100 /* command unit is suspended */
#define IE_RUS_MASK 0x0070 /* mask for receiver unit status */
#define IE_RUS_SUSPEND 0x0010 /* receiver is suspended */
#define IE_RUS_NOSPACE 0x0020 /* receiver has no resources */
#define IE_RUS_READY 0x0040 /* receiver is ready */
#if 0
/*
* This is filled in partially by the chip, partially by us.
*/
struct __ie_recv_frame_desc {
u_int16_t ie_fd_status; // status for this frame
u_int16_t ie_fd_last; // end of frame list flag
u_int16_t ie_fd_next; // 16-pointer to next RFD
u_int16_t ie_fd_buf_desc; // 16-pointer to list of buffer descs
struct __ie_en_addr dest; // destination ether
struct __ie_en_addr src; // source ether
u_int16_t ie_length; // 802 length/Ether type
u_short mbz; // must be zero
};
#endif
#define IE_RFRAME_SZ 24
#define IE_RFRAME_ADDR(base,i) ((base) + (i) * IE_RFRAME_SZ)
#define IE_RFRAME_STATUS(b,i) (IE_RFRAME_ADDR(b,i) + 0)
#define IE_RFRAME_LAST(b,i) (IE_RFRAME_ADDR(b,i) + 2)
#define IE_RFRAME_NEXT(b,i) (IE_RFRAME_ADDR(b,i) + 4)
#define IE_RFRAME_BUFDESC(b,i) (IE_RFRAME_ADDR(b,i) + 6)
#define IE_RFRAME_EDST(b,i) (IE_RFRAME_ADDR(b,i) + 8)
#define IE_RFRAME_ESRC(b,i) (IE_RFRAME_ADDR(b,i) + 14)
#define IE_RFRAME_ELEN(b,i) (IE_RFRAME_ADDR(b,i) + 20)
/* "last" bits */
#define IE_FD_EOL 0x8000 /* last rfd in list */
#define IE_FD_SUSP 0x4000 /* suspend RU after receipt */
/* status field bits */
#define IE_FD_COMPLETE 0x8000 /* frame is complete */
#define IE_FD_BUSY 0x4000 /* frame is busy */
#define IE_FD_OK 0x2000 /* frame is ok */
#define IE_FD_CRC 0x0800 /* CRC error */
#define IE_FD_ALGN 0x0400 /* Alignment error */
#define IE_FD_RNR 0x0200 /* receiver out of resources here */
#define IE_FD_OVR 0x0100 /* DMA overrun */
#define IE_FD_SHORT 0x0080 /* Short frame */
#define IE_FD_NOEOF 0x0040 /* no EOF (?) */
#define IE_FD_ERRMASK /* all error bits */ \
(IE_FD_CRC|IE_FD_ALGN|IE_FD_RNR|IE_FD_OVR|IE_FD_SHORT|IE_FD_NOEOF)
#define IE_FD_STATUSBITS \
"\20\20COMPLT\17BUSY\16OK\14CRC\13ALGN\12RNR\11OVR\10SHORT\7NOEOF"
#if 0
/*
* linked list of buffers...
*/
struct __ie_recv_buf_desc {
u_int16_t ie_rbd_status; // status for this buffer
u_int16_t ie_rbd_next; // 16-pointer to next RBD
caddr_t ie_rbd_buffer; // 24-pointer to buffer for this RBD
u_int16_t ie_rbd_length; // length of the buffer
u_int16_t mbz; // must be zero
};
#endif
#define IE_RBD_SZ 12
#define IE_RBD_ADDR(base,i) ((base) + (i) * IE_RBD_SZ)
#define IE_RBD_STATUS(b,i) (IE_RBD_ADDR(b,i) + 0)
#define IE_RBD_NEXT(b,i) (IE_RBD_ADDR(b,i) + 2)
#define IE_RBD_BUFADDR(b,i) (IE_RBD_ADDR(b,i) + 4)
#define IE_RBD_BUFLEN(b,i) (IE_RBD_ADDR(b,i) + 8)
/* RBD status fields */
#define IE_RBD_LAST 0x8000 /* last buffer */
#define IE_RBD_USED 0x4000 /* this buffer has data */
#define IE_RBD_CNTMASK 0x3fff /* byte count of buffer data */
/* RDB `End Of List' flag; encoded in `buffer length' field */
#define IE_RBD_EOL 0x8000 /* last buffer */
#if 0
/*
* All commands share this in common.
*/
struct __ie_cmd_common {
u_int16_t ie_cmd_status; // status of this command
u_int16_t ie_cmd_cmd; // command word
u_int16_t ie_cmd_link; // link to next command
};
#endif
#define IE_CMD_COMMON_SZ 6
#define IE_CMD_COMMON_STATUS(base) ((base) + 0)
#define IE_CMD_COMMON_CMD(base) ((base) + 2)
#define IE_CMD_COMMON_LINK(base) ((base) + 4)
#define IE_STAT_COMPL 0x8000 /* command is completed */
#define IE_STAT_BUSY 0x4000 /* command is running now */
#define IE_STAT_OK 0x2000 /* command completed successfully */
#define IE_STAT_ABORT 0x1000 /* command was aborted */
#define IE_CMD_NOP 0x0000 /* NOP */
#define IE_CMD_IASETUP 0x0001 /* initial address setup */
#define IE_CMD_CONFIG 0x0002 /* configure command */
#define IE_CMD_MCAST 0x0003 /* multicast setup command */
#define IE_CMD_XMIT 0x0004 /* transmit command */
#define IE_CMD_TDR 0x0005 /* time-domain reflectometer command */
#define IE_CMD_DUMP 0x0006 /* dump command */
#define IE_CMD_DIAGNOSE 0x0007 /* diagnostics command */
#define IE_CMD_LAST 0x8000 /* this is the last command in the list */
#define IE_CMD_SUSPEND 0x4000 /* suspend CU after this command */
#define IE_CMD_INTR 0x2000 /* post an interrupt after completion */
/*
* No-op commands; just like COMMON but "indexable"
*/
#define IE_CMD_NOP_SZ IE_CMD_COMMON_SZ
#define IE_CMD_NOP_ADDR(base,i) ((base) + (i) * IE_CMD_NOP_SZ)
#define IE_CMD_NOP_STATUS(b,i) (IE_CMD_NOP_ADDR(b,i) + 0)
#define IE_CMD_NOP_CMD(b,i) (IE_CMD_NOP_ADDR(b,i) + 2)
#define IE_CMD_NOP_LINK(b,i) (IE_CMD_NOP_ADDR(b,i) + 4)
#if 0
/*
* This is the command to transmit a frame.
*/
struct __ie_xmit_cmd {
struct __ie_cmd_common com; // common part
#define __ie_xmit_status com.ie_cmd_status
u_int16_t ie_xmit_desc; // pointer to buffer descriptor
struct __ie_en_addr ie_xmit_addr; // destination address
u_int16_t ie_xmit_length; // 802.3 length/Ether type field
};
#endif
#define IE_CMD_XMIT_SZ (IE_CMD_COMMON_SZ + 10)
#define IE_CMD_XMIT_ADDR(base,i) ((base) + (i) * IE_CMD_XMIT_SZ)
#define IE_CMD_XMIT_STATUS(b,i) \
(IE_CMD_XMIT_ADDR(b,i) + 0) /* == CMD_COMMON_STATUS */
#define IE_CMD_XMIT_CMD(b,i) \
(IE_CMD_XMIT_ADDR(b,i) + 2) /* == CMD_COMMON_CMD */
#define IE_CMD_XMIT_LINK(b,i) \
(IE_CMD_XMIT_ADDR(b,i) + 4) /* == CMD_COMMON_LINK */
#define IE_CMD_XMIT_DESC(b,i) \
(IE_CMD_XMIT_ADDR(b,i) + IE_CMD_COMMON_SZ + 0)
#define IE_CMD_XMIT_EADDR(b,i) \
(IE_CMD_XMIT_ADDR(b,i) + IE_CMD_COMMON_SZ + 2)
#define IE_CMD_XMIT_LEN(b,i) \
(IE_CMD_XMIT_ADDR(b,i) + IE_CMD_COMMON_SZ + 8)
#define IE_XS_MAXCOLL 0x000f /* number of collisions during transmit */
#define IE_XS_EXCMAX 0x0020 /* exceeded maximum number of collisions */
#define IE_XS_SQE 0x0040 /* SQE positive */
#define IE_XS_DEFERRED 0x0080 /* transmission deferred */
#define IE_XS_UNDERRUN 0x0100 /* DMA underrun */
#define IE_XS_LOSTCTS 0x0200 /* Lost CTS */
#define IE_XS_NOCARRIER 0x0400 /* No Carrier */
#define IE_XS_LATECOLL 0x0800 /* Late collision */
#if 0
/*
* This is a buffer descriptor for a frame to be transmitted.
*/
struct __ie_xmit_buf {
u_int16_t ie_xmit_flags; // see below
u_int16_t ie_xmit_next; // 16-pointer to next desc
caddr_t ie_xmit_buf; // 24-pointer to the actual buffer
};
#endif
#define IE_XBD_SZ 8
#define IE_XBD_ADDR(base,i) ((base) + (i) * IE_XBD_SZ)
#define IE_XBD_FLAGS(b,i) (IE_XBD_ADDR(b,i) + 0)
#define IE_XBD_NEXT(b,i) (IE_XBD_ADDR(b,i) + 2)
#define IE_XBD_BUF(b,i) (IE_XBD_ADDR(b,i) + 4)
#define IE_TBD_EOL 0x8000 /* this TBD is the last one */
#define IE_TBD_CNTMASK 0x3fff /* The rest of the `flags' word
is actually the length. */
#if 0
/*
* Multicast setup command.
*/
struct __ie_mcast_cmd {
struct __ie_cmd_common com; // common part
#define ie_mcast_status com.ie_cmd_status
// size (in bytes) of multicast addresses
u_short ie_mcast_bytes;
struct __ie_en_addr ie_mcast_addrs[IE_MAXMCAST + 1];// space for them
};
#endif
#define IE_CMD_MCAST_SZ (IE_CMD_COMMON_SZ + 2 /* + XXX */)
#define IE_CMD_MCAST_BYTES(base) ((base) + IE_CMD_COMMON_SZ + 0)
#define IE_CMD_MCAST_MADDR(base) ((base) + IE_CMD_COMMON_SZ + 2)
#if 0
/*
* Time Domain Reflectometer command.
*/
struct __ie_tdr_cmd {
struct __ie_cmd_common com; // common part
#define ie_tdr_status com.ie_cmd_status
u_short ie_tdr_time; // error bits and time
};
#endif
#define IE_CMD_TDR_SZ (IE_CMD_COMMON_SZ + 2)
#define IE_CMD_TDR_TIME(base) ((base) + IE_CMD_COMMON_SZ + 0)
#define IE_TDR_SUCCESS 0x8000 /* TDR succeeded without error */
#define IE_TDR_XCVR 0x4000 /* detected a transceiver problem */
#define IE_TDR_OPEN 0x2000 /* detected an incorrect termination ("open") */
#define IE_TDR_SHORT 0x1000 /* TDR detected a short circuit */
#define IE_TDR_TIME 0x07ff /* mask for reflection time */
#if 0
/*
* Initial Address Setup command
*/
struct __ie_iasetup_cmd {
struct __ie_cmd_common com;
#define ie_iasetup_status com.ie_cmd_status
struct __ie_en_addr ie_address;
};
#endif
#define IE_CMD_IAS_SZ (IE_CMD_COMMON_SZ + 6)
#define IE_CMD_IAS_EADDR(base) ((base) + IE_CMD_COMMON_SZ + 0)
#if 0
/*
* Configuration command
*/
struct __ie_config_cmd {
struct __ie_cmd_common com; // common part
#define ie_config_status com.ie_cmd_status
u_int8_t ie_config_count; // byte count (0x0c)
u_int8_t ie_fifo; // fifo (8)
u_int8_t ie_save_bad; // save bad frames (0x40)
u_int8_t ie_addr_len; // address length (0x2e) (AL-LOC == 1)
u_int8_t ie_priority; // priority and backoff (0x0)
u_int8_t ie_ifs; // inter-frame spacing (0x60)
u_int8_t ie_slot_low; // slot time, LSB (0x0)
u_int8_t ie_slot_high; // slot time, MSN, and retries (0xf2)
u_int8_t ie_promisc; // 1 if promiscuous, else 0
u_int8_t ie_crs_cdt; // CSMA/CD parameters (0x0)
u_int8_t ie_min_len; // min frame length (0x40)
u_int8_t ie_junk; // stuff for 82596 (0xff)
};
#endif
#define IE_CMD_CFG_SZ (IE_CMD_COMMON_SZ + 12)
#define IE_CMD_CFG_CNT(base) ((base) + IE_CMD_COMMON_SZ + 0)
#define IE_CMD_CFG_FIFO(base) ((base) + IE_CMD_COMMON_SZ + 1)
#define IE_CMD_CFG_SAVEBAD(base) ((base) + IE_CMD_COMMON_SZ + 2)
#define IE_CMD_CFG_ADDRLEN(base) ((base) + IE_CMD_COMMON_SZ + 3)
#define IE_CMD_CFG_PRIORITY(base) ((base) + IE_CMD_COMMON_SZ + 4)
#define IE_CMD_CFG_IFS(base) ((base) + IE_CMD_COMMON_SZ + 5)
#define IE_CMD_CFG_SLOT_LOW(base) ((base) + IE_CMD_COMMON_SZ + 6)
#define IE_CMD_CFG_SLOT_HIGH(base) ((base) + IE_CMD_COMMON_SZ + 7)
#define IE_CMD_CFG_PROMISC(base) ((base) + IE_CMD_COMMON_SZ + 8)
#define IE_CMD_CFG_CRSCDT(base) ((base) + IE_CMD_COMMON_SZ + 9)
#define IE_CMD_CFG_MINLEN(base) ((base) + IE_CMD_COMMON_SZ + 10)
#define IE_CMD_CFG_JUNK(base) ((base) + IE_CMD_COMMON_SZ + 11)
bsps/shared/net/if_dc.c
+3849
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bsps/shared/net/if_fxp.c
+2339
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bsps/shared/net/if_fxpreg.h
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@@ -0,0 +1,370 @@
/*
* Copyright (c) 1995, David Greenman
* Copyright (c) 2001 Jonathan Lemon <jlemon@freebsd.org>
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice unmodified, this list of conditions, and the following
* disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $FreeBSD: src/sys/dev/fxp/if_fxpreg.h,v 1.23.2.4 2001/08/31 02:17:02 jlemon Exp $
*/
#define FXP_VENDORID_INTEL 0x8086
#define FXP_PCI_MMBA 0x10
#define FXP_PCI_IOBA 0x14
/*
* Control/status registers.
*/
#define FXP_CSR_SCB_RUSCUS 0 /* scb_rus/scb_cus (1 byte) */
#define FXP_CSR_SCB_STATACK 1 /* scb_statack (1 byte) */
#define FXP_CSR_SCB_COMMAND 2 /* scb_command (1 byte) */
#define FXP_CSR_SCB_INTRCNTL 3 /* scb_intrcntl (1 byte) */
#define FXP_CSR_SCB_GENERAL 4 /* scb_general (4 bytes) */
#define FXP_CSR_PORT 8 /* port (4 bytes) */
#define FXP_CSR_FLASHCONTROL 12 /* flash control (2 bytes) */
#define FXP_CSR_EEPROMCONTROL 14 /* eeprom control (2 bytes) */
#define FXP_CSR_MDICONTROL 16 /* mdi control (4 bytes) */
#define FXP_CSR_FLOWCONTROL 0x19 /* flow control (2 bytes) */
#define FXP_CSR_GENCONTROL 0x1C /* general control (1 byte) */
/*
* FOR REFERENCE ONLY, the old definition of FXP_CSR_SCB_RUSCUS:
*
* volatile u_int8_t :2,
* scb_rus:4,
* scb_cus:2;
*/
#define FXP_PORT_SOFTWARE_RESET 0
#define FXP_PORT_SELFTEST 1
#define FXP_PORT_SELECTIVE_RESET 2
#define FXP_PORT_DUMP 3
#define FXP_SCB_RUS_IDLE 0
#define FXP_SCB_RUS_SUSPENDED 1
#define FXP_SCB_RUS_NORESOURCES 2
#define FXP_SCB_RUS_READY 4
#define FXP_SCB_RUS_SUSP_NORBDS 9
#define FXP_SCB_RUS_NORES_NORBDS 10
#define FXP_SCB_RUS_READY_NORBDS 12
#define FXP_SCB_CUS_IDLE 0
#define FXP_SCB_CUS_SUSPENDED 1
#define FXP_SCB_CUS_ACTIVE 2
#define FXP_SCB_INTR_DISABLE 0x01 /* Disable all interrupts */
#define FXP_SCB_INTR_SWI 0x02 /* Generate SWI */
#define FXP_SCB_INTMASK_FCP 0x04
#define FXP_SCB_INTMASK_ER 0x08
#define FXP_SCB_INTMASK_RNR 0x10
#define FXP_SCB_INTMASK_CNA 0x20
#define FXP_SCB_INTMASK_FR 0x40
#define FXP_SCB_INTMASK_CXTNO 0x80
#define FXP_SCB_STATACK_FCP 0x01 /* Flow Control Pause */
#define FXP_SCB_STATACK_ER 0x02 /* Early Receive */
#define FXP_SCB_STATACK_SWI 0x04
#define FXP_SCB_STATACK_MDI 0x08
#define FXP_SCB_STATACK_RNR 0x10
#define FXP_SCB_STATACK_CNA 0x20
#define FXP_SCB_STATACK_FR 0x40
#define FXP_SCB_STATACK_CXTNO 0x80
#define FXP_SCB_COMMAND_CU_NOP 0x00
#define FXP_SCB_COMMAND_CU_START 0x10
#define FXP_SCB_COMMAND_CU_RESUME 0x20
#define FXP_SCB_COMMAND_CU_DUMP_ADR 0x40
#define FXP_SCB_COMMAND_CU_DUMP 0x50
#define FXP_SCB_COMMAND_CU_BASE 0x60
#define FXP_SCB_COMMAND_CU_DUMPRESET 0x70
#define FXP_SCB_COMMAND_RU_NOP 0
#define FXP_SCB_COMMAND_RU_START 1
#define FXP_SCB_COMMAND_RU_RESUME 2
#define FXP_SCB_COMMAND_RU_ABORT 4
#define FXP_SCB_COMMAND_RU_LOADHDS 5
#define FXP_SCB_COMMAND_RU_BASE 6
#define FXP_SCB_COMMAND_RU_RBDRESUME 7
/*
* Command block definitions
*/
struct fxp_cb_nop {
void *fill[2];
volatile u_int16_t cb_status;
volatile u_int16_t cb_command;
volatile u_int32_t link_addr;
};
struct fxp_cb_ias {
void *fill[2];
volatile u_int16_t cb_status;
volatile u_int16_t cb_command;
volatile u_int32_t link_addr;
volatile u_int8_t macaddr[6];
};
/* I hate bit-fields :-( */
struct fxp_cb_config {
void *fill[2];
volatile u_int16_t cb_status;
volatile u_int16_t cb_command;
volatile u_int32_t link_addr;
volatile u_int byte_count:6,
:2;
volatile u_int rx_fifo_limit:4,
tx_fifo_limit:3,
:1;
volatile u_int8_t adaptive_ifs;
volatile u_int mwi_enable:1, /* 8,9 */
type_enable:1, /* 8,9 */
read_align_en:1, /* 8,9 */
end_wr_on_cl:1, /* 8,9 */
:4;
volatile u_int rx_dma_bytecount:7,
:1;
volatile u_int tx_dma_bytecount:7,
dma_mbce:1;
volatile u_int late_scb:1, /* 7 */
direct_dma_dis:1, /* 8,9 */
tno_int_or_tco_en:1, /* 7,9 */
ci_int:1,
ext_txcb_dis:1, /* 8,9 */
ext_stats_dis:1, /* 8,9 */
keep_overrun_rx:1,
save_bf:1;
volatile u_int disc_short_rx:1,
underrun_retry:2,
:3,
two_frames:1, /* 8,9 */
dyn_tbd:1; /* 8,9 */
volatile u_int mediatype:1, /* 7 */
:6,
csma_dis:1; /* 8,9 */
volatile u_int tcp_udp_cksum:1, /* 9 */
:3,
vlan_tco:1, /* 8,9 */
link_wake_en:1, /* 8,9 */
arp_wake_en:1, /* 8 */
mc_wake_en:1; /* 8 */
volatile u_int :3,
nsai:1,
preamble_length:2,
loopback:2;
volatile u_int linear_priority:3, /* 7 */
:5;
volatile u_int linear_pri_mode:1, /* 7 */
:3,
interfrm_spacing:4;
volatile u_int :8;
volatile u_int :8;
volatile u_int promiscuous:1,
bcast_disable:1,
wait_after_win:1, /* 8,9 */
:1,
ignore_ul:1, /* 8,9 */
crc16_en:1, /* 9 */
:1,
crscdt:1;
volatile u_int fc_delay_lsb:8; /* 8,9 */
volatile u_int fc_delay_msb:8; /* 8,9 */
volatile u_int stripping:1,
padding:1,
rcv_crc_xfer:1,
long_rx_en:1, /* 8,9 */
pri_fc_thresh:3, /* 8,9 */
:1;
volatile u_int ia_wake_en:1, /* 8 */
magic_pkt_dis:1, /* 8,9,!9ER */
tx_fc_dis:1, /* 8,9 */
rx_fc_restop:1, /* 8,9 */
rx_fc_restart:1, /* 8,9 */
fc_filter:1, /* 8,9 */
force_fdx:1,
fdx_pin_en:1;
volatile u_int :5,
pri_fc_loc:1, /* 8,9 */
multi_ia:1,
:1;
volatile u_int :3,
mc_all:1,
:4;
};
#define MAXMCADDR 80
struct fxp_cb_mcs {
struct fxp_cb_tx *next;
struct mbuf *mb_head;
volatile u_int16_t cb_status;
volatile u_int16_t cb_command;
volatile u_int32_t link_addr;
volatile u_int16_t mc_cnt;
volatile u_int8_t mc_addr[MAXMCADDR][6];
};
/*
* Number of DMA segments in a TxCB. Note that this is carefully
* chosen to make the total struct size an even power of two. It's
* critical that no TxCB be split across a page boundry since
* no attempt is made to allocate physically contiguous memory.
*
*/
#ifdef __alpha__ /* XXX - should be conditional on pointer size */
#define FXP_NTXSEG 28
#else
#define FXP_NTXSEG 29
#endif
struct fxp_tbd {
volatile u_int32_t tb_addr;
volatile u_int32_t tb_size;
};
struct fxp_cb_tx {
struct fxp_cb_tx *next;
struct mbuf *mb_head;
volatile u_int16_t cb_status;
volatile u_int16_t cb_command;
volatile u_int32_t link_addr;
volatile u_int32_t tbd_array_addr;
volatile u_int16_t byte_count;
volatile u_int8_t tx_threshold;
volatile u_int8_t tbd_number;
/*
* The following structure isn't actually part of the TxCB,
* unless the extended TxCB feature is being used. In this
* case, the first two elements of the structure below are
* fetched along with the TxCB.
*/
volatile struct fxp_tbd tbd[FXP_NTXSEG];
};
/*
* Control Block (CB) definitions
*/
/* status */
#define FXP_CB_STATUS_OK 0x2000
#define FXP_CB_STATUS_C 0x8000
/* commands */
#define FXP_CB_COMMAND_NOP 0x0
#define FXP_CB_COMMAND_IAS 0x1
#define FXP_CB_COMMAND_CONFIG 0x2
#define FXP_CB_COMMAND_MCAS 0x3
#define FXP_CB_COMMAND_XMIT 0x4
#define FXP_CB_COMMAND_RESRV 0x5
#define FXP_CB_COMMAND_DUMP 0x6
#define FXP_CB_COMMAND_DIAG 0x7
/* command flags */
#define FXP_CB_COMMAND_SF 0x0008 /* simple/flexible mode */
#define FXP_CB_COMMAND_I 0x2000 /* generate interrupt on completion */
#define FXP_CB_COMMAND_S 0x4000 /* suspend on completion */
#define FXP_CB_COMMAND_EL 0x8000 /* end of list */
/*
* RFA definitions
*/
struct fxp_rfa {
volatile u_int16_t rfa_status;
volatile u_int16_t rfa_control;
volatile u_int8_t link_addr[4];
volatile u_int8_t rbd_addr[4];
volatile u_int16_t actual_size;
volatile u_int16_t size;
};
#define FXP_RFA_STATUS_RCOL 0x0001 /* receive collision */
#define FXP_RFA_STATUS_IAMATCH 0x0002 /* 0 = matches station address */
#define FXP_RFA_STATUS_S4 0x0010 /* receive error from PHY */
#define FXP_RFA_STATUS_TL 0x0020 /* type/length */
#define FXP_RFA_STATUS_FTS 0x0080 /* frame too short */
#define FXP_RFA_STATUS_OVERRUN 0x0100 /* DMA overrun */
#define FXP_RFA_STATUS_RNR 0x0200 /* no resources */
#define FXP_RFA_STATUS_ALIGN 0x0400 /* alignment error */
#define FXP_RFA_STATUS_CRC 0x0800 /* CRC error */
#define FXP_RFA_STATUS_OK 0x2000 /* packet received okay */
#define FXP_RFA_STATUS_C 0x8000 /* packet reception complete */
#define FXP_RFA_CONTROL_SF 0x08 /* simple/flexible memory mode */
#define FXP_RFA_CONTROL_H 0x10 /* header RFD */
#define FXP_RFA_CONTROL_S 0x4000 /* suspend after reception */
#define FXP_RFA_CONTROL_EL 0x8000 /* end of list */
/*
* Statistics dump area definitions
*/
struct fxp_stats {
volatile u_int32_t tx_good;
volatile u_int32_t tx_maxcols;
volatile u_int32_t tx_latecols;
volatile u_int32_t tx_underruns;
volatile u_int32_t tx_lostcrs;
volatile u_int32_t tx_deffered;
volatile u_int32_t tx_single_collisions;
volatile u_int32_t tx_multiple_collisions;
volatile u_int32_t tx_total_collisions;
volatile u_int32_t rx_good;
volatile u_int32_t rx_crc_errors;
volatile u_int32_t rx_alignment_errors;
volatile u_int32_t rx_rnr_errors;
volatile u_int32_t rx_overrun_errors;
volatile u_int32_t rx_cdt_errors;
volatile u_int32_t rx_shortframes;
volatile u_int32_t completion_status;
};
#define FXP_STATS_DUMP_COMPLETE 0xa005
#define FXP_STATS_DR_COMPLETE 0xa007
/*
* Serial EEPROM control register bits
*/
#define FXP_EEPROM_EESK 0x01 /* shift clock */
#define FXP_EEPROM_EECS 0x02 /* chip select */
#define FXP_EEPROM_EEDI 0x04 /* data in */
#define FXP_EEPROM_EEDO 0x08 /* data out */
/*
* Serial EEPROM opcodes, including start bit
*/
#define FXP_EEPROM_OPC_ERASE 0x4
#define FXP_EEPROM_OPC_WRITE 0x5
#define FXP_EEPROM_OPC_READ 0x6
/*
* Management Data Interface opcodes
*/
#define FXP_MDI_WRITE 0x1
#define FXP_MDI_READ 0x2
/*
* PHY device types
*/
#define FXP_PHY_DEVICE_MASK 0x3f00
#define FXP_PHY_SERIAL_ONLY 0x8000
#define FXP_PHY_NONE 0
#define FXP_PHY_82553A 1
#define FXP_PHY_82553C 2
#define FXP_PHY_82503 3
#define FXP_PHY_DP83840 4
#define FXP_PHY_80C240 5
#define FXP_PHY_80C24 6
#define FXP_PHY_82555 7
#define FXP_PHY_DP83840A 10
#define FXP_PHY_82555B 11
bsps/shared/net/open_eth.c
+767
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bsps/shared/net/smc91111.c
+1653
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bsps/shared/net/smc91111config.h
+118
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@@ -0,0 +1,118 @@
#ifndef _SMC91111_CONFIG_H_
#define _SMC91111_CONFIG_H_
/*
* RTEMS event used by interrupt handler to signal driver tasks.
* This must not be any of the events used by the network task synchronization.
*/
#define INTERRUPT_EVENT RTEMS_EVENT_1
/*
* RTEMS event used to start transmit daemon.
* This must not be the same as INTERRUPT_EVENT.
*/
#define START_TRANSMIT_EVENT RTEMS_EVENT_2
/* event to send when tx buffers become available */
#define SMC91111_TX_WAIT_EVENT RTEMS_EVENT_3
/* Number of OCs supported by this driver*/
#define NOCDRIVER 1
/* Receive buffer size -- Allow for a full ethernet packet including CRC */
#define RBUF_SIZE 1536
#define ET_MINLEN 64 /* minimum message length */
#if (MCLBYTES < RBUF_SIZE)
# error "Driver must have MCLBYTES > RBUF_SIZE"
#endif
/* ----------------- cygdriver params ----------------- */
#define LAN91CXX_32BIT_RX
#define LAN91CXX_IS_LAN91C111
/* ----------------- compat layer ----------------- */
#include <stdint.h>
typedef uint32_t CYG_WORD;
typedef uint8_t CYG_BYTE;
typedef uint16_t CYG_WORD16;
typedef uint32_t CYG_WORD32;
#ifndef CYG_SWAP16
# define CYG_SWAP16(_x_) \
({ uint16_t _x = (_x_); ((_x << 8) | (_x >> 8)); })
#endif
#ifndef CYG_SWAP32
# define CYG_SWAP32(_x_) \
({ uint32_t _x = (_x_); \
((_x << 24) | \
((0x0000FF00UL & _x) << 8) | \
((0x00FF0000UL & _x) >> 8) | \
(_x >> 24)); })
#endif
# define CYG_CPU_TO_BE16(_x_) (_x_)
# define CYG_CPU_TO_BE32(_x_) (_x_)
# define CYG_BE16_TO_CPU(_x_) (_x_)
# define CYG_BE32_TO_CPU(_x_) (_x_)
# define CYG_CPU_TO_LE16(_x_) CYG_SWAP16((_x_))
# define CYG_CPU_TO_LE32(_x_) CYG_SWAP32((_x_))
# define CYG_LE16_TO_CPU(_x_) CYG_SWAP16((_x_))
# define CYG_LE32_TO_CPU(_x_) CYG_SWAP32((_x_))
#define CYG_MACRO_START do {
#define CYG_MACRO_END } while (0)
#define HAL_IO_BARRIER() \
__asm__ volatile ( "" : : : "memory" )
#define HAL_READ_UINT8( _register_, _value_ ) \
CYG_MACRO_START \
((_value_) = *((volatile CYG_BYTE *)(_register_))); \
HAL_IO_BARRIER (); \
CYG_MACRO_END
#define HAL_WRITE_UINT8( _register_, _value_ ) \
CYG_MACRO_START \
(*((volatile CYG_BYTE *)(_register_)) = (_value_)); \
HAL_IO_BARRIER (); \
CYG_MACRO_END
#define HAL_READ_UINT16( _register_, _value_ ) \
CYG_MACRO_START \
((_value_) = *((volatile CYG_WORD16 *)(_register_))); \
HAL_IO_BARRIER (); \
CYG_MACRO_END
#define HAL_WRITE_UINT16( _register_, _value_ ) \
CYG_MACRO_START \
(*((volatile CYG_WORD16 *)(_register_)) = (_value_)); \
HAL_IO_BARRIER (); \
CYG_MACRO_END
#define HAL_READ_UINT32( _register_, _value_ ) \
CYG_MACRO_START \
((_value_) = *((volatile CYG_WORD32 *)(_register_))); \
HAL_IO_BARRIER (); \
CYG_MACRO_END
#define HAL_READ_UINT16( _register_, _value_ ) \
CYG_MACRO_START \
((_value_) = *((volatile CYG_WORD16 *)(_register_))); \
HAL_IO_BARRIER (); \
CYG_MACRO_END
#define CYG_ASSERT(c,p) do { if (!(c)) { while(1) { printf(p);} }; } while(0)
#define HAL_DELAY_US(p) rtems_task_wake_after (RTEMS_MICROSECONDS_TO_TICKS (p))
#endif /* _SMC_91111_CONFIG_H_ */
bsps/shared/net/sonic.c
+1685
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