diff --git a/c/src/lib/libbsp/powerpc/ChangeLog b/c/src/lib/libbsp/powerpc/ChangeLog
index 4958d161f5..b788422bc9 100644
--- a/c/src/lib/libbsp/powerpc/ChangeLog
+++ b/c/src/lib/libbsp/powerpc/ChangeLog
@@ -1,3 +1,8 @@
+2009-09-09	Joel Sherrill <joel.sherrill@oarcorp.com>
+
+	PR 1435/bsps
+	* shared/startup/bspidle.c: New file.
+
 2009-08-25	Joel Sherrill <joel.sherrill@OARcorp.com>
 
 	* ep1a/startup/linkcmds, mbx8xx/startup/linkcmds,
diff --git a/c/src/lib/libbsp/powerpc/shared/startup/bspidle.c b/c/src/lib/libbsp/powerpc/shared/startup/bspidle.c
new file mode 100644
index 0000000000..4a8a0ba0c0
--- /dev/null
+++ b/c/src/lib/libbsp/powerpc/shared/startup/bspidle.c
@@ -0,0 +1,36 @@
+/*
+ *  Moved to libbsp/powerpc/shared by Joel Sherrill (9 Sept 09).
+ *
+ *  The MPC860 specific stuff was written by Jay Monkman (jmonkman@frasca.com)
+ *
+ *  Modified for the MPC8260ADS board by Andy Dachs <a.dachs@sstl.co.uk>
+ *  Surrey Satellite Technology Limited, 2001
+ *
+ *  COPYRIGHT (c) 1989-2009.
+ *  On-Line Applications Research Corporation (OAR).
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.rtems.com/license/LICENSE.
+ *
+ *  $Id$
+ */
+
+#include <bsp.h>
+
+/**
+ * @brief BSP Idle thread body.
+ *
+ *  The MSR[POW] bit is set to put the CPU into the low power mode
+ *  defined in HID0.  HID0 is set during starup in start.S.
+ */
+void *bsp_idle_thread( uintptr_t ignored )
+{
+  for( ; ; ) {
+    asm volatile(
+      "mfmsr 3; oris 3,3,4; sync; mtmsr 3; isync; ori 3,3,0; ori 3,3,0"
+    );
+  }
+
+  return 0; /* to remove warning */
+}