#
#  $Id$
#

BSP NAME:	    gen68302
BOARD:              proprietary (see below for relevant information)
BUS:                none
CPU FAMILY:         MC68000
COPROCESSORS:       68302 communications co-processor
MODE:               not applicable

DEBUG MONITOR:      none

PERIPHERALS
===========
TIMERS:             two 68302 timers, one 68302 watchdog timer
  RESOLUTION:         ?
SERIAL PORTS:       three 68302 SCCs
REAL-TIME CLOCK:
DMA:                built-in 68302, not used
VIDEO:              none
SCSI:               none
NETWORKING:         none

DRIVER INFORMATION
==================
CLOCK DRIVER:       68302 (TIMER1)
IOSUPP DRIVER:      68302 SCC2
SHMSUPP:            none
TIMER DRIVER:       68302 TIMER2

STDIO
=====
PORT:               ?
ELECTRICAL:         EIA-232
BAUD:               9600
BITS PER CHARACTER: 8
PARITY:             None
STOP BITS:          1

NOTES
=====

Board description
-----------------
clock rate:	16 MHz
bus width:	16 bits
ROM:		128 kbyte (flash,  0 wait states, chip select 0)
RAM:		256 kbyte (static, 0 wait states, chip select 1)

The 68302's built-in DRAM refresh controller circuitry is neither used
nor configured at startup.

Host System
-----------
HP 9000/715, HP-UX 9.05
gcc-2.6.3
binutils-2.5.2


Verification
------------
The 1-ms clock ISR rate was verified with an in-circuit emulator.

Single processor tests:  
Multi-processort tests:  not applicable
Timing tests:            see results in c/src/tests/tmtests/times

Note: The board has 256 kbyte RAM, so the timing tests would not run
with the standard executive RAM size configuration of 256 K.
Modifying the conftbl.h files to specify 160 kbyte for workspace
seemed to work.

* Porting

** Mod c/src/tests/tmtests/*/conftbl.h

Modified to use 160 kbyte for executive RAM size.

** Add	c/make/custom/gen68302.cfg

Based on m68k_no_bsp.cfg.  Turned off multiprocessor support.  Had to
use a BSP-specific compiler configuration file in order to link the
proper startup file.

** Mod	c/make/compilers/gcc-m68000.cfg

Added "-m68000" to the AS macro so that non-68000 instructions are
neither generated nor allowed (remember that the GNU assembler
supports pseudo-assembler instructions (e.g. jbsr) that will be
"intelligently" assembled.)  Added "m68000/" before libgcc.a so that
non-68000 instructions aren't included.

** Add	c/make/compilers/gcc-gen68302.cfg

Based on modified gcc-m68000.cfg.

Changed make-exe define to produce IEEE-695 output files for loading
into the emulator.

The board has no debug monitor, so I had to create a 68302-specific
startup file (c/src/lib/libbsp/m68k/gen68302/start302/start302.s) to
override the c/src/lib/start/m68k/start.s.  START_FILE entry was
modified to causes start302.s to be linked first (in lieu of start.s).

** Mod	c/src/exec/cpu/m68k/cpu.h

Turned off software and hardware interrupt stack support.  Added
support in _CPU_Bitfield_Find_first_bit() and
_CPU_Priority_Bits_index() to replace the bfffo instruction.

TODO: add software-maintained interrupt stack.

TODO: optimize things so that subtracting _priority from 15 isn't
required in _CPU_Priority_Bits_index().

** Mod	c/src/exec/cpu/m68k/cpu.c

Added the log base 2 table (__log2table) that's required by the BFFFO
replacement in cpu.h.

** Mod	c/src/exec/cpu/m68k/cpu_asm.s

Added _ISR_Exit that's currently used in TBD....  Added ifdef wrapper
around ISR exit code that accessed the format nibble.  Added some code
to restore the status register and call _Thread_Dispatch.

TODO: add software-maintained interrupt stack.

** Mod	c/src/exec/cpu/m68k/m68k.h

Changed "typedef char signed8" to "typedef signed char signed8".

** Add	c/src/lib/libbsp/m68k/gen68302/...
*** clock/

TODO: Add set_vector support.  Figure out what to do with Clock_exit().
TODO: Pre-compute (BSP_Configuration.microseconds_per_tick/1000) so that
it doesn't have to be re-computed on each Clock_isr().

*** console/

These files assume SCC2, but it shouldn't be too difficult to re-write
these to use any of the other SCCs.

*** include/
*** start302/

This contains the start302.s file that does some fairly tricky memory
re-mapping so that RAM ends up at 0 and ROM ends up at 0xc00000.

*** startup/
*** timer/
*** wrapup/
