kenneth.liu 2be83d5cad libcpu: riscv: fixed ARCH_RISCV_VECTOR issue ...

description: Using the vector instruction set to trigger
an illegal instruction exception when ARCH_SISCV_VECTOR=y.

analysis: When initializing the thread stack,
the rt_cw_stack_init function did not enable VS for SSTATUS.

Solution: When ARCH_SISCV_VECTOR=y,
increment the initial value of sstatus by 0x600(SSTATUS_VS).

Signed-off-by: Liu Gui <kenneth.liu@sophgo.com>

2025-02-22 14:17:54 -05:00

..

common

libcpu: riscv: common: fixed build warnings

2025-01-29 20:28:38 -05:00

common64

libcpu: riscv: fixed ARCH_RISCV_VECTOR issue

2025-02-22 14:17:54 -05:00

rv64

libcpu: riscv: rv64: fixed warnings

2025-01-29 20:28:38 -05:00

t-head

给vector模块添加构建脚本

2024-11-27 18:04:59 +08:00

vector

给vector模块添加构建脚本

2024-11-27 18:04:59 +08:00

virt64

bsp: qemu-virt64-riscv: remove config RISCV_S_MODE

2025-01-10 17:14:13 +08:00

SConscript

给vector模块添加构建脚本

2024-11-27 18:04:59 +08:00