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239 lines
7.8 KiB
C
239 lines
7.8 KiB
C
/** @file sys_pcr.h
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* @brief PCR Driver Header File
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* @date 29.May.2013
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* @version 03.05.02
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*
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* This file contains:
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* - Definitions
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* - Types
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* .
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* which are relevant for the System driver.
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*/
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/* (c) Texas Instruments 2009-2013, All rights reserved. */
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#ifndef __SYS_PCR_H__
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#define __SYS_PCR_H__
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#include "reg_pcr.h"
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/* USER CODE BEGIN (0) */
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/* USER CODE END */
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/* PCR General Definitions */
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typedef uint32 peripheralFrame_CS_t;
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#define PeripheralFrame_CS0 0U
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#define PeripheralFrame_CS1 1U
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#define PeripheralFrame_CS2 2U
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#define PeripheralFrame_CS3 3U
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#define PeripheralFrame_CS4 4U
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#define PeripheralFrame_CS5 5U
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#define PeripheralFrame_CS6 6U
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#define PeripheralFrame_CS7 7U
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#define PeripheralFrame_CS8 8U
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#define PeripheralFrame_CS9 9U
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#define PeripheralFrame_CS10 10U
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#define PeripheralFrame_CS11 11U
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#define PeripheralFrame_CS12 12U
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#define PeripheralFrame_CS13 13U
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#define PeripheralFrame_CS14 14U
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#define PeripheralFrame_CS15 15U
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#define PeripheralFrame_CS16 16U
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#define PeripheralFrame_CS17 17U
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#define PeripheralFrame_CS18 18U
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#define PeripheralFrame_CS19 19U
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#define PeripheralFrame_CS20 20U
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#define PeripheralFrame_CS21 21U
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#define PeripheralFrame_CS22 22U
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#define PeripheralFrame_CS23 23U
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#define PeripheralFrame_CS24 24U
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#define PeripheralFrame_CS25 25U
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#define PeripheralFrame_CS26 26U
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#define PeripheralFrame_CS27 27U
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#define PeripheralFrame_CS28 28U
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#define PeripheralFrame_CS29 29U
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#define PeripheralFrame_CS30 30U
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#define PeripheralFrame_CS31 31U
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/* USER CODE BEGIN (1) */
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/* USER CODE END */
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typedef uint32 quadrant_Select_t;
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#define Quadrant0 1U
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#define Quadrant1 2U
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#define Quadrant2 4U
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#define Quadrant3 8U
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/* USER CODE BEGIN (2) */
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/* USER CODE END */
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/** @typedef peripheral_Frame_Select_t
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* @brief PCR Peripheral Frame Type Definition
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*
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* This type is used to access the PCR peripheral Frame configuration register.
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*/
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typedef struct peripheral_Frame_Select
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{
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peripheralFrame_CS_t Peripheral_CS;
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quadrant_Select_t Peripheral_Quadrant;
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}peripheral_Frame_Select_t;
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/* USER CODE BEGIN (3) */
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/* USER CODE END */
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/** @typedef peripheral_Quad_ChipSelect_t
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* @brief PCR Peripheral Frame registers Type Definition
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*
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* This type is used to access all the PCR peripheral Frame configuration registers.
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*/
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typedef struct peripheral_Quad_ChipSelect
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{
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uint32 Peripheral_Quad0_3_CS0_7;
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uint32 Peripheral_Quad4_7_CS8_15;
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uint32 Peripheral_Quad8_11_CS16_23;
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uint32 Peripheral_Quad12_15_CS24_31;
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}peripheral_Quad_ChipSelect_t;
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/* USER CODE BEGIN (4) */
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/* USER CODE END */
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/** @typedef peripheral_Memory_ChipSelect_t
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* @brief PCR Peripheral Memory Frame registers Type Definition
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*
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* This type is used to access all the PCR peripheral Memory Frame configuration registers.
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*/
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typedef struct peripheral_Memory_ChipSelect
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{
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uint32 Peripheral_Mem_CS0_31;
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uint32 Peripheral_Mem_CS32_63;
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}peripheral_Memory_ChipSelect_t;
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/* USER CODE BEGIN (5) */
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/* USER CODE END */
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typedef uint32 peripheral_MemoryFrame_CS_t;
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#define PeripheralMemoryFrame_CS0 0U
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#define PeripheralMemoryFrame_CS1 1U
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#define PeripheralMemoryFrame_CS2 2U
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#define PeripheralMemoryFrame_CS3 3U
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#define PeripheralMemoryFrame_CS4 4U
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#define PeripheralMemoryFrame_CS5 5U
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#define PeripheralMemoryFrame_CS6 6U
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#define PeripheralMemoryFrame_CS7 7U
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#define PeripheralMemoryFrame_CS8 8U
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#define PeripheralMemoryFrame_CS9 9U
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#define PeripheralMemoryFrame_CS10 10U
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#define PeripheralMemoryFrame_CS11 11U
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#define PeripheralMemoryFrame_CS12 12U
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#define PeripheralMemoryFrame_CS13 13U
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#define PeripheralMemoryFrame_CS14 14U
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#define PeripheralMemoryFrame_CS15 15U
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#define PeripheralMemoryFrame_CS16 16U
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#define PeripheralMemoryFrame_CS17 17U
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#define PeripheralMemoryFrame_CS18 18U
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#define PeripheralMemoryFrame_CS19 19U
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#define PeripheralMemoryFrame_CS20 20U
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#define PeripheralMemoryFrame_CS21 21U
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#define PeripheralMemoryFrame_CS22 22U
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#define PeripheralMemoryFrame_CS23 23U
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#define PeripheralMemoryFrame_CS24 24U
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#define PeripheralMemoryFrame_CS25 25U
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#define PeripheralMemoryFrame_CS26 26U
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#define PeripheralMemoryFrame_CS27 27U
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#define PeripheralMemoryFrame_CS28 28U
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#define PeripheralMemoryFrame_CS29 29U
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#define PeripheralMemoryFrame_CS30 30U
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#define PeripheralMemoryFrame_CS31 31U
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#define PeripheralMemoryFrame_CS32 32U
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#define PeripheralMemoryFrame_CS33 33U
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#define PeripheralMemoryFrame_CS34 34U
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#define PeripheralMemoryFrame_CS35 35U
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#define PeripheralMemoryFrame_CS36 36U
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#define PeripheralMemoryFrame_CS37 37U
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#define PeripheralMemoryFrame_CS38 38U
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#define PeripheralMemoryFrame_CS39 39U
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#define PeripheralMemoryFrame_CS40 40U
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#define PeripheralMemoryFrame_CS41 41U
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#define PeripheralMemoryFrame_CS42 42U
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#define PeripheralMemoryFrame_CS43 43U
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#define PeripheralMemoryFrame_CS44 44U
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#define PeripheralMemoryFrame_CS45 45U
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#define PeripheralMemoryFrame_CS46 46U
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#define PeripheralMemoryFrame_CS47 47U
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#define PeripheralMemoryFrame_CS48 48U
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#define PeripheralMemoryFrame_CS49 49U
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#define PeripheralMemoryFrame_CS50 50U
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#define PeripheralMemoryFrame_CS51 51U
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#define PeripheralMemoryFrame_CS52 52U
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#define PeripheralMemoryFrame_CS53 53U
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#define PeripheralMemoryFrame_CS54 54U
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#define PeripheralMemoryFrame_CS55 55U
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#define PeripheralMemoryFrame_CS56 56U
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#define PeripheralMemoryFrame_CS57 57U
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#define PeripheralMemoryFrame_CS58 58U
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#define PeripheralMemoryFrame_CS59 59U
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#define PeripheralMemoryFrame_CS60 60U
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#define PeripheralMemoryFrame_CS61 61U
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#define PeripheralMemoryFrame_CS62 62U
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#define PeripheralMemoryFrame_CS63 63U
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/* USER CODE BEGIN (6) */
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/* USER CODE END */
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/**
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* @defgroup PCR PCR
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* @brief Peripheral Central Resource Controller
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*
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* The PCR manages the accesses to the peripheral registers and peripheral
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* memories. It provides a global reset for all the peripherals. It also supports the
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* capability to selectively enable or disable the clock for each peripheral
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* individually. The PCR also manages the accesses to the system module
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* registers required to configure the device’s clocks, interrupts, and so on. The
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* system module registers also include status flags for indicating exception
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* conditions – resets, aborts, errors, interrupts.
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*
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* Related files:
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* - reg_pcr.h
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* - sys_pcr.h
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* - sys_pcr.c
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*
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* @addtogroup PCR
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* @{
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*/
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/* PCR Interface Functions */
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void peripheral_Frame_Protection_Set(peripheral_Frame_Select_t peripheral_Frame);
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void peripheral_Frame_Protection_Clr(peripheral_Frame_Select_t peripheral_Frame);
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void peripheral_Frame_Powerdown_Set(peripheral_Frame_Select_t peripheral_Frame);
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void peripheral_Frame_Powerdown_Clr(peripheral_Frame_Select_t peripheral_Frame);
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void peripheral_Protection_Set(peripheral_Quad_ChipSelect_t peripheral_Quad_CS);
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void peripheral_Protection_Clr(peripheral_Quad_ChipSelect_t peripheral_Quad_CS);
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peripheral_Quad_ChipSelect_t peripheral_Protection_Status(void);
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void peripheral_Powerdown_Set(peripheral_Quad_ChipSelect_t peripheral_Quad_CS);
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void peripheral_Powerdown_Clr(peripheral_Quad_ChipSelect_t peripheral_Quad_CS);
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peripheral_Quad_ChipSelect_t peripheral_Powerdown_Status(void);
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void peripheral_Memory_Protection_Set(peripheral_Memory_ChipSelect_t peripheral_Memory_CS);
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void peripheral_Memory_Protection_Clr(peripheral_Memory_ChipSelect_t peripheral_Memory_CS);
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peripheral_Memory_ChipSelect_t peripheral_Memory_Protection_Status(void);
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void peripheral_Memory_Powerdown_Set(peripheral_Memory_ChipSelect_t peripheral_Memory_CS);
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void peripheral_Memory_Powerdown_Clr(peripheral_Memory_ChipSelect_t peripheral_Memory_CS);
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peripheral_Memory_ChipSelect_t Periipheral_Memory_Powerdown_Status(void);
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void peripheral_Mem_Frame_Prot_Set(peripheral_MemoryFrame_CS_t peripheral_Memory_Frame_CS);
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void peripheral_Mem_Frame_Prot_Clr(peripheral_MemoryFrame_CS_t peripheral_Memory_Frame_CS);
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void peripheral_Mem_Frame_Pwrdwn_Set(peripheral_MemoryFrame_CS_t peripheral_Memory_Frame_CS);
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void peripheral_Mem_Frame_Pwrdwn_Clr (peripheral_MemoryFrame_CS_t peripheral_Memory_Frame_CS);
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/**@}*/
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/* USER CODE BEGIN (7) */
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/* USER CODE END */
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#endif
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