Bernard Xiong ec6cb9f260 [BSP][qemu-vexpress-a9] code cleaup for compiling warning.

2019-05-12 15:07:26 +08:00

..

armv7.h

…

cache.c

Add standard rt-thread cache interfaces for arm/cortex-a.

2019-03-29 20:22:25 +08:00

context_gcc.S

fix signal code

2019-05-11 09:34:26 +08:00

cp15_gcc.S

Make 'qemu-vexpress-a9' and 'imx6ul' use the same libcpu code.

2019-03-25 20:03:49 +08:00

cp15.h

Make 'qemu-vexpress-a9' and 'imx6ul' use the same libcpu code.

2019-03-25 20:03:49 +08:00

cpu.c

Make 'qemu-vexpress-a9' and 'imx6ul' use the same libcpu code.

2019-03-25 20:03:49 +08:00

gic.c

Make 'qemu-vexpress-a9' and 'imx6ul' use the same libcpu code.

2019-03-25 20:03:49 +08:00

gic.h

Rename 'platform.h' in 'imx6ul' and 'qemu-vexpress-a9' BSPs.

2019-04-26 10:50:48 +08:00

interrupt.c

Make 'qemu-vexpress-a9' and 'imx6ul' use the same libcpu code.

2019-03-25 20:03:49 +08:00

interrupt.h

[BSP][qemu-vexpress-a9] code cleaup for compiling warning.

2019-05-12 15:07:26 +08:00

mmu.c

Make 'qemu-vexpress-a9' and 'imx6ul' use the same libcpu code.

2019-03-25 20:03:49 +08:00

mmu.h

Add standard rt-thread cache interfaces for arm/cortex-a.

2019-03-29 20:22:25 +08:00

pmu.c

…

pmu.h

…

SConscript

…

stack.c

Make 'qemu-vexpress-a9' and 'imx6ul' use the same libcpu code.

2019-03-25 20:03:49 +08:00

start_gcc.S

fix signal code

2019-05-11 09:34:26 +08:00

trap.c

Rename 'platform.h' in 'imx6ul' and 'qemu-vexpress-a9' BSPs.

2019-04-26 10:50:48 +08:00

vector_gcc.S

…