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https://github.com/RT-Thread/rt-thread.git
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cd1d47b87c
1. CFI-Nor flash DM driver. 2. SPI-Nor flash DM driver. Signed-off-by: GuEe-GUI <2991707448@qq.com>
167 lines
5.9 KiB
C
167 lines
5.9 KiB
C
/*
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* Copyright (c) 2006-2023, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2023-02-25 GuEe-GUI the first version
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*/
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#ifndef __MTD_CFI_H__
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#define __MTD_CFI_H__
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#include <rtthread.h>
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/* Values for the width of the port */
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#define FLASH_CFI_8BIT 0x01
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#define FLASH_CFI_16BIT 0x02
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#define FLASH_CFI_32BIT 0x04
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#define FLASH_CFI_64BIT 0x08
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/* Values for the width of the chip */
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#define FLASH_CFI_BY8 0x01
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#define FLASH_CFI_BY16 0x02
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#define FLASH_CFI_BY32 0x04
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#define FLASH_CFI_BY64 0x08
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/* Values for the flash device interface */
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#define FLASH_CFI_X8 0x00
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#define FLASH_CFI_X16 0x01
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#define FLASH_CFI_X8X16 0x02
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#define FLASH_CFI_X16X32 0x05
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/* Convert between bit value and numeric value */
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#define FLASH_CFI_SHIFT_WIDTH 3
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#define FLASH_CMD_CFI 0x98
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#define FLASH_CMD_READ_ID 0x90
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#define FLASH_CMD_RESET 0xff
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#define FLASH_CMD_BLOCK_ERASE 0x20
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#define FLASH_CMD_ERASE_CONFIRM 0xd0
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#define FLASH_CMD_WRITE 0x40
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#define FLASH_CMD_PROTECT 0x60
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#define FLASH_CMD_SETUP 0x60
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#define FLASH_CMD_SET_CR_CONFIRM 0x03
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#define FLASH_CMD_PROTECT_SET 0x01
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#define FLASH_CMD_PROTECT_CLEAR 0xd0
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#define FLASH_CMD_CLEAR_STATUS 0x50
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#define FLASH_CMD_READ_STATUS 0x70
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#define FLASH_CMD_WRITE_TO_BUFFER 0xe8
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#define FLASH_CMD_WRITE_BUFFER_PROG 0xe9
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#define FLASH_CMD_WRITE_BUFFER_CONFIRM 0xd0
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#define FLASH_STATUS_DONE 0x80
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#define FLASH_STATUS_ESS 0x40
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#define FLASH_STATUS_ECLBS 0x20
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#define FLASH_STATUS_PSLBS 0x10
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#define FLASH_STATUS_VPENS 0x08
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#define FLASH_STATUS_PSS 0x04
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#define FLASH_STATUS_DPS 0x02
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#define FLASH_STATUS_R 0x01
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#define FLASH_STATUS_PROTECT 0x01
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#define FLASH_CONTINUATION_CODE 0x7f
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#define FLASH_OFFSET_MANUFACTURER_ID 0x00
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#define FLASH_OFFSET_DEVICE_ID 0x01
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#define FLASH_OFFSET_LOWER_SW_BITS 0x0c
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#define FLASH_OFFSET_DEVICE_ID2 0x0e
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#define FLASH_OFFSET_DEVICE_ID3 0x0f
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#define FLASH_OFFSET_CFI 0x55
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#define FLASH_OFFSET_CFI_ALT 0x555
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#define FLASH_OFFSET_CFI_RESP 0x10 /* "QRY" */
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#define FLASH_OFFSET_PRIMARY_VENDOR 0x13 /* Primary OEM command set */
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#define FLASH_OFFSET_EXT_QUERY_T_P_ADDR 0x15 /* Extended query table primary address */
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#define FLASH_OFFSET_WTOUT 0x1f
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#define FLASH_OFFSET_WBTOUT 0x20
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#define FLASH_OFFSET_ETOUT 0x21
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#define FLASH_OFFSET_CETOUT 0x22
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#define FLASH_OFFSET_WMAX_TOUT 0x23
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#define FLASH_OFFSET_WBMAX_TOUT 0x24
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#define FLASH_OFFSET_EMAX_TOUT 0x25
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#define FLASH_OFFSET_CEMAX_TOUT 0x26
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#define FLASH_OFFSET_SIZE 0x27 /* 2^N bytes */
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#define FLASH_OFFSET_INTERFACE 0x28
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#define FLASH_OFFSET_BUFFER_SIZE 0x2a
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#define FLASH_OFFSET_NUM_ERASE_REGIONS 0x2c
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#define FLASH_OFFSET_ERASE_REGIONS 0x2d
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#define FLASH_OFFSET_PROTECT 0x02
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#define FLASH_OFFSET_USER_PROTECTION 0x85
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#define FLASH_OFFSET_INTEL_PROTECTION 0x81
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#define CFI_CMDSET_NONE 0
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#define CFI_CMDSET_INTEL_EXTENDED 1
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#define CFI_CMDSET_AMD_STANDARD 2
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#define CFI_CMDSET_INTEL_STANDARD 3
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#define CFI_CMDSET_AMD_EXTENDED 4
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#define CFI_CMDSET_MITSU_STANDARD 256
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#define CFI_CMDSET_MITSU_EXTENDED 257
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#define CFI_CMDSET_SST 258
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#define CFI_CMDSET_INTEL_PROG_REGIONS 512
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#define AMD_CMD_RESET 0xf0
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#define AMD_CMD_WRITE 0xa0
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#define AMD_CMD_ERASE_START 0x80
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#define AMD_CMD_ERASE_SECTOR 0x30
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#define AMD_CMD_UNLOCK_START 0xaa
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#define AMD_CMD_UNLOCK_ACK 0x55
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#define AMD_CMD_WRITE_TO_BUFFER 0x25
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#define AMD_CMD_WRITE_BUFFER_CONFIRM 0x29
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#define AMD_CMD_SET_PPB_ENTRY 0xc0
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#define AMD_CMD_SET_PPB_EXIT_BC1 0x90
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#define AMD_CMD_SET_PPB_EXIT_BC2 0x00
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#define AMD_CMD_PPB_UNLOCK_BC1 0x80
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#define AMD_CMD_PPB_UNLOCK_BC2 0x30
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#define AMD_CMD_PPB_LOCK_BC1 0xa0
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#define AMD_CMD_PPB_LOCK_BC2 0x00
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#define AMD_STATUS_TOGGLE 0x40
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#define AMD_STATUS_ERROR 0x20
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#define ATM_CMD_UNLOCK_SECT 0x70
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#define ATM_CMD_SOFTLOCK_START 0x80
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#define ATM_CMD_LOCK_SECT 0x40
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union cfi_word
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{
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rt_uint8_t w8;
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rt_uint16_t w16;
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rt_uint32_t w32;
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rt_uint64_t w64;
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};
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#ifndef CFI_FLASH_SECT_MAX
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#define CFI_FLASH_SECT_MAX 512
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#endif
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#ifndef CFI_QUERY_ERASE_REGIONS_MAX
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#define CFI_QUERY_ERASE_REGIONS_MAX CFI_FLASH_SECT_MAX
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#endif
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rt_packed(struct cfi_query
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{
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rt_uint8_t query[3]; /* "Q" "R" "Y" */
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rt_uint16_t primary_id; /* Unaligned */
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rt_uint16_t primary_address; /* Unaligned */
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rt_uint16_t alternate_id; /* Unaligned */
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rt_uint16_t alternate_address; /* Unaligned */
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rt_uint8_t vcc_min;
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rt_uint8_t vcc_max;
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rt_uint8_t vpp_min;
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rt_uint8_t vpp_max;
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rt_uint8_t word_write_timeout_type;
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rt_uint8_t buf_write_timeout_type;
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rt_uint8_t block_erase_timeout_type;
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rt_uint8_t chip_erase_timeout_type;
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rt_uint8_t word_write_timeout_max;
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rt_uint8_t buf_write_timeout_max;
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rt_uint8_t block_erase_timeout_max;
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rt_uint8_t chip_erase_timeout_max;
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rt_uint8_t dev_size;
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rt_uint16_t interface_desc; /* Aligned */
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rt_uint16_t max_buf_write_size; /* Aligned */
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rt_uint8_t num_erase_regions;
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rt_uint32_t erase_region_info[CFI_QUERY_ERASE_REGIONS_MAX]; /* Unaligned */
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});
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#endif /* __MTD_CFI_H__ */
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