14 Commits

Include renames

Author	SHA1	Message	Date
a1012112796	ab981a32b5	[Device/I2C] Chang debug message print way to ulog	2019-11-26 07:41:43 +08:00
Ernest	7be06b67bb	[add] default environment	2019-10-22 16:48:57 +08:00
chenyong	74793a53fd	[bsp] update project configure file for finsh component change ... Signed-off-by: chenyong <1521761801@qq.com>	2019-09-26 15:40:13 +08:00
yangjie	1ef33e66cd	[bsp][Kconfig]在bsp的Kconfig中select组件初始化与user main的选项	2019-09-11 12:06:43 +08:00
LinJieqiang	d16d78c53e	fix spelling mistake for "RT_IDEL_HOOK_LIST_SIZE"	2019-09-05 08:33:12 +08:00
yangjie	ad3cbf6ed9	[bsp]support AC6 for some bsp.	2019-05-06 15:09:11 +08:00
xuzhuoyi	a0ae9d24d5	[bsp][gd32e230k-start] Update SConscript	2019-04-07 00:53:39 +08:00
xuzhuoyi	938d9fa3d9	[bsp][gd32e230k-start] Fix USART bug and change license	2019-04-07 00:37:43 +08:00
Bernard Xiong	0255f25174	Update SConscript	2019-04-06 10:51:40 +08:00
xuzhuoyi	b305628582	[bsp][gd32e230k-start] Modify rtconfig.py for Cortex-M23	2019-04-05 12:49:54 +08:00
xuzhuoyi	91f5db5f77	[bsp][gd32e230k-start] Add README.md	2019-03-31 23:27:36 +08:00
xuzhuoyi	fd8eb60a67	[bsp][gd32e230k-start] Update Kconfig	2019-03-31 23:26:35 +08:00
xuzhuoyi	5a460aadcd	[bsp][gd32e230k-start] Update Sconscript	2019-03-31 21:17:55 +08:00
xuzhuoyi	5d166c389d	[bsp][gd32e230k-start] Add GD32E230K-START BSP port	2019-03-31 15:44:24 +08:00