* doxygen: add prefix for groups
Add "group_" prefix to doxygen group names. This makes
it easier to grep with group name later.
This patch only modifies the groups defined in the pathes
of INPUT of documentation/Doxyfile:
INPUT = . \
../src \
../include \
../components/finsh \
../components/drivers/include/drivers \
../components/drivers/clk \
../components/dfs/dfs_v2/src \
../components/dfs/dfs_v2/include
Other groups are not touched.
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
* ci: fixed error report when run file_check.py
Such as:
- "please delete extra space at the end of this line."
- "the RT-Thread error code should return negative value. e.g. return
-RT_ERROR"
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
---------
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Make a max CS pin value (16) for SPI, that will not
alloc `*cs_pins` by malloc, because drivers call
`rt_device_unregister` may not free item.
Fixup the QSPI init configure member in DM mode.
Make SoC Kconfig import easy.
Signed-off-by: GuEe-GUI <2991707448@qq.com>
Accroding to #9947 and #9424, adding doxygen comment for function in .c files and data structure, macro in .h file is a solution.For this pr, I encountered problem following situations.
- rt_clk_unprepare function return value type is different from rt_clk_ops so I change type of rt_clk_unprepare and its dependencies.
- clk_get function may be similar as rt_clk_unprepare but I'm not sure so not modify.
- clk_release implements may be incomplete, so I just marked in comment.
Signed-off-by: 1078249029 <1078249029@qq.com>
1. Add PCI include in rtdevice.h
2. Fixup `RT_KEY_ENABLED` loss.
3. remove waring type of `dw_pcie_ep_get_func_from_ep` return.
Signed-off-by: GuEe-GUI <2991707448@qq.com>
Thermal drivers offer a generic mechanism for thermal management.
Usually it's made up of one or more thermal zones and cooling devices.
Each thermal zone contains its own temperature, trip points, and cooling devices.
All platforms with ACPI or OFW thermal support can use this driver.
Signed-off-by: GuEe-GUI <2991707448@qq.com>
1. There is only one GPIO device in System.
2. For Pin API input is pin number
3. Add sets pin debounce time API.
So we need a virtual pin for multi gpio chip.
Signed-off-by: GuEe-GUI <2991707448@qq.com>
1. Add the regulator driver framework.
2. Add the generic voltage and current regulator API support
for drivers.
Signed-off-by: GuEe-GUI <2991707448@qq.com>
* [DM/FEATURE] Support reset controller
Reset controllers are central units that control
the reset signals to multiple peripherals.
The reset controller API is split into two parts:
1. The consumer driver interface, which allows
peripheral drivers to request control over
their reset input signals
2. The reset controller driver interface
which is used by drivers for reset controller devices to
register their reset controls to provide them to the consumers.
* [RESET/SIMPLE] Support simple reset
Currently this driver supports:
- Altera SoCFPGAs
- ASPEED BMC SoCs
- Bitmain BM1880 SoC
- Realtek SoCs
- RCC reset controller in STM32 MCUs
- Allwinner SoCs
- SiFive FU740 SoCs
- Sophgo SoCs
Signed-off-by: GuEe-GUI <2991707448@qq.com>
This framework will be of use only to devices that use
external PHY (PHY functionality is not embedded within the controller).
Use in PCIE, USB, HDMI, DP...
Signed-off-by: GuEe-GUI <2991707448@qq.com>
* [DM/FEATURE] Support NVME
1. Support PRP and SGL (>= NVME v1.1) transport.
2. Support MSI/MSI-X for IO queues.
3. Support NVME on PCI.
Signed-off-by: GuEe-GUI <2991707448@qq.com>
1. Disk and blk device management.
2. Support partitions probe auto.
3. Support DFS and user mode fops, ioctl.
4. Add a cmd for blk info.
Signed-off-by: GuEe-GUI <2991707448@qq.com>
1. Default return OK when input NULL (if is not necessary in device).
2. Support object parse in OFW.
3. Support CLK depends fix auto.
4. Fixup rt_clk_array_prepare_enable and rt_clk_array_disable_unprepare.
Signed-off-by: GuEe-GUI <2991707448@qq.com>
old phy bus is too simple add phy_bus is not adapt rt_bus framework,so writer a stronger phy bus framework.
here is my commit message:
add mdio bus and phy bus to kernel,the phy bus use rt_bus framewok ,driver writer can write phy_driver first .when mac driver need to use phy they can register phy_device and pjhy_devie will serach for driver which match by uid and mask,if no driver match with the device that you register,phy_bus will return the genphy to you device,the genphy driver is the general driver for phy,so you can use it but it can not support the capcity of chip it may be cause performance is not up to peak
We need a API to fix the driver load auto when
a second driver get it in probe process that
we can not be careful of the driver-to-driver's
depends in different SoC.
Signed-off-by: GuEe-GUI <2991707448@qq.com>
add pci api,the pci/pcie driver writer can use this to get resource of current device with flag,there are three flag :
1. PCI_BUS_REGION_F_MEM it mean memory space
2. PCI_BUS_REGION_F_IO it mean io space
3. PCI_BUS_REGION_F_PREFETCH it mean prefetchable memory
PIC may free because some wrongs in debug.
We should remove in PIC list or there are
some undefined behavior will happen.
Signed-off-by: GuEe-GUI <2991707448@qq.com>
Chen Wang
GuEe-GUI
GUI
wumingzi
yuqingli
zhujiale
Supper Thomas
wdfk-prog
Kai
CYFS
hydevcode