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[rt-smart] porting c906 and D1s to mm (#6848)

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* [rv64/bsp] porting to mm

* [mm] report more info for debugging

* [fix] code format

* [libcpu/c906] porting to RTOS

* [fix] using rtdbg api

* [fix] add return

* [fix] report more information for debugging

* [fix] use assert 0 for unrecoverable error
This commit is contained in:
Shell
2023-01-16 08:24:03 +08:00
committed by GitHub
parent fec7404506
commit f0dadcb3c3
30 changed files with 1271 additions and 432 deletions
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libcpu/risc-v/virt64/interrupt.h
+23 -6
View File
@@ -11,19 +11,36 @@
#ifndef INTERRUPT_H__
#define INTERRUPT_H__
#define MAX_HANDLERS 128
#define MAX_HANDLERS 128
#include <rthw.h>
#include "stack.h"
// int rt_hw_clint_ipi_enable(void);
// int rt_hw_clint_ipi_disable(void);
enum
{
EP_INSTRUCTION_ADDRESS_MISALIGNED = 0,
EP_INSTRUCTION_ACCESS_FAULT,
EP_ILLEGAL_INSTRUCTION,
EP_BREAKPOINT,
EP_LOAD_ADDRESS_MISALIGNED,
EP_LOAD_ACCESS_FAULT,
EP_STORE_ADDRESS_MISALIGNED,
EP_STORE_ACCESS_FAULT,
EP_ENVIRONMENT_CALL_U_MODE,
EP_ENVIRONMENT_CALL_S_MODE,
EP_RESERVED10,
EP_ENVIRONMENT_CALL_M_MODE,
EP_INSTRUCTION_PAGE_FAULT, /* page attr */
EP_LOAD_PAGE_FAULT, /* read data */
EP_RESERVED14,
EP_STORE_PAGE_FAULT, /* write data */
};
int rt_hw_plic_irq_enable(int irq_number);
int rt_hw_plic_irq_disable(int irq_number);
void rt_hw_interrupt_init(void);
void rt_hw_interrupt_mask(int vector);
rt_isr_handler_t rt_hw_interrupt_install(int vector, rt_isr_handler_t handler,
void *param, const char *name);
void handle_trap(rt_size_t xcause,rt_size_t xtval,rt_size_t xepc,struct rt_hw_stack_frame *sp);
rt_isr_handler_t rt_hw_interrupt_install(int vector, rt_isr_handler_t handler, void *param, const char *name);
void handle_trap(rt_size_t xcause, rt_size_t xtval, rt_size_t xepc, struct rt_hw_stack_frame *sp);
#endif
libcpu/risc-v/virt64/mmu.c
+5 -5
View File
@@ -13,6 +13,10 @@
#include <stddef.h>
#include <stdint.h>
#define DBG_TAG "hw.mmu"
#define DBG_LVL DBG_INFO
#include <rtdbg.h>
#include <cache.h>
#include <mm_aspace.h>
#include <mm_page.h>
@@ -23,13 +27,8 @@
#ifdef RT_USING_SMART
#include <ioremap.h>
#include <lwp_user_mm.h>
#include <tlb.h>
#endif
#define DBG_TAG "hw.mmu"
#define DBG_LVL DBG_LOG
#include <rtdbg.h>
#ifndef RT_USING_SMART
#define PV_OFFSET 0
#define USER_VADDR_START 0
@@ -257,6 +256,7 @@ static inline void _init_region(void *vaddr, size_t size)
rt_ioremap_start = vaddr;
rt_ioremap_size = size;
rt_mpr_start = rt_ioremap_start - rt_mpr_size;
LOG_D("rt_ioremap_start: %p, rt_mpr_start: %p", rt_ioremap_start, rt_mpr_start);
}
#else
static inline void _init_region(void *vaddr, size_t size)
libcpu/risc-v/virt64/mmu.h
-2
View File
@@ -50,8 +50,6 @@ struct mem_desc
#define COMBINEPTE(paddr, attr) \
((((paddr) >> PAGE_OFFSET_BIT) << PTE_PPN_SHIFT) | (attr))
#define ARCH_ADDRESS_WIDTH_BITS 64
#define MMU_MAP_ERROR_VANOTALIGN -1
#define MMU_MAP_ERROR_PANOTALIGN -2
#define MMU_MAP_ERROR_NOPAGE -3
libcpu/risc-v/virt64/startup_gcc.S
+68 -68
View File
@@ -14,83 +14,83 @@
#include <cpuport.h>
boot_hartid: .int
.global boot_hartid
.global boot_hartid
.global _start
.section ".start", "ax"
.global _start
.section ".start", "ax"
_start:
j 1f
.word 0xdeadbeef
.align 3
.global g_wake_up
g_wake_up:
.dword 1
.dword 0
j 1f
.word 0xdeadbeef
.align 3
.global g_wake_up
g_wake_up:
.dword 1
.dword 0
1:
# save hartid
la t0, boot_hartid # global varible rt_boot_hartid
mv t1, a0 # get hartid in S-mode frome a0 register
sw t1, (t0) # store t1 register low 4 bits in memory address which is stored in t0
/* save hartid */
la t0, boot_hartid /* global varible rt_boot_hartid */
mv t1, a0 /* get hartid in S-mode frome a0 register */
sw t1, (t0) /* store t1 register low 4 bits in memory address which is stored in t0 */
# clear Interrupt Registers
csrw sie, 0
csrw sip, 0
# set Trap Vector Base Address Register
la t0, trap_entry
csrw stvec, t0
/* clear Interrupt Registers */
csrw sie, 0
csrw sip, 0
/* set Trap Vector Base Address Register */
la t0, trap_entry
csrw stvec, t0
li x1, 0
li x2, 0
li x3, 0
li x4, 0
li x5, 0
li x6, 0
li x7, 0
li x8, 0
li x9, 0
li x10,0
li x11,0
li x12,0
li x13,0
li x14,0
li x15,0
li x16,0
li x17,0
li x18,0
li x19,0
li x20,0
li x21,0
li x22,0
li x23,0
li x24,0
li x25,0
li x26,0
li x27,0
li x28,0
li x29,0
li x30,0
li x31,0
li x1, 0
li x2, 0
li x3, 0
li x4, 0
li x5, 0
li x6, 0
li x7, 0
li x8, 0
li x9, 0
li x10,0
li x11,0
li x12,0
li x13,0
li x14,0
li x15,0
li x16,0
li x17,0
li x18,0
li x19,0
li x20,0
li x21,0
li x22,0
li x23,0
li x24,0
li x25,0
li x26,0
li x27,0
li x28,0
li x29,0
li x30,0
li x31,0
/* set to disable FPU */
li t0, SSTATUS_FS + SSTATUS_VS
csrc sstatus, t0
li t0, 0x40000 // SUM in sstatus
csrs sstatus, t0
/* set to disable FPU */
li t0, SSTATUS_FS + SSTATUS_VS
csrc sstatus, t0
li t0, SSTATUS_SUM
csrs sstatus, t0
.option push
.option norelax
la gp, __global_pointer$
la gp, __global_pointer$
.option pop
// removed SMP support here
la sp, __stack_start__
li t0, __STACKSIZE__
add sp, sp, t0
/* removed SMP support here */
la sp, __stack_start__
li t0, __STACKSIZE__
add sp, sp, t0
/**
* sscratch is always zero on kernel mode
*/
csrw sscratch, zero
call init_bss
call sbi_init
j primary_cpu_entry
/**
* sscratch is always zero on kernel mode
*/
csrw sscratch, zero
call init_bss
call sbi_init
j primary_cpu_entry
libcpu/risc-v/virt64/tlb.h
+5 -5
View File
@@ -10,14 +10,14 @@
#ifndef __TLB_H__
#define __TLB_H__
#include "mm_aspace.h"
#include "riscv_mmu.h"
#include "rtdbg.h"
#include "rtthread.h"
#include <sbi.h>
#include <stddef.h>
#include <stdint.h>
#include <rtthread.h>
#include <mm_aspace.h>
#include "sbi.h"
#include "riscv_mmu.h"
#define HANDLE_FAULT(ret) \
if (__builtin_expect((ret) != SBI_SUCCESS, 0)) \
LOG_W("%s failed", __FUNCTION__);
libcpu/risc-v/virt64/trap.c
+19 -35
View File
@@ -11,14 +11,15 @@
#include <rtthread.h>
#include <stdint.h>
#include <mm_fault.h>
#include "mmu.h"
#include "encoding.h"
#include "mm_fault.h"
#include "stack.h"
#include "sbi.h"
#include "riscv.h"
#include "tick.h"
#include "interrupt.h"
#include "plic.h"
#include "riscv_mmu.h"
#include "tick.h"
#ifdef RT_USING_SMART
#include <lwp_arch.h>
@@ -26,6 +27,10 @@
#define rt_hw_backtrace(...) (0)
#endif
#define DBG_TAG "libcpu.trap"
#define DBG_LVL DBG_INFO
#include <rtdbg.h>
void dump_regs(struct rt_hw_stack_frame *regs)
{
rt_kprintf("--------------Dump Registers-----------------\n");
@@ -64,17 +69,17 @@ void dump_regs(struct rt_hw_stack_frame *regs)
switch (__MASKVALUE(satp_v >> 60, __MASK(4)))
{
case 0:
mode_str = "No Address Translation/Protection Mode";
break;
case 0:
mode_str = "No Address Translation/Protection Mode";
break;
case 8:
mode_str = "Page-based 39-bit Virtual Addressing Mode";
break;
case 8:
mode_str = "Page-based 39-bit Virtual Addressing Mode";
break;
case 9:
mode_str = "Page-based 48-bit Virtual Addressing Mode";
break;
case 9:
mode_str = "Page-based 48-bit Virtual Addressing Mode";
break;
}
rt_kprintf("\tMode = %s\n", mode_str);
@@ -116,31 +121,8 @@ static const char *Interrupt_Name[] =
"Reserved-11",
};
enum
{
EP_INSTRUCTION_ADDRESS_MISALIGNED = 0,
EP_INSTRUCTION_ACCESS_FAULT,
EP_ILLEGAL_INSTRUCTION,
EP_BREAKPOINT,
EP_LOAD_ADDRESS_MISALIGNED,
EP_LOAD_ACCESS_FAULT,
EP_STORE_ADDRESS_MISALIGNED,
EP_STORE_ACCESS_FAULT,
EP_ENVIRONMENT_CALL_U_MODE,
EP_ENVIRONMENT_CALL_S_MODE,
EP_RESERVED10,
EP_ENVIRONMENT_CALL_M_MODE,
EP_INSTRUCTION_PAGE_FAULT, /* page attr */
EP_LOAD_PAGE_FAULT, /* read data */
EP_RESERVED14,
EP_STORE_PAGE_FAULT, /* write data */
};
extern struct rt_irq_desc irq_desc[];
#include "rtdbg.h"
#include "encoding.h"
#ifndef RT_USING_SMP
static volatile int nested = 0;
#define ENTER_TRAP \
@@ -242,6 +224,7 @@ void handle_user(rt_size_t scause, rt_size_t stval, rt_size_t sepc, struct rt_hw
}
#endif
#ifdef ENABLE_VECTOR
static void vector_enable(struct rt_hw_stack_frame *sp)
{
sp->sstatus |= SSTATUS_VS_INITIAL;
@@ -276,6 +259,7 @@ static int illegal_inst_recoverable(rt_ubase_t stval, struct rt_hw_stack_frame *
return flag;
}
#endif
static void handle_nested_trap_panic(
rt_size_t cause,