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[components] remove vmm (#8269)

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This commit is contained in:
Meco Man
2023-11-21 00:41:54 -05:00
committed by GitHub
parent eff3560d64
commit df29a13d89
15 changed files with 2 additions and 2139 deletions
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65
libcpu/arm/realview-a8-vmm/context_gcc.S
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@@ -10,10 +10,6 @@
#include <rtconfig.h>
#ifdef RT_USING_VMM
#include <vmm.h>
#endif
.section .text, "ax"
/*
* rt_base_t rt_hw_interrupt_disable();
@@ -71,67 +67,6 @@ rt_hw_context_switch:
str sp, [r0] @ store sp in preempted tasks TCB
ldr sp, [r1] @ get new task stack pointer
#ifdef RT_USING_VMM
#ifdef RT_VMM_USING_DOMAIN
@ need to make sure we are in vmm domain as we would use rt_current_thread
ldr r2, =vmm_domain_val
ldr r7, [r2]
mcr p15, 0, r7, c3, c0
#endif
/* check whether vmm thread, otherwise, update vIRQ */
ldr r3, =rt_current_thread
ldr r4, [r3]
ldr r5, =vmm_thread
cmp r4, r5
beq switch_to_guest
@ not falling into guest. Simple task ;-)
ldmfd sp!, {r6} @ pop new task cpsr to spsr
msr spsr_cxsf, r6
ldmfd sp!, {r0-r12, lr, pc}^
switch_to_guest:
#ifdef RT_VMM_USING_DOMAIN
@ the stack is saved in the guest domain so we need to
@ come back to the guest domain to get the registers.
ldr r1, =super_domain_val
ldr r0, [r1]
mcr p15, 0, r0, c3, c0
#endif
/* The user can do nearly anything in rt_thread_idle_excute because it will
call the thread->cleanup. One common thing is sending events and wake up
threads. So the guest thread will be preempted. This is the only point that
the guest thread would call rt_hw_context_switch and "yield".
More over, rt_schedule will call this function and this function *will*
reentrant. If that happens, we need to make sure that call the
rt_thread_idle_excute and vmm_virq_update again and we are in super domain.
I use a "reference count" to achieve such behaviour. If you have better
idea, tell me. */
ldr r4, =_guest_switch_lvl
ldr r5, [r4]
add r5, r5, #1
str r5, [r4]
cmp r5, #1
bne _switch_through
bl rt_thread_idle_excute
bl vmm_virq_update
/* we need _guest_switch_lvl to protect until _switch_through, but it's OK
* to cleanup the reference count here because the code below will not be
* reentrant. */
sub r5, r5, #1
str r5, [r4]
#ifdef RT_VMM_USING_DOMAIN
ldr r1, =guest_domain_val
ldr r0, [r1]
mcr p15, 0, r0, c3, c0
#endif
_switch_through:
#endif /* RT_USING_VMM */
ldmfd sp!, {r4} @ pop new task cpsr to spsr
msr spsr_cxsf, r4
ldmfd sp!, {r0-r12, lr, pc}^ @ pop new task r0-r12, lr & pc, copy spsr to cpsr

6
libcpu/arm/realview-a8-vmm/gic.c
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@@ -217,9 +217,6 @@ int arm_gic_dist_init(rt_uint32_t index, rt_uint32_t dist_base, int irq_start)
if ((rt_cpu_get_smp_id() & 0xF) != 0)
return 0;
#endif
#ifdef RT_USING_VMM
return 0;
#endif
cpumask |= cpumask << 8;
cpumask |= cpumask << 16;
@@ -263,9 +260,6 @@ int arm_gic_cpu_init(rt_uint32_t index, rt_uint32_t cpu_base)
if ((rt_cpu_get_smp_id() & 0xF) != 0)
return 0;
#endif
#ifdef RT_USING_VMM
return 0;
#endif
GIC_CPU_PRIMASK(cpu_base) = 0xf0;
/* Enable CPU interrupt */

16
libcpu/arm/realview-a8-vmm/interrupt.c
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@@ -14,10 +14,6 @@
#include "realview.h"
#include "gic.h"
#ifdef RT_USING_VMM
#include <vmm.h>
#endif
#define MAX_HANDLERS NR_IRQS_PBA8
extern volatile rt_uint8_t rt_interrupt_nest;
@@ -36,13 +32,7 @@ extern int system_vectors;
static void rt_hw_vector_init(void)
{
#ifndef RT_USING_VMM
unsigned int *dest = (unsigned int *)VECTOR_BASE;
unsigned int *src = (unsigned int *)&system_vectors;
rt_memcpy(dest, src, 16 * 4);
rt_cpu_vector_set_base(VECTOR_BASE);
#endif
}
/**
@@ -60,13 +50,9 @@ void rt_hw_interrupt_init(void)
rt_memset(isr_table, 0x00, sizeof(isr_table));
/* initialize ARM GIC */
#ifdef RT_USING_VMM
gic_dist_base = vmm_find_iomap("GIC_DIST");
gic_cpu_base = vmm_find_iomap("GIC_CPU");
#else
gic_dist_base = REALVIEW_GIC_DIST_BASE;
gic_cpu_base = REALVIEW_GIC_CPU_BASE;
#endif
arm_gic_dist_init(0, gic_dist_base, 0);
arm_gic_cpu_init(0, gic_cpu_base);
/*arm_gic_dump_type(0);*/

116
libcpu/arm/realview-a8-vmm/start_gcc.S
View File

@@ -10,13 +10,6 @@
#include <rtconfig.h>
#ifdef RT_USING_VMM
#include <vmm.h>
.equ orig_irq_isr, LINUX_VECTOR_POS+0x18
#else
#undef RT_VMM_USING_DOMAIN
#endif
.equ Mode_USR, 0x10
.equ Mode_FIQ, 0x11
.equ Mode_IRQ, 0x12
@@ -28,7 +21,6 @@
.equ I_Bit, 0x80 @ when I bit is set, IRQ is disabled
.equ F_Bit, 0x40 @ when F bit is set, FIQ is disabled
#ifndef RT_USING_VMM
.equ UND_Stack_Size, 0x00000000
.equ SVC_Stack_Size, 0x00000100
.equ ABT_Stack_Size, 0x00000000
@@ -38,9 +30,6 @@
#define ISR_Stack_Size (UND_Stack_Size + SVC_Stack_Size + ABT_Stack_Size + \
RT_FIQ_STACK_PGSZ + RT_IRQ_STACK_PGSZ)
#else
#define ISR_Stack_Size (RT_FIQ_STACK_PGSZ + RT_IRQ_STACK_PGSZ)
#endif
.section .data.share.isr
/* stack */
@@ -58,10 +47,6 @@ stack_top:
/* reset entry */
.globl _reset
_reset:
#ifdef RT_USING_VMM
/* save all the parameter and variable registers */
stmfd sp!, {r0-r12, lr}
#endif
/* set the cpu to SVC32 mode and disable interrupt */
mrs r0, cpsr
bic r0, r0, #0x1f
@@ -81,18 +66,6 @@ bss_loop:
strlo r0,[r1],#4 /* clear 4 bytes */
blo bss_loop /* loop until done */
#ifdef RT_USING_VMM
/* clear .bss.share */
mov r0,#0 /* get a zero */
ldr r1,=__bss_share_start /* bss start */
ldr r2,=__bss_share_end /* bss end */
bss_share_loop:
cmp r1,r2 /* check if data to clear */
strlo r0,[r1],#4 /* clear 4 bytes */
blo bss_share_loop /* loop until done */
#endif
/* call C++ constructors of global objects */
ldr r0, =__ctors_start__
ldr r1, =__ctors_end__
@@ -109,31 +82,16 @@ ctor_loop:
ctor_end:
/* start RT-Thread Kernel */
#ifdef RT_USING_VMM
/* restore the parameter */
ldmfd sp!, {r0-r3}
bl vmm_entry
ldmfd sp!, {r4-r12, pc}
#else
ldr pc, _rtthread_startup
_rtthread_startup:
.word rtthread_startup
#endif
stack_setup:
ldr r0, =stack_top
#ifdef RT_USING_VMM
@ Linux use stmia to save r0, lr and spsr. To align to 8 byte boundary,
@ just allocate 16 bytes for it.
sub r0, r0, #16
#endif
#ifndef RT_USING_VMM
@ Set the startup stack for svc
mov sp, r0
#endif
#ifndef RT_USING_VMM
@ Enter Undefined Instruction Mode and set its Stack Pointer
msr cpsr_c, #Mode_UND|I_Bit|F_Bit
mov sp, r0
@@ -143,7 +101,6 @@ stack_setup:
msr cpsr_c, #Mode_ABT|I_Bit|F_Bit
mov sp, r0
sub r0, r0, #ABT_Stack_Size
#endif
@ Enter FIQ Mode and set its Stack Pointer
msr cpsr_c, #Mode_FIQ|I_Bit|F_Bit
@@ -184,26 +141,10 @@ vector_fiq:
vector_irq:
stmfd sp!, {r0-r12,lr}
#ifdef RT_VMM_USING_DOMAIN
@ save the last domain
mrc p15, 0, r5, c3, c0
@ switch to vmm domain as we are going to call vmm codes
ldr r1, =vmm_domain_val
ldr r4, [r1]
mcr p15, 0, r4, c3, c0
#endif
bl rt_interrupt_enter
bl rt_hw_trap_irq
bl rt_interrupt_leave
#ifdef RT_VMM_USING_DOMAIN
@ restore the last domain. It do some redundant work but simplify the
@ logic. It might be the guest domain so rt_thread_switch_interrupt_flag
@ should lay in .bss.share
mcr p15, 0, r5, c3, c0
#endif
@ if rt_thread_switch_interrupt_flag set, jump to
@ rt_hw_context_switch_interrupt_do and don't return
ldr r0, =rt_thread_switch_interrupt_flag
@@ -211,58 +152,8 @@ vector_irq:
cmp r1, #1
beq rt_hw_context_switch_interrupt_do
#ifndef RT_USING_VMM
ldmfd sp!, {r0-r12,lr}
subs pc, lr, #4
#else
#ifdef RT_VMM_USING_DOMAIN
@ r4 is vmm_domain_val
@ back to vmm domain as we need access rt_current_thread
mcr p15, 0, r4, c3, c0
#endif
/* check whether we need to do IRQ routing
* ensure the int is disabled. Or there will be an infinite loop. */
ldr r0, =rt_current_thread
ldr r0, [r0]
ldr r1, =vmm_thread
cmp r0, r1
beq switch_to_guest
#ifdef RT_VMM_USING_DOMAIN
@ r5 is domain of interrupted context
@ it might be super_domain_val or vmm_domain_val so we need to restore it.
mcr p15, 0, r5, c3, c0
#endif
@ switch back if the interrupted thread is not vmm
ldmfd sp!, {r0-r12,lr}
subs pc, lr, #4
switch_to_guest:
#ifdef RT_VMM_USING_DOMAIN
@ We are going to execute rt-thread code but accessing the content of the
@ guest. So switch to super domain.
ldr r1, =super_domain_val
ldr r0, [r1]
mcr p15, 0, r0, c3, c0
#endif
/* check whether there is a pending interrupt for Guest OS */
bl vmm_virq_check
#ifdef RT_VMM_USING_DOMAIN
@ All done, restore the guest domain.
mcr p15, 0, r5, c3, c0
#endif
cmp r0, #0x0
beq route_irq_to_guest
ldmfd sp!, {r0-r12,lr}
subs pc, lr, #4
route_irq_to_guest:
ldmfd sp!, {r0-r12,lr}
b orig_irq_isr
#endif /* RT_USING_VMM */
rt_hw_context_switch_interrupt_do:
mov r1, #0 @ clear flag
@@ -289,13 +180,6 @@ rt_hw_context_switch_interrupt_do:
ldr r5, [r4]
str sp, [r5] @ store sp in preempted tasks's TCB
#ifdef RT_VMM_USING_DOMAIN
@ If a thread is wake up by interrupt, it should be RTT thread.
@ Make sure the domain is correct.
ldr r1, =vmm_domain_val
ldr r2, [r1]
mcr p15, 0, r2, c3, c0
#endif
ldr r6, =rt_interrupt_to_thread
ldr r6, [r6]
ldr sp, [r6] @ get new task's stack pointer

13
libcpu/arm/realview-a8-vmm/trap.c
View File

@@ -14,10 +14,6 @@
#include "armv7.h"
#ifdef RT_USING_VMM
#include <vmm_context.h>
#endif
#include "gic.h"
extern struct rt_thread *rt_current_thread;
@@ -162,15 +158,6 @@ void rt_hw_trap_irq(void)
/* turn to interrupt service routine */
isr_func(ir, param);
}
#ifdef RT_USING_VMM
else
{
/* We have to EOI before masking the interrupts */
arm_gic_ack(0, fullir);
vmm_virq_pending(ir);
return;
}
#endif
/* end of interrupt */
arm_gic_ack(0, fullir);