[components][drivers] fix posix tty, and add more baudrate (#8683)

* serial-tty fix

* v2

libcpu/aarch64/common/SConscript

@@ -12,7 +12,7 @@ if GetDepend('RT_USING_OFW') == False:
     SrcRemove(src, ['setup.c', 'cpu_psci.c', 'psci.c'])
 
 if GetDepend('RT_USING_PIC') == True:
-    SrcRemove(src, ['gicv3.c', 'gic.c', 'gtimer.c'])
+    SrcRemove(src, ['gicv3.c', 'gic.c', 'gtimer.c', 'interrupt.c'])
 
 group = DefineGroup('libcpu', src, depend = [''], CPPPATH = CPPPATH)
 

libcpu/aarch64/common/context_gcc.S

@@ -19,6 +19,14 @@
 #include "asm-fpu.h"
 #include "armv8.h"
 
+#ifndef RT_USING_SMP
+.bss
+    .align 3
+rt_interrupt_from_thread: .comm 8, 8
+rt_interrupt_to_thread: .comm 8, 8
+rt_thread_switch_interrupt_flag: .comm 8, 8
+#endif
+
 .text
 .weak rt_hw_cpu_id_set
 .type rt_hw_cpu_id_set, @function

libcpu/aarch64/common/interrupt.c

@@ -16,15 +16,6 @@
 #include "gicv3.h"
 #include "ioremap.h"
 
-#ifndef RT_USING_SMP
-/* Those variables will be accessed in ISR, so we need to share them. */
-rt_ubase_t rt_interrupt_from_thread        = 0;
-rt_ubase_t rt_interrupt_to_thread          = 0;
-rt_ubase_t rt_thread_switch_interrupt_flag = 0;
-#endif
-
-#ifndef RT_USING_PIC
-
 /* exception and interrupt handler table */
 struct rt_irq_desc isr_table[MAX_HANDLERS];
 
@@ -87,9 +78,6 @@ void rt_hw_interrupt_init(void)
 
     /* init interrupt nest, and context in thread sp */
     rt_atomic_store(&rt_interrupt_nest, 0);
-    rt_interrupt_from_thread = 0;
-    rt_interrupt_to_thread = 0;
-    rt_thread_switch_interrupt_flag = 0;
 #else
     rt_uint64_t gic_cpu_base;
     rt_uint64_t gic_dist_base;
@@ -417,8 +405,6 @@ void rt_hw_ipi_handler_install(int ipi_vector, rt_isr_handler_t ipi_isr_handler)
 }
 #endif
 
-#endif /* RT_USING_PIC */
-
 #if defined(FINSH_USING_MSH) && defined(RT_USING_INTERRUPT_INFO)
 int list_isr()
 {