rt_hw_cpu_reset: remove all other rt_weak

libcpu/arm/AT91SAM7S/cpu.c

@@ -20,7 +20,7 @@
  * this function will reset CPU
  *
  */
-rt_weak void rt_hw_cpu_reset()
+void rt_hw_cpu_reset()
 {
 }
 

libcpu/arm/AT91SAM7X/cpu.c

@@ -20,7 +20,7 @@
  * this function will reset CPU
  *
  */
-rt_weak void rt_hw_cpu_reset()
+void rt_hw_cpu_reset()
 {
 }
 

libcpu/arm/arm926/cpuport.c

@@ -146,7 +146,7 @@ rt_base_t rt_hw_cpu_dcache_status()
  * reset cpu by dog's time-out
  *
  */
-rt_weak void rt_hw_cpu_reset()
+void rt_hw_cpu_reset()
 {
 
     rt_kprintf("Restarting system...\n");

libcpu/arm/armv6/cpuport.c

@@ -147,7 +147,7 @@ rt_base_t rt_hw_cpu_dcache_status()
  * reset cpu by dog's time-out
  *
  */
-rt_weak void rt_hw_cpu_reset()
+void rt_hw_cpu_reset()
 {
 
     rt_kprintf("Restarting system...\n");

libcpu/arm/cortex-m0/cpuport.c

@@ -131,7 +131,7 @@ void rt_hw_hard_fault_exception(struct exception_stack_frame *contex)
 /**
  * reset CPU
  */
-rt_weak void rt_hw_cpu_reset(void)
+void rt_hw_cpu_reset(void)
 {
     SCB_AIRCR  = SCB_RESET_VALUE;//((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |SCB_AIRCR_SYSRESETREQ_Msk);
 }

libcpu/arm/cortex-m23/cpuport.c

@@ -132,7 +132,7 @@ void rt_hw_hard_fault_exception(struct exception_stack_frame *contex)
 /**
  * reset CPU
  */
-rt_weak void rt_hw_cpu_reset(void)
+void rt_hw_cpu_reset(void)
 {
     SCB_AIRCR  = SCB_RESET_VALUE;//((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |SCB_AIRCR_SYSRESETREQ_Msk);
 }

libcpu/arm/cortex-m3/cpuport.c

@@ -356,7 +356,7 @@ rt_weak void rt_hw_cpu_shutdown(void)
 /**
  * reset CPU
  */
-rt_weak void rt_hw_cpu_reset(void)
+void rt_hw_cpu_reset(void)
 {
     SCB_AIRCR = SCB_RESET_VALUE;
 }

libcpu/arm/cortex-m33/cpuport.c

@@ -498,7 +498,7 @@ rt_weak void rt_hw_cpu_shutdown(void)
 /**
  * reset CPU
  */
-rt_weak void rt_hw_cpu_reset(void)
+void rt_hw_cpu_reset(void)
 {
     SCB_AIRCR = SCB_RESET_VALUE;
 }

libcpu/arm/cortex-m4/cpuport.c

@@ -441,7 +441,7 @@ rt_weak void rt_hw_cpu_shutdown(void)
 /**
  * reset CPU
  */
-rt_weak void rt_hw_cpu_reset(void)
+void rt_hw_cpu_reset(void)
 {
     SCB_AIRCR = SCB_RESET_VALUE;
 }

libcpu/arm/cortex-m7/cpuport.c

@@ -440,7 +440,7 @@ rt_weak void rt_hw_cpu_shutdown(void)
 /**
  * reset CPU
  */
-rt_weak void rt_hw_cpu_reset(void)
+void rt_hw_cpu_reset(void)
 {
     SCB_AIRCR = SCB_RESET_VALUE;
 }

libcpu/arm/cortex-r4/cpu.c

@@ -20,7 +20,7 @@
  * this function will reset CPU
  *
  */
-rt_weak void rt_hw_cpu_reset()
+void rt_hw_cpu_reset()
 {
 }
 

libcpu/arm/dm36x/cpuport.c

@@ -145,7 +145,7 @@ rt_base_t rt_hw_cpu_dcache_status()
  * reset cpu by dog's time-out
  *
  */
-rt_weak void rt_hw_cpu_reset()
+void rt_hw_cpu_reset()
 {
 
     rt_kprintf("Restarting system...\n");

libcpu/arm/lpc214x/cpuport.c

@@ -163,7 +163,7 @@ rt_isr_handler_t rt_hw_interrupt_install(int vector, rt_isr_handler_t handler,
  * this function will reset CPU
  *
  */
-rt_weak void rt_hw_cpu_reset(void)
+void rt_hw_cpu_reset(void)
 {
 }
 

libcpu/arm/lpc24xx/cpu.c

@@ -20,7 +20,7 @@
  * this function will reset CPU
  *
  */
-rt_weak void rt_hw_cpu_reset()
+void rt_hw_cpu_reset()
 {
 }
 

libcpu/arm/s3c24x0/cpu.c

@@ -148,7 +148,7 @@ rt_base_t rt_hw_cpu_dcache_status()
  * reset cpu by dog's time-out
  *
  */
-rt_weak void rt_hw_cpu_reset()
+void rt_hw_cpu_reset()
 {
     /* Disable all interrupt except the WDT */
     INTMSK = (~((rt_uint32_t)1 << INTWDT));

libcpu/arm/s3c44b0/cpu.c

@@ -100,7 +100,7 @@ rt_base_t rt_hw_cpu_dcache_status()
  * this function will reset CPU
  *
  */
-rt_weak void rt_hw_cpu_reset()
+void rt_hw_cpu_reset()
 {
 }
 

libcpu/arm/sep4020/cpu.c

@@ -152,7 +152,7 @@ rt_base_t rt_hw_cpu_dcache_status()
  * reset cpu by dog's time-out
  *
  */
-rt_weak void rt_hw_cpu_reset()
+void rt_hw_cpu_reset()
 {
 
     /* enable watchdog */