mirror of
https://github.com/RT-Thread/rt-thread.git
synced 2026-09-28 16:14:20 +08:00
add display controller driver for LS1B demo board
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1672 bbd45198-f89e-11dd-88c7-29a3b14d5316
This commit is contained in:
@@ -5,6 +5,9 @@ src_bsp = ['application.c', 'startup.c', 'board.c']
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src_drv = ['uart.c']
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if GetDepend('RT_USING_RTGUI'):
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src_drv += ['display_controller.c']
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src = File(src_bsp + src_drv)
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CPPPATH = [GetCurrentDir()]
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group = DefineGroup('Startup', src, depend = [''], CPPPATH = CPPPATH)
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@@ -21,6 +21,9 @@ Export('rtconfig')
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# prepare building environment
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objs = PrepareBuilding(env, RTT_ROOT)
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if GetDepend('RT_USING_RTGUI'):
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objs = objs + SConscript(RTT_ROOT + '/examples/gui/SConscript', variant_dir='build/examples/gui', duplicate=0)
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# build program
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env.Program(TARGET, objs)
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@@ -16,8 +16,33 @@
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#include <rtthread.h>
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#include <ls1b.h>
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#ifdef RT_USING_RTGUI
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#include <rtgui/rtgui.h>
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extern void rt_hw_dc_init(void);
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#endif
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void rt_init_thread_entry(void* parameter)
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{
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#ifdef RT_USING_RTGUI
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{
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rt_device_t dc;
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/* init Display Controller */
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rt_hw_dc_init();
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/* re-init device driver */
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rt_device_init_all();
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/* find Display Controller device */
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dc = rt_device_find("dc");
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/* set Display Controller device as rtgui graphic driver */
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rtgui_graphic_set_device(dc);
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/* startup rtgui */
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rtgui_startup();
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}
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#endif
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}
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int rt_application_init()
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File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,58 @@
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/*
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* File : display_controller.h
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* This file is part of RT-Thread RTOS
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* COPYRIGHT (C) 2006-2011, RT-Thread Develop Team
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.rt-thread.org/license/LICENSE
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*
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* Change Logs:
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* Date Author Notes
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* 2011-08-08 lgnq first version for LS1B
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*/
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#ifndef __DISPLAY_CONTROLLER_H__
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#define __DISPLAY_CONTROLLER_H__
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#include <rtthread.h>
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#include "ls1b.h"
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#define DC_BASE 0xBC301240 //Display Controller
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/* Frame Buffer registers */
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#define DC_FB_CONFIG __REG32(DC_BASE + 0x000)
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#define DC_FB_BUFFER_ADDR0 __REG32(DC_BASE + 0x020)
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#define DC_FB_BUFFER_STRIDE __REG32(DC_BASE + 0x040)
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#define DC_FB_BUFFER_ORIGIN __REG32(DC_BASE + 0x060)
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#define DC_DITHER_CONFIG __REG32(DC_BASE + 0x120)
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#define DC_DITHER_TABLE_LOW __REG32(DC_BASE + 0x140)
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#define DC_DITHER_TABLE_HIGH __REG32(DC_BASE + 0x160)
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#define DC_PANEL_CONFIG __REG32(DC_BASE + 0x180)
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#define DC_PANEL_TIMING __REG32(DC_BASE + 0x1A0)
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#define DC_HDISPLAY __REG32(DC_BASE + 0x1C0)
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#define DC_HSYNC __REG32(DC_BASE + 0x1E0)
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#define DC_VDISPLAY __REG32(DC_BASE + 0x240)
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#define DC_VSYNC __REG32(DC_BASE + 0x260)
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#define DC_FB_BUFFER_ADDR1 __REG32(DC_BASE + 0x340)
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/* Display Controller driver for 1024x768 16bit */
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#define FB_XSIZE 1024
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#define FB_YSIZE 768
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#define CONFIG_VIDEO_16BPP
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#define APB_CLK 33333333
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#define K1BASE 0xA0000000
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#define KSEG1(addr) ((void *)(K1BASE | (rt_uint32_t)(addr)))
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#define HW_FB_ADDR KSEG1(_rt_framebuffer)
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#define HW_FB_PIXEL(x, y) *(volatile rt_uint16_t*)((rt_uint8_t*)HW_FB_ADDR + (y * FB_XSIZE * 2) + x * 2)
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struct vga_struct
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{
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long pclk;
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int hr,hss,hse,hfl;
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int vr,vss,vse,vfl;
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};
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#endif
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@@ -140,7 +140,7 @@
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#define RT_LWIP_ETHTHREAD_STACKSIZE 512
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/* SECTION: RT-Thread/GUI */
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/* #define RT_USING_RTGUI */
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#define RT_USING_RTGUI
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/* name length of RTGUI object */
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#define RTGUI_NAME_MAX 12
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+1
-25
@@ -15,7 +15,7 @@
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#include <rthw.h>
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#include <rtthread.h>
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#include "ls1b.h"
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#include "uart.h"
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/**
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* @addtogroup Loongson LS1B
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@@ -24,30 +24,6 @@
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/*@{*/
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#if defined(RT_USING_UART) && defined(RT_USING_DEVICE)
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/* UART interrupt enable register value */
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#define UARTIER_IME (1 << 3)
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#define UARTIER_ILE (1 << 2)
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#define UARTIER_ITXE (1 << 1)
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#define UARTIER_IRXE (1 << 0)
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/* UART line control register value */
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#define UARTLCR_DLAB (1 << 7)
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#define UARTLCR_BCB (1 << 6)
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#define UARTLCR_SPB (1 << 5)
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#define UARTLCR_EPS (1 << 4)
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#define UARTLCR_PE (1 << 3)
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#define UARTLCR_SB (1 << 2)
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/* UART line status register value */
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#define UARTLSR_ERROR (1 << 7)
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#define UARTLSR_TE (1 << 6)
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#define UARTLSR_TFE (1 << 5)
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#define UARTLSR_BI (1 << 4)
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#define UARTLSR_FE (1 << 3)
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#define UARTLSR_PE (1 << 2)
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#define UARTLSR_OE (1 << 1)
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#define UARTLSR_DR (1 << 0)
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struct rt_uart_ls1b
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{
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struct rt_device parent;
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+80
-3
@@ -1,5 +1,5 @@
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/*
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* File : board.c
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* File : uart.h
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* This file is part of RT-Thread RTOS
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* COPYRIGHT (C) 2006-2011, RT-Thread Develop Team
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*
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@@ -9,12 +9,89 @@
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*
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* Change Logs:
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* Date Author Notes
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* 2011-08-08 lgnq first version
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* 2011-08-08 lgnq first version for LS1B
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*/
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#ifndef __UART_H__
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#define __UART_H__
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#include "ls1b.h"
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#define UART0_BASE 0xBFE40000
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#define UART0_1_BASE 0xBFE41000
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#define UART0_2_BASE 0xBFE42000
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#define UART0_3_BASE 0xBFE43000
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#define UART1_BASE 0xBFE44000
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#define UART1_1_BASE 0xBFE45000
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#define UART1_2_BASE 0xBFE46000
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#define UART1_3_BASE 0xBFE47000
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#define UART2_BASE 0xBFE48000
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#define UART3_BASE 0xBFE4C000
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#define UART4_BASE 0xBFE6C000
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#define UART5_BASE 0xBFE7C000
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/* UART registers */
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#define UART_DAT(base) __REG8(base + 0x00)
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#define UART_IER(base) __REG8(base + 0x01)
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#define UART_IIR(base) __REG8(base + 0x02)
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#define UART_FCR(base) __REG8(base + 0x02)
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#define UART_LCR(base) __REG8(base + 0x03)
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#define UART_MCR(base) __REG8(base + 0x04)
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#define UART_LSR(base) __REG8(base + 0x05)
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#define UART_MSR(base) __REG8(base + 0x06)
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#define UART_LSB(base) __REG8(base + 0x00)
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#define UART_MSB(base) __REG8(base + 0x01)
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/* UART0 registers */
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#define UART0_DAT __REG8(UART0_BASE + 0x00)
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#define UART0_IER __REG8(UART0_BASE + 0x01)
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#define UART0_IIR __REG8(UART0_BASE + 0x02)
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#define UART0_FCR __REG8(UART0_BASE + 0x02)
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#define UART0_LCR __REG8(UART0_BASE + 0x03)
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#define UART0_MCR __REG8(UART0_BASE + 0x04)
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#define UART0_LSR __REG8(UART0_BASE + 0x05)
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#define UART0_MSR __REG8(UART0_BASE + 0x06)
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#define UART0_LSB __REG8(UART0_BASE + 0x00)
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#define UART0_MSB __REG8(UART0_BASE + 0x01)
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/* UART1 registers */
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#define UART1_DAT __REG8(UART1_BASE + 0x00)
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#define UART1_IER __REG8(UART1_BASE + 0x01)
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#define UART1_IIR __REG8(UART1_BASE + 0x02)
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#define UART1_FCR __REG8(UART1_BASE + 0x02)
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#define UART1_LCR __REG8(UART1_BASE + 0x03)
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#define UART1_MCR __REG8(UART1_BASE + 0x04)
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#define UART1_LSR __REG8(UART1_BASE + 0x05)
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#define UART1_MSR __REG8(UART1_BASE + 0x06)
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#define UART1_LSB __REG8(UART1_BASE + 0x00)
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#define UART1_MSB __REG8(UART1_BASE + 0x01)
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/* UART interrupt enable register value */
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#define UARTIER_IME (1 << 3)
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#define UARTIER_ILE (1 << 2)
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#define UARTIER_ITXE (1 << 1)
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#define UARTIER_IRXE (1 << 0)
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/* UART line control register value */
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#define UARTLCR_DLAB (1 << 7)
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#define UARTLCR_BCB (1 << 6)
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#define UARTLCR_SPB (1 << 5)
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#define UARTLCR_EPS (1 << 4)
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#define UARTLCR_PE (1 << 3)
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#define UARTLCR_SB (1 << 2)
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/* UART line status register value */
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#define UARTLSR_ERROR (1 << 7)
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#define UARTLSR_TE (1 << 6)
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#define UARTLSR_TFE (1 << 5)
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#define UARTLSR_BI (1 << 4)
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#define UARTLSR_FE (1 << 3)
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#define UARTLSR_PE (1 << 2)
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#define UARTLSR_OE (1 << 1)
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#define UARTLSR_DR (1 << 0)
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void rt_hw_uart_init(void);
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#endif
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