[ci] open ci check with function declaration warning (#8546)

libcpu/aarch64/common/mmu.c

@@ -602,6 +602,13 @@ static int _map_single_page_2M(unsigned long *lv0_tbl, unsigned long va,
     return 0;
 }
 
+void *rt_hw_mmu_tbl_get()
+{
+    uintptr_t tbl;
+    __asm__ volatile("MRS %0, TTBR0_EL1" : "=r"(tbl));
+    return rt_kmem_p2v((void *)(tbl & ((1ul << 48) - 2)));
+}
+
 void *rt_ioremap_early(void *paddr, size_t size)
 {
     volatile size_t count;

libcpu/aarch64/common/mmu.h

@@ -109,13 +109,7 @@ void rt_hw_mmu_kernel_map_init(struct rt_aspace *aspace, rt_size_t vaddr_start,
                                rt_size_t size);
 void *rt_hw_mmu_pgtbl_create(void);
 void rt_hw_mmu_pgtbl_delete(void *pgtbl);
-
-rt_inline void *rt_hw_mmu_tbl_get()
-{
-    uintptr_t tbl;
-    __asm__ volatile("MRS %0, TTBR0_EL1" : "=r"(tbl));
-    return rt_kmem_p2v((void *)(tbl & ((1ul << 48) - 2)));
-}
+void *rt_hw_mmu_tbl_get(void);
 
 static inline void *rt_hw_mmu_kernel_v2p(void *v_addr)
 {

libcpu/arm/cortex-a/mmu.h

@@ -122,7 +122,7 @@ void rt_hw_mmu_switch(void *tbl);
 
 void *rt_hw_mmu_v2p(struct rt_aspace *aspace, void *vaddr);
 void rt_hw_mmu_kernel_map_init(struct rt_aspace *aspace, size_t vaddr_start, size_t size);
-void *rt_hw_mmu_tbl_get();
+void *rt_hw_mmu_tbl_get(void);
 
 int rt_hw_mmu_control(struct rt_aspace *aspace, void *vaddr, size_t size, enum rt_mmu_cntl cmd);
 

libcpu/risc-v/t-head/c906/cpuport.h

@@ -39,17 +39,17 @@
 #ifndef __ASSEMBLY__
 #include <rtdef.h>
 
-rt_inline void rt_hw_dsb()
+rt_inline void rt_hw_dsb(void)
 {
     __asm__ volatile("fence":::"memory");
 }
 
-rt_inline void rt_hw_dmb()
+rt_inline void rt_hw_dmb(void)
 {
     __asm__ volatile("fence":::"memory");
 }
 
-rt_inline void rt_hw_isb()
+rt_inline void rt_hw_isb(void)
 {
     __asm__ volatile(OPC_FENCE_I:::"memory");
 }

libcpu/risc-v/t-head/c906/mmu.h

@@ -56,7 +56,7 @@ struct mem_desc
 #define MMU_MAP_ERROR_NOPAGE     -3
 #define MMU_MAP_ERROR_CONFLICT   -4
 
-void *rt_hw_mmu_tbl_get();
+void *rt_hw_mmu_tbl_get(void);
 int rt_hw_mmu_map_init(rt_aspace_t aspace, void *v_address, rt_size_t size,
                        rt_size_t *vtable, rt_size_t pv_off);
 void rt_hw_mmu_setup(rt_aspace_t aspace, struct mem_desc *mdesc, int desc_nr);

libcpu/risc-v/t-head/c906/riscv_mmu.c

@@ -18,12 +18,12 @@
 
 #include "riscv_mmu.h"
 
-void mmu_enable_user_page_access()
+void mmu_enable_user_page_access(void)
 {
     set_csr(sstatus,SSTATUS_SUM);
 }
 
-void mmu_disable_user_page_access()
+void mmu_disable_user_page_access(void)
 {
     clear_csr(sstatus,SSTATUS_SUM);
 }

libcpu/risc-v/t-head/c906/riscv_mmu.h

@@ -108,8 +108,8 @@
 #define ARCH_MAP_FAILED         ((void *)0x8000000000000000)
 
 void mmu_set_pagetable(rt_ubase_t addr);
-void mmu_enable_user_page_access();
-void mmu_disable_user_page_access();
+void mmu_enable_user_page_access(void);
+void mmu_disable_user_page_access(void);
 
 #define RT_HW_MMU_PROT_READ 1
 #define RT_HW_MMU_PROT_WRITE 2

libcpu/risc-v/virt64/cpuport.h

@@ -61,17 +61,17 @@ typedef union {
 
 #ifndef __ASSEMBLY__
 #include <rtdef.h>
-rt_inline void rt_hw_dsb()
+rt_inline void rt_hw_dsb(void)
 {
     asm volatile("fence":::"memory");
 }
 
-rt_inline void rt_hw_dmb()
+rt_inline void rt_hw_dmb(void)
 {
     asm volatile("fence":::"memory");
 }
 
-rt_inline void rt_hw_isb()
+rt_inline void rt_hw_isb(void)
 {
     asm volatile(".long 0x0000100F":::"memory");
 }

libcpu/risc-v/virt64/mmu.h

@@ -56,7 +56,7 @@ struct mem_desc
 #define MMU_MAP_ERROR_NOPAGE     -3
 #define MMU_MAP_ERROR_CONFLICT   -4
 
-void *rt_hw_mmu_tbl_get();
+void *rt_hw_mmu_tbl_get(void);
 int rt_hw_mmu_map_init(rt_aspace_t aspace, void *v_address, rt_size_t size,
                        rt_size_t *vtable, rt_size_t pv_off);
 void rt_hw_mmu_setup(rt_aspace_t aspace, struct mem_desc *mdesc, int desc_nr);

libcpu/risc-v/virt64/riscv_mmu.c

@@ -18,12 +18,12 @@
 
 #include "riscv_mmu.h"
 
-void mmu_enable_user_page_access()
+void mmu_enable_user_page_access(void)
 {
     set_csr(sstatus, SSTATUS_SUM);
 }
 
-void mmu_disable_user_page_access()
+void mmu_disable_user_page_access(void)
 {
     clear_csr(sstatus, SSTATUS_SUM);
 }

libcpu/risc-v/virt64/riscv_mmu.h

@@ -91,8 +91,8 @@
 #define ARCH_MAP_FAILED         ((void *)0x8000000000000000)
 
 void mmu_set_pagetable(rt_ubase_t addr);
-void mmu_enable_user_page_access();
-void mmu_disable_user_page_access();
+void mmu_enable_user_page_access(void);
+void mmu_disable_user_page_access(void);
 
 #define RT_HW_MMU_PROT_READ 1
 #define RT_HW_MMU_PROT_WRITE 2