code cleanup for interrupt description

bsp/at91sam9260/rtconfig.h

@@ -22,6 +22,8 @@
 
 #define RT_USING_OVERFLOW_CHECK
 
+#define RT_USING_INTERRUPT_INFO
+
 /* Using Hook */
 #define RT_USING_HOOK
 

include/rthw.h

@@ -24,6 +24,9 @@
 extern "C" {
 #endif
 
+/*
+ * CPU interfaces
+ */
 void rt_hw_cpu_icache_enable(void);
 void rt_hw_cpu_icache_disable(void);
 rt_base_t rt_hw_cpu_icache_status(void);
@@ -38,6 +41,24 @@ rt_uint8_t *rt_hw_stack_init(void       *entry,
                              rt_uint8_t *stack_addr,
                              void       *exit);
 
+/*
+ * Interrupt handler definition
+ */
+typedef void (*rt_isr_handler_t)(int vector, void *param);
+
+struct rt_irq_desc {
+	rt_isr_handler_t handler;
+	void *param;
+
+#ifdef RT_USING_INTERRUPT_INFO
+    char name[RT_NAME_MAX];
+    rt_uint32_t counter;
+#endif
+};
+
+/*
+ * Interrupt interfaces
+ */
 void rt_hw_interrupt_init(void);
 void rt_hw_interrupt_mask(int vector);
 void rt_hw_interrupt_umask(int vector);
@@ -45,10 +66,13 @@ rt_isr_handler_t rt_hw_interrupt_install(int vector,
                              rt_isr_handler_t  handler,
                              void *param,
                              char *name);
-void rt_hw_interrupt_handle(int vector);
 
 rt_base_t rt_hw_interrupt_disable(void);
 void rt_hw_interrupt_enable(rt_base_t level);
+
+/*
+ * Context interfaces
+ */
 void rt_hw_context_switch(rt_uint32_t from, rt_uint32_t to);
 void rt_hw_context_switch_to(rt_uint32_t to);
 void rt_hw_context_switch_interrupt(rt_uint32_t from, rt_uint32_t to);
@@ -59,7 +83,7 @@ void rt_hw_backtrace(rt_uint32_t *fp, rt_uint32_t thread_entry);
 void rt_hw_show_memory(rt_uint32_t addr, rt_uint32_t size);
 
 /*
- * exception interfaces
+ * Exception interfaces
  */
 void rt_hw_exception_install(rt_err_t (*exception_handle)(void* context));
 

include/rtthread.h

@@ -425,15 +425,6 @@ void rt_module_unload_sethook(void (*hook)(rt_module_t module));
 /*
  * interrupt service
  */
-typedef void (*rt_isr_handler_t)(int vector, void *param);
-
-struct rt_irq_desc {
-	char irq_name[RT_NAME_MAX];
-	rt_isr_handler_t isr_handle;
-	void *param;
-	rt_uint32_t interrupt_cnt;
-};
-
 
 /*
  * rt_interrupt_enter and rt_interrupt_leave only can be called by BSP

libcpu/arm/at91sam926x/trap.c

@@ -159,13 +159,13 @@ void rt_hw_trap_irq()
 	//at91_sys_write(AT91_AIC_EOICR, 0x55555555);
 	
 	/* get interrupt service routine */
-	isr_func = irq_desc[irq].isr_handle;
+	isr_func = irq_desc[irq].handler;
 	param = irq_desc[irq].param;
 
 	/* turn to interrupt service routine */
 	isr_func(irq, param);
 	at91_sys_write(AT91_AIC_EOICR, 0x55555555); //EIOCR must be write any value after interrupt, or else can't response next interrupt
-	irq_desc[irq].interrupt_cnt++;
+    irq_desc[irq].counter ++;
 }
 
 void rt_hw_trap_fiq()

libcpu/arm/cortex-m3/cpuport.c

@@ -162,28 +162,28 @@ void rt_hw_cpu_shutdown(void)
 #if defined(__CC_ARM)
 __asm int __rt_ffs(int value)
 {
-		CMP     r0, #0x00
+    CMP     r0, #0x00
-		BEQ     exit
+    BEQ     exit
-		RBIT    r0, r0
+    RBIT    r0, r0
-		CLZ     r0, r0
+    CLZ     r0, r0
-		ADDS    r0, r0, #0x01
+    ADDS    r0, r0, #0x01
 
 exit
-		BX		lr
+    BX		lr
 }
 #elif defined(__IAR_SYSTEMS_ICC__)
 int __rt_ffs(int value)
 {
-		if (value == 0) return value;
+    if (value == 0) return value;
 
-		__ASM("RBIT r0, r0");
+    __ASM("RBIT r0, r0");
-		__ASM("CLZ	r0, r0");
+    __ASM("CLZ	r0, r0");
-		__ASM("ADDS	r0, r0, #0x01");
+    __ASM("ADDS	r0, r0, #0x01");
 }
 #elif defined(__GNUC__)
 int __rt_ffs(int value)
 {
-		return __builtin_ffs(value);
+    return __builtin_ffs(value);
 }
 #endif