mirror of
https://github.com/RT-Thread/rt-thread.git
synced 2026-09-27 23:27:46 +08:00
Re-normalizing the repo
This commit is contained in:
+37
-37
@@ -1,37 +1,37 @@
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import rtconfig
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Import('RTT_ROOT')
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from building import *
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src_bsp = ['application.c', 'startup.c', 'board.c']
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src_drv = ['console.c', 'led.c']
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if GetDepend('RT_USING_DFS'):
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src_drv += ['sdcard.c']
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if GetDepend('RT_USING_LWIP'):
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src_drv += ['dm9000.c']
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if GetDepend('RT_USING_RTGUI'):
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src_drv += ['touch.c', 'key.c', 'calibration.c']
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if GetDepend('RT_USING_FTK'):
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src_drv += ['touch.c', 'key.c']
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if GetDepend('RT_USING_RTI'):
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src_drv += ['rti_stub.c']
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if GetDepend('RT_USING_RTGUI') or GetDepend('RT_USING_FTK'):
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if rtconfig.RT_USING_LCD_TYPE == 'PNL_A70':
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src_drv += ['lcd_a70.c']
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elif rtconfig.RT_USING_LCD_TYPE == 'PNL_N35':
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src_drv += ['lcd_n35.c']
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elif rtconfig.RT_USING_LCD_TYPE == 'PNL_T35':
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src_drv += ['lcd_t35.c']
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elif rtconfig.RT_USING_LCD_TYPE == 'PNL_X35':
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src_drv += ['lcd_x35.c']
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src = File(src_bsp + src_drv)
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CPPPATH = [GetCurrentDir()]
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group = DefineGroup('Startup', src, depend = [''], CPPPATH = CPPPATH)
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Return('group')
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import rtconfig
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Import('RTT_ROOT')
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from building import *
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src_bsp = ['application.c', 'startup.c', 'board.c']
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src_drv = ['console.c', 'led.c']
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if GetDepend('RT_USING_DFS'):
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src_drv += ['sdcard.c']
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if GetDepend('RT_USING_LWIP'):
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src_drv += ['dm9000.c']
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if GetDepend('RT_USING_RTGUI'):
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src_drv += ['touch.c', 'key.c', 'calibration.c']
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if GetDepend('RT_USING_FTK'):
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src_drv += ['touch.c', 'key.c']
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if GetDepend('RT_USING_RTI'):
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src_drv += ['rti_stub.c']
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if GetDepend('RT_USING_RTGUI') or GetDepend('RT_USING_FTK'):
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if rtconfig.RT_USING_LCD_TYPE == 'PNL_A70':
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src_drv += ['lcd_a70.c']
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elif rtconfig.RT_USING_LCD_TYPE == 'PNL_N35':
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src_drv += ['lcd_n35.c']
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elif rtconfig.RT_USING_LCD_TYPE == 'PNL_T35':
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src_drv += ['lcd_t35.c']
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elif rtconfig.RT_USING_LCD_TYPE == 'PNL_X35':
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src_drv += ['lcd_x35.c']
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src = File(src_bsp + src_drv)
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CPPPATH = [GetCurrentDir()]
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group = DefineGroup('Startup', src, depend = [''], CPPPATH = CPPPATH)
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Return('group')
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+39
-39
@@ -1,39 +1,39 @@
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import os
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import sys
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import rtconfig
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if os.getenv('RTT_ROOT'):
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RTT_ROOT = os.getenv('RTT_ROOT')
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else:
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RTT_ROOT = os.path.normpath(os.getcwd() + '/../..')
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sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
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from building import *
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TARGET = 'rtthread-mini2440.' + rtconfig.TARGET_EXT
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env = Environment(tools = ['mingw'],
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AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
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CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS,
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CXX = rtconfig.CXX,
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AR = rtconfig.AR, ARFLAGS = '-rc',
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LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
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env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
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Export('RTT_ROOT')
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Export('rtconfig')
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# prepare building environment
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objs = PrepareBuilding(env, RTT_ROOT)
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if GetDepend('RT_USING_RTGUI'):
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objs = objs + SConscript(RTT_ROOT + '/examples/gui/SConscript', variant_dir='build/examples/gui', duplicate=0)
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# libc testsuite
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# objs = objs + SConscript(RTT_ROOT + '/examples/libc/SConscript', variant_dir='build/examples/libc', duplicate=0)
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# build program
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env.Program(TARGET, objs)
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# end building
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EndBuilding(TARGET)
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import os
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import sys
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import rtconfig
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if os.getenv('RTT_ROOT'):
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RTT_ROOT = os.getenv('RTT_ROOT')
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else:
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RTT_ROOT = os.path.normpath(os.getcwd() + '/../..')
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sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
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from building import *
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TARGET = 'rtthread-mini2440.' + rtconfig.TARGET_EXT
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env = Environment(tools = ['mingw'],
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AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
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CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS,
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CXX = rtconfig.CXX,
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AR = rtconfig.AR, ARFLAGS = '-rc',
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LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
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env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
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Export('RTT_ROOT')
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Export('rtconfig')
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# prepare building environment
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objs = PrepareBuilding(env, RTT_ROOT)
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if GetDepend('RT_USING_RTGUI'):
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objs = objs + SConscript(RTT_ROOT + '/examples/gui/SConscript', variant_dir='build/examples/gui', duplicate=0)
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# libc testsuite
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# objs = objs + SConscript(RTT_ROOT + '/examples/libc/SConscript', variant_dir='build/examples/libc', duplicate=0)
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# build program
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env.Program(TARGET, objs)
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# end building
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EndBuilding(TARGET)
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+263
-263
File diff suppressed because it is too large
Load Diff
+24
-24
@@ -1,24 +1,24 @@
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/*
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* File : board.h
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* This file is part of RT-Thread RTOS
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* COPYRIGHT (C) 2006, RT-Thread Develop Team
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.rt-thread.org/license/LICENSE
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*
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* Change Logs:
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||||
* Date Author Notes
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* 2006-10-08 Bernard add board.h to this bsp
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*/
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#ifndef __BOARD_H__
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#define __BOARD_H__
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#include <s3c24x0.h>
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#include <serial.h>
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void rt_hw_board_init(void);
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void rt_hw_sdcard_init(void);
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#endif
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/*
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* File : board.h
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* This file is part of RT-Thread RTOS
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* COPYRIGHT (C) 2006, RT-Thread Develop Team
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.rt-thread.org/license/LICENSE
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*
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* Change Logs:
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* Date Author Notes
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* 2006-10-08 Bernard add board.h to this bsp
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*/
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#ifndef __BOARD_H__
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#define __BOARD_H__
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#include <s3c24x0.h>
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#include <serial.h>
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void rt_hw_board_init(void);
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void rt_hw_sdcard_init(void);
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#endif
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+298
-298
File diff suppressed because it is too large
Load Diff
+666
-666
File diff suppressed because it is too large
Load Diff
+148
-148
@@ -1,148 +1,148 @@
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#ifndef __DM9000_H__
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#define __DM9000_H__
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#define DM9000_IO_BASE 0x20000300
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#define DM9000_DATA_BASE 0x20000304
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#define DM9000_IO (*((volatile rt_uint16_t *) DM9000_IO_BASE)) // CMD = 0
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#define DM9000_DATA (*((volatile rt_uint16_t *) DM9000_DATA_BASE)) // CMD = 1
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#define DM9000_inb(r) (*(volatile rt_uint8_t *)r)
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#define DM9000_outb(r, d) (*(volatile rt_uint8_t *)r = d)
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#define DM9000_inw(r) (*(volatile rt_uint16_t *)r)
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#define DM9000_outw(r, d) (*(volatile rt_uint16_t *)r = d)
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#define DM9000_ID 0x90000A46 /* DM9000 ID */
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#define DM9000_PKT_MAX 1536 /* Received packet max size */
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#define DM9000_PKT_RDY 0x01 /* Packet ready to receive */
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#define DM9000_NCR 0x00
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#define DM9000_NSR 0x01
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#define DM9000_TCR 0x02
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#define DM9000_TSR1 0x03
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#define DM9000_TSR2 0x04
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#define DM9000_RCR 0x05
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#define DM9000_RSR 0x06
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#define DM9000_ROCR 0x07
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#define DM9000_BPTR 0x08
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#define DM9000_FCTR 0x09
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#define DM9000_FCR 0x0A
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#define DM9000_EPCR 0x0B
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#define DM9000_EPAR 0x0C
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#define DM9000_EPDRL 0x0D
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#define DM9000_EPDRH 0x0E
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#define DM9000_WCR 0x0F
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#define DM9000_PAR 0x10
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#define DM9000_MAR 0x16
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#define DM9000_GPCR 0x1e
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#define DM9000_GPR 0x1f
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#define DM9000_TRPAL 0x22
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#define DM9000_TRPAH 0x23
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#define DM9000_RWPAL 0x24
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#define DM9000_RWPAH 0x25
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#define DM9000_VIDL 0x28
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#define DM9000_VIDH 0x29
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#define DM9000_PIDL 0x2A
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#define DM9000_PIDH 0x2B
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#define DM9000_CHIPR 0x2C
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#define DM9000_TCR2 0x2D
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#define DM9000_OTCR 0x2E
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#define DM9000_SMCR 0x2F
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#define DM9000_ETCR 0x30 /* early transmit control/status register */
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#define DM9000_CSCR 0x31 /* check sum control register */
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#define DM9000_RCSSR 0x32 /* receive check sum status register */
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#define DM9000_MRCMDX 0xF0
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#define DM9000_MRCMD 0xF2
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#define DM9000_MRRL 0xF4
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#define DM9000_MRRH 0xF5
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#define DM9000_MWCMDX 0xF6
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#define DM9000_MWCMD 0xF8
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#define DM9000_MWRL 0xFA
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#define DM9000_MWRH 0xFB
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#define DM9000_TXPLL 0xFC
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#define DM9000_TXPLH 0xFD
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#define DM9000_ISR 0xFE
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#define DM9000_IMR 0xFF
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#define CHIPR_DM9000A 0x19
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#define CHIPR_DM9000B 0x1B
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#define NCR_EXT_PHY (1<<7)
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#define NCR_WAKEEN (1<<6)
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#define NCR_FCOL (1<<4)
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#define NCR_FDX (1<<3)
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#define NCR_LBK (3<<1)
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#define NCR_RST (1<<0)
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#define NSR_SPEED (1<<7)
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#define NSR_LINKST (1<<6)
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#define NSR_WAKEST (1<<5)
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#define NSR_TX2END (1<<3)
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#define NSR_TX1END (1<<2)
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#define NSR_RXOV (1<<1)
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||||
|
||||
#define TCR_TJDIS (1<<6)
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||||
#define TCR_EXCECM (1<<5)
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#define TCR_PAD_DIS2 (1<<4)
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||||
#define TCR_CRC_DIS2 (1<<3)
|
||||
#define TCR_PAD_DIS1 (1<<2)
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||||
#define TCR_CRC_DIS1 (1<<1)
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#define TCR_TXREQ (1<<0)
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|
||||
#define TSR_TJTO (1<<7)
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||||
#define TSR_LC (1<<6)
|
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#define TSR_NC (1<<5)
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||||
#define TSR_LCOL (1<<4)
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||||
#define TSR_COL (1<<3)
|
||||
#define TSR_EC (1<<2)
|
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||||
#define RCR_WTDIS (1<<6)
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||||
#define RCR_DIS_LONG (1<<5)
|
||||
#define RCR_DIS_CRC (1<<4)
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||||
#define RCR_ALL (1<<3)
|
||||
#define RCR_RUNT (1<<2)
|
||||
#define RCR_PRMSC (1<<1)
|
||||
#define RCR_RXEN (1<<0)
|
||||
|
||||
#define RSR_RF (1<<7)
|
||||
#define RSR_MF (1<<6)
|
||||
#define RSR_LCS (1<<5)
|
||||
#define RSR_RWTO (1<<4)
|
||||
#define RSR_PLE (1<<3)
|
||||
#define RSR_AE (1<<2)
|
||||
#define RSR_CE (1<<1)
|
||||
#define RSR_FOE (1<<0)
|
||||
|
||||
#define FCTR_HWOT(ot) (( ot & 0xf ) << 4 )
|
||||
#define FCTR_LWOT(ot) ( ot & 0xf )
|
||||
|
||||
#define IMR_PAR (1<<7)
|
||||
#define IMR_ROOM (1<<3)
|
||||
#define IMR_ROM (1<<2)
|
||||
#define IMR_PTM (1<<1)
|
||||
#define IMR_PRM (1<<0)
|
||||
|
||||
#define ISR_ROOS (1<<3)
|
||||
#define ISR_ROS (1<<2)
|
||||
#define ISR_PTS (1<<1)
|
||||
#define ISR_PRS (1<<0)
|
||||
#define ISR_CLR_STATUS (ISR_ROOS | ISR_ROS | ISR_PTS | ISR_PRS)
|
||||
|
||||
#define EPCR_REEP (1<<5)
|
||||
#define EPCR_WEP (1<<4)
|
||||
#define EPCR_EPOS (1<<3)
|
||||
#define EPCR_ERPRR (1<<2)
|
||||
#define EPCR_ERPRW (1<<1)
|
||||
#define EPCR_ERRE (1<<0)
|
||||
|
||||
#define GPCR_GEP_CNTL (1<<0)
|
||||
|
||||
void rt_hw_dm9000_init(void);
|
||||
|
||||
#endif
|
||||
#ifndef __DM9000_H__
|
||||
#define __DM9000_H__
|
||||
|
||||
#define DM9000_IO_BASE 0x20000300
|
||||
#define DM9000_DATA_BASE 0x20000304
|
||||
|
||||
#define DM9000_IO (*((volatile rt_uint16_t *) DM9000_IO_BASE)) // CMD = 0
|
||||
#define DM9000_DATA (*((volatile rt_uint16_t *) DM9000_DATA_BASE)) // CMD = 1
|
||||
|
||||
#define DM9000_inb(r) (*(volatile rt_uint8_t *)r)
|
||||
#define DM9000_outb(r, d) (*(volatile rt_uint8_t *)r = d)
|
||||
#define DM9000_inw(r) (*(volatile rt_uint16_t *)r)
|
||||
#define DM9000_outw(r, d) (*(volatile rt_uint16_t *)r = d)
|
||||
|
||||
#define DM9000_ID 0x90000A46 /* DM9000 ID */
|
||||
#define DM9000_PKT_MAX 1536 /* Received packet max size */
|
||||
#define DM9000_PKT_RDY 0x01 /* Packet ready to receive */
|
||||
|
||||
#define DM9000_NCR 0x00
|
||||
#define DM9000_NSR 0x01
|
||||
#define DM9000_TCR 0x02
|
||||
#define DM9000_TSR1 0x03
|
||||
#define DM9000_TSR2 0x04
|
||||
#define DM9000_RCR 0x05
|
||||
#define DM9000_RSR 0x06
|
||||
#define DM9000_ROCR 0x07
|
||||
#define DM9000_BPTR 0x08
|
||||
#define DM9000_FCTR 0x09
|
||||
#define DM9000_FCR 0x0A
|
||||
#define DM9000_EPCR 0x0B
|
||||
#define DM9000_EPAR 0x0C
|
||||
#define DM9000_EPDRL 0x0D
|
||||
#define DM9000_EPDRH 0x0E
|
||||
#define DM9000_WCR 0x0F
|
||||
|
||||
#define DM9000_PAR 0x10
|
||||
#define DM9000_MAR 0x16
|
||||
|
||||
#define DM9000_GPCR 0x1e
|
||||
#define DM9000_GPR 0x1f
|
||||
#define DM9000_TRPAL 0x22
|
||||
#define DM9000_TRPAH 0x23
|
||||
#define DM9000_RWPAL 0x24
|
||||
#define DM9000_RWPAH 0x25
|
||||
|
||||
#define DM9000_VIDL 0x28
|
||||
#define DM9000_VIDH 0x29
|
||||
#define DM9000_PIDL 0x2A
|
||||
#define DM9000_PIDH 0x2B
|
||||
|
||||
#define DM9000_CHIPR 0x2C
|
||||
#define DM9000_TCR2 0x2D
|
||||
#define DM9000_OTCR 0x2E
|
||||
#define DM9000_SMCR 0x2F
|
||||
|
||||
#define DM9000_ETCR 0x30 /* early transmit control/status register */
|
||||
#define DM9000_CSCR 0x31 /* check sum control register */
|
||||
#define DM9000_RCSSR 0x32 /* receive check sum status register */
|
||||
|
||||
#define DM9000_MRCMDX 0xF0
|
||||
#define DM9000_MRCMD 0xF2
|
||||
#define DM9000_MRRL 0xF4
|
||||
#define DM9000_MRRH 0xF5
|
||||
#define DM9000_MWCMDX 0xF6
|
||||
#define DM9000_MWCMD 0xF8
|
||||
#define DM9000_MWRL 0xFA
|
||||
#define DM9000_MWRH 0xFB
|
||||
#define DM9000_TXPLL 0xFC
|
||||
#define DM9000_TXPLH 0xFD
|
||||
#define DM9000_ISR 0xFE
|
||||
#define DM9000_IMR 0xFF
|
||||
|
||||
#define CHIPR_DM9000A 0x19
|
||||
#define CHIPR_DM9000B 0x1B
|
||||
|
||||
#define NCR_EXT_PHY (1<<7)
|
||||
#define NCR_WAKEEN (1<<6)
|
||||
#define NCR_FCOL (1<<4)
|
||||
#define NCR_FDX (1<<3)
|
||||
#define NCR_LBK (3<<1)
|
||||
#define NCR_RST (1<<0)
|
||||
|
||||
#define NSR_SPEED (1<<7)
|
||||
#define NSR_LINKST (1<<6)
|
||||
#define NSR_WAKEST (1<<5)
|
||||
#define NSR_TX2END (1<<3)
|
||||
#define NSR_TX1END (1<<2)
|
||||
#define NSR_RXOV (1<<1)
|
||||
|
||||
#define TCR_TJDIS (1<<6)
|
||||
#define TCR_EXCECM (1<<5)
|
||||
#define TCR_PAD_DIS2 (1<<4)
|
||||
#define TCR_CRC_DIS2 (1<<3)
|
||||
#define TCR_PAD_DIS1 (1<<2)
|
||||
#define TCR_CRC_DIS1 (1<<1)
|
||||
#define TCR_TXREQ (1<<0)
|
||||
|
||||
#define TSR_TJTO (1<<7)
|
||||
#define TSR_LC (1<<6)
|
||||
#define TSR_NC (1<<5)
|
||||
#define TSR_LCOL (1<<4)
|
||||
#define TSR_COL (1<<3)
|
||||
#define TSR_EC (1<<2)
|
||||
|
||||
#define RCR_WTDIS (1<<6)
|
||||
#define RCR_DIS_LONG (1<<5)
|
||||
#define RCR_DIS_CRC (1<<4)
|
||||
#define RCR_ALL (1<<3)
|
||||
#define RCR_RUNT (1<<2)
|
||||
#define RCR_PRMSC (1<<1)
|
||||
#define RCR_RXEN (1<<0)
|
||||
|
||||
#define RSR_RF (1<<7)
|
||||
#define RSR_MF (1<<6)
|
||||
#define RSR_LCS (1<<5)
|
||||
#define RSR_RWTO (1<<4)
|
||||
#define RSR_PLE (1<<3)
|
||||
#define RSR_AE (1<<2)
|
||||
#define RSR_CE (1<<1)
|
||||
#define RSR_FOE (1<<0)
|
||||
|
||||
#define FCTR_HWOT(ot) (( ot & 0xf ) << 4 )
|
||||
#define FCTR_LWOT(ot) ( ot & 0xf )
|
||||
|
||||
#define IMR_PAR (1<<7)
|
||||
#define IMR_ROOM (1<<3)
|
||||
#define IMR_ROM (1<<2)
|
||||
#define IMR_PTM (1<<1)
|
||||
#define IMR_PRM (1<<0)
|
||||
|
||||
#define ISR_ROOS (1<<3)
|
||||
#define ISR_ROS (1<<2)
|
||||
#define ISR_PTS (1<<1)
|
||||
#define ISR_PRS (1<<0)
|
||||
#define ISR_CLR_STATUS (ISR_ROOS | ISR_ROS | ISR_PTS | ISR_PRS)
|
||||
|
||||
#define EPCR_REEP (1<<5)
|
||||
#define EPCR_WEP (1<<4)
|
||||
#define EPCR_EPOS (1<<3)
|
||||
#define EPCR_ERPRR (1<<2)
|
||||
#define EPCR_ERPRW (1<<1)
|
||||
#define EPCR_ERRE (1<<0)
|
||||
|
||||
#define GPCR_GEP_CNTL (1<<0)
|
||||
|
||||
void rt_hw_dm9000_init(void);
|
||||
|
||||
#endif
|
||||
|
||||
+2
-2
@@ -302,8 +302,8 @@ static rt_err_t rtgui_key_rx(rt_device_t dev, rt_size_t size)
|
||||
{
|
||||
/* post down event */
|
||||
rtgui_server_post_event(&(kbd_event.parent), sizeof(kbd_event));
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
|
||||
+21
-21
@@ -1,21 +1,21 @@
|
||||
/*
|
||||
* File : lcd.h
|
||||
* This file is part of RT-Thread RTOS
|
||||
* COPYRIGHT (C) 2006, RT-Thread Develop Team
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://www.rt-thread.org/license/LICENSE
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2008-03-29 Yi.Qiu
|
||||
*/
|
||||
#ifndef __LCD_H__
|
||||
#define __LCD_H__
|
||||
|
||||
#include <rtthread.h>
|
||||
|
||||
void rt_hw_lcd_init(void);
|
||||
|
||||
#endif
|
||||
/*
|
||||
* File : lcd.h
|
||||
* This file is part of RT-Thread RTOS
|
||||
* COPYRIGHT (C) 2006, RT-Thread Develop Team
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://www.rt-thread.org/license/LICENSE
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2008-03-29 Yi.Qiu
|
||||
*/
|
||||
#ifndef __LCD_H__
|
||||
#define __LCD_H__
|
||||
|
||||
#include <rtthread.h>
|
||||
|
||||
void rt_hw_lcd_init(void);
|
||||
|
||||
#endif
|
||||
|
||||
+248
-248
@@ -1,248 +1,248 @@
|
||||
/*
|
||||
* File : lcd_t35.c
|
||||
* This file is part of RT-Thread RTOS
|
||||
* COPYRIGHT (C) 2010, RT-Thread Develop Team
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://www.rt-thread.org/license/LICENSE
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2010-01-01 bernard first version from QiuYi's driver
|
||||
*/
|
||||
|
||||
#include <rtthread.h>
|
||||
#include <s3c24x0.h>
|
||||
|
||||
#include "lcd.h"
|
||||
|
||||
/* LCD driver for A7' */
|
||||
#define LCD_WIDTH 800
|
||||
#define LCD_HEIGHT 480
|
||||
#define LCD_PIXCLOCK 2
|
||||
|
||||
#define LCD_RIGHT_MARGIN 67
|
||||
#define LCD_LEFT_MARGIN 40
|
||||
#define LCD_HSYNC_LEN 31
|
||||
|
||||
#define LCD_UPPER_MARGIN 25
|
||||
#define LCD_LOWER_MARGIN 5
|
||||
#define LCD_VSYNC_LEN 1
|
||||
|
||||
#define LCD_XSIZE LCD_WIDTH
|
||||
#define LCD_YSIZE LCD_HEIGHT
|
||||
#define SCR_XSIZE LCD_WIDTH
|
||||
#define SCR_YSIZE LCD_HEIGHT
|
||||
|
||||
#define RT_HW_LCD_WIDTH LCD_WIDTH
|
||||
#define RT_HW_LCD_HEIGHT LCD_HEIGHT
|
||||
|
||||
#define MVAL (13)
|
||||
#define MVAL_USED (0) //0=each frame 1=rate by MVAL
|
||||
#define INVVDEN (1) //0=normal 1=inverted
|
||||
#define BSWP (0) //Byte swap control
|
||||
#define HWSWP (1) //Half word swap control
|
||||
|
||||
#define GPB1_TO_OUT() (GPBUP &= 0xfffd, GPBCON &= 0xfffffff3, GPBCON |= 0x00000004)
|
||||
#define GPB1_TO_1() (GPBDAT |= 0x0002)
|
||||
#define GPB1_TO_0() (GPBDAT &= 0xfffd)
|
||||
|
||||
#define S3C2410_LCDCON1_CLKVAL(x) ((x) << 8)
|
||||
#define S3C2410_LCDCON1_MMODE (1<<7)
|
||||
#define S3C2410_LCDCON1_DSCAN4 (0<<5)
|
||||
#define S3C2410_LCDCON1_STN4 (1<<5)
|
||||
#define S3C2410_LCDCON1_STN8 (2<<5)
|
||||
#define S3C2410_LCDCON1_TFT (3<<5)
|
||||
|
||||
#define S3C2410_LCDCON1_STN1BPP (0<<1)
|
||||
#define S3C2410_LCDCON1_STN2GREY (1<<1)
|
||||
#define S3C2410_LCDCON1_STN4GREY (2<<1)
|
||||
#define S3C2410_LCDCON1_STN8BPP (3<<1)
|
||||
#define S3C2410_LCDCON1_STN12BPP (4<<1)
|
||||
|
||||
#define S3C2410_LCDCON1_TFT1BPP (8<<1)
|
||||
#define S3C2410_LCDCON1_TFT2BPP (9<<1)
|
||||
#define S3C2410_LCDCON1_TFT4BPP (10<<1)
|
||||
#define S3C2410_LCDCON1_TFT8BPP (11<<1)
|
||||
#define S3C2410_LCDCON1_TFT16BPP (12<<1)
|
||||
#define S3C2410_LCDCON1_TFT24BPP (13<<1)
|
||||
|
||||
#define S3C2410_LCDCON1_ENVID (1)
|
||||
|
||||
#define S3C2410_LCDCON1_MODEMASK 0x1E
|
||||
|
||||
#define S3C2410_LCDCON2_VBPD(x) ((x) << 24)
|
||||
#define S3C2410_LCDCON2_LINEVAL(x) ((x) << 14)
|
||||
#define S3C2410_LCDCON2_VFPD(x) ((x) << 6)
|
||||
#define S3C2410_LCDCON2_VSPW(x) ((x) << 0)
|
||||
|
||||
#define S3C2410_LCDCON2_GET_VBPD(x) ( ((x) >> 24) & 0xFF)
|
||||
#define S3C2410_LCDCON2_GET_VFPD(x) ( ((x) >> 6) & 0xFF)
|
||||
#define S3C2410_LCDCON2_GET_VSPW(x) ( ((x) >> 0) & 0x3F)
|
||||
|
||||
#define S3C2410_LCDCON3_HBPD(x) ((x) << 19)
|
||||
#define S3C2410_LCDCON3_WDLY(x) ((x) << 19)
|
||||
#define S3C2410_LCDCON3_HOZVAL(x) ((x) << 8)
|
||||
#define S3C2410_LCDCON3_HFPD(x) ((x) << 0)
|
||||
#define S3C2410_LCDCON3_LINEBLANK(x)((x) << 0)
|
||||
|
||||
#define S3C2410_LCDCON3_GET_HBPD(x) ( ((x) >> 19) & 0x7F)
|
||||
#define S3C2410_LCDCON3_GET_HFPD(x) ( ((x) >> 0) & 0xFF)
|
||||
|
||||
#define S3C2410_LCDCON4_MVAL(x) ((x) << 8)
|
||||
#define S3C2410_LCDCON4_HSPW(x) ((x) << 0)
|
||||
#define S3C2410_LCDCON4_WLH(x) ((x) << 0)
|
||||
|
||||
#define S3C2410_LCDCON4_GET_HSPW(x) ( ((x) >> 0) & 0xFF)
|
||||
|
||||
#define S3C2410_LCDCON5_BPP24BL (1<<12)
|
||||
#define S3C2410_LCDCON5_FRM565 (1<<11)
|
||||
#define S3C2410_LCDCON5_INVVCLK (1<<10)
|
||||
#define S3C2410_LCDCON5_INVVLINE (1<<9)
|
||||
#define S3C2410_LCDCON5_INVVFRAME (1<<8)
|
||||
#define S3C2410_LCDCON5_INVVD (1<<7)
|
||||
#define S3C2410_LCDCON5_INVVDEN (1<<6)
|
||||
#define S3C2410_LCDCON5_INVPWREN (1<<5)
|
||||
#define S3C2410_LCDCON5_INVLEND (1<<4)
|
||||
#define S3C2410_LCDCON5_PWREN (1<<3)
|
||||
#define S3C2410_LCDCON5_ENLEND (1<<2)
|
||||
#define S3C2410_LCDCON5_BSWP (1<<1)
|
||||
#define S3C2410_LCDCON5_HWSWP (1<<0)
|
||||
#define S3C2410_LCDINT_FRSYNC (1<<1)
|
||||
|
||||
static volatile rt_uint16_t _rt_framebuffer[RT_HW_LCD_HEIGHT][RT_HW_LCD_WIDTH];
|
||||
//static volatile rt_uint16_t _rt_hw_framebuffer[RT_HW_LCD_HEIGHT][RT_HW_LCD_WIDTH];
|
||||
static struct rt_device_graphic_info _lcd_info;
|
||||
|
||||
static void lcd_power_enable(int invpwren, int pwren)
|
||||
{
|
||||
//GPG4 is setted as LCD_PWREN
|
||||
GPGUP = GPGUP | (1<<4); // Pull-up disable
|
||||
GPGCON = GPGCON | (3<<8); //GPG4=LCD_PWREN
|
||||
|
||||
//Enable LCD POWER ENABLE Function
|
||||
LCDCON5 = LCDCON5&(~(1<<3))|(pwren<<3); // PWREN
|
||||
LCDCON5 = LCDCON5&(~(1<<5))|(invpwren<<5); // INVPWREN
|
||||
}
|
||||
|
||||
static void lcd_envid_on_off(int onoff)
|
||||
{
|
||||
if(onoff==1)
|
||||
/*ENVID=ON*/
|
||||
LCDCON1|=1;
|
||||
else
|
||||
/*ENVID Off*/
|
||||
LCDCON1 =LCDCON1 & 0x3fffe;
|
||||
}
|
||||
|
||||
//********************** BOARD LCD backlight ****************************
|
||||
static void LcdBkLtSet(rt_uint32_t HiRatio)
|
||||
{
|
||||
#define FREQ_PWM1 1000
|
||||
if(!HiRatio)
|
||||
{
|
||||
GPBCON = GPBCON & (~(3<<2)) | (1<<2) ; //GPB1ÉèÖÃΪoutput
|
||||
GPBDAT &= ~(1<<1);
|
||||
return;
|
||||
}
|
||||
GPBCON = GPBCON & (~(3<<2)) | (2<<2) ;
|
||||
|
||||
if( HiRatio > 100 ) HiRatio = 100 ;
|
||||
|
||||
TCON = TCON & (~(0xf<<8)) ; // clear manual update bit, stop Timer1
|
||||
|
||||
TCFG0 &= 0xffffff00; // set Timer 0&1 prescaler 0
|
||||
TCFG0 |= 15; //prescaler = 15+1
|
||||
|
||||
TCFG1 &= 0xffffff0f; // set Timer 1 MUX 1/16
|
||||
TCFG1 |= 0x00000030; // set Timer 1 MUX 1/16
|
||||
|
||||
TCNTB1 = ( 100000000>>8 )/FREQ_PWM1; //if set inverter off, when TCNT2<=TCMP2, TOUT is high, TCNT2>TCMP2, TOUT is low
|
||||
TCMPB1 = ( TCNTB1*(100-HiRatio))/100 ; //if set inverter on, when TCNT2<=TCMP2, TOUT is low, TCNT2>TCMP2, TOUT is high
|
||||
|
||||
TCON = TCON & (~(0xf<<8)) | (0x0e<<8) ;
|
||||
TCON = TCON & (~(0xf<<8)) | (0x0d<<8) ;
|
||||
}
|
||||
|
||||
/* RT-Thread Device Interface */
|
||||
static rt_err_t rt_lcd_init (rt_device_t dev)
|
||||
{
|
||||
GPB1_TO_OUT();
|
||||
GPB1_TO_1();
|
||||
|
||||
GPCUP = 0x00000000;
|
||||
GPCCON = 0xaaaa02a9;
|
||||
|
||||
GPDUP = 0x00000000;
|
||||
GPDCON = 0xaaaaaaaa;
|
||||
|
||||
#define M5D(n) ((n)&0x1fffff)
|
||||
#define LCD_ADDR ((rt_uint32_t)_rt_framebuffer)
|
||||
LCDCON1 = (LCD_PIXCLOCK << 8) | (3 << 5) | (12 << 1);
|
||||
LCDCON2 = (LCD_UPPER_MARGIN << 24) | ((LCD_HEIGHT - 1) << 14) | (LCD_LOWER_MARGIN << 6) | (LCD_VSYNC_LEN << 0);
|
||||
LCDCON3 = (LCD_RIGHT_MARGIN << 19) | ((LCD_WIDTH - 1) << 8) | (LCD_LEFT_MARGIN << 0);
|
||||
LCDCON4 = (13 << 8) | (LCD_HSYNC_LEN << 0);
|
||||
#if !defined(LCD_CON5)
|
||||
#define LCD_CON5 ((1<<11) | (1 << 9) | (1 << 8) | (1 << 3) | (1 << 0))
|
||||
#endif
|
||||
LCDCON5 = LCD_CON5;
|
||||
|
||||
LCDSADDR1 = ((LCD_ADDR >> 22) << 21) | ((M5D(LCD_ADDR >> 1)) << 0);
|
||||
LCDSADDR2 = M5D((LCD_ADDR + LCD_WIDTH * LCD_HEIGHT * 2) >> 1);
|
||||
LCDSADDR3 = LCD_WIDTH;
|
||||
|
||||
LCDINTMSK |= (3);
|
||||
LPCSEL &= (~7) ;
|
||||
TPAL=0;
|
||||
|
||||
LcdBkLtSet(70) ;
|
||||
lcd_power_enable(0, 1);
|
||||
lcd_envid_on_off(1);
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
static rt_err_t rt_lcd_control (rt_device_t dev, rt_uint8_t cmd, void *args)
|
||||
{
|
||||
switch (cmd)
|
||||
{
|
||||
case RTGRAPHIC_CTRL_RECT_UPDATE:
|
||||
break;
|
||||
case RTGRAPHIC_CTRL_POWERON:
|
||||
break;
|
||||
case RTGRAPHIC_CTRL_POWEROFF:
|
||||
break;
|
||||
case RTGRAPHIC_CTRL_GET_INFO:
|
||||
rt_memcpy(args, &_lcd_info, sizeof(_lcd_info));
|
||||
break;
|
||||
case RTGRAPHIC_CTRL_SET_MODE:
|
||||
break;
|
||||
}
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
void rt_hw_lcd_init(void)
|
||||
{
|
||||
rt_device_t lcd = rt_malloc(sizeof(struct rt_device));
|
||||
if (lcd == RT_NULL) return; /* no memory yet */
|
||||
|
||||
_lcd_info.bits_per_pixel = 16;
|
||||
_lcd_info.pixel_format = RTGRAPHIC_PIXEL_FORMAT_RGB565P;
|
||||
_lcd_info.framebuffer = (void*)_rt_framebuffer;
|
||||
_lcd_info.width = LCD_WIDTH;
|
||||
_lcd_info.height = LCD_HEIGHT;
|
||||
|
||||
/* init device structure */
|
||||
lcd->type = RT_Device_Class_Unknown;
|
||||
lcd->init = rt_lcd_init;
|
||||
lcd->open = RT_NULL;
|
||||
lcd->close = RT_NULL;
|
||||
lcd->control = rt_lcd_control;
|
||||
lcd->user_data = (void*)&_lcd_info;
|
||||
|
||||
/* register lcd device to RT-Thread */
|
||||
rt_device_register(lcd, "lcd", RT_DEVICE_FLAG_RDWR);
|
||||
}
|
||||
|
||||
/*
|
||||
* File : lcd_t35.c
|
||||
* This file is part of RT-Thread RTOS
|
||||
* COPYRIGHT (C) 2010, RT-Thread Develop Team
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://www.rt-thread.org/license/LICENSE
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2010-01-01 bernard first version from QiuYi's driver
|
||||
*/
|
||||
|
||||
#include <rtthread.h>
|
||||
#include <s3c24x0.h>
|
||||
|
||||
#include "lcd.h"
|
||||
|
||||
/* LCD driver for A7' */
|
||||
#define LCD_WIDTH 800
|
||||
#define LCD_HEIGHT 480
|
||||
#define LCD_PIXCLOCK 2
|
||||
|
||||
#define LCD_RIGHT_MARGIN 67
|
||||
#define LCD_LEFT_MARGIN 40
|
||||
#define LCD_HSYNC_LEN 31
|
||||
|
||||
#define LCD_UPPER_MARGIN 25
|
||||
#define LCD_LOWER_MARGIN 5
|
||||
#define LCD_VSYNC_LEN 1
|
||||
|
||||
#define LCD_XSIZE LCD_WIDTH
|
||||
#define LCD_YSIZE LCD_HEIGHT
|
||||
#define SCR_XSIZE LCD_WIDTH
|
||||
#define SCR_YSIZE LCD_HEIGHT
|
||||
|
||||
#define RT_HW_LCD_WIDTH LCD_WIDTH
|
||||
#define RT_HW_LCD_HEIGHT LCD_HEIGHT
|
||||
|
||||
#define MVAL (13)
|
||||
#define MVAL_USED (0) //0=each frame 1=rate by MVAL
|
||||
#define INVVDEN (1) //0=normal 1=inverted
|
||||
#define BSWP (0) //Byte swap control
|
||||
#define HWSWP (1) //Half word swap control
|
||||
|
||||
#define GPB1_TO_OUT() (GPBUP &= 0xfffd, GPBCON &= 0xfffffff3, GPBCON |= 0x00000004)
|
||||
#define GPB1_TO_1() (GPBDAT |= 0x0002)
|
||||
#define GPB1_TO_0() (GPBDAT &= 0xfffd)
|
||||
|
||||
#define S3C2410_LCDCON1_CLKVAL(x) ((x) << 8)
|
||||
#define S3C2410_LCDCON1_MMODE (1<<7)
|
||||
#define S3C2410_LCDCON1_DSCAN4 (0<<5)
|
||||
#define S3C2410_LCDCON1_STN4 (1<<5)
|
||||
#define S3C2410_LCDCON1_STN8 (2<<5)
|
||||
#define S3C2410_LCDCON1_TFT (3<<5)
|
||||
|
||||
#define S3C2410_LCDCON1_STN1BPP (0<<1)
|
||||
#define S3C2410_LCDCON1_STN2GREY (1<<1)
|
||||
#define S3C2410_LCDCON1_STN4GREY (2<<1)
|
||||
#define S3C2410_LCDCON1_STN8BPP (3<<1)
|
||||
#define S3C2410_LCDCON1_STN12BPP (4<<1)
|
||||
|
||||
#define S3C2410_LCDCON1_TFT1BPP (8<<1)
|
||||
#define S3C2410_LCDCON1_TFT2BPP (9<<1)
|
||||
#define S3C2410_LCDCON1_TFT4BPP (10<<1)
|
||||
#define S3C2410_LCDCON1_TFT8BPP (11<<1)
|
||||
#define S3C2410_LCDCON1_TFT16BPP (12<<1)
|
||||
#define S3C2410_LCDCON1_TFT24BPP (13<<1)
|
||||
|
||||
#define S3C2410_LCDCON1_ENVID (1)
|
||||
|
||||
#define S3C2410_LCDCON1_MODEMASK 0x1E
|
||||
|
||||
#define S3C2410_LCDCON2_VBPD(x) ((x) << 24)
|
||||
#define S3C2410_LCDCON2_LINEVAL(x) ((x) << 14)
|
||||
#define S3C2410_LCDCON2_VFPD(x) ((x) << 6)
|
||||
#define S3C2410_LCDCON2_VSPW(x) ((x) << 0)
|
||||
|
||||
#define S3C2410_LCDCON2_GET_VBPD(x) ( ((x) >> 24) & 0xFF)
|
||||
#define S3C2410_LCDCON2_GET_VFPD(x) ( ((x) >> 6) & 0xFF)
|
||||
#define S3C2410_LCDCON2_GET_VSPW(x) ( ((x) >> 0) & 0x3F)
|
||||
|
||||
#define S3C2410_LCDCON3_HBPD(x) ((x) << 19)
|
||||
#define S3C2410_LCDCON3_WDLY(x) ((x) << 19)
|
||||
#define S3C2410_LCDCON3_HOZVAL(x) ((x) << 8)
|
||||
#define S3C2410_LCDCON3_HFPD(x) ((x) << 0)
|
||||
#define S3C2410_LCDCON3_LINEBLANK(x)((x) << 0)
|
||||
|
||||
#define S3C2410_LCDCON3_GET_HBPD(x) ( ((x) >> 19) & 0x7F)
|
||||
#define S3C2410_LCDCON3_GET_HFPD(x) ( ((x) >> 0) & 0xFF)
|
||||
|
||||
#define S3C2410_LCDCON4_MVAL(x) ((x) << 8)
|
||||
#define S3C2410_LCDCON4_HSPW(x) ((x) << 0)
|
||||
#define S3C2410_LCDCON4_WLH(x) ((x) << 0)
|
||||
|
||||
#define S3C2410_LCDCON4_GET_HSPW(x) ( ((x) >> 0) & 0xFF)
|
||||
|
||||
#define S3C2410_LCDCON5_BPP24BL (1<<12)
|
||||
#define S3C2410_LCDCON5_FRM565 (1<<11)
|
||||
#define S3C2410_LCDCON5_INVVCLK (1<<10)
|
||||
#define S3C2410_LCDCON5_INVVLINE (1<<9)
|
||||
#define S3C2410_LCDCON5_INVVFRAME (1<<8)
|
||||
#define S3C2410_LCDCON5_INVVD (1<<7)
|
||||
#define S3C2410_LCDCON5_INVVDEN (1<<6)
|
||||
#define S3C2410_LCDCON5_INVPWREN (1<<5)
|
||||
#define S3C2410_LCDCON5_INVLEND (1<<4)
|
||||
#define S3C2410_LCDCON5_PWREN (1<<3)
|
||||
#define S3C2410_LCDCON5_ENLEND (1<<2)
|
||||
#define S3C2410_LCDCON5_BSWP (1<<1)
|
||||
#define S3C2410_LCDCON5_HWSWP (1<<0)
|
||||
#define S3C2410_LCDINT_FRSYNC (1<<1)
|
||||
|
||||
static volatile rt_uint16_t _rt_framebuffer[RT_HW_LCD_HEIGHT][RT_HW_LCD_WIDTH];
|
||||
//static volatile rt_uint16_t _rt_hw_framebuffer[RT_HW_LCD_HEIGHT][RT_HW_LCD_WIDTH];
|
||||
static struct rt_device_graphic_info _lcd_info;
|
||||
|
||||
static void lcd_power_enable(int invpwren, int pwren)
|
||||
{
|
||||
//GPG4 is setted as LCD_PWREN
|
||||
GPGUP = GPGUP | (1<<4); // Pull-up disable
|
||||
GPGCON = GPGCON | (3<<8); //GPG4=LCD_PWREN
|
||||
|
||||
//Enable LCD POWER ENABLE Function
|
||||
LCDCON5 = LCDCON5&(~(1<<3))|(pwren<<3); // PWREN
|
||||
LCDCON5 = LCDCON5&(~(1<<5))|(invpwren<<5); // INVPWREN
|
||||
}
|
||||
|
||||
static void lcd_envid_on_off(int onoff)
|
||||
{
|
||||
if(onoff==1)
|
||||
/*ENVID=ON*/
|
||||
LCDCON1|=1;
|
||||
else
|
||||
/*ENVID Off*/
|
||||
LCDCON1 =LCDCON1 & 0x3fffe;
|
||||
}
|
||||
|
||||
//********************** BOARD LCD backlight ****************************
|
||||
static void LcdBkLtSet(rt_uint32_t HiRatio)
|
||||
{
|
||||
#define FREQ_PWM1 1000
|
||||
if(!HiRatio)
|
||||
{
|
||||
GPBCON = GPBCON & (~(3<<2)) | (1<<2) ; //GPB1ÉèÖÃΪoutput
|
||||
GPBDAT &= ~(1<<1);
|
||||
return;
|
||||
}
|
||||
GPBCON = GPBCON & (~(3<<2)) | (2<<2) ;
|
||||
|
||||
if( HiRatio > 100 ) HiRatio = 100 ;
|
||||
|
||||
TCON = TCON & (~(0xf<<8)) ; // clear manual update bit, stop Timer1
|
||||
|
||||
TCFG0 &= 0xffffff00; // set Timer 0&1 prescaler 0
|
||||
TCFG0 |= 15; //prescaler = 15+1
|
||||
|
||||
TCFG1 &= 0xffffff0f; // set Timer 1 MUX 1/16
|
||||
TCFG1 |= 0x00000030; // set Timer 1 MUX 1/16
|
||||
|
||||
TCNTB1 = ( 100000000>>8 )/FREQ_PWM1; //if set inverter off, when TCNT2<=TCMP2, TOUT is high, TCNT2>TCMP2, TOUT is low
|
||||
TCMPB1 = ( TCNTB1*(100-HiRatio))/100 ; //if set inverter on, when TCNT2<=TCMP2, TOUT is low, TCNT2>TCMP2, TOUT is high
|
||||
|
||||
TCON = TCON & (~(0xf<<8)) | (0x0e<<8) ;
|
||||
TCON = TCON & (~(0xf<<8)) | (0x0d<<8) ;
|
||||
}
|
||||
|
||||
/* RT-Thread Device Interface */
|
||||
static rt_err_t rt_lcd_init (rt_device_t dev)
|
||||
{
|
||||
GPB1_TO_OUT();
|
||||
GPB1_TO_1();
|
||||
|
||||
GPCUP = 0x00000000;
|
||||
GPCCON = 0xaaaa02a9;
|
||||
|
||||
GPDUP = 0x00000000;
|
||||
GPDCON = 0xaaaaaaaa;
|
||||
|
||||
#define M5D(n) ((n)&0x1fffff)
|
||||
#define LCD_ADDR ((rt_uint32_t)_rt_framebuffer)
|
||||
LCDCON1 = (LCD_PIXCLOCK << 8) | (3 << 5) | (12 << 1);
|
||||
LCDCON2 = (LCD_UPPER_MARGIN << 24) | ((LCD_HEIGHT - 1) << 14) | (LCD_LOWER_MARGIN << 6) | (LCD_VSYNC_LEN << 0);
|
||||
LCDCON3 = (LCD_RIGHT_MARGIN << 19) | ((LCD_WIDTH - 1) << 8) | (LCD_LEFT_MARGIN << 0);
|
||||
LCDCON4 = (13 << 8) | (LCD_HSYNC_LEN << 0);
|
||||
#if !defined(LCD_CON5)
|
||||
#define LCD_CON5 ((1<<11) | (1 << 9) | (1 << 8) | (1 << 3) | (1 << 0))
|
||||
#endif
|
||||
LCDCON5 = LCD_CON5;
|
||||
|
||||
LCDSADDR1 = ((LCD_ADDR >> 22) << 21) | ((M5D(LCD_ADDR >> 1)) << 0);
|
||||
LCDSADDR2 = M5D((LCD_ADDR + LCD_WIDTH * LCD_HEIGHT * 2) >> 1);
|
||||
LCDSADDR3 = LCD_WIDTH;
|
||||
|
||||
LCDINTMSK |= (3);
|
||||
LPCSEL &= (~7) ;
|
||||
TPAL=0;
|
||||
|
||||
LcdBkLtSet(70) ;
|
||||
lcd_power_enable(0, 1);
|
||||
lcd_envid_on_off(1);
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
static rt_err_t rt_lcd_control (rt_device_t dev, rt_uint8_t cmd, void *args)
|
||||
{
|
||||
switch (cmd)
|
||||
{
|
||||
case RTGRAPHIC_CTRL_RECT_UPDATE:
|
||||
break;
|
||||
case RTGRAPHIC_CTRL_POWERON:
|
||||
break;
|
||||
case RTGRAPHIC_CTRL_POWEROFF:
|
||||
break;
|
||||
case RTGRAPHIC_CTRL_GET_INFO:
|
||||
rt_memcpy(args, &_lcd_info, sizeof(_lcd_info));
|
||||
break;
|
||||
case RTGRAPHIC_CTRL_SET_MODE:
|
||||
break;
|
||||
}
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
void rt_hw_lcd_init(void)
|
||||
{
|
||||
rt_device_t lcd = rt_malloc(sizeof(struct rt_device));
|
||||
if (lcd == RT_NULL) return; /* no memory yet */
|
||||
|
||||
_lcd_info.bits_per_pixel = 16;
|
||||
_lcd_info.pixel_format = RTGRAPHIC_PIXEL_FORMAT_RGB565P;
|
||||
_lcd_info.framebuffer = (void*)_rt_framebuffer;
|
||||
_lcd_info.width = LCD_WIDTH;
|
||||
_lcd_info.height = LCD_HEIGHT;
|
||||
|
||||
/* init device structure */
|
||||
lcd->type = RT_Device_Class_Unknown;
|
||||
lcd->init = rt_lcd_init;
|
||||
lcd->open = RT_NULL;
|
||||
lcd->close = RT_NULL;
|
||||
lcd->control = rt_lcd_control;
|
||||
lcd->user_data = (void*)&_lcd_info;
|
||||
|
||||
/* register lcd device to RT-Thread */
|
||||
rt_device_register(lcd, "lcd", RT_DEVICE_FLAG_RDWR);
|
||||
}
|
||||
|
||||
|
||||
+249
-249
@@ -1,249 +1,249 @@
|
||||
/*
|
||||
* File : lcd_t35.c
|
||||
* This file is part of RT-Thread RTOS
|
||||
* COPYRIGHT (C) 2010, RT-Thread Develop Team
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://www.rt-thread.org/license/LICENSE
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2010-01-01 bernard first version from QiuYi's driver
|
||||
*/
|
||||
|
||||
#include <rtthread.h>
|
||||
#include <s3c24x0.h>
|
||||
|
||||
#include "lcd.h"
|
||||
|
||||
/* LCD driver for N3'5 */
|
||||
#define LCD_WIDTH 240
|
||||
#define LCD_HEIGHT 320
|
||||
#define LCD_PIXCLOCK 4
|
||||
|
||||
#define LCD_RIGHT_MARGIN 36
|
||||
#define LCD_LEFT_MARGIN 19
|
||||
#define LCD_HSYNC_LEN 5
|
||||
|
||||
#define LCD_UPPER_MARGIN 1
|
||||
#define LCD_LOWER_MARGIN 5
|
||||
#define LCD_VSYNC_LEN 1
|
||||
|
||||
#define LCD_XSIZE LCD_WIDTH
|
||||
#define LCD_YSIZE LCD_HEIGHT
|
||||
#define SCR_XSIZE LCD_WIDTH
|
||||
#define SCR_YSIZE LCD_HEIGHT
|
||||
|
||||
#define RT_HW_LCD_WIDTH LCD_WIDTH
|
||||
#define RT_HW_LCD_HEIGHT LCD_HEIGHT
|
||||
|
||||
#define MVAL (13)
|
||||
#define MVAL_USED (0) //0=each frame 1=rate by MVAL
|
||||
#define INVVDEN (1) //0=normal 1=inverted
|
||||
#define BSWP (0) //Byte swap control
|
||||
#define HWSWP (1) //Half word swap control
|
||||
|
||||
#define GPB1_TO_OUT() (GPBUP &= 0xfffd, GPBCON &= 0xfffffff3, GPBCON |= 0x00000004)
|
||||
#define GPB1_TO_1() (GPBDAT |= 0x0002)
|
||||
#define GPB1_TO_0() (GPBDAT &= 0xfffd)
|
||||
|
||||
#define S3C2410_LCDCON1_CLKVAL(x) ((x) << 8)
|
||||
#define S3C2410_LCDCON1_MMODE (1<<7)
|
||||
#define S3C2410_LCDCON1_DSCAN4 (0<<5)
|
||||
#define S3C2410_LCDCON1_STN4 (1<<5)
|
||||
#define S3C2410_LCDCON1_STN8 (2<<5)
|
||||
#define S3C2410_LCDCON1_TFT (3<<5)
|
||||
|
||||
#define S3C2410_LCDCON1_STN1BPP (0<<1)
|
||||
#define S3C2410_LCDCON1_STN2GREY (1<<1)
|
||||
#define S3C2410_LCDCON1_STN4GREY (2<<1)
|
||||
#define S3C2410_LCDCON1_STN8BPP (3<<1)
|
||||
#define S3C2410_LCDCON1_STN12BPP (4<<1)
|
||||
|
||||
#define S3C2410_LCDCON1_TFT1BPP (8<<1)
|
||||
#define S3C2410_LCDCON1_TFT2BPP (9<<1)
|
||||
#define S3C2410_LCDCON1_TFT4BPP (10<<1)
|
||||
#define S3C2410_LCDCON1_TFT8BPP (11<<1)
|
||||
#define S3C2410_LCDCON1_TFT16BPP (12<<1)
|
||||
#define S3C2410_LCDCON1_TFT24BPP (13<<1)
|
||||
|
||||
#define S3C2410_LCDCON1_ENVID (1)
|
||||
|
||||
#define S3C2410_LCDCON1_MODEMASK 0x1E
|
||||
|
||||
#define S3C2410_LCDCON2_VBPD(x) ((x) << 24)
|
||||
#define S3C2410_LCDCON2_LINEVAL(x) ((x) << 14)
|
||||
#define S3C2410_LCDCON2_VFPD(x) ((x) << 6)
|
||||
#define S3C2410_LCDCON2_VSPW(x) ((x) << 0)
|
||||
|
||||
#define S3C2410_LCDCON2_GET_VBPD(x) ( ((x) >> 24) & 0xFF)
|
||||
#define S3C2410_LCDCON2_GET_VFPD(x) ( ((x) >> 6) & 0xFF)
|
||||
#define S3C2410_LCDCON2_GET_VSPW(x) ( ((x) >> 0) & 0x3F)
|
||||
|
||||
#define S3C2410_LCDCON3_HBPD(x) ((x) << 19)
|
||||
#define S3C2410_LCDCON3_WDLY(x) ((x) << 19)
|
||||
#define S3C2410_LCDCON3_HOZVAL(x) ((x) << 8)
|
||||
#define S3C2410_LCDCON3_HFPD(x) ((x) << 0)
|
||||
#define S3C2410_LCDCON3_LINEBLANK(x)((x) << 0)
|
||||
|
||||
#define S3C2410_LCDCON3_GET_HBPD(x) ( ((x) >> 19) & 0x7F)
|
||||
#define S3C2410_LCDCON3_GET_HFPD(x) ( ((x) >> 0) & 0xFF)
|
||||
|
||||
#define S3C2410_LCDCON4_MVAL(x) ((x) << 8)
|
||||
#define S3C2410_LCDCON4_HSPW(x) ((x) << 0)
|
||||
#define S3C2410_LCDCON4_WLH(x) ((x) << 0)
|
||||
|
||||
#define S3C2410_LCDCON4_GET_HSPW(x) ( ((x) >> 0) & 0xFF)
|
||||
|
||||
#define S3C2410_LCDCON5_BPP24BL (1<<12)
|
||||
#define S3C2410_LCDCON5_FRM565 (1<<11)
|
||||
#define S3C2410_LCDCON5_INVVCLK (1<<10)
|
||||
#define S3C2410_LCDCON5_INVVLINE (1<<9)
|
||||
#define S3C2410_LCDCON5_INVVFRAME (1<<8)
|
||||
#define S3C2410_LCDCON5_INVVD (1<<7)
|
||||
#define S3C2410_LCDCON5_INVVDEN (1<<6)
|
||||
#define S3C2410_LCDCON5_INVPWREN (1<<5)
|
||||
#define S3C2410_LCDCON5_INVLEND (1<<4)
|
||||
#define S3C2410_LCDCON5_PWREN (1<<3)
|
||||
#define S3C2410_LCDCON5_ENLEND (1<<2)
|
||||
#define S3C2410_LCDCON5_BSWP (1<<1)
|
||||
#define S3C2410_LCDCON5_HWSWP (1<<0)
|
||||
|
||||
#define S3C2410_LCDINT_FRSYNC (1<<1)
|
||||
|
||||
static volatile rt_uint16_t _rt_framebuffer[RT_HW_LCD_HEIGHT][RT_HW_LCD_WIDTH];
|
||||
//static volatile rt_uint16_t _rt_hw_framebuffer[RT_HW_LCD_HEIGHT][RT_HW_LCD_WIDTH];
|
||||
static struct rt_device_graphic_info _lcd_info;
|
||||
|
||||
static void lcd_power_enable(int invpwren, int pwren)
|
||||
{
|
||||
//GPG4 is setted as LCD_PWREN
|
||||
GPGUP = GPGUP | (1<<4); // Pull-up disable
|
||||
GPGCON = GPGCON | (3<<8); //GPG4=LCD_PWREN
|
||||
|
||||
//Enable LCD POWER ENABLE Function
|
||||
LCDCON5 = LCDCON5&(~(1<<3))|(pwren<<3); // PWREN
|
||||
LCDCON5 = LCDCON5&(~(1<<5))|(invpwren<<5); // INVPWREN
|
||||
}
|
||||
|
||||
static void lcd_envid_on_off(int onoff)
|
||||
{
|
||||
if(onoff==1)
|
||||
/*ENVID=ON*/
|
||||
LCDCON1|=1;
|
||||
else
|
||||
/*ENVID Off*/
|
||||
LCDCON1 =LCDCON1 & 0x3fffe;
|
||||
}
|
||||
|
||||
//********************** BOARD LCD backlight ****************************
|
||||
static void LcdBkLtSet(rt_uint32_t HiRatio)
|
||||
{
|
||||
#define FREQ_PWM1 1000
|
||||
if(!HiRatio)
|
||||
{
|
||||
GPBCON = GPBCON & (~(3<<2)) | (1<<2) ; //GPB1ÉèÖÃΪoutput
|
||||
GPBDAT &= ~(1<<1);
|
||||
return;
|
||||
}
|
||||
GPBCON = GPBCON & (~(3<<2)) | (2<<2) ;
|
||||
|
||||
if( HiRatio > 100 ) HiRatio = 100 ;
|
||||
|
||||
TCON = TCON & (~(0xf<<8)) ; // clear manual update bit, stop Timer1
|
||||
|
||||
TCFG0 &= 0xffffff00; // set Timer 0&1 prescaler 0
|
||||
TCFG0 |= 15; //prescaler = 15+1
|
||||
|
||||
TCFG1 &= 0xffffff0f; // set Timer 1 MUX 1/16
|
||||
TCFG1 |= 0x00000030; // set Timer 1 MUX 1/16
|
||||
|
||||
TCNTB1 = ( 100000000>>8 )/FREQ_PWM1; //if set inverter off, when TCNT2<=TCMP2, TOUT is high, TCNT2>TCMP2, TOUT is low
|
||||
TCMPB1 = ( TCNTB1*(100-HiRatio))/100 ; //if set inverter on, when TCNT2<=TCMP2, TOUT is low, TCNT2>TCMP2, TOUT is high
|
||||
|
||||
TCON = TCON & (~(0xf<<8)) | (0x0e<<8) ;
|
||||
TCON = TCON & (~(0xf<<8)) | (0x0d<<8) ;
|
||||
}
|
||||
|
||||
/* RT-Thread Device Interface */
|
||||
static rt_err_t rt_lcd_init (rt_device_t dev)
|
||||
{
|
||||
GPB1_TO_OUT();
|
||||
GPB1_TO_1();
|
||||
|
||||
GPCUP = 0x00000000;
|
||||
GPCCON = 0xaaaa02a9;
|
||||
|
||||
GPDUP = 0x00000000;
|
||||
GPDCON = 0xaaaaaaaa;
|
||||
|
||||
#define M5D(n) ((n)&0x1fffff)
|
||||
#define LCD_ADDR ((rt_uint32_t)_rt_framebuffer)
|
||||
LCDCON1 = (LCD_PIXCLOCK << 8) | (3 << 5) | (12 << 1);
|
||||
LCDCON2 = (LCD_UPPER_MARGIN << 24) | ((LCD_HEIGHT - 1) << 14) | (LCD_LOWER_MARGIN << 6) | (LCD_VSYNC_LEN << 0);
|
||||
LCDCON3 = (LCD_RIGHT_MARGIN << 19) | ((LCD_WIDTH - 1) << 8) | (LCD_LEFT_MARGIN << 0);
|
||||
LCDCON4 = (13 << 8) | (LCD_HSYNC_LEN << 0);
|
||||
#if !defined(LCD_CON5)
|
||||
#define LCD_CON5 ((1<<11) | (1 << 9) | (1 << 8) | (1 << 3) | (1 << 0))
|
||||
#endif
|
||||
LCDCON5 = LCD_CON5;
|
||||
|
||||
LCDSADDR1 = ((LCD_ADDR >> 22) << 21) | ((M5D(LCD_ADDR >> 1)) << 0);
|
||||
LCDSADDR2 = M5D((LCD_ADDR + LCD_WIDTH * LCD_HEIGHT * 2) >> 1);
|
||||
LCDSADDR3 = LCD_WIDTH;
|
||||
|
||||
LCDINTMSK |= (3);
|
||||
LPCSEL &= (~7) ;
|
||||
TPAL=0;
|
||||
|
||||
LcdBkLtSet(70) ;
|
||||
lcd_power_enable(0, 1);
|
||||
lcd_envid_on_off(1);
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
static rt_err_t rt_lcd_control (rt_device_t dev, rt_uint8_t cmd, void *args)
|
||||
{
|
||||
switch (cmd)
|
||||
{
|
||||
case RTGRAPHIC_CTRL_RECT_UPDATE:
|
||||
break;
|
||||
case RTGRAPHIC_CTRL_POWERON:
|
||||
break;
|
||||
case RTGRAPHIC_CTRL_POWEROFF:
|
||||
break;
|
||||
case RTGRAPHIC_CTRL_GET_INFO:
|
||||
rt_memcpy(args, &_lcd_info, sizeof(_lcd_info));
|
||||
break;
|
||||
case RTGRAPHIC_CTRL_SET_MODE:
|
||||
break;
|
||||
}
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
void rt_hw_lcd_init(void)
|
||||
{
|
||||
rt_device_t lcd = rt_malloc(sizeof(struct rt_device));
|
||||
if (lcd == RT_NULL) return; /* no memory yet */
|
||||
|
||||
_lcd_info.bits_per_pixel = 16;
|
||||
_lcd_info.pixel_format = RTGRAPHIC_PIXEL_FORMAT_RGB565P;
|
||||
_lcd_info.framebuffer = (void*)_rt_framebuffer;
|
||||
_lcd_info.width = LCD_WIDTH;
|
||||
_lcd_info.height = LCD_HEIGHT;
|
||||
|
||||
/* init device structure */
|
||||
lcd->type = RT_Device_Class_Unknown;
|
||||
lcd->init = rt_lcd_init;
|
||||
lcd->open = RT_NULL;
|
||||
lcd->close = RT_NULL;
|
||||
lcd->control = rt_lcd_control;
|
||||
lcd->user_data = (void*)&_lcd_info;
|
||||
|
||||
/* register lcd device to RT-Thread */
|
||||
rt_device_register(lcd, "lcd", RT_DEVICE_FLAG_RDWR);
|
||||
}
|
||||
|
||||
/*
|
||||
* File : lcd_t35.c
|
||||
* This file is part of RT-Thread RTOS
|
||||
* COPYRIGHT (C) 2010, RT-Thread Develop Team
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://www.rt-thread.org/license/LICENSE
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2010-01-01 bernard first version from QiuYi's driver
|
||||
*/
|
||||
|
||||
#include <rtthread.h>
|
||||
#include <s3c24x0.h>
|
||||
|
||||
#include "lcd.h"
|
||||
|
||||
/* LCD driver for N3'5 */
|
||||
#define LCD_WIDTH 240
|
||||
#define LCD_HEIGHT 320
|
||||
#define LCD_PIXCLOCK 4
|
||||
|
||||
#define LCD_RIGHT_MARGIN 36
|
||||
#define LCD_LEFT_MARGIN 19
|
||||
#define LCD_HSYNC_LEN 5
|
||||
|
||||
#define LCD_UPPER_MARGIN 1
|
||||
#define LCD_LOWER_MARGIN 5
|
||||
#define LCD_VSYNC_LEN 1
|
||||
|
||||
#define LCD_XSIZE LCD_WIDTH
|
||||
#define LCD_YSIZE LCD_HEIGHT
|
||||
#define SCR_XSIZE LCD_WIDTH
|
||||
#define SCR_YSIZE LCD_HEIGHT
|
||||
|
||||
#define RT_HW_LCD_WIDTH LCD_WIDTH
|
||||
#define RT_HW_LCD_HEIGHT LCD_HEIGHT
|
||||
|
||||
#define MVAL (13)
|
||||
#define MVAL_USED (0) //0=each frame 1=rate by MVAL
|
||||
#define INVVDEN (1) //0=normal 1=inverted
|
||||
#define BSWP (0) //Byte swap control
|
||||
#define HWSWP (1) //Half word swap control
|
||||
|
||||
#define GPB1_TO_OUT() (GPBUP &= 0xfffd, GPBCON &= 0xfffffff3, GPBCON |= 0x00000004)
|
||||
#define GPB1_TO_1() (GPBDAT |= 0x0002)
|
||||
#define GPB1_TO_0() (GPBDAT &= 0xfffd)
|
||||
|
||||
#define S3C2410_LCDCON1_CLKVAL(x) ((x) << 8)
|
||||
#define S3C2410_LCDCON1_MMODE (1<<7)
|
||||
#define S3C2410_LCDCON1_DSCAN4 (0<<5)
|
||||
#define S3C2410_LCDCON1_STN4 (1<<5)
|
||||
#define S3C2410_LCDCON1_STN8 (2<<5)
|
||||
#define S3C2410_LCDCON1_TFT (3<<5)
|
||||
|
||||
#define S3C2410_LCDCON1_STN1BPP (0<<1)
|
||||
#define S3C2410_LCDCON1_STN2GREY (1<<1)
|
||||
#define S3C2410_LCDCON1_STN4GREY (2<<1)
|
||||
#define S3C2410_LCDCON1_STN8BPP (3<<1)
|
||||
#define S3C2410_LCDCON1_STN12BPP (4<<1)
|
||||
|
||||
#define S3C2410_LCDCON1_TFT1BPP (8<<1)
|
||||
#define S3C2410_LCDCON1_TFT2BPP (9<<1)
|
||||
#define S3C2410_LCDCON1_TFT4BPP (10<<1)
|
||||
#define S3C2410_LCDCON1_TFT8BPP (11<<1)
|
||||
#define S3C2410_LCDCON1_TFT16BPP (12<<1)
|
||||
#define S3C2410_LCDCON1_TFT24BPP (13<<1)
|
||||
|
||||
#define S3C2410_LCDCON1_ENVID (1)
|
||||
|
||||
#define S3C2410_LCDCON1_MODEMASK 0x1E
|
||||
|
||||
#define S3C2410_LCDCON2_VBPD(x) ((x) << 24)
|
||||
#define S3C2410_LCDCON2_LINEVAL(x) ((x) << 14)
|
||||
#define S3C2410_LCDCON2_VFPD(x) ((x) << 6)
|
||||
#define S3C2410_LCDCON2_VSPW(x) ((x) << 0)
|
||||
|
||||
#define S3C2410_LCDCON2_GET_VBPD(x) ( ((x) >> 24) & 0xFF)
|
||||
#define S3C2410_LCDCON2_GET_VFPD(x) ( ((x) >> 6) & 0xFF)
|
||||
#define S3C2410_LCDCON2_GET_VSPW(x) ( ((x) >> 0) & 0x3F)
|
||||
|
||||
#define S3C2410_LCDCON3_HBPD(x) ((x) << 19)
|
||||
#define S3C2410_LCDCON3_WDLY(x) ((x) << 19)
|
||||
#define S3C2410_LCDCON3_HOZVAL(x) ((x) << 8)
|
||||
#define S3C2410_LCDCON3_HFPD(x) ((x) << 0)
|
||||
#define S3C2410_LCDCON3_LINEBLANK(x)((x) << 0)
|
||||
|
||||
#define S3C2410_LCDCON3_GET_HBPD(x) ( ((x) >> 19) & 0x7F)
|
||||
#define S3C2410_LCDCON3_GET_HFPD(x) ( ((x) >> 0) & 0xFF)
|
||||
|
||||
#define S3C2410_LCDCON4_MVAL(x) ((x) << 8)
|
||||
#define S3C2410_LCDCON4_HSPW(x) ((x) << 0)
|
||||
#define S3C2410_LCDCON4_WLH(x) ((x) << 0)
|
||||
|
||||
#define S3C2410_LCDCON4_GET_HSPW(x) ( ((x) >> 0) & 0xFF)
|
||||
|
||||
#define S3C2410_LCDCON5_BPP24BL (1<<12)
|
||||
#define S3C2410_LCDCON5_FRM565 (1<<11)
|
||||
#define S3C2410_LCDCON5_INVVCLK (1<<10)
|
||||
#define S3C2410_LCDCON5_INVVLINE (1<<9)
|
||||
#define S3C2410_LCDCON5_INVVFRAME (1<<8)
|
||||
#define S3C2410_LCDCON5_INVVD (1<<7)
|
||||
#define S3C2410_LCDCON5_INVVDEN (1<<6)
|
||||
#define S3C2410_LCDCON5_INVPWREN (1<<5)
|
||||
#define S3C2410_LCDCON5_INVLEND (1<<4)
|
||||
#define S3C2410_LCDCON5_PWREN (1<<3)
|
||||
#define S3C2410_LCDCON5_ENLEND (1<<2)
|
||||
#define S3C2410_LCDCON5_BSWP (1<<1)
|
||||
#define S3C2410_LCDCON5_HWSWP (1<<0)
|
||||
|
||||
#define S3C2410_LCDINT_FRSYNC (1<<1)
|
||||
|
||||
static volatile rt_uint16_t _rt_framebuffer[RT_HW_LCD_HEIGHT][RT_HW_LCD_WIDTH];
|
||||
//static volatile rt_uint16_t _rt_hw_framebuffer[RT_HW_LCD_HEIGHT][RT_HW_LCD_WIDTH];
|
||||
static struct rt_device_graphic_info _lcd_info;
|
||||
|
||||
static void lcd_power_enable(int invpwren, int pwren)
|
||||
{
|
||||
//GPG4 is setted as LCD_PWREN
|
||||
GPGUP = GPGUP | (1<<4); // Pull-up disable
|
||||
GPGCON = GPGCON | (3<<8); //GPG4=LCD_PWREN
|
||||
|
||||
//Enable LCD POWER ENABLE Function
|
||||
LCDCON5 = LCDCON5&(~(1<<3))|(pwren<<3); // PWREN
|
||||
LCDCON5 = LCDCON5&(~(1<<5))|(invpwren<<5); // INVPWREN
|
||||
}
|
||||
|
||||
static void lcd_envid_on_off(int onoff)
|
||||
{
|
||||
if(onoff==1)
|
||||
/*ENVID=ON*/
|
||||
LCDCON1|=1;
|
||||
else
|
||||
/*ENVID Off*/
|
||||
LCDCON1 =LCDCON1 & 0x3fffe;
|
||||
}
|
||||
|
||||
//********************** BOARD LCD backlight ****************************
|
||||
static void LcdBkLtSet(rt_uint32_t HiRatio)
|
||||
{
|
||||
#define FREQ_PWM1 1000
|
||||
if(!HiRatio)
|
||||
{
|
||||
GPBCON = GPBCON & (~(3<<2)) | (1<<2) ; //GPB1ÉèÖÃΪoutput
|
||||
GPBDAT &= ~(1<<1);
|
||||
return;
|
||||
}
|
||||
GPBCON = GPBCON & (~(3<<2)) | (2<<2) ;
|
||||
|
||||
if( HiRatio > 100 ) HiRatio = 100 ;
|
||||
|
||||
TCON = TCON & (~(0xf<<8)) ; // clear manual update bit, stop Timer1
|
||||
|
||||
TCFG0 &= 0xffffff00; // set Timer 0&1 prescaler 0
|
||||
TCFG0 |= 15; //prescaler = 15+1
|
||||
|
||||
TCFG1 &= 0xffffff0f; // set Timer 1 MUX 1/16
|
||||
TCFG1 |= 0x00000030; // set Timer 1 MUX 1/16
|
||||
|
||||
TCNTB1 = ( 100000000>>8 )/FREQ_PWM1; //if set inverter off, when TCNT2<=TCMP2, TOUT is high, TCNT2>TCMP2, TOUT is low
|
||||
TCMPB1 = ( TCNTB1*(100-HiRatio))/100 ; //if set inverter on, when TCNT2<=TCMP2, TOUT is low, TCNT2>TCMP2, TOUT is high
|
||||
|
||||
TCON = TCON & (~(0xf<<8)) | (0x0e<<8) ;
|
||||
TCON = TCON & (~(0xf<<8)) | (0x0d<<8) ;
|
||||
}
|
||||
|
||||
/* RT-Thread Device Interface */
|
||||
static rt_err_t rt_lcd_init (rt_device_t dev)
|
||||
{
|
||||
GPB1_TO_OUT();
|
||||
GPB1_TO_1();
|
||||
|
||||
GPCUP = 0x00000000;
|
||||
GPCCON = 0xaaaa02a9;
|
||||
|
||||
GPDUP = 0x00000000;
|
||||
GPDCON = 0xaaaaaaaa;
|
||||
|
||||
#define M5D(n) ((n)&0x1fffff)
|
||||
#define LCD_ADDR ((rt_uint32_t)_rt_framebuffer)
|
||||
LCDCON1 = (LCD_PIXCLOCK << 8) | (3 << 5) | (12 << 1);
|
||||
LCDCON2 = (LCD_UPPER_MARGIN << 24) | ((LCD_HEIGHT - 1) << 14) | (LCD_LOWER_MARGIN << 6) | (LCD_VSYNC_LEN << 0);
|
||||
LCDCON3 = (LCD_RIGHT_MARGIN << 19) | ((LCD_WIDTH - 1) << 8) | (LCD_LEFT_MARGIN << 0);
|
||||
LCDCON4 = (13 << 8) | (LCD_HSYNC_LEN << 0);
|
||||
#if !defined(LCD_CON5)
|
||||
#define LCD_CON5 ((1<<11) | (1 << 9) | (1 << 8) | (1 << 3) | (1 << 0))
|
||||
#endif
|
||||
LCDCON5 = LCD_CON5;
|
||||
|
||||
LCDSADDR1 = ((LCD_ADDR >> 22) << 21) | ((M5D(LCD_ADDR >> 1)) << 0);
|
||||
LCDSADDR2 = M5D((LCD_ADDR + LCD_WIDTH * LCD_HEIGHT * 2) >> 1);
|
||||
LCDSADDR3 = LCD_WIDTH;
|
||||
|
||||
LCDINTMSK |= (3);
|
||||
LPCSEL &= (~7) ;
|
||||
TPAL=0;
|
||||
|
||||
LcdBkLtSet(70) ;
|
||||
lcd_power_enable(0, 1);
|
||||
lcd_envid_on_off(1);
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
static rt_err_t rt_lcd_control (rt_device_t dev, rt_uint8_t cmd, void *args)
|
||||
{
|
||||
switch (cmd)
|
||||
{
|
||||
case RTGRAPHIC_CTRL_RECT_UPDATE:
|
||||
break;
|
||||
case RTGRAPHIC_CTRL_POWERON:
|
||||
break;
|
||||
case RTGRAPHIC_CTRL_POWEROFF:
|
||||
break;
|
||||
case RTGRAPHIC_CTRL_GET_INFO:
|
||||
rt_memcpy(args, &_lcd_info, sizeof(_lcd_info));
|
||||
break;
|
||||
case RTGRAPHIC_CTRL_SET_MODE:
|
||||
break;
|
||||
}
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
void rt_hw_lcd_init(void)
|
||||
{
|
||||
rt_device_t lcd = rt_malloc(sizeof(struct rt_device));
|
||||
if (lcd == RT_NULL) return; /* no memory yet */
|
||||
|
||||
_lcd_info.bits_per_pixel = 16;
|
||||
_lcd_info.pixel_format = RTGRAPHIC_PIXEL_FORMAT_RGB565P;
|
||||
_lcd_info.framebuffer = (void*)_rt_framebuffer;
|
||||
_lcd_info.width = LCD_WIDTH;
|
||||
_lcd_info.height = LCD_HEIGHT;
|
||||
|
||||
/* init device structure */
|
||||
lcd->type = RT_Device_Class_Unknown;
|
||||
lcd->init = rt_lcd_init;
|
||||
lcd->open = RT_NULL;
|
||||
lcd->close = RT_NULL;
|
||||
lcd->control = rt_lcd_control;
|
||||
lcd->user_data = (void*)&_lcd_info;
|
||||
|
||||
/* register lcd device to RT-Thread */
|
||||
rt_device_register(lcd, "lcd", RT_DEVICE_FLAG_RDWR);
|
||||
}
|
||||
|
||||
|
||||
+250
-250
File diff suppressed because it is too large
Load Diff
+255
-255
File diff suppressed because it is too large
Load Diff
+41
-41
@@ -1,41 +1,41 @@
|
||||
/*
|
||||
* File : led.c
|
||||
* This file is part of RT-Thread RTOS
|
||||
* COPYRIGHT (C) 2006, RT-Thread Develop Team
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://www.rt-thread.org/license/LICENSE
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2009-12-27 rdghx mini2440
|
||||
*/
|
||||
|
||||
/**
|
||||
* @addtogroup mini2440
|
||||
*/
|
||||
/*@{*/
|
||||
|
||||
#include <s3c24x0.h>
|
||||
#include "led.h"
|
||||
|
||||
void rt_hw_led_init(void)
|
||||
{
|
||||
/* GPB5,GPB6,GPB7,GPB8 for LED */
|
||||
GPBCON = GPBCON & (~(0xff << 10)) | (0x55 << 10);
|
||||
GPBUP |= (0x0f << 5);
|
||||
}
|
||||
|
||||
void rt_hw_led_on(unsigned char value)
|
||||
{
|
||||
GPBDAT &= ~ ((value & 0x0f) << 5);
|
||||
}
|
||||
|
||||
void rt_hw_led_off(unsigned char value)
|
||||
{
|
||||
GPBDAT |= (value & 0x0f) << 5;
|
||||
}
|
||||
|
||||
/*@}*/
|
||||
|
||||
/*
|
||||
* File : led.c
|
||||
* This file is part of RT-Thread RTOS
|
||||
* COPYRIGHT (C) 2006, RT-Thread Develop Team
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://www.rt-thread.org/license/LICENSE
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2009-12-27 rdghx mini2440
|
||||
*/
|
||||
|
||||
/**
|
||||
* @addtogroup mini2440
|
||||
*/
|
||||
/*@{*/
|
||||
|
||||
#include <s3c24x0.h>
|
||||
#include "led.h"
|
||||
|
||||
void rt_hw_led_init(void)
|
||||
{
|
||||
/* GPB5,GPB6,GPB7,GPB8 for LED */
|
||||
GPBCON = GPBCON & (~(0xff << 10)) | (0x55 << 10);
|
||||
GPBUP |= (0x0f << 5);
|
||||
}
|
||||
|
||||
void rt_hw_led_on(unsigned char value)
|
||||
{
|
||||
GPBDAT &= ~ ((value & 0x0f) << 5);
|
||||
}
|
||||
|
||||
void rt_hw_led_off(unsigned char value)
|
||||
{
|
||||
GPBDAT |= (value & 0x0f) << 5;
|
||||
}
|
||||
|
||||
/*@}*/
|
||||
|
||||
|
||||
+28
-28
@@ -1,28 +1,28 @@
|
||||
/*
|
||||
* File : led.h
|
||||
* This file is part of RT-Thread RTOS
|
||||
* COPYRIGHT (C) 2006, RT-Thread Develop Team
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://www.rt-thread.org/license/LICENSE
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2009-12-27 rdghx mini2440
|
||||
*/
|
||||
|
||||
#ifndef __LED_H__
|
||||
#define __LED_H__
|
||||
|
||||
#define LED1 0x01
|
||||
#define LED2 0x02
|
||||
#define LED3 0x04
|
||||
#define LED4 0x08
|
||||
#define LED_ALL 0x0f
|
||||
|
||||
void rt_hw_led_init(void);
|
||||
void rt_hw_led_on(unsigned char value);
|
||||
void rt_hw_led_off(unsigned char value);
|
||||
|
||||
#endif
|
||||
/*
|
||||
* File : led.h
|
||||
* This file is part of RT-Thread RTOS
|
||||
* COPYRIGHT (C) 2006, RT-Thread Develop Team
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://www.rt-thread.org/license/LICENSE
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2009-12-27 rdghx mini2440
|
||||
*/
|
||||
|
||||
#ifndef __LED_H__
|
||||
#define __LED_H__
|
||||
|
||||
#define LED1 0x01
|
||||
#define LED2 0x02
|
||||
#define LED3 0x04
|
||||
#define LED4 0x08
|
||||
#define LED_ALL 0x0f
|
||||
|
||||
void rt_hw_led_init(void);
|
||||
void rt_hw_led_on(unsigned char value);
|
||||
void rt_hw_led_off(unsigned char value);
|
||||
|
||||
#endif
|
||||
|
||||
+235
-235
@@ -1,235 +1,235 @@
|
||||
/* RT-Thread config file */
|
||||
#ifndef __RTTHREAD_CFG_H__
|
||||
#define __RTTHREAD_CFG_H__
|
||||
|
||||
// <RDTConfigurator URL="http://www.rt-thread.com/eclipse">
|
||||
|
||||
// <integer name="RT_NAME_MAX" description="Maximal size of kernel object name length" default="6" />
|
||||
#define RT_NAME_MAX 32
|
||||
// <integer name="RT_ALIGN_SIZE" description="Alignment size for CPU architecture data access" default="4" />
|
||||
#define RT_ALIGN_SIZE 4
|
||||
// <integer name="RT_THREAD_PRIORITY_MAX" description="Maximal level of thread priority" default="32">
|
||||
// <item description="8">8</item>
|
||||
// <item description="32">32</item>
|
||||
// <item description="256">256</item>
|
||||
// </integer>
|
||||
#define RT_THREAD_PRIORITY_MAX 256
|
||||
// <integer name="RT_TICK_PER_SECOND" description="OS tick per second" default="100" />
|
||||
#define RT_TICK_PER_SECOND 100
|
||||
// <section name="RT_DEBUG" description="Kernel Debug Configuration" default="true" >
|
||||
// #define RT_DEBUG
|
||||
// <bool name="RT_THREAD_DEBUG" description="Thread debug enable" default="false" />
|
||||
// #define RT_THREAD_DEBUG
|
||||
// <bool name="RT_USING_OVERFLOW_CHECK" description="Thread stack over flow detect" default="true" />
|
||||
#define RT_USING_OVERFLOW_CHECK
|
||||
// </section>
|
||||
|
||||
// <bool name="RT_USING_HOOK" description="Using hook functions" default="true" />
|
||||
#define RT_USING_HOOK
|
||||
// <section name="RT_USING_TIMER_SOFT" description="Using software timer which will start a thread to handle soft-timer" default="true" >
|
||||
// #define RT_USING_TIMER_SOFT
|
||||
// <integer name="RT_TIMER_THREAD_PRIO" description="The priority level of timer thread" default="4" />
|
||||
#define RT_TIMER_THREAD_PRIO 8
|
||||
// <integer name="RT_TIMER_THREAD_STACK_SIZE" description="The stack size of timer thread" default="512" />
|
||||
#define RT_TIMER_THREAD_STACK_SIZE 512
|
||||
// <integer name="RT_TIMER_TICK_PER_SECOND" description="The soft-timer tick per second" default="10" />
|
||||
#define RT_TIMER_TICK_PER_SECOND 10
|
||||
// </section>
|
||||
|
||||
// <section name="IPC" description="Inter-Thread communication" default="always" >
|
||||
// <bool name="RT_USING_SEMAPHORE" description="Using semaphore in the system" default="true" />
|
||||
#define RT_USING_SEMAPHORE
|
||||
// <bool name="RT_USING_MUTEX" description="Using mutex in the system" default="true" />
|
||||
#define RT_USING_MUTEX
|
||||
// <bool name="RT_USING_EVENT" description="Using event group in the system" default="true" />
|
||||
#define RT_USING_EVENT
|
||||
// <bool name="RT_USING_MAILBOX" description="Using mailbox in the system" default="true" />
|
||||
#define RT_USING_MAILBOX
|
||||
// <bool name="RT_USING_MESSAGEQUEUE" description="Using message queue in the system" default="true" />
|
||||
#define RT_USING_MESSAGEQUEUE
|
||||
// </section>
|
||||
|
||||
// <section name="MM" description="Memory Management" default="always" >
|
||||
// <bool name="RT_USING_MEMPOOL" description="Using Memory Pool Management in the system" default="true" />
|
||||
#define RT_USING_MEMPOOL
|
||||
// <bool name="RT_USING_HEAP" description="Using Dynamic Heap Management in the system" default="true" />
|
||||
#define RT_USING_HEAP
|
||||
// <bool name="RT_USING_SMALL_MEM" description="Optimizing for small memory" default="false" />
|
||||
#define RT_USING_SMALL_MEM
|
||||
// <bool name="RT_USING_SLAB" description="Using SLAB memory management for large memory" default="false" />
|
||||
// #define RT_USING_SLAB
|
||||
// </section>
|
||||
|
||||
// <section name="RT_USING_DEVICE" description="Using Device Driver Framework" default="true" >
|
||||
#define RT_USING_DEVICE
|
||||
// <bool name="RT_USING_UART0" description="Using UART0" default="true" />
|
||||
#define RT_USING_UART0
|
||||
// <integer name="RT_UART_RX_BUFFER_SIZE" description="The buffer size for UART reception" default="64" />
|
||||
#define RT_UART_RX_BUFFER_SIZE 64
|
||||
// </section>
|
||||
|
||||
// <section name="RT_USING_CONSOLE" description="Using console" default="true" >
|
||||
#define RT_USING_CONSOLE
|
||||
// <integer name="RT_CONSOLEBUF_SIZE" description="The buffer size for console output" default="128" />
|
||||
#define RT_CONSOLEBUF_SIZE 128
|
||||
// </section>
|
||||
|
||||
// <section name="RT_USING_FINSH" description="Using finsh as shell, which is a C-Express shell" default="true" >
|
||||
#define RT_USING_FINSH
|
||||
// <bool name="FINSH_USING_SYMTAB" description="Using symbol table in finsh shell" default="true" />
|
||||
#define FINSH_USING_SYMTAB
|
||||
// <bool name="FINSH_USING_DESCRIPTION" description="Keeping description in symbol table" default="true" />
|
||||
#define FINSH_USING_DESCRIPTION
|
||||
// <integer name="FINSH_THREAD_STACK_SIZE" description="The stack size for finsh thread" default="4096" />
|
||||
#define FINSH_THREAD_STACK_SIZE 4096
|
||||
// </section>
|
||||
|
||||
// <section name="LIBC" description="C Runtime library setting" default="always" >
|
||||
// <bool name="RT_USING_NEWLIB" description="Using newlib library, only available under GNU GCC" default="true" />
|
||||
#define RT_USING_NEWLIB
|
||||
// <bool name="RT_USING_PTHREADS" description="Using POSIX threads library" default="true" />
|
||||
#define RT_USING_PTHREADS
|
||||
// </section>
|
||||
|
||||
// <section name="RT_USING_DFS" description="Device file system" default="true" >
|
||||
#define RT_USING_DFS
|
||||
// <bool name="DFS_USING_WORKDIR" description="Using working directory" default="true" />
|
||||
#define DFS_USING_WORKDIR
|
||||
// <integer name="DFS_FILESYSTEMS_MAX" description="The maximal number of mounted file system" default="4" />
|
||||
#define DFS_FILESYSTEMS_MAX 2
|
||||
// <integer name="DFS_FD_MAX" description="The maximal number of opened files" default="4" />
|
||||
#define DFS_FD_MAX 4
|
||||
// <bool name="RT_USING_DFS_ELMFAT" description="Using ELM FatFs" default="true" />
|
||||
#define RT_USING_DFS_ELMFAT
|
||||
// <integer name="RT_DFS_ELM_USE_LFN" description="Support long file name" default="0">
|
||||
// <item description="LFN1">1</item>
|
||||
// <item description="LFN1">2</item>
|
||||
// </integer>
|
||||
#define RT_DFS_ELM_USE_LFN 1
|
||||
// <integer name="RT_DFS_ELM_CODE_PAGE" description="OEM code page" default="936">
|
||||
#define RT_DFS_ELM_CODE_PAGE 936
|
||||
// <bool name="RT_DFS_ELM_CODE_PAGE_FILE" description="Using OEM code page file" default="false" />
|
||||
// #define RT_DFS_ELM_CODE_PAGE_FILE
|
||||
// <integer name="RT_DFS_ELM_MAX_LFN" description="Maximal size of file name length" default="256" />
|
||||
#define RT_DFS_ELM_MAX_LFN 256
|
||||
// <bool name="RT_USING_DFS_YAFFS2" description="Using YAFFS2" default="false" />
|
||||
// #define RT_USING_DFS_YAFFS2
|
||||
// <bool name="RT_USING_DFS_UFFS" description="Using UFFS" default="false" />
|
||||
// #define RT_USING_DFS_UFFS
|
||||
// <bool name="RT_USING_DFS_DEVFS" description="Using devfs for device objects" default="true" />
|
||||
#define RT_USING_DFS_DEVFS
|
||||
// <bool name="RT_USING_DFS_NFS" description="Using NFS v3 client file system" default="false" />
|
||||
// #define RT_USING_DFS_NFS
|
||||
// <string name="RT_NFS_HOST_EXPORT" description="NFSv3 host export" default="192.168.1.5:/" />
|
||||
#define RT_NFS_HOST_EXPORT "192.168.1.5:/"
|
||||
// </section>
|
||||
|
||||
// <section name="RT_USING_LWIP" description="lwip, a lightweight TCP/IP protocol stack" default="true" >
|
||||
#define RT_USING_LWIP
|
||||
// <bool name="RT_LWIP_USING_RT_MEM" description="Using RT-Thread memory management for LwIP" default="true" />
|
||||
#define RT_LWIP_USING_RT_MEM
|
||||
// <bool name="RT_LWIP_ICMP" description="Enable ICMP protocol" default="true" />
|
||||
#define RT_LWIP_ICMP
|
||||
// <bool name="RT_LWIP_IGMP" description="Enable IGMP protocol" default="false" />
|
||||
// #define RT_LWIP_IGMP
|
||||
// <bool name="RT_LWIP_UDP" description="Enable UDP protocol" default="true" />
|
||||
#define RT_LWIP_UDP
|
||||
// <bool name="RT_LWIP_TCP" description="Enable TCP protocol" default="true" />
|
||||
#define RT_LWIP_TCP
|
||||
// <bool name="RT_LWIP_DNS" description="Enable DNS protocol" default="true" />
|
||||
#define RT_LWIP_DNS
|
||||
// <integer name="RT_LWIP_TCP_PCB_NUM" description="Maximal number of simultaneously active TCP connections" default="5" />
|
||||
#define RT_LWIP_TCP_PCB_NUM 5
|
||||
// <integer name="RT_LWIP_TCP_SND_BUF" description="TCP sender buffer size" default="8192" />
|
||||
#define RT_LWIP_TCP_SND_BUF 8192
|
||||
// <integer name="RT_LWIP_TCP_WND" description="TCP receive window" default="8192" />
|
||||
#define RT_LWIP_TCP_WND 8192
|
||||
// <bool name="RT_LWIP_SNMP" description="Enable SNMP protocol" default="false" />
|
||||
// #define RT_LWIP_SNMP
|
||||
// <bool name="RT_LWIP_DHCP" description="Enable DHCP client to get IP address" default="false" />
|
||||
// #define RT_LWIP_DHCP
|
||||
// <integer name="RT_LWIP_TCP_SEG_NUM" description="the number of simultaneously queued TCP" default="8" />
|
||||
#define RT_LWIP_TCP_SEG_NUM 40
|
||||
// <integer name="RT_LWIP_TCPTHREAD_PRIORITY" description="the thread priority of TCP thread" default="128" />
|
||||
#define RT_LWIP_TCPTHREAD_PRIORITY 12
|
||||
// <integer name="RT_LWIP_TCPTHREAD_MBOX_SIZE" description="the mail box size of TCP thread to wait for" default="32" />
|
||||
#define RT_LWIP_TCPTHREAD_MBOX_SIZE 32
|
||||
// <integer name="RT_LWIP_TCPTHREAD_STACKSIZE" description="the thread stack size of TCP thread" default="4096" />
|
||||
#define RT_LWIP_TCPTHREAD_STACKSIZE 4096
|
||||
// <integer name="RT_LWIP_ETHTHREAD_PRIORITY" description="the thread priority of ethnetif thread" default="144" />
|
||||
#define RT_LWIP_ETHTHREAD_PRIORITY 144
|
||||
// <integer name="RT_LWIP_ETHTHREAD_MBOX_SIZE" description="the mail box size of ethnetif thread to wait for" default="8" />
|
||||
#define RT_LWIP_ETHTHREAD_MBOX_SIZE 32
|
||||
// <integer name="RT_LWIP_ETHTHREAD_STACKSIZE" description="the stack size of ethnetif thread" default="512" />
|
||||
#define RT_LWIP_ETHTHREAD_STACKSIZE 512
|
||||
// <ipaddr name="RT_LWIP_IPADDR" description="IP address of device" default="192.168.1.30" />
|
||||
#define RT_LWIP_IPADDR0 192
|
||||
#define RT_LWIP_IPADDR1 168
|
||||
#define RT_LWIP_IPADDR2 1
|
||||
#define RT_LWIP_IPADDR3 30
|
||||
// <ipaddr name="RT_LWIP_GWADDR" description="Gateway address of device" default="192.168.1.1" />
|
||||
#define RT_LWIP_GWADDR0 192
|
||||
#define RT_LWIP_GWADDR1 168
|
||||
#define RT_LWIP_GWADDR2 1
|
||||
#define RT_LWIP_GWADDR3 1
|
||||
// <ipaddr name="RT_LWIP_MSKADDR" description="Mask address of device" default="255.255.255.0" />
|
||||
#define RT_LWIP_MSKADDR0 255
|
||||
#define RT_LWIP_MSKADDR1 255
|
||||
#define RT_LWIP_MSKADDR2 255
|
||||
#define RT_LWIP_MSKADDR3 0
|
||||
// </section>
|
||||
|
||||
// <section name="RT_USING_MODULE" description="Application module" default="true" >
|
||||
#define RT_USING_MODULE
|
||||
// <bool name="RT_USING_LIBDL" description="Using dynamic library" default="true" />
|
||||
#define RT_USING_LIBDL
|
||||
// </section>
|
||||
|
||||
// <section name="RT_USING_RTGUI" description="RTGUI, a graphic user interface" default="true" >
|
||||
#define RT_USING_RTGUI
|
||||
// <integer name="RTGUI_NAME_MAX" description="Maximal size of RTGUI object name length" default="16" />
|
||||
#define RTGUI_NAME_MAX 16
|
||||
// <bool name="RTGUI_USING_FONT16" description="Support 16 weight font" default="true" />
|
||||
#define RTGUI_USING_FONT16
|
||||
// <bool name="RTGUI_USING_FONT12" description="Support 12 weight font" default="true" />
|
||||
#define RTGUI_USING_FONT12
|
||||
// <bool name="RTGUI_USING_FONTHZ" description="Support Chinese font" default="true" />
|
||||
#define RTGUI_USING_FONTHZ
|
||||
// <bool name="RTGUI_USING_DFS_FILERW" description="Using DFS as file interface " default="true" />
|
||||
#define RTGUI_USING_DFS_FILERW
|
||||
// <bool name="RTGUI_USING_HZ_FILE" description="Using font file as Chinese font" default="false" />
|
||||
// #define RTGUI_USING_HZ_FILE
|
||||
// <bool name="RTGUI_USING_HZ_BMP" description="Using Chinese bitmap font" default="true" />
|
||||
#define RTGUI_USING_HZ_BMP
|
||||
// <bool name="RTGUI_USING_SMALL_SIZE" description="Using small size in RTGUI" default="false" />
|
||||
// #define RTGUI_USING_SMALL_SIZE
|
||||
// <bool name="RTGUI_USING_MOUSE_CURSOR" description="Using mouse cursor in RTGUI" default="false" />
|
||||
// #define RTGUI_USING_MOUSE_CURSOR
|
||||
// <bool name="RTGUI_IMAGE_XPM" description="Using xpm image in RTGUI" default="true" />
|
||||
#define RTGUI_IMAGE_XPM
|
||||
// <bool name="RTGUI_IMAGE_JPEG" description="Using jpeg image in RTGUI" default="true" />
|
||||
#define RTGUI_IMAGE_JPEG
|
||||
// <bool name="RTGUI_IMAGE_PNG" description="Using png image in RTGUI" default="true" />
|
||||
#define RTGUI_IMAGE_PNG
|
||||
// <bool name="RTGUI_IMAGE_BMP" description="Using bmp image in RTGUI" default="true" />
|
||||
#define RTGUI_IMAGE_BMP
|
||||
// </section>
|
||||
|
||||
// </RDTConfigurator>
|
||||
|
||||
/* SECTION: FTK support */
|
||||
/* using FTK support */
|
||||
/* #define RT_USING_FTK */
|
||||
|
||||
/*
|
||||
* Note on FTK:
|
||||
*
|
||||
* FTK depends :
|
||||
* #define RT_USING_NEWLIB
|
||||
* #define DFS_USING_WORKDIR
|
||||
*
|
||||
* And the maximal length must great than 64
|
||||
* #define RT_DFS_ELM_MAX_LFN 128
|
||||
*/
|
||||
|
||||
#endif
|
||||
/* RT-Thread config file */
|
||||
#ifndef __RTTHREAD_CFG_H__
|
||||
#define __RTTHREAD_CFG_H__
|
||||
|
||||
// <RDTConfigurator URL="http://www.rt-thread.com/eclipse">
|
||||
|
||||
// <integer name="RT_NAME_MAX" description="Maximal size of kernel object name length" default="6" />
|
||||
#define RT_NAME_MAX 32
|
||||
// <integer name="RT_ALIGN_SIZE" description="Alignment size for CPU architecture data access" default="4" />
|
||||
#define RT_ALIGN_SIZE 4
|
||||
// <integer name="RT_THREAD_PRIORITY_MAX" description="Maximal level of thread priority" default="32">
|
||||
// <item description="8">8</item>
|
||||
// <item description="32">32</item>
|
||||
// <item description="256">256</item>
|
||||
// </integer>
|
||||
#define RT_THREAD_PRIORITY_MAX 256
|
||||
// <integer name="RT_TICK_PER_SECOND" description="OS tick per second" default="100" />
|
||||
#define RT_TICK_PER_SECOND 100
|
||||
// <section name="RT_DEBUG" description="Kernel Debug Configuration" default="true" >
|
||||
// #define RT_DEBUG
|
||||
// <bool name="RT_THREAD_DEBUG" description="Thread debug enable" default="false" />
|
||||
// #define RT_THREAD_DEBUG
|
||||
// <bool name="RT_USING_OVERFLOW_CHECK" description="Thread stack over flow detect" default="true" />
|
||||
#define RT_USING_OVERFLOW_CHECK
|
||||
// </section>
|
||||
|
||||
// <bool name="RT_USING_HOOK" description="Using hook functions" default="true" />
|
||||
#define RT_USING_HOOK
|
||||
// <section name="RT_USING_TIMER_SOFT" description="Using software timer which will start a thread to handle soft-timer" default="true" >
|
||||
// #define RT_USING_TIMER_SOFT
|
||||
// <integer name="RT_TIMER_THREAD_PRIO" description="The priority level of timer thread" default="4" />
|
||||
#define RT_TIMER_THREAD_PRIO 8
|
||||
// <integer name="RT_TIMER_THREAD_STACK_SIZE" description="The stack size of timer thread" default="512" />
|
||||
#define RT_TIMER_THREAD_STACK_SIZE 512
|
||||
// <integer name="RT_TIMER_TICK_PER_SECOND" description="The soft-timer tick per second" default="10" />
|
||||
#define RT_TIMER_TICK_PER_SECOND 10
|
||||
// </section>
|
||||
|
||||
// <section name="IPC" description="Inter-Thread communication" default="always" >
|
||||
// <bool name="RT_USING_SEMAPHORE" description="Using semaphore in the system" default="true" />
|
||||
#define RT_USING_SEMAPHORE
|
||||
// <bool name="RT_USING_MUTEX" description="Using mutex in the system" default="true" />
|
||||
#define RT_USING_MUTEX
|
||||
// <bool name="RT_USING_EVENT" description="Using event group in the system" default="true" />
|
||||
#define RT_USING_EVENT
|
||||
// <bool name="RT_USING_MAILBOX" description="Using mailbox in the system" default="true" />
|
||||
#define RT_USING_MAILBOX
|
||||
// <bool name="RT_USING_MESSAGEQUEUE" description="Using message queue in the system" default="true" />
|
||||
#define RT_USING_MESSAGEQUEUE
|
||||
// </section>
|
||||
|
||||
// <section name="MM" description="Memory Management" default="always" >
|
||||
// <bool name="RT_USING_MEMPOOL" description="Using Memory Pool Management in the system" default="true" />
|
||||
#define RT_USING_MEMPOOL
|
||||
// <bool name="RT_USING_HEAP" description="Using Dynamic Heap Management in the system" default="true" />
|
||||
#define RT_USING_HEAP
|
||||
// <bool name="RT_USING_SMALL_MEM" description="Optimizing for small memory" default="false" />
|
||||
#define RT_USING_SMALL_MEM
|
||||
// <bool name="RT_USING_SLAB" description="Using SLAB memory management for large memory" default="false" />
|
||||
// #define RT_USING_SLAB
|
||||
// </section>
|
||||
|
||||
// <section name="RT_USING_DEVICE" description="Using Device Driver Framework" default="true" >
|
||||
#define RT_USING_DEVICE
|
||||
// <bool name="RT_USING_UART0" description="Using UART0" default="true" />
|
||||
#define RT_USING_UART0
|
||||
// <integer name="RT_UART_RX_BUFFER_SIZE" description="The buffer size for UART reception" default="64" />
|
||||
#define RT_UART_RX_BUFFER_SIZE 64
|
||||
// </section>
|
||||
|
||||
// <section name="RT_USING_CONSOLE" description="Using console" default="true" >
|
||||
#define RT_USING_CONSOLE
|
||||
// <integer name="RT_CONSOLEBUF_SIZE" description="The buffer size for console output" default="128" />
|
||||
#define RT_CONSOLEBUF_SIZE 128
|
||||
// </section>
|
||||
|
||||
// <section name="RT_USING_FINSH" description="Using finsh as shell, which is a C-Express shell" default="true" >
|
||||
#define RT_USING_FINSH
|
||||
// <bool name="FINSH_USING_SYMTAB" description="Using symbol table in finsh shell" default="true" />
|
||||
#define FINSH_USING_SYMTAB
|
||||
// <bool name="FINSH_USING_DESCRIPTION" description="Keeping description in symbol table" default="true" />
|
||||
#define FINSH_USING_DESCRIPTION
|
||||
// <integer name="FINSH_THREAD_STACK_SIZE" description="The stack size for finsh thread" default="4096" />
|
||||
#define FINSH_THREAD_STACK_SIZE 4096
|
||||
// </section>
|
||||
|
||||
// <section name="LIBC" description="C Runtime library setting" default="always" >
|
||||
// <bool name="RT_USING_NEWLIB" description="Using newlib library, only available under GNU GCC" default="true" />
|
||||
#define RT_USING_NEWLIB
|
||||
// <bool name="RT_USING_PTHREADS" description="Using POSIX threads library" default="true" />
|
||||
#define RT_USING_PTHREADS
|
||||
// </section>
|
||||
|
||||
// <section name="RT_USING_DFS" description="Device file system" default="true" >
|
||||
#define RT_USING_DFS
|
||||
// <bool name="DFS_USING_WORKDIR" description="Using working directory" default="true" />
|
||||
#define DFS_USING_WORKDIR
|
||||
// <integer name="DFS_FILESYSTEMS_MAX" description="The maximal number of mounted file system" default="4" />
|
||||
#define DFS_FILESYSTEMS_MAX 2
|
||||
// <integer name="DFS_FD_MAX" description="The maximal number of opened files" default="4" />
|
||||
#define DFS_FD_MAX 4
|
||||
// <bool name="RT_USING_DFS_ELMFAT" description="Using ELM FatFs" default="true" />
|
||||
#define RT_USING_DFS_ELMFAT
|
||||
// <integer name="RT_DFS_ELM_USE_LFN" description="Support long file name" default="0">
|
||||
// <item description="LFN1">1</item>
|
||||
// <item description="LFN1">2</item>
|
||||
// </integer>
|
||||
#define RT_DFS_ELM_USE_LFN 1
|
||||
// <integer name="RT_DFS_ELM_CODE_PAGE" description="OEM code page" default="936">
|
||||
#define RT_DFS_ELM_CODE_PAGE 936
|
||||
// <bool name="RT_DFS_ELM_CODE_PAGE_FILE" description="Using OEM code page file" default="false" />
|
||||
// #define RT_DFS_ELM_CODE_PAGE_FILE
|
||||
// <integer name="RT_DFS_ELM_MAX_LFN" description="Maximal size of file name length" default="256" />
|
||||
#define RT_DFS_ELM_MAX_LFN 256
|
||||
// <bool name="RT_USING_DFS_YAFFS2" description="Using YAFFS2" default="false" />
|
||||
// #define RT_USING_DFS_YAFFS2
|
||||
// <bool name="RT_USING_DFS_UFFS" description="Using UFFS" default="false" />
|
||||
// #define RT_USING_DFS_UFFS
|
||||
// <bool name="RT_USING_DFS_DEVFS" description="Using devfs for device objects" default="true" />
|
||||
#define RT_USING_DFS_DEVFS
|
||||
// <bool name="RT_USING_DFS_NFS" description="Using NFS v3 client file system" default="false" />
|
||||
// #define RT_USING_DFS_NFS
|
||||
// <string name="RT_NFS_HOST_EXPORT" description="NFSv3 host export" default="192.168.1.5:/" />
|
||||
#define RT_NFS_HOST_EXPORT "192.168.1.5:/"
|
||||
// </section>
|
||||
|
||||
// <section name="RT_USING_LWIP" description="lwip, a lightweight TCP/IP protocol stack" default="true" >
|
||||
#define RT_USING_LWIP
|
||||
// <bool name="RT_LWIP_USING_RT_MEM" description="Using RT-Thread memory management for LwIP" default="true" />
|
||||
#define RT_LWIP_USING_RT_MEM
|
||||
// <bool name="RT_LWIP_ICMP" description="Enable ICMP protocol" default="true" />
|
||||
#define RT_LWIP_ICMP
|
||||
// <bool name="RT_LWIP_IGMP" description="Enable IGMP protocol" default="false" />
|
||||
// #define RT_LWIP_IGMP
|
||||
// <bool name="RT_LWIP_UDP" description="Enable UDP protocol" default="true" />
|
||||
#define RT_LWIP_UDP
|
||||
// <bool name="RT_LWIP_TCP" description="Enable TCP protocol" default="true" />
|
||||
#define RT_LWIP_TCP
|
||||
// <bool name="RT_LWIP_DNS" description="Enable DNS protocol" default="true" />
|
||||
#define RT_LWIP_DNS
|
||||
// <integer name="RT_LWIP_TCP_PCB_NUM" description="Maximal number of simultaneously active TCP connections" default="5" />
|
||||
#define RT_LWIP_TCP_PCB_NUM 5
|
||||
// <integer name="RT_LWIP_TCP_SND_BUF" description="TCP sender buffer size" default="8192" />
|
||||
#define RT_LWIP_TCP_SND_BUF 8192
|
||||
// <integer name="RT_LWIP_TCP_WND" description="TCP receive window" default="8192" />
|
||||
#define RT_LWIP_TCP_WND 8192
|
||||
// <bool name="RT_LWIP_SNMP" description="Enable SNMP protocol" default="false" />
|
||||
// #define RT_LWIP_SNMP
|
||||
// <bool name="RT_LWIP_DHCP" description="Enable DHCP client to get IP address" default="false" />
|
||||
// #define RT_LWIP_DHCP
|
||||
// <integer name="RT_LWIP_TCP_SEG_NUM" description="the number of simultaneously queued TCP" default="8" />
|
||||
#define RT_LWIP_TCP_SEG_NUM 40
|
||||
// <integer name="RT_LWIP_TCPTHREAD_PRIORITY" description="the thread priority of TCP thread" default="128" />
|
||||
#define RT_LWIP_TCPTHREAD_PRIORITY 12
|
||||
// <integer name="RT_LWIP_TCPTHREAD_MBOX_SIZE" description="the mail box size of TCP thread to wait for" default="32" />
|
||||
#define RT_LWIP_TCPTHREAD_MBOX_SIZE 32
|
||||
// <integer name="RT_LWIP_TCPTHREAD_STACKSIZE" description="the thread stack size of TCP thread" default="4096" />
|
||||
#define RT_LWIP_TCPTHREAD_STACKSIZE 4096
|
||||
// <integer name="RT_LWIP_ETHTHREAD_PRIORITY" description="the thread priority of ethnetif thread" default="144" />
|
||||
#define RT_LWIP_ETHTHREAD_PRIORITY 144
|
||||
// <integer name="RT_LWIP_ETHTHREAD_MBOX_SIZE" description="the mail box size of ethnetif thread to wait for" default="8" />
|
||||
#define RT_LWIP_ETHTHREAD_MBOX_SIZE 32
|
||||
// <integer name="RT_LWIP_ETHTHREAD_STACKSIZE" description="the stack size of ethnetif thread" default="512" />
|
||||
#define RT_LWIP_ETHTHREAD_STACKSIZE 512
|
||||
// <ipaddr name="RT_LWIP_IPADDR" description="IP address of device" default="192.168.1.30" />
|
||||
#define RT_LWIP_IPADDR0 192
|
||||
#define RT_LWIP_IPADDR1 168
|
||||
#define RT_LWIP_IPADDR2 1
|
||||
#define RT_LWIP_IPADDR3 30
|
||||
// <ipaddr name="RT_LWIP_GWADDR" description="Gateway address of device" default="192.168.1.1" />
|
||||
#define RT_LWIP_GWADDR0 192
|
||||
#define RT_LWIP_GWADDR1 168
|
||||
#define RT_LWIP_GWADDR2 1
|
||||
#define RT_LWIP_GWADDR3 1
|
||||
// <ipaddr name="RT_LWIP_MSKADDR" description="Mask address of device" default="255.255.255.0" />
|
||||
#define RT_LWIP_MSKADDR0 255
|
||||
#define RT_LWIP_MSKADDR1 255
|
||||
#define RT_LWIP_MSKADDR2 255
|
||||
#define RT_LWIP_MSKADDR3 0
|
||||
// </section>
|
||||
|
||||
// <section name="RT_USING_MODULE" description="Application module" default="true" >
|
||||
#define RT_USING_MODULE
|
||||
// <bool name="RT_USING_LIBDL" description="Using dynamic library" default="true" />
|
||||
#define RT_USING_LIBDL
|
||||
// </section>
|
||||
|
||||
// <section name="RT_USING_RTGUI" description="RTGUI, a graphic user interface" default="true" >
|
||||
#define RT_USING_RTGUI
|
||||
// <integer name="RTGUI_NAME_MAX" description="Maximal size of RTGUI object name length" default="16" />
|
||||
#define RTGUI_NAME_MAX 16
|
||||
// <bool name="RTGUI_USING_FONT16" description="Support 16 weight font" default="true" />
|
||||
#define RTGUI_USING_FONT16
|
||||
// <bool name="RTGUI_USING_FONT12" description="Support 12 weight font" default="true" />
|
||||
#define RTGUI_USING_FONT12
|
||||
// <bool name="RTGUI_USING_FONTHZ" description="Support Chinese font" default="true" />
|
||||
#define RTGUI_USING_FONTHZ
|
||||
// <bool name="RTGUI_USING_DFS_FILERW" description="Using DFS as file interface " default="true" />
|
||||
#define RTGUI_USING_DFS_FILERW
|
||||
// <bool name="RTGUI_USING_HZ_FILE" description="Using font file as Chinese font" default="false" />
|
||||
// #define RTGUI_USING_HZ_FILE
|
||||
// <bool name="RTGUI_USING_HZ_BMP" description="Using Chinese bitmap font" default="true" />
|
||||
#define RTGUI_USING_HZ_BMP
|
||||
// <bool name="RTGUI_USING_SMALL_SIZE" description="Using small size in RTGUI" default="false" />
|
||||
// #define RTGUI_USING_SMALL_SIZE
|
||||
// <bool name="RTGUI_USING_MOUSE_CURSOR" description="Using mouse cursor in RTGUI" default="false" />
|
||||
// #define RTGUI_USING_MOUSE_CURSOR
|
||||
// <bool name="RTGUI_IMAGE_XPM" description="Using xpm image in RTGUI" default="true" />
|
||||
#define RTGUI_IMAGE_XPM
|
||||
// <bool name="RTGUI_IMAGE_JPEG" description="Using jpeg image in RTGUI" default="true" />
|
||||
#define RTGUI_IMAGE_JPEG
|
||||
// <bool name="RTGUI_IMAGE_PNG" description="Using png image in RTGUI" default="true" />
|
||||
#define RTGUI_IMAGE_PNG
|
||||
// <bool name="RTGUI_IMAGE_BMP" description="Using bmp image in RTGUI" default="true" />
|
||||
#define RTGUI_IMAGE_BMP
|
||||
// </section>
|
||||
|
||||
// </RDTConfigurator>
|
||||
|
||||
/* SECTION: FTK support */
|
||||
/* using FTK support */
|
||||
/* #define RT_USING_FTK */
|
||||
|
||||
/*
|
||||
* Note on FTK:
|
||||
*
|
||||
* FTK depends :
|
||||
* #define RT_USING_NEWLIB
|
||||
* #define DFS_USING_WORKDIR
|
||||
*
|
||||
* And the maximal length must great than 64
|
||||
* #define RT_DFS_ELM_MAX_LFN 128
|
||||
*/
|
||||
|
||||
#endif
|
||||
|
||||
+99
-99
@@ -1,99 +1,99 @@
|
||||
import os
|
||||
|
||||
# panel options
|
||||
# 'PNL_A70','PNL_N35', 'PNL_T35' , 'PNL_X35'
|
||||
RT_USING_LCD_TYPE = 'PNL_T35'
|
||||
|
||||
# toolchains options
|
||||
ARCH = 'arm'
|
||||
CPU = 's3c24x0'
|
||||
TextBase = '0x30000000'
|
||||
|
||||
CROSS_TOOL = 'gcc'
|
||||
|
||||
if os.getenv('RTT_CC'):
|
||||
CROSS_TOOL = os.getenv('RTT_CC')
|
||||
|
||||
if CROSS_TOOL == 'gcc':
|
||||
PLATFORM = 'gcc'
|
||||
EXEC_PATH = 'C:/Program Files/CodeSourcery/Sourcery G++ Lite/bin'
|
||||
elif CROSS_TOOL == 'keil':
|
||||
PLATFORM = 'armcc'
|
||||
EXEC_PATH = 'C:/Keil'
|
||||
elif CROSS_TOOL == 'iar':
|
||||
print '================ERROR============================'
|
||||
print 'Not support iar yet!'
|
||||
print '================================================='
|
||||
exit(0)
|
||||
|
||||
if os.getenv('RTT_EXEC_PATH'):
|
||||
EXEC_PATH = os.getenv('RTT_EXEC_PATH')
|
||||
|
||||
BUILD = 'debug'
|
||||
|
||||
if PLATFORM == 'gcc':
|
||||
# toolchains
|
||||
PREFIX = 'arm-none-eabi-'
|
||||
CC = PREFIX + 'gcc'
|
||||
CXX = PREFIX + 'g++'
|
||||
AS = PREFIX + 'gcc'
|
||||
AR = PREFIX + 'ar'
|
||||
LINK = PREFIX + 'gcc'
|
||||
TARGET_EXT = 'axf'
|
||||
SIZE = PREFIX + 'size'
|
||||
OBJDUMP = PREFIX + 'objdump'
|
||||
OBJCPY = PREFIX + 'objcopy'
|
||||
|
||||
DEVICE = ' -mcpu=arm920t'
|
||||
CFLAGS = DEVICE
|
||||
AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp' + ' -DTEXT_BASE=' + TextBase
|
||||
LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=rtthread_mini2440.map,-cref,-u,_start -T mini2440_ram.ld' + ' -Ttext ' + TextBase
|
||||
|
||||
CPATH = ''
|
||||
LPATH = ''
|
||||
|
||||
if BUILD == 'debug':
|
||||
CFLAGS += ' -O0 -gstabs+'
|
||||
AFLAGS += ' -gstabs+'
|
||||
else:
|
||||
CFLAGS += ' -O2'
|
||||
|
||||
POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n'
|
||||
|
||||
elif PLATFORM == 'armcc':
|
||||
# toolchains
|
||||
CC = 'armcc'
|
||||
CXX = 'armcc'
|
||||
AS = 'armasm'
|
||||
AR = 'armar'
|
||||
LINK = 'armlink'
|
||||
TARGET_EXT = 'axf'
|
||||
|
||||
DEVICE = ' --device DARMSS9'
|
||||
CFLAGS = DEVICE + ' --apcs=interwork --diag_suppress=870'
|
||||
AFLAGS = DEVICE
|
||||
LFLAGS = DEVICE + ' --strict --info sizes --info totals --info unused --info veneers --list rtthread-mini2440.map --ro-base 0x30000000 --entry Entry_Point --first Entry_Point'
|
||||
|
||||
CFLAGS += ' -I"' + EXEC_PATH + '/ARM/RV31/INC"'
|
||||
LFLAGS += ' --libpath "' + EXEC_PATH + '/ARM/RV31/LIB"'
|
||||
|
||||
EXEC_PATH += '/arm/bin40/'
|
||||
|
||||
if BUILD == 'debug':
|
||||
CFLAGS += ' -g -O0'
|
||||
AFLAGS += ' -g'
|
||||
else:
|
||||
CFLAGS += ' -O2'
|
||||
|
||||
POST_ACTION = 'fromelf --bin $TARGET --output rtthread.bin \nfromelf -z $TARGET'
|
||||
|
||||
elif PLATFORM == 'iar':
|
||||
# toolchains
|
||||
CC = 'armcc'
|
||||
AS = 'armasm'
|
||||
AR = 'armar'
|
||||
LINK = 'armlink'
|
||||
|
||||
CFLAGS = ''
|
||||
AFLAGS = ''
|
||||
LFLAGS = ''
|
||||
import os
|
||||
|
||||
# panel options
|
||||
# 'PNL_A70','PNL_N35', 'PNL_T35' , 'PNL_X35'
|
||||
RT_USING_LCD_TYPE = 'PNL_T35'
|
||||
|
||||
# toolchains options
|
||||
ARCH = 'arm'
|
||||
CPU = 's3c24x0'
|
||||
TextBase = '0x30000000'
|
||||
|
||||
CROSS_TOOL = 'gcc'
|
||||
|
||||
if os.getenv('RTT_CC'):
|
||||
CROSS_TOOL = os.getenv('RTT_CC')
|
||||
|
||||
if CROSS_TOOL == 'gcc':
|
||||
PLATFORM = 'gcc'
|
||||
EXEC_PATH = 'C:/Program Files/CodeSourcery/Sourcery G++ Lite/bin'
|
||||
elif CROSS_TOOL == 'keil':
|
||||
PLATFORM = 'armcc'
|
||||
EXEC_PATH = 'C:/Keil'
|
||||
elif CROSS_TOOL == 'iar':
|
||||
print '================ERROR============================'
|
||||
print 'Not support iar yet!'
|
||||
print '================================================='
|
||||
exit(0)
|
||||
|
||||
if os.getenv('RTT_EXEC_PATH'):
|
||||
EXEC_PATH = os.getenv('RTT_EXEC_PATH')
|
||||
|
||||
BUILD = 'debug'
|
||||
|
||||
if PLATFORM == 'gcc':
|
||||
# toolchains
|
||||
PREFIX = 'arm-none-eabi-'
|
||||
CC = PREFIX + 'gcc'
|
||||
CXX = PREFIX + 'g++'
|
||||
AS = PREFIX + 'gcc'
|
||||
AR = PREFIX + 'ar'
|
||||
LINK = PREFIX + 'gcc'
|
||||
TARGET_EXT = 'axf'
|
||||
SIZE = PREFIX + 'size'
|
||||
OBJDUMP = PREFIX + 'objdump'
|
||||
OBJCPY = PREFIX + 'objcopy'
|
||||
|
||||
DEVICE = ' -mcpu=arm920t'
|
||||
CFLAGS = DEVICE
|
||||
AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp' + ' -DTEXT_BASE=' + TextBase
|
||||
LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=rtthread_mini2440.map,-cref,-u,_start -T mini2440_ram.ld' + ' -Ttext ' + TextBase
|
||||
|
||||
CPATH = ''
|
||||
LPATH = ''
|
||||
|
||||
if BUILD == 'debug':
|
||||
CFLAGS += ' -O0 -gstabs+'
|
||||
AFLAGS += ' -gstabs+'
|
||||
else:
|
||||
CFLAGS += ' -O2'
|
||||
|
||||
POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n'
|
||||
|
||||
elif PLATFORM == 'armcc':
|
||||
# toolchains
|
||||
CC = 'armcc'
|
||||
CXX = 'armcc'
|
||||
AS = 'armasm'
|
||||
AR = 'armar'
|
||||
LINK = 'armlink'
|
||||
TARGET_EXT = 'axf'
|
||||
|
||||
DEVICE = ' --device DARMSS9'
|
||||
CFLAGS = DEVICE + ' --apcs=interwork --diag_suppress=870'
|
||||
AFLAGS = DEVICE
|
||||
LFLAGS = DEVICE + ' --strict --info sizes --info totals --info unused --info veneers --list rtthread-mini2440.map --ro-base 0x30000000 --entry Entry_Point --first Entry_Point'
|
||||
|
||||
CFLAGS += ' -I"' + EXEC_PATH + '/ARM/RV31/INC"'
|
||||
LFLAGS += ' --libpath "' + EXEC_PATH + '/ARM/RV31/LIB"'
|
||||
|
||||
EXEC_PATH += '/arm/bin40/'
|
||||
|
||||
if BUILD == 'debug':
|
||||
CFLAGS += ' -g -O0'
|
||||
AFLAGS += ' -g'
|
||||
else:
|
||||
CFLAGS += ' -O2'
|
||||
|
||||
POST_ACTION = 'fromelf --bin $TARGET --output rtthread.bin \nfromelf -z $TARGET'
|
||||
|
||||
elif PLATFORM == 'iar':
|
||||
# toolchains
|
||||
CC = 'armcc'
|
||||
AS = 'armasm'
|
||||
AR = 'armar'
|
||||
LINK = 'armlink'
|
||||
|
||||
CFLAGS = ''
|
||||
AFLAGS = ''
|
||||
LFLAGS = ''
|
||||
|
||||
+11
-11
@@ -1,11 +1,11 @@
|
||||
#ifndef __SDCARD_H
|
||||
#define __SDCARD_H
|
||||
|
||||
#include <s3c24x0.h>
|
||||
|
||||
#define INICLK 300000
|
||||
#define SDCLK 24000000 //PCLK=49.392MHz
|
||||
#define MMCCLK 15000000 //PCLK=49.392MHz
|
||||
|
||||
#endif
|
||||
|
||||
#ifndef __SDCARD_H
|
||||
#define __SDCARD_H
|
||||
|
||||
#include <s3c24x0.h>
|
||||
|
||||
#define INICLK 300000
|
||||
#define SDCLK 24000000 //PCLK=49.392MHz
|
||||
#define MMCCLK 15000000 //PCLK=49.392MHz
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
+496
-496
File diff suppressed because it is too large
Load Diff
+32
-32
@@ -1,32 +1,32 @@
|
||||
#ifndef __TOUCH_H__
|
||||
#define __TOUCH_H__
|
||||
|
||||
#include <rtthread.h>
|
||||
|
||||
#define RT_TOUCH_NORMAL 0
|
||||
#define RT_TOUCH_CALIBRATION_DATA 1
|
||||
#define RT_TOUCH_CALIBRATION 2
|
||||
#define RT_TOUCH_EVENTPOST 3
|
||||
#define RT_TOUCH_EVENTPOST_PARAM 4
|
||||
|
||||
struct calibration_data
|
||||
{
|
||||
rt_uint16_t min_x, max_x;
|
||||
rt_uint16_t min_y, max_y;
|
||||
};
|
||||
|
||||
struct rt_touch_event
|
||||
{
|
||||
rt_uint16_t x;
|
||||
rt_uint16_t y;
|
||||
int pressed;
|
||||
};
|
||||
|
||||
typedef void (*rt_touch_calibration_func_t)(rt_uint16_t x, rt_uint16_t y);
|
||||
|
||||
typedef void (*rt_touch_eventpost_func_t)(void *, struct rt_touch_event *);
|
||||
|
||||
void rtgui_touch_hw_init(void);
|
||||
|
||||
#endif
|
||||
|
||||
#ifndef __TOUCH_H__
|
||||
#define __TOUCH_H__
|
||||
|
||||
#include <rtthread.h>
|
||||
|
||||
#define RT_TOUCH_NORMAL 0
|
||||
#define RT_TOUCH_CALIBRATION_DATA 1
|
||||
#define RT_TOUCH_CALIBRATION 2
|
||||
#define RT_TOUCH_EVENTPOST 3
|
||||
#define RT_TOUCH_EVENTPOST_PARAM 4
|
||||
|
||||
struct calibration_data
|
||||
{
|
||||
rt_uint16_t min_x, max_x;
|
||||
rt_uint16_t min_y, max_y;
|
||||
};
|
||||
|
||||
struct rt_touch_event
|
||||
{
|
||||
rt_uint16_t x;
|
||||
rt_uint16_t y;
|
||||
int pressed;
|
||||
};
|
||||
|
||||
typedef void (*rt_touch_calibration_func_t)(rt_uint16_t x, rt_uint16_t y);
|
||||
|
||||
typedef void (*rt_touch_eventpost_func_t)(void *, struct rt_touch_event *);
|
||||
|
||||
void rtgui_touch_hw_init(void);
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
Reference in New Issue
Block a user