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fix bug in rt_hw_context_switch_interrupt_do

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save sp to old thread
	clear rt_thread_switch_interrupt_flag
always enable interrupt after rt_hw_context_switch
judeg the type of interrupt in trap_entry, then call handler(Machine timer interrupt of Machine external interrupt)
This commit is contained in:
zhangjun
2017-07-30 19:46:28 +08:00
parent 2d56a27c20
commit b032dff161
6 changed files with 132 additions and 128 deletions
Download Patch File Download Diff File Expand all files Collapse all files
libcpu/risc-v/e310/context_gcc.S
+21 -6
View File
@@ -32,9 +32,21 @@
rt_hw_interrupt_disable:
addi sp, sp, -12
sw a5, (sp)
li a5, 0x800
csrr a0, mie
li a5, MIP_MEIP|MIP_MTIP|MIP_MSIP
/* csrrc a5, mstatus, MSTATUS_MIE*/
blt a0, a5, 1f
/* interrupt is enable before disable it*/
addi a0, a0, 1
li a5, 0x1
addi a5, a5, -2048
csrrc a5, mie, a5
/* csrrc a5, mie, 128*/
j 2f
/* interrupt is disabled before disable it*/
1:
li a0, 0
2:
lw a5, (sp)
addi sp, sp, 12
ret
@@ -46,9 +58,12 @@ rt_hw_interrupt_disable:
rt_hw_interrupt_enable:
addi sp, sp, -12
sw a5, (sp)
li a5, MIP_MEIP|MIP_MTIP|MIP_MSIP
beqz a0, 1f
li a5, 0x1
addi a5, a5, -2048
csrrs a5, mie, a5
/* csrrsi a5, mstatus, MSTATUS_MIE*/
/* csrrs a5, mie, 128*/
1:
lw a5, (sp)
addi sp, sp, 12
ret
@@ -98,8 +113,8 @@ rt_hw_context_switch:
*Remain in M-mode after mret
*enable interrupt in M-mode
*/
li t0, MSTATUS_MPIE|MSTATUS_MPP
csrs mstatus, t0
li t0, 136
csrrs t0, mstatus, t0
LOAD sp, (a1)
LOAD x30, 1*REGBYTES(sp)
libcpu/risc-v/e310/init.c
-20
View File
@@ -187,26 +187,6 @@ extern void handle_m_ext_interrupt();
extern void handle_m_time_interrupt();
#endif
uintptr_t handle_trap(uintptr_t mcause, uintptr_t epc)
{
if (0){
#ifdef USE_PLIC
// External Machine-Level interrupt from PLIC
} else if ((mcause & MCAUSE_INT) && ((mcause & MCAUSE_CAUSE) == IRQ_M_EXT)) {
handle_m_ext_interrupt();
#endif
#ifdef USE_M_TIME
// External Machine-Level interrupt from PLIC
} else if ((mcause & MCAUSE_INT) && ((mcause & MCAUSE_CAUSE) == IRQ_M_TIMER)){
handle_m_time_interrupt();
#endif
}
else {
write(1, "trap\n", 5);
_exit(1 + mcause);
}
return epc;
}
void _init()
{
libcpu/risc-v/e310/start_gcc.S
+28 -9
View File
@@ -36,7 +36,10 @@ _start:
la gp, __global_pointer$
.option pop
la sp, _sp
csrrsi a5, mstatus, 0
/*
*disable all interrupt at startup
*/
csrrc a5, mstatus, 0xb
#if defined(ENABLE_SMP)
smp_pause(t0, t1)
@@ -69,6 +72,7 @@ _start:
la a0, __libc_fini_array
call atexit
call __libc_init_array
/*call _init directly in rt-thread*/
call _init
#ifndef __riscv_float_abi_soft
@@ -175,17 +179,31 @@ trap_entry:
call rt_interrupt_enter
csrr a0, mcause
lui a5, 0x80000
not a5, a5
and a5, a5, a0
li a4, 11
mv s1, a1
/*Machine external interrupt*/
bne a5, a4, 1f
call rt_hw_trap_irq
call handle_m_time_interrupt
1:
/*Machine software interrupt*/
li a4, 7
bne a5, a4, 2f
call rt_systick_handler
2:
call rt_interrupt_leave
la a0, rt_thread_switch_interrupt_flag
lw a1, (a0)
# Remain in M-mode after mret
li t0, 136
csrrs t0, mstatus, t0
la a0, rt_thread_switch_interrupt_flag
lw a1, (a0)
bnez a1, rt_hw_context_switch_interrupt_do
# Remain in M-mode after mret
li t0, MSTATUS_MPP
csrs mstatus, t0
LOAD x30, 1*REGBYTES(sp)
LOAD x31, 2*REGBYTES(sp)
@@ -225,12 +243,13 @@ trap_entry:
mret
rt_hw_context_switch_interrupt_do:
/*clear rt_thread_switch_interrupt_flag*/
la a0, rt_thread_switch_interrupt_flag
lw a5, (a0)
li a5, 0
sw a5, (a0)
LOAD a0, rt_interrupt_from_thread
STORE sp, (a0)
LOAD a0, rt_interrupt_to_thread
LOAD sp, (a0)
LOAD x30, 1*REGBYTES(sp)