From ac2f7f05bfa91a2ab4ceded8678a4391d2223953 Mon Sep 17 00:00:00 2001 From: flyingcys Date: Mon, 19 Feb 2024 01:42:06 +0800 Subject: [PATCH] =?UTF-8?q?[bsp][cvitek]=20=E4=BF=AE=E5=A4=8Dcv1800b?= =?UTF-8?q?=E9=BB=98=E8=AE=A4=E4=B8=AD=E6=96=AD=E5=8F=B7=E7=9A=84=E9=85=8D?= =?UTF-8?q?=E7=BD=AE=E9=97=AE=E9=A2=98?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- bsp/cvitek/README.md | 2 ++ bsp/cvitek/c906_little/.config | 1 + bsp/cvitek/c906_little/board/Kconfig | 4 ++-- bsp/cvitek/cv1800b/.config | 2 +- bsp/cvitek/cv1800b/board/Kconfig | 2 +- bsp/cvitek/cv1800b/rtconfig.h | 2 +- bsp/cvitek/cv1800b/rtconfig.py | 2 +- 7 files changed, 9 insertions(+), 6 deletions(-) mode change 100755 => 100644 bsp/cvitek/cv1800b/.config diff --git a/bsp/cvitek/README.md b/bsp/cvitek/README.md index fcb4ff5f87..143d848246 100755 --- a/bsp/cvitek/README.md +++ b/bsp/cvitek/README.md @@ -5,11 +5,13 @@ 针对算能系列 RISC-V 芯片的 bsp,包括: - 大核 + | 芯片名称 | 芯片架构 | 内存大小 | 默认日志串口 | 备注 | | ------- | ------- |------- | -------- | -------- | | cv1800b | RISC-V C906 | 64MByte | uart0 | 默认开启 MMU,运行 RT-SMART 模式 | - 小核 + | 目录 | 内存大小 | 默认日志串口 | 备注 | | ---- | ------- | -------- | --- | | c906-little | 与大核共享 | uart1 | 无 MMU,运行 RT-Thread 标准 | diff --git a/bsp/cvitek/c906_little/.config b/bsp/cvitek/c906_little/.config index 5c68dd97f6..96218a53e3 100644 --- a/bsp/cvitek/c906_little/.config +++ b/bsp/cvitek/c906_little/.config @@ -1056,6 +1056,7 @@ CONFIG_BSP_USING_UART=y # CONFIG_RT_USING_UART0 is not set CONFIG_RT_USING_UART1=y CONFIG_UART_IRQ_BASE=30 +# CONFIG_BSP_USING_I2C is not set CONFIG_BSP_USING_C906_LITTLE=y CONFIG_PLIC_PHY_ADDR=0x70000000 CONFIG_IRQ_MAX_NR=128 diff --git a/bsp/cvitek/c906_little/board/Kconfig b/bsp/cvitek/c906_little/board/Kconfig index da65c8e884..feecf2d72a 100755 --- a/bsp/cvitek/c906_little/board/Kconfig +++ b/bsp/cvitek/c906_little/board/Kconfig @@ -8,11 +8,11 @@ menu "General Drivers Configuration" if BSP_USING_UART config RT_USING_UART0 bool "Enable UART 0" - default y + default n config RT_USING_UART1 bool "Enable UART 1" - default n + default y config UART_IRQ_BASE int diff --git a/bsp/cvitek/cv1800b/.config b/bsp/cvitek/cv1800b/.config old mode 100755 new mode 100644 index 0d29229ba9..d7b611e070 --- a/bsp/cvitek/cv1800b/.config +++ b/bsp/cvitek/cv1800b/.config @@ -1101,7 +1101,7 @@ CONFIG_RT_USING_LDSO=y # CONFIG_BSP_USING_UART=y CONFIG_RT_USING_UART0=y -CONFIG_UART_IRQ_BASE=30 +CONFIG_UART_IRQ_BASE=44 # CONFIG_RT_USING_UART1 is not set # CONFIG_RT_USING_UART2 is not set # CONFIG_RT_USING_UART3 is not set diff --git a/bsp/cvitek/cv1800b/board/Kconfig b/bsp/cvitek/cv1800b/board/Kconfig index e87c3f0163..d2d557ef5d 100755 --- a/bsp/cvitek/cv1800b/board/Kconfig +++ b/bsp/cvitek/cv1800b/board/Kconfig @@ -12,7 +12,7 @@ menu "General Drivers Configuration" config UART_IRQ_BASE int - default 30 + default 44 config RT_USING_UART1 bool "Enable UART 1" diff --git a/bsp/cvitek/cv1800b/rtconfig.h b/bsp/cvitek/cv1800b/rtconfig.h index 1884389e2e..bc25c865da 100755 --- a/bsp/cvitek/cv1800b/rtconfig.h +++ b/bsp/cvitek/cv1800b/rtconfig.h @@ -304,7 +304,7 @@ #define BSP_USING_UART #define RT_USING_UART0 -#define UART_IRQ_BASE 30 +#define UART_IRQ_BASE 44 #define BSP_USING_CV1800B #define C906_PLIC_PHY_ADDR 0x70000000 #define IRQ_MAX_NR 64 diff --git a/bsp/cvitek/cv1800b/rtconfig.py b/bsp/cvitek/cv1800b/rtconfig.py index 02a7c93f1d..0914d5c010 100755 --- a/bsp/cvitek/cv1800b/rtconfig.py +++ b/bsp/cvitek/cv1800b/rtconfig.py @@ -56,4 +56,4 @@ if PLATFORM == 'gcc': CXXFLAGS = CFLAGS DUMP_ACTION = OBJDUMP + ' -D -S $TARGET > rtthread.asm\n' -POST_ACTION = OBJCPY + ' -O binary $TARGET Image\n' + SIZE + ' $TARGET \n' + './mksdimg.sh\n' + 'cd ../ && ./combine-fip.sh\n' +POST_ACTION = OBJCPY + ' -O binary $TARGET Image\n' + SIZE + ' $TARGET \n' + './mksdimg.sh\n'