diff --git a/libcpu/arm/stm32/context_gcc.S b/libcpu/arm/stm32/context_gcc.S
index 5051b1e54b..ea7213d2ac 100644
--- a/libcpu/arm/stm32/context_gcc.S
+++ b/libcpu/arm/stm32/context_gcc.S
@@ -83,9 +83,9 @@ _reswitch:
* r1 --> swith to thread stack
* psr, pc, lr, r12, r3, r2, r1, r0 are pushed into [from] stack
*/
-.global rt_hw_pend_sv
-.type rt_hw_pend_sv, %function
-rt_hw_pend_sv:
+.global PendSV_Handler
+.type PendSV_Handler, %function
+PendSV_Handler:
/* disable interrupt to protect context switch */
MRS r2, PRIMASK
CPSID I
@@ -165,9 +165,9 @@ rt_hw_interrupt_thread_switch:
BX lr
NOP
-.global rt_hw_hard_fault
-.type rt_hw_hard_fault, %function
-rt_hw_hard_fault:
+.global HardFault_Handler
+.type HardFault_Handler, %function
+HardFault_Handler:
/* get current context */
MRS r0, psp /* get fault thread stack pointer */
PUSH {lr}
diff --git a/libcpu/arm/stm32/context_iar.S b/libcpu/arm/stm32/context_iar.S
index e6fcfa1dc2..f465dcc5a9 100644
--- a/libcpu/arm/stm32/context_iar.S
+++ b/libcpu/arm/stm32/context_iar.S
@@ -81,8 +81,8 @@ _reswitch
; r0 --> swith from thread stack
; r1 --> swith to thread stack
; psr, pc, lr, r12, r3, r2, r1, r0 are pushed into [from] stack
- EXPORT rt_hw_pend_sv
-rt_hw_pend_sv:
+ EXPORT PendSV_Handler
+PendSV_Handler:
; disable interrupt to protect context switch
MRS r2, PRIMASK
@@ -161,8 +161,8 @@ rt_hw_interrupt_thread_switch:
BX lr
IMPORT rt_hw_hard_fault_exception
- EXPORT rt_hw_hard_fault
-rt_hw_hard_fault:
+ EXPORT HardFault_Handler
+HardFault_Handler:
; get current context
MRS r0, psp ; get fault thread stack pointer
diff --git a/libcpu/arm/stm32/context_rvds.S b/libcpu/arm/stm32/context_rvds.S
index 31790216ab..27d0981786 100644
--- a/libcpu/arm/stm32/context_rvds.S
+++ b/libcpu/arm/stm32/context_rvds.S
@@ -84,8 +84,8 @@ _reswitch
; r0 --> swith from thread stack
; r1 --> swith to thread stack
; psr, pc, lr, r12, r3, r2, r1, r0 are pushed into [from] stack
-rt_hw_pend_sv PROC
- EXPORT rt_hw_pend_sv
+PendSV_Handler PROC
+ EXPORT PendSV_Handler
; disable interrupt to protect context switch
MRS r2, PRIMASK
@@ -172,8 +172,8 @@ rt_hw_interrupt_thread_switch PROC
ENDP
IMPORT rt_hw_hard_fault_exception
- EXPORT rt_hw_hard_fault
-rt_hw_hard_fault PROC
+ EXPORT HardFault_Handler
+HardFault_Handler PROC
; get current context
MRS r0, psp ; get fault thread stack pointer
diff --git a/libcpu/arm/stm32/start_gcc.S b/libcpu/arm/stm32/start_gcc.S
deleted file mode 100644
index 04e46bbc27..0000000000
--- a/libcpu/arm/stm32/start_gcc.S
+++ /dev/null
@@ -1,458 +0,0 @@
-/**
- ******************************************************************************
- * @file startup_stm32f10x_hd.s
- * @author MCD Application Team
- * @version V3.1.2
- * @date 09/28/2009
- * @brief STM32F10x High Density Devices vector table for RIDE7 toolchain.
- * This module performs:
- * - Set the initial SP
- * - Set the initial PC == Reset_Handler,
- * - Set the vector table entries with the exceptions ISR address,
- * - Configure external SRAM mounted on STM3210E-EVAL board
- * to be used as data memory (optional, to be enabled by user)
- * - Branches to main in the C library (which eventually
- * calls main()).
- * After Reset the Cortex-M3 processor is in Thread mode,
- * priority is Privileged, and the Stack is set to Main.
- ******************************************************************************
- * @copy
- *
- * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
- * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
- * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
- * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
- * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
- * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
- *
- * © COPYRIGHT 2009 STMicroelectronics
- */
-.section .bss.init
-.equ Stack_Size, 0x00000200
-.space Stack_Size
-Initial_spTop:
-
- .syntax unified
- .cpu cortex-m3
- .fpu softvfp
- .thumb
-
-.global g_pfnVectors
-.global Default_Handler
-
-/* start address for the initialization values of the .data section.
-defined in linker script */
-.word _sidata
-/* start address for the .data section. defined in linker script */
-.word _sdata
-/* end address for the .data section. defined in linker script */
-.word _edata
-/* start address for the .bss section. defined in linker script */
-.word _sbss
-/* end address for the .bss section. defined in linker script */
-.word _ebss
-
-// .equ Initial_spTop, 0x20000200
-.equ BootRAM, 0xF1E0F85F
-/**
- * @brief This is the code that gets called when the processor first
- * starts execution following a reset event. Only the absolutely
- * necessary set is performed, after which the application
- * supplied main() routine is called.
- * @param None
- * @retval : None
-*/
-
- .section .text.Reset_Handler
- .weak Reset_Handler
- .type Reset_Handler, %function
-Reset_Handler:
-/* restore original stack pointer */
- LDR r0, =Initial_spTop
- MSR msp, r0
-/* Copy the data segment initializers from flash to SRAM */
- movs r1, #0
- b LoopCopyDataInit
-
-CopyDataInit:
- ldr r3, =_sidata
- ldr r3, [r3, r1]
- str r3, [r0, r1]
- adds r1, r1, #4
-
-LoopCopyDataInit:
- ldr r0, =_sdata
- ldr r3, =_edata
- adds r2, r0, r1
- cmp r2, r3
- bcc CopyDataInit
- ldr r2, =_sbss
- b LoopFillZerobss
-/* Zero fill the bss segment. */
-FillZerobss:
- movs r3, #0
- str r3, [r2], #4
-
-LoopFillZerobss:
- ldr r3, = _ebss
- cmp r2, r3
- bcc FillZerobss
-/* Call the application's entry point.*/
- bl main
- bx lr
-.size Reset_Handler, .-Reset_Handler
-
-/**
- * @brief This is the code that gets called when the processor receives an
- * unexpected interrupt. This simply enters an infinite loop, preserving
- * the system state for examination by a debugger.
- *
- * @param None
- * @retval : None
-*/
- .section .text.Default_Handler,"ax",%progbits
-Default_Handler:
-Infinite_Loop:
- b Infinite_Loop
- .size Default_Handler, .-Default_Handler
-/******************************************************************************
-*
-* The minimal vector table for a Cortex M3. Note that the proper constructs
-* must be placed on this to ensure that it ends up at physical address
-* 0x0000.0000.
-*
-******************************************************************************/
- .section .isr_vector,"a",%progbits
- .type g_pfnVectors, %object
- .size g_pfnVectors, .-g_pfnVectors
-
-
-g_pfnVectors:
- .word Initial_spTop
- .word Reset_Handler
- .word NMI_Handler
- .word rt_hw_hard_fault
- .word MemManage_Handler
- .word BusFault_Handler
- .word UsageFault_Handler
- .word 0
- .word 0
- .word 0
- .word 0
- .word SVC_Handler
- .word DebugMon_Handler
- .word 0
- .word rt_hw_pend_sv
- .word rt_hw_timer_handler
- .word WWDG_IRQHandler
- .word PVD_IRQHandler
- .word TAMPER_IRQHandler
- .word RTC_IRQHandler
- .word FLASH_IRQHandler
- .word RCC_IRQHandler
- .word EXTI0_IRQHandler
- .word EXTI1_IRQHandler
- .word EXTI2_IRQHandler
- .word EXTI3_IRQHandler
- .word EXTI4_IRQHandler
- .word DMA1_Channel1_IRQHandler
- .word DMA1_Channel2_IRQHandler
- .word DMA1_Channel3_IRQHandler
- .word DMA1_Channel4_IRQHandler
- .word DMA1_Channel5_IRQHandler
- .word DMA1_Channel6_IRQHandler
- .word DMA1_Channel7_IRQHandler
- .word ADC1_2_IRQHandler
- .word USB_HP_CAN1_TX_IRQHandler
- .word USB_LP_CAN1_RX0_IRQHandler
- .word CAN1_RX1_IRQHandler
- .word CAN1_SCE_IRQHandler
- .word EXTI9_5_IRQHandler
- .word TIM1_BRK_IRQHandler
- .word TIM1_UP_IRQHandler
- .word TIM1_TRG_COM_IRQHandler
- .word TIM1_CC_IRQHandler
- .word TIM2_IRQHandler
- .word TIM3_IRQHandler
- .word TIM4_IRQHandler
- .word I2C1_EV_IRQHandler
- .word I2C1_ER_IRQHandler
- .word I2C2_EV_IRQHandler
- .word I2C2_ER_IRQHandler
- .word SPI1_IRQHandler
- .word SPI2_IRQHandler
- .word USART1_IRQHandler
- .word USART2_IRQHandler
- .word USART3_IRQHandler
- .word EXTI15_10_IRQHandler
- .word RTCAlarm_IRQHandler
- .word USBWakeUp_IRQHandler
- .word TIM8_BRK_IRQHandler
- .word TIM8_UP_IRQHandler
- .word TIM8_TRG_COM_IRQHandler
- .word TIM8_CC_IRQHandler
- .word ADC3_IRQHandler
- .word FSMC_IRQHandler
- .word SDIO_IRQHandler
- .word TIM5_IRQHandler
- .word SPI3_IRQHandler
- .word UART4_IRQHandler
- .word UART5_IRQHandler
- .word TIM6_IRQHandler
- .word TIM7_IRQHandler
- .word DMA2_Channel1_IRQHandler
- .word DMA2_Channel2_IRQHandler
- .word DMA2_Channel3_IRQHandler
- .word DMA2_Channel4_5_IRQHandler
- .word 0
- .word 0
- .word 0
- .word 0
- .word 0
- .word 0
- .word 0
- .word 0
- .word 0
- .word 0
- .word 0
- .word 0
- .word 0
- .word 0
- .word 0
- .word 0
- .word 0
- .word 0
- .word 0
- .word 0
- .word 0
- .word 0
- .word 0
- .word 0
- .word 0
- .word 0
- .word 0
- .word 0
- .word 0
- .word 0
- .word 0
- .word 0
- .word 0
- .word 0
- .word 0
- .word 0
- .word 0
- .word 0
- .word 0
- .word 0
- .word 0
- .word 0
- .word 0
- .word 0
- .word BootRAM /* @0x1E0. This is for boot in RAM mode for
- STM32F10x High Density devices. */
-
-/*******************************************************************************
-*
-* Provide weak aliases for each Exception handler to the Default_Handler.
-* As they are weak aliases, any function with the same name will override
-* this definition.
-*
-*******************************************************************************/
-
- .weak NMI_Handler
- .thumb_set NMI_Handler,Default_Handler
-
- .weak MemManage_Handler
- .thumb_set MemManage_Handler,Default_Handler
-
- .weak BusFault_Handler
- .thumb_set BusFault_Handler,Default_Handler
-
- .weak UsageFault_Handler
- .thumb_set UsageFault_Handler,Default_Handler
-
- .weak SVC_Handler
- .thumb_set SVC_Handler,Default_Handler
-
- .weak DebugMon_Handler
- .thumb_set DebugMon_Handler,Default_Handler
-
- .weak WWDG_IRQHandler
- .thumb_set WWDG_IRQHandler,Default_Handler
-
- .weak PVD_IRQHandler
- .thumb_set PVD_IRQHandler,Default_Handler
-
- .weak TAMPER_IRQHandler
- .thumb_set TAMPER_IRQHandler,Default_Handler
-
- .weak RTC_IRQHandler
- .thumb_set RTC_IRQHandler,Default_Handler
-
- .weak FLASH_IRQHandler
- .thumb_set FLASH_IRQHandler,Default_Handler
-
- .weak RCC_IRQHandler
- .thumb_set RCC_IRQHandler,Default_Handler
-
- .weak EXTI0_IRQHandler
- .thumb_set EXTI0_IRQHandler,Default_Handler
-
- .weak EXTI1_IRQHandler
- .thumb_set EXTI1_IRQHandler,Default_Handler
-
- .weak EXTI2_IRQHandler
- .thumb_set EXTI2_IRQHandler,Default_Handler
-
- .weak EXTI3_IRQHandler
- .thumb_set EXTI3_IRQHandler,Default_Handler
-
- .weak EXTI4_IRQHandler
- .thumb_set EXTI4_IRQHandler,Default_Handler
-
- .weak DMA1_Channel1_IRQHandler
- .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
-
- .weak DMA1_Channel2_IRQHandler
- .thumb_set DMA1_Channel2_IRQHandler,Default_Handler
-
- .weak DMA1_Channel3_IRQHandler
- .thumb_set DMA1_Channel3_IRQHandler,Default_Handler
-
- .weak DMA1_Channel4_IRQHandler
- .thumb_set DMA1_Channel4_IRQHandler,Default_Handler
-
- .weak DMA1_Channel5_IRQHandler
- .thumb_set DMA1_Channel5_IRQHandler,Default_Handler
-
- .weak DMA1_Channel6_IRQHandler
- .thumb_set DMA1_Channel6_IRQHandler,Default_Handler
-
- .weak DMA1_Channel7_IRQHandler
- .thumb_set DMA1_Channel7_IRQHandler,Default_Handler
-
- .weak ADC1_2_IRQHandler
- .thumb_set ADC1_2_IRQHandler,Default_Handler
-
- .weak USB_HP_CAN1_TX_IRQHandler
- .thumb_set USB_HP_CAN1_TX_IRQHandler,Default_Handler
-
- .weak USB_LP_CAN1_RX0_IRQHandler
- .thumb_set USB_LP_CAN1_RX0_IRQHandler,Default_Handler
-
- .weak CAN1_RX1_IRQHandler
- .thumb_set CAN1_RX1_IRQHandler,Default_Handler
-
- .weak CAN1_SCE_IRQHandler
- .thumb_set CAN1_SCE_IRQHandler,Default_Handler
-
- .weak EXTI9_5_IRQHandler
- .thumb_set EXTI9_5_IRQHandler,Default_Handler
-
- .weak TIM1_BRK_IRQHandler
- .thumb_set TIM1_BRK_IRQHandler,Default_Handler
-
- .weak TIM1_UP_IRQHandler
- .thumb_set TIM1_UP_IRQHandler,Default_Handler
-
- .weak TIM1_TRG_COM_IRQHandler
- .thumb_set TIM1_TRG_COM_IRQHandler,Default_Handler
-
- .weak TIM1_CC_IRQHandler
- .thumb_set TIM1_CC_IRQHandler,Default_Handler
-
- .weak TIM2_IRQHandler
- .thumb_set TIM2_IRQHandler,Default_Handler
-
- .weak TIM3_IRQHandler
- .thumb_set TIM3_IRQHandler,Default_Handler
-
- .weak TIM4_IRQHandler
- .thumb_set TIM4_IRQHandler,Default_Handler
-
- .weak I2C1_EV_IRQHandler
- .thumb_set I2C1_EV_IRQHandler,Default_Handler
-
- .weak I2C1_ER_IRQHandler
- .thumb_set I2C1_ER_IRQHandler,Default_Handler
-
- .weak I2C2_EV_IRQHandler
- .thumb_set I2C2_EV_IRQHandler,Default_Handler
-
- .weak I2C2_ER_IRQHandler
- .thumb_set I2C2_ER_IRQHandler,Default_Handler
-
- .weak SPI1_IRQHandler
- .thumb_set SPI1_IRQHandler,Default_Handler
-
- .weak SPI2_IRQHandler
- .thumb_set SPI2_IRQHandler,Default_Handler
-
- .weak USART1_IRQHandler
- .thumb_set USART1_IRQHandler,Default_Handler
-
- .weak USART2_IRQHandler
- .thumb_set USART2_IRQHandler,Default_Handler
-
- .weak USART3_IRQHandler
- .thumb_set USART3_IRQHandler,Default_Handler
-
- .weak EXTI15_10_IRQHandler
- .thumb_set EXTI15_10_IRQHandler,Default_Handler
-
- .weak RTCAlarm_IRQHandler
- .thumb_set RTCAlarm_IRQHandler,Default_Handler
-
- .weak USBWakeUp_IRQHandler
- .thumb_set USBWakeUp_IRQHandler,Default_Handler
-
- .weak TIM8_BRK_IRQHandler
- .thumb_set TIM8_BRK_IRQHandler,Default_Handler
-
- .weak TIM8_UP_IRQHandler
- .thumb_set TIM8_UP_IRQHandler,Default_Handler
-
- .weak TIM8_TRG_COM_IRQHandler
- .thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
-
- .weak TIM8_CC_IRQHandler
- .thumb_set TIM8_CC_IRQHandler,Default_Handler
-
- .weak ADC3_IRQHandler
- .thumb_set ADC3_IRQHandler,Default_Handler
-
- .weak FSMC_IRQHandler
- .thumb_set FSMC_IRQHandler,Default_Handler
-
- .weak SDIO_IRQHandler
- .thumb_set SDIO_IRQHandler,Default_Handler
-
- .weak TIM5_IRQHandler
- .thumb_set TIM5_IRQHandler,Default_Handler
-
- .weak SPI3_IRQHandler
- .thumb_set SPI3_IRQHandler,Default_Handler
-
- .weak UART4_IRQHandler
- .thumb_set UART4_IRQHandler,Default_Handler
-
- .weak UART5_IRQHandler
- .thumb_set UART5_IRQHandler,Default_Handler
-
- .weak TIM6_IRQHandler
- .thumb_set TIM6_IRQHandler,Default_Handler
-
- .weak TIM7_IRQHandler
- .thumb_set TIM7_IRQHandler,Default_Handler
-
- .weak DMA2_Channel1_IRQHandler
- .thumb_set DMA2_Channel1_IRQHandler,Default_Handler
-
- .weak DMA2_Channel2_IRQHandler
- .thumb_set DMA2_Channel2_IRQHandler,Default_Handler
-
- .weak DMA2_Channel3_IRQHandler
- .thumb_set DMA2_Channel3_IRQHandler,Default_Handler
-
- .weak DMA2_Channel4_5_IRQHandler
- .thumb_set DMA2_Channel4_5_IRQHandler,Default_Handler
diff --git a/libcpu/arm/stm32/start_iar.S b/libcpu/arm/stm32/start_iar.S
deleted file mode 100644
index 1b92526096..0000000000
--- a/libcpu/arm/stm32/start_iar.S
+++ /dev/null
@@ -1,485 +0,0 @@
-;/******************** (C) COPYRIGHT 2009 STMicroelectronics ********************
-;* File Name : startup_stm32f10x_hd.s
-;* Author : MCD Application Team
-;* Version : V3.0.0
-;* Date : 04/06/2009
-;* Description : STM32F10x High Density Devices vector table for EWARM5.x
-;* toolchain.
-;* This module performs:
-;* - Set the initial SP
-;* - Set the initial PC == __iar_program_start,
-;* - Set the vector table entries with the exceptions ISR address,
-;* - Configure external SRAM mounted on STM3210E-EVAL board
-;* to be used as data memory (optional, to be enabled by user)
-;* After Reset the Cortex-M3 processor is in Thread mode,
-;* priority is Privileged, and the Stack is set to Main.
-;********************************************************************************
-;* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
-;* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
-;* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
-;* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
-;* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
-;* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
-;*******************************************************************************/
-;
-;
-; The modules in this file are included in the libraries, and may be replaced
-; by any user-defined modules that define the PUBLIC symbol _program_start or
-; a user defined start symbol.
-; To override the cstartup defined in the library, simply add your modified
-; version to the workbench project.
-;
-; The vector table is normally located at address 0.
-; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
-; The name "__vector_table" has special meaning for C-SPY:
-; it is where the SP start value is found, and the NVIC vector
-; table register (VTOR) is initialized to this address if != 0.
-;
-; Cortex-M version
-;
-
- MODULE ?cstartup
-
- ;; ICODE is the same segment as cstartup. By placing __low_level_init
- ;; in the same segment, we make sure it can be reached with BL. */
-
- SECTION CSTACK:DATA:NOROOT(3)
- SECTION .icode:CODE:NOROOT(2)
-
- IMPORT rt_hw_hard_fault
- IMPORT rt_hw_pend_sv
- IMPORT rt_hw_timer_handler
-
- PUBLIC __low_level_init
-
- PUBWEAK SystemInit_ExtMemCtl
- SECTION .text:CODE:REORDER(2)
- THUMB
-SystemInit_ExtMemCtl
- BX LR
-
-__low_level_init:
-
- ;; Initialize hardware.
- LDR R0, = SystemInit_ExtMemCtl ; initialize external memory controller
- MOV R11, LR
- BLX R0
- LDR R1, =sfe(CSTACK) ; restore original stack pointer
- MSR MSP, R1
- MOV R0,#1
- ;; Return with BX to be independent of mode of caller
- BX R11
-
- ;; Forward declaration of sections.
- SECTION .intvec:CODE:NOROOT(2)
-
- EXTERN __iar_program_start
- PUBLIC __vector_table
-
- DATA
-__vector_table
- DCD sfe(CSTACK)
- DCD __iar_program_start
-
- DCD NMI_Handler ; NMI Handler
- DCD rt_hw_hard_fault ; Hard Fault Handler
- DCD MemManage_Handler ; MPU Fault Handler
- DCD BusFault_Handler ; Bus Fault Handler
- DCD UsageFault_Handler ; Usage Fault Handler
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD SVC_Handler ; SVCall Handler
- DCD DebugMon_Handler ; Debug Monitor Handler
- DCD 0 ; Reserved
- DCD rt_hw_pend_sv ; PendSV Handler
- DCD rt_hw_timer_handler ; SysTick Handler
-
- ; External Interrupts
- DCD WWDG_IRQHandler ; Window Watchdog
- DCD PVD_IRQHandler ; PVD through EXTI Line detect
- DCD TAMPER_IRQHandler ; Tamper
- DCD RTC_IRQHandler ; RTC
- DCD FLASH_IRQHandler ; Flash
- DCD RCC_IRQHandler ; RCC
- DCD EXTI0_IRQHandler ; EXTI Line 0
- DCD EXTI1_IRQHandler ; EXTI Line 1
- DCD EXTI2_IRQHandler ; EXTI Line 2
- DCD EXTI3_IRQHandler ; EXTI Line 3
- DCD EXTI4_IRQHandler ; EXTI Line 4
- DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
- DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
- DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
- DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
- DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
- DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
- DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
- DCD ADC1_2_IRQHandler ; ADC1 & ADC2
- DCD USB_HP_CAN1_TX_IRQHandler ; USB High Priority or CAN1 TX
- DCD USB_LP_CAN1_RX0_IRQHandler ; USB Low Priority or CAN1 RX0
- DCD CAN1_RX1_IRQHandler ; CAN1 RX1
- DCD CAN1_SCE_IRQHandler ; CAN1 SCE
- DCD EXTI9_5_IRQHandler ; EXTI Line 9..5
- DCD TIM1_BRK_IRQHandler ; TIM1 Break
- DCD TIM1_UP_IRQHandler ; TIM1 Update
- DCD TIM1_TRG_COM_IRQHandler ; TIM1 Trigger and Commutation
- DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
- DCD TIM2_IRQHandler ; TIM2
- DCD TIM3_IRQHandler ; TIM3
- DCD TIM4_IRQHandler ; TIM4
- DCD I2C1_EV_IRQHandler ; I2C1 Event
- DCD I2C1_ER_IRQHandler ; I2C1 Error
- DCD I2C2_EV_IRQHandler ; I2C2 Event
- DCD I2C2_ER_IRQHandler ; I2C2 Error
- DCD SPI1_IRQHandler ; SPI1
- DCD SPI2_IRQHandler ; SPI2
- DCD USART1_IRQHandler ; USART1
- DCD USART2_IRQHandler ; USART2
- DCD USART3_IRQHandler ; USART3
- DCD EXTI15_10_IRQHandler ; EXTI Line 15..10
- DCD RTCAlarm_IRQHandler ; RTC Alarm through EXTI Line
- DCD OTG_FS_WKUP_IRQHandler ; USB OTG FS Wakeup from suspend
- DCD TIM8_BRK_IRQHandler ; TIM8 Break
- DCD TIM8_UP_IRQHandler ; TIM8 Update
- DCD TIM8_TRG_COM_IRQHandler ; TIM8 Trigger and Commutation
- DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare
- DCD ADC3_IRQHandler ; ADC3
- DCD FSMC_IRQHandler ; FSMC
- DCD SDIO_IRQHandler ; SDIO
- DCD TIM5_IRQHandler ; TIM5
- DCD SPI3_IRQHandler ; SPI3
- DCD UART4_IRQHandler ; UART4
- DCD UART5_IRQHandler ; UART5
- DCD TIM6_IRQHandler ; TIM6
- DCD TIM7_IRQHandler ; TIM7
- DCD DMA2_Channel1_IRQHandler ; DMA2 Channel1
- DCD DMA2_Channel2_IRQHandler ; DMA2 Channel2
- DCD DMA2_Channel3_IRQHandler ; DMA2 Channel3
- DCD DMA2_Channel4_5_IRQHandler ; DMA2 Channel4 & Channel5
- ; for STM32F10x Connectivity line devices
- DCD DMA2_Channel5_IRQHandler ; DMA2 Channel5
- DCD ETH_IRQHandler ; Ethernet
- DCD ETH_WKUP_IRQHandler ; Ethernet Wakeup through EXTI line
- DCD CAN2_TX_IRQHandler ; CAN2 TX
- DCD CAN2_RX0_IRQHandler ; CAN2 RX0
- DCD CAN2_RX1_IRQHandler ; CAN2 RX1
- DCD CAN2_SCE_IRQHandler ; CAN2 SCE
- DCD OTG_FS_IRQHandler ; USB OTG FS
-
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;;
-;; Default interrupt handlers.
-;;
- THUMB
-
- PUBWEAK NMI_Handler
- SECTION .text:CODE:REORDER(1)
-NMI_Handler
- B NMI_Handler
- PUBWEAK MemManage_Handler
- SECTION .text:CODE:REORDER(1)
-MemManage_Handler
- B MemManage_Handler
- PUBWEAK BusFault_Handler
- SECTION .text:CODE:REORDER(1)
-BusFault_Handler
- B BusFault_Handler
- PUBWEAK UsageFault_Handler
- SECTION .text:CODE:REORDER(1)
-UsageFault_Handler
- B UsageFault_Handler
- PUBWEAK SVC_Handler
- SECTION .text:CODE:REORDER(1)
-SVC_Handler
- B SVC_Handler
- PUBWEAK DebugMon_Handler
- SECTION .text:CODE:REORDER(1)
-DebugMon_Handler
- B DebugMon_Handler
- PUBWEAK WWDG_IRQHandler
- SECTION .text:CODE:REORDER(1)
-WWDG_IRQHandler
- B WWDG_IRQHandler
- PUBWEAK PVD_IRQHandler
- SECTION .text:CODE:REORDER(1)
-PVD_IRQHandler
- B PVD_IRQHandler
- PUBWEAK TAMPER_IRQHandler
- SECTION .text:CODE:REORDER(1)
-TAMPER_IRQHandler
- B TAMPER_IRQHandler
- PUBWEAK RTC_IRQHandler
- SECTION .text:CODE:REORDER(1)
-RTC_IRQHandler
- B RTC_IRQHandler
- PUBWEAK FLASH_IRQHandler
- SECTION .text:CODE:REORDER(1)
-FLASH_IRQHandler
- B FLASH_IRQHandler
- PUBWEAK RCC_IRQHandler
- SECTION .text:CODE:REORDER(1)
-RCC_IRQHandler
- B RCC_IRQHandler
- PUBWEAK EXTI0_IRQHandler
- SECTION .text:CODE:REORDER(1)
-EXTI0_IRQHandler
- B EXTI0_IRQHandler
- PUBWEAK EXTI1_IRQHandler
- SECTION .text:CODE:REORDER(1)
-EXTI1_IRQHandler
- B EXTI1_IRQHandler
- PUBWEAK EXTI2_IRQHandler
- SECTION .text:CODE:REORDER(1)
-EXTI2_IRQHandler
- B EXTI2_IRQHandler
- PUBWEAK EXTI3_IRQHandler
- SECTION .text:CODE:REORDER(1)
-EXTI3_IRQHandler
- B EXTI3_IRQHandler
- PUBWEAK EXTI4_IRQHandler
- SECTION .text:CODE:REORDER(1)
-EXTI4_IRQHandler
- B EXTI4_IRQHandler
- PUBWEAK DMA1_Channel1_IRQHandler
- SECTION .text:CODE:REORDER(1)
-DMA1_Channel1_IRQHandler
- B DMA1_Channel1_IRQHandler
- PUBWEAK DMA1_Channel2_IRQHandler
- SECTION .text:CODE:REORDER(1)
-DMA1_Channel2_IRQHandler
- B DMA1_Channel2_IRQHandler
- PUBWEAK DMA1_Channel3_IRQHandler
- SECTION .text:CODE:REORDER(1)
-DMA1_Channel3_IRQHandler
- B DMA1_Channel3_IRQHandler
- PUBWEAK DMA1_Channel4_IRQHandler
- SECTION .text:CODE:REORDER(1)
-DMA1_Channel4_IRQHandler
- B DMA1_Channel4_IRQHandler
- PUBWEAK DMA1_Channel5_IRQHandler
- SECTION .text:CODE:REORDER(1)
-DMA1_Channel5_IRQHandler
- B DMA1_Channel5_IRQHandler
- PUBWEAK DMA1_Channel6_IRQHandler
- SECTION .text:CODE:REORDER(1)
-DMA1_Channel6_IRQHandler
- B DMA1_Channel6_IRQHandler
- PUBWEAK DMA1_Channel7_IRQHandler
- SECTION .text:CODE:REORDER(1)
-DMA1_Channel7_IRQHandler
- B DMA1_Channel7_IRQHandler
- PUBWEAK ADC1_2_IRQHandler
- SECTION .text:CODE:REORDER(1)
-ADC1_2_IRQHandler
- B ADC1_2_IRQHandler
- PUBWEAK USB_HP_CAN1_TX_IRQHandler
- SECTION .text:CODE:REORDER(1)
-USB_HP_CAN1_TX_IRQHandler
- B USB_HP_CAN1_TX_IRQHandler
- PUBWEAK USB_LP_CAN1_RX0_IRQHandler
- SECTION .text:CODE:REORDER(1)
-USB_LP_CAN1_RX0_IRQHandler
- B USB_LP_CAN1_RX0_IRQHandler
- PUBWEAK CAN1_RX1_IRQHandler
- SECTION .text:CODE:REORDER(1)
-CAN1_RX1_IRQHandler
- B CAN1_RX1_IRQHandler
- PUBWEAK CAN1_SCE_IRQHandler
- SECTION .text:CODE:REORDER(1)
-CAN1_SCE_IRQHandler
- B CAN1_SCE_IRQHandler
- PUBWEAK EXTI9_5_IRQHandler
- SECTION .text:CODE:REORDER(1)
-EXTI9_5_IRQHandler
- B EXTI9_5_IRQHandler
- PUBWEAK TIM1_BRK_IRQHandler
- SECTION .text:CODE:REORDER(1)
-TIM1_BRK_IRQHandler
- B TIM1_BRK_IRQHandler
- PUBWEAK TIM1_UP_IRQHandler
- SECTION .text:CODE:REORDER(1)
-TIM1_UP_IRQHandler
- B TIM1_UP_IRQHandler
- PUBWEAK TIM1_TRG_COM_IRQHandler
- SECTION .text:CODE:REORDER(1)
-TIM1_TRG_COM_IRQHandler
- B TIM1_TRG_COM_IRQHandler
- PUBWEAK TIM1_CC_IRQHandler
- SECTION .text:CODE:REORDER(1)
-TIM1_CC_IRQHandler
- B TIM1_CC_IRQHandler
- PUBWEAK TIM2_IRQHandler
- SECTION .text:CODE:REORDER(1)
-TIM2_IRQHandler
- B TIM2_IRQHandler
- PUBWEAK TIM3_IRQHandler
- SECTION .text:CODE:REORDER(1)
-TIM3_IRQHandler
- B TIM3_IRQHandler
- PUBWEAK TIM4_IRQHandler
- SECTION .text:CODE:REORDER(1)
-TIM4_IRQHandler
- B TIM4_IRQHandler
- PUBWEAK I2C1_EV_IRQHandler
- SECTION .text:CODE:REORDER(1)
-I2C1_EV_IRQHandler
- B I2C1_EV_IRQHandler
- PUBWEAK I2C1_ER_IRQHandler
- SECTION .text:CODE:REORDER(1)
-I2C1_ER_IRQHandler
- B I2C1_ER_IRQHandler
- PUBWEAK I2C2_EV_IRQHandler
- SECTION .text:CODE:REORDER(1)
-I2C2_EV_IRQHandler
- B I2C2_EV_IRQHandler
- PUBWEAK I2C2_ER_IRQHandler
- SECTION .text:CODE:REORDER(1)
-I2C2_ER_IRQHandler
- B I2C2_ER_IRQHandler
- PUBWEAK SPI1_IRQHandler
- SECTION .text:CODE:REORDER(1)
-SPI1_IRQHandler
- B SPI1_IRQHandler
- PUBWEAK SPI2_IRQHandler
- SECTION .text:CODE:REORDER(1)
-SPI2_IRQHandler
- B SPI2_IRQHandler
- PUBWEAK USART1_IRQHandler
- SECTION .text:CODE:REORDER(1)
-USART1_IRQHandler
- B USART1_IRQHandler
- PUBWEAK USART2_IRQHandler
- SECTION .text:CODE:REORDER(1)
-USART2_IRQHandler
- B USART2_IRQHandler
- PUBWEAK USART3_IRQHandler
- SECTION .text:CODE:REORDER(1)
-USART3_IRQHandler
- B USART3_IRQHandler
- PUBWEAK EXTI15_10_IRQHandler
- SECTION .text:CODE:REORDER(1)
-EXTI15_10_IRQHandler
- B EXTI15_10_IRQHandler
- PUBWEAK RTCAlarm_IRQHandler
- SECTION .text:CODE:REORDER(1)
-RTCAlarm_IRQHandler
- B RTCAlarm_IRQHandler
- PUBWEAK OTG_FS_WKUP_IRQHandler
- SECTION .text:CODE:REORDER(1)
-OTG_FS_WKUP_IRQHandler
- B OTG_FS_WKUP_IRQHandler
- PUBWEAK TIM8_BRK_IRQHandler
- SECTION .text:CODE:REORDER(1)
-TIM8_BRK_IRQHandler
- B TIM8_BRK_IRQHandler
- PUBWEAK TIM8_UP_IRQHandler
- SECTION .text:CODE:REORDER(1)
-TIM8_UP_IRQHandler
- B TIM8_UP_IRQHandler
- PUBWEAK TIM8_TRG_COM_IRQHandler
- SECTION .text:CODE:REORDER(1)
-TIM8_TRG_COM_IRQHandler
- B TIM8_TRG_COM_IRQHandler
- PUBWEAK TIM8_CC_IRQHandler
- SECTION .text:CODE:REORDER(1)
-TIM8_CC_IRQHandler
- B TIM8_CC_IRQHandler
- PUBWEAK ADC3_IRQHandler
- SECTION .text:CODE:REORDER(1)
-ADC3_IRQHandler
- B ADC3_IRQHandler
- PUBWEAK FSMC_IRQHandler
- SECTION .text:CODE:REORDER(1)
-FSMC_IRQHandler
- B FSMC_IRQHandler
- PUBWEAK SDIO_IRQHandler
- SECTION .text:CODE:REORDER(1)
-SDIO_IRQHandler
- B SDIO_IRQHandler
- PUBWEAK TIM5_IRQHandler
- SECTION .text:CODE:REORDER(1)
-TIM5_IRQHandler
- B TIM5_IRQHandler
- PUBWEAK SPI3_IRQHandler
- SECTION .text:CODE:REORDER(1)
-SPI3_IRQHandler
- B SPI3_IRQHandler
- PUBWEAK UART4_IRQHandler
- SECTION .text:CODE:REORDER(1)
-UART4_IRQHandler
- B UART4_IRQHandler
- PUBWEAK UART5_IRQHandler
- SECTION .text:CODE:REORDER(1)
-UART5_IRQHandler
- B UART5_IRQHandler
- PUBWEAK TIM6_IRQHandler
- SECTION .text:CODE:REORDER(1)
-TIM6_IRQHandler
- B TIM6_IRQHandler
- PUBWEAK TIM7_IRQHandler
- SECTION .text:CODE:REORDER(1)
-TIM7_IRQHandler
- B TIM7_IRQHandler
- PUBWEAK DMA2_Channel1_IRQHandler
- SECTION .text:CODE:REORDER(1)
-DMA2_Channel1_IRQHandler
- B DMA2_Channel1_IRQHandler
- PUBWEAK DMA2_Channel2_IRQHandler
- SECTION .text:CODE:REORDER(1)
-DMA2_Channel2_IRQHandler
- B DMA2_Channel2_IRQHandler
- PUBWEAK DMA2_Channel3_IRQHandler
- SECTION .text:CODE:REORDER(1)
-DMA2_Channel3_IRQHandler
- B DMA2_Channel3_IRQHandler
- PUBWEAK DMA2_Channel4_5_IRQHandler
- SECTION .text:CODE:REORDER(1)
-DMA2_Channel4_5_IRQHandler
- B DMA2_Channel4_5_IRQHandler
-
-; for STM32F10x Connectivity line devices
- PUBWEAK DMA2_Channel5_IRQHandler
- SECTION .text:CODE:REORDER(1)
-DMA2_Channel5_IRQHandler
- B DMA2_Channel5_IRQHandler
-
- PUBWEAK ETH_IRQHandler
- SECTION .text:CODE:REORDER(1)
-ETH_IRQHandler
- B ETH_IRQHandler
-
- PUBWEAK ETH_WKUP_IRQHandler
- SECTION .text:CODE:REORDER(1)
-ETH_WKUP_IRQHandler
- B ETH_WKUP_IRQHandler
-
- PUBWEAK CAN2_TX_IRQHandler
- SECTION .text:CODE:REORDER(1)
-CAN2_TX_IRQHandler
- B CAN2_TX_IRQHandler
-
- PUBWEAK CAN2_RX0_IRQHandler
- SECTION .text:CODE:REORDER(1)
-CAN2_RX0_IRQHandler
- B CAN2_RX0_IRQHandler
-
- PUBWEAK CAN2_RX1_IRQHandler
- SECTION .text:CODE:REORDER(1)
-CAN2_RX1_IRQHandler
- B CAN2_RX1_IRQHandler
-
- PUBWEAK CAN2_SCE_IRQHandler
- SECTION .text:CODE:REORDER(1)
-CAN2_SCE_IRQHandler
- B CAN2_SCE_IRQHandler
-
- PUBWEAK OTG_FS_IRQHandler
- SECTION .text:CODE:REORDER(1)
-OTG_FS_IRQHandler
- B OTG_FS_IRQHandler
-
-
- END
-
-/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/
diff --git a/libcpu/arm/stm32/start_rvds.S b/libcpu/arm/stm32/start_rvds.S
deleted file mode 100644
index 12e75edbfd..0000000000
--- a/libcpu/arm/stm32/start_rvds.S
+++ /dev/null
@@ -1,373 +0,0 @@
-; /*
-; * File : start_rvds.s
-; * This file is part of RT-Thread RTOS
-; * COPYRIGHT (C) 2009, RT-Thread Development Team
-; *
-; * The license and distribution terms for this file may be
-; * found in the file LICENSE in this distribution or at
-; * http://www.rt-thread.org/license/LICENSE
-; *
-; * Change Logs:
-; * Date Author Notes
-; * 2009-09-23 Bernard first implementation
-; */
-
-;* <<< Use Configuration Wizard in Context Menu >>>
-
-; Amount of memory (in bytes) allocated for Stack
-; Tailor this value to your application needs
-; Stack Configuration
-; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
-;
-
-Stack_Size EQU 0x00000200
-
- AREA STACK, NOINIT, READWRITE, ALIGN=3
-Stack_Mem SPACE Stack_Size
-__initial_sp
-; not use external SRAM as data memory
-
-; Heap Configuration
-; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
-;
-
-Heap_Size EQU 0x00000000
-
- AREA HEAP, NOINIT, READWRITE, ALIGN=3
-__heap_base
-Heap_Mem SPACE Heap_Size
-__heap_limit
-
- PRESERVE8
- THUMB
-
- IMPORT rt_hw_hard_fault
- IMPORT rt_hw_pend_sv
- IMPORT rt_hw_timer_handler
-
-; Vector Table Mapped to Address 0 at Reset
- AREA RESET, DATA, READONLY
- EXPORT __Vectors
- EXPORT __Vectors_End
- EXPORT __Vectors_Size
-
-__Vectors DCD __initial_sp ; Top of Stack
- DCD Reset_Handler ; Reset Handler
- DCD NMI_Handler ; NMI Handler
- DCD rt_hw_hard_fault ; Hard Fault Handler
- DCD MemManage_Handler ; MPU Fault Handler
- DCD BusFault_Handler ; Bus Fault Handler
- DCD UsageFault_Handler ; Usage Fault Handler
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD SVC_Handler ; SVCall Handler
- DCD DebugMon_Handler ; Debug Monitor Handler
- DCD 0 ; Reserved
- DCD rt_hw_pend_sv ; PendSV Handler in RT-Thread
- DCD rt_hw_timer_handler ; SysTick Handler in RT-Thread
-
- ; External Interrupts
- DCD WWDG_IRQHandler ; Window Watchdog
- DCD PVD_IRQHandler ; PVD through EXTI Line detect
- DCD TAMPER_IRQHandler ; Tamper
- DCD RTC_IRQHandler ; RTC
- DCD FLASH_IRQHandler ; Flash
- DCD RCC_IRQHandler ; RCC
- DCD EXTI0_IRQHandler ; EXTI Line 0
- DCD EXTI1_IRQHandler ; EXTI Line 1
- DCD EXTI2_IRQHandler ; EXTI Line 2
- DCD EXTI3_IRQHandler ; EXTI Line 3
- DCD EXTI4_IRQHandler ; EXTI Line 4
- DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
- DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
- DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
- DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
- DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
- DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
- DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
- DCD ADC1_2_IRQHandler ; ADC1 and ADC2
- DCD USB_HP_CAN1_TX_IRQHandler ; USB High Priority or CAN1 TX
- DCD USB_LP_CAN1_RX0_IRQHandler ; USB Low Priority or CAN1 RX0
- DCD CAN1_RX1_IRQHandler ; CAN1 RX1
- DCD CAN1_SCE_IRQHandler ; CAN1 SCE
- DCD EXTI9_5_IRQHandler ; EXTI Line 9..5
- DCD TIM1_BRK_IRQHandler ; TIM1 Break
- DCD TIM1_UP_IRQHandler ; TIM1 Update
- DCD TIM1_TRG_COM_IRQHandler ; TIM1 Trigger and Commutation
- DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
- DCD TIM2_IRQHandler ; TIM2
- DCD TIM3_IRQHandler ; TIM3
- DCD TIM4_IRQHandler ; TIM4
- DCD I2C1_EV_IRQHandler ; I2C1 Event
- DCD I2C1_ER_IRQHandler ; I2C1 Error
- DCD I2C2_EV_IRQHandler ; I2C2 Event
- DCD I2C2_ER_IRQHandler ; I2C2 Error
- DCD SPI1_IRQHandler ; SPI1
- DCD SPI2_IRQHandler ; SPI2
- DCD USART1_IRQHandler ; USART1
- DCD USART2_IRQHandler ; USART2
- DCD USART3_IRQHandler ; USART3
- DCD EXTI15_10_IRQHandler ; EXTI Line 15..10
- DCD RTCAlarm_IRQHandler ; RTC Alarm through EXTI Line
- DCD OTG_FS_WKUP_IRQHandler ; USB OTG FS Wakeup through EXTI line
- DCD TIM8_BRK_IRQHandler ; TIM8 Break
- DCD TIM8_UP_IRQHandler ; TIM8 Update
- DCD TIM8_TRG_COM_IRQHandler ; TIM8 Trigger and Commutation
- DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare
- DCD ADC3_IRQHandler ; ADC3
- DCD FSMC_IRQHandler ; FSMC
- DCD SDIO_IRQHandler ; SDIO
- DCD TIM5_IRQHandler ; TIM5
- DCD SPI3_IRQHandler ; SPI3
- DCD UART4_IRQHandler ; UART4
- DCD UART5_IRQHandler ; UART5
- DCD TIM6_IRQHandler ; TIM6
- DCD TIM7_IRQHandler ; TIM7
- DCD DMA2_Channel1_IRQHandler ; DMA2 Channel1
- DCD DMA2_Channel2_IRQHandler ; DMA2 Channel2
- DCD DMA2_Channel3_IRQHandler ; DMA2 Channel3
- DCD DMA2_Channel4_5_IRQHandler ; DMA2 Channel4 and Channel5
- ; for STM32F10x Connectivity line devices
- DCD DMA2_Channel5_IRQHandler ; DMA2 Channel5
- DCD ETH_IRQHandler ; Ethernet
- DCD ETH_WKUP_IRQHandler ; Ethernet Wakeup through EXTI line
- DCD CAN2_TX_IRQHandler ; CAN2 TX
- DCD CAN2_RX0_IRQHandler ; CAN2 RX0
- DCD CAN2_RX1_IRQHandler ; CAN2 RX1
- DCD CAN2_SCE_IRQHandler ; CAN2 SCE
- DCD OTG_FS_IRQHandler ; USB OTG FS
- ; for STM32F2xx
-
-__Vectors_End
-
-__Vectors_Size EQU __Vectors_End - __Vectors
-
- AREA |.text|, CODE, READONLY
-
-; Reset handler routine
-Reset_Handler PROC
- EXPORT Reset_Handler [WEAK]
- IMPORT __main
-
- LDR R1, = __initial_sp ; restore original stack pointer
- MSR MSP, R1
-
- LDR R0, =__main
- BX R0
- ENDP
-
-; Dummy Exception Handlers (infinite loops which can be modified)
-
-NMI_Handler PROC
- EXPORT NMI_Handler [WEAK]
- B .
- ENDP
-HardFault_Handler\
- PROC
- EXPORT HardFault_Handler [WEAK]
- B .
- ENDP
-MemManage_Handler\
- PROC
- EXPORT MemManage_Handler [WEAK]
- B .
- ENDP
-BusFault_Handler\
- PROC
- EXPORT BusFault_Handler [WEAK]
- B .
- ENDP
-UsageFault_Handler\
- PROC
- EXPORT UsageFault_Handler [WEAK]
- B .
- ENDP
-SVC_Handler PROC
- EXPORT SVC_Handler [WEAK]
- B .
- ENDP
-DebugMon_Handler\
- PROC
- EXPORT DebugMon_Handler [WEAK]
- B .
- ENDP
-
-Default_Handler PROC
-
- EXPORT WWDG_IRQHandler [WEAK]
- EXPORT PVD_IRQHandler [WEAK]
- EXPORT TAMPER_IRQHandler [WEAK]
- EXPORT RTC_IRQHandler [WEAK]
- EXPORT FLASH_IRQHandler [WEAK]
- EXPORT RCC_IRQHandler [WEAK]
- EXPORT EXTI0_IRQHandler [WEAK]
- EXPORT EXTI1_IRQHandler [WEAK]
- EXPORT EXTI2_IRQHandler [WEAK]
- EXPORT EXTI3_IRQHandler [WEAK]
- EXPORT EXTI4_IRQHandler [WEAK]
- EXPORT DMA1_Channel1_IRQHandler [WEAK]
- EXPORT DMA1_Channel2_IRQHandler [WEAK]
- EXPORT DMA1_Channel3_IRQHandler [WEAK]
- EXPORT DMA1_Channel4_IRQHandler [WEAK]
- EXPORT DMA1_Channel5_IRQHandler [WEAK]
- EXPORT DMA1_Channel6_IRQHandler [WEAK]
- EXPORT DMA1_Channel7_IRQHandler [WEAK]
- EXPORT ADC1_2_IRQHandler [WEAK]
- EXPORT USB_HP_CAN1_TX_IRQHandler [WEAK]
- EXPORT USB_LP_CAN1_RX0_IRQHandler [WEAK]
- EXPORT CAN1_RX1_IRQHandler [WEAK]
- EXPORT CAN1_SCE_IRQHandler [WEAK]
- EXPORT EXTI9_5_IRQHandler [WEAK]
- EXPORT TIM1_BRK_IRQHandler [WEAK]
- EXPORT TIM1_UP_IRQHandler [WEAK]
- EXPORT TIM1_TRG_COM_IRQHandler [WEAK]
- EXPORT TIM1_CC_IRQHandler [WEAK]
- EXPORT TIM2_IRQHandler [WEAK]
- EXPORT TIM3_IRQHandler [WEAK]
- EXPORT TIM4_IRQHandler [WEAK]
- EXPORT I2C1_EV_IRQHandler [WEAK]
- EXPORT I2C1_ER_IRQHandler [WEAK]
- EXPORT I2C2_EV_IRQHandler [WEAK]
- EXPORT I2C2_ER_IRQHandler [WEAK]
- EXPORT SPI1_IRQHandler [WEAK]
- EXPORT SPI2_IRQHandler [WEAK]
- EXPORT USART1_IRQHandler [WEAK]
- EXPORT USART2_IRQHandler [WEAK]
- EXPORT USART3_IRQHandler [WEAK]
- EXPORT EXTI15_10_IRQHandler [WEAK]
- EXPORT RTCAlarm_IRQHandler [WEAK]
- EXPORT OTG_FS_WKUP_IRQHandler [WEAK]
- EXPORT TIM8_BRK_IRQHandler [WEAK]
- EXPORT TIM8_UP_IRQHandler [WEAK]
- EXPORT TIM8_TRG_COM_IRQHandler [WEAK]
- EXPORT TIM8_CC_IRQHandler [WEAK]
- EXPORT ADC3_IRQHandler [WEAK]
- EXPORT FSMC_IRQHandler [WEAK]
- EXPORT SDIO_IRQHandler [WEAK]
- EXPORT TIM5_IRQHandler [WEAK]
- EXPORT SPI3_IRQHandler [WEAK]
- EXPORT UART4_IRQHandler [WEAK]
- EXPORT UART5_IRQHandler [WEAK]
- EXPORT TIM6_IRQHandler [WEAK]
- EXPORT TIM7_IRQHandler [WEAK]
- EXPORT DMA2_Channel1_IRQHandler [WEAK]
- EXPORT DMA2_Channel2_IRQHandler [WEAK]
- EXPORT DMA2_Channel3_IRQHandler [WEAK]
- EXPORT DMA2_Channel4_5_IRQHandler [WEAK]
- ; for STM32F10x Connectivity line devices
- EXPORT DMA2_Channel5_IRQHandler [WEAK]
- EXPORT ETH_IRQHandler [WEAK]
- EXPORT ETH_WKUP_IRQHandler [WEAK]
- EXPORT CAN2_TX_IRQHandler [WEAK]
- EXPORT CAN2_RX0_IRQHandler [WEAK]
- EXPORT CAN2_RX1_IRQHandler [WEAK]
- EXPORT CAN2_SCE_IRQHandler [WEAK]
- EXPORT OTG_FS_IRQHandler [WEAK]
-
-WWDG_IRQHandler
-PVD_IRQHandler
-TAMPER_IRQHandler
-RTC_IRQHandler
-FLASH_IRQHandler
-RCC_IRQHandler
-EXTI0_IRQHandler
-EXTI1_IRQHandler
-EXTI2_IRQHandler
-EXTI3_IRQHandler
-EXTI4_IRQHandler
-DMA1_Channel1_IRQHandler
-DMA1_Channel2_IRQHandler
-DMA1_Channel3_IRQHandler
-DMA1_Channel4_IRQHandler
-DMA1_Channel5_IRQHandler
-DMA1_Channel6_IRQHandler
-DMA1_Channel7_IRQHandler
-ADC1_2_IRQHandler
-USB_HP_CAN1_TX_IRQHandler
-USB_LP_CAN1_RX0_IRQHandler
-CAN1_RX1_IRQHandler
-CAN1_SCE_IRQHandler
-EXTI9_5_IRQHandler
-TIM1_BRK_IRQHandler
-TIM1_UP_IRQHandler
-TIM1_TRG_COM_IRQHandler
-TIM1_CC_IRQHandler
-TIM2_IRQHandler
-TIM3_IRQHandler
-TIM4_IRQHandler
-I2C1_EV_IRQHandler
-I2C1_ER_IRQHandler
-I2C2_EV_IRQHandler
-I2C2_ER_IRQHandler
-SPI1_IRQHandler
-SPI2_IRQHandler
-USART1_IRQHandler
-USART2_IRQHandler
-USART3_IRQHandler
-EXTI15_10_IRQHandler
-RTCAlarm_IRQHandler
-OTG_FS_WKUP_IRQHandler
-TIM8_BRK_IRQHandler
-TIM8_UP_IRQHandler
-TIM8_TRG_COM_IRQHandler
-TIM8_CC_IRQHandler
-ADC3_IRQHandler
-FSMC_IRQHandler
-SDIO_IRQHandler
-TIM5_IRQHandler
-SPI3_IRQHandler
-UART4_IRQHandler
-UART5_IRQHandler
-TIM6_IRQHandler
-TIM7_IRQHandler
-DMA2_Channel1_IRQHandler
-DMA2_Channel2_IRQHandler
-DMA2_Channel3_IRQHandler
-DMA2_Channel4_5_IRQHandler
-; for STM32F10x Connectivity line devices
-DMA2_Channel5_IRQHandler
-ETH_IRQHandler
-ETH_WKUP_IRQHandler
-CAN2_TX_IRQHandler
-CAN2_RX0_IRQHandler
-CAN2_RX1_IRQHandler
-CAN2_SCE_IRQHandler
-OTG_FS_IRQHandler
- B .
-
- ENDP
-
- ALIGN
-
-;*******************************************************************************
-; User Stack and Heap initialization
-;*******************************************************************************
- IF :DEF:__MICROLIB
-
- EXPORT __initial_sp
- EXPORT __heap_base
- EXPORT __heap_limit
-
- ELSE
-
- IMPORT __use_two_region_memory
- EXPORT __user_initial_stackheap
-
-__user_initial_stackheap
-
- LDR R0, = Heap_Mem
- LDR R1, =(Stack_Mem + Stack_Size)
- LDR R2, = (Heap_Mem + Heap_Size)
- LDR R3, = Stack_Mem
- BX LR
-
- ALIGN
-
- ENDIF
-
- END
-
-;******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE*****
-