From 5fd89e44618ddc4f6cd495c16df350aee7230d07 Mon Sep 17 00:00:00 2001 From: tanek liang Date: Thu, 7 Dec 2017 13:14:41 +0800 Subject: [PATCH 01/43] [bsp] update eth driver: fix phy init never timeout bug --- bsp/imxrt1052-evk/drivers/drv_eth.c | 163 +++++++++++++++------------- bsp/imxrt1052-evk/drivers/fsl_phy.c | 10 +- 2 files changed, 94 insertions(+), 79 deletions(-) diff --git a/bsp/imxrt1052-evk/drivers/drv_eth.c b/bsp/imxrt1052-evk/drivers/drv_eth.c index 8d02e26aea..79139753d9 100644 --- a/bsp/imxrt1052-evk/drivers/drv_eth.c +++ b/bsp/imxrt1052-evk/drivers/drv_eth.c @@ -28,7 +28,7 @@ #include #include "lwipopts.h" - + #define ENET_RXBD_NUM (4) #define ENET_TXBD_NUM (4) #define ENET_RXBUFF_SIZE (ENET_FRAME_MAX_FRAMELEN) @@ -36,16 +36,17 @@ #define PHY_ADDRESS 0x02u + + /* debug option */ -//#define DEBUG //#define ETH_RX_DUMP //#define ETH_TX_DUMP -#ifdef DEBUG -#define ETH_PRINTF rt_kprintf -#else -#define ETH_PRINTF(...) -#endif +#define DBG_ENABLE +#define DBG_SECTION_NAME "[ETH]" +#define DBG_COLOR +#define DBG_LEVEL DBG_INFO +#include #define MAX_ADDR_LEN 6 @@ -54,12 +55,12 @@ struct rt_imxrt_eth { /* inherit from ethernet device */ struct eth_device parent; - + enet_handle_t enet_handle; ENET_Type *enet_base; enet_data_error_stats_t error_statistic; rt_uint8_t dev_addr[MAX_ADDR_LEN]; /* hw address */ - + rt_bool_t tx_is_waiting; struct rt_semaphore tx_wait; }; @@ -75,9 +76,9 @@ static struct rt_imxrt_eth imxrt_eth_device; void _enet_rx_callback(struct rt_imxrt_eth * eth) { rt_err_t result; - + ENET_DisableInterrupts(eth->enet_base, kENET_RxFrameInterrupt); - + result = eth_device_ready(&(eth->parent)); if( result != RT_EOK ) rt_kprintf("RX err =%d\n", result ); @@ -97,30 +98,30 @@ void _enet_callback(ENET_Type *base, enet_handle_t *handle, enet_event_t event, switch(event) { case kENET_RxEvent: - + _enet_rx_callback((struct rt_imxrt_eth *)userData); break; - + case kENET_TxEvent: _enet_tx_callback((struct rt_imxrt_eth *)userData); break; - + case kENET_ErrEvent: //rt_kprintf("kENET_ErrEvent\n"); break; - + case kENET_WakeUpEvent: //rt_kprintf("kENET_WakeUpEvent\n"); break; - + case kENET_TimeStampEvent: //rt_kprintf("kENET_TimeStampEvent\n"); break; - + case kENET_TimeStampAvailEvent: //rt_kprintf("kENET_TimeStampAvailEvent \n"); break; - + default: //rt_kprintf("unknow error\n"); break; @@ -314,21 +315,21 @@ static void _enet_io_init(void) Pull Up / Down Config. Field: 100K Ohm Pull Up Hyst. Enable Field: Hysteresis Disabled */ - + } static void _enet_clk_init(void) { const clock_enet_pll_config_t config = {true, false, false, 1, 1}; CLOCK_InitEnetPll(&config); - + IOMUXC_EnableMode(IOMUXC_GPR, kIOMUXC_GPR_ENET1TxClkOutputDir, true); } static void _delay(void) { volatile int i = 1000000; - + while (i--) i = i; } @@ -336,7 +337,7 @@ static void _delay(void) static void _enet_phy_reset_by_gpio(void) { gpio_pin_config_t gpio_config = {kGPIO_DigitalOutput, 0, kGPIO_NoIntmode}; - + GPIO_PinInit(GPIO1, 9, &gpio_config); GPIO_PinInit(GPIO1, 10, &gpio_config); /* pull up the ENET_INT before RESET. */ @@ -354,7 +355,7 @@ static void _enet_config(void) phy_speed_t speed; phy_duplex_t duplex; bool link = false; - + /* prepare the buffer configuration. */ enet_buffer_config_t buffConfig = { ENET_RXBD_NUM, @@ -366,7 +367,7 @@ static void _enet_config(void) &g_rxDataBuff[0][0], &g_txDataBuff[0][0], }; - + /* Get default configuration. */ /* * config.miiMode = kENET_RmiiMode; @@ -377,26 +378,36 @@ static void _enet_config(void) ENET_GetDefaultConfig(&config); config.interrupt = kENET_TxFrameInterrupt | kENET_RxFrameInterrupt; //config.interrupt = 0xFFFFFFFF; - + /* Set SMI to get PHY link status. */ sysClock = CLOCK_GetFreq(kCLOCK_AhbClk); + status = PHY_Init(imxrt_eth_device.enet_base, PHY_ADDRESS, sysClock); - while (status != kStatus_Success) + + if (status == kStatus_Success) { - ETH_PRINTF("\r\nPHY Auto-negotiation failed. Please check the cable connection and link partner setting.\r\n"); - status = PHY_Init(imxrt_eth_device.enet_base, PHY_ADDRESS, sysClock); + PHY_GetLinkStatus(imxrt_eth_device.enet_base, PHY_ADDRESS, &link); + if (link) + { + /* Get the actual PHY link speed. */ + PHY_GetLinkSpeedDuplex(imxrt_eth_device.enet_base, PHY_ADDRESS, &speed, &duplex); + /* Change the MII speed and duplex for actual link status. */ + config.miiSpeed = (enet_mii_speed_t)speed; + config.miiDuplex = (enet_mii_duplex_t)duplex; + } + + dbg_log(DBG_LOG, "PHY Auto-negotiation success.\n"); + eth_device_linkchange(&imxrt_eth_device.parent, RT_TRUE); } - - PHY_GetLinkStatus(imxrt_eth_device.enet_base, PHY_ADDRESS, &link); - if (link) + else { - /* Get the actual PHY link speed. */ - PHY_GetLinkSpeedDuplex(imxrt_eth_device.enet_base, PHY_ADDRESS, &speed, &duplex); - /* Change the MII speed and duplex for actual link status. */ - config.miiSpeed = (enet_mii_speed_t)speed; - config.miiDuplex = (enet_mii_duplex_t)duplex; - } - + config.miiSpeed = kENET_MiiSpeed10M; + config.miiDuplex = kENET_MiiHalfDuplex; + + dbg_log(DBG_WARNING, "PHY Auto-negotiation failed. Please check the cable connection and link partner setting.\n"); + eth_device_linkchange(&imxrt_eth_device.parent, RT_FALSE); + } + ENET_Init(imxrt_eth_device.enet_base, &imxrt_eth_device.enet_handle, &config, &buffConfig, &imxrt_eth_device.dev_addr[0], sysClock); ENET_SetCallback(&imxrt_eth_device.enet_handle, _enet_callback, &imxrt_eth_device); ENET_ActiveRead(imxrt_eth_device.enet_base); @@ -408,7 +419,7 @@ static rt_err_t rt_imxrt_eth_init(rt_device_t dev) _enet_io_init(); _enet_clk_init(); _enet_phy_reset_by_gpio(); - + _enet_config(); return RT_EOK; @@ -416,33 +427,33 @@ static rt_err_t rt_imxrt_eth_init(rt_device_t dev) static rt_err_t rt_imxrt_eth_open(rt_device_t dev, rt_uint16_t oflag) { - ETH_PRINTF("rt_imxrt_eth_open...\n"); + dbg_log(DBG_LOG, "rt_imxrt_eth_open...\n"); return RT_EOK; } static rt_err_t rt_imxrt_eth_close(rt_device_t dev) { - ETH_PRINTF("rt_imxrt_eth_close...\n"); + dbg_log(DBG_LOG, "rt_imxrt_eth_close...\n"); return RT_EOK; } static rt_size_t rt_imxrt_eth_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size) { - ETH_PRINTF("rt_imxrt_eth_read...\n"); + dbg_log(DBG_LOG, "rt_imxrt_eth_read...\n"); rt_set_errno(-RT_ENOSYS); return 0; } static rt_size_t rt_imxrt_eth_write (rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size) { - ETH_PRINTF("rt_imxrt_eth_write...\n"); + dbg_log(DBG_LOG, "rt_imxrt_eth_write...\n"); rt_set_errno(-RT_ENOSYS); return 0; } static rt_err_t rt_imxrt_eth_control(rt_device_t dev, int cmd, void *args) { - ETH_PRINTF("rt_imxrt_eth_control...\n"); + dbg_log(DBG_LOG, "rt_imxrt_eth_control...\n"); switch(cmd) { case NIOCTL_GADDR: @@ -468,7 +479,7 @@ rt_err_t rt_imxrt_eth_tx( rt_device_t dev, struct pbuf* p) RT_ASSERT(p != NULL); RT_ASSERT(enet_handle != RT_NULL); - ETH_PRINTF("rt_imxrt_eth_tx: %d\n", p->len); + dbg_log(DBG_LOG, "rt_imxrt_eth_tx: %d\n", p->len); #ifdef ETH_TX_DUMP { @@ -477,11 +488,11 @@ rt_err_t rt_imxrt_eth_tx( rt_device_t dev, struct pbuf* p) buf = (uint8_t *)p->payload; for (i = 0; i < p->len; i++) { - ETH_PRINTF("%02X ", buf[i]); + dbg_log(DBG_LOG, "%02X ", buf[i]); if (i % 16 == 15) - ETH_PRINTF("\n"); + dbg_log(DBG_LOG, "\n"); } - ETH_PRINTF("\n"); + dbg_log(DBG_LOG, "\n"); } #endif @@ -504,12 +515,12 @@ struct pbuf *rt_imxrt_eth_rx(rt_device_t dev) { uint32_t length = 0; status_t status; - + struct pbuf* p = RT_NULL; enet_handle_t * enet_handle = &imxrt_eth_device.enet_handle; ENET_Type *enet_base = imxrt_eth_device.enet_base; enet_data_error_stats_t *error_statistic = &imxrt_eth_device.error_statistic; - + /* Get the Frame size */ status = ENET_GetRxFrameSize(enet_handle, &length); @@ -518,7 +529,7 @@ struct pbuf *rt_imxrt_eth_rx(rt_device_t dev) { /* Received valid frame. Deliver the rx buffer with the size equal to length. */ p = pbuf_alloc(PBUF_RAW, length, PBUF_POOL); - + if (p != NULL) { status = ENET_ReadFrame(enet_base, enet_handle, p->payload, length); @@ -532,28 +543,28 @@ struct pbuf *rt_imxrt_eth_rx(rt_device_t dev) buf = (uint8_t *)p->payload; for (i = 0; i < p->len; i++) { - ETH_PRINTF("%02X ", buf[i]); + dbg_log(DBG_LOG, "%02X ", buf[i]); if (i % 16 == 15) - ETH_PRINTF("\n"); + dbg_log(DBG_LOG, "\n"); } - ETH_PRINTF("\n"); + dbg_log(DBG_LOG, "\n"); #endif return p; } else { - ETH_PRINTF(" A frame read failed\n"); + dbg_log(DBG_LOG, " A frame read failed\n"); pbuf_free(p); } } else { - ETH_PRINTF(" pbuf_alloc faild\n"); + dbg_log(DBG_LOG, " pbuf_alloc faild\n"); } } else if (status == kStatus_ENET_RxFrameError) { - ETH_PRINTF("ENET_GetRxFrameSize: kStatus_ENET_RxFrameError\n"); + dbg_log(DBG_WARNING, "ENET_GetRxFrameSize: kStatus_ENET_RxFrameError\n"); /* Update the received buffer when error happened. */ /* Get the error information of the received g_frame. */ ENET_GetRxErrBeforeReadFrame(enet_handle, error_statistic); @@ -577,7 +588,7 @@ static int rt_hw_imxrt_eth_init(void) imxrt_eth_device.dev_addr[3] = 0x12; imxrt_eth_device.dev_addr[4] = 0x34; imxrt_eth_device.dev_addr[5] = 0x56; - + imxrt_eth_device.enet_base = ENET; imxrt_eth_device.parent.parent.init = rt_imxrt_eth_init; @@ -591,20 +602,20 @@ static int rt_hw_imxrt_eth_init(void) imxrt_eth_device.parent.eth_rx = rt_imxrt_eth_rx; imxrt_eth_device.parent.eth_tx = rt_imxrt_eth_tx; - ETH_PRINTF("sem init: tx_wait\r\n"); + dbg_log(DBG_LOG, "sem init: tx_wait\r\n"); /* init tx semaphore */ rt_sem_init(&imxrt_eth_device.tx_wait, "tx_wait", 0, RT_IPC_FLAG_FIFO); /* register eth device */ - ETH_PRINTF("eth_device_init start\r\n"); + dbg_log(DBG_LOG, "eth_device_init start\r\n"); state = eth_device_init(&(imxrt_eth_device.parent), "e0"); if (RT_EOK == state) { - ETH_PRINTF("eth_device_init success\r\n"); + dbg_log(DBG_LOG, "eth_device_init success\r\n"); } else { - ETH_PRINTF("eth_device_init faild: %d\r\n", state); + dbg_log(DBG_LOG, "eth_device_init faild: %d\r\n", state); } return state; } @@ -618,7 +629,7 @@ void phy_read(uint32_t phyReg) { uint32_t data; status_t status; - + status = PHY_Read(imxrt_eth_device.enet_base, PHY_ADDRESS, phyReg, &data); if (kStatus_Success == status) { @@ -633,7 +644,7 @@ void phy_read(uint32_t phyReg) void phy_write(uint32_t phyReg, uint32_t data) { status_t status; - + status = PHY_Write(imxrt_eth_device.enet_base, PHY_ADDRESS, phyReg, data); if (kStatus_Success == status) { @@ -649,7 +660,7 @@ void phy_dump(void) { uint32_t data; status_t status; - + int i; for (i = 0; i < 32; i++) { @@ -659,7 +670,7 @@ void phy_dump(void) rt_kprintf("phy_dump: %02X --> faild", i); break; } - + if (i % 8 == 7) { rt_kprintf("%02X --> %08X ", i, data); @@ -668,17 +679,17 @@ void phy_dump(void) { rt_kprintf("%02X --> %08X\n", i, data); } - + } } void enet_reg_dump(void) { ENET_Type *enet_base = imxrt_eth_device.enet_base; - + #define DUMP_REG(__REG) \ rt_kprintf("%s(%08X): %08X\n", #__REG, (uint32_t)&enet_base->__REG, enet_base->__REG) - + DUMP_REG(EIR); DUMP_REG(EIMR); DUMP_REG(RDAR); @@ -785,16 +796,16 @@ void enet_nvic_tog(void) void enet_rx_stat(void) { enet_data_error_stats_t *error_statistic = &imxrt_eth_device.error_statistic; - + #define DUMP_STAT(__VAR) \ rt_kprintf("%-25s: %08X\n", #__VAR, error_statistic->__VAR); - + DUMP_STAT(statsRxLenGreaterErr); DUMP_STAT(statsRxAlignErr); DUMP_STAT(statsRxFcsErr); DUMP_STAT(statsRxOverRunErr); DUMP_STAT(statsRxTruncateErr); - + #ifdef ENET_ENHANCEDBUFFERDESCRIPTOR_MODE DUMP_STAT(statsRxProtocolChecksumErr); DUMP_STAT(statsRxIpHeadChecksumErr); @@ -808,8 +819,8 @@ void enet_rx_stat(void) DUMP_STAT(statsTxExcessCollisionErr); DUMP_STAT(statsTxUnderFlowErr); DUMP_STAT(statsTxTsErr); -#endif - +#endif + } void enet_buf_info(void) @@ -818,7 +829,7 @@ void enet_buf_info(void) int i = 0; for (i = 0; i < ENET_RXBD_NUM; i++) { - rt_kprintf("%d: length: %-8d, control: %04X, buffer:%p\n", + rt_kprintf("%d: length: %-8d, control: %04X, buffer:%p\n", i, g_rxBuffDescrip[i].length, g_rxBuffDescrip[i].control, @@ -827,7 +838,7 @@ void enet_buf_info(void) for (i = 0; i < ENET_TXBD_NUM; i++) { - rt_kprintf("%d: length: %-8d, control: %04X, buffer:%p\n", + rt_kprintf("%d: length: %-8d, control: %04X, buffer:%p\n", i, g_txBuffDescrip[i].length, g_txBuffDescrip[i].control, diff --git a/bsp/imxrt1052-evk/drivers/fsl_phy.c b/bsp/imxrt1052-evk/drivers/fsl_phy.c index ec8443244b..d835e758e0 100644 --- a/bsp/imxrt1052-evk/drivers/fsl_phy.c +++ b/bsp/imxrt1052-evk/drivers/fsl_phy.c @@ -29,12 +29,13 @@ */ #include "fsl_phy.h" +#include /******************************************************************************* * Definitions ******************************************************************************/ /*! @brief Defines the timeout macro. */ -#define PHY_TIMEOUT_COUNT 0x3FFFFFFU +#define PHY_TIMEOUT_COUNT 0xFFFFU /******************************************************************************* * Prototypes @@ -83,14 +84,14 @@ status_t PHY_Init(ENET_Type *base, uint32_t phyAddr, uint32_t srcClock_Hz) PHY_Read(base, phyAddr, PHY_ID1_REG, &idReg); counter --; } - + if (!counter) { return kStatus_Fail; } /* Reset PHY. */ - counter = PHY_TIMEOUT_COUNT; + counter = 6; result = PHY_Write(base, phyAddr, PHY_BASICCONTROL_REG, PHY_BCTL_RESET_MASK); if (result == kStatus_Success) { @@ -136,6 +137,9 @@ status_t PHY_Init(ENET_Type *base, uint32_t phyAddr, uint32_t srcClock_Hz) break; } } + + rt_kprintf("[PHY] wait autonegotiation complete...\n"); + rt_thread_delay(RT_TICK_PER_SECOND); if (!counter) { From 6a88e5b20ee402707436c5150944b7f97d8f98d8 Mon Sep 17 00:00:00 2001 From: tanek liang Date: Thu, 7 Dec 2017 13:15:52 +0800 Subject: [PATCH 02/43] [bsp]clean code --- bsp/imxrt1052-evk/drivers/usart.c | 25 ++++++++++++------------- 1 file changed, 12 insertions(+), 13 deletions(-) diff --git a/bsp/imxrt1052-evk/drivers/usart.c b/bsp/imxrt1052-evk/drivers/usart.c index cab1a051d7..0635eaee5c 100644 --- a/bsp/imxrt1052-evk/drivers/usart.c +++ b/bsp/imxrt1052-evk/drivers/usart.c @@ -27,7 +27,7 @@ #error "Please define at least one UARTx" #endif - + #include /* imxrt uart driver */ @@ -130,7 +130,7 @@ static const struct imxrt_uart uarts[] = { "uart1", }, #endif - + }; /* Get debug console frequency. */ @@ -210,9 +210,9 @@ static rt_err_t imxrt_configure(struct rt_serial_device *serial, struct serial_c RT_ASSERT(cfg != RT_NULL); uart = (struct imxrt_uart *)serial->parent.user_data; - + imxrt_uart_gpio_init(uart); - + LPUART_GetDefaultConfig(&config); config.baudRate_Bps = cfg->baud_rate; @@ -249,13 +249,13 @@ static rt_err_t imxrt_configure(struct rt_serial_device *serial, struct serial_c config.parityMode = kLPUART_ParityDisabled; break; } - + config.enableTx = true; config.enableRx = true; - + LPUART_Init(uart->uart_base, &config, BOARD_DebugConsoleSrcFreq()); - - + + return RT_EOK; } @@ -273,7 +273,7 @@ static rt_err_t imxrt_control(struct rt_serial_device *serial, int cmd, void *ar LPUART_DisableInterrupts(uart->uart_base, kLPUART_RxDataRegFullInterruptEnable); /* disable rx irq */ DisableIRQ(uart->irqn); - + break; case RT_DEVICE_CTRL_SET_INT: /* enable interrupt */ @@ -295,7 +295,7 @@ static int imxrt_putc(struct rt_serial_device *serial, char ch) LPUART_WriteByte(uart->uart_base, ch); while(!(LPUART_GetStatusFlags(uart->uart_base) & kLPUART_TxDataRegEmptyFlag)); - + return 1; } @@ -323,7 +323,7 @@ static void uart_isr(struct rt_serial_device *serial) struct imxrt_uart *uart = (struct imxrt_uart *) serial->parent.user_data; RT_ASSERT(uart != RT_NULL); - + /* enter interrupt */ rt_interrupt_enter(); @@ -332,7 +332,7 @@ static void uart_isr(struct rt_serial_device *serial) { rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND); } - + /* leave interrupt */ rt_interrupt_leave(); } @@ -350,7 +350,6 @@ int imxrt_hw_usart_init(void) struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT; int i; - for (i = 0; i < sizeof(uarts) / sizeof(uarts[0]); i++) { uarts[i].serial->ops = &imxrt_uart_ops; From 68f13f5d92b08cc9148e6fbdd92b9ae40b630a6c Mon Sep 17 00:00:00 2001 From: tanek liang Date: Thu, 7 Dec 2017 13:25:11 +0800 Subject: [PATCH 03/43] [bsp] add sdram driver --- bsp/imxrt1052-evk/drivers/SConscript | 1 + bsp/imxrt1052-evk/drivers/board.c | 78 ++++++++++- bsp/imxrt1052-evk/drivers/board.h | 22 ++- bsp/imxrt1052-evk/drivers/drv_sdram.c | 195 ++++++++++++++++++++++++++ 4 files changed, 285 insertions(+), 11 deletions(-) create mode 100644 bsp/imxrt1052-evk/drivers/drv_sdram.c diff --git a/bsp/imxrt1052-evk/drivers/SConscript b/bsp/imxrt1052-evk/drivers/SConscript index 1b44c183d0..6b735fe58c 100644 --- a/bsp/imxrt1052-evk/drivers/SConscript +++ b/bsp/imxrt1052-evk/drivers/SConscript @@ -8,6 +8,7 @@ cwd = os.path.join(str(Dir('#')), 'drivers') src = Split(""" board.c usart.c +drv_sdram.c """) CPPPATH = [cwd] diff --git a/bsp/imxrt1052-evk/drivers/board.c b/bsp/imxrt1052-evk/drivers/board.c index 5060c9eae2..0e0955de88 100644 --- a/bsp/imxrt1052-evk/drivers/board.c +++ b/bsp/imxrt1052-evk/drivers/board.c @@ -18,6 +18,8 @@ #include "board.h" #include "usart.h" +static struct rt_memheap system_heap; + /* ARM PLL configuration for RUN mode */ const clock_arm_pll_config_t armPllConfig = { .loopDivider = 100U }; @@ -83,6 +85,64 @@ static void BOARD_BootClockRUN(void) } +/* MPU configuration. */ +static void BOARD_ConfigMPU(void) +{ + /* Disable I cache and D cache */ + SCB_DisableICache(); + SCB_DisableDCache(); + + /* Disable MPU */ + ARM_MPU_Disable(); + + /* Region 0 setting */ + MPU->RBAR = ARM_MPU_RBAR(0, 0xC0000000U); + MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 2, 0, 0, 0, 0, ARM_MPU_REGION_SIZE_512MB); + + /* Region 1 setting */ + MPU->RBAR = ARM_MPU_RBAR(1, 0x80000000U); + MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 2, 0, 0, 0, 0, ARM_MPU_REGION_SIZE_1GB); + + /* Region 2 setting */ + // spi flash: normal type, cacheable, no bufferable, no shareable + MPU->RBAR = ARM_MPU_RBAR(2, 0x60000000U); + MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 0, 0, 1, 0, 0, ARM_MPU_REGION_SIZE_512MB); + + /* Region 3 setting */ + MPU->RBAR = ARM_MPU_RBAR(3, 0x00000000U); + MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 2, 0, 0, 0, 0, ARM_MPU_REGION_SIZE_1GB); + + /* Region 4 setting */ + MPU->RBAR = ARM_MPU_RBAR(4, 0x00000000U); + MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 0, 0, 1, 1, 0, ARM_MPU_REGION_SIZE_128KB); + + /* Region 5 setting */ + MPU->RBAR = ARM_MPU_RBAR(5, 0x20000000U); + MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 0, 0, 1, 1, 0, ARM_MPU_REGION_SIZE_128KB); + + /* Region 6 setting */ + MPU->RBAR = ARM_MPU_RBAR(6, 0x20200000U); + MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 0, 0, 1, 1, 0, ARM_MPU_REGION_SIZE_256KB); + +#if defined(SDRAM_MPU_INIT) + /* Region 7 setting */ + MPU->RBAR = ARM_MPU_RBAR(7, 0x80000000U); + MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 0, 0, 1, 1, 0, ARM_MPU_REGION_SIZE_32MB); + + /* Region 8 setting */ + MPU->RBAR = ARM_MPU_RBAR(8, 0x81E00000U); + MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 1, 1, 0, 0, 0, ARM_MPU_REGION_SIZE_2MB); +#endif + + /* Enable MPU */ + ARM_MPU_Enable(MPU_CTRL_PRIVDEFENA_Msk); + + /* Enable I cache and D cache */ + SCB_EnableDCache(); + SCB_EnableICache(); +} + + /** * This is the timer interrupt service routine. * @@ -98,17 +158,23 @@ void SysTick_Handler(void) rt_interrupt_leave(); } +void rt_lowlevel_init(void) +{ + BOARD_ConfigMPU(); + + extern int imxrt_sdram_init(void); + imxrt_sdram_init(); +} + /** * This function will initial LPC8XX board. */ void rt_hw_board_init() { BOARD_BootClockRUN(); + SysTick_Config(SystemCoreClock / RT_TICK_PER_SECOND); - - extern int imxrt_hw_usart_init(void); - imxrt_hw_usart_init(); #ifdef RT_USING_COMPONENTS_INIT rt_components_board_init(); @@ -119,7 +185,11 @@ void rt_hw_board_init() #endif #ifdef RT_USING_HEAP - rt_system_heap_init((void*)HEAP_BEGIN, (void*)HEAP_END); + rt_kprintf("sdram heap, begin: 0x%p, end: 0x%p\n", SDRAM_BEGIN, SDRAM_END); + rt_system_heap_init((void*)SDRAM_BEGIN, (void*)SDRAM_END); + + rt_kprintf("sram heap, begin: 0x%p, end: 0x%p\n", HEAP_BEGIN, HEAP_END); + rt_memheap_init(&system_heap, "system", (void *)HEAP_BEGIN, HEAP_SIZE); #endif } diff --git a/bsp/imxrt1052-evk/drivers/board.h b/bsp/imxrt1052-evk/drivers/board.h index a356254c76..43b2580552 100644 --- a/bsp/imxrt1052-evk/drivers/board.h +++ b/bsp/imxrt1052-evk/drivers/board.h @@ -21,18 +21,26 @@ #include #ifdef __CC_ARM -extern int Image$$RW_m_data$$ZI$$Limit; -#define HEAP_BEGIN (&Image$$RW_m_data$$ZI$$Limit) +extern int Image$$ARM_LIB_STACK$$ZI$$Limit; +#define HEAP_BEGIN (&Image$$ARM_LIB_STACK$$ZI$$Limit) +#define HEAP_END (0x2001FFFFu) + #elif __ICCARM__ #pragma section="HEAP" -#define HEAP_BEGIN (__segment_end("HEAP")) +#define HEAP_BEGIN (__segment_end("HEAP")) +#define HEAP_END (0x2001FFFFu) + #else -extern int __data_end__; -#define HEAP_BEGIN (&__data_end__) +extern int heap_start; +#define HEAP_BEGIN (&heap_start) +#define HEAP_END (0x2001FFFFu) #endif -#define HEAP_END 0x81DFFFFF -//#define HEAP_END 0x2001FFFF +#define HEAP_SIZE ((uint32_t)HEAP_END - (uint32_t)HEAP_BEGIN) + +#define SDRAM_MPU_INIT +#define SDRAM_BEGIN (0x80000000u) +#define SDRAM_END (0x81E00000u) void rt_hw_board_init(void); diff --git a/bsp/imxrt1052-evk/drivers/drv_sdram.c b/bsp/imxrt1052-evk/drivers/drv_sdram.c new file mode 100644 index 0000000000..2560caab5e --- /dev/null +++ b/bsp/imxrt1052-evk/drivers/drv_sdram.c @@ -0,0 +1,195 @@ +/* + * File : board.c + * This file is part of RT-Thread RTOS + * COPYRIGHT (C) 2009 RT-Thread Develop Team + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.rt-thread.org/license/LICENSE + * + * Change Logs: + * Date Author Notes + * 2017-12-04 Tanek first implementation + */ +#include +#include +#include + +static uint32_t _RDWORD(uint32_t address) +{ + return *((uint32_t *)address); +} + +static void _WDWORD(uint32_t address, uint32_t value) +{ + *((uint32_t *)address) = value; +} + +static void SDRAM_WaitIpCmdDone(void) +{ + unsigned long reg; + do + { + reg = _RDWORD(0x402F003C); + }while((reg & 0x3) == 0); +} + +static void _clock_init(void) +{ + // Enable all clocks + _WDWORD(0x400FC068,0xffffffff); + _WDWORD(0x400FC06C,0xffffffff); + _WDWORD(0x400FC070,0xffffffff); + _WDWORD(0x400FC074,0xffffffff); + _WDWORD(0x400FC078,0xffffffff); + _WDWORD(0x400FC07C,0xffffffff); + _WDWORD(0x400FC080,0xffffffff); + + _WDWORD(0x400D8030,0x00002001); + _WDWORD(0x400D8100,0x001d0000); + _WDWORD(0x400FC014,0x00010D40); +} + +static void _sdr_Init(void) +{ + // Config IOMUX + _WDWORD(0x401F8014, 0x00000000); + _WDWORD(0x401F8018, 0x00000000); + _WDWORD(0x401F801C, 0x00000000); + _WDWORD(0x401F8020, 0x00000000); + _WDWORD(0x401F8024, 0x00000000); + _WDWORD(0x401F8028, 0x00000000); + _WDWORD(0x401F802C, 0x00000000); + _WDWORD(0x401F8030, 0x00000000); + _WDWORD(0x401F8034, 0x00000000); + _WDWORD(0x401F8038, 0x00000000); + _WDWORD(0x401F803C, 0x00000000); + _WDWORD(0x401F8040, 0x00000000); + _WDWORD(0x401F8044, 0x00000000); + _WDWORD(0x401F8048, 0x00000000); + _WDWORD(0x401F804C, 0x00000000); + _WDWORD(0x401F8050, 0x00000000); + _WDWORD(0x401F8054, 0x00000000); + _WDWORD(0x401F8058, 0x00000000); + _WDWORD(0x401F805C, 0x00000000); + _WDWORD(0x401F8060, 0x00000000); + _WDWORD(0x401F8064, 0x00000000); + _WDWORD(0x401F8068, 0x00000000); + _WDWORD(0x401F806C, 0x00000000); + _WDWORD(0x401F8070, 0x00000000); + _WDWORD(0x401F8074, 0x00000000); + _WDWORD(0x401F8078, 0x00000000); + _WDWORD(0x401F807C, 0x00000000); + _WDWORD(0x401F8080, 0x00000000); + _WDWORD(0x401F8084, 0x00000000); + _WDWORD(0x401F8088, 0x00000000); + _WDWORD(0x401F808C, 0x00000000); + _WDWORD(0x401F8090, 0x00000000); + _WDWORD(0x401F8094, 0x00000000); + _WDWORD(0x401F8098, 0x00000000); + _WDWORD(0x401F809C, 0x00000000); + _WDWORD(0x401F80A0, 0x00000000); + _WDWORD(0x401F80A4, 0x00000000); + _WDWORD(0x401F80A8, 0x00000000); + _WDWORD(0x401F80AC, 0x00000000); + _WDWORD(0x401F80B0, 0x00000010); // EMC_39, DQS PIN, enable SION + _WDWORD(0x401F80B4, 0x00000000); + _WDWORD(0x401F80B8, 0x00000000); + + // PAD ctrl + // drive strength = 0x7 to increase drive strength + // otherwise the data7 bit may fail. + _WDWORD(0x401F8204, 0x000110F9); + _WDWORD(0x401F8208, 0x000110F9); + _WDWORD(0x401F820C, 0x000110F9); + _WDWORD(0x401F8210, 0x000110F9); + _WDWORD(0x401F8214, 0x000110F9); + _WDWORD(0x401F8218, 0x000110F9); + _WDWORD(0x401F821C, 0x000110F9); + _WDWORD(0x401F8220, 0x000110F9); + _WDWORD(0x401F8224, 0x000110F9); + _WDWORD(0x401F8228, 0x000110F9); + _WDWORD(0x401F822C, 0x000110F9); + _WDWORD(0x401F8230, 0x000110F9); + _WDWORD(0x401F8234, 0x000110F9); + _WDWORD(0x401F8238, 0x000110F9); + _WDWORD(0x401F823C, 0x000110F9); + _WDWORD(0x401F8240, 0x000110F9); + _WDWORD(0x401F8244, 0x000110F9); + _WDWORD(0x401F8248, 0x000110F9); + _WDWORD(0x401F824C, 0x000110F9); + _WDWORD(0x401F8250, 0x000110F9); + _WDWORD(0x401F8254, 0x000110F9); + _WDWORD(0x401F8258, 0x000110F9); + _WDWORD(0x401F825C, 0x000110F9); + _WDWORD(0x401F8260, 0x000110F9); + _WDWORD(0x401F8264, 0x000110F9); + _WDWORD(0x401F8268, 0x000110F9); + _WDWORD(0x401F826C, 0x000110F9); + _WDWORD(0x401F8270, 0x000110F9); + _WDWORD(0x401F8274, 0x000110F9); + _WDWORD(0x401F8278, 0x000110F9); + _WDWORD(0x401F827C, 0x000110F9); + _WDWORD(0x401F8280, 0x000110F9); + _WDWORD(0x401F8284, 0x000110F9); + _WDWORD(0x401F8288, 0x000110F9); + _WDWORD(0x401F828C, 0x000110F9); + _WDWORD(0x401F8290, 0x000110F9); + _WDWORD(0x401F8294, 0x000110F9); + _WDWORD(0x401F8298, 0x000110F9); + _WDWORD(0x401F829C, 0x000110F9); + _WDWORD(0x401F82A0, 0x000110F9); + _WDWORD(0x401F82A4, 0x000110F9); + _WDWORD(0x401F82A8, 0x000110F9); + + // Config SDR Controller Registers/ + _WDWORD(0x402F0000,0x10000004); // MCR + _WDWORD(0x402F0008,0x00030524); // BMCR0 + _WDWORD(0x402F000C,0x06030524); // BMCR1 + _WDWORD(0x402F0010,0x8000001B); // BR0, 32MB + _WDWORD(0x402F0014,0x8200001B); // BR1, 32MB + _WDWORD(0x402F0018,0x8400001B); // BR2, 32MB + _WDWORD(0x402F001C,0x8600001B); // BR3, 32MB + _WDWORD(0x402F0020,0x90000021); // BR4, + _WDWORD(0x402F0024,0xA0000019); // BR5, + _WDWORD(0x402F0028,0xA8000017); // BR6, + _WDWORD(0x402F002C,0xA900001B); // BR7, + _WDWORD(0x402F0030,0x00000021); // BR8, + _WDWORD(0x402F0004,0x000079A8); //IOCR,SEMC_CCSX0 as NOR CE, SEMC_CSX1 as PSRAM CE, SEMC_CSX2 as NAND CE, SEMC_CSX3 as DBI CE. + + // _WDWORD(0x402F0004,0x00000008); // IOCR, SEMC_CCSX0 as SDRAM_CS1 + _WDWORD(0x402F0040,0x00000F31); // SDRAMCR0 + _WDWORD(0x402F0044,0x00652922); // SDRAMCR1 + _WDWORD(0x402F0048,0x00010920); // SDRAMCR2 + _WDWORD(0x402F004C,0x50210A08); // SDRAMCR3 + + _WDWORD(0x402F0080,0x00000021); // DBICR0 + _WDWORD(0x402F0084,0x00888888); // DBICR1 + _WDWORD(0x402F0094,0x00000002); // IPCR1 + _WDWORD(0x402F0098,0x00000000); // IPCR2 + + _WDWORD(0x402F0090,0x80000000); // IPCR0 + _WDWORD(0x402F009C,0xA55A000F); // IPCMD, SD_CC_IPREA + SDRAM_WaitIpCmdDone(); + _WDWORD(0x402F0090,0x80000000); // IPCR0 + _WDWORD(0x402F009C,0xA55A000C); // SD_CC_IAF + SDRAM_WaitIpCmdDone(); + _WDWORD(0x402F0090,0x80000000); // IPCR0 + _WDWORD(0x402F009C,0xA55A000C); // SD_CC_IAF + SDRAM_WaitIpCmdDone(); + _WDWORD(0x402F00A0,0x00000033); // IPTXDAT + _WDWORD(0x402F0090,0x80000000); // IPCR0 + _WDWORD(0x402F009C,0xA55A000A); // SD_CC_IMS + SDRAM_WaitIpCmdDone(); + _WDWORD(0x402F004C,0x50210A09 ); // enable sdram self refresh again after initialization done. +} + +int imxrt_sdram_init(void) +{ + _clock_init(); + _sdr_Init(); + + return 0; +} + +/*@}*/ From f88e1268be746e6565270ff1aab9e4f6171681ec Mon Sep 17 00:00:00 2001 From: tanek liang Date: Thu, 7 Dec 2017 13:36:52 +0800 Subject: [PATCH 04/43] [bsp] support using debuger download, runing after reboot --- .../arm/MIMXRT1052xxxxx_flexspi_nor.scf | 25 +++-- .../arm/evkmimxrt1050_flexspi_nor.ini | 45 +++++++++ .../gcc/MIMXRT1052xxxxx_flexspi_nor.ld | 66 +++++++++---- .../Libraries/gcc/MIMXRT1052xxxxx_ram.ld | 56 ++++++----- .../Libraries/gcc/startup_MIMXRT1052.S | 4 + .../iar/MIMXRT1052xxxxx_flexspi_nor.icf | 47 ++++++---- .../Libraries/system_MIMXRT1052.c | 2 + bsp/imxrt1052-evk/drivers/SConscript | 1 + bsp/imxrt1052-evk/drivers/board.c | 16 ++-- bsp/imxrt1052-evk/drivers/hyper_flash_boot.c | 93 +++++++++++++++++++ bsp/imxrt1052-evk/rtconfig.py | 10 +- 11 files changed, 282 insertions(+), 83 deletions(-) create mode 100644 bsp/imxrt1052-evk/Libraries/arm/evkmimxrt1050_flexspi_nor.ini create mode 100644 bsp/imxrt1052-evk/drivers/hyper_flash_boot.c diff --git a/bsp/imxrt1052-evk/Libraries/arm/MIMXRT1052xxxxx_flexspi_nor.scf b/bsp/imxrt1052-evk/Libraries/arm/MIMXRT1052xxxxx_flexspi_nor.scf index db087e7eb0..04885943a3 100644 --- a/bsp/imxrt1052-evk/Libraries/arm/MIMXRT1052xxxxx_flexspi_nor.scf +++ b/bsp/imxrt1052-evk/Libraries/arm/MIMXRT1052xxxxx_flexspi_nor.scf @@ -45,20 +45,20 @@ ** ################################################################### */ -#define m_interrupts_start 0x60002000 -#define m_interrupts_size 0x00000400 - -#define m_text_start 0x60002400 -#define m_text_size 0x1F7FDC00 +#define m_text_start 0x60002000 +#define m_text_size 0x1F7FE000 #define m_data_start 0x20000000 #define m_data_size 0x00020000 +#define m_ncache_start 0x81E00000 +#define m_ncache_size 0x00200000 + /* Sizes */ #if (defined(__stack_size__)) #define Stack_Size __stack_size__ #else - #define Stack_Size 0x0400 + #define Stack_Size 0x1000 #endif #if (defined(__heap_size__)) @@ -69,23 +69,22 @@ LR_m_text m_text_start m_text_size { ; load region size_region ER_m_text m_text_start m_text_size { ; load address = execution address + * (RESET,+FIRST) * (InRoot$$Sections) .ANY (+RO) } RW_m_data m_data_start m_data_size-Stack_Size-Heap_Size { ; RW data .ANY (+RW +ZI) - * (NonCacheable.init) - * (NonCacheable) + } ARM_LIB_HEAP +0 EMPTY Heap_Size { ; Heap region growing up } - ARM_LIB_STACK m_data_start+m_data_size EMPTY -Stack_Size { ; Stack region growing down + ARM_LIB_STACK +0 EMPTY Stack_Size { ; Stack region growing down } -} -LR_m_interrupts m_interrupts_start m_interrupts_size { - VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address - * (RESET,+FIRST) + RW_m_ncache m_ncache_start m_ncache_size { ; ncache RW data + * (NonCacheable.init) + * (NonCacheable) } } diff --git a/bsp/imxrt1052-evk/Libraries/arm/evkmimxrt1050_flexspi_nor.ini b/bsp/imxrt1052-evk/Libraries/arm/evkmimxrt1050_flexspi_nor.ini new file mode 100644 index 0000000000..1e21d31013 --- /dev/null +++ b/bsp/imxrt1052-evk/Libraries/arm/evkmimxrt1050_flexspi_nor.ini @@ -0,0 +1,45 @@ +/* + * Copyright 2017 NXP + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * o Redistributions of source code must retain the above copyright notice, this list + * of conditions and the following disclaimer. + * + * o Redistributions in binary form must reproduce the above copyright notice, this + * list of conditions and the following disclaimer in the documentation and/or + * other materials provided with the distribution. + * + * o Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +FUNC void Setup (void) { + + SP = _RDWORD(0x60002000); // Setup Stack Pointer + PC = _RDWORD(0x60002004); // Setup Program Counter + _WDWORD(0xE000ED08, 0x60002000); // Setup Vector Table Offset Register +} + +FUNC void OnResetExec (void) { // executes upon software RESET + Setup(); // Setup for Running +} + +LOAD %L INCREMENTAL // Download + +Setup(); // Setup for Running + +// g, main diff --git a/bsp/imxrt1052-evk/Libraries/gcc/MIMXRT1052xxxxx_flexspi_nor.ld b/bsp/imxrt1052-evk/Libraries/gcc/MIMXRT1052xxxxx_flexspi_nor.ld index 8d2875f2b3..810d52673f 100644 --- a/bsp/imxrt1052-evk/Libraries/gcc/MIMXRT1052xxxxx_flexspi_nor.ld +++ b/bsp/imxrt1052-evk/Libraries/gcc/MIMXRT1052xxxxx_flexspi_nor.ld @@ -53,14 +53,33 @@ STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x0400; /* Specify the memory areas */ MEMORY { + m_boot_data (RX) : ORIGIN = 0x60000000, LENGTH = 0x00000400 + m_image_vertor_table (RX) : ORIGIN = 0x60001000, LENGTH = 0x00000400 + m_interrupts (RX) : ORIGIN = 0x60002000, LENGTH = 0x00000400 m_text (RX) : ORIGIN = 0x60002400, LENGTH = 0x1F7FDC00 - m_data (RW) : ORIGIN = 0x20000000, LENGTH = 0x00020000 + + m_itcm (RW) : ORIGIN = 0x00000000, LENGTH = 0x00020000 + m_dtcm (RW) : ORIGIN = 0x20000000, LENGTH = 0x00020000 + m_ocram (RW) : ORIGIN = 0x20200000, LENGTH = 0x00040000 + + m_sdram (RW) : ORIGIN = 0x80000000, LENGTH = 0x01E00000 + m_nocache (RW) : ORIGIN = 0x81E00000, LENGTH = 0x00200000 } /* Define output sections */ SECTIONS { + .boot_data : + { + KEEP(*(.bootdata)) + } > m_boot_data + + .image_vertor_table : + { + KEEP(*(.ivt)) + } > m_image_vertor_table + /* The startup code goes first into internal RAM */ .interrupts : { @@ -87,6 +106,23 @@ SECTIONS KEEP (*(.init)) KEEP (*(.fini)) . = ALIGN(4); + + /* section information for finsh shell */ + . = ALIGN(4); + __fsymtab_start = .; + KEEP(*(FSymTab)) + __fsymtab_end = .; + . = ALIGN(4); + __vsymtab_start = .; + KEEP(*(VSymTab)) + __vsymtab_end = .; + . = ALIGN(4); + + /* section information for initial. */ + . = ALIGN(4); + __rt_init_start = .; + KEEP(*(SORT(.rti_fn*))) + __rt_init_end = .; } > m_text .ARM.extab : @@ -173,7 +209,7 @@ SECTIONS KEEP(*(.jcr*)) . = ALIGN(4); __data_end__ = .; /* define a global symbol at data end */ - } > m_data + } > m_dtcm __NDATA_ROM = __DATA_ROM + (__data_end__ - __data_start__); .ncache.init : AT(__NDATA_ROM) @@ -182,14 +218,14 @@ SECTIONS *(NonCacheable.init) . = ALIGN(4); __noncachedata_init_end__ = .; /* create a global symbol at initialized ncache data end */ - } > m_data + } > m_dtcm . = __noncachedata_init_end__; .ncache : { *(NonCacheable) . = ALIGN(4); __noncachedata_end__ = .; /* define a global symbol at ncache data end */ - } > m_data + } > m_dtcm __DATA_END = __NDATA_ROM + (__noncachedata_init_end__ - __noncachedata_start__); text_end = ORIGIN(m_text) + LENGTH(m_text); @@ -209,32 +245,22 @@ SECTIONS . = ALIGN(4); __bss_end__ = .; __END_BSS = .; - } > m_data - - .heap : - { - . = ALIGN(8); - __end__ = .; - PROVIDE(end = .); - __HeapBase = .; - . += HEAP_SIZE; - __HeapLimit = .; - __heap_limit = .; /* Add for _sbrk */ - } > m_data + } > m_dtcm .stack : { . = ALIGN(8); + stack_start = .; . += STACK_SIZE; - } > m_data + stack_end = .; + heap_start = .; + } > m_dtcm /* Initializes stack on the end of block */ - __StackTop = ORIGIN(m_data) + LENGTH(m_data); - __StackLimit = __StackTop - STACK_SIZE; + __StackTop = stack_end; PROVIDE(__stack = __StackTop); .ARM.attributes 0 : { *(.ARM.attributes) } - ASSERT(__StackLimit >= __HeapLimit, "region m_data overflowed with stack and heap") } diff --git a/bsp/imxrt1052-evk/Libraries/gcc/MIMXRT1052xxxxx_ram.ld b/bsp/imxrt1052-evk/Libraries/gcc/MIMXRT1052xxxxx_ram.ld index 15166adf3b..ab9693eed8 100644 --- a/bsp/imxrt1052-evk/Libraries/gcc/MIMXRT1052xxxxx_ram.ld +++ b/bsp/imxrt1052-evk/Libraries/gcc/MIMXRT1052xxxxx_ram.ld @@ -54,8 +54,14 @@ STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x0400; MEMORY { m_interrupts (RX) : ORIGIN = 0x00000000, LENGTH = 0x00000400 - m_text (RX) : ORIGIN = 0x00000400, LENGTH = 0x0001FC00 - m_data (RW) : ORIGIN = 0x20000000, LENGTH = 0x00020000 + m_text (RX) : ORIGIN = 0x00000400, LENGTH = 0x00020000 + + /* m_itcm (RW) : ORIGIN = 0x00000000, LENGTH = 0x00020000 */ + m_dtcm (RW) : ORIGIN = 0x20000000, LENGTH = 0x00020000 + /* m_ocram (RW) : ORIGIN = 0x20200000, LENGTH = 0x00040000 */ + + /* m_sdram (RW) : ORIGIN = 0x80000000, LENGTH = 0x01E00000 */ + /* m_nocache (RW) : ORIGIN = 0x81E00000, LENGTH = 0x00200000 */ } /* Define output sections */ @@ -87,6 +93,23 @@ SECTIONS KEEP (*(.init)) KEEP (*(.fini)) . = ALIGN(4); + + /* section information for finsh shell */ + . = ALIGN(4); + __fsymtab_start = .; + KEEP(*(FSymTab)) + __fsymtab_end = .; + . = ALIGN(4); + __vsymtab_start = .; + KEEP(*(VSymTab)) + __vsymtab_end = .; + . = ALIGN(4); + + /* section information for initial. */ + . = ALIGN(4); + __rt_init_start = .; + KEEP(*(SORT(.rti_fn*))) + __rt_init_end = .; } > m_text .ARM.extab : @@ -173,7 +196,7 @@ SECTIONS KEEP(*(.jcr*)) . = ALIGN(4); __data_end__ = .; /* define a global symbol at data end */ - } > m_data + } > m_dtcm __NDATA_ROM = __DATA_ROM + (__data_end__ - __data_start__); .ncache.init : AT(__NDATA_ROM) @@ -182,14 +205,14 @@ SECTIONS *(NonCacheable.init) . = ALIGN(4); __noncachedata_init_end__ = .; /* create a global symbol at initialized ncache data end */ - } > m_data + } > m_dtcm . = __noncachedata_init_end__; .ncache : { *(NonCacheable) . = ALIGN(4); __noncachedata_end__ = .; /* define a global symbol at ncache data end */ - } > m_data + } > m_dtcm __DATA_END = __NDATA_ROM + (__noncachedata_init_end__ - __noncachedata_start__); text_end = ORIGIN(m_text) + LENGTH(m_text); @@ -209,32 +232,21 @@ SECTIONS . = ALIGN(4); __bss_end__ = .; __END_BSS = .; - } > m_data - - .heap : - { - . = ALIGN(8); - __end__ = .; - PROVIDE(end = .); - __HeapBase = .; - . += HEAP_SIZE; - __HeapLimit = .; - __heap_limit = .; /* Add for _sbrk */ - } > m_data + } > m_dtcm .stack : { . = ALIGN(8); + stack_start = .; . += STACK_SIZE; - } > m_data + stack_end = .; + heap_start = .; + } > m_dtcm /* Initializes stack on the end of block */ - __StackTop = ORIGIN(m_data) + LENGTH(m_data); - __StackLimit = __StackTop - STACK_SIZE; + __StackTop = stack_end; PROVIDE(__stack = __StackTop); .ARM.attributes 0 : { *(.ARM.attributes) } - - ASSERT(__StackLimit >= __HeapLimit, "region m_data overflowed with stack and heap") } diff --git a/bsp/imxrt1052-evk/Libraries/gcc/startup_MIMXRT1052.S b/bsp/imxrt1052-evk/Libraries/gcc/startup_MIMXRT1052.S index 62f1fc0201..d6df9135b9 100644 --- a/bsp/imxrt1052-evk/Libraries/gcc/startup_MIMXRT1052.S +++ b/bsp/imxrt1052-evk/Libraries/gcc/startup_MIMXRT1052.S @@ -36,6 +36,10 @@ /*****************************************************************************/ /* Version: GCC for ARM Embedded Processors */ /*****************************************************************************/ + +#define __STARTUP_INITIALIZE_NONCACHEDATA +#define __STARTUP_CLEAR_BSS + .syntax unified .arch armv7-m diff --git a/bsp/imxrt1052-evk/Libraries/iar/MIMXRT1052xxxxx_flexspi_nor.icf b/bsp/imxrt1052-evk/Libraries/iar/MIMXRT1052xxxxx_flexspi_nor.icf index 0a002c5f38..6a285752ab 100644 --- a/bsp/imxrt1052-evk/Libraries/iar/MIMXRT1052xxxxx_flexspi_nor.icf +++ b/bsp/imxrt1052-evk/Libraries/iar/MIMXRT1052xxxxx_flexspi_nor.icf @@ -47,14 +47,23 @@ define symbol m_interrupts_start = 0x60002000; define symbol m_interrupts_end = 0x600023FF; -define symbol m_text_start = 0x60002400; -define symbol m_text_end = 0x7F7FFFFF; +define symbol m_itcm_start = 0x00000000; +define symbol m_itcm_end = 0x0001FFFF; -define symbol m_data_start = 0x20000000; -define symbol m_data_end = 0x2001FFFF; +define symbol m_spiflash_start = 0x60002400; +define symbol m_spiflash_end = 0x7F7FFFFF; -define symbol m_data2_start = 0x20200000; -define symbol m_data2_end = 0x2023FFFF; +define symbol m_dtcm_start = 0x20000000; +define symbol m_dtcm_end = 0x2001FFFF; + +define symbol m_ocram_start = 0x20200000; +define symbol m_ocram_end = 0x2023FFFF; + +define symbol m_sdram_start = 0x80000000; +define symbol m_sdram_end = 0x81DFFFFF; + +define symbol m_ncache_start = 0x81E00000; +define symbol m_ncache_end = 0x81FFFFFF; /* Sizes */ if (isdefinedsymbol(__stack_size__)) { @@ -75,11 +84,13 @@ define exported symbol __RAM_VECTOR_TABLE_SIZE = 0x0; define memory mem with size = 4G; define region TEXT_region = mem:[from m_interrupts_start to m_interrupts_end] - | mem:[from m_text_start to m_text_end]; + | mem:[from m_spiflash_start to m_spiflash_end]; -define region DATA_region = mem:[from m_data_start to m_data_end-__size_cstack__]; -define region DATA2_region = mem:[from m_data2_start to m_data2_end]; -define region CSTACK_region = mem:[from m_data_end-__size_cstack__+1 to m_data_end]; +define region ITCM_region = mem:[from m_itcm_start to m_itcm_end]; +define region DTCM_region = mem:[from m_dtcm_start to m_dtcm_end]; +define region OCRAM_region = mem:[from m_ocram_start to m_ocram_end]; +define region NCACHE_region = mem:[from m_ncache_start to m_ncache_end]; +define region SDRAM_region = mem:[from m_sdram_start to m_sdram_end]; define block CSTACK with alignment = 8, size = __size_cstack__ { }; define block HEAP with alignment = 8, size = __size_heap__ { }; @@ -92,10 +103,14 @@ do not initialize { section .noinit }; place at address mem: m_interrupts_start { readonly section .intvec }; -place in TEXT_region { readonly }; -place in DATA_region { block RW }; -place in DATA_region { block ZI }; -place in DATA_region { last block HEAP }; -place in DATA_region { block NCACHE_VAR }; -place in CSTACK_region { block CSTACK }; +keep { section FSymTab }; +keep { section VSymTab }; +keep { section .rti_fn* }; + +place in TEXT_region { readonly }; +place in DTCM_region { block RW }; +place in DTCM_region { block ZI }; +place in DTCM_region { last block HEAP }; +place in DTCM_region { block CSTACK }; +place in NCACHE_region { block NCACHE_VAR }; diff --git a/bsp/imxrt1052-evk/Libraries/system_MIMXRT1052.c b/bsp/imxrt1052-evk/Libraries/system_MIMXRT1052.c index f505e8ec9d..fd599faa74 100644 --- a/bsp/imxrt1052-evk/Libraries/system_MIMXRT1052.c +++ b/bsp/imxrt1052-evk/Libraries/system_MIMXRT1052.c @@ -116,6 +116,8 @@ void SystemInit (void) { SCB_EnableDCache(); #endif + extern void rt_lowlevel_init(void); + rt_lowlevel_init(); } /* ---------------------------------------------------------------------------- diff --git a/bsp/imxrt1052-evk/drivers/SConscript b/bsp/imxrt1052-evk/drivers/SConscript index 6b735fe58c..8d3ac8f41e 100644 --- a/bsp/imxrt1052-evk/drivers/SConscript +++ b/bsp/imxrt1052-evk/drivers/SConscript @@ -8,6 +8,7 @@ cwd = os.path.join(str(Dir('#')), 'drivers') src = Split(""" board.c usart.c +hyper_flash_boot.c drv_sdram.c """) diff --git a/bsp/imxrt1052-evk/drivers/board.c b/bsp/imxrt1052-evk/drivers/board.c index 0e0955de88..c2ad22eb73 100644 --- a/bsp/imxrt1052-evk/drivers/board.c +++ b/bsp/imxrt1052-evk/drivers/board.c @@ -31,14 +31,14 @@ const clock_usb_pll_config_t usb1PllConfig = { .loopDivider = 0U }; static void BOARD_BootClockGate(void) { - /* Disable all unused peripheral clock */ - CCM->CCGR0 = 0x00C0000FU; - CCM->CCGR1 = 0x30000000U; - CCM->CCGR2 = 0x003F0030U; - CCM->CCGR3 = 0xF0000330U; - CCM->CCGR4 = 0x0000FF3CU; - CCM->CCGR5 = 0xF000330FU; - CCM->CCGR6 = 0x00FC0300U; +// /* Disable all unused peripheral clock */ +// CCM->CCGR0 = 0x00C0000FU; +// CCM->CCGR1 = 0x30000000U; +// CCM->CCGR2 = 0x003F0030U; +// CCM->CCGR3 = 0xF0000330U; +// CCM->CCGR4 = 0x0000FF3CU; +// CCM->CCGR5 = 0xF000330FU; +// CCM->CCGR6 = 0x00FC0300U; } static void BOARD_BootClockRUN(void) diff --git a/bsp/imxrt1052-evk/drivers/hyper_flash_boot.c b/bsp/imxrt1052-evk/drivers/hyper_flash_boot.c new file mode 100644 index 0000000000..5aad700915 --- /dev/null +++ b/bsp/imxrt1052-evk/drivers/hyper_flash_boot.c @@ -0,0 +1,93 @@ +/* + * File : clock.c + * This file is part of RT-Thread RTOS + * COPYRIGHT (C) 2006 - 2012, RT-Thread Development Team + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * + * Change Logs: + * Date Author Notes + * 2017-12-05 Tanek first version + */ + +#include + +#if defined (__ICCARM__ ) +#define RT_AT_ADDR(__ADDR) @ __ADDR +#elif defined ( __GNUC__ ) +#define RT_AT_ADDR(__ADDR) //__attribute__((at(__ADDR))) +#elif defined ( __CC_ARM ) +#define RT_AT_ADDR(__ADDR) __attribute__((at(__ADDR))) +#else + #error Not a valid compiler/linker for m_dfu_settings placement. +#endif + + +#if defined ( __GNUC__ ) +// enter serial download mode, and run command: +// finsh /> mem_dump(0x60000000, 512) +RT_USED static const uint32_t boot_data[] __attribute__((section (".bootdata"))) = { + 0x42464346, 0x56010400, 0x00000000, 0x03030303, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000059, 0x01080800, 0x00000000, 0x00000000, 0x04000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x0000000F, 0x0001000F, + 0x8B1887A0, 0xA7048F10, 0x00000000, 0x00000000, 0x87008700, 0x87AA8700, 0x87058700, 0x87708700, + 0x8B1887A0, 0xB70B8F10, 0x0000A704, 0x00000000, 0x87008700, 0x87AA8700, 0x87058700, 0x87AA8700, + 0x87008700, 0x87558700, 0x87028700, 0x87558700, 0x87008700, 0x87AA8700, 0x87058700, 0x87808700, + 0x87008700, 0x87AA8700, 0x87058700, 0x87AA8700, 0x87008700, 0x87558700, 0x87028700, 0x87558700, + 0x8B188700, 0x87008F10, 0x00008730, 0x00000000, 0x87008700, 0x87AA8700, 0x87058700, 0x87A08700, + 0x8B188700, 0xA3808F10, 0x00000000, 0x00000000, 0x87008700, 0x87AA8700, 0x87058700, 0x87808700, + 0x87008700, 0x87AA8700, 0x87058700, 0x87AA8700, 0x87008700, 0x87558700, 0x87028700, 0x87558700, + 0x87008700, 0x87AA8700, 0x87058700, 0x87108700, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000102, 0x00000302, 0x00000504, 0x00000902, 0x00000B04, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000200, 0x00040000, 0x00000008, 0x00000001, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, +}; + +// finsh /> mem_dump(0x60001000, 16) +RT_USED static const uint32_t image_vertor_table[] __attribute__((section (".ivt"))) = { + 0x412000D1, 0x60002000, 0x00000000, 0x00000000, 0x60001020, 0x60001000, 0x00000000, 0x00000000, + 0x60000000, 0x00800000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, +}; +#else + +// enter serial download mode, and run command: +// finsh /> mem_dump(0x60000000, 512) +RT_USED static const uint32_t boot_data[] RT_AT_ADDR(0x60000000u) = { + 0x42464346, 0x56010400, 0x00000000, 0x03030303, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000059, 0x01080800, 0x00000000, 0x00000000, 0x04000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x0000000F, 0x0001000F, + 0x8B1887A0, 0xA7048F10, 0x00000000, 0x00000000, 0x87008700, 0x87AA8700, 0x87058700, 0x87708700, + 0x8B1887A0, 0xB70B8F10, 0x0000A704, 0x00000000, 0x87008700, 0x87AA8700, 0x87058700, 0x87AA8700, + 0x87008700, 0x87558700, 0x87028700, 0x87558700, 0x87008700, 0x87AA8700, 0x87058700, 0x87808700, + 0x87008700, 0x87AA8700, 0x87058700, 0x87AA8700, 0x87008700, 0x87558700, 0x87028700, 0x87558700, + 0x8B188700, 0x87008F10, 0x00008730, 0x00000000, 0x87008700, 0x87AA8700, 0x87058700, 0x87A08700, + 0x8B188700, 0xA3808F10, 0x00000000, 0x00000000, 0x87008700, 0x87AA8700, 0x87058700, 0x87808700, + 0x87008700, 0x87AA8700, 0x87058700, 0x87AA8700, 0x87008700, 0x87558700, 0x87028700, 0x87558700, + 0x87008700, 0x87AA8700, 0x87058700, 0x87108700, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000102, 0x00000302, 0x00000504, 0x00000902, 0x00000B04, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000200, 0x00040000, 0x00000008, 0x00000001, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, +}; + +// finsh /> mem_dump(0x60001000, 16) +RT_USED static const uint32_t image_vertor_table[] RT_AT_ADDR(0x60001000u) = { + 0x412000D1, 0x60002000, 0x00000000, 0x00000000, 0x60001020, 0x60001000, 0x00000000, 0x00000000, + 0x60000000, 0x00800000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, +}; +#endif diff --git a/bsp/imxrt1052-evk/rtconfig.py b/bsp/imxrt1052-evk/rtconfig.py index 720ae5aae1..27718a2484 100644 --- a/bsp/imxrt1052-evk/rtconfig.py +++ b/bsp/imxrt1052-evk/rtconfig.py @@ -41,16 +41,18 @@ if PLATFORM == 'gcc': STRIP = PREFIX + 'strip' DEVICE = ' -std=c99 -mcpu=cortex-m7 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=softfp -ffunction-sections -fdata-sections' - CFLAGS = DEVICE + ' -g -Wall -DUSE_HAL_DRIVER -D__ASSEMBLY__ -D__FPU_USED -eentry' + CFLAGS = DEVICE + ' -g -Wall -DUSE_HAL_DRIVER -D__ASSEMBLY__ -D__FPU_PRESENT -eentry' AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp -Wa,-mimplicit-it=thumb ' - LFLAGS = DEVICE + ' -lm -lgcc -lc' + ' -nostartfiles -Wl,--gc-sections,-Map=imxrt1052_sdram.map,-cref,-u,Reset_Handler -T imxrt1052_sdram.ld' + LFLAGS = DEVICE + ' -lm -lgcc -lc' + ' -nostartfiles -Wl,--gc-sections,-Map=imxrt1052_sdram.map,-cref,-u,Reset_Handler -T ./Libraries/gcc/MIMXRT1052xxxxx_flexspi_nor.ld' CPATH = '' LPATH = '' + + CFLAGS += ' -gdwarf-2' + AFLAGS += ' -gdwarf-2' if BUILD == 'debug': - CFLAGS += ' -O0 -gdwarf-2' - AFLAGS += ' -gdwarf-2' + CFLAGS += ' -O0' else: CFLAGS += ' -O2 -Os' From da30f0fae23d889383a8d33a6662d7d9eb344b1e Mon Sep 17 00:00:00 2001 From: tanek liang Date: Thu, 7 Dec 2017 13:38:51 +0800 Subject: [PATCH 05/43] [bsp] update MDK and IAR project --- bsp/imxrt1052-evk/.config | 70 +++++- bsp/imxrt1052-evk/project.ewd | 58 +++-- bsp/imxrt1052-evk/project.ewp | 219 +++++++---------- bsp/imxrt1052-evk/project.uvprojx | 366 ++++++++++++----------------- bsp/imxrt1052-evk/rtconfig.h | 92 +++++--- bsp/imxrt1052-evk/template.ewp | 2 +- bsp/imxrt1052-evk/template.uvprojx | 13 +- 7 files changed, 388 insertions(+), 432 deletions(-) diff --git a/bsp/imxrt1052-evk/.config b/bsp/imxrt1052-evk/.config index bdf82c00cd..a0e1bf8e61 100644 --- a/bsp/imxrt1052-evk/.config +++ b/bsp/imxrt1052-evk/.config @@ -8,12 +8,15 @@ # CONFIG_RT_NAME_MAX=8 CONFIG_RT_ALIGN_SIZE=4 +# CONFIG_RT_THREAD_PRIORITY_8 is not set +CONFIG_RT_THREAD_PRIORITY_32=y +# CONFIG_RT_THREAD_PRIORITY_256 is not set CONFIG_RT_THREAD_PRIORITY_MAX=32 CONFIG_RT_TICK_PER_SECOND=100 CONFIG_RT_DEBUG=y CONFIG_RT_USING_OVERFLOW_CHECK=y CONFIG_RT_DEBUG_INIT=0 -# CONFIG_RT_DEBUG_THREAD is not set +CONFIG_RT_DEBUG_THREAD=0 CONFIG_RT_USING_HOOK=y CONFIG_IDLE_THREAD_STACK_SIZE=256 # CONFIG_RT_USING_TIMER_SOFT is not set @@ -32,15 +35,18 @@ CONFIG_RT_USING_MESSAGEQUEUE=y # Memory Management # # CONFIG_RT_USING_MEMPOOL is not set -# CONFIG_RT_USING_MEMHEAP is not set -CONFIG_RT_USING_HEAP=y -CONFIG_RT_USING_SMALL_MEM=y +CONFIG_RT_USING_MEMHEAP=y +# CONFIG_RT_USING_NOHEAP is not set +# CONFIG_RT_USING_SMALL_MEM is not set # CONFIG_RT_USING_SLAB is not set +CONFIG_RT_USING_MEMHEAP_AS_HEAP=y +CONFIG_RT_USING_HEAP=y # # Kernel Device Object # CONFIG_RT_USING_DEVICE=y +# CONFIG_RT_USING_INTERRUPT_INFO is not set CONFIG_RT_USING_CONSOLE=y CONFIG_RT_CONSOLEBUF_SIZE=128 CONFIG_RT_CONSOLE_DEVICE_NAME="uart1" @@ -78,8 +84,13 @@ CONFIG_FINSH_USING_MSH_DEFAULT=y CONFIG_RT_USING_DFS=y CONFIG_DFS_USING_WORKDIR=y CONFIG_DFS_FILESYSTEMS_MAX=2 +CONFIG_DFS_FILESYSTEM_TYPES_MAX=2 CONFIG_DFS_FD_MAX=4 CONFIG_RT_USING_DFS_ELMFAT=y + +# +# elm-chan's FatFs, Generic FAT Filesystem Module +# CONFIG_RT_DFS_ELM_CODE_PAGE=437 CONFIG_RT_DFS_ELM_WORD_ACCESS=y CONFIG_RT_DFS_ELM_USE_LFN_0=y @@ -94,6 +105,9 @@ CONFIG_RT_DFS_ELM_MAX_SECTOR_SIZE=512 CONFIG_RT_DFS_ELM_REENTRANT=y CONFIG_RT_USING_DFS_DEVFS=y # CONFIG_RT_USING_DFS_NET is not set +# CONFIG_RT_USING_DFS_ROMFS is not set +# CONFIG_RT_USING_DFS_RAMFS is not set +# CONFIG_RT_USING_DFS_UFFS is not set # CONFIG_RT_USING_DFS_NFS is not set # @@ -111,6 +125,11 @@ CONFIG_RT_USING_SERIAL=y CONFIG_RT_USING_SDIO=y # CONFIG_RT_USING_SPI is not set # CONFIG_RT_USING_WDT is not set +# CONFIG_RT_USING_WIFI is not set + +# +# Using USB +# # CONFIG_RT_USING_USB_HOST is not set # CONFIG_RT_USING_USB_DEVICE is not set @@ -118,10 +137,8 @@ CONFIG_RT_USING_SDIO=y # POSIX layer and C standard library # CONFIG_RT_USING_LIBC=y -CONFIG_RT_USING_PTHREADS=y -CONFIG_RT_USING_POSIX=y -# CONFIG_RT_USING_POSIX_MMAP is not set -# CONFIG_RT_USING_POSIX_TERMIOS is not set +# CONFIG_RT_USING_PTHREADS is not set +# CONFIG_RT_USING_POSIX is not set # # Network stack @@ -141,6 +158,13 @@ CONFIG_RT_LWIP_DHCP=y CONFIG_IP_SOF_BROADCAST=1 CONFIG_IP_SOF_BROADCAST_RECV=1 # CONFIG_LWIP_USING_DHCPD is not set + +# +# Static IPv4 Address +# +CONFIG_RT_LWIP_IPADDR="192.168.1.30" +CONFIG_RT_LWIP_GWADDR="192.168.1.1" +CONFIG_RT_LWIP_MSKADDR="255.255.255.0" CONFIG_RT_LWIP_UDP=y CONFIG_RT_LWIP_TCP=y # CONFIG_RT_LWIP_RAW is not set @@ -178,6 +202,17 @@ CONFIG_LWIP_SO_RCVBUF=1 # # CONFIG_RT_USING_GUIENGINE is not set +# +# VBUS(Virtual Software BUS) +# +# CONFIG_RT_USING_VBUS is not set + +# +# Utilities +# +# CONFIG_RT_USING_LOGTRACE is not set +# CONFIG_RT_USING_RYM is not set + # # RT-Thread online packages # @@ -187,24 +222,30 @@ CONFIG_LWIP_SO_RCVBUF=1 # # CONFIG_PKG_USING_PARTITION is not set # CONFIG_PKG_USING_SQLITE is not set +# CONFIG_PKG_USING_RTI is not set # # IoT - internet of things # -# CONFIG_PKG_USING_CJSON is not set # CONFIG_PKG_USING_PAHOMQTT is not set # CONFIG_PKG_USING_WEBCLIENT is not set # CONFIG_PKG_USING_MONGOOSE is not set -# CONFIG_PKG_USING_WEB_TERMINAL is not set +# CONFIG_PKG_USING_WEBTERMINAL is not set +# CONFIG_PKG_USING_CJSON is not set +# CONFIG_PKG_USING_EZXML is not set +# CONFIG_PKG_USING_NANOPB is not set # # security packages # +# CONFIG_PKG_USING_MBEDTLS is not set +# CONFIG_PKG_USING_libsodium is not set # # language packages # # CONFIG_PKG_USING_JERRYSCRIPT is not set +# CONFIG_PKG_USING_MICROPYTHON is not set # # multimedia packages @@ -214,15 +255,18 @@ CONFIG_LWIP_SO_RCVBUF=1 # tools packages # # CONFIG_PKG_USING_CMBACKTRACE is not set -# CONFIG_PKG_USING_ELOG is not set +# CONFIG_PKG_USING_EASYLOGGER is not set +# CONFIG_PKG_USING_SYSTEMVIEW is not set # # miscellaneous packages # -# CONFIG_PKG_USING_HELLO is not set +# CONFIG_PKG_USING_FASTLZ is not set +# CONFIG_PKG_USING_MINILZO is not set # -# BSP_SPECIAL CONFIG +# example package: hello # +# CONFIG_PKG_USING_HELLO is not set CONFIG_RT_USING_UART=y CONFIG_RT_USING_UART1=y diff --git a/bsp/imxrt1052-evk/project.ewd b/bsp/imxrt1052-evk/project.ewd index 4f844da537..a329cdbf19 100644 --- a/bsp/imxrt1052-evk/project.ewd +++ b/bsp/imxrt1052-evk/project.ewd @@ -11,7 +11,7 @@ C-SPY 2 - 28 + 29 1 1 + @@ -288,7 +292,7 @@ @@ -2809,6 +2821,10 @@ $EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin 0 + + $EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin + 0 + $EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin 0 diff --git a/bsp/imxrt1052-evk/project.ewp b/bsp/imxrt1052-evk/project.ewp index d220c86695..106e7cffdc 100644 --- a/bsp/imxrt1052-evk/project.ewp +++ b/bsp/imxrt1052-evk/project.ewp @@ -171,7 +171,6 @@ FSL_SDK_ENABLE_DRIVER_CACHE_CONTROL=1 RT_USING_DLIBC _DLIB_FILE_DESCRIPTOR - _DLIB_THREAD_SUPPORT