From 9f97b3404b6eea46643978f79284074db5d7e6e3 Mon Sep 17 00:00:00 2001 From: wuyangyong Date: Mon, 5 Apr 2010 13:33:12 +0000 Subject: [PATCH] remove stm32_radio.see /branches/rtt_0_3_1/bsp/stm32_radio git-svn-id: https://rt-thread.googlecode.com/svn/trunk@578 bbd45198-f89e-11dd-88c7-29a3b14d5316 --- .../CMSIS/CM3/CoreSupport/core_cm3.c | 784 -- .../CMSIS/CM3/CoreSupport/core_cm3.h | 1818 ---- .../ST/Release_Notes_for_STM32F10x_CMSIS.html | 204 - .../startup/arm/startup_stm32f10x_cl.s | 368 - .../startup/arm/startup_stm32f10x_hd.s | 358 - .../startup/arm/startup_stm32f10x_ld.s | 297 - .../startup/arm/startup_stm32f10x_ld_vl.s | 304 - .../startup/arm/startup_stm32f10x_md.s | 307 - .../startup/arm/startup_stm32f10x_md_vl.s | 315 - .../startup/gcc_ride7/startup_stm32f10x_cl.s | 467 - .../startup/gcc_ride7/startup_stm32f10x_hd.s | 464 - .../startup/gcc_ride7/startup_stm32f10x_ld.s | 342 - .../gcc_ride7/startup_stm32f10x_ld_vl.s | 382 - .../startup/gcc_ride7/startup_stm32f10x_md.s | 357 - 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bsp/stm32_radio/wav.c delete mode 100644 bsp/stm32_radio/wma.c diff --git a/bsp/stm32_radio/Libraries/CMSIS/CM3/CoreSupport/core_cm3.c b/bsp/stm32_radio/Libraries/CMSIS/CM3/CoreSupport/core_cm3.c deleted file mode 100644 index 56fddc52bf..0000000000 --- a/bsp/stm32_radio/Libraries/CMSIS/CM3/CoreSupport/core_cm3.c +++ /dev/null @@ -1,784 +0,0 @@ -/**************************************************************************//** - * @file core_cm3.c - * @brief CMSIS Cortex-M3 Core Peripheral Access Layer Source File - * @version V1.30 - * @date 30. October 2009 - * - * @note - * Copyright (C) 2009 ARM Limited. All rights reserved. - * - * @par - * ARM Limited (ARM) is supplying this software for use with Cortex-M - * processor based microcontrollers. This file can be freely distributed - * within development tools that are supporting such ARM based processors. - * - * @par - * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED - * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. - * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR - * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. - * - ******************************************************************************/ - -#include - -/* define compiler specific symbols */ -#if defined ( __CC_ARM ) - #define __ASM __asm /*!< asm keyword for ARM Compiler */ - #define __INLINE __inline /*!< inline keyword for ARM Compiler */ - -#elif defined ( __ICCARM__ ) - #define __ASM __asm /*!< asm keyword for IAR Compiler */ - #define __INLINE inline /*!< inline keyword for IAR Compiler. Only avaiable in High optimization mode! */ - -#elif defined ( __GNUC__ ) - #define __ASM __asm /*!< asm keyword for GNU Compiler */ - #define __INLINE inline /*!< inline keyword for GNU Compiler */ - -#elif defined ( __TASKING__ ) - #define __ASM __asm /*!< asm keyword for TASKING Compiler */ - #define __INLINE inline /*!< inline keyword for TASKING Compiler */ - -#endif - - -/* ################### Compiler specific Intrinsics ########################### */ - -#if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/ -/* ARM armcc specific functions */ - -/** - * @brief Return the Process Stack Pointer - * - * @return ProcessStackPointer - * - * Return the actual process stack pointer - */ -__ASM uint32_t __get_PSP(void) -{ - mrs r0, psp - bx lr -} - -/** - * @brief Set the Process Stack Pointer - * - * @param topOfProcStack Process Stack Pointer - * - * Assign the value ProcessStackPointer to the MSP - * (process stack pointer) Cortex processor register - */ -__ASM void __set_PSP(uint32_t topOfProcStack) -{ - msr psp, r0 - bx lr -} - -/** - * @brief Return the Main Stack Pointer - * - * @return Main Stack Pointer - * - * Return the current value of the MSP (main stack pointer) - * Cortex processor register - */ -__ASM uint32_t __get_MSP(void) -{ - mrs r0, msp - bx lr -} - -/** - * @brief Set the Main Stack Pointer - * - * @param topOfMainStack Main Stack Pointer - * - * Assign the value mainStackPointer to the MSP - * (main stack pointer) Cortex processor register - */ -__ASM void __set_MSP(uint32_t mainStackPointer) -{ - msr msp, r0 - bx lr -} - -/** - * @brief Reverse byte order in unsigned short value - * - * @param value value to reverse - * @return reversed value - * - * Reverse byte order in unsigned short value - */ -__ASM uint32_t __REV16(uint16_t value) -{ - rev16 r0, r0 - bx lr -} - -/** - * @brief Reverse byte order in signed short value with sign extension to integer - * - * @param value value to reverse - * @return reversed value - * - * Reverse byte order in signed short value with sign extension to integer - */ -__ASM int32_t __REVSH(int16_t value) -{ - revsh r0, r0 - bx lr -} - - -#if (__ARMCC_VERSION < 400000) - -/** - * @brief Remove the exclusive lock created by ldrex - * - * Removes the exclusive lock which is created by ldrex. - */ -__ASM void __CLREX(void) -{ - clrex -} - -/** - * @brief Return the Base Priority value - * - * @return BasePriority - * - * Return the content of the base priority register - */ -__ASM uint32_t __get_BASEPRI(void) -{ - mrs r0, basepri - bx lr -} - -/** - * @brief Set the Base Priority value - * - * @param basePri BasePriority - * - * Set the base priority register - */ -__ASM void __set_BASEPRI(uint32_t basePri) -{ - msr basepri, r0 - bx lr -} - -/** - * @brief Return the Priority Mask value - * - * @return PriMask - * - * Return state of the priority mask bit from the priority mask register - */ -__ASM uint32_t __get_PRIMASK(void) -{ - mrs r0, primask - bx lr -} - -/** - * @brief Set the Priority Mask value - * - * @param priMask PriMask - * - * Set the priority mask bit in the priority mask register - */ -__ASM void __set_PRIMASK(uint32_t priMask) -{ - msr primask, r0 - bx lr -} - -/** - * @brief Return the Fault Mask value - * - * @return FaultMask - * - * Return the content of the fault mask register - */ -__ASM uint32_t __get_FAULTMASK(void) -{ - mrs r0, faultmask - bx lr -} - -/** - * @brief Set the Fault Mask value - * - * @param faultMask faultMask value - * - * Set the fault mask register - */ -__ASM void __set_FAULTMASK(uint32_t faultMask) -{ - msr faultmask, r0 - bx lr -} - -/** - * @brief Return the Control Register value - * - * @return Control value - * - * Return the content of the control register - */ -__ASM uint32_t __get_CONTROL(void) -{ - mrs r0, control - bx lr -} - -/** - * @brief Set the Control Register value - * - * @param control Control value - * - * Set the control register - */ -__ASM void __set_CONTROL(uint32_t control) -{ - msr control, r0 - bx lr -} - -#endif /* __ARMCC_VERSION */ - - - -#elif (defined (__ICCARM__)) /*------------------ ICC Compiler -------------------*/ -/* IAR iccarm specific functions */ -#pragma diag_suppress=Pe940 - -/** - * @brief Return the Process Stack Pointer - * - * @return ProcessStackPointer - * - * Return the actual process stack pointer - */ -uint32_t __get_PSP(void) -{ - __ASM("mrs r0, psp"); - __ASM("bx lr"); -} - -/** - * @brief Set the Process Stack Pointer - * - * @param topOfProcStack Process Stack Pointer - * - * Assign the value ProcessStackPointer to the MSP - * (process stack pointer) Cortex processor register - */ -void __set_PSP(uint32_t topOfProcStack) -{ - __ASM("msr psp, r0"); - __ASM("bx lr"); -} - -/** - * @brief Return the Main Stack Pointer - * - * @return Main Stack Pointer - * - * Return the current value of the MSP (main stack pointer) - * Cortex processor register - */ -uint32_t __get_MSP(void) -{ - __ASM("mrs r0, msp"); - __ASM("bx lr"); -} - -/** - * @brief Set the Main Stack Pointer - * - * @param topOfMainStack Main Stack Pointer - * - * Assign the value mainStackPointer to the MSP - * (main stack pointer) Cortex processor register - */ -void __set_MSP(uint32_t topOfMainStack) -{ - __ASM("msr msp, r0"); - __ASM("bx lr"); -} - -/** - * @brief Reverse byte order in unsigned short value - * - * @param value value to reverse - * @return reversed value - * - * Reverse byte order in unsigned short value - */ -uint32_t __REV16(uint16_t value) -{ - __ASM("rev16 r0, r0"); - __ASM("bx lr"); -} - -/** - * @brief Reverse bit order of value - * - * @param value value to reverse - * @return reversed value - * - * Reverse bit order of value - */ -uint32_t __RBIT(uint32_t value) -{ - __ASM("rbit r0, r0"); - __ASM("bx lr"); -} - -/** - * @brief LDR Exclusive (8 bit) - * - * @param *addr address pointer - * @return value of (*address) - * - * Exclusive LDR command for 8 bit values) - */ -uint8_t __LDREXB(uint8_t *addr) -{ - __ASM("ldrexb r0, [r0]"); - __ASM("bx lr"); -} - -/** - * @brief LDR Exclusive (16 bit) - * - * @param *addr address pointer - * @return value of (*address) - * - * Exclusive LDR command for 16 bit values - */ -uint16_t __LDREXH(uint16_t *addr) -{ - __ASM("ldrexh r0, [r0]"); - __ASM("bx lr"); -} - -/** - * @brief LDR Exclusive (32 bit) - * - * @param *addr address pointer - * @return value of (*address) - * - * Exclusive LDR command for 32 bit values - */ -uint32_t __LDREXW(uint32_t *addr) -{ - __ASM("ldrex r0, [r0]"); - __ASM("bx lr"); -} - -/** - * @brief STR Exclusive (8 bit) - * - * @param value value to store - * @param *addr address pointer - * @return successful / failed - * - * Exclusive STR command for 8 bit values - */ -uint32_t __STREXB(uint8_t value, uint8_t *addr) -{ - __ASM("strexb r0, r0, [r1]"); - __ASM("bx lr"); -} - -/** - * @brief STR Exclusive (16 bit) - * - * @param value value to store - * @param *addr address pointer - * @return successful / failed - * - * Exclusive STR command for 16 bit values - */ -uint32_t __STREXH(uint16_t value, uint16_t *addr) -{ - __ASM("strexh r0, r0, [r1]"); - __ASM("bx lr"); -} - -/** - * @brief STR Exclusive (32 bit) - * - * @param value value to store - * @param *addr address pointer - * @return successful / failed - * - * Exclusive STR command for 32 bit values - */ -uint32_t __STREXW(uint32_t value, uint32_t *addr) -{ - __ASM("strex r0, r0, [r1]"); - __ASM("bx lr"); -} - -#pragma diag_default=Pe940 - - -#elif (defined (__GNUC__)) /*------------------ GNU Compiler ---------------------*/ -/* GNU gcc specific functions */ - -/** - * @brief Return the Process Stack Pointer - * - * @return ProcessStackPointer - * - * Return the actual process stack pointer - */ -uint32_t __get_PSP(void) __attribute__( ( naked ) ); -uint32_t __get_PSP(void) -{ - uint32_t result=0; - - __ASM volatile ("MRS %0, psp\n\t" - "MOV r0, %0 \n\t" - "BX lr \n\t" : "=r" (result) ); - return(result); -} - -/** - * @brief Set the Process Stack Pointer - * - * @param topOfProcStack Process Stack Pointer - * - * Assign the value ProcessStackPointer to the MSP - * (process stack pointer) Cortex processor register - */ -void __set_PSP(uint32_t topOfProcStack) __attribute__( ( naked ) ); -void __set_PSP(uint32_t topOfProcStack) -{ - __ASM volatile ("MSR psp, %0\n\t" - "BX lr \n\t" : : "r" (topOfProcStack) ); -} - -/** - * @brief Return the Main Stack Pointer - * - * @return Main Stack Pointer - * - * Return the current value of the MSP (main stack pointer) - * Cortex processor register - */ -uint32_t __get_MSP(void) __attribute__( ( naked ) ); -uint32_t __get_MSP(void) -{ - uint32_t result=0; - - __ASM volatile ("MRS %0, msp\n\t" - "MOV r0, %0 \n\t" - "BX lr \n\t" : "=r" (result) ); - return(result); -} - -/** - * @brief Set the Main Stack Pointer - * - * @param topOfMainStack Main Stack Pointer - * - * Assign the value mainStackPointer to the MSP - * (main stack pointer) Cortex processor register - */ -void __set_MSP(uint32_t topOfMainStack) __attribute__( ( naked ) ); -void __set_MSP(uint32_t topOfMainStack) -{ - __ASM volatile ("MSR msp, %0\n\t" - "BX lr \n\t" : : "r" (topOfMainStack) ); -} - -/** - * @brief Return the Base Priority value - * - * @return BasePriority - * - * Return the content of the base priority register - */ -uint32_t __get_BASEPRI(void) -{ - uint32_t result=0; - - __ASM volatile ("MRS %0, basepri_max" : "=r" (result) ); - return(result); -} - -/** - * @brief Set the Base Priority value - * - * @param basePri BasePriority - * - * Set the base priority register - */ -void __set_BASEPRI(uint32_t value) -{ - __ASM volatile ("MSR basepri, %0" : : "r" (value) ); -} - -/** - * @brief Return the Priority Mask value - * - * @return PriMask - * - * Return state of the priority mask bit from the priority mask register - */ -uint32_t __get_PRIMASK(void) -{ - uint32_t result=0; - - __ASM volatile ("MRS %0, primask" : "=r" (result) ); - return(result); -} - -/** - * @brief Set the Priority Mask value - * - * @param priMask PriMask - * - * Set the priority mask bit in the priority mask register - */ -void __set_PRIMASK(uint32_t priMask) -{ - __ASM volatile ("MSR primask, %0" : : "r" (priMask) ); -} - -/** - * @brief Return the Fault Mask value - * - * @return FaultMask - * - * Return the content of the fault mask register - */ -uint32_t __get_FAULTMASK(void) -{ - uint32_t result=0; - - __ASM volatile ("MRS %0, faultmask" : "=r" (result) ); - return(result); -} - -/** - * @brief Set the Fault Mask value - * - * @param faultMask faultMask value - * - * Set the fault mask register - */ -void __set_FAULTMASK(uint32_t faultMask) -{ - __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) ); -} - -/** - * @brief Return the Control Register value -* -* @return Control value - * - * Return the content of the control register - */ -uint32_t __get_CONTROL(void) -{ - uint32_t result=0; - - __ASM volatile ("MRS %0, control" : "=r" (result) ); - return(result); -} - -/** - * @brief Set the Control Register value - * - * @param control Control value - * - * Set the control register - */ -void __set_CONTROL(uint32_t control) -{ - __ASM volatile ("MSR control, %0" : : "r" (control) ); -} - - -/** - * @brief Reverse byte order in integer value - * - * @param value value to reverse - * @return reversed value - * - * Reverse byte order in integer value - */ -uint32_t __REV(uint32_t value) -{ - uint32_t result=0; - - __ASM volatile ("rev %0, %1" : "=r" (result) : "r" (value) ); - return(result); -} - -/** - * @brief Reverse byte order in unsigned short value - * - * @param value value to reverse - * @return reversed value - * - * Reverse byte order in unsigned short value - */ -uint32_t __REV16(uint16_t value) -{ - uint32_t result=0; - - __ASM volatile ("rev16 %0, %1" : "=r" (result) : "r" (value) ); - return(result); -} - -/** - * @brief Reverse byte order in signed short value with sign extension to integer - * - * @param value value to reverse - * @return reversed value - * - * Reverse byte order in signed short value with sign extension to integer - */ -int32_t __REVSH(int16_t value) -{ - uint32_t result=0; - - __ASM volatile ("revsh %0, %1" : "=r" (result) : "r" (value) ); - return(result); -} - -/** - * @brief Reverse bit order of value - * - * @param value value to reverse - * @return reversed value - * - * Reverse bit order of value - */ -uint32_t __RBIT(uint32_t value) -{ - uint32_t result=0; - - __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - return(result); -} - -/** - * @brief LDR Exclusive (8 bit) - * - * @param *addr address pointer - * @return value of (*address) - * - * Exclusive LDR command for 8 bit value - */ -uint8_t __LDREXB(uint8_t *addr) -{ - uint8_t result=0; - - __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) ); - return(result); -} - -/** - * @brief LDR Exclusive (16 bit) - * - * @param *addr address pointer - * @return value of (*address) - * - * Exclusive LDR command for 16 bit values - */ -uint16_t __LDREXH(uint16_t *addr) -{ - uint16_t result=0; - - __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) ); - return(result); -} - -/** - * @brief LDR Exclusive (32 bit) - * - * @param *addr address pointer - * @return value of (*address) - * - * Exclusive LDR command for 32 bit values - */ -uint32_t __LDREXW(uint32_t *addr) -{ - uint32_t result=0; - - __ASM volatile ("ldrex %0, [%1]" : "=r" (result) : "r" (addr) ); - return(result); -} - -/** - * @brief STR Exclusive (8 bit) - * - * @param value value to store - * @param *addr address pointer - * @return successful / failed - * - * Exclusive STR command for 8 bit values - */ -uint32_t __STREXB(uint8_t value, uint8_t *addr) -{ - uint32_t result=0; - - __ASM volatile ("strexb %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) ); - return(result); -} - -/** - * @brief STR Exclusive (16 bit) - * - * @param value value to store - * @param *addr address pointer - * @return successful / failed - * - * Exclusive STR command for 16 bit values - */ -uint32_t __STREXH(uint16_t value, uint16_t *addr) -{ - uint32_t result=0; - - __ASM volatile ("strexh %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) ); - return(result); -} - -/** - * @brief STR Exclusive (32 bit) - * - * @param value value to store - * @param *addr address pointer - * @return successful / failed - * - * Exclusive STR command for 32 bit values - */ -uint32_t __STREXW(uint32_t value, uint32_t *addr) -{ - uint32_t result=0; - - __ASM volatile ("strex %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) ); - return(result); -} - - -#elif (defined (__TASKING__)) /*------------------ TASKING Compiler ---------------------*/ -/* TASKING carm specific functions */ - -/* - * The CMSIS functions have been implemented as intrinsics in the compiler. - * Please use "carm -?i" to get an up to date list of all instrinsics, - * Including the CMSIS ones. - */ - -#endif diff --git a/bsp/stm32_radio/Libraries/CMSIS/CM3/CoreSupport/core_cm3.h b/bsp/stm32_radio/Libraries/CMSIS/CM3/CoreSupport/core_cm3.h deleted file mode 100644 index 2b6b51a7d5..0000000000 --- a/bsp/stm32_radio/Libraries/CMSIS/CM3/CoreSupport/core_cm3.h +++ /dev/null @@ -1,1818 +0,0 @@ -/**************************************************************************//** - * @file core_cm3.h - * @brief CMSIS Cortex-M3 Core Peripheral Access Layer Header File - * @version V1.30 - * @date 30. October 2009 - * - * @note - * Copyright (C) 2009 ARM Limited. All rights reserved. - * - * @par - * ARM Limited (ARM) is supplying this software for use with Cortex-M - * processor based microcontrollers. This file can be freely distributed - * within development tools that are supporting such ARM based processors. - * - * @par - * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED - * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. - * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR - * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. - * - ******************************************************************************/ - -#ifndef __CM3_CORE_H__ -#define __CM3_CORE_H__ - -/** @addtogroup CMSIS_CM3_core_LintCinfiguration CMSIS CM3 Core Lint Configuration - * - * List of Lint messages which will be suppressed and not shown: - * - Error 10: \n - * register uint32_t __regBasePri __asm("basepri"); \n - * Error 10: Expecting ';' - * . - * - Error 530: \n - * return(__regBasePri); \n - * Warning 530: Symbol '__regBasePri' (line 264) not initialized - * . - * - Error 550: \n - * __regBasePri = (basePri & 0x1ff); \n - * Warning 550: Symbol '__regBasePri' (line 271) not accessed - * . - * - Error 754: \n - * uint32_t RESERVED0[24]; \n - * Info 754: local structure member '' (line 109, file ./cm3_core.h) not referenced - * . - * - Error 750: \n - * #define __CM3_CORE_H__ \n - * Info 750: local macro '__CM3_CORE_H__' (line 43, file./cm3_core.h) not referenced - * . - * - Error 528: \n - * static __INLINE void NVIC_DisableIRQ(uint32_t IRQn) \n - * Warning 528: Symbol 'NVIC_DisableIRQ(unsigned int)' (line 419, file ./cm3_core.h) not referenced - * . - * - Error 751: \n - * } InterruptType_Type; \n - * Info 751: local typedef 'InterruptType_Type' (line 170, file ./cm3_core.h) not referenced - * . - * Note: To re-enable a Message, insert a space before 'lint' * - * - */ - -/*lint -save */ -/*lint -e10 */ -/*lint -e530 */ -/*lint -e550 */ -/*lint -e754 */ -/*lint -e750 */ -/*lint -e528 */ -/*lint -e751 */ - - -/** @addtogroup CMSIS_CM3_core_definitions CM3 Core Definitions - This file defines all structures and symbols for CMSIS core: - - CMSIS version number - - Cortex-M core registers and bitfields - - Cortex-M core peripheral base address - @{ - */ - -#ifdef __cplusplus - extern "C" { -#endif - -#define __CM3_CMSIS_VERSION_MAIN (0x01) /*!< [31:16] CMSIS HAL main version */ -#define __CM3_CMSIS_VERSION_SUB (0x30) /*!< [15:0] CMSIS HAL sub version */ -#define __CM3_CMSIS_VERSION ((__CM3_CMSIS_VERSION_MAIN << 16) | __CM3_CMSIS_VERSION_SUB) /*!< CMSIS HAL version number */ - -#define __CORTEX_M (0x03) /*!< Cortex core */ - -#include /* Include standard types */ - -#if defined (__ICCARM__) - #include /* IAR Intrinsics */ -#endif - - -#ifndef __NVIC_PRIO_BITS - #define __NVIC_PRIO_BITS 4 /*!< standard definition for NVIC Priority Bits */ -#endif - - - - -/** - * IO definitions - * - * define access restrictions to peripheral registers - */ - -#ifdef __cplusplus - #define __I volatile /*!< defines 'read only' permissions */ -#else - #define __I volatile const /*!< defines 'read only' permissions */ -#endif -#define __O volatile /*!< defines 'write only' permissions */ -#define __IO volatile /*!< defines 'read / write' permissions */ - - - -/******************************************************************************* - * Register Abstraction - ******************************************************************************/ -/** @addtogroup CMSIS_CM3_core_register CMSIS CM3 Core Register - @{ -*/ - - -/** @addtogroup CMSIS_CM3_NVIC CMSIS CM3 NVIC - memory mapped structure for Nested Vectored Interrupt Controller (NVIC) - @{ - */ -typedef struct -{ - __IO uint32_t ISER[8]; /*!< Offset: 0x000 Interrupt Set Enable Register */ - uint32_t RESERVED0[24]; - __IO uint32_t ICER[8]; /*!< Offset: 0x080 Interrupt Clear Enable Register */ - uint32_t RSERVED1[24]; - __IO uint32_t ISPR[8]; /*!< Offset: 0x100 Interrupt Set Pending Register */ - uint32_t RESERVED2[24]; - __IO uint32_t ICPR[8]; /*!< Offset: 0x180 Interrupt Clear Pending Register */ - uint32_t RESERVED3[24]; - __IO uint32_t IABR[8]; /*!< Offset: 0x200 Interrupt Active bit Register */ - uint32_t RESERVED4[56]; - __IO uint8_t IP[240]; /*!< Offset: 0x300 Interrupt Priority Register (8Bit wide) */ - uint32_t RESERVED5[644]; - __O uint32_t STIR; /*!< Offset: 0xE00 Software Trigger Interrupt Register */ -} NVIC_Type; -/*@}*/ /* end of group CMSIS_CM3_NVIC */ - - -/** @addtogroup CMSIS_CM3_SCB CMSIS CM3 SCB - memory mapped structure for System Control Block (SCB) - @{ - */ -typedef struct -{ - __I uint32_t CPUID; /*!< Offset: 0x00 CPU ID Base Register */ - __IO uint32_t ICSR; /*!< Offset: 0x04 Interrupt Control State Register */ - __IO uint32_t VTOR; /*!< Offset: 0x08 Vector Table Offset Register */ - __IO uint32_t AIRCR; /*!< Offset: 0x0C Application Interrupt / Reset Control Register */ - __IO uint32_t SCR; /*!< Offset: 0x10 System Control Register */ - __IO uint32_t CCR; /*!< Offset: 0x14 Configuration Control Register */ - __IO uint8_t SHP[12]; /*!< Offset: 0x18 System Handlers Priority Registers (4-7, 8-11, 12-15) */ - __IO uint32_t SHCSR; /*!< Offset: 0x24 System Handler Control and State Register */ - __IO uint32_t CFSR; /*!< Offset: 0x28 Configurable Fault Status Register */ - __IO uint32_t HFSR; /*!< Offset: 0x2C Hard Fault Status Register */ - __IO uint32_t DFSR; /*!< Offset: 0x30 Debug Fault Status Register */ - __IO uint32_t MMFAR; /*!< Offset: 0x34 Mem Manage Address Register */ - __IO uint32_t BFAR; /*!< Offset: 0x38 Bus Fault Address Register */ - __IO uint32_t AFSR; /*!< Offset: 0x3C Auxiliary Fault Status Register */ - __I uint32_t PFR[2]; /*!< Offset: 0x40 Processor Feature Register */ - __I uint32_t DFR; /*!< Offset: 0x48 Debug Feature Register */ - __I uint32_t ADR; /*!< Offset: 0x4C Auxiliary Feature Register */ - __I uint32_t MMFR[4]; /*!< Offset: 0x50 Memory Model Feature Register */ - __I uint32_t ISAR[5]; /*!< Offset: 0x60 ISA Feature Register */ -} SCB_Type; - -/* SCB CPUID Register Definitions */ -#define SCB_CPUID_IMPLEMENTER_Pos 24 /*!< SCB CPUID: IMPLEMENTER Position */ -#define SCB_CPUID_IMPLEMENTER_Msk (0xFFul << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */ - -#define SCB_CPUID_VARIANT_Pos 20 /*!< SCB CPUID: VARIANT Position */ -#define SCB_CPUID_VARIANT_Msk (0xFul << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */ - -#define SCB_CPUID_PARTNO_Pos 4 /*!< SCB CPUID: PARTNO Position */ -#define SCB_CPUID_PARTNO_Msk (0xFFFul << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */ - -#define SCB_CPUID_REVISION_Pos 0 /*!< SCB CPUID: REVISION Position */ -#define SCB_CPUID_REVISION_Msk (0xFul << SCB_CPUID_REVISION_Pos) /*!< SCB CPUID: REVISION Mask */ - -/* SCB Interrupt Control State Register Definitions */ -#define SCB_ICSR_NMIPENDSET_Pos 31 /*!< SCB ICSR: NMIPENDSET Position */ -#define SCB_ICSR_NMIPENDSET_Msk (1ul << SCB_ICSR_NMIPENDSET_Pos) /*!< SCB ICSR: NMIPENDSET Mask */ - -#define SCB_ICSR_PENDSVSET_Pos 28 /*!< SCB ICSR: PENDSVSET Position */ -#define SCB_ICSR_PENDSVSET_Msk (1ul << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */ - -#define SCB_ICSR_PENDSVCLR_Pos 27 /*!< SCB ICSR: PENDSVCLR Position */ -#define SCB_ICSR_PENDSVCLR_Msk (1ul << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */ - -#define SCB_ICSR_PENDSTSET_Pos 26 /*!< SCB ICSR: PENDSTSET Position */ -#define SCB_ICSR_PENDSTSET_Msk (1ul << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */ - -#define SCB_ICSR_PENDSTCLR_Pos 25 /*!< SCB ICSR: PENDSTCLR Position */ -#define SCB_ICSR_PENDSTCLR_Msk (1ul << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */ - -#define SCB_ICSR_ISRPREEMPT_Pos 23 /*!< SCB ICSR: ISRPREEMPT Position */ -#define SCB_ICSR_ISRPREEMPT_Msk (1ul << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */ - -#define SCB_ICSR_ISRPENDING_Pos 22 /*!< SCB ICSR: ISRPENDING Position */ -#define SCB_ICSR_ISRPENDING_Msk (1ul << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */ - -#define SCB_ICSR_VECTPENDING_Pos 12 /*!< SCB ICSR: VECTPENDING Position */ -#define SCB_ICSR_VECTPENDING_Msk (0x1FFul << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */ - -#define SCB_ICSR_RETTOBASE_Pos 11 /*!< SCB ICSR: RETTOBASE Position */ -#define SCB_ICSR_RETTOBASE_Msk (1ul << SCB_ICSR_RETTOBASE_Pos) /*!< SCB ICSR: RETTOBASE Mask */ - -#define SCB_ICSR_VECTACTIVE_Pos 0 /*!< SCB ICSR: VECTACTIVE Position */ -#define SCB_ICSR_VECTACTIVE_Msk (0x1FFul << SCB_ICSR_VECTACTIVE_Pos) /*!< SCB ICSR: VECTACTIVE Mask */ - -/* SCB Interrupt Control State Register Definitions */ -#define SCB_VTOR_TBLBASE_Pos 29 /*!< SCB VTOR: TBLBASE Position */ -#define SCB_VTOR_TBLBASE_Msk (0x1FFul << SCB_VTOR_TBLBASE_Pos) /*!< SCB VTOR: TBLBASE Mask */ - -#define SCB_VTOR_TBLOFF_Pos 7 /*!< SCB VTOR: TBLOFF Position */ -#define SCB_VTOR_TBLOFF_Msk (0x3FFFFFul << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */ - -/* SCB Application Interrupt and Reset Control Register Definitions */ -#define SCB_AIRCR_VECTKEY_Pos 16 /*!< SCB AIRCR: VECTKEY Position */ -#define SCB_AIRCR_VECTKEY_Msk (0xFFFFul << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */ - -#define SCB_AIRCR_VECTKEYSTAT_Pos 16 /*!< SCB AIRCR: VECTKEYSTAT Position */ -#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFul << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */ - -#define SCB_AIRCR_ENDIANESS_Pos 15 /*!< SCB AIRCR: ENDIANESS Position */ -#define SCB_AIRCR_ENDIANESS_Msk (1ul << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */ - -#define SCB_AIRCR_PRIGROUP_Pos 8 /*!< SCB AIRCR: PRIGROUP Position */ -#define SCB_AIRCR_PRIGROUP_Msk (7ul << SCB_AIRCR_PRIGROUP_Pos) /*!< SCB AIRCR: PRIGROUP Mask */ - -#define SCB_AIRCR_SYSRESETREQ_Pos 2 /*!< SCB AIRCR: SYSRESETREQ Position */ -#define SCB_AIRCR_SYSRESETREQ_Msk (1ul << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */ - -#define SCB_AIRCR_VECTCLRACTIVE_Pos 1 /*!< SCB AIRCR: VECTCLRACTIVE Position */ -#define SCB_AIRCR_VECTCLRACTIVE_Msk (1ul << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */ - -#define SCB_AIRCR_VECTRESET_Pos 0 /*!< SCB AIRCR: VECTRESET Position */ -#define SCB_AIRCR_VECTRESET_Msk (1ul << SCB_AIRCR_VECTRESET_Pos) /*!< SCB AIRCR: VECTRESET Mask */ - -/* SCB System Control Register Definitions */ -#define SCB_SCR_SEVONPEND_Pos 4 /*!< SCB SCR: SEVONPEND Position */ -#define SCB_SCR_SEVONPEND_Msk (1ul << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */ - -#define SCB_SCR_SLEEPDEEP_Pos 2 /*!< SCB SCR: SLEEPDEEP Position */ -#define SCB_SCR_SLEEPDEEP_Msk (1ul << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */ - -#define SCB_SCR_SLEEPONEXIT_Pos 1 /*!< SCB SCR: SLEEPONEXIT Position */ -#define SCB_SCR_SLEEPONEXIT_Msk (1ul << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */ - -/* SCB Configuration Control Register Definitions */ -#define SCB_CCR_STKALIGN_Pos 9 /*!< SCB CCR: STKALIGN Position */ -#define SCB_CCR_STKALIGN_Msk (1ul << SCB_CCR_STKALIGN_Pos) /*!< SCB CCR: STKALIGN Mask */ - -#define SCB_CCR_BFHFNMIGN_Pos 8 /*!< SCB CCR: BFHFNMIGN Position */ -#define SCB_CCR_BFHFNMIGN_Msk (1ul << SCB_CCR_BFHFNMIGN_Pos) /*!< SCB CCR: BFHFNMIGN Mask */ - -#define SCB_CCR_DIV_0_TRP_Pos 4 /*!< SCB CCR: DIV_0_TRP Position */ -#define SCB_CCR_DIV_0_TRP_Msk (1ul << SCB_CCR_DIV_0_TRP_Pos) /*!< SCB CCR: DIV_0_TRP Mask */ - -#define SCB_CCR_UNALIGN_TRP_Pos 3 /*!< SCB CCR: UNALIGN_TRP Position */ -#define SCB_CCR_UNALIGN_TRP_Msk (1ul << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */ - -#define SCB_CCR_USERSETMPEND_Pos 1 /*!< SCB CCR: USERSETMPEND Position */ -#define SCB_CCR_USERSETMPEND_Msk (1ul << SCB_CCR_USERSETMPEND_Pos) /*!< SCB CCR: USERSETMPEND Mask */ - -#define SCB_CCR_NONBASETHRDENA_Pos 0 /*!< SCB CCR: NONBASETHRDENA Position */ -#define SCB_CCR_NONBASETHRDENA_Msk (1ul << SCB_CCR_NONBASETHRDENA_Pos) /*!< SCB CCR: NONBASETHRDENA Mask */ - -/* SCB System Handler Control and State Register Definitions */ -#define SCB_SHCSR_USGFAULTENA_Pos 18 /*!< SCB SHCSR: USGFAULTENA Position */ -#define SCB_SHCSR_USGFAULTENA_Msk (1ul << SCB_SHCSR_USGFAULTENA_Pos) /*!< SCB SHCSR: USGFAULTENA Mask */ - -#define SCB_SHCSR_BUSFAULTENA_Pos 17 /*!< SCB SHCSR: BUSFAULTENA Position */ -#define SCB_SHCSR_BUSFAULTENA_Msk (1ul << SCB_SHCSR_BUSFAULTENA_Pos) /*!< SCB SHCSR: BUSFAULTENA Mask */ - -#define SCB_SHCSR_MEMFAULTENA_Pos 16 /*!< SCB SHCSR: MEMFAULTENA Position */ -#define SCB_SHCSR_MEMFAULTENA_Msk (1ul << SCB_SHCSR_MEMFAULTENA_Pos) /*!< SCB SHCSR: MEMFAULTENA Mask */ - -#define SCB_SHCSR_SVCALLPENDED_Pos 15 /*!< SCB SHCSR: SVCALLPENDED Position */ -#define SCB_SHCSR_SVCALLPENDED_Msk (1ul << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */ - -#define SCB_SHCSR_BUSFAULTPENDED_Pos 14 /*!< SCB SHCSR: BUSFAULTPENDED Position */ -#define SCB_SHCSR_BUSFAULTPENDED_Msk (1ul << SCB_SHCSR_BUSFAULTPENDED_Pos) /*!< SCB SHCSR: BUSFAULTPENDED Mask */ - -#define SCB_SHCSR_MEMFAULTPENDED_Pos 13 /*!< SCB SHCSR: MEMFAULTPENDED Position */ -#define SCB_SHCSR_MEMFAULTPENDED_Msk (1ul << SCB_SHCSR_MEMFAULTPENDED_Pos) /*!< SCB SHCSR: MEMFAULTPENDED Mask */ - -#define SCB_SHCSR_USGFAULTPENDED_Pos 12 /*!< SCB SHCSR: USGFAULTPENDED Position */ -#define SCB_SHCSR_USGFAULTPENDED_Msk (1ul << SCB_SHCSR_USGFAULTPENDED_Pos) /*!< SCB SHCSR: USGFAULTPENDED Mask */ - -#define SCB_SHCSR_SYSTICKACT_Pos 11 /*!< SCB SHCSR: SYSTICKACT Position */ -#define SCB_SHCSR_SYSTICKACT_Msk (1ul << SCB_SHCSR_SYSTICKACT_Pos) /*!< SCB SHCSR: SYSTICKACT Mask */ - -#define SCB_SHCSR_PENDSVACT_Pos 10 /*!< SCB SHCSR: PENDSVACT Position */ -#define SCB_SHCSR_PENDSVACT_Msk (1ul << SCB_SHCSR_PENDSVACT_Pos) /*!< SCB SHCSR: PENDSVACT Mask */ - -#define SCB_SHCSR_MONITORACT_Pos 8 /*!< SCB SHCSR: MONITORACT Position */ -#define SCB_SHCSR_MONITORACT_Msk (1ul << SCB_SHCSR_MONITORACT_Pos) /*!< SCB SHCSR: MONITORACT Mask */ - -#define SCB_SHCSR_SVCALLACT_Pos 7 /*!< SCB SHCSR: SVCALLACT Position */ -#define SCB_SHCSR_SVCALLACT_Msk (1ul << SCB_SHCSR_SVCALLACT_Pos) /*!< SCB SHCSR: SVCALLACT Mask */ - -#define SCB_SHCSR_USGFAULTACT_Pos 3 /*!< SCB SHCSR: USGFAULTACT Position */ -#define SCB_SHCSR_USGFAULTACT_Msk (1ul << SCB_SHCSR_USGFAULTACT_Pos) /*!< SCB SHCSR: USGFAULTACT Mask */ - -#define SCB_SHCSR_BUSFAULTACT_Pos 1 /*!< SCB SHCSR: BUSFAULTACT Position */ -#define SCB_SHCSR_BUSFAULTACT_Msk (1ul << SCB_SHCSR_BUSFAULTACT_Pos) /*!< SCB SHCSR: BUSFAULTACT Mask */ - -#define SCB_SHCSR_MEMFAULTACT_Pos 0 /*!< SCB SHCSR: MEMFAULTACT Position */ -#define SCB_SHCSR_MEMFAULTACT_Msk (1ul << SCB_SHCSR_MEMFAULTACT_Pos) /*!< SCB SHCSR: MEMFAULTACT Mask */ - -/* SCB Configurable Fault Status Registers Definitions */ -#define SCB_CFSR_USGFAULTSR_Pos 16 /*!< SCB CFSR: Usage Fault Status Register Position */ -#define SCB_CFSR_USGFAULTSR_Msk (0xFFFFul << SCB_CFSR_USGFAULTSR_Pos) /*!< SCB CFSR: Usage Fault Status Register Mask */ - -#define SCB_CFSR_BUSFAULTSR_Pos 8 /*!< SCB CFSR: Bus Fault Status Register Position */ -#define SCB_CFSR_BUSFAULTSR_Msk (0xFFul << SCB_CFSR_BUSFAULTSR_Pos) /*!< SCB CFSR: Bus Fault Status Register Mask */ - -#define SCB_CFSR_MEMFAULTSR_Pos 0 /*!< SCB CFSR: Memory Manage Fault Status Register Position */ -#define SCB_CFSR_MEMFAULTSR_Msk (0xFFul << SCB_CFSR_MEMFAULTSR_Pos) /*!< SCB CFSR: Memory Manage Fault Status Register Mask */ - -/* SCB Hard Fault Status Registers Definitions */ -#define SCB_HFSR_DEBUGEVT_Pos 31 /*!< SCB HFSR: DEBUGEVT Position */ -#define SCB_HFSR_DEBUGEVT_Msk (1ul << SCB_HFSR_DEBUGEVT_Pos) /*!< SCB HFSR: DEBUGEVT Mask */ - -#define SCB_HFSR_FORCED_Pos 30 /*!< SCB HFSR: FORCED Position */ -#define SCB_HFSR_FORCED_Msk (1ul << SCB_HFSR_FORCED_Pos) /*!< SCB HFSR: FORCED Mask */ - -#define SCB_HFSR_VECTTBL_Pos 1 /*!< SCB HFSR: VECTTBL Position */ -#define SCB_HFSR_VECTTBL_Msk (1ul << SCB_HFSR_VECTTBL_Pos) /*!< SCB HFSR: VECTTBL Mask */ - -/* SCB Debug Fault Status Register Definitions */ -#define SCB_DFSR_EXTERNAL_Pos 4 /*!< SCB DFSR: EXTERNAL Position */ -#define SCB_DFSR_EXTERNAL_Msk (1ul << SCB_DFSR_EXTERNAL_Pos) /*!< SCB DFSR: EXTERNAL Mask */ - -#define SCB_DFSR_VCATCH_Pos 3 /*!< SCB DFSR: VCATCH Position */ -#define SCB_DFSR_VCATCH_Msk (1ul << SCB_DFSR_VCATCH_Pos) /*!< SCB DFSR: VCATCH Mask */ - -#define SCB_DFSR_DWTTRAP_Pos 2 /*!< SCB DFSR: DWTTRAP Position */ -#define SCB_DFSR_DWTTRAP_Msk (1ul << SCB_DFSR_DWTTRAP_Pos) /*!< SCB DFSR: DWTTRAP Mask */ - -#define SCB_DFSR_BKPT_Pos 1 /*!< SCB DFSR: BKPT Position */ -#define SCB_DFSR_BKPT_Msk (1ul << SCB_DFSR_BKPT_Pos) /*!< SCB DFSR: BKPT Mask */ - -#define SCB_DFSR_HALTED_Pos 0 /*!< SCB DFSR: HALTED Position */ -#define SCB_DFSR_HALTED_Msk (1ul << SCB_DFSR_HALTED_Pos) /*!< SCB DFSR: HALTED Mask */ -/*@}*/ /* end of group CMSIS_CM3_SCB */ - - -/** @addtogroup CMSIS_CM3_SysTick CMSIS CM3 SysTick - memory mapped structure for SysTick - @{ - */ -typedef struct -{ - __IO uint32_t CTRL; /*!< Offset: 0x00 SysTick Control and Status Register */ - __IO uint32_t LOAD; /*!< Offset: 0x04 SysTick Reload Value Register */ - __IO uint32_t VAL; /*!< Offset: 0x08 SysTick Current Value Register */ - __I uint32_t CALIB; /*!< Offset: 0x0C SysTick Calibration Register */ -} SysTick_Type; - -/* SysTick Control / Status Register Definitions */ -#define SysTick_CTRL_COUNTFLAG_Pos 16 /*!< SysTick CTRL: COUNTFLAG Position */ -#define SysTick_CTRL_COUNTFLAG_Msk (1ul << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */ - -#define SysTick_CTRL_CLKSOURCE_Pos 2 /*!< SysTick CTRL: CLKSOURCE Position */ -#define SysTick_CTRL_CLKSOURCE_Msk (1ul << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */ - -#define SysTick_CTRL_TICKINT_Pos 1 /*!< SysTick CTRL: TICKINT Position */ -#define SysTick_CTRL_TICKINT_Msk (1ul << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */ - -#define SysTick_CTRL_ENABLE_Pos 0 /*!< SysTick CTRL: ENABLE Position */ -#define SysTick_CTRL_ENABLE_Msk (1ul << SysTick_CTRL_ENABLE_Pos) /*!< SysTick CTRL: ENABLE Mask */ - -/* SysTick Reload Register Definitions */ -#define SysTick_LOAD_RELOAD_Pos 0 /*!< SysTick LOAD: RELOAD Position */ -#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFul << SysTick_LOAD_RELOAD_Pos) /*!< SysTick LOAD: RELOAD Mask */ - -/* SysTick Current Register Definitions */ -#define SysTick_VAL_CURRENT_Pos 0 /*!< SysTick VAL: CURRENT Position */ -#define SysTick_VAL_CURRENT_Msk (0xFFFFFFul << SysTick_VAL_CURRENT_Pos) /*!< SysTick VAL: CURRENT Mask */ - -/* SysTick Calibration Register Definitions */ -#define SysTick_CALIB_NOREF_Pos 31 /*!< SysTick CALIB: NOREF Position */ -#define SysTick_CALIB_NOREF_Msk (1ul << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */ - -#define SysTick_CALIB_SKEW_Pos 30 /*!< SysTick CALIB: SKEW Position */ -#define SysTick_CALIB_SKEW_Msk (1ul << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */ - -#define SysTick_CALIB_TENMS_Pos 0 /*!< SysTick CALIB: TENMS Position */ -#define SysTick_CALIB_TENMS_Msk (0xFFFFFFul << SysTick_VAL_CURRENT_Pos) /*!< SysTick CALIB: TENMS Mask */ -/*@}*/ /* end of group CMSIS_CM3_SysTick */ - - -/** @addtogroup CMSIS_CM3_ITM CMSIS CM3 ITM - memory mapped structure for Instrumentation Trace Macrocell (ITM) - @{ - */ -typedef struct -{ - __O union - { - __O uint8_t u8; /*!< Offset: ITM Stimulus Port 8-bit */ - __O uint16_t u16; /*!< Offset: ITM Stimulus Port 16-bit */ - __O uint32_t u32; /*!< Offset: ITM Stimulus Port 32-bit */ - } PORT [32]; /*!< Offset: 0x00 ITM Stimulus Port Registers */ - uint32_t RESERVED0[864]; - __IO uint32_t TER; /*!< Offset: ITM Trace Enable Register */ - uint32_t RESERVED1[15]; - __IO uint32_t TPR; /*!< Offset: ITM Trace Privilege Register */ - uint32_t RESERVED2[15]; - __IO uint32_t TCR; /*!< Offset: ITM Trace Control Register */ - uint32_t RESERVED3[29]; - __IO uint32_t IWR; /*!< Offset: ITM Integration Write Register */ - __IO uint32_t IRR; /*!< Offset: ITM Integration Read Register */ - __IO uint32_t IMCR; /*!< Offset: ITM Integration Mode Control Register */ - uint32_t RESERVED4[43]; - __IO uint32_t LAR; /*!< Offset: ITM Lock Access Register */ - __IO uint32_t LSR; /*!< Offset: ITM Lock Status Register */ - uint32_t RESERVED5[6]; - __I uint32_t PID4; /*!< Offset: ITM Peripheral Identification Register #4 */ - __I uint32_t PID5; /*!< Offset: ITM Peripheral Identification Register #5 */ - __I uint32_t PID6; /*!< Offset: ITM Peripheral Identification Register #6 */ - __I uint32_t PID7; /*!< Offset: ITM Peripheral Identification Register #7 */ - __I uint32_t PID0; /*!< Offset: ITM Peripheral Identification Register #0 */ - __I uint32_t PID1; /*!< Offset: ITM Peripheral Identification Register #1 */ - __I uint32_t PID2; /*!< Offset: ITM Peripheral Identification Register #2 */ - __I uint32_t PID3; /*!< Offset: ITM Peripheral Identification Register #3 */ - __I uint32_t CID0; /*!< Offset: ITM Component Identification Register #0 */ - __I uint32_t CID1; /*!< Offset: ITM Component Identification Register #1 */ - __I uint32_t CID2; /*!< Offset: ITM Component Identification Register #2 */ - __I uint32_t CID3; /*!< Offset: ITM Component Identification Register #3 */ -} ITM_Type; - -/* ITM Trace Privilege Register Definitions */ -#define ITM_TPR_PRIVMASK_Pos 0 /*!< ITM TPR: PRIVMASK Position */ -#define ITM_TPR_PRIVMASK_Msk (0xFul << ITM_TPR_PRIVMASK_Pos) /*!< ITM TPR: PRIVMASK Mask */ - -/* ITM Trace Control Register Definitions */ -#define ITM_TCR_BUSY_Pos 23 /*!< ITM TCR: BUSY Position */ -#define ITM_TCR_BUSY_Msk (1ul << ITM_TCR_BUSY_Pos) /*!< ITM TCR: BUSY Mask */ - -#define ITM_TCR_ATBID_Pos 16 /*!< ITM TCR: ATBID Position */ -#define ITM_TCR_ATBID_Msk (0x7Ful << ITM_TCR_ATBID_Pos) /*!< ITM TCR: ATBID Mask */ - -#define ITM_TCR_TSPrescale_Pos 8 /*!< ITM TCR: TSPrescale Position */ -#define ITM_TCR_TSPrescale_Msk (3ul << ITM_TCR_TSPrescale_Pos) /*!< ITM TCR: TSPrescale Mask */ - -#define ITM_TCR_SWOENA_Pos 4 /*!< ITM TCR: SWOENA Position */ -#define ITM_TCR_SWOENA_Msk (1ul << ITM_TCR_SWOENA_Pos) /*!< ITM TCR: SWOENA Mask */ - -#define ITM_TCR_DWTENA_Pos 3 /*!< ITM TCR: DWTENA Position */ -#define ITM_TCR_DWTENA_Msk (1ul << ITM_TCR_DWTENA_Pos) /*!< ITM TCR: DWTENA Mask */ - -#define ITM_TCR_SYNCENA_Pos 2 /*!< ITM TCR: SYNCENA Position */ -#define ITM_TCR_SYNCENA_Msk (1ul << ITM_TCR_SYNCENA_Pos) /*!< ITM TCR: SYNCENA Mask */ - -#define ITM_TCR_TSENA_Pos 1 /*!< ITM TCR: TSENA Position */ -#define ITM_TCR_TSENA_Msk (1ul << ITM_TCR_TSENA_Pos) /*!< ITM TCR: TSENA Mask */ - -#define ITM_TCR_ITMENA_Pos 0 /*!< ITM TCR: ITM Enable bit Position */ -#define ITM_TCR_ITMENA_Msk (1ul << ITM_TCR_ITMENA_Pos) /*!< ITM TCR: ITM Enable bit Mask */ - -/* ITM Integration Write Register Definitions */ -#define ITM_IWR_ATVALIDM_Pos 0 /*!< ITM IWR: ATVALIDM Position */ -#define ITM_IWR_ATVALIDM_Msk (1ul << ITM_IWR_ATVALIDM_Pos) /*!< ITM IWR: ATVALIDM Mask */ - -/* ITM Integration Read Register Definitions */ -#define ITM_IRR_ATREADYM_Pos 0 /*!< ITM IRR: ATREADYM Position */ -#define ITM_IRR_ATREADYM_Msk (1ul << ITM_IRR_ATREADYM_Pos) /*!< ITM IRR: ATREADYM Mask */ - -/* ITM Integration Mode Control Register Definitions */ -#define ITM_IMCR_INTEGRATION_Pos 0 /*!< ITM IMCR: INTEGRATION Position */ -#define ITM_IMCR_INTEGRATION_Msk (1ul << ITM_IMCR_INTEGRATION_Pos) /*!< ITM IMCR: INTEGRATION Mask */ - -/* ITM Lock Status Register Definitions */ -#define ITM_LSR_ByteAcc_Pos 2 /*!< ITM LSR: ByteAcc Position */ -#define ITM_LSR_ByteAcc_Msk (1ul << ITM_LSR_ByteAcc_Pos) /*!< ITM LSR: ByteAcc Mask */ - -#define ITM_LSR_Access_Pos 1 /*!< ITM LSR: Access Position */ -#define ITM_LSR_Access_Msk (1ul << ITM_LSR_Access_Pos) /*!< ITM LSR: Access Mask */ - -#define ITM_LSR_Present_Pos 0 /*!< ITM LSR: Present Position */ -#define ITM_LSR_Present_Msk (1ul << ITM_LSR_Present_Pos) /*!< ITM LSR: Present Mask */ -/*@}*/ /* end of group CMSIS_CM3_ITM */ - - -/** @addtogroup CMSIS_CM3_InterruptType CMSIS CM3 Interrupt Type - memory mapped structure for Interrupt Type - @{ - */ -typedef struct -{ - uint32_t RESERVED0; - __I uint32_t ICTR; /*!< Offset: 0x04 Interrupt Control Type Register */ -#if ((defined __CM3_REV) && (__CM3_REV >= 0x200)) - __IO uint32_t ACTLR; /*!< Offset: 0x08 Auxiliary Control Register */ -#else - uint32_t RESERVED1; -#endif -} InterruptType_Type; - -/* Interrupt Controller Type Register Definitions */ -#define InterruptType_ICTR_INTLINESNUM_Pos 0 /*!< InterruptType ICTR: INTLINESNUM Position */ -#define InterruptType_ICTR_INTLINESNUM_Msk (0x1Ful << InterruptType_ICTR_INTLINESNUM_Pos) /*!< InterruptType ICTR: INTLINESNUM Mask */ - -/* Auxiliary Control Register Definitions */ -#define InterruptType_ACTLR_DISFOLD_Pos 2 /*!< InterruptType ACTLR: DISFOLD Position */ -#define InterruptType_ACTLR_DISFOLD_Msk (1ul << InterruptType_ACTLR_DISFOLD_Pos) /*!< InterruptType ACTLR: DISFOLD Mask */ - -#define InterruptType_ACTLR_DISDEFWBUF_Pos 1 /*!< InterruptType ACTLR: DISDEFWBUF Position */ -#define InterruptType_ACTLR_DISDEFWBUF_Msk (1ul << InterruptType_ACTLR_DISDEFWBUF_Pos) /*!< InterruptType ACTLR: DISDEFWBUF Mask */ - -#define InterruptType_ACTLR_DISMCYCINT_Pos 0 /*!< InterruptType ACTLR: DISMCYCINT Position */ -#define InterruptType_ACTLR_DISMCYCINT_Msk (1ul << InterruptType_ACTLR_DISMCYCINT_Pos) /*!< InterruptType ACTLR: DISMCYCINT Mask */ -/*@}*/ /* end of group CMSIS_CM3_InterruptType */ - - -#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1) -/** @addtogroup CMSIS_CM3_MPU CMSIS CM3 MPU - memory mapped structure for Memory Protection Unit (MPU) - @{ - */ -typedef struct -{ - __I uint32_t TYPE; /*!< Offset: 0x00 MPU Type Register */ - __IO uint32_t CTRL; /*!< Offset: 0x04 MPU Control Register */ - __IO uint32_t RNR; /*!< Offset: 0x08 MPU Region RNRber Register */ - __IO uint32_t RBAR; /*!< Offset: 0x0C MPU Region Base Address Register */ - __IO uint32_t RASR; /*!< Offset: 0x10 MPU Region Attribute and Size Register */ - __IO uint32_t RBAR_A1; /*!< Offset: 0x14 MPU Alias 1 Region Base Address Register */ - __IO uint32_t RASR_A1; /*!< Offset: 0x18 MPU Alias 1 Region Attribute and Size Register */ - __IO uint32_t RBAR_A2; /*!< Offset: 0x1C MPU Alias 2 Region Base Address Register */ - __IO uint32_t RASR_A2; /*!< Offset: 0x20 MPU Alias 2 Region Attribute and Size Register */ - __IO uint32_t RBAR_A3; /*!< Offset: 0x24 MPU Alias 3 Region Base Address Register */ - __IO uint32_t RASR_A3; /*!< Offset: 0x28 MPU Alias 3 Region Attribute and Size Register */ -} MPU_Type; - -/* MPU Type Register */ -#define MPU_TYPE_IREGION_Pos 16 /*!< MPU TYPE: IREGION Position */ -#define MPU_TYPE_IREGION_Msk (0xFFul << MPU_TYPE_IREGION_Pos) /*!< MPU TYPE: IREGION Mask */ - -#define MPU_TYPE_DREGION_Pos 8 /*!< MPU TYPE: DREGION Position */ -#define MPU_TYPE_DREGION_Msk (0xFFul << MPU_TYPE_DREGION_Pos) /*!< MPU TYPE: DREGION Mask */ - -#define MPU_TYPE_SEPARATE_Pos 0 /*!< MPU TYPE: SEPARATE Position */ -#define MPU_TYPE_SEPARATE_Msk (1ul << MPU_TYPE_SEPARATE_Pos) /*!< MPU TYPE: SEPARATE Mask */ - -/* MPU Control Register */ -#define MPU_CTRL_PRIVDEFENA_Pos 2 /*!< MPU CTRL: PRIVDEFENA Position */ -#define MPU_CTRL_PRIVDEFENA_Msk (1ul << MPU_CTRL_PRIVDEFENA_Pos) /*!< MPU CTRL: PRIVDEFENA Mask */ - -#define MPU_CTRL_HFNMIENA_Pos 1 /*!< MPU CTRL: HFNMIENA Position */ -#define MPU_CTRL_HFNMIENA_Msk (1ul << MPU_CTRL_HFNMIENA_Pos) /*!< MPU CTRL: HFNMIENA Mask */ - -#define MPU_CTRL_ENABLE_Pos 0 /*!< MPU CTRL: ENABLE Position */ -#define MPU_CTRL_ENABLE_Msk (1ul << MPU_CTRL_ENABLE_Pos) /*!< MPU CTRL: ENABLE Mask */ - -/* MPU Region Number Register */ -#define MPU_RNR_REGION_Pos 0 /*!< MPU RNR: REGION Position */ -#define MPU_RNR_REGION_Msk (0xFFul << MPU_RNR_REGION_Pos) /*!< MPU RNR: REGION Mask */ - -/* MPU Region Base Address Register */ -#define MPU_RBAR_ADDR_Pos 5 /*!< MPU RBAR: ADDR Position */ -#define MPU_RBAR_ADDR_Msk (0x7FFFFFFul << MPU_RBAR_ADDR_Pos) /*!< MPU RBAR: ADDR Mask */ - -#define MPU_RBAR_VALID_Pos 4 /*!< MPU RBAR: VALID Position */ -#define MPU_RBAR_VALID_Msk (1ul << MPU_RBAR_VALID_Pos) /*!< MPU RBAR: VALID Mask */ - -#define MPU_RBAR_REGION_Pos 0 /*!< MPU RBAR: REGION Position */ -#define MPU_RBAR_REGION_Msk (0xFul << MPU_RBAR_REGION_Pos) /*!< MPU RBAR: REGION Mask */ - -/* MPU Region Attribute and Size Register */ -#define MPU_RASR_XN_Pos 28 /*!< MPU RASR: XN Position */ -#define MPU_RASR_XN_Msk (1ul << MPU_RASR_XN_Pos) /*!< MPU RASR: XN Mask */ - -#define MPU_RASR_AP_Pos 24 /*!< MPU RASR: AP Position */ -#define MPU_RASR_AP_Msk (7ul << MPU_RASR_AP_Pos) /*!< MPU RASR: AP Mask */ - -#define MPU_RASR_TEX_Pos 19 /*!< MPU RASR: TEX Position */ -#define MPU_RASR_TEX_Msk (7ul << MPU_RASR_TEX_Pos) /*!< MPU RASR: TEX Mask */ - -#define MPU_RASR_S_Pos 18 /*!< MPU RASR: Shareable bit Position */ -#define MPU_RASR_S_Msk (1ul << MPU_RASR_S_Pos) /*!< MPU RASR: Shareable bit Mask */ - -#define MPU_RASR_C_Pos 17 /*!< MPU RASR: Cacheable bit Position */ -#define MPU_RASR_C_Msk (1ul << MPU_RASR_C_Pos) /*!< MPU RASR: Cacheable bit Mask */ - -#define MPU_RASR_B_Pos 16 /*!< MPU RASR: Bufferable bit Position */ -#define MPU_RASR_B_Msk (1ul << MPU_RASR_B_Pos) /*!< MPU RASR: Bufferable bit Mask */ - -#define MPU_RASR_SRD_Pos 8 /*!< MPU RASR: Sub-Region Disable Position */ -#define MPU_RASR_SRD_Msk (0xFFul << MPU_RASR_SRD_Pos) /*!< MPU RASR: Sub-Region Disable Mask */ - -#define MPU_RASR_SIZE_Pos 1 /*!< MPU RASR: Region Size Field Position */ -#define MPU_RASR_SIZE_Msk (0x1Ful << MPU_RASR_SIZE_Pos) /*!< MPU RASR: Region Size Field Mask */ - -#define MPU_RASR_ENA_Pos 0 /*!< MPU RASR: Region enable bit Position */ -#define MPU_RASR_ENA_Msk (0x1Ful << MPU_RASR_ENA_Pos) /*!< MPU RASR: Region enable bit Disable Mask */ - -/*@}*/ /* end of group CMSIS_CM3_MPU */ -#endif - - -/** @addtogroup CMSIS_CM3_CoreDebug CMSIS CM3 Core Debug - memory mapped structure for Core Debug Register - @{ - */ -typedef struct -{ - __IO uint32_t DHCSR; /*!< Offset: 0x00 Debug Halting Control and Status Register */ - __O uint32_t DCRSR; /*!< Offset: 0x04 Debug Core Register Selector Register */ - __IO uint32_t DCRDR; /*!< Offset: 0x08 Debug Core Register Data Register */ - __IO uint32_t DEMCR; /*!< Offset: 0x0C Debug Exception and Monitor Control Register */ -} CoreDebug_Type; - -/* Debug Halting Control and Status Register */ -#define CoreDebug_DHCSR_DBGKEY_Pos 16 /*!< CoreDebug DHCSR: DBGKEY Position */ -#define CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFul << CoreDebug_DHCSR_DBGKEY_Pos) /*!< CoreDebug DHCSR: DBGKEY Mask */ - -#define CoreDebug_DHCSR_S_RESET_ST_Pos 25 /*!< CoreDebug DHCSR: S_RESET_ST Position */ -#define CoreDebug_DHCSR_S_RESET_ST_Msk (1ul << CoreDebug_DHCSR_S_RESET_ST_Pos) /*!< CoreDebug DHCSR: S_RESET_ST Mask */ - -#define CoreDebug_DHCSR_S_RETIRE_ST_Pos 24 /*!< CoreDebug DHCSR: S_RETIRE_ST Position */ -#define CoreDebug_DHCSR_S_RETIRE_ST_Msk (1ul << CoreDebug_DHCSR_S_RETIRE_ST_Pos) /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */ - -#define CoreDebug_DHCSR_S_LOCKUP_Pos 19 /*!< CoreDebug DHCSR: S_LOCKUP Position */ -#define CoreDebug_DHCSR_S_LOCKUP_Msk (1ul << CoreDebug_DHCSR_S_LOCKUP_Pos) /*!< CoreDebug DHCSR: S_LOCKUP Mask */ - -#define CoreDebug_DHCSR_S_SLEEP_Pos 18 /*!< CoreDebug DHCSR: S_SLEEP Position */ -#define CoreDebug_DHCSR_S_SLEEP_Msk (1ul << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< CoreDebug DHCSR: S_SLEEP Mask */ - -#define CoreDebug_DHCSR_S_HALT_Pos 17 /*!< CoreDebug DHCSR: S_HALT Position */ -#define CoreDebug_DHCSR_S_HALT_Msk (1ul << CoreDebug_DHCSR_S_HALT_Pos) /*!< CoreDebug DHCSR: S_HALT Mask */ - -#define CoreDebug_DHCSR_S_REGRDY_Pos 16 /*!< CoreDebug DHCSR: S_REGRDY Position */ -#define CoreDebug_DHCSR_S_REGRDY_Msk (1ul << CoreDebug_DHCSR_S_REGRDY_Pos) /*!< CoreDebug DHCSR: S_REGRDY Mask */ - -#define CoreDebug_DHCSR_C_SNAPSTALL_Pos 5 /*!< CoreDebug DHCSR: C_SNAPSTALL Position */ -#define CoreDebug_DHCSR_C_SNAPSTALL_Msk (1ul << CoreDebug_DHCSR_C_SNAPSTALL_Pos) /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */ - -#define CoreDebug_DHCSR_C_MASKINTS_Pos 3 /*!< CoreDebug DHCSR: C_MASKINTS Position */ -#define CoreDebug_DHCSR_C_MASKINTS_Msk (1ul << CoreDebug_DHCSR_C_MASKINTS_Pos) /*!< CoreDebug DHCSR: C_MASKINTS Mask */ - -#define CoreDebug_DHCSR_C_STEP_Pos 2 /*!< CoreDebug DHCSR: C_STEP Position */ -#define CoreDebug_DHCSR_C_STEP_Msk (1ul << CoreDebug_DHCSR_C_STEP_Pos) /*!< CoreDebug DHCSR: C_STEP Mask */ - -#define CoreDebug_DHCSR_C_HALT_Pos 1 /*!< CoreDebug DHCSR: C_HALT Position */ -#define CoreDebug_DHCSR_C_HALT_Msk (1ul << CoreDebug_DHCSR_C_HALT_Pos) /*!< CoreDebug DHCSR: C_HALT Mask */ - -#define CoreDebug_DHCSR_C_DEBUGEN_Pos 0 /*!< CoreDebug DHCSR: C_DEBUGEN Position */ -#define CoreDebug_DHCSR_C_DEBUGEN_Msk (1ul << CoreDebug_DHCSR_C_DEBUGEN_Pos) /*!< CoreDebug DHCSR: C_DEBUGEN Mask */ - -/* Debug Core Register Selector Register */ -#define CoreDebug_DCRSR_REGWnR_Pos 16 /*!< CoreDebug DCRSR: REGWnR Position */ -#define CoreDebug_DCRSR_REGWnR_Msk (1ul << CoreDebug_DCRSR_REGWnR_Pos) /*!< CoreDebug DCRSR: REGWnR Mask */ - -#define CoreDebug_DCRSR_REGSEL_Pos 0 /*!< CoreDebug DCRSR: REGSEL Position */ -#define CoreDebug_DCRSR_REGSEL_Msk (0x1Ful << CoreDebug_DCRSR_REGSEL_Pos) /*!< CoreDebug DCRSR: REGSEL Mask */ - -/* Debug Exception and Monitor Control Register */ -#define CoreDebug_DEMCR_TRCENA_Pos 24 /*!< CoreDebug DEMCR: TRCENA Position */ -#define CoreDebug_DEMCR_TRCENA_Msk (1ul << CoreDebug_DEMCR_TRCENA_Pos) /*!< CoreDebug DEMCR: TRCENA Mask */ - -#define CoreDebug_DEMCR_MON_REQ_Pos 19 /*!< CoreDebug DEMCR: MON_REQ Position */ -#define CoreDebug_DEMCR_MON_REQ_Msk (1ul << CoreDebug_DEMCR_MON_REQ_Pos) /*!< CoreDebug DEMCR: MON_REQ Mask */ - -#define CoreDebug_DEMCR_MON_STEP_Pos 18 /*!< CoreDebug DEMCR: MON_STEP Position */ -#define CoreDebug_DEMCR_MON_STEP_Msk (1ul << CoreDebug_DEMCR_MON_STEP_Pos) /*!< CoreDebug DEMCR: MON_STEP Mask */ - -#define CoreDebug_DEMCR_MON_PEND_Pos 17 /*!< CoreDebug DEMCR: MON_PEND Position */ -#define CoreDebug_DEMCR_MON_PEND_Msk (1ul << CoreDebug_DEMCR_MON_PEND_Pos) /*!< CoreDebug DEMCR: MON_PEND Mask */ - -#define CoreDebug_DEMCR_MON_EN_Pos 16 /*!< CoreDebug DEMCR: MON_EN Position */ -#define CoreDebug_DEMCR_MON_EN_Msk (1ul << CoreDebug_DEMCR_MON_EN_Pos) /*!< CoreDebug DEMCR: MON_EN Mask */ - -#define CoreDebug_DEMCR_VC_HARDERR_Pos 10 /*!< CoreDebug DEMCR: VC_HARDERR Position */ -#define CoreDebug_DEMCR_VC_HARDERR_Msk (1ul << CoreDebug_DEMCR_VC_HARDERR_Pos) /*!< CoreDebug DEMCR: VC_HARDERR Mask */ - -#define CoreDebug_DEMCR_VC_INTERR_Pos 9 /*!< CoreDebug DEMCR: VC_INTERR Position */ -#define CoreDebug_DEMCR_VC_INTERR_Msk (1ul << CoreDebug_DEMCR_VC_INTERR_Pos) /*!< CoreDebug DEMCR: VC_INTERR Mask */ - -#define CoreDebug_DEMCR_VC_BUSERR_Pos 8 /*!< CoreDebug DEMCR: VC_BUSERR Position */ -#define CoreDebug_DEMCR_VC_BUSERR_Msk (1ul << CoreDebug_DEMCR_VC_BUSERR_Pos) /*!< CoreDebug DEMCR: VC_BUSERR Mask */ - -#define CoreDebug_DEMCR_VC_STATERR_Pos 7 /*!< CoreDebug DEMCR: VC_STATERR Position */ -#define CoreDebug_DEMCR_VC_STATERR_Msk (1ul << CoreDebug_DEMCR_VC_STATERR_Pos) /*!< CoreDebug DEMCR: VC_STATERR Mask */ - -#define CoreDebug_DEMCR_VC_CHKERR_Pos 6 /*!< CoreDebug DEMCR: VC_CHKERR Position */ -#define CoreDebug_DEMCR_VC_CHKERR_Msk (1ul << CoreDebug_DEMCR_VC_CHKERR_Pos) /*!< CoreDebug DEMCR: VC_CHKERR Mask */ - -#define CoreDebug_DEMCR_VC_NOCPERR_Pos 5 /*!< CoreDebug DEMCR: VC_NOCPERR Position */ -#define CoreDebug_DEMCR_VC_NOCPERR_Msk (1ul << CoreDebug_DEMCR_VC_NOCPERR_Pos) /*!< CoreDebug DEMCR: VC_NOCPERR Mask */ - -#define CoreDebug_DEMCR_VC_MMERR_Pos 4 /*!< CoreDebug DEMCR: VC_MMERR Position */ -#define CoreDebug_DEMCR_VC_MMERR_Msk (1ul << CoreDebug_DEMCR_VC_MMERR_Pos) /*!< CoreDebug DEMCR: VC_MMERR Mask */ - -#define CoreDebug_DEMCR_VC_CORERESET_Pos 0 /*!< CoreDebug DEMCR: VC_CORERESET Position */ -#define CoreDebug_DEMCR_VC_CORERESET_Msk (1ul << CoreDebug_DEMCR_VC_CORERESET_Pos) /*!< CoreDebug DEMCR: VC_CORERESET Mask */ -/*@}*/ /* end of group CMSIS_CM3_CoreDebug */ - - -/* Memory mapping of Cortex-M3 Hardware */ -#define SCS_BASE (0xE000E000) /*!< System Control Space Base Address */ -#define ITM_BASE (0xE0000000) /*!< ITM Base Address */ -#define CoreDebug_BASE (0xE000EDF0) /*!< Core Debug Base Address */ -#define SysTick_BASE (SCS_BASE + 0x0010) /*!< SysTick Base Address */ -#define NVIC_BASE (SCS_BASE + 0x0100) /*!< NVIC Base Address */ -#define SCB_BASE (SCS_BASE + 0x0D00) /*!< System Control Block Base Address */ - -#define InterruptType ((InterruptType_Type *) SCS_BASE) /*!< Interrupt Type Register */ -#define SCB ((SCB_Type *) SCB_BASE) /*!< SCB configuration struct */ -#define SysTick ((SysTick_Type *) SysTick_BASE) /*!< SysTick configuration struct */ -#define NVIC ((NVIC_Type *) NVIC_BASE) /*!< NVIC configuration struct */ -#define ITM ((ITM_Type *) ITM_BASE) /*!< ITM configuration struct */ -#define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE) /*!< Core Debug configuration struct */ - -#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1) - #define MPU_BASE (SCS_BASE + 0x0D90) /*!< Memory Protection Unit */ - #define MPU ((MPU_Type*) MPU_BASE) /*!< Memory Protection Unit */ -#endif - -/*@}*/ /* end of group CMSIS_CM3_core_register */ - - -/******************************************************************************* - * Hardware Abstraction Layer - ******************************************************************************/ - -#if defined ( __CC_ARM ) - #define __ASM __asm /*!< asm keyword for ARM Compiler */ - #define __INLINE __inline /*!< inline keyword for ARM Compiler */ - -#elif defined ( __ICCARM__ ) - #define __ASM __asm /*!< asm keyword for IAR Compiler */ - #define __INLINE inline /*!< inline keyword for IAR Compiler. Only avaiable in High optimization mode! */ - -#elif defined ( __GNUC__ ) - #define __ASM __asm /*!< asm keyword for GNU Compiler */ - #define __INLINE inline /*!< inline keyword for GNU Compiler */ - -#elif defined ( __TASKING__ ) - #define __ASM __asm /*!< asm keyword for TASKING Compiler */ - #define __INLINE inline /*!< inline keyword for TASKING Compiler */ - -#endif - - -/* ################### Compiler specific Intrinsics ########################### */ - -#if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/ -/* ARM armcc specific functions */ - -#define __enable_fault_irq __enable_fiq -#define __disable_fault_irq __disable_fiq - -#define __NOP __nop -#define __WFI __wfi -#define __WFE __wfe -#define __SEV __sev -#define __ISB() __isb(0) -#define __DSB() __dsb(0) -#define __DMB() __dmb(0) -#define __REV __rev -#define __RBIT __rbit -#define __LDREXB(ptr) ((unsigned char ) __ldrex(ptr)) -#define __LDREXH(ptr) ((unsigned short) __ldrex(ptr)) -#define __LDREXW(ptr) ((unsigned int ) __ldrex(ptr)) -#define __STREXB(value, ptr) __strex(value, ptr) -#define __STREXH(value, ptr) __strex(value, ptr) -#define __STREXW(value, ptr) __strex(value, ptr) - - -/* intrinsic unsigned long long __ldrexd(volatile void *ptr) */ -/* intrinsic int __strexd(unsigned long long val, volatile void *ptr) */ -/* intrinsic void __enable_irq(); */ -/* intrinsic void __disable_irq(); */ - - -/** - * @brief Return the Process Stack Pointer - * - * @return ProcessStackPointer - * - * Return the actual process stack pointer - */ -extern uint32_t __get_PSP(void); - -/** - * @brief Set the Process Stack Pointer - * - * @param topOfProcStack Process Stack Pointer - * - * Assign the value ProcessStackPointer to the MSP - * (process stack pointer) Cortex processor register - */ -extern void __set_PSP(uint32_t topOfProcStack); - -/** - * @brief Return the Main Stack Pointer - * - * @return Main Stack Pointer - * - * Return the current value of the MSP (main stack pointer) - * Cortex processor register - */ -extern uint32_t __get_MSP(void); - -/** - * @brief Set the Main Stack Pointer - * - * @param topOfMainStack Main Stack Pointer - * - * Assign the value mainStackPointer to the MSP - * (main stack pointer) Cortex processor register - */ -extern void __set_MSP(uint32_t topOfMainStack); - -/** - * @brief Reverse byte order in unsigned short value - * - * @param value value to reverse - * @return reversed value - * - * Reverse byte order in unsigned short value - */ -extern uint32_t __REV16(uint16_t value); - -/** - * @brief Reverse byte order in signed short value with sign extension to integer - * - * @param value value to reverse - * @return reversed value - * - * Reverse byte order in signed short value with sign extension to integer - */ -extern int32_t __REVSH(int16_t value); - - -#if (__ARMCC_VERSION < 400000) - -/** - * @brief Remove the exclusive lock created by ldrex - * - * Removes the exclusive lock which is created by ldrex. - */ -extern void __CLREX(void); - -/** - * @brief Return the Base Priority value - * - * @return BasePriority - * - * Return the content of the base priority register - */ -extern uint32_t __get_BASEPRI(void); - -/** - * @brief Set the Base Priority value - * - * @param basePri BasePriority - * - * Set the base priority register - */ -extern void __set_BASEPRI(uint32_t basePri); - -/** - * @brief Return the Priority Mask value - * - * @return PriMask - * - * Return state of the priority mask bit from the priority mask register - */ -extern uint32_t __get_PRIMASK(void); - -/** - * @brief Set the Priority Mask value - * - * @param priMask PriMask - * - * Set the priority mask bit in the priority mask register - */ -extern void __set_PRIMASK(uint32_t priMask); - -/** - * @brief Return the Fault Mask value - * - * @return FaultMask - * - * Return the content of the fault mask register - */ -extern uint32_t __get_FAULTMASK(void); - -/** - * @brief Set the Fault Mask value - * - * @param faultMask faultMask value - * - * Set the fault mask register - */ -extern void __set_FAULTMASK(uint32_t faultMask); - -/** - * @brief Return the Control Register value - * - * @return Control value - * - * Return the content of the control register - */ -extern uint32_t __get_CONTROL(void); - -/** - * @brief Set the Control Register value - * - * @param control Control value - * - * Set the control register - */ -extern void __set_CONTROL(uint32_t control); - -#else /* (__ARMCC_VERSION >= 400000) */ - -/** - * @brief Remove the exclusive lock created by ldrex - * - * Removes the exclusive lock which is created by ldrex. - */ -#define __CLREX __clrex - -/** - * @brief Return the Base Priority value - * - * @return BasePriority - * - * Return the content of the base priority register - */ -static __INLINE uint32_t __get_BASEPRI(void) -{ - register uint32_t __regBasePri __ASM("basepri"); - return(__regBasePri); -} - -/** - * @brief Set the Base Priority value - * - * @param basePri BasePriority - * - * Set the base priority register - */ -static __INLINE void __set_BASEPRI(uint32_t basePri) -{ - register uint32_t __regBasePri __ASM("basepri"); - __regBasePri = (basePri & 0xff); -} - -/** - * @brief Return the Priority Mask value - * - * @return PriMask - * - * Return state of the priority mask bit from the priority mask register - */ -static __INLINE uint32_t __get_PRIMASK(void) -{ - register uint32_t __regPriMask __ASM("primask"); - return(__regPriMask); -} - -/** - * @brief Set the Priority Mask value - * - * @param priMask PriMask - * - * Set the priority mask bit in the priority mask register - */ -static __INLINE void __set_PRIMASK(uint32_t priMask) -{ - register uint32_t __regPriMask __ASM("primask"); - __regPriMask = (priMask); -} - -/** - * @brief Return the Fault Mask value - * - * @return FaultMask - * - * Return the content of the fault mask register - */ -static __INLINE uint32_t __get_FAULTMASK(void) -{ - register uint32_t __regFaultMask __ASM("faultmask"); - return(__regFaultMask); -} - -/** - * @brief Set the Fault Mask value - * - * @param faultMask faultMask value - * - * Set the fault mask register - */ -static __INLINE void __set_FAULTMASK(uint32_t faultMask) -{ - register uint32_t __regFaultMask __ASM("faultmask"); - __regFaultMask = (faultMask & 1); -} - -/** - * @brief Return the Control Register value - * - * @return Control value - * - * Return the content of the control register - */ -static __INLINE uint32_t __get_CONTROL(void) -{ - register uint32_t __regControl __ASM("control"); - return(__regControl); -} - -/** - * @brief Set the Control Register value - * - * @param control Control value - * - * Set the control register - */ -static __INLINE void __set_CONTROL(uint32_t control) -{ - register uint32_t __regControl __ASM("control"); - __regControl = control; -} - -#endif /* __ARMCC_VERSION */ - - - -#elif (defined (__ICCARM__)) /*------------------ ICC Compiler -------------------*/ -/* IAR iccarm specific functions */ - -#define __enable_irq __enable_interrupt /*!< global Interrupt enable */ -#define __disable_irq __disable_interrupt /*!< global Interrupt disable */ - -static __INLINE void __enable_fault_irq() { __ASM ("cpsie f"); } -static __INLINE void __disable_fault_irq() { __ASM ("cpsid f"); } - -#define __NOP __no_operation /*!< no operation intrinsic in IAR Compiler */ -static __INLINE void __WFI() { __ASM ("wfi"); } -static __INLINE void __WFE() { __ASM ("wfe"); } -static __INLINE void __SEV() { __ASM ("sev"); } -static __INLINE void __CLREX() { __ASM ("clrex"); } - -/* intrinsic void __ISB(void) */ -/* intrinsic void __DSB(void) */ -/* intrinsic void __DMB(void) */ -/* intrinsic void __set_PRIMASK(); */ -/* intrinsic void __get_PRIMASK(); */ -/* intrinsic void __set_FAULTMASK(); */ -/* intrinsic void __get_FAULTMASK(); */ -/* intrinsic uint32_t __REV(uint32_t value); */ -/* intrinsic uint32_t __REVSH(uint32_t value); */ -/* intrinsic unsigned long __STREX(unsigned long, unsigned long); */ -/* intrinsic unsigned long __LDREX(unsigned long *); */ - - -/** - * @brief Return the Process Stack Pointer - * - * @return ProcessStackPointer - * - * Return the actual process stack pointer - */ -extern uint32_t __get_PSP(void); - -/** - * @brief Set the Process Stack Pointer - * - * @param topOfProcStack Process Stack Pointer - * - * Assign the value ProcessStackPointer to the MSP - * (process stack pointer) Cortex processor register - */ -extern void __set_PSP(uint32_t topOfProcStack); - -/** - * @brief Return the Main Stack Pointer - * - * @return Main Stack Pointer - * - * Return the current value of the MSP (main stack pointer) - * Cortex processor register - */ -extern uint32_t __get_MSP(void); - -/** - * @brief Set the Main Stack Pointer - * - * @param topOfMainStack Main Stack Pointer - * - * Assign the value mainStackPointer to the MSP - * (main stack pointer) Cortex processor register - */ -extern void __set_MSP(uint32_t topOfMainStack); - -/** - * @brief Reverse byte order in unsigned short value - * - * @param value value to reverse - * @return reversed value - * - * Reverse byte order in unsigned short value - */ -extern uint32_t __REV16(uint16_t value); - -/** - * @brief Reverse bit order of value - * - * @param value value to reverse - * @return reversed value - * - * Reverse bit order of value - */ -extern uint32_t __RBIT(uint32_t value); - -/** - * @brief LDR Exclusive (8 bit) - * - * @param *addr address pointer - * @return value of (*address) - * - * Exclusive LDR command for 8 bit values) - */ -extern uint8_t __LDREXB(uint8_t *addr); - -/** - * @brief LDR Exclusive (16 bit) - * - * @param *addr address pointer - * @return value of (*address) - * - * Exclusive LDR command for 16 bit values - */ -extern uint16_t __LDREXH(uint16_t *addr); - -/** - * @brief LDR Exclusive (32 bit) - * - * @param *addr address pointer - * @return value of (*address) - * - * Exclusive LDR command for 32 bit values - */ -extern uint32_t __LDREXW(uint32_t *addr); - -/** - * @brief STR Exclusive (8 bit) - * - * @param value value to store - * @param *addr address pointer - * @return successful / failed - * - * Exclusive STR command for 8 bit values - */ -extern uint32_t __STREXB(uint8_t value, uint8_t *addr); - -/** - * @brief STR Exclusive (16 bit) - * - * @param value value to store - * @param *addr address pointer - * @return successful / failed - * - * Exclusive STR command for 16 bit values - */ -extern uint32_t __STREXH(uint16_t value, uint16_t *addr); - -/** - * @brief STR Exclusive (32 bit) - * - * @param value value to store - * @param *addr address pointer - * @return successful / failed - * - * Exclusive STR command for 32 bit values - */ -extern uint32_t __STREXW(uint32_t value, uint32_t *addr); - - - -#elif (defined (__GNUC__)) /*------------------ GNU Compiler ---------------------*/ -/* GNU gcc specific functions */ - -static __INLINE void __enable_irq() { __ASM volatile ("cpsie i"); } -static __INLINE void __disable_irq() { __ASM volatile ("cpsid i"); } - -static __INLINE void __enable_fault_irq() { __ASM volatile ("cpsie f"); } -static __INLINE void __disable_fault_irq() { __ASM volatile ("cpsid f"); } - -static __INLINE void __NOP() { __ASM volatile ("nop"); } -static __INLINE void __WFI() { __ASM volatile ("wfi"); } -static __INLINE void __WFE() { __ASM volatile ("wfe"); } -static __INLINE void __SEV() { __ASM volatile ("sev"); } -static __INLINE void __ISB() { __ASM volatile ("isb"); } -static __INLINE void __DSB() { __ASM volatile ("dsb"); } -static __INLINE void __DMB() { __ASM volatile ("dmb"); } -static __INLINE void __CLREX() { __ASM volatile ("clrex"); } - - -/** - * @brief Return the Process Stack Pointer - * - * @return ProcessStackPointer - * - * Return the actual process stack pointer - */ -extern uint32_t __get_PSP(void); - -/** - * @brief Set the Process Stack Pointer - * - * @param topOfProcStack Process Stack Pointer - * - * Assign the value ProcessStackPointer to the MSP - * (process stack pointer) Cortex processor register - */ -extern void __set_PSP(uint32_t topOfProcStack); - -/** - * @brief Return the Main Stack Pointer - * - * @return Main Stack Pointer - * - * Return the current value of the MSP (main stack pointer) - * Cortex processor register - */ -extern uint32_t __get_MSP(void); - -/** - * @brief Set the Main Stack Pointer - * - * @param topOfMainStack Main Stack Pointer - * - * Assign the value mainStackPointer to the MSP - * (main stack pointer) Cortex processor register - */ -extern void __set_MSP(uint32_t topOfMainStack); - -/** - * @brief Return the Base Priority value - * - * @return BasePriority - * - * Return the content of the base priority register - */ -extern uint32_t __get_BASEPRI(void); - -/** - * @brief Set the Base Priority value - * - * @param basePri BasePriority - * - * Set the base priority register - */ -extern void __set_BASEPRI(uint32_t basePri); - -/** - * @brief Return the Priority Mask value - * - * @return PriMask - * - * Return state of the priority mask bit from the priority mask register - */ -extern uint32_t __get_PRIMASK(void); - -/** - * @brief Set the Priority Mask value - * - * @param priMask PriMask - * - * Set the priority mask bit in the priority mask register - */ -extern void __set_PRIMASK(uint32_t priMask); - -/** - * @brief Return the Fault Mask value - * - * @return FaultMask - * - * Return the content of the fault mask register - */ -extern uint32_t __get_FAULTMASK(void); - -/** - * @brief Set the Fault Mask value - * - * @param faultMask faultMask value - * - * Set the fault mask register - */ -extern void __set_FAULTMASK(uint32_t faultMask); - -/** - * @brief Return the Control Register value -* -* @return Control value - * - * Return the content of the control register - */ -extern uint32_t __get_CONTROL(void); - -/** - * @brief Set the Control Register value - * - * @param control Control value - * - * Set the control register - */ -extern void __set_CONTROL(uint32_t control); - -/** - * @brief Reverse byte order in integer value - * - * @param value value to reverse - * @return reversed value - * - * Reverse byte order in integer value - */ -extern uint32_t __REV(uint32_t value); - -/** - * @brief Reverse byte order in unsigned short value - * - * @param value value to reverse - * @return reversed value - * - * Reverse byte order in unsigned short value - */ -extern uint32_t __REV16(uint16_t value); - -/** - * @brief Reverse byte order in signed short value with sign extension to integer - * - * @param value value to reverse - * @return reversed value - * - * Reverse byte order in signed short value with sign extension to integer - */ -extern int32_t __REVSH(int16_t value); - -/** - * @brief Reverse bit order of value - * - * @param value value to reverse - * @return reversed value - * - * Reverse bit order of value - */ -extern uint32_t __RBIT(uint32_t value); - -/** - * @brief LDR Exclusive (8 bit) - * - * @param *addr address pointer - * @return value of (*address) - * - * Exclusive LDR command for 8 bit value - */ -extern uint8_t __LDREXB(uint8_t *addr); - -/** - * @brief LDR Exclusive (16 bit) - * - * @param *addr address pointer - * @return value of (*address) - * - * Exclusive LDR command for 16 bit values - */ -extern uint16_t __LDREXH(uint16_t *addr); - -/** - * @brief LDR Exclusive (32 bit) - * - * @param *addr address pointer - * @return value of (*address) - * - * Exclusive LDR command for 32 bit values - */ -extern uint32_t __LDREXW(uint32_t *addr); - -/** - * @brief STR Exclusive (8 bit) - * - * @param value value to store - * @param *addr address pointer - * @return successful / failed - * - * Exclusive STR command for 8 bit values - */ -extern uint32_t __STREXB(uint8_t value, uint8_t *addr); - -/** - * @brief STR Exclusive (16 bit) - * - * @param value value to store - * @param *addr address pointer - * @return successful / failed - * - * Exclusive STR command for 16 bit values - */ -extern uint32_t __STREXH(uint16_t value, uint16_t *addr); - -/** - * @brief STR Exclusive (32 bit) - * - * @param value value to store - * @param *addr address pointer - * @return successful / failed - * - * Exclusive STR command for 32 bit values - */ -extern uint32_t __STREXW(uint32_t value, uint32_t *addr); - - -#elif (defined (__TASKING__)) /*------------------ TASKING Compiler ---------------------*/ -/* TASKING carm specific functions */ - -/* - * The CMSIS functions have been implemented as intrinsics in the compiler. - * Please use "carm -?i" to get an up to date list of all instrinsics, - * Including the CMSIS ones. - */ - -#endif - - -/** @addtogroup CMSIS_CM3_Core_FunctionInterface CMSIS CM3 Core Function Interface - Core Function Interface containing: - - Core NVIC Functions - - Core SysTick Functions - - Core Reset Functions -*/ -/*@{*/ - -/* ########################## NVIC functions #################################### */ - -/** - * @brief Set the Priority Grouping in NVIC Interrupt Controller - * - * @param PriorityGroup is priority grouping field - * - * Set the priority grouping field using the required unlock sequence. - * The parameter priority_grouping is assigned to the field - * SCB->AIRCR [10:8] PRIGROUP field. Only values from 0..7 are used. - * In case of a conflict between priority grouping and available - * priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set. - */ -static __INLINE void NVIC_SetPriorityGrouping(uint32_t PriorityGroup) -{ - uint32_t reg_value; - uint32_t PriorityGroupTmp = (PriorityGroup & 0x07); /* only values 0..7 are used */ - - reg_value = SCB->AIRCR; /* read old register configuration */ - reg_value &= ~(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk); /* clear bits to change */ - reg_value = (reg_value | - (0x5FA << SCB_AIRCR_VECTKEY_Pos) | - (PriorityGroupTmp << 8)); /* Insert write key and priorty group */ - SCB->AIRCR = reg_value; -} - -/** - * @brief Get the Priority Grouping from NVIC Interrupt Controller - * - * @return priority grouping field - * - * Get the priority grouping from NVIC Interrupt Controller. - * priority grouping is SCB->AIRCR [10:8] PRIGROUP field. - */ -static __INLINE uint32_t NVIC_GetPriorityGrouping(void) -{ - return ((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos); /* read priority grouping field */ -} - -/** - * @brief Enable Interrupt in NVIC Interrupt Controller - * - * @param IRQn The positive number of the external interrupt to enable - * - * Enable a device specific interupt in the NVIC interrupt controller. - * The interrupt number cannot be a negative value. - */ -static __INLINE void NVIC_EnableIRQ(IRQn_Type IRQn) -{ - NVIC->ISER[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* enable interrupt */ -} - -/** - * @brief Disable the interrupt line for external interrupt specified - * - * @param IRQn The positive number of the external interrupt to disable - * - * Disable a device specific interupt in the NVIC interrupt controller. - * The interrupt number cannot be a negative value. - */ -static __INLINE void NVIC_DisableIRQ(IRQn_Type IRQn) -{ - NVIC->ICER[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* disable interrupt */ -} - -/** - * @brief Read the interrupt pending bit for a device specific interrupt source - * - * @param IRQn The number of the device specifc interrupt - * @return 1 = interrupt pending, 0 = interrupt not pending - * - * Read the pending register in NVIC and return 1 if its status is pending, - * otherwise it returns 0 - */ -static __INLINE uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn) -{ - return((uint32_t) ((NVIC->ISPR[(uint32_t)(IRQn) >> 5] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0)); /* Return 1 if pending else 0 */ -} - -/** - * @brief Set the pending bit for an external interrupt - * - * @param IRQn The number of the interrupt for set pending - * - * Set the pending bit for the specified interrupt. - * The interrupt number cannot be a negative value. - */ -static __INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn) -{ - NVIC->ISPR[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* set interrupt pending */ -} - -/** - * @brief Clear the pending bit for an external interrupt - * - * @param IRQn The number of the interrupt for clear pending - * - * Clear the pending bit for the specified interrupt. - * The interrupt number cannot be a negative value. - */ -static __INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn) -{ - NVIC->ICPR[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* Clear pending interrupt */ -} - -/** - * @brief Read the active bit for an external interrupt - * - * @param IRQn The number of the interrupt for read active bit - * @return 1 = interrupt active, 0 = interrupt not active - * - * Read the active register in NVIC and returns 1 if its status is active, - * otherwise it returns 0. - */ -static __INLINE uint32_t NVIC_GetActive(IRQn_Type IRQn) -{ - return((uint32_t)((NVIC->IABR[(uint32_t)(IRQn) >> 5] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0)); /* Return 1 if active else 0 */ -} - -/** - * @brief Set the priority for an interrupt - * - * @param IRQn The number of the interrupt for set priority - * @param priority The priority to set - * - * Set the priority for the specified interrupt. The interrupt - * number can be positive to specify an external (device specific) - * interrupt, or negative to specify an internal (core) interrupt. - * - * Note: The priority cannot be set for every core interrupt. - */ -static __INLINE void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) -{ - if(IRQn < 0) { - SCB->SHP[((uint32_t)(IRQn) & 0xF)-4] = ((priority << (8 - __NVIC_PRIO_BITS)) & 0xff); } /* set Priority for Cortex-M3 System Interrupts */ - else { - NVIC->IP[(uint32_t)(IRQn)] = ((priority << (8 - __NVIC_PRIO_BITS)) & 0xff); } /* set Priority for device specific Interrupts */ -} - -/** - * @brief Read the priority for an interrupt - * - * @param IRQn The number of the interrupt for get priority - * @return The priority for the interrupt - * - * Read the priority for the specified interrupt. The interrupt - * number can be positive to specify an external (device specific) - * interrupt, or negative to specify an internal (core) interrupt. - * - * The returned priority value is automatically aligned to the implemented - * priority bits of the microcontroller. - * - * Note: The priority cannot be set for every core interrupt. - */ -static __INLINE uint32_t NVIC_GetPriority(IRQn_Type IRQn) -{ - - if(IRQn < 0) { - return((uint32_t)(SCB->SHP[((uint32_t)(IRQn) & 0xF)-4] >> (8 - __NVIC_PRIO_BITS))); } /* get priority for Cortex-M3 system interrupts */ - else { - return((uint32_t)(NVIC->IP[(uint32_t)(IRQn)] >> (8 - __NVIC_PRIO_BITS))); } /* get priority for device specific interrupts */ -} - - -/** - * @brief Encode the priority for an interrupt - * - * @param PriorityGroup The used priority group - * @param PreemptPriority The preemptive priority value (starting from 0) - * @param SubPriority The sub priority value (starting from 0) - * @return The encoded priority for the interrupt - * - * Encode the priority for an interrupt with the given priority group, - * preemptive priority value and sub priority value. - * In case of a conflict between priority grouping and available - * priority bits (__NVIC_PRIO_BITS) the samllest possible priority group is set. - * - * The returned priority value can be used for NVIC_SetPriority(...) function - */ -static __INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) -{ - uint32_t PriorityGroupTmp = (PriorityGroup & 0x07); /* only values 0..7 are used */ - uint32_t PreemptPriorityBits; - uint32_t SubPriorityBits; - - PreemptPriorityBits = ((7 - PriorityGroupTmp) > __NVIC_PRIO_BITS) ? __NVIC_PRIO_BITS : 7 - PriorityGroupTmp; - SubPriorityBits = ((PriorityGroupTmp + __NVIC_PRIO_BITS) < 7) ? 0 : PriorityGroupTmp - 7 + __NVIC_PRIO_BITS; - - return ( - ((PreemptPriority & ((1 << (PreemptPriorityBits)) - 1)) << SubPriorityBits) | - ((SubPriority & ((1 << (SubPriorityBits )) - 1))) - ); -} - - -/** - * @brief Decode the priority of an interrupt - * - * @param Priority The priority for the interrupt - * @param PriorityGroup The used priority group - * @param pPreemptPriority The preemptive priority value (starting from 0) - * @param pSubPriority The sub priority value (starting from 0) - * - * Decode an interrupt priority value with the given priority group to - * preemptive priority value and sub priority value. - * In case of a conflict between priority grouping and available - * priority bits (__NVIC_PRIO_BITS) the samllest possible priority group is set. - * - * The priority value can be retrieved with NVIC_GetPriority(...) function - */ -static __INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* pPreemptPriority, uint32_t* pSubPriority) -{ - uint32_t PriorityGroupTmp = (PriorityGroup & 0x07); /* only values 0..7 are used */ - uint32_t PreemptPriorityBits; - uint32_t SubPriorityBits; - - PreemptPriorityBits = ((7 - PriorityGroupTmp) > __NVIC_PRIO_BITS) ? __NVIC_PRIO_BITS : 7 - PriorityGroupTmp; - SubPriorityBits = ((PriorityGroupTmp + __NVIC_PRIO_BITS) < 7) ? 0 : PriorityGroupTmp - 7 + __NVIC_PRIO_BITS; - - *pPreemptPriority = (Priority >> SubPriorityBits) & ((1 << (PreemptPriorityBits)) - 1); - *pSubPriority = (Priority ) & ((1 << (SubPriorityBits )) - 1); -} - - - -/* ################################## SysTick function ############################################ */ - -#if (!defined (__Vendor_SysTickConfig)) || (__Vendor_SysTickConfig == 0) - -/** - * @brief Initialize and start the SysTick counter and its interrupt. - * - * @param ticks number of ticks between two interrupts - * @return 1 = failed, 0 = successful - * - * Initialise the system tick timer and its interrupt and start the - * system tick timer / counter in free running mode to generate - * periodical interrupts. - */ -static __INLINE uint32_t SysTick_Config(uint32_t ticks) -{ - if (ticks > SysTick_LOAD_RELOAD_Msk) return (1); /* Reload value impossible */ - - SysTick->LOAD = (ticks & SysTick_LOAD_RELOAD_Msk) - 1; /* set reload register */ - NVIC_SetPriority (SysTick_IRQn, (1<<__NVIC_PRIO_BITS) - 1); /* set Priority for Cortex-M0 System Interrupts */ - SysTick->VAL = 0; /* Load the SysTick Counter Value */ - SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | - SysTick_CTRL_TICKINT_Msk | - SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ - return (0); /* Function successful */ -} - -#endif - - - - -/* ################################## Reset function ############################################ */ - -/** - * @brief Initiate a system reset request. - * - * Initiate a system reset request to reset the MCU - */ -static __INLINE void NVIC_SystemReset(void) -{ - SCB->AIRCR = ((0x5FA << SCB_AIRCR_VECTKEY_Pos) | - (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) | - SCB_AIRCR_SYSRESETREQ_Msk); /* Keep priority group unchanged */ - __DSB(); /* Ensure completion of memory access */ - while(1); /* wait until reset */ -} - -/*@}*/ /* end of group CMSIS_CM3_Core_FunctionInterface */ - - - -/* ##################################### Debug In/Output function ########################################### */ - -/** @addtogroup CMSIS_CM3_CoreDebugInterface CMSIS CM3 Core Debug Interface - Core Debug Interface containing: - - Core Debug Receive / Transmit Functions - - Core Debug Defines - - Core Debug Variables -*/ -/*@{*/ - -extern volatile int ITM_RxBuffer; /*!< variable to receive characters */ -#define ITM_RXBUFFER_EMPTY 0x5AA55AA5 /*!< value identifying ITM_RxBuffer is ready for next character */ - - -/** - * @brief Outputs a character via the ITM channel 0 - * - * @param ch character to output - * @return character to output - * - * The function outputs a character via the ITM channel 0. - * The function returns when no debugger is connected that has booked the output. - * It is blocking when a debugger is connected, but the previous character send is not transmitted. - */ -static __INLINE uint32_t ITM_SendChar (uint32_t ch) -{ - if ((CoreDebug->DEMCR & CoreDebug_DEMCR_TRCENA_Msk) && /* Trace enabled */ - (ITM->TCR & ITM_TCR_ITMENA_Msk) && /* ITM enabled */ - (ITM->TER & (1ul << 0) ) ) /* ITM Port #0 enabled */ - { - while (ITM->PORT[0].u32 == 0); - ITM->PORT[0].u8 = (uint8_t) ch; - } - return (ch); -} - - -/** - * @brief Inputs a character via variable ITM_RxBuffer - * - * @return received character, -1 = no character received - * - * The function inputs a character via variable ITM_RxBuffer. - * The function returns when no debugger is connected that has booked the output. - * It is blocking when a debugger is connected, but the previous character send is not transmitted. - */ -static __INLINE int ITM_ReceiveChar (void) { - int ch = -1; /* no character available */ - - if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY) { - ch = ITM_RxBuffer; - ITM_RxBuffer = ITM_RXBUFFER_EMPTY; /* ready for next character */ - } - - return (ch); -} - - -/** - * @brief Check if a character via variable ITM_RxBuffer is available - * - * @return 1 = character available, 0 = no character available - * - * The function checks variable ITM_RxBuffer whether a character is available or not. - * The function returns '1' if a character is available and '0' if no character is available. - */ -static __INLINE int ITM_CheckChar (void) { - - if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY) { - return (0); /* no character available */ - } else { - return (1); /* character available */ - } -} - -/*@}*/ /* end of group CMSIS_CM3_core_DebugInterface */ - - -#ifdef __cplusplus -} -#endif - -/*@}*/ /* end of group CMSIS_CM3_core_definitions */ - -#endif /* __CM3_CORE_H__ */ - -/*lint -restore */ diff --git a/bsp/stm32_radio/Libraries/CMSIS/CM3/DeviceSupport/ST/Release_Notes_for_STM32F10x_CMSIS.html b/bsp/stm32_radio/Libraries/CMSIS/CM3/DeviceSupport/ST/Release_Notes_for_STM32F10x_CMSIS.html deleted file mode 100644 index 407e7b6b41..0000000000 --- a/bsp/stm32_radio/Libraries/CMSIS/CM3/DeviceSupport/ST/Release_Notes_for_STM32F10x_CMSIS.html +++ /dev/null @@ -1,204 +0,0 @@ - - - - - - - -Release Notes for STM32F10x CMSIS - - - - -
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Release -Notes for STM32F10x CMSIS

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Copyright 2010 STMicroelectronics

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Contents

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  1. STM32F10x CMSIS -update History
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  2. License
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STM32F10x CMSIS -update History

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3.2.0 -- 03/01/2010

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  1. General
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  • STM32F10x CMSIS files updated to CMSIS V1.30 release
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  • Directory structure updated to be aligned with CMSIS V1.30
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  • Add support -for STM32 Low-density Value line (STM32F100x4/6) and -Medium-density Value line (STM32F100x8/B) devices. 
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  1. CMSIS Core Peripheral Access Layer
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  1. STM32F10x CMSIS Device Peripheral Access Layer
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  • STM32F10x CMSIS Cortex-M3 Device Peripheral Access Layer Header File: stm32f10x.h
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    • Update -the stm32f10x.h file to support new Value line devices features: CEC -peripheral, new General purpose timers TIM15, TIM16 and TIM17.
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    • Peripherals Bits definitions updated to be in line with Value line devices available features.
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    • HSE_Value, -HSI_Value and HSEStartup_TimeOut changed to upper case: HSE_VALUE, -HSI_VALUE and HSE_STARTUP_TIMEOUT. Old names are kept for legacy -purposes.
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  • STM32F10x CMSIS Cortex-M3 Device Peripheral Access Layer System Files: system_stm32f10x.h and system_stm32f10x.c
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    • SystemFrequency variable name changed to SystemCoreClock
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    • Default - SystemCoreClock is changed to 24MHz when Value line devices are selected and to 72MHz on other devices.
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    • All while(1) loop were removed from all clock setting functions. User has to handle the HSE startup failure.
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    • Additional function void SystemCoreClockUpdate (void) is provided.
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  • STM32F10x CMSIS Startup files: startup_stm32f10x_xx.s
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    • Add new -startup files for STM32 Low-density Value line devices: - startup_stm32f10x_ld_vl.s
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    • Add new startup -files for STM32 Medium-density Value line devices: - startup_stm32f10x_md_vl.s
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    • SystemInit() function is called from startup file (startup_stm32f10x_xx.s) before to branch to application main.
      -To reconfigure the default setting of SystemInit() function, refer to system_stm32f10x.c file
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    • GNU startup file for Low density devices (startup_stm32f10x_ld.s) is updated to fix compilation errors.
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License

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The -enclosed firmware and all the related documentation are not covered by -a License Agreement, if you need such License you can contact your -local STMicroelectronics office.

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THE -PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS -WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO -SAVE TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR -ANY DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY -CLAIMS ARISING FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY -CUSTOMERS OF THE CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH -THEIR PRODUCTS.

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For -complete documentation on STM32(CORTEX M3) 32-Bit Microcontrollers -visit www.st.com/STM32

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- \ No newline at end of file diff --git a/bsp/stm32_radio/Libraries/CMSIS/CM3/DeviceSupport/ST/STM32F10x/startup/arm/startup_stm32f10x_cl.s b/bsp/stm32_radio/Libraries/CMSIS/CM3/DeviceSupport/ST/STM32F10x/startup/arm/startup_stm32f10x_cl.s deleted file mode 100644 index 1796d1c40c..0000000000 --- a/bsp/stm32_radio/Libraries/CMSIS/CM3/DeviceSupport/ST/STM32F10x/startup/arm/startup_stm32f10x_cl.s +++ /dev/null @@ -1,368 +0,0 @@ -;******************** (C) COPYRIGHT 2010 STMicroelectronics ******************** -;* File Name : startup_stm32f10x_cl.s -;* Author : MCD Application Team -;* Version : V3.2.0 -;* Date : 03/01/2010 -;* Description : STM32F10x Connectivity line devices vector table for RVMDK -;* toolchain. -;* This module performs: -;* - Set the initial SP -;* - Set the initial PC == Reset_Handler -;* - Set the vector table entries with the exceptions ISR address -;* - Configure the clock system -;* - Branches to __main in the C library (which eventually -;* calls main()). -;* After Reset the CortexM3 processor is in Thread mode, -;* priority is Privileged, and the Stack is set to Main. -;* <<< Use Configuration Wizard in Context Menu >>> -;******************************************************************************* -; THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS -; WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. -; AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, -; INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE -; CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING -; INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -;******************************************************************************* - -; Amount of memory (in bytes) allocated for Stack -; Tailor this value to your application needs -; Stack Configuration -; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Stack_Size EQU 0x00000400 - - AREA STACK, NOINIT, READWRITE, ALIGN=3 -Stack_Mem SPACE Stack_Size -__initial_sp - - -; Heap Configuration -; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Heap_Size EQU 0x00000200 - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit - - PRESERVE8 - THUMB - - -; Vector Table Mapped to Address 0 at Reset - AREA RESET, DATA, READONLY - EXPORT __Vectors - EXPORT __Vectors_End - EXPORT __Vectors_Size - -__Vectors DCD __initial_sp ; Top of Stack - DCD Reset_Handler ; Reset Handler - DCD NMI_Handler ; NMI Handler - DCD HardFault_Handler ; Hard Fault Handler - DCD MemManage_Handler ; MPU Fault Handler - DCD BusFault_Handler ; Bus Fault Handler - DCD UsageFault_Handler ; Usage Fault Handler - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD SVC_Handler ; SVCall Handler - DCD DebugMon_Handler ; Debug Monitor Handler - DCD 0 ; Reserved - DCD PendSV_Handler ; PendSV Handler - DCD SysTick_Handler ; SysTick Handler - - ; External Interrupts - DCD WWDG_IRQHandler ; Window Watchdog - DCD PVD_IRQHandler ; PVD through EXTI Line detect - DCD TAMPER_IRQHandler ; Tamper - DCD RTC_IRQHandler ; RTC - DCD FLASH_IRQHandler ; Flash - DCD RCC_IRQHandler ; RCC - DCD EXTI0_IRQHandler ; EXTI Line 0 - DCD EXTI1_IRQHandler ; EXTI Line 1 - DCD EXTI2_IRQHandler ; EXTI Line 2 - DCD EXTI3_IRQHandler ; EXTI Line 3 - DCD EXTI4_IRQHandler ; EXTI Line 4 - DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1 - DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2 - DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3 - DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4 - DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5 - DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6 - DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7 - DCD ADC1_2_IRQHandler ; ADC1 and ADC2 - DCD CAN1_TX_IRQHandler ; CAN1 TX - DCD CAN1_RX0_IRQHandler ; CAN1 RX0 - DCD CAN1_RX1_IRQHandler ; CAN1 RX1 - DCD CAN1_SCE_IRQHandler ; CAN1 SCE - DCD EXTI9_5_IRQHandler ; EXTI Line 9..5 - DCD TIM1_BRK_IRQHandler ; TIM1 Break - DCD TIM1_UP_IRQHandler ; TIM1 Update - DCD TIM1_TRG_COM_IRQHandler ; TIM1 Trigger and Commutation - DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare - DCD TIM2_IRQHandler ; TIM2 - DCD TIM3_IRQHandler ; TIM3 - DCD TIM4_IRQHandler ; TIM4 - DCD I2C1_EV_IRQHandler ; I2C1 Event - DCD I2C1_ER_IRQHandler ; I2C1 Error - DCD I2C2_EV_IRQHandler ; I2C2 Event - DCD I2C2_ER_IRQHandler ; I2C1 Error - DCD SPI1_IRQHandler ; SPI1 - DCD SPI2_IRQHandler ; SPI2 - DCD USART1_IRQHandler ; USART1 - DCD USART2_IRQHandler ; USART2 - DCD USART3_IRQHandler ; USART3 - DCD EXTI15_10_IRQHandler ; EXTI Line 15..10 - DCD RTCAlarm_IRQHandler ; RTC alarm through EXTI line - DCD OTG_FS_WKUP_IRQHandler ; USB OTG FS Wakeup through EXTI line - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD TIM5_IRQHandler ; TIM5 - DCD SPI3_IRQHandler ; SPI3 - DCD UART4_IRQHandler ; UART4 - DCD UART5_IRQHandler ; UART5 - DCD TIM6_IRQHandler ; TIM6 - DCD TIM7_IRQHandler ; TIM7 - DCD DMA2_Channel1_IRQHandler ; DMA2 Channel1 - DCD DMA2_Channel2_IRQHandler ; DMA2 Channel2 - DCD DMA2_Channel3_IRQHandler ; DMA2 Channel3 - DCD DMA2_Channel4_IRQHandler ; DMA2 Channel4 - DCD DMA2_Channel5_IRQHandler ; DMA2 Channel5 - DCD ETH_IRQHandler ; Ethernet - DCD ETH_WKUP_IRQHandler ; Ethernet Wakeup through EXTI line - DCD CAN2_TX_IRQHandler ; CAN2 TX - DCD CAN2_RX0_IRQHandler ; CAN2 RX0 - DCD CAN2_RX1_IRQHandler ; CAN2 RX1 - DCD CAN2_SCE_IRQHandler ; CAN2 SCE - DCD OTG_FS_IRQHandler ; USB OTG FS -__Vectors_End - -__Vectors_Size EQU __Vectors_End - __Vectors - - AREA |.text|, CODE, READONLY - -; Reset handler -Reset_Handler PROC - EXPORT Reset_Handler [WEAK] - IMPORT SystemInit - IMPORT __main - LDR R0, =SystemInit - BLX R0 - LDR R0, =__main - BX R0 - ENDP - -; Dummy Exception Handlers (infinite loops which can be modified) - -NMI_Handler PROC - EXPORT NMI_Handler [WEAK] - B . - ENDP -HardFault_Handler\ - PROC - EXPORT HardFault_Handler [WEAK] - B . - ENDP -MemManage_Handler\ - PROC - EXPORT MemManage_Handler [WEAK] - B . - ENDP -BusFault_Handler\ - PROC - EXPORT BusFault_Handler [WEAK] - B . - ENDP -UsageFault_Handler\ - PROC - EXPORT UsageFault_Handler [WEAK] - B . - ENDP -SVC_Handler PROC - EXPORT SVC_Handler [WEAK] - B . - ENDP -DebugMon_Handler\ - PROC - EXPORT DebugMon_Handler [WEAK] - B . - ENDP -PendSV_Handler PROC - EXPORT PendSV_Handler [WEAK] - B . - ENDP -SysTick_Handler PROC - EXPORT SysTick_Handler [WEAK] - B . - ENDP - -Default_Handler PROC - - EXPORT WWDG_IRQHandler [WEAK] - EXPORT PVD_IRQHandler [WEAK] - EXPORT TAMPER_IRQHandler [WEAK] - EXPORT RTC_IRQHandler [WEAK] - EXPORT FLASH_IRQHandler [WEAK] - EXPORT RCC_IRQHandler [WEAK] - EXPORT EXTI0_IRQHandler [WEAK] - EXPORT EXTI1_IRQHandler [WEAK] - EXPORT EXTI2_IRQHandler [WEAK] - EXPORT EXTI3_IRQHandler [WEAK] - EXPORT EXTI4_IRQHandler [WEAK] - EXPORT DMA1_Channel1_IRQHandler [WEAK] - EXPORT DMA1_Channel2_IRQHandler [WEAK] - EXPORT DMA1_Channel3_IRQHandler [WEAK] - EXPORT DMA1_Channel4_IRQHandler [WEAK] - EXPORT DMA1_Channel5_IRQHandler [WEAK] - EXPORT DMA1_Channel6_IRQHandler [WEAK] - EXPORT DMA1_Channel7_IRQHandler [WEAK] - EXPORT ADC1_2_IRQHandler [WEAK] - EXPORT CAN1_TX_IRQHandler [WEAK] - EXPORT CAN1_RX0_IRQHandler [WEAK] - EXPORT CAN1_RX1_IRQHandler [WEAK] - EXPORT CAN1_SCE_IRQHandler [WEAK] - EXPORT EXTI9_5_IRQHandler [WEAK] - EXPORT TIM1_BRK_IRQHandler [WEAK] - EXPORT TIM1_UP_IRQHandler [WEAK] - EXPORT TIM1_TRG_COM_IRQHandler [WEAK] - EXPORT TIM1_CC_IRQHandler [WEAK] - EXPORT TIM2_IRQHandler [WEAK] - EXPORT TIM3_IRQHandler [WEAK] - EXPORT TIM4_IRQHandler [WEAK] - EXPORT I2C1_EV_IRQHandler [WEAK] - EXPORT I2C1_ER_IRQHandler [WEAK] - EXPORT I2C2_EV_IRQHandler [WEAK] - EXPORT I2C2_ER_IRQHandler [WEAK] - EXPORT SPI1_IRQHandler [WEAK] - EXPORT SPI2_IRQHandler [WEAK] - EXPORT USART1_IRQHandler [WEAK] - EXPORT USART2_IRQHandler [WEAK] - EXPORT USART3_IRQHandler [WEAK] - EXPORT EXTI15_10_IRQHandler [WEAK] - EXPORT RTCAlarm_IRQHandler [WEAK] - EXPORT OTG_FS_WKUP_IRQHandler [WEAK] - EXPORT TIM5_IRQHandler [WEAK] - EXPORT SPI3_IRQHandler [WEAK] - EXPORT UART4_IRQHandler [WEAK] - EXPORT UART5_IRQHandler [WEAK] - EXPORT TIM6_IRQHandler [WEAK] - EXPORT TIM7_IRQHandler [WEAK] - EXPORT DMA2_Channel1_IRQHandler [WEAK] - EXPORT DMA2_Channel2_IRQHandler [WEAK] - EXPORT DMA2_Channel3_IRQHandler [WEAK] - EXPORT DMA2_Channel4_IRQHandler [WEAK] - EXPORT DMA2_Channel5_IRQHandler [WEAK] - EXPORT ETH_IRQHandler [WEAK] - EXPORT ETH_WKUP_IRQHandler [WEAK] - EXPORT CAN2_TX_IRQHandler [WEAK] - EXPORT CAN2_RX0_IRQHandler [WEAK] - EXPORT CAN2_RX1_IRQHandler [WEAK] - EXPORT CAN2_SCE_IRQHandler [WEAK] - EXPORT OTG_FS_IRQHandler [WEAK] - -WWDG_IRQHandler -PVD_IRQHandler -TAMPER_IRQHandler -RTC_IRQHandler -FLASH_IRQHandler -RCC_IRQHandler -EXTI0_IRQHandler -EXTI1_IRQHandler -EXTI2_IRQHandler -EXTI3_IRQHandler -EXTI4_IRQHandler -DMA1_Channel1_IRQHandler -DMA1_Channel2_IRQHandler -DMA1_Channel3_IRQHandler -DMA1_Channel4_IRQHandler -DMA1_Channel5_IRQHandler -DMA1_Channel6_IRQHandler -DMA1_Channel7_IRQHandler -ADC1_2_IRQHandler -CAN1_TX_IRQHandler -CAN1_RX0_IRQHandler -CAN1_RX1_IRQHandler -CAN1_SCE_IRQHandler -EXTI9_5_IRQHandler -TIM1_BRK_IRQHandler -TIM1_UP_IRQHandler -TIM1_TRG_COM_IRQHandler -TIM1_CC_IRQHandler -TIM2_IRQHandler -TIM3_IRQHandler -TIM4_IRQHandler -I2C1_EV_IRQHandler -I2C1_ER_IRQHandler -I2C2_EV_IRQHandler -I2C2_ER_IRQHandler -SPI1_IRQHandler -SPI2_IRQHandler -USART1_IRQHandler -USART2_IRQHandler -USART3_IRQHandler -EXTI15_10_IRQHandler -RTCAlarm_IRQHandler -OTG_FS_WKUP_IRQHandler -TIM5_IRQHandler -SPI3_IRQHandler -UART4_IRQHandler -UART5_IRQHandler -TIM6_IRQHandler -TIM7_IRQHandler -DMA2_Channel1_IRQHandler -DMA2_Channel2_IRQHandler -DMA2_Channel3_IRQHandler -DMA2_Channel4_IRQHandler -DMA2_Channel5_IRQHandler -ETH_IRQHandler -ETH_WKUP_IRQHandler -CAN2_TX_IRQHandler -CAN2_RX0_IRQHandler -CAN2_RX1_IRQHandler -CAN2_SCE_IRQHandler -OTG_FS_IRQHandler - - B . - - ENDP - - ALIGN - -;******************************************************************************* -; User Stack and Heap initialization -;******************************************************************************* - IF :DEF:__MICROLIB - - EXPORT __initial_sp - EXPORT __heap_base - EXPORT __heap_limit - - ELSE - - IMPORT __use_two_region_memory - EXPORT __user_initial_stackheap - -__user_initial_stackheap - - LDR R0, = Heap_Mem - LDR R1, =(Stack_Mem + Stack_Size) - LDR R2, = (Heap_Mem + Heap_Size) - LDR R3, = Stack_Mem - BX LR - - ALIGN - - ENDIF - - END - -;******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE***** diff --git a/bsp/stm32_radio/Libraries/CMSIS/CM3/DeviceSupport/ST/STM32F10x/startup/arm/startup_stm32f10x_hd.s b/bsp/stm32_radio/Libraries/CMSIS/CM3/DeviceSupport/ST/STM32F10x/startup/arm/startup_stm32f10x_hd.s deleted file mode 100644 index 1d7df99b48..0000000000 --- a/bsp/stm32_radio/Libraries/CMSIS/CM3/DeviceSupport/ST/STM32F10x/startup/arm/startup_stm32f10x_hd.s +++ /dev/null @@ -1,358 +0,0 @@ -;******************** (C) COPYRIGHT 2010 STMicroelectronics ******************** -;* File Name : startup_stm32f10x_hd.s -;* Author : MCD Application Team -;* Version : V3.2.0 -;* Date : 03/01/2010 -;* Description : STM32F10x High Density Devices vector table for RVMDK -;* toolchain. -;* This module performs: -;* - Set the initial SP -;* - Set the initial PC == Reset_Handler -;* - Set the vector table entries with the exceptions ISR address -;* - Configure the clock system and also configure the external -;* SRAM mounted on STM3210E-EVAL board to be used as data -;* memory (optional, to be enabled by user) -;* - Branches to __main in the C library (which eventually -;* calls main()). -;* After Reset the CortexM3 processor is in Thread mode, -;* priority is Privileged, and the Stack is set to Main. -;* <<< Use Configuration Wizard in Context Menu >>> -;******************************************************************************* -; THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS -; WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. -; AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, -; INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE -; CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING -; INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -;******************************************************************************* - -; Amount of memory (in bytes) allocated for Stack -; Tailor this value to your application needs -; Stack Configuration -; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Stack_Size EQU 0x00000400 - - AREA STACK, NOINIT, READWRITE, ALIGN=3 -Stack_Mem SPACE Stack_Size -__initial_sp - -; Heap Configuration -; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Heap_Size EQU 0x00000200 - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit - - PRESERVE8 - THUMB - - -; Vector Table Mapped to Address 0 at Reset - AREA RESET, DATA, READONLY - EXPORT __Vectors - EXPORT __Vectors_End - EXPORT __Vectors_Size - -__Vectors DCD __initial_sp ; Top of Stack - DCD Reset_Handler ; Reset Handler - DCD NMI_Handler ; NMI Handler - DCD HardFault_Handler ; Hard Fault Handler - DCD MemManage_Handler ; MPU Fault Handler - DCD BusFault_Handler ; Bus Fault Handler - DCD UsageFault_Handler ; Usage Fault Handler - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD SVC_Handler ; SVCall Handler - DCD DebugMon_Handler ; Debug Monitor Handler - DCD 0 ; Reserved - DCD PendSV_Handler ; PendSV Handler - DCD SysTick_Handler ; SysTick Handler - - ; External Interrupts - DCD WWDG_IRQHandler ; Window Watchdog - DCD PVD_IRQHandler ; PVD through EXTI Line detect - DCD TAMPER_IRQHandler ; Tamper - DCD RTC_IRQHandler ; RTC - DCD FLASH_IRQHandler ; Flash - DCD RCC_IRQHandler ; RCC - DCD EXTI0_IRQHandler ; EXTI Line 0 - DCD EXTI1_IRQHandler ; EXTI Line 1 - DCD EXTI2_IRQHandler ; EXTI Line 2 - DCD EXTI3_IRQHandler ; EXTI Line 3 - DCD EXTI4_IRQHandler ; EXTI Line 4 - DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1 - DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2 - DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3 - DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4 - DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5 - DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6 - DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7 - DCD ADC1_2_IRQHandler ; ADC1 & ADC2 - DCD USB_HP_CAN1_TX_IRQHandler ; USB High Priority or CAN1 TX - DCD USB_LP_CAN1_RX0_IRQHandler ; USB Low Priority or CAN1 RX0 - DCD CAN1_RX1_IRQHandler ; CAN1 RX1 - DCD CAN1_SCE_IRQHandler ; CAN1 SCE - DCD EXTI9_5_IRQHandler ; EXTI Line 9..5 - DCD TIM1_BRK_IRQHandler ; TIM1 Break - DCD TIM1_UP_IRQHandler ; TIM1 Update - DCD TIM1_TRG_COM_IRQHandler ; TIM1 Trigger and Commutation - DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare - DCD TIM2_IRQHandler ; TIM2 - DCD TIM3_IRQHandler ; TIM3 - DCD TIM4_IRQHandler ; TIM4 - DCD I2C1_EV_IRQHandler ; I2C1 Event - DCD I2C1_ER_IRQHandler ; I2C1 Error - DCD I2C2_EV_IRQHandler ; I2C2 Event - DCD I2C2_ER_IRQHandler ; I2C2 Error - DCD SPI1_IRQHandler ; SPI1 - DCD SPI2_IRQHandler ; SPI2 - DCD USART1_IRQHandler ; USART1 - DCD USART2_IRQHandler ; USART2 - DCD USART3_IRQHandler ; USART3 - DCD EXTI15_10_IRQHandler ; EXTI Line 15..10 - DCD RTCAlarm_IRQHandler ; RTC Alarm through EXTI Line - DCD USBWakeUp_IRQHandler ; USB Wakeup from suspend - DCD TIM8_BRK_IRQHandler ; TIM8 Break - DCD TIM8_UP_IRQHandler ; TIM8 Update - DCD TIM8_TRG_COM_IRQHandler ; TIM8 Trigger and Commutation - DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare - DCD ADC3_IRQHandler ; ADC3 - DCD FSMC_IRQHandler ; FSMC - DCD SDIO_IRQHandler ; SDIO - DCD TIM5_IRQHandler ; TIM5 - DCD SPI3_IRQHandler ; SPI3 - DCD UART4_IRQHandler ; UART4 - DCD UART5_IRQHandler ; UART5 - DCD TIM6_IRQHandler ; TIM6 - DCD TIM7_IRQHandler ; TIM7 - DCD DMA2_Channel1_IRQHandler ; DMA2 Channel1 - DCD DMA2_Channel2_IRQHandler ; DMA2 Channel2 - DCD DMA2_Channel3_IRQHandler ; DMA2 Channel3 - DCD DMA2_Channel4_5_IRQHandler ; DMA2 Channel4 & Channel5 -__Vectors_End - -__Vectors_Size EQU __Vectors_End - __Vectors - - AREA |.text|, CODE, READONLY - -; Reset handler -Reset_Handler PROC - EXPORT Reset_Handler [WEAK] - IMPORT __main - IMPORT SystemInit - LDR R0, =SystemInit - BLX R0 - LDR R0, =__main - BX R0 - ENDP - -; Dummy Exception Handlers (infinite loops which can be modified) - -NMI_Handler PROC - EXPORT NMI_Handler [WEAK] - B . - ENDP -HardFault_Handler\ - PROC - EXPORT HardFault_Handler [WEAK] - B . - ENDP -MemManage_Handler\ - PROC - EXPORT MemManage_Handler [WEAK] - B . - ENDP -BusFault_Handler\ - PROC - EXPORT BusFault_Handler [WEAK] - B . - ENDP -UsageFault_Handler\ - PROC - EXPORT UsageFault_Handler [WEAK] - B . - ENDP -SVC_Handler PROC - EXPORT SVC_Handler [WEAK] - B . - ENDP -DebugMon_Handler\ - PROC - EXPORT DebugMon_Handler [WEAK] - B . - ENDP -PendSV_Handler PROC - EXPORT PendSV_Handler [WEAK] - B . - ENDP -SysTick_Handler PROC - EXPORT SysTick_Handler [WEAK] - B . - ENDP - -Default_Handler PROC - - EXPORT WWDG_IRQHandler [WEAK] - EXPORT PVD_IRQHandler [WEAK] - EXPORT TAMPER_IRQHandler [WEAK] - EXPORT RTC_IRQHandler [WEAK] - EXPORT FLASH_IRQHandler [WEAK] - EXPORT RCC_IRQHandler [WEAK] - EXPORT EXTI0_IRQHandler [WEAK] - EXPORT EXTI1_IRQHandler [WEAK] - EXPORT EXTI2_IRQHandler [WEAK] - EXPORT EXTI3_IRQHandler [WEAK] - EXPORT EXTI4_IRQHandler [WEAK] - EXPORT DMA1_Channel1_IRQHandler [WEAK] - EXPORT DMA1_Channel2_IRQHandler [WEAK] - EXPORT DMA1_Channel3_IRQHandler [WEAK] - EXPORT DMA1_Channel4_IRQHandler [WEAK] - EXPORT DMA1_Channel5_IRQHandler [WEAK] - EXPORT DMA1_Channel6_IRQHandler [WEAK] - EXPORT DMA1_Channel7_IRQHandler [WEAK] - EXPORT ADC1_2_IRQHandler [WEAK] - EXPORT USB_HP_CAN1_TX_IRQHandler [WEAK] - EXPORT USB_LP_CAN1_RX0_IRQHandler [WEAK] - EXPORT CAN1_RX1_IRQHandler [WEAK] - EXPORT CAN1_SCE_IRQHandler [WEAK] - EXPORT EXTI9_5_IRQHandler [WEAK] - EXPORT TIM1_BRK_IRQHandler [WEAK] - EXPORT TIM1_UP_IRQHandler [WEAK] - EXPORT TIM1_TRG_COM_IRQHandler [WEAK] - EXPORT TIM1_CC_IRQHandler [WEAK] - EXPORT TIM2_IRQHandler [WEAK] - EXPORT TIM3_IRQHandler [WEAK] - EXPORT TIM4_IRQHandler [WEAK] - EXPORT I2C1_EV_IRQHandler [WEAK] - EXPORT I2C1_ER_IRQHandler [WEAK] - EXPORT I2C2_EV_IRQHandler [WEAK] - EXPORT I2C2_ER_IRQHandler [WEAK] - EXPORT SPI1_IRQHandler [WEAK] - EXPORT SPI2_IRQHandler [WEAK] - EXPORT USART1_IRQHandler [WEAK] - EXPORT USART2_IRQHandler [WEAK] - EXPORT USART3_IRQHandler [WEAK] - EXPORT EXTI15_10_IRQHandler [WEAK] - EXPORT RTCAlarm_IRQHandler [WEAK] - EXPORT USBWakeUp_IRQHandler [WEAK] - EXPORT TIM8_BRK_IRQHandler [WEAK] - EXPORT TIM8_UP_IRQHandler [WEAK] - EXPORT TIM8_TRG_COM_IRQHandler [WEAK] - EXPORT TIM8_CC_IRQHandler [WEAK] - EXPORT ADC3_IRQHandler [WEAK] - EXPORT FSMC_IRQHandler [WEAK] - EXPORT SDIO_IRQHandler [WEAK] - EXPORT TIM5_IRQHandler [WEAK] - EXPORT SPI3_IRQHandler [WEAK] - EXPORT UART4_IRQHandler [WEAK] - EXPORT UART5_IRQHandler [WEAK] - EXPORT TIM6_IRQHandler [WEAK] - EXPORT TIM7_IRQHandler [WEAK] - EXPORT DMA2_Channel1_IRQHandler [WEAK] - EXPORT DMA2_Channel2_IRQHandler [WEAK] - EXPORT DMA2_Channel3_IRQHandler [WEAK] - EXPORT DMA2_Channel4_5_IRQHandler [WEAK] - -WWDG_IRQHandler -PVD_IRQHandler -TAMPER_IRQHandler -RTC_IRQHandler -FLASH_IRQHandler -RCC_IRQHandler -EXTI0_IRQHandler -EXTI1_IRQHandler -EXTI2_IRQHandler -EXTI3_IRQHandler -EXTI4_IRQHandler -DMA1_Channel1_IRQHandler -DMA1_Channel2_IRQHandler -DMA1_Channel3_IRQHandler -DMA1_Channel4_IRQHandler -DMA1_Channel5_IRQHandler -DMA1_Channel6_IRQHandler -DMA1_Channel7_IRQHandler -ADC1_2_IRQHandler -USB_HP_CAN1_TX_IRQHandler -USB_LP_CAN1_RX0_IRQHandler -CAN1_RX1_IRQHandler -CAN1_SCE_IRQHandler -EXTI9_5_IRQHandler -TIM1_BRK_IRQHandler -TIM1_UP_IRQHandler -TIM1_TRG_COM_IRQHandler -TIM1_CC_IRQHandler -TIM2_IRQHandler -TIM3_IRQHandler -TIM4_IRQHandler -I2C1_EV_IRQHandler -I2C1_ER_IRQHandler -I2C2_EV_IRQHandler -I2C2_ER_IRQHandler -SPI1_IRQHandler -SPI2_IRQHandler -USART1_IRQHandler -USART2_IRQHandler -USART3_IRQHandler -EXTI15_10_IRQHandler -RTCAlarm_IRQHandler -USBWakeUp_IRQHandler -TIM8_BRK_IRQHandler -TIM8_UP_IRQHandler -TIM8_TRG_COM_IRQHandler -TIM8_CC_IRQHandler -ADC3_IRQHandler -FSMC_IRQHandler -SDIO_IRQHandler -TIM5_IRQHandler -SPI3_IRQHandler -UART4_IRQHandler -UART5_IRQHandler -TIM6_IRQHandler -TIM7_IRQHandler -DMA2_Channel1_IRQHandler -DMA2_Channel2_IRQHandler -DMA2_Channel3_IRQHandler -DMA2_Channel4_5_IRQHandler - B . - - ENDP - - ALIGN - -;******************************************************************************* -; User Stack and Heap initialization -;******************************************************************************* - IF :DEF:__MICROLIB - - EXPORT __initial_sp - EXPORT __heap_base - EXPORT __heap_limit - - ELSE - - IMPORT __use_two_region_memory - EXPORT __user_initial_stackheap - -__user_initial_stackheap - - LDR R0, = Heap_Mem - LDR R1, =(Stack_Mem + Stack_Size) - LDR R2, = (Heap_Mem + Heap_Size) - LDR R3, = Stack_Mem - BX LR - - ALIGN - - ENDIF - - END - -;******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE***** diff --git a/bsp/stm32_radio/Libraries/CMSIS/CM3/DeviceSupport/ST/STM32F10x/startup/arm/startup_stm32f10x_ld.s b/bsp/stm32_radio/Libraries/CMSIS/CM3/DeviceSupport/ST/STM32F10x/startup/arm/startup_stm32f10x_ld.s deleted file mode 100644 index 2e3573b400..0000000000 --- a/bsp/stm32_radio/Libraries/CMSIS/CM3/DeviceSupport/ST/STM32F10x/startup/arm/startup_stm32f10x_ld.s +++ /dev/null @@ -1,297 +0,0 @@ -;******************** (C) COPYRIGHT 2010 STMicroelectronics ******************** -;* File Name : startup_stm32f10x_ld.s -;* Author : MCD Application Team -;* Version : V3.2.0 -;* Date : 03/01/2010 -;* Description : STM32F10x Low Density Devices vector table for RVMDK -;* toolchain. -;* This module performs: -;* - Set the initial SP -;* - Set the initial PC == Reset_Handler -;* - Set the vector table entries with the exceptions ISR address -;* - Configure the clock system -;* - Branches to __main in the C library (which eventually -;* calls main()). -;* After Reset the CortexM3 processor is in Thread mode, -;* priority is Privileged, and the Stack is set to Main. -;* <<< Use Configuration Wizard in Context Menu >>> -;******************************************************************************* -; THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS -; WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. -; AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, -; INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE -; CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING -; INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -;******************************************************************************* - -; Amount of memory (in bytes) allocated for Stack -; Tailor this value to your application needs -; Stack Configuration -; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Stack_Size EQU 0x00000400 - - AREA STACK, NOINIT, READWRITE, ALIGN=3 -Stack_Mem SPACE Stack_Size -__initial_sp - - -; Heap Configuration -; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Heap_Size EQU 0x00000200 - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit - - PRESERVE8 - THUMB - - -; Vector Table Mapped to Address 0 at Reset - AREA RESET, DATA, READONLY - EXPORT __Vectors - EXPORT __Vectors_End - EXPORT __Vectors_Size - -__Vectors DCD __initial_sp ; Top of Stack - DCD Reset_Handler ; Reset Handler - DCD NMI_Handler ; NMI Handler - DCD HardFault_Handler ; Hard Fault Handler - DCD MemManage_Handler ; MPU Fault Handler - DCD BusFault_Handler ; Bus Fault Handler - DCD UsageFault_Handler ; Usage Fault Handler - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD SVC_Handler ; SVCall Handler - DCD DebugMon_Handler ; Debug Monitor Handler - DCD 0 ; Reserved - DCD PendSV_Handler ; PendSV Handler - DCD SysTick_Handler ; SysTick Handler - - ; External Interrupts - DCD WWDG_IRQHandler ; Window Watchdog - DCD PVD_IRQHandler ; PVD through EXTI Line detect - DCD TAMPER_IRQHandler ; Tamper - DCD RTC_IRQHandler ; RTC - DCD FLASH_IRQHandler ; Flash - DCD RCC_IRQHandler ; RCC - DCD EXTI0_IRQHandler ; EXTI Line 0 - DCD EXTI1_IRQHandler ; EXTI Line 1 - DCD EXTI2_IRQHandler ; EXTI Line 2 - DCD EXTI3_IRQHandler ; EXTI Line 3 - DCD EXTI4_IRQHandler ; EXTI Line 4 - DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1 - DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2 - DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3 - DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4 - DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5 - DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6 - DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7 - DCD ADC1_2_IRQHandler ; ADC1_2 - DCD USB_HP_CAN1_TX_IRQHandler ; USB High Priority or CAN1 TX - DCD USB_LP_CAN1_RX0_IRQHandler ; USB Low Priority or CAN1 RX0 - DCD CAN1_RX1_IRQHandler ; CAN1 RX1 - DCD CAN1_SCE_IRQHandler ; CAN1 SCE - DCD EXTI9_5_IRQHandler ; EXTI Line 9..5 - DCD TIM1_BRK_IRQHandler ; TIM1 Break - DCD TIM1_UP_IRQHandler ; TIM1 Update - DCD TIM1_TRG_COM_IRQHandler ; TIM1 Trigger and Commutation - DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare - DCD TIM2_IRQHandler ; TIM2 - DCD TIM3_IRQHandler ; TIM3 - DCD 0 ; Reserved - DCD I2C1_EV_IRQHandler ; I2C1 Event - DCD I2C1_ER_IRQHandler ; I2C1 Error - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD SPI1_IRQHandler ; SPI1 - DCD 0 ; Reserved - DCD USART1_IRQHandler ; USART1 - DCD USART2_IRQHandler ; USART2 - DCD 0 ; Reserved - DCD EXTI15_10_IRQHandler ; EXTI Line 15..10 - DCD RTCAlarm_IRQHandler ; RTC Alarm through EXTI Line - DCD USBWakeUp_IRQHandler ; USB Wakeup from suspend -__Vectors_End - -__Vectors_Size EQU __Vectors_End - __Vectors - - AREA |.text|, CODE, READONLY - -; Reset handler routine -Reset_Handler PROC - EXPORT Reset_Handler [WEAK] - IMPORT __main - IMPORT SystemInit - LDR R0, =SystemInit - BLX R0 - LDR R0, =__main - BX R0 - ENDP - -; Dummy Exception Handlers (infinite loops which can be modified) - -NMI_Handler PROC - EXPORT NMI_Handler [WEAK] - B . - ENDP -HardFault_Handler\ - PROC - EXPORT HardFault_Handler [WEAK] - B . - ENDP -MemManage_Handler\ - PROC - EXPORT MemManage_Handler [WEAK] - B . - ENDP -BusFault_Handler\ - PROC - EXPORT BusFault_Handler [WEAK] - B . - ENDP -UsageFault_Handler\ - PROC - EXPORT UsageFault_Handler [WEAK] - B . - ENDP -SVC_Handler PROC - EXPORT SVC_Handler [WEAK] - B . - ENDP -DebugMon_Handler\ - PROC - EXPORT DebugMon_Handler [WEAK] - B . - ENDP -PendSV_Handler PROC - EXPORT PendSV_Handler [WEAK] - B . - ENDP -SysTick_Handler PROC - EXPORT SysTick_Handler [WEAK] - B . - ENDP - -Default_Handler PROC - - EXPORT WWDG_IRQHandler [WEAK] - EXPORT PVD_IRQHandler [WEAK] - EXPORT TAMPER_IRQHandler [WEAK] - EXPORT RTC_IRQHandler [WEAK] - EXPORT FLASH_IRQHandler [WEAK] - EXPORT RCC_IRQHandler [WEAK] - EXPORT EXTI0_IRQHandler [WEAK] - EXPORT EXTI1_IRQHandler [WEAK] - EXPORT EXTI2_IRQHandler [WEAK] - EXPORT EXTI3_IRQHandler [WEAK] - EXPORT EXTI4_IRQHandler [WEAK] - EXPORT DMA1_Channel1_IRQHandler [WEAK] - EXPORT DMA1_Channel2_IRQHandler [WEAK] - EXPORT DMA1_Channel3_IRQHandler [WEAK] - EXPORT DMA1_Channel4_IRQHandler [WEAK] - EXPORT DMA1_Channel5_IRQHandler [WEAK] - EXPORT DMA1_Channel6_IRQHandler [WEAK] - EXPORT DMA1_Channel7_IRQHandler [WEAK] - EXPORT ADC1_2_IRQHandler [WEAK] - EXPORT USB_HP_CAN1_TX_IRQHandler [WEAK] - EXPORT USB_LP_CAN1_RX0_IRQHandler [WEAK] - EXPORT CAN1_RX1_IRQHandler [WEAK] - EXPORT CAN1_SCE_IRQHandler [WEAK] - EXPORT EXTI9_5_IRQHandler [WEAK] - EXPORT TIM1_BRK_IRQHandler [WEAK] - EXPORT TIM1_UP_IRQHandler [WEAK] - EXPORT TIM1_TRG_COM_IRQHandler [WEAK] - EXPORT TIM1_CC_IRQHandler [WEAK] - EXPORT TIM2_IRQHandler [WEAK] - EXPORT TIM3_IRQHandler [WEAK] - EXPORT I2C1_EV_IRQHandler [WEAK] - EXPORT I2C1_ER_IRQHandler [WEAK] - EXPORT SPI1_IRQHandler [WEAK] - EXPORT USART1_IRQHandler [WEAK] - EXPORT USART2_IRQHandler [WEAK] - EXPORT EXTI15_10_IRQHandler [WEAK] - EXPORT RTCAlarm_IRQHandler [WEAK] - EXPORT USBWakeUp_IRQHandler [WEAK] - -WWDG_IRQHandler -PVD_IRQHandler -TAMPER_IRQHandler -RTC_IRQHandler -FLASH_IRQHandler -RCC_IRQHandler -EXTI0_IRQHandler -EXTI1_IRQHandler -EXTI2_IRQHandler -EXTI3_IRQHandler -EXTI4_IRQHandler -DMA1_Channel1_IRQHandler -DMA1_Channel2_IRQHandler -DMA1_Channel3_IRQHandler -DMA1_Channel4_IRQHandler -DMA1_Channel5_IRQHandler -DMA1_Channel6_IRQHandler -DMA1_Channel7_IRQHandler -ADC1_2_IRQHandler -USB_HP_CAN1_TX_IRQHandler -USB_LP_CAN1_RX0_IRQHandler -CAN1_RX1_IRQHandler -CAN1_SCE_IRQHandler -EXTI9_5_IRQHandler -TIM1_BRK_IRQHandler -TIM1_UP_IRQHandler -TIM1_TRG_COM_IRQHandler -TIM1_CC_IRQHandler -TIM2_IRQHandler -TIM3_IRQHandler -I2C1_EV_IRQHandler -I2C1_ER_IRQHandler -SPI1_IRQHandler -USART1_IRQHandler -USART2_IRQHandler -EXTI15_10_IRQHandler -RTCAlarm_IRQHandler -USBWakeUp_IRQHandler - - B . - - ENDP - - ALIGN - -;******************************************************************************* -; User Stack and Heap initialization -;******************************************************************************* - IF :DEF:__MICROLIB - - EXPORT __initial_sp - EXPORT __heap_base - EXPORT __heap_limit - - ELSE - - IMPORT __use_two_region_memory - EXPORT __user_initial_stackheap - -__user_initial_stackheap - - LDR R0, = Heap_Mem - LDR R1, =(Stack_Mem + Stack_Size) - LDR R2, = (Heap_Mem + Heap_Size) - LDR R3, = Stack_Mem - BX LR - - ALIGN - - ENDIF - - END - -;******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE***** diff --git a/bsp/stm32_radio/Libraries/CMSIS/CM3/DeviceSupport/ST/STM32F10x/startup/arm/startup_stm32f10x_ld_vl.s b/bsp/stm32_radio/Libraries/CMSIS/CM3/DeviceSupport/ST/STM32F10x/startup/arm/startup_stm32f10x_ld_vl.s deleted file mode 100644 index f1e5cf9752..0000000000 --- a/bsp/stm32_radio/Libraries/CMSIS/CM3/DeviceSupport/ST/STM32F10x/startup/arm/startup_stm32f10x_ld_vl.s +++ /dev/null @@ -1,304 +0,0 @@ -;******************** (C) COPYRIGHT 2010 STMicroelectronics ******************** -;* File Name : startup_stm32f10x_ld_vl.s -;* Author : MCD Application Team -;* Version : V3.2.0 -;* Date : 03/01/2010 -;* Description : STM32F10x Low Density Value Line Devices vector table -;* for RVMDK toolchain. -;* This module performs: -;* - Set the initial SP -;* - Set the initial PC == Reset_Handler -;* - Set the vector table entries with the exceptions ISR address -;* - Configure the clock system -;* - Branches to __main in the C library (which eventually -;* calls main()). -;* After Reset the CortexM3 processor is in Thread mode, -;* priority is Privileged, and the Stack is set to Main. -;* <<< Use Configuration Wizard in Context Menu >>> -;******************************************************************************* -; THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS -; WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. -; AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, -; INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE -; CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING -; INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -;******************************************************************************* - -; Amount of memory (in bytes) allocated for Stack -; Tailor this value to your application needs -; Stack Configuration -; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Stack_Size EQU 0x00000400 - - AREA STACK, NOINIT, READWRITE, ALIGN=3 -Stack_Mem SPACE Stack_Size -__initial_sp - - -; Heap Configuration -; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Heap_Size EQU 0x00000200 - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit - - PRESERVE8 - THUMB - - -; Vector Table Mapped to Address 0 at Reset - AREA RESET, DATA, READONLY - EXPORT __Vectors - EXPORT __Vectors_End - EXPORT __Vectors_Size - -__Vectors DCD __initial_sp ; Top of Stack - DCD Reset_Handler ; Reset Handler - DCD NMI_Handler ; NMI Handler - DCD HardFault_Handler ; Hard Fault Handler - DCD MemManage_Handler ; MPU Fault Handler - DCD BusFault_Handler ; Bus Fault Handler - DCD UsageFault_Handler ; Usage Fault Handler - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD SVC_Handler ; SVCall Handler - DCD DebugMon_Handler ; Debug Monitor Handler - DCD 0 ; Reserved - DCD PendSV_Handler ; PendSV Handler - DCD SysTick_Handler ; SysTick Handler - - ; External Interrupts - DCD WWDG_IRQHandler ; Window Watchdog - DCD PVD_IRQHandler ; PVD through EXTI Line detect - DCD TAMPER_IRQHandler ; Tamper - DCD RTC_IRQHandler ; RTC - DCD FLASH_IRQHandler ; Flash - DCD RCC_IRQHandler ; RCC - DCD EXTI0_IRQHandler ; EXTI Line 0 - DCD EXTI1_IRQHandler ; EXTI Line 1 - DCD EXTI2_IRQHandler ; EXTI Line 2 - DCD EXTI3_IRQHandler ; EXTI Line 3 - DCD EXTI4_IRQHandler ; EXTI Line 4 - DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1 - DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2 - DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3 - DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4 - DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5 - DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6 - DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7 - DCD ADC1_IRQHandler ; ADC1 - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD EXTI9_5_IRQHandler ; EXTI Line 9..5 - DCD TIM1_BRK_TIM15_IRQHandler ; TIM1 Break and TIM15 - DCD TIM1_UP_TIM16_IRQHandler ; TIM1 Update and TIM16 - DCD TIM1_TRG_COM_TIM17_IRQHandler ; TIM1 Trigger and Commutation and TIM17 - DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare - DCD TIM2_IRQHandler ; TIM2 - DCD TIM3_IRQHandler ; TIM3 - DCD 0 ; Reserved - DCD I2C1_EV_IRQHandler ; I2C1 Event - DCD I2C1_ER_IRQHandler ; I2C1 Error - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD SPI1_IRQHandler ; SPI1 - DCD 0 ; Reserved - DCD USART1_IRQHandler ; USART1 - DCD USART2_IRQHandler ; USART2 - DCD 0 ; Reserved - DCD EXTI15_10_IRQHandler ; EXTI Line 15..10 - DCD RTCAlarm_IRQHandler ; RTC Alarm through EXTI Line - DCD CEC_IRQHandler ; HDMI-CEC - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD TIM6_DAC_IRQHandler ; TIM6 and DAC underrun - DCD TIM7_IRQHandler ; TIM7 -__Vectors_End - -__Vectors_Size EQU __Vectors_End - __Vectors - - AREA |.text|, CODE, READONLY - -; Reset handler -Reset_Handler PROC - EXPORT Reset_Handler [WEAK] - IMPORT __main - IMPORT SystemInit - LDR R0, =SystemInit - BLX R0 - LDR R0, =__main - BX R0 - ENDP - -; Dummy Exception Handlers (infinite loops which can be modified) - -NMI_Handler PROC - EXPORT NMI_Handler [WEAK] - B . - ENDP -HardFault_Handler\ - PROC - EXPORT HardFault_Handler [WEAK] - B . - ENDP -MemManage_Handler\ - PROC - EXPORT MemManage_Handler [WEAK] - B . - ENDP -BusFault_Handler\ - PROC - EXPORT BusFault_Handler [WEAK] - B . - ENDP -UsageFault_Handler\ - PROC - EXPORT UsageFault_Handler [WEAK] - B . - ENDP -SVC_Handler PROC - EXPORT SVC_Handler [WEAK] - B . - ENDP -DebugMon_Handler\ - PROC - EXPORT DebugMon_Handler [WEAK] - B . - ENDP -PendSV_Handler PROC - EXPORT PendSV_Handler [WEAK] - B . - ENDP -SysTick_Handler PROC - EXPORT SysTick_Handler [WEAK] - B . - ENDP - -Default_Handler PROC - - EXPORT WWDG_IRQHandler [WEAK] - EXPORT PVD_IRQHandler [WEAK] - EXPORT TAMPER_IRQHandler [WEAK] - EXPORT RTC_IRQHandler [WEAK] - EXPORT FLASH_IRQHandler [WEAK] - EXPORT RCC_IRQHandler [WEAK] - EXPORT EXTI0_IRQHandler [WEAK] - EXPORT EXTI1_IRQHandler [WEAK] - EXPORT EXTI2_IRQHandler [WEAK] - EXPORT EXTI3_IRQHandler [WEAK] - EXPORT EXTI4_IRQHandler [WEAK] - EXPORT DMA1_Channel1_IRQHandler [WEAK] - EXPORT DMA1_Channel2_IRQHandler [WEAK] - EXPORT DMA1_Channel3_IRQHandler [WEAK] - EXPORT DMA1_Channel4_IRQHandler [WEAK] - EXPORT DMA1_Channel5_IRQHandler [WEAK] - EXPORT DMA1_Channel6_IRQHandler [WEAK] - EXPORT DMA1_Channel7_IRQHandler [WEAK] - EXPORT ADC1_IRQHandler [WEAK] - EXPORT EXTI9_5_IRQHandler [WEAK] - EXPORT TIM1_BRK_TIM15_IRQHandler [WEAK] - EXPORT TIM1_UP_TIM16_IRQHandler [WEAK] - EXPORT TIM1_TRG_COM_TIM17_IRQHandler [WEAK] - EXPORT TIM1_CC_IRQHandler [WEAK] - EXPORT TIM2_IRQHandler [WEAK] - EXPORT TIM3_IRQHandler [WEAK] - EXPORT I2C1_EV_IRQHandler [WEAK] - EXPORT I2C1_ER_IRQHandler [WEAK] - EXPORT SPI1_IRQHandler [WEAK] - EXPORT USART1_IRQHandler [WEAK] - EXPORT USART2_IRQHandler [WEAK] - EXPORT EXTI15_10_IRQHandler [WEAK] - EXPORT RTCAlarm_IRQHandler [WEAK] - EXPORT CEC_IRQHandler [WEAK] - EXPORT TIM6_DAC_IRQHandler [WEAK] - EXPORT TIM7_IRQHandler [WEAK] -WWDG_IRQHandler -PVD_IRQHandler -TAMPER_IRQHandler -RTC_IRQHandler -FLASH_IRQHandler -RCC_IRQHandler -EXTI0_IRQHandler -EXTI1_IRQHandler -EXTI2_IRQHandler -EXTI3_IRQHandler -EXTI4_IRQHandler -DMA1_Channel1_IRQHandler -DMA1_Channel2_IRQHandler -DMA1_Channel3_IRQHandler -DMA1_Channel4_IRQHandler -DMA1_Channel5_IRQHandler -DMA1_Channel6_IRQHandler -DMA1_Channel7_IRQHandler -ADC1_IRQHandler -EXTI9_5_IRQHandler -TIM1_BRK_TIM15_IRQHandler -TIM1_UP_TIM16_IRQHandler -TIM1_TRG_COM_TIM17_IRQHandler -TIM1_CC_IRQHandler -TIM2_IRQHandler -TIM3_IRQHandler -I2C1_EV_IRQHandler -I2C1_ER_IRQHandler -SPI1_IRQHandler -USART1_IRQHandler -USART2_IRQHandler -EXTI15_10_IRQHandler -RTCAlarm_IRQHandler -CEC_IRQHandler -TIM6_DAC_IRQHandler -TIM7_IRQHandler - B . - - ENDP - - ALIGN - -;******************************************************************************* -; User Stack and Heap initialization -;******************************************************************************* - IF :DEF:__MICROLIB - - EXPORT __initial_sp - EXPORT __heap_base - EXPORT __heap_limit - - ELSE - - IMPORT __use_two_region_memory - EXPORT __user_initial_stackheap - -__user_initial_stackheap - - LDR R0, = Heap_Mem - LDR R1, =(Stack_Mem + Stack_Size) - LDR R2, = (Heap_Mem + Heap_Size) - LDR R3, = Stack_Mem - BX LR - - ALIGN - - ENDIF - - END - -;******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE***** diff --git a/bsp/stm32_radio/Libraries/CMSIS/CM3/DeviceSupport/ST/STM32F10x/startup/arm/startup_stm32f10x_md.s b/bsp/stm32_radio/Libraries/CMSIS/CM3/DeviceSupport/ST/STM32F10x/startup/arm/startup_stm32f10x_md.s deleted file mode 100644 index 7c4e8eaa0c..0000000000 --- a/bsp/stm32_radio/Libraries/CMSIS/CM3/DeviceSupport/ST/STM32F10x/startup/arm/startup_stm32f10x_md.s +++ /dev/null @@ -1,307 +0,0 @@ -;******************** (C) COPYRIGHT 2010 STMicroelectronics ******************** -;* File Name : startup_stm32f10x_md.s -;* Author : MCD Application Team -;* Version : V3.2.0 -;* Date : 03/01/2010 -;* Description : STM32F10x Medium Density Devices vector table for RVMDK -;* toolchain. -;* This module performs: -;* - Set the initial SP -;* - Set the initial PC == Reset_Handler -;* - Set the vector table entries with the exceptions ISR address -;* - Configure the clock system -;* - Branches to __main in the C library (which eventually -;* calls main()). -;* After Reset the CortexM3 processor is in Thread mode, -;* priority is Privileged, and the Stack is set to Main. -;* <<< Use Configuration Wizard in Context Menu >>> -;******************************************************************************* -; THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS -; WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. -; AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, -; INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE -; CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING -; INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -;******************************************************************************* - -; Amount of memory (in bytes) allocated for Stack -; Tailor this value to your application needs -; Stack Configuration -; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Stack_Size EQU 0x00000400 - - AREA STACK, NOINIT, READWRITE, ALIGN=3 -Stack_Mem SPACE Stack_Size -__initial_sp - - -; Heap Configuration -; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Heap_Size EQU 0x00000200 - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit - - PRESERVE8 - THUMB - - -; Vector Table Mapped to Address 0 at Reset - AREA RESET, DATA, READONLY - EXPORT __Vectors - EXPORT __Vectors_End - EXPORT __Vectors_Size - -__Vectors DCD __initial_sp ; Top of Stack - DCD Reset_Handler ; Reset Handler - DCD NMI_Handler ; NMI Handler - DCD HardFault_Handler ; Hard Fault Handler - DCD MemManage_Handler ; MPU Fault Handler - DCD BusFault_Handler ; Bus Fault Handler - DCD UsageFault_Handler ; Usage Fault Handler - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD SVC_Handler ; SVCall Handler - DCD DebugMon_Handler ; Debug Monitor Handler - DCD 0 ; Reserved - DCD PendSV_Handler ; PendSV Handler - DCD SysTick_Handler ; SysTick Handler - - ; External Interrupts - DCD WWDG_IRQHandler ; Window Watchdog - DCD PVD_IRQHandler ; PVD through EXTI Line detect - DCD TAMPER_IRQHandler ; Tamper - DCD RTC_IRQHandler ; RTC - DCD FLASH_IRQHandler ; Flash - DCD RCC_IRQHandler ; RCC - DCD EXTI0_IRQHandler ; EXTI Line 0 - DCD EXTI1_IRQHandler ; EXTI Line 1 - DCD EXTI2_IRQHandler ; EXTI Line 2 - DCD EXTI3_IRQHandler ; EXTI Line 3 - DCD EXTI4_IRQHandler ; EXTI Line 4 - DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1 - DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2 - DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3 - DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4 - DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5 - DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6 - DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7 - DCD ADC1_2_IRQHandler ; ADC1_2 - DCD USB_HP_CAN1_TX_IRQHandler ; USB High Priority or CAN1 TX - DCD USB_LP_CAN1_RX0_IRQHandler ; USB Low Priority or CAN1 RX0 - DCD CAN1_RX1_IRQHandler ; CAN1 RX1 - DCD CAN1_SCE_IRQHandler ; CAN1 SCE - DCD EXTI9_5_IRQHandler ; EXTI Line 9..5 - DCD TIM1_BRK_IRQHandler ; TIM1 Break - DCD TIM1_UP_IRQHandler ; TIM1 Update - DCD TIM1_TRG_COM_IRQHandler ; TIM1 Trigger and Commutation - DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare - DCD TIM2_IRQHandler ; TIM2 - DCD TIM3_IRQHandler ; TIM3 - DCD TIM4_IRQHandler ; TIM4 - DCD I2C1_EV_IRQHandler ; I2C1 Event - DCD I2C1_ER_IRQHandler ; I2C1 Error - DCD I2C2_EV_IRQHandler ; I2C2 Event - DCD I2C2_ER_IRQHandler ; I2C2 Error - DCD SPI1_IRQHandler ; SPI1 - DCD SPI2_IRQHandler ; SPI2 - DCD USART1_IRQHandler ; USART1 - DCD USART2_IRQHandler ; USART2 - DCD USART3_IRQHandler ; USART3 - DCD EXTI15_10_IRQHandler ; EXTI Line 15..10 - DCD RTCAlarm_IRQHandler ; RTC Alarm through EXTI Line - DCD USBWakeUp_IRQHandler ; USB Wakeup from suspend -__Vectors_End - -__Vectors_Size EQU __Vectors_End - __Vectors - - AREA |.text|, CODE, READONLY - -; Reset handler -Reset_Handler PROC - EXPORT Reset_Handler [WEAK] - IMPORT __main - IMPORT SystemInit - LDR R0, =SystemInit - BLX R0 - LDR R0, =__main - BX R0 - ENDP - -; Dummy Exception Handlers (infinite loops which can be modified) - -NMI_Handler PROC - EXPORT NMI_Handler [WEAK] - B . - ENDP -HardFault_Handler\ - PROC - EXPORT HardFault_Handler [WEAK] - B . - ENDP -MemManage_Handler\ - PROC - EXPORT MemManage_Handler [WEAK] - B . - ENDP -BusFault_Handler\ - PROC - EXPORT BusFault_Handler [WEAK] - B . - ENDP -UsageFault_Handler\ - PROC - EXPORT UsageFault_Handler [WEAK] - B . - ENDP -SVC_Handler PROC - EXPORT SVC_Handler [WEAK] - B . - ENDP -DebugMon_Handler\ - PROC - EXPORT DebugMon_Handler [WEAK] - B . - ENDP -PendSV_Handler PROC - EXPORT PendSV_Handler [WEAK] - B . - ENDP -SysTick_Handler PROC - EXPORT SysTick_Handler [WEAK] - B . - ENDP - -Default_Handler PROC - - EXPORT WWDG_IRQHandler [WEAK] - EXPORT PVD_IRQHandler [WEAK] - EXPORT TAMPER_IRQHandler [WEAK] - EXPORT RTC_IRQHandler [WEAK] - EXPORT FLASH_IRQHandler [WEAK] - EXPORT RCC_IRQHandler [WEAK] - EXPORT EXTI0_IRQHandler [WEAK] - EXPORT EXTI1_IRQHandler [WEAK] - EXPORT EXTI2_IRQHandler [WEAK] - EXPORT EXTI3_IRQHandler [WEAK] - EXPORT EXTI4_IRQHandler [WEAK] - EXPORT DMA1_Channel1_IRQHandler [WEAK] - EXPORT DMA1_Channel2_IRQHandler [WEAK] - EXPORT DMA1_Channel3_IRQHandler [WEAK] - EXPORT DMA1_Channel4_IRQHandler [WEAK] - EXPORT DMA1_Channel5_IRQHandler [WEAK] - EXPORT DMA1_Channel6_IRQHandler [WEAK] - EXPORT DMA1_Channel7_IRQHandler [WEAK] - EXPORT ADC1_2_IRQHandler [WEAK] - EXPORT USB_HP_CAN1_TX_IRQHandler [WEAK] - EXPORT USB_LP_CAN1_RX0_IRQHandler [WEAK] - EXPORT CAN1_RX1_IRQHandler [WEAK] - EXPORT CAN1_SCE_IRQHandler [WEAK] - EXPORT EXTI9_5_IRQHandler [WEAK] - EXPORT TIM1_BRK_IRQHandler [WEAK] - EXPORT TIM1_UP_IRQHandler [WEAK] - EXPORT TIM1_TRG_COM_IRQHandler [WEAK] - EXPORT TIM1_CC_IRQHandler [WEAK] - EXPORT TIM2_IRQHandler [WEAK] - EXPORT TIM3_IRQHandler [WEAK] - EXPORT TIM4_IRQHandler [WEAK] - EXPORT I2C1_EV_IRQHandler [WEAK] - EXPORT I2C1_ER_IRQHandler [WEAK] - EXPORT I2C2_EV_IRQHandler [WEAK] - EXPORT I2C2_ER_IRQHandler [WEAK] - EXPORT SPI1_IRQHandler [WEAK] - EXPORT SPI2_IRQHandler [WEAK] - EXPORT USART1_IRQHandler [WEAK] - EXPORT USART2_IRQHandler [WEAK] - EXPORT USART3_IRQHandler [WEAK] - EXPORT EXTI15_10_IRQHandler [WEAK] - EXPORT RTCAlarm_IRQHandler [WEAK] - EXPORT USBWakeUp_IRQHandler [WEAK] - -WWDG_IRQHandler -PVD_IRQHandler -TAMPER_IRQHandler -RTC_IRQHandler -FLASH_IRQHandler -RCC_IRQHandler -EXTI0_IRQHandler -EXTI1_IRQHandler -EXTI2_IRQHandler -EXTI3_IRQHandler -EXTI4_IRQHandler -DMA1_Channel1_IRQHandler -DMA1_Channel2_IRQHandler -DMA1_Channel3_IRQHandler -DMA1_Channel4_IRQHandler -DMA1_Channel5_IRQHandler -DMA1_Channel6_IRQHandler -DMA1_Channel7_IRQHandler -ADC1_2_IRQHandler -USB_HP_CAN1_TX_IRQHandler -USB_LP_CAN1_RX0_IRQHandler -CAN1_RX1_IRQHandler -CAN1_SCE_IRQHandler -EXTI9_5_IRQHandler -TIM1_BRK_IRQHandler -TIM1_UP_IRQHandler -TIM1_TRG_COM_IRQHandler -TIM1_CC_IRQHandler -TIM2_IRQHandler -TIM3_IRQHandler -TIM4_IRQHandler -I2C1_EV_IRQHandler -I2C1_ER_IRQHandler -I2C2_EV_IRQHandler -I2C2_ER_IRQHandler -SPI1_IRQHandler -SPI2_IRQHandler -USART1_IRQHandler -USART2_IRQHandler -USART3_IRQHandler -EXTI15_10_IRQHandler -RTCAlarm_IRQHandler -USBWakeUp_IRQHandler - - B . - - ENDP - - ALIGN - -;******************************************************************************* -; User Stack and Heap initialization -;******************************************************************************* - IF :DEF:__MICROLIB - - EXPORT __initial_sp - EXPORT __heap_base - EXPORT __heap_limit - - ELSE - - IMPORT __use_two_region_memory - EXPORT __user_initial_stackheap - -__user_initial_stackheap - - LDR R0, = Heap_Mem - LDR R1, =(Stack_Mem + Stack_Size) - LDR R2, = (Heap_Mem + Heap_Size) - LDR R3, = Stack_Mem - BX LR - - ALIGN - - ENDIF - - END - -;******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE***** diff --git a/bsp/stm32_radio/Libraries/CMSIS/CM3/DeviceSupport/ST/STM32F10x/startup/arm/startup_stm32f10x_md_vl.s b/bsp/stm32_radio/Libraries/CMSIS/CM3/DeviceSupport/ST/STM32F10x/startup/arm/startup_stm32f10x_md_vl.s deleted file mode 100644 index 8956fb6716..0000000000 --- a/bsp/stm32_radio/Libraries/CMSIS/CM3/DeviceSupport/ST/STM32F10x/startup/arm/startup_stm32f10x_md_vl.s +++ /dev/null @@ -1,315 +0,0 @@ -;******************** (C) COPYRIGHT 2010 STMicroelectronics ******************** -;* File Name : startup_stm32f10x_md_vl.s -;* Author : MCD Application Team -;* Version : V3.2.0 -;* Date : 03/01/2010 -;* Description : STM32F10x Medium Density Value Line Devices vector table -;* for RVMDK toolchain. -;* This module performs: -;* - Set the initial SP -;* - Set the initial PC == Reset_Handler -;* - Set the vector table entries with the exceptions ISR address -;* - Configure the clock system -;* - Branches to __main in the C library (which eventually -;* calls main()). -;* After Reset the CortexM3 processor is in Thread mode, -;* priority is Privileged, and the Stack is set to Main. -;* <<< Use Configuration Wizard in Context Menu >>> -;******************************************************************************* -; THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS -; WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. -; AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, -; INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE -; CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING -; INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -;******************************************************************************* - -; Amount of memory (in bytes) allocated for Stack -; Tailor this value to your application needs -; Stack Configuration -; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Stack_Size EQU 0x00000400 - - AREA STACK, NOINIT, READWRITE, ALIGN=3 -Stack_Mem SPACE Stack_Size -__initial_sp - - -; Heap Configuration -; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Heap_Size EQU 0x00000200 - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit - - PRESERVE8 - THUMB - - -; Vector Table Mapped to Address 0 at Reset - AREA RESET, DATA, READONLY - EXPORT __Vectors - EXPORT __Vectors_End - EXPORT __Vectors_Size - -__Vectors DCD __initial_sp ; Top of Stack - DCD Reset_Handler ; Reset Handler - DCD NMI_Handler ; NMI Handler - DCD HardFault_Handler ; Hard Fault Handler - DCD MemManage_Handler ; MPU Fault Handler - DCD BusFault_Handler ; Bus Fault Handler - DCD UsageFault_Handler ; Usage Fault Handler - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD SVC_Handler ; SVCall Handler - DCD DebugMon_Handler ; Debug Monitor Handler - DCD 0 ; Reserved - DCD PendSV_Handler ; PendSV Handler - DCD SysTick_Handler ; SysTick Handler - - ; External Interrupts - DCD WWDG_IRQHandler ; Window Watchdog - DCD PVD_IRQHandler ; PVD through EXTI Line detect - DCD TAMPER_IRQHandler ; Tamper - DCD RTC_IRQHandler ; RTC - DCD FLASH_IRQHandler ; Flash - DCD RCC_IRQHandler ; RCC - DCD EXTI0_IRQHandler ; EXTI Line 0 - DCD EXTI1_IRQHandler ; EXTI Line 1 - DCD EXTI2_IRQHandler ; EXTI Line 2 - DCD EXTI3_IRQHandler ; EXTI Line 3 - DCD EXTI4_IRQHandler ; EXTI Line 4 - DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1 - DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2 - DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3 - DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4 - DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5 - DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6 - DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7 - DCD ADC1_IRQHandler ; ADC1 - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD EXTI9_5_IRQHandler ; EXTI Line 9..5 - DCD TIM1_BRK_TIM15_IRQHandler ; TIM1 Break and TIM15 - DCD TIM1_UP_TIM16_IRQHandler ; TIM1 Update and TIM16 - DCD TIM1_TRG_COM_TIM17_IRQHandler ; TIM1 Trigger and Commutation and TIM17 - DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare - DCD TIM2_IRQHandler ; TIM2 - DCD TIM3_IRQHandler ; TIM3 - DCD TIM4_IRQHandler ; TIM4 - DCD I2C1_EV_IRQHandler ; I2C1 Event - DCD I2C1_ER_IRQHandler ; I2C1 Error - DCD I2C2_EV_IRQHandler ; I2C2 Event - DCD I2C2_ER_IRQHandler ; I2C2 Error - DCD SPI1_IRQHandler ; SPI1 - DCD SPI2_IRQHandler ; SPI2 - DCD USART1_IRQHandler ; USART1 - DCD USART2_IRQHandler ; USART2 - DCD USART3_IRQHandler ; USART3 - DCD EXTI15_10_IRQHandler ; EXTI Line 15..10 - DCD RTCAlarm_IRQHandler ; RTC Alarm through EXTI Line - DCD CEC_IRQHandler ; HDMI-CEC - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD TIM6_DAC_IRQHandler ; TIM6 and DAC underrun - DCD TIM7_IRQHandler ; TIM7 -__Vectors_End - -__Vectors_Size EQU __Vectors_End - __Vectors - - AREA |.text|, CODE, READONLY - -; Reset handler -Reset_Handler PROC - EXPORT Reset_Handler [WEAK] - IMPORT __main - IMPORT SystemInit - LDR R0, =SystemInit - BLX R0 - LDR R0, =__main - BX R0 - ENDP - -; Dummy Exception Handlers (infinite loops which can be modified) - -NMI_Handler PROC - EXPORT NMI_Handler [WEAK] - B . - ENDP -HardFault_Handler\ - PROC - EXPORT HardFault_Handler [WEAK] - B . - ENDP -MemManage_Handler\ - PROC - EXPORT MemManage_Handler [WEAK] - B . - ENDP -BusFault_Handler\ - PROC - EXPORT BusFault_Handler [WEAK] - B . - ENDP -UsageFault_Handler\ - PROC - EXPORT UsageFault_Handler [WEAK] - B . - ENDP -SVC_Handler PROC - EXPORT SVC_Handler [WEAK] - B . - ENDP -DebugMon_Handler\ - PROC - EXPORT DebugMon_Handler [WEAK] - B . - ENDP -PendSV_Handler PROC - EXPORT PendSV_Handler [WEAK] - B . - ENDP -SysTick_Handler PROC - EXPORT SysTick_Handler [WEAK] - B . - ENDP - -Default_Handler PROC - - EXPORT WWDG_IRQHandler [WEAK] - EXPORT PVD_IRQHandler [WEAK] - EXPORT TAMPER_IRQHandler [WEAK] - EXPORT RTC_IRQHandler [WEAK] - EXPORT FLASH_IRQHandler [WEAK] - EXPORT RCC_IRQHandler [WEAK] - EXPORT EXTI0_IRQHandler [WEAK] - EXPORT EXTI1_IRQHandler [WEAK] - EXPORT EXTI2_IRQHandler [WEAK] - EXPORT EXTI3_IRQHandler [WEAK] - EXPORT EXTI4_IRQHandler [WEAK] - EXPORT DMA1_Channel1_IRQHandler [WEAK] - EXPORT DMA1_Channel2_IRQHandler [WEAK] - EXPORT DMA1_Channel3_IRQHandler [WEAK] - EXPORT DMA1_Channel4_IRQHandler [WEAK] - EXPORT DMA1_Channel5_IRQHandler [WEAK] - EXPORT DMA1_Channel6_IRQHandler [WEAK] - EXPORT DMA1_Channel7_IRQHandler [WEAK] - EXPORT ADC1_IRQHandler [WEAK] - EXPORT EXTI9_5_IRQHandler [WEAK] - EXPORT TIM1_BRK_TIM15_IRQHandler [WEAK] - EXPORT TIM1_UP_TIM16_IRQHandler [WEAK] - EXPORT TIM1_TRG_COM_TIM17_IRQHandler [WEAK] - EXPORT TIM1_CC_IRQHandler [WEAK] - EXPORT TIM2_IRQHandler [WEAK] - EXPORT TIM3_IRQHandler [WEAK] - EXPORT TIM4_IRQHandler [WEAK] - EXPORT I2C1_EV_IRQHandler [WEAK] - EXPORT I2C1_ER_IRQHandler [WEAK] - EXPORT I2C2_EV_IRQHandler [WEAK] - EXPORT I2C2_ER_IRQHandler [WEAK] - EXPORT SPI1_IRQHandler [WEAK] - EXPORT SPI2_IRQHandler [WEAK] - EXPORT USART1_IRQHandler [WEAK] - EXPORT USART2_IRQHandler [WEAK] - EXPORT USART3_IRQHandler [WEAK] - EXPORT EXTI15_10_IRQHandler [WEAK] - EXPORT RTCAlarm_IRQHandler [WEAK] - EXPORT CEC_IRQHandler [WEAK] - EXPORT TIM6_DAC_IRQHandler [WEAK] - EXPORT TIM7_IRQHandler [WEAK] - -WWDG_IRQHandler -PVD_IRQHandler -TAMPER_IRQHandler -RTC_IRQHandler -FLASH_IRQHandler -RCC_IRQHandler -EXTI0_IRQHandler -EXTI1_IRQHandler -EXTI2_IRQHandler -EXTI3_IRQHandler -EXTI4_IRQHandler -DMA1_Channel1_IRQHandler -DMA1_Channel2_IRQHandler -DMA1_Channel3_IRQHandler -DMA1_Channel4_IRQHandler -DMA1_Channel5_IRQHandler -DMA1_Channel6_IRQHandler -DMA1_Channel7_IRQHandler -ADC1_IRQHandler -EXTI9_5_IRQHandler -TIM1_BRK_TIM15_IRQHandler -TIM1_UP_TIM16_IRQHandler -TIM1_TRG_COM_TIM17_IRQHandler -TIM1_CC_IRQHandler -TIM2_IRQHandler -TIM3_IRQHandler -TIM4_IRQHandler -I2C1_EV_IRQHandler -I2C1_ER_IRQHandler -I2C2_EV_IRQHandler -I2C2_ER_IRQHandler -SPI1_IRQHandler -SPI2_IRQHandler -USART1_IRQHandler -USART2_IRQHandler -USART3_IRQHandler -EXTI15_10_IRQHandler -RTCAlarm_IRQHandler -CEC_IRQHandler -TIM6_DAC_IRQHandler -TIM7_IRQHandler - B . - - ENDP - - ALIGN - -;******************************************************************************* -; User Stack and Heap initialization -;******************************************************************************* - IF :DEF:__MICROLIB - - EXPORT __initial_sp - EXPORT __heap_base - EXPORT __heap_limit - - ELSE - - IMPORT __use_two_region_memory - EXPORT __user_initial_stackheap - -__user_initial_stackheap - - LDR R0, = Heap_Mem - LDR R1, =(Stack_Mem + Stack_Size) - LDR R2, = (Heap_Mem + Heap_Size) - LDR R3, = Stack_Mem - BX LR - - ALIGN - - ENDIF - - END - -;******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE***** diff --git a/bsp/stm32_radio/Libraries/CMSIS/CM3/DeviceSupport/ST/STM32F10x/startup/gcc_ride7/startup_stm32f10x_cl.s b/bsp/stm32_radio/Libraries/CMSIS/CM3/DeviceSupport/ST/STM32F10x/startup/gcc_ride7/startup_stm32f10x_cl.s deleted file mode 100644 index bb37cd6552..0000000000 --- a/bsp/stm32_radio/Libraries/CMSIS/CM3/DeviceSupport/ST/STM32F10x/startup/gcc_ride7/startup_stm32f10x_cl.s +++ /dev/null @@ -1,467 +0,0 @@ -/** - ****************************************************************************** - * @file startup_stm32f10x_cl.s - * @author MCD Application Team - * @version V3.2.0 - * @date 03/01/2010 - * @brief STM32F10x Connectivity line Devices vector table for RIDE7 toolchain. - * This module performs: - * - Set the initial SP - * - Set the initial PC == Reset_Handler, - * - Set the vector table entries with the exceptions ISR - * address. - * - Configure the clock system - * - Branches to main in the C library (which eventually - * calls main()). - * After Reset the Cortex-M3 processor is in Thread mode, - * priority is Privileged, and the Stack is set to Main. - ******************************************************************************* - * @copy - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2010 STMicroelectronics

- */ - - .syntax unified - .cpu cortex-m3 - .fpu softvfp - .thumb - -.global g_pfnVectors -.global Default_Handler - -/* start address for the initialization values of the .data section. -defined in linker script */ -.word _sidata -/* start address for the .data section. defined in linker script */ -.word _sdata -/* end address for the .data section. defined in linker script */ -.word _edata -/* start address for the .bss section. defined in linker script */ -.word _sbss -/* end address for the .bss section. defined in linker script */ -.word _ebss - -.equ BootRAM, 0xF1E0F85F -/** - * @brief This is the code that gets called when the processor first - * starts execution following a reset event. Only the absolutely - * necessary set is performed, after which the application - * supplied main() routine is called. - * @param None - * @retval : None -*/ - - .section .text.Reset_Handler - .weak Reset_Handler - .type Reset_Handler, %function -Reset_Handler: - -/* Copy the data segment initializers from flash to SRAM */ - movs r1, #0 - b LoopCopyDataInit - -CopyDataInit: - ldr r3, =_sidata - ldr r3, [r3, r1] - str r3, [r0, r1] - adds r1, r1, #4 - -LoopCopyDataInit: - ldr r0, =_sdata - ldr r3, =_edata - adds r2, r0, r1 - cmp r2, r3 - bcc CopyDataInit - ldr r2, =_sbss - b LoopFillZerobss - -/* Zero fill the bss segment. */ -FillZerobss: - movs r3, #0 - str r3, [r2], #4 - -LoopFillZerobss: - ldr r3, = _ebss - cmp r2, r3 - bcc FillZerobss -/* Call the clock system intitialization function.*/ - bl SystemInit -/* Call the application's entry point.*/ - bl main - bx lr -.size Reset_Handler, .-Reset_Handler - -/** - * @brief This is the code that gets called when the processor receives an - * unexpected interrupt. This simply enters an infinite loop, preserving - * the system state for examination by a debugger. - * @param None - * @retval None -*/ - .section .text.Default_Handler,"ax",%progbits -Default_Handler: -Infinite_Loop: - b Infinite_Loop - .size Default_Handler, .-Default_Handler - -/****************************************************************************** -* -* The minimal vector table for a Cortex M3. Note that the proper constructs -* must be placed on this to ensure that it ends up at physical address -* 0x0000.0000. -* -*******************************************************************************/ - .section .isr_vector,"a",%progbits - .type g_pfnVectors, %object - .size g_pfnVectors, .-g_pfnVectors - - -g_pfnVectors: - .word _estack - .word Reset_Handler - .word NMI_Handler - .word HardFault_Handler - .word MemManage_Handler - .word BusFault_Handler - .word UsageFault_Handler - .word 0 - .word 0 - .word 0 - .word 0 - .word SVC_Handler - .word DebugMon_Handler - .word 0 - .word PendSV_Handler - .word SysTick_Handler - .word WWDG_IRQHandler - .word PVD_IRQHandler - .word TAMPER_IRQHandler - .word RTC_IRQHandler - .word FLASH_IRQHandler - .word RCC_IRQHandler - .word EXTI0_IRQHandler - .word EXTI1_IRQHandler - .word EXTI2_IRQHandler - .word EXTI3_IRQHandler - .word EXTI4_IRQHandler - .word DMA1_Channel1_IRQHandler - .word DMA1_Channel2_IRQHandler - .word DMA1_Channel3_IRQHandler - .word DMA1_Channel4_IRQHandler - .word DMA1_Channel5_IRQHandler - .word DMA1_Channel6_IRQHandler - .word DMA1_Channel7_IRQHandler - .word ADC1_2_IRQHandler - .word CAN1_TX_IRQHandler - .word CAN1_RX0_IRQHandler - .word CAN1_RX1_IRQHandler - .word CAN1_SCE_IRQHandler - .word EXTI9_5_IRQHandler - .word TIM1_BRK_IRQHandler - .word TIM1_UP_IRQHandler - .word TIM1_TRG_COM_IRQHandler - .word TIM1_CC_IRQHandler - .word TIM2_IRQHandler - .word TIM3_IRQHandler - .word TIM4_IRQHandler - .word I2C1_EV_IRQHandler - .word I2C1_ER_IRQHandler - .word I2C2_EV_IRQHandler - .word I2C2_ER_IRQHandler - .word SPI1_IRQHandler - .word SPI2_IRQHandler - .word USART1_IRQHandler - .word USART2_IRQHandler - .word USART3_IRQHandler - .word EXTI15_10_IRQHandler - .word RTCAlarm_IRQHandler - .word OTG_FS_WKUP_IRQHandler - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word TIM5_IRQHandler - .word SPI3_IRQHandler - .word UART4_IRQHandler - .word UART5_IRQHandler - .word TIM6_IRQHandler - .word TIM7_IRQHandler - .word DMA2_Channel1_IRQHandler - .word DMA2_Channel2_IRQHandler - .word DMA2_Channel3_IRQHandler - .word DMA2_Channel4_IRQHandler - .word DMA2_Channel5_IRQHandler - .word ETH_IRQHandler - .word ETH_WKUP_IRQHandler - .word CAN2_TX_IRQHandler - .word CAN2_RX0_IRQHandler - .word CAN2_RX1_IRQHandler - .word CAN2_SCE_IRQHandler - .word OTG_FS_IRQHandler - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word BootRAM /* @0x1E0. This is for boot in RAM mode for - STM32F10x Connectivity line Devices. */ - -/******************************************************************************* -* -* Provide weak aliases for each Exception handler to the Default_Handler. -* As they are weak aliases, any function with the same name will override -* this definition. -* -*******************************************************************************/ - .weak NMI_Handler - .thumb_set NMI_Handler,Default_Handler - - .weak HardFault_Handler - .thumb_set HardFault_Handler,Default_Handler - - .weak MemManage_Handler - .thumb_set MemManage_Handler,Default_Handler - - .weak BusFault_Handler - .thumb_set BusFault_Handler,Default_Handler - - .weak UsageFault_Handler - .thumb_set UsageFault_Handler,Default_Handler - - .weak SVC_Handler - .thumb_set SVC_Handler,Default_Handler - - .weak DebugMon_Handler - .thumb_set DebugMon_Handler,Default_Handler - - .weak PendSV_Handler - .thumb_set PendSV_Handler,Default_Handler - - .weak SysTick_Handler - .thumb_set SysTick_Handler,Default_Handler - - .weak WWDG_IRQHandler - .thumb_set WWDG_IRQHandler,Default_Handler - - .weak PVD_IRQHandler - .thumb_set PVD_IRQHandler,Default_Handler - - .weak TAMPER_IRQHandler - .thumb_set TAMPER_IRQHandler,Default_Handler - - .weak RTC_IRQHandler - .thumb_set RTC_IRQHandler,Default_Handler - - .weak FLASH_IRQHandler - .thumb_set FLASH_IRQHandler,Default_Handler - - .weak RCC_IRQHandler - .thumb_set RCC_IRQHandler,Default_Handler - - .weak EXTI0_IRQHandler - .thumb_set EXTI0_IRQHandler,Default_Handler - - .weak EXTI1_IRQHandler - .thumb_set EXTI1_IRQHandler,Default_Handler - - .weak EXTI2_IRQHandler - .thumb_set EXTI2_IRQHandler,Default_Handler - - .weak EXTI3_IRQHandler - .thumb_set EXTI3_IRQHandler,Default_Handler - - .weak EXTI4_IRQHandler - .thumb_set EXTI4_IRQHandler,Default_Handler - - .weak DMA1_Channel1_IRQHandler - .thumb_set DMA1_Channel1_IRQHandler,Default_Handler - - .weak DMA1_Channel2_IRQHandler - .thumb_set DMA1_Channel2_IRQHandler,Default_Handler - - .weak DMA1_Channel3_IRQHandler - .thumb_set DMA1_Channel3_IRQHandler,Default_Handler - - .weak DMA1_Channel4_IRQHandler - .thumb_set DMA1_Channel4_IRQHandler,Default_Handler - - .weak DMA1_Channel5_IRQHandler - .thumb_set DMA1_Channel5_IRQHandler,Default_Handler - - .weak DMA1_Channel6_IRQHandler - .thumb_set DMA1_Channel6_IRQHandler,Default_Handler - - .weak DMA1_Channel7_IRQHandler - .thumb_set DMA1_Channel7_IRQHandler,Default_Handler - - .weak ADC1_2_IRQHandler - .thumb_set ADC1_2_IRQHandler,Default_Handler - - .weak CAN1_TX_IRQHandler - .thumb_set CAN1_TX_IRQHandler,Default_Handler - - .weak CAN1_RX0_IRQHandler - .thumb_set CAN1_RX0_IRQHandler,Default_Handler - - .weak CAN1_RX1_IRQHandler - .thumb_set CAN1_RX1_IRQHandler,Default_Handler - - .weak CAN1_SCE_IRQHandler - .thumb_set CAN1_SCE_IRQHandler,Default_Handler - - .weak EXTI9_5_IRQHandler - .thumb_set EXTI9_5_IRQHandler,Default_Handler - - .weak TIM1_BRK_IRQHandler - .thumb_set TIM1_BRK_IRQHandler,Default_Handler - - .weak TIM1_UP_IRQHandler - .thumb_set TIM1_UP_IRQHandler,Default_Handler - - .weak TIM1_TRG_COM_IRQHandler - .thumb_set TIM1_TRG_COM_IRQHandler,Default_Handler - - .weak TIM1_CC_IRQHandler - .thumb_set TIM1_CC_IRQHandler,Default_Handler - - .weak TIM2_IRQHandler - .thumb_set TIM2_IRQHandler,Default_Handler - - .weak TIM3_IRQHandler - .thumb_set TIM3_IRQHandler,Default_Handler - - .weak TIM4_IRQHandler - .thumb_set TIM4_IRQHandler,Default_Handler - - .weak I2C1_EV_IRQHandler - .thumb_set I2C1_EV_IRQHandler,Default_Handler - - .weak I2C1_ER_IRQHandler - .thumb_set I2C1_ER_IRQHandler,Default_Handler - - .weak I2C2_EV_IRQHandler - .thumb_set I2C2_EV_IRQHandler,Default_Handler - - .weak I2C2_ER_IRQHandler - .thumb_set I2C2_ER_IRQHandler,Default_Handler - - .weak SPI1_IRQHandler - .thumb_set SPI1_IRQHandler,Default_Handler - - .weak SPI2_IRQHandler - .thumb_set SPI2_IRQHandler,Default_Handler - - .weak USART1_IRQHandler - .thumb_set USART1_IRQHandler,Default_Handler - - .weak USART2_IRQHandler - .thumb_set USART2_IRQHandler,Default_Handler - - .weak USART3_IRQHandler - .thumb_set USART3_IRQHandler,Default_Handler - - .weak EXTI15_10_IRQHandler - .thumb_set EXTI15_10_IRQHandler,Default_Handler - - .weak RTCAlarm_IRQHandler - .thumb_set RTCAlarm_IRQHandler,Default_Handler - - .weak OTG_FS_WKUP_IRQHandler - .thumb_set OTG_FS_WKUP_IRQHandler,Default_Handler - - .weak TIM5_IRQHandler - .thumb_set TIM5_IRQHandler,Default_Handler - - .weak SPI3_IRQHandler - .thumb_set SPI3_IRQHandler,Default_Handler - - .weak UART4_IRQHandler - .thumb_set UART4_IRQHandler,Default_Handler - - .weak UART5_IRQHandler - .thumb_set UART5_IRQHandler,Default_Handler - - .weak TIM6_IRQHandler - .thumb_set TIM6_IRQHandler,Default_Handler - - .weak TIM7_IRQHandler - .thumb_set TIM7_IRQHandler,Default_Handler - - .weak DMA2_Channel1_IRQHandler - .thumb_set DMA2_Channel1_IRQHandler,Default_Handler - - .weak DMA2_Channel2_IRQHandler - .thumb_set DMA2_Channel2_IRQHandler,Default_Handler - - .weak DMA2_Channel3_IRQHandler - .thumb_set DMA2_Channel3_IRQHandler,Default_Handler - - .weak DMA2_Channel4_IRQHandler - .thumb_set DMA2_Channel4_IRQHandler,Default_Handler - - .weak DMA2_Channel5_IRQHandler - .thumb_set DMA2_Channel5_IRQHandler,Default_Handler - - .weak ETH_IRQHandler - .thumb_set ETH_IRQHandler,Default_Handler - - .weak ETH_WKUP_IRQHandler - .thumb_set ETH_WKUP_IRQHandler,Default_Handler - - .weak CAN2_TX_IRQHandler - .thumb_set CAN2_TX_IRQHandler,Default_Handler - - .weak CAN2_RX0_IRQHandler - .thumb_set CAN2_RX0_IRQHandler,Default_Handler - - .weak CAN2_RX1_IRQHandler - .thumb_set CAN2_RX1_IRQHandler,Default_Handler - - .weak CAN2_SCE_IRQHandler - .thumb_set CAN2_SCE_IRQHandler,Default_Handler - - .weak OTG_FS_IRQHandler - .thumb_set OTG_FS_IRQHandler ,Default_Handler - -/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/Libraries/CMSIS/CM3/DeviceSupport/ST/STM32F10x/startup/gcc_ride7/startup_stm32f10x_hd.s b/bsp/stm32_radio/Libraries/CMSIS/CM3/DeviceSupport/ST/STM32F10x/startup/gcc_ride7/startup_stm32f10x_hd.s deleted file mode 100644 index cce913b184..0000000000 --- a/bsp/stm32_radio/Libraries/CMSIS/CM3/DeviceSupport/ST/STM32F10x/startup/gcc_ride7/startup_stm32f10x_hd.s +++ /dev/null @@ -1,464 +0,0 @@ -/** - ****************************************************************************** - * @file startup_stm32f10x_hd.s - * @author MCD Application Team - * @version V3.2.0 - * @date 03/01/2010 - * @brief STM32F10x High Density Devices vector table for RIDE7 toolchain. - * This module performs: - * - Set the initial SP - * - Set the initial PC == Reset_Handler, - * - Set the vector table entries with the exceptions ISR address - * - Configure the clock system and the external SRAM mounted on - * STM3210E-EVAL board to be used as data memory (optional, - * to be enabled by user) - * - Branches to main in the C library (which eventually - * calls main()). - * After Reset the Cortex-M3 processor is in Thread mode, - * priority is Privileged, and the Stack is set to Main. - ******************************************************************************* - * @copy - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2010 STMicroelectronics

- */ - - .syntax unified - .cpu cortex-m3 - .fpu softvfp - .thumb - -.global g_pfnVectors -.global Default_Handler - -/* start address for the initialization values of the .data section. -defined in linker script */ -.word _sidata -/* start address for the .data section. defined in linker script */ -.word _sdata -/* end address for the .data section. defined in linker script */ -.word _edata -/* start address for the .bss section. defined in linker script */ -.word _sbss -/* end address for the .bss section. defined in linker script */ -.word _ebss -/* stack used for SystemInit_ExtMemCtl; always internal RAM used */ - -.equ BootRAM, 0xF1E0F85F -/** - * @brief This is the code that gets called when the processor first - * starts execution following a reset event. Only the absolutely - * necessary set is performed, after which the application - * supplied main() routine is called. - * @param None - * @retval : None -*/ - - .section .text.Reset_Handler - .weak Reset_Handler - .type Reset_Handler, %function -Reset_Handler: - -/* Copy the data segment initializers from flash to SRAM */ - movs r1, #0 - b LoopCopyDataInit - -CopyDataInit: - ldr r3, =_sidata - ldr r3, [r3, r1] - str r3, [r0, r1] - adds r1, r1, #4 - -LoopCopyDataInit: - ldr r0, =_sdata - ldr r3, =_edata - adds r2, r0, r1 - cmp r2, r3 - bcc CopyDataInit - ldr r2, =_sbss - b LoopFillZerobss -/* Zero fill the bss segment. */ -FillZerobss: - movs r3, #0 - str r3, [r2], #4 - -LoopFillZerobss: - ldr r3, = _ebss - cmp r2, r3 - bcc FillZerobss -/* Call the clock system intitialization function.*/ - bl SystemInit -/* Call the application's entry point.*/ - bl main - bx lr -.size Reset_Handler, .-Reset_Handler - -/** - * @brief This is the code that gets called when the processor receives an - * unexpected interrupt. This simply enters an infinite loop, preserving - * the system state for examination by a debugger. - * @param None - * @retval None -*/ - .section .text.Default_Handler,"ax",%progbits -Default_Handler: -Infinite_Loop: - b Infinite_Loop - .size Default_Handler, .-Default_Handler -/****************************************************************************** -* -* The minimal vector table for a Cortex M3. Note that the proper constructs -* must be placed on this to ensure that it ends up at physical address -* 0x0000.0000. -* -*******************************************************************************/ - .section .isr_vector,"a",%progbits - .type g_pfnVectors, %object - .size g_pfnVectors, .-g_pfnVectors - - -g_pfnVectors: - .word _estack - .word Reset_Handler - .word NMI_Handler - .word HardFault_Handler - .word MemManage_Handler - .word BusFault_Handler - .word UsageFault_Handler - .word 0 - .word 0 - .word 0 - .word 0 - .word SVC_Handler - .word DebugMon_Handler - .word 0 - .word PendSV_Handler - .word SysTick_Handler - .word WWDG_IRQHandler - .word PVD_IRQHandler - .word TAMPER_IRQHandler - .word RTC_IRQHandler - .word FLASH_IRQHandler - .word RCC_IRQHandler - .word EXTI0_IRQHandler - .word EXTI1_IRQHandler - .word EXTI2_IRQHandler - .word EXTI3_IRQHandler - .word EXTI4_IRQHandler - .word DMA1_Channel1_IRQHandler - .word DMA1_Channel2_IRQHandler - .word DMA1_Channel3_IRQHandler - .word DMA1_Channel4_IRQHandler - .word DMA1_Channel5_IRQHandler - .word DMA1_Channel6_IRQHandler - .word DMA1_Channel7_IRQHandler - .word ADC1_2_IRQHandler - .word USB_HP_CAN1_TX_IRQHandler - .word USB_LP_CAN1_RX0_IRQHandler - .word CAN1_RX1_IRQHandler - .word CAN1_SCE_IRQHandler - .word EXTI9_5_IRQHandler - .word TIM1_BRK_IRQHandler - .word TIM1_UP_IRQHandler - .word TIM1_TRG_COM_IRQHandler - .word TIM1_CC_IRQHandler - .word TIM2_IRQHandler - .word TIM3_IRQHandler - .word TIM4_IRQHandler - .word I2C1_EV_IRQHandler - .word I2C1_ER_IRQHandler - .word I2C2_EV_IRQHandler - .word I2C2_ER_IRQHandler - .word SPI1_IRQHandler - .word SPI2_IRQHandler - .word USART1_IRQHandler - .word USART2_IRQHandler - .word USART3_IRQHandler - .word EXTI15_10_IRQHandler - .word RTCAlarm_IRQHandler - .word USBWakeUp_IRQHandler - .word TIM8_BRK_IRQHandler - .word TIM8_UP_IRQHandler - .word TIM8_TRG_COM_IRQHandler - .word TIM8_CC_IRQHandler - .word ADC3_IRQHandler - .word FSMC_IRQHandler - .word SDIO_IRQHandler - .word TIM5_IRQHandler - .word SPI3_IRQHandler - .word UART4_IRQHandler - .word UART5_IRQHandler - .word TIM6_IRQHandler - .word TIM7_IRQHandler - .word DMA2_Channel1_IRQHandler - .word DMA2_Channel2_IRQHandler - .word DMA2_Channel3_IRQHandler - .word DMA2_Channel4_5_IRQHandler - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word BootRAM /* @0x1E0. This is for boot in RAM mode for - STM32F10x High Density devices. */ -/******************************************************************************* -* -* Provide weak aliases for each Exception handler to the Default_Handler. -* As they are weak aliases, any function with the same name will override -* this definition. -* -*******************************************************************************/ - - .weak NMI_Handler - .thumb_set NMI_Handler,Default_Handler - - .weak HardFault_Handler - .thumb_set HardFault_Handler,Default_Handler - - .weak MemManage_Handler - .thumb_set MemManage_Handler,Default_Handler - - .weak BusFault_Handler - .thumb_set BusFault_Handler,Default_Handler - - .weak UsageFault_Handler - .thumb_set UsageFault_Handler,Default_Handler - - .weak SVC_Handler - .thumb_set SVC_Handler,Default_Handler - - .weak DebugMon_Handler - .thumb_set DebugMon_Handler,Default_Handler - - .weak PendSV_Handler - .thumb_set PendSV_Handler,Default_Handler - - .weak SysTick_Handler - .thumb_set SysTick_Handler,Default_Handler - - .weak WWDG_IRQHandler - .thumb_set WWDG_IRQHandler,Default_Handler - - .weak PVD_IRQHandler - .thumb_set PVD_IRQHandler,Default_Handler - - .weak TAMPER_IRQHandler - .thumb_set TAMPER_IRQHandler,Default_Handler - - .weak RTC_IRQHandler - .thumb_set RTC_IRQHandler,Default_Handler - - .weak FLASH_IRQHandler - .thumb_set FLASH_IRQHandler,Default_Handler - - .weak RCC_IRQHandler - .thumb_set RCC_IRQHandler,Default_Handler - - .weak EXTI0_IRQHandler - .thumb_set EXTI0_IRQHandler,Default_Handler - - .weak EXTI1_IRQHandler - .thumb_set EXTI1_IRQHandler,Default_Handler - - .weak EXTI2_IRQHandler - .thumb_set EXTI2_IRQHandler,Default_Handler - - .weak EXTI3_IRQHandler - .thumb_set EXTI3_IRQHandler,Default_Handler - - .weak EXTI4_IRQHandler - .thumb_set EXTI4_IRQHandler,Default_Handler - - .weak DMA1_Channel1_IRQHandler - .thumb_set DMA1_Channel1_IRQHandler,Default_Handler - - .weak DMA1_Channel2_IRQHandler - .thumb_set DMA1_Channel2_IRQHandler,Default_Handler - - .weak DMA1_Channel3_IRQHandler - .thumb_set DMA1_Channel3_IRQHandler,Default_Handler - - .weak DMA1_Channel4_IRQHandler - .thumb_set DMA1_Channel4_IRQHandler,Default_Handler - - .weak DMA1_Channel5_IRQHandler - .thumb_set DMA1_Channel5_IRQHandler,Default_Handler - - .weak DMA1_Channel6_IRQHandler - .thumb_set DMA1_Channel6_IRQHandler,Default_Handler - - .weak DMA1_Channel7_IRQHandler - .thumb_set DMA1_Channel7_IRQHandler,Default_Handler - - .weak ADC1_2_IRQHandler - .thumb_set ADC1_2_IRQHandler,Default_Handler - - .weak USB_HP_CAN1_TX_IRQHandler - .thumb_set USB_HP_CAN1_TX_IRQHandler,Default_Handler - - .weak USB_LP_CAN1_RX0_IRQHandler - .thumb_set USB_LP_CAN1_RX0_IRQHandler,Default_Handler - - .weak CAN1_RX1_IRQHandler - .thumb_set CAN1_RX1_IRQHandler,Default_Handler - - .weak CAN1_SCE_IRQHandler - .thumb_set CAN1_SCE_IRQHandler,Default_Handler - - .weak EXTI9_5_IRQHandler - .thumb_set EXTI9_5_IRQHandler,Default_Handler - - .weak TIM1_BRK_IRQHandler - .thumb_set TIM1_BRK_IRQHandler,Default_Handler - - .weak TIM1_UP_IRQHandler - .thumb_set TIM1_UP_IRQHandler,Default_Handler - - .weak TIM1_TRG_COM_IRQHandler - .thumb_set TIM1_TRG_COM_IRQHandler,Default_Handler - - .weak TIM1_CC_IRQHandler - .thumb_set TIM1_CC_IRQHandler,Default_Handler - - .weak TIM2_IRQHandler - .thumb_set TIM2_IRQHandler,Default_Handler - - .weak TIM3_IRQHandler - .thumb_set TIM3_IRQHandler,Default_Handler - - .weak TIM4_IRQHandler - .thumb_set TIM4_IRQHandler,Default_Handler - - .weak I2C1_EV_IRQHandler - .thumb_set I2C1_EV_IRQHandler,Default_Handler - - .weak I2C1_ER_IRQHandler - .thumb_set I2C1_ER_IRQHandler,Default_Handler - - .weak I2C2_EV_IRQHandler - .thumb_set I2C2_EV_IRQHandler,Default_Handler - - .weak I2C2_ER_IRQHandler - .thumb_set I2C2_ER_IRQHandler,Default_Handler - - .weak SPI1_IRQHandler - .thumb_set SPI1_IRQHandler,Default_Handler - - .weak SPI2_IRQHandler - .thumb_set SPI2_IRQHandler,Default_Handler - - .weak USART1_IRQHandler - .thumb_set USART1_IRQHandler,Default_Handler - - .weak USART2_IRQHandler - .thumb_set USART2_IRQHandler,Default_Handler - - .weak USART3_IRQHandler - .thumb_set USART3_IRQHandler,Default_Handler - - .weak EXTI15_10_IRQHandler - .thumb_set EXTI15_10_IRQHandler,Default_Handler - - .weak RTCAlarm_IRQHandler - .thumb_set RTCAlarm_IRQHandler,Default_Handler - - .weak USBWakeUp_IRQHandler - .thumb_set USBWakeUp_IRQHandler,Default_Handler - - .weak TIM8_BRK_IRQHandler - .thumb_set TIM8_BRK_IRQHandler,Default_Handler - - .weak TIM8_UP_IRQHandler - .thumb_set TIM8_UP_IRQHandler,Default_Handler - - .weak TIM8_TRG_COM_IRQHandler - .thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler - - .weak TIM8_CC_IRQHandler - .thumb_set TIM8_CC_IRQHandler,Default_Handler - - .weak ADC3_IRQHandler - .thumb_set ADC3_IRQHandler,Default_Handler - - .weak FSMC_IRQHandler - .thumb_set FSMC_IRQHandler,Default_Handler - - .weak SDIO_IRQHandler - .thumb_set SDIO_IRQHandler,Default_Handler - - .weak TIM5_IRQHandler - .thumb_set TIM5_IRQHandler,Default_Handler - - .weak SPI3_IRQHandler - .thumb_set SPI3_IRQHandler,Default_Handler - - .weak UART4_IRQHandler - .thumb_set UART4_IRQHandler,Default_Handler - - .weak UART5_IRQHandler - .thumb_set UART5_IRQHandler,Default_Handler - - .weak TIM6_IRQHandler - .thumb_set TIM6_IRQHandler,Default_Handler - - .weak TIM7_IRQHandler - .thumb_set TIM7_IRQHandler,Default_Handler - - .weak DMA2_Channel1_IRQHandler - .thumb_set DMA2_Channel1_IRQHandler,Default_Handler - - .weak DMA2_Channel2_IRQHandler - .thumb_set DMA2_Channel2_IRQHandler,Default_Handler - - .weak DMA2_Channel3_IRQHandler - .thumb_set DMA2_Channel3_IRQHandler,Default_Handler - - .weak DMA2_Channel4_5_IRQHandler - .thumb_set DMA2_Channel4_5_IRQHandler,Default_Handler - -/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/Libraries/CMSIS/CM3/DeviceSupport/ST/STM32F10x/startup/gcc_ride7/startup_stm32f10x_ld.s b/bsp/stm32_radio/Libraries/CMSIS/CM3/DeviceSupport/ST/STM32F10x/startup/gcc_ride7/startup_stm32f10x_ld.s deleted file mode 100644 index ed7917ed18..0000000000 --- a/bsp/stm32_radio/Libraries/CMSIS/CM3/DeviceSupport/ST/STM32F10x/startup/gcc_ride7/startup_stm32f10x_ld.s +++ /dev/null @@ -1,342 +0,0 @@ -/** - ****************************************************************************** - * @file startup_stm32f10x_ld.s - * @author MCD Application Team - * @version V3.2.0 - * @date 03/01/2010 - * @brief STM32F10x Low Density Devices vector table for RIDE7 toolchain. - * This module performs: - * - Set the initial SP - * - Set the initial PC == Reset_Handler, - * - Set the vector table entries with the exceptions ISR address - * - Configure the clock system - * - Branches to main in the C library (which eventually - * calls main()). - * After Reset the Cortex-M3 processor is in Thread mode, - * priority is Privileged, and the Stack is set to Main. - ******************************************************************************* - * @copy - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2010 STMicroelectronics

- */ - - .syntax unified - .cpu cortex-m3 - .fpu softvfp - .thumb - -.global g_pfnVectors -.global Default_Handler - -/* start address for the initialization values of the .data section. -defined in linker script */ -.word _sidata -/* start address for the .data section. defined in linker script */ -.word _sdata -/* end address for the .data section. defined in linker script */ -.word _edata -/* start address for the .bss section. defined in linker script */ -.word _sbss -/* end address for the .bss section. defined in linker script */ -.word _ebss - -.equ BootRAM, 0xF108F85F -/** - * @brief This is the code that gets called when the processor first - * starts execution following a reset event. Only the absolutely - * necessary set is performed, after which the application - * supplied main() routine is called. - * @param None - * @retval : None -*/ - - .section .text.Reset_Handler - .weak Reset_Handler - .type Reset_Handler, %function -Reset_Handler: - -/* Copy the data segment initializers from flash to SRAM */ - movs r1, #0 - b LoopCopyDataInit - -CopyDataInit: - ldr r3, =_sidata - ldr r3, [r3, r1] - str r3, [r0, r1] - adds r1, r1, #4 - -LoopCopyDataInit: - ldr r0, =_sdata - ldr r3, =_edata - adds r2, r0, r1 - cmp r2, r3 - bcc CopyDataInit - ldr r2, =_sbss - b LoopFillZerobss -/* Zero fill the bss segment. */ -FillZerobss: - movs r3, #0 - str r3, [r2], #4 - -LoopFillZerobss: - ldr r3, = _ebss - cmp r2, r3 - bcc FillZerobss -/* Call the clock system intitialization function.*/ - bl SystemInit -/* Call the application's entry point.*/ - bl main - bx lr -.size Reset_Handler, .-Reset_Handler - -/** - * @brief This is the code that gets called when the processor receives an - * unexpected interrupt. This simply enters an infinite loop, preserving - * the system state for examination by a debugger. - * @param None - * @retval None -*/ - .section .text.Default_Handler,"ax",%progbits -Default_Handler: -Infinite_Loop: - b Infinite_Loop - .size Default_Handler, .-Default_Handler -/****************************************************************************** -* -* The minimal vector table for a Cortex M3. Note that the proper constructs -* must be placed on this to ensure that it ends up at physical address -* 0x0000.0000. -* -******************************************************************************/ - .section .isr_vector,"a",%progbits - .type g_pfnVectors, %object - .size g_pfnVectors, .-g_pfnVectors - - -g_pfnVectors: - .word _estack - .word Reset_Handler - .word NMI_Handler - .word HardFault_Handler - .word MemManage_Handler - .word BusFault_Handler - .word UsageFault_Handler - .word 0 - .word 0 - .word 0 - .word 0 - .word SVC_Handler - .word DebugMon_Handler - .word 0 - .word PendSV_Handler - .word SysTick_Handler - .word WWDG_IRQHandler - .word PVD_IRQHandler - .word TAMPER_IRQHandler - .word RTC_IRQHandler - .word FLASH_IRQHandler - .word RCC_IRQHandler - .word EXTI0_IRQHandler - .word EXTI1_IRQHandler - .word EXTI2_IRQHandler - .word EXTI3_IRQHandler - .word EXTI4_IRQHandler - .word DMA1_Channel1_IRQHandler - .word DMA1_Channel2_IRQHandler - .word DMA1_Channel3_IRQHandler - .word DMA1_Channel4_IRQHandler - .word DMA1_Channel5_IRQHandler - .word DMA1_Channel6_IRQHandler - .word DMA1_Channel7_IRQHandler - .word ADC1_2_IRQHandler - .word USB_HP_CAN1_TX_IRQHandler - .word USB_LP_CAN1_RX0_IRQHandler - .word CAN1_RX1_IRQHandler - .word CAN1_SCE_IRQHandler - .word EXTI9_5_IRQHandler - .word TIM1_BRK_IRQHandler - .word TIM1_UP_IRQHandler - .word TIM1_TRG_COM_IRQHandler - .word TIM1_CC_IRQHandler - .word TIM2_IRQHandler - .word TIM3_IRQHandler - .word 0 - .word I2C1_EV_IRQHandler - .word I2C1_ER_IRQHandler - .word 0 - .word 0 - .word SPI1_IRQHandler - .word 0 - .word USART1_IRQHandler - .word USART2_IRQHandler - .word 0 - .word EXTI15_10_IRQHandler - .word RTCAlarm_IRQHandler - .word USBWakeUp_IRQHandler - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word BootRAM /* @0x108. This is for boot in RAM mode for - STM32F10x Low Density devices.*/ - -/******************************************************************************* -* -* Provide weak aliases for each Exception handler to the Default_Handler. -* As they are weak aliases, any function with the same name will override -* this definition. -* -*******************************************************************************/ - - .weak NMI_Handler - .thumb_set NMI_Handler,Default_Handler - - .weak HardFault_Handler - .thumb_set HardFault_Handler,Default_Handler - - .weak MemManage_Handler - .thumb_set MemManage_Handler,Default_Handler - - .weak BusFault_Handler - .thumb_set BusFault_Handler,Default_Handler - - .weak UsageFault_Handler - .thumb_set UsageFault_Handler,Default_Handler - - .weak SVC_Handler - .thumb_set SVC_Handler,Default_Handler - - .weak DebugMon_Handler - .thumb_set DebugMon_Handler,Default_Handler - - .weak PendSV_Handler - .thumb_set PendSV_Handler,Default_Handler - - .weak SysTick_Handler - .thumb_set SysTick_Handler,Default_Handler - - .weak WWDG_IRQHandler - .thumb_set WWDG_IRQHandler,Default_Handler - - .weak PVD_IRQHandler - .thumb_set PVD_IRQHandler,Default_Handler - - .weak TAMPER_IRQHandler - .thumb_set TAMPER_IRQHandler,Default_Handler - - .weak RTC_IRQHandler - .thumb_set RTC_IRQHandler,Default_Handler - - .weak FLASH_IRQHandler - .thumb_set FLASH_IRQHandler,Default_Handler - - .weak RCC_IRQHandler - .thumb_set RCC_IRQHandler,Default_Handler - - .weak EXTI0_IRQHandler - .thumb_set EXTI0_IRQHandler,Default_Handler - - .weak EXTI1_IRQHandler - .thumb_set EXTI1_IRQHandler,Default_Handler - - .weak EXTI2_IRQHandler - .thumb_set EXTI2_IRQHandler,Default_Handler - - .weak EXTI3_IRQHandler - .thumb_set EXTI3_IRQHandler,Default_Handler - - .weak EXTI4_IRQHandler - .thumb_set EXTI4_IRQHandler,Default_Handler - - .weak DMA1_Channel1_IRQHandler - .thumb_set DMA1_Channel1_IRQHandler,Default_Handler - - .weak DMA1_Channel2_IRQHandler - .thumb_set DMA1_Channel2_IRQHandler,Default_Handler - - .weak DMA1_Channel3_IRQHandler - .thumb_set DMA1_Channel3_IRQHandler,Default_Handler - - .weak DMA1_Channel4_IRQHandler - .thumb_set DMA1_Channel4_IRQHandler,Default_Handler - - .weak DMA1_Channel5_IRQHandler - .thumb_set DMA1_Channel5_IRQHandler,Default_Handler - - .weak DMA1_Channel6_IRQHandler - .thumb_set DMA1_Channel6_IRQHandler,Default_Handler - - .weak DMA1_Channel7_IRQHandler - .thumb_set DMA1_Channel7_IRQHandler,Default_Handler - - .weak ADC1_2_IRQHandler - .thumb_set ADC1_2_IRQHandler,Default_Handler - - .weak USB_HP_CAN1_TX_IRQHandler - .thumb_set USB_HP_CAN1_TX_IRQHandler,Default_Handler - - .weak USB_LP_CAN1_RX0_IRQHandler - .thumb_set USB_LP_CAN1_RX0_IRQHandler,Default_Handler - - .weak CAN1_RX1_IRQHandler - .thumb_set CAN1_RX1_IRQHandler,Default_Handler - - .weak CAN1_SCE_IRQHandler - .thumb_set CAN1_SCE_IRQHandler,Default_Handler - - .weak EXTI9_5_IRQHandler - .thumb_set EXTI9_5_IRQHandler,Default_Handler - - .weak TIM1_BRK_IRQHandler - .thumb_set TIM1_BRK_IRQHandler,Default_Handler - - .weak TIM1_UP_IRQHandler - .thumb_set TIM1_UP_IRQHandler,Default_Handler - - .weak TIM1_TRG_COM_IRQHandler - .thumb_set TIM1_TRG_COM_IRQHandler,Default_Handler - - .weak TIM1_CC_IRQHandler - .thumb_set TIM1_CC_IRQHandler,Default_Handler - - .weak TIM2_IRQHandler - .thumb_set TIM2_IRQHandler,Default_Handler - - .weak TIM3_IRQHandler - .thumb_set TIM3_IRQHandler,Default_Handler - - .weak I2C1_EV_IRQHandler - .thumb_set I2C1_EV_IRQHandler,Default_Handler - - .weak I2C1_ER_IRQHandler - .thumb_set I2C1_ER_IRQHandler,Default_Handler - - .weak SPI1_IRQHandler - .thumb_set SPI1_IRQHandler,Default_Handler - - .weak USART1_IRQHandler - .thumb_set USART1_IRQHandler,Default_Handler - - .weak USART2_IRQHandler - .thumb_set USART2_IRQHandler,Default_Handler - - .weak EXTI15_10_IRQHandler - .thumb_set EXTI15_10_IRQHandler,Default_Handler - - .weak RTCAlarm_IRQHandler - .thumb_set RTCAlarm_IRQHandler,Default_Handler - - .weak USBWakeUp_IRQHandler - .thumb_set USBWakeUp_IRQHandler,Default_Handler - -/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/Libraries/CMSIS/CM3/DeviceSupport/ST/STM32F10x/startup/gcc_ride7/startup_stm32f10x_ld_vl.s b/bsp/stm32_radio/Libraries/CMSIS/CM3/DeviceSupport/ST/STM32F10x/startup/gcc_ride7/startup_stm32f10x_ld_vl.s deleted file mode 100644 index 0e80bde51a..0000000000 --- a/bsp/stm32_radio/Libraries/CMSIS/CM3/DeviceSupport/ST/STM32F10x/startup/gcc_ride7/startup_stm32f10x_ld_vl.s +++ /dev/null @@ -1,382 +0,0 @@ -/** - ****************************************************************************** - * @file startup_stm32f10x_ld_vl.s - * @author MCD Application Team - * @version V3.2.0 - * @date 03/01/2010 - * @brief STM32F10x Low Density Value Line Devices vector table for RIDE7 - * toolchain. - * This module performs: - * - Set the initial SP - * - Set the initial PC == Reset_Handler, - * - Set the vector table entries with the exceptions ISR address - * - Configure the clock system - * - Branches to main in the C library (which eventually - * calls main()). - * After Reset the Cortex-M3 processor is in Thread mode, - * priority is Privileged, and the Stack is set to Main. - ******************************************************************************* - * @copy - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2010 STMicroelectronics

- */ - - .syntax unified - .cpu cortex-m3 - .fpu softvfp - .thumb - -.global g_pfnVectors -.global Default_Handler - -/* start address for the initialization values of the .data section. -defined in linker script */ -.word _sidata -/* start address for the .data section. defined in linker script */ -.word _sdata -/* end address for the .data section. defined in linker script */ -.word _edata -/* start address for the .bss section. defined in linker script */ -.word _sbss -/* end address for the .bss section. defined in linker script */ -.word _ebss - -.equ BootRAM, 0xF108F85F -/** - * @brief This is the code that gets called when the processor first - * starts execution following a reset event. Only the absolutely - * necessary set is performed, after which the application - * supplied main() routine is called. - * @param None - * @retval None -*/ - - .section .text.Reset_Handler - .weak Reset_Handler - .type Reset_Handler, %function -Reset_Handler: - -/* Copy the data segment initializers from flash to SRAM */ - movs r1, #0 - b LoopCopyDataInit - -CopyDataInit: - ldr r3, =_sidata - ldr r3, [r3, r1] - str r3, [r0, r1] - adds r1, r1, #4 - -LoopCopyDataInit: - ldr r0, =_sdata - ldr r3, =_edata - adds r2, r0, r1 - cmp r2, r3 - bcc CopyDataInit - ldr r2, =_sbss - b LoopFillZerobss -/* Zero fill the bss segment. */ -FillZerobss: - movs r3, #0 - str r3, [r2], #4 - -LoopFillZerobss: - ldr r3, = _ebss - cmp r2, r3 - bcc FillZerobss -/* Call the clock system intitialization function.*/ - bl SystemInit -/* Call the application's entry point.*/ - bl main - bx lr -.size Reset_Handler, .-Reset_Handler - -/** - * @brief This is the code that gets called when the processor receives an - * unexpected interrupt. This simply enters an infinite loop, preserving - * the system state for examination by a debugger. - * @param None - * @retval None -*/ - .section .text.Default_Handler,"ax",%progbits -Default_Handler: -Infinite_Loop: - b Infinite_Loop - .size Default_Handler, .-Default_Handler -/****************************************************************************** -* The minimal vector table for a Cortex M3. Note that the proper constructs -* must be placed on this to ensure that it ends up at physical address -* 0x0000.0000. -* -******************************************************************************/ - .section .isr_vector,"a",%progbits - .type g_pfnVectors, %object - .size g_pfnVectors, .-g_pfnVectors - -g_pfnVectors: - .word _estack - .word Reset_Handler - .word NMI_Handler - .word HardFault_Handler - .word MemManage_Handler - .word BusFault_Handler - .word UsageFault_Handler - .word 0 - .word 0 - .word 0 - .word 0 - .word SVC_Handler - .word DebugMon_Handler - .word 0 - .word PendSV_Handler - .word SysTick_Handler - .word WWDG_IRQHandler - .word PVD_IRQHandler - .word TAMPER_IRQHandler - .word RTC_IRQHandler - .word FLASH_IRQHandler - .word RCC_IRQHandler - .word EXTI0_IRQHandler - .word EXTI1_IRQHandler - .word EXTI2_IRQHandler - .word EXTI3_IRQHandler - .word EXTI4_IRQHandler - .word DMA1_Channel1_IRQHandler - .word DMA1_Channel2_IRQHandler - .word DMA1_Channel3_IRQHandler - .word DMA1_Channel4_IRQHandler - .word DMA1_Channel5_IRQHandler - .word DMA1_Channel6_IRQHandler - .word DMA1_Channel7_IRQHandler - .word ADC1_IRQHandler - .word 0 - .word 0 - .word 0 - .word 0 - .word EXTI9_5_IRQHandler - .word TIM1_BRK_TIM15_IRQHandler - .word TIM1_UP_TIM16_IRQHandler - .word TIM1_TRG_COM_TIM17_IRQHandler - .word TIM1_CC_IRQHandler - .word TIM2_IRQHandler - .word TIM3_IRQHandler - .word 0 - .word I2C1_EV_IRQHandler - .word I2C1_ER_IRQHandler - .word 0 - .word 0 - .word SPI1_IRQHandler - .word 0 - .word USART1_IRQHandler - .word USART2_IRQHandler - .word 0 - .word EXTI15_10_IRQHandler - .word RTCAlarm_IRQHandler - .word CEC_IRQHandler - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word TIM6_DAC_IRQHandler - .word TIM7_IRQHandler - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word BootRAM /* @0x01CC. This is for boot in RAM mode for - STM32F10x Low Density Value Line devices. */ - -/******************************************************************************* -* Provide weak aliases for each Exception handler to the Default_Handler. -* As they are weak aliases, any function with the same name will override -* this definition. -*******************************************************************************/ - - .weak NMI_Handler - .thumb_set NMI_Handler,Default_Handler - - .weak HardFault_Handler - .thumb_set HardFault_Handler,Default_Handler - - .weak MemManage_Handler - .thumb_set MemManage_Handler,Default_Handler - - .weak BusFault_Handler - .thumb_set BusFault_Handler,Default_Handler - - .weak UsageFault_Handler - .thumb_set UsageFault_Handler,Default_Handler - - .weak SVC_Handler - .thumb_set SVC_Handler,Default_Handler - - .weak DebugMon_Handler - .thumb_set DebugMon_Handler,Default_Handler - - .weak PendSV_Handler - .thumb_set PendSV_Handler,Default_Handler - - .weak SysTick_Handler - .thumb_set SysTick_Handler,Default_Handler - - .weak WWDG_IRQHandler - .thumb_set WWDG_IRQHandler,Default_Handler - - .weak PVD_IRQHandler - .thumb_set PVD_IRQHandler,Default_Handler - - .weak TAMPER_IRQHandler - .thumb_set TAMPER_IRQHandler,Default_Handler - - .weak RTC_IRQHandler - .thumb_set RTC_IRQHandler,Default_Handler - - .weak FLASH_IRQHandler - .thumb_set FLASH_IRQHandler,Default_Handler - - .weak RCC_IRQHandler - .thumb_set RCC_IRQHandler,Default_Handler - - .weak EXTI0_IRQHandler - .thumb_set EXTI0_IRQHandler,Default_Handler - - .weak EXTI1_IRQHandler - .thumb_set EXTI1_IRQHandler,Default_Handler - - .weak EXTI2_IRQHandler - .thumb_set EXTI2_IRQHandler,Default_Handler - - .weak EXTI3_IRQHandler - .thumb_set EXTI3_IRQHandler,Default_Handler - - .weak EXTI4_IRQHandler - .thumb_set EXTI4_IRQHandler,Default_Handler - - .weak DMA1_Channel1_IRQHandler - .thumb_set DMA1_Channel1_IRQHandler,Default_Handler - - .weak DMA1_Channel2_IRQHandler - .thumb_set DMA1_Channel2_IRQHandler,Default_Handler - - .weak DMA1_Channel3_IRQHandler - .thumb_set DMA1_Channel3_IRQHandler,Default_Handler - - .weak DMA1_Channel4_IRQHandler - .thumb_set DMA1_Channel4_IRQHandler,Default_Handler - - .weak DMA1_Channel5_IRQHandler - .thumb_set DMA1_Channel5_IRQHandler,Default_Handler - - .weak DMA1_Channel6_IRQHandler - .thumb_set DMA1_Channel6_IRQHandler,Default_Handler - - .weak DMA1_Channel7_IRQHandler - .thumb_set DMA1_Channel7_IRQHandler,Default_Handler - - .weak ADC1_IRQHandler - .thumb_set ADC1_IRQHandler,Default_Handler - - .weak EXTI9_5_IRQHandler - .thumb_set EXTI9_5_IRQHandler,Default_Handler - - .weak TIM1_BRK_TIM15_IRQHandler - .thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler - - .weak TIM1_UP_TIM16_IRQHandler - .thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler - - .weak TIM1_TRG_COM_TIM17_IRQHandler - .thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler - - .weak TIM1_CC_IRQHandler - .thumb_set TIM1_CC_IRQHandler,Default_Handler - - .weak TIM2_IRQHandler - .thumb_set TIM2_IRQHandler,Default_Handler - - .weak TIM3_IRQHandler - .thumb_set TIM3_IRQHandler,Default_Handler - - .weak I2C1_EV_IRQHandler - .thumb_set I2C1_EV_IRQHandler,Default_Handler - - .weak I2C1_ER_IRQHandler - .thumb_set I2C1_ER_IRQHandler,Default_Handler - - .weak SPI1_IRQHandler - .thumb_set SPI1_IRQHandler,Default_Handler - - .weak USART1_IRQHandler - .thumb_set USART1_IRQHandler,Default_Handler - - .weak USART2_IRQHandler - .thumb_set USART2_IRQHandler,Default_Handler - - .weak EXTI15_10_IRQHandler - .thumb_set EXTI15_10_IRQHandler,Default_Handler - - .weak RTCAlarm_IRQHandler - .thumb_set RTCAlarm_IRQHandler,Default_Handler - - .weak CEC_IRQHandler - .thumb_set CEC_IRQHandler,Default_Handler - - .weak TIM6_DAC_IRQHandler - .thumb_set TIM6_DAC_IRQHandler,Default_Handler - - .weak TIM7_IRQHandler - .thumb_set TIM7_IRQHandler,Default_Handler - -/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/Libraries/CMSIS/CM3/DeviceSupport/ST/STM32F10x/startup/gcc_ride7/startup_stm32f10x_md.s b/bsp/stm32_radio/Libraries/CMSIS/CM3/DeviceSupport/ST/STM32F10x/startup/gcc_ride7/startup_stm32f10x_md.s deleted file mode 100644 index 4d7d37aa28..0000000000 --- a/bsp/stm32_radio/Libraries/CMSIS/CM3/DeviceSupport/ST/STM32F10x/startup/gcc_ride7/startup_stm32f10x_md.s +++ /dev/null @@ -1,357 +0,0 @@ -/** - ****************************************************************************** - * @file startup_stm32f10x_md.s - * @author MCD Application Team - * @version V3.2.0 - * @date 03/01/2010 - * @brief STM32F10x Medium Density Devices vector table for RIDE7 toolchain. - * This module performs: - * - Set the initial SP - * - Set the initial PC == Reset_Handler, - * - Set the vector table entries with the exceptions ISR address - * - Configure the clock system - * - Branches to main in the C library (which eventually - * calls main()). - * After Reset the Cortex-M3 processor is in Thread mode, - * priority is Privileged, and the Stack is set to Main. - ******************************************************************************* - * @copy - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2010 STMicroelectronics

- */ - - .syntax unified - .cpu cortex-m3 - .fpu softvfp - .thumb - -.global g_pfnVectors -.global Default_Handler - -/* start address for the initialization values of the .data section. -defined in linker script */ -.word _sidata -/* start address for the .data section. defined in linker script */ -.word _sdata -/* end address for the .data section. defined in linker script */ -.word _edata -/* start address for the .bss section. defined in linker script */ -.word _sbss -/* end address for the .bss section. defined in linker script */ -.word _ebss - -.equ BootRAM, 0xF108F85F -/** - * @brief This is the code that gets called when the processor first - * starts execution following a reset event. Only the absolutely - * necessary set is performed, after which the application - * supplied main() routine is called. - * @param None - * @retval : None -*/ - - .section .text.Reset_Handler - .weak Reset_Handler - .type Reset_Handler, %function -Reset_Handler: - -/* Copy the data segment initializers from flash to SRAM */ - movs r1, #0 - b LoopCopyDataInit - -CopyDataInit: - ldr r3, =_sidata - ldr r3, [r3, r1] - str r3, [r0, r1] - adds r1, r1, #4 - -LoopCopyDataInit: - ldr r0, =_sdata - ldr r3, =_edata - adds r2, r0, r1 - cmp r2, r3 - bcc CopyDataInit - ldr r2, =_sbss - b LoopFillZerobss -/* Zero fill the bss segment. */ -FillZerobss: - movs r3, #0 - str r3, [r2], #4 - -LoopFillZerobss: - ldr r3, = _ebss - cmp r2, r3 - bcc FillZerobss -/* Call the clock system intitialization function.*/ - bl SystemInit -/* Call the application's entry point.*/ - bl main - bx lr -.size Reset_Handler, .-Reset_Handler - -/** - * @brief This is the code that gets called when the processor receives an - * unexpected interrupt. This simply enters an infinite loop, preserving - * the system state for examination by a debugger. - * @param None - * @retval None -*/ - .section .text.Default_Handler,"ax",%progbits -Default_Handler: -Infinite_Loop: - b Infinite_Loop - .size Default_Handler, .-Default_Handler -/****************************************************************************** -* -* The minimal vector table for a Cortex M3. Note that the proper constructs -* must be placed on this to ensure that it ends up at physical address -* 0x0000.0000. -* -******************************************************************************/ - .section .isr_vector,"a",%progbits - .type g_pfnVectors, %object - .size g_pfnVectors, .-g_pfnVectors - - -g_pfnVectors: - .word _estack - .word Reset_Handler - .word NMI_Handler - .word HardFault_Handler - .word MemManage_Handler - .word BusFault_Handler - .word UsageFault_Handler - .word 0 - .word 0 - .word 0 - .word 0 - .word SVC_Handler - .word DebugMon_Handler - .word 0 - .word PendSV_Handler - .word SysTick_Handler - .word WWDG_IRQHandler - .word PVD_IRQHandler - .word TAMPER_IRQHandler - .word RTC_IRQHandler - .word FLASH_IRQHandler - .word RCC_IRQHandler - .word EXTI0_IRQHandler - .word EXTI1_IRQHandler - .word EXTI2_IRQHandler - .word EXTI3_IRQHandler - .word EXTI4_IRQHandler - .word DMA1_Channel1_IRQHandler - .word DMA1_Channel2_IRQHandler - .word DMA1_Channel3_IRQHandler - .word DMA1_Channel4_IRQHandler - .word DMA1_Channel5_IRQHandler - .word DMA1_Channel6_IRQHandler - .word DMA1_Channel7_IRQHandler - .word ADC1_2_IRQHandler - .word USB_HP_CAN1_TX_IRQHandler - .word USB_LP_CAN1_RX0_IRQHandler - .word CAN1_RX1_IRQHandler - .word CAN1_SCE_IRQHandler - .word EXTI9_5_IRQHandler - .word TIM1_BRK_IRQHandler - .word TIM1_UP_IRQHandler - .word TIM1_TRG_COM_IRQHandler - .word TIM1_CC_IRQHandler - .word TIM2_IRQHandler - .word TIM3_IRQHandler - .word TIM4_IRQHandler - .word I2C1_EV_IRQHandler - .word I2C1_ER_IRQHandler - .word I2C2_EV_IRQHandler - .word I2C2_ER_IRQHandler - .word SPI1_IRQHandler - .word SPI2_IRQHandler - .word USART1_IRQHandler - .word USART2_IRQHandler - .word USART3_IRQHandler - .word EXTI15_10_IRQHandler - .word RTCAlarm_IRQHandler - .word USBWakeUp_IRQHandler - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word BootRAM /* @0x108. This is for boot in RAM mode for - STM32F10x Medium Density devices. */ - -/******************************************************************************* -* -* Provide weak aliases for each Exception handler to the Default_Handler. -* As they are weak aliases, any function with the same name will override -* this definition. -* -*******************************************************************************/ - - .weak NMI_Handler - .thumb_set NMI_Handler,Default_Handler - - .weak HardFault_Handler - .thumb_set HardFault_Handler,Default_Handler - - .weak MemManage_Handler - .thumb_set MemManage_Handler,Default_Handler - - .weak BusFault_Handler - .thumb_set BusFault_Handler,Default_Handler - - .weak UsageFault_Handler - .thumb_set UsageFault_Handler,Default_Handler - - .weak SVC_Handler - .thumb_set SVC_Handler,Default_Handler - - .weak DebugMon_Handler - .thumb_set DebugMon_Handler,Default_Handler - - .weak PendSV_Handler - .thumb_set PendSV_Handler,Default_Handler - - .weak SysTick_Handler - .thumb_set SysTick_Handler,Default_Handler - - .weak WWDG_IRQHandler - .thumb_set WWDG_IRQHandler,Default_Handler - - .weak PVD_IRQHandler - .thumb_set PVD_IRQHandler,Default_Handler - - .weak TAMPER_IRQHandler - .thumb_set TAMPER_IRQHandler,Default_Handler - - .weak RTC_IRQHandler - .thumb_set RTC_IRQHandler,Default_Handler - - .weak FLASH_IRQHandler - .thumb_set FLASH_IRQHandler,Default_Handler - - .weak RCC_IRQHandler - .thumb_set RCC_IRQHandler,Default_Handler - - .weak EXTI0_IRQHandler - .thumb_set EXTI0_IRQHandler,Default_Handler - - .weak EXTI1_IRQHandler - .thumb_set EXTI1_IRQHandler,Default_Handler - - .weak EXTI2_IRQHandler - .thumb_set EXTI2_IRQHandler,Default_Handler - - .weak EXTI3_IRQHandler - .thumb_set EXTI3_IRQHandler,Default_Handler - - .weak EXTI4_IRQHandler - .thumb_set EXTI4_IRQHandler,Default_Handler - - .weak DMA1_Channel1_IRQHandler - .thumb_set DMA1_Channel1_IRQHandler,Default_Handler - - .weak DMA1_Channel2_IRQHandler - .thumb_set DMA1_Channel2_IRQHandler,Default_Handler - - .weak DMA1_Channel3_IRQHandler - .thumb_set DMA1_Channel3_IRQHandler,Default_Handler - - .weak DMA1_Channel4_IRQHandler - .thumb_set DMA1_Channel4_IRQHandler,Default_Handler - - .weak DMA1_Channel5_IRQHandler - .thumb_set DMA1_Channel5_IRQHandler,Default_Handler - - .weak DMA1_Channel6_IRQHandler - .thumb_set DMA1_Channel6_IRQHandler,Default_Handler - - .weak DMA1_Channel7_IRQHandler - .thumb_set DMA1_Channel7_IRQHandler,Default_Handler - - .weak ADC1_2_IRQHandler - .thumb_set ADC1_2_IRQHandler,Default_Handler - - .weak USB_HP_CAN1_TX_IRQHandler - .thumb_set USB_HP_CAN1_TX_IRQHandler,Default_Handler - - .weak USB_LP_CAN1_RX0_IRQHandler - .thumb_set USB_LP_CAN1_RX0_IRQHandler,Default_Handler - - .weak CAN1_RX1_IRQHandler - .thumb_set CAN1_RX1_IRQHandler,Default_Handler - - .weak CAN1_SCE_IRQHandler - .thumb_set CAN1_SCE_IRQHandler,Default_Handler - - .weak EXTI9_5_IRQHandler - .thumb_set EXTI9_5_IRQHandler,Default_Handler - - .weak TIM1_BRK_IRQHandler - .thumb_set TIM1_BRK_IRQHandler,Default_Handler - - .weak TIM1_UP_IRQHandler - .thumb_set TIM1_UP_IRQHandler,Default_Handler - - .weak TIM1_TRG_COM_IRQHandler - .thumb_set TIM1_TRG_COM_IRQHandler,Default_Handler - - .weak TIM1_CC_IRQHandler - .thumb_set TIM1_CC_IRQHandler,Default_Handler - - .weak TIM2_IRQHandler - .thumb_set TIM2_IRQHandler,Default_Handler - - .weak TIM3_IRQHandler - .thumb_set TIM3_IRQHandler,Default_Handler - - .weak TIM4_IRQHandler - .thumb_set TIM4_IRQHandler,Default_Handler - - .weak I2C1_EV_IRQHandler - .thumb_set I2C1_EV_IRQHandler,Default_Handler - - .weak I2C1_ER_IRQHandler - .thumb_set I2C1_ER_IRQHandler,Default_Handler - - .weak I2C2_EV_IRQHandler - .thumb_set I2C2_EV_IRQHandler,Default_Handler - - .weak I2C2_ER_IRQHandler - .thumb_set I2C2_ER_IRQHandler,Default_Handler - - .weak SPI1_IRQHandler - .thumb_set SPI1_IRQHandler,Default_Handler - - .weak SPI2_IRQHandler - .thumb_set SPI2_IRQHandler,Default_Handler - - .weak USART1_IRQHandler - .thumb_set USART1_IRQHandler,Default_Handler - - .weak USART2_IRQHandler - .thumb_set USART2_IRQHandler,Default_Handler - - .weak USART3_IRQHandler - .thumb_set USART3_IRQHandler,Default_Handler - - .weak EXTI15_10_IRQHandler - .thumb_set EXTI15_10_IRQHandler,Default_Handler - - .weak RTCAlarm_IRQHandler - .thumb_set RTCAlarm_IRQHandler,Default_Handler - - .weak USBWakeUp_IRQHandler - .thumb_set USBWakeUp_IRQHandler,Default_Handler - -/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/Libraries/CMSIS/CM3/DeviceSupport/ST/STM32F10x/startup/gcc_ride7/startup_stm32f10x_md_vl.s b/bsp/stm32_radio/Libraries/CMSIS/CM3/DeviceSupport/ST/STM32F10x/startup/gcc_ride7/startup_stm32f10x_md_vl.s deleted file mode 100644 index e158a992ef..0000000000 --- a/bsp/stm32_radio/Libraries/CMSIS/CM3/DeviceSupport/ST/STM32F10x/startup/gcc_ride7/startup_stm32f10x_md_vl.s +++ /dev/null @@ -1,395 +0,0 @@ -/** - ****************************************************************************** - * @file startup_stm32f10x_md_vl.s - * @author MCD Application Team - * @version V3.2.0 - * @date 03/01/2010 - * @brief STM32F10x Medium Density Value Line Devices vector table for RIDE7 - * toolchain. - * This module performs: - * - Set the initial SP - * - Set the initial PC == Reset_Handler, - * - Set the vector table entries with the exceptions ISR address - * - Configure the clock system - * - Branches to main in the C library (which eventually - * calls main()). - * After Reset the Cortex-M3 processor is in Thread mode, - * priority is Privileged, and the Stack is set to Main. - ******************************************************************************* - * @copy - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2010 STMicroelectronics

- */ - - .syntax unified - .cpu cortex-m3 - .fpu softvfp - .thumb - -.global g_pfnVectors -.global Default_Handler - -/* start address for the initialization values of the .data section. -defined in linker script */ -.word _sidata -/* start address for the .data section. defined in linker script */ -.word _sdata -/* end address for the .data section. defined in linker script */ -.word _edata -/* start address for the .bss section. defined in linker script */ -.word _sbss -/* end address for the .bss section. defined in linker script */ -.word _ebss - -.equ BootRAM, 0xF108F85F -/** - * @brief This is the code that gets called when the processor first - * starts execution following a reset event. Only the absolutely - * necessary set is performed, after which the application - * supplied main() routine is called. - * @param None - * @retval None -*/ - - .section .text.Reset_Handler - .weak Reset_Handler - .type Reset_Handler, %function -Reset_Handler: - -/* Copy the data segment initializers from flash to SRAM */ - movs r1, #0 - b LoopCopyDataInit - -CopyDataInit: - ldr r3, =_sidata - ldr r3, [r3, r1] - str r3, [r0, r1] - adds r1, r1, #4 - -LoopCopyDataInit: - ldr r0, =_sdata - ldr r3, =_edata - adds r2, r0, r1 - cmp r2, r3 - bcc CopyDataInit - ldr r2, =_sbss - b LoopFillZerobss -/* Zero fill the bss segment. */ -FillZerobss: - movs r3, #0 - str r3, [r2], #4 - -LoopFillZerobss: - ldr r3, = _ebss - cmp r2, r3 - bcc FillZerobss -/* Call the clock system intitialization function.*/ - bl SystemInit -/* Call the application's entry point.*/ - bl main - bx lr -.size Reset_Handler, .-Reset_Handler - -/** - * @brief This is the code that gets called when the processor receives an - * unexpected interrupt. This simply enters an infinite loop, preserving - * the system state for examination by a debugger. - * @param None - * @retval None -*/ - .section .text.Default_Handler,"ax",%progbits -Default_Handler: -Infinite_Loop: - b Infinite_Loop - .size Default_Handler, .-Default_Handler -/****************************************************************************** -* -* The minimal vector table for a Cortex M3. Note that the proper constructs -* must be placed on this to ensure that it ends up at physical address -* 0x0000.0000. -* -******************************************************************************/ - .section .isr_vector,"a",%progbits - .type g_pfnVectors, %object - .size g_pfnVectors, .-g_pfnVectors - -g_pfnVectors: - .word _estack - .word Reset_Handler - .word NMI_Handler - .word HardFault_Handler - .word MemManage_Handler - .word BusFault_Handler - .word UsageFault_Handler - .word 0 - .word 0 - .word 0 - .word 0 - .word SVC_Handler - .word DebugMon_Handler - .word 0 - .word PendSV_Handler - .word SysTick_Handler - .word WWDG_IRQHandler - .word PVD_IRQHandler - .word TAMPER_IRQHandler - .word RTC_IRQHandler - .word FLASH_IRQHandler - .word RCC_IRQHandler - .word EXTI0_IRQHandler - .word EXTI1_IRQHandler - .word EXTI2_IRQHandler - .word EXTI3_IRQHandler - .word EXTI4_IRQHandler - .word DMA1_Channel1_IRQHandler - .word DMA1_Channel2_IRQHandler - .word DMA1_Channel3_IRQHandler - .word DMA1_Channel4_IRQHandler - .word DMA1_Channel5_IRQHandler - .word DMA1_Channel6_IRQHandler - .word DMA1_Channel7_IRQHandler - .word ADC1_IRQHandler - .word 0 - .word 0 - .word 0 - .word 0 - .word EXTI9_5_IRQHandler - .word TIM1_BRK_TIM15_IRQHandler - .word TIM1_UP_TIM16_IRQHandler - .word TIM1_TRG_COM_TIM17_IRQHandler - .word TIM1_CC_IRQHandler - .word TIM2_IRQHandler - .word TIM3_IRQHandler - .word TIM4_IRQHandler - .word I2C1_EV_IRQHandler - .word I2C1_ER_IRQHandler - .word I2C2_EV_IRQHandler - .word I2C2_ER_IRQHandler - .word SPI1_IRQHandler - .word SPI2_IRQHandler - .word USART1_IRQHandler - .word USART2_IRQHandler - .word 0 - .word EXTI15_10_IRQHandler - .word RTCAlarm_IRQHandler - .word CEC_IRQHandler - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word TIM6_DAC_IRQHandler - .word TIM7_IRQHandler - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word BootRAM /* @0x01CC. This is for boot in RAM mode for - STM32F10x Medium Value Line Density devices. */ - -/******************************************************************************* -* Provide weak aliases for each Exception handler to the Default_Handler. -* As they are weak aliases, any function with the same name will override -* this definition. -*******************************************************************************/ - - .weak NMI_Handler - .thumb_set NMI_Handler,Default_Handler - - .weak HardFault_Handler - .thumb_set HardFault_Handler,Default_Handler - - .weak MemManage_Handler - .thumb_set MemManage_Handler,Default_Handler - - .weak BusFault_Handler - .thumb_set BusFault_Handler,Default_Handler - - .weak UsageFault_Handler - .thumb_set UsageFault_Handler,Default_Handler - - .weak SVC_Handler - .thumb_set SVC_Handler,Default_Handler - - .weak DebugMon_Handler - .thumb_set DebugMon_Handler,Default_Handler - - .weak PendSV_Handler - .thumb_set PendSV_Handler,Default_Handler - - .weak SysTick_Handler - .thumb_set SysTick_Handler,Default_Handler - - .weak WWDG_IRQHandler - .thumb_set WWDG_IRQHandler,Default_Handler - - .weak PVD_IRQHandler - .thumb_set PVD_IRQHandler,Default_Handler - - .weak TAMPER_IRQHandler - .thumb_set TAMPER_IRQHandler,Default_Handler - - .weak RTC_IRQHandler - .thumb_set RTC_IRQHandler,Default_Handler - - .weak FLASH_IRQHandler - .thumb_set FLASH_IRQHandler,Default_Handler - - .weak RCC_IRQHandler - .thumb_set RCC_IRQHandler,Default_Handler - - .weak EXTI0_IRQHandler - .thumb_set EXTI0_IRQHandler,Default_Handler - - .weak EXTI1_IRQHandler - .thumb_set EXTI1_IRQHandler,Default_Handler - - .weak EXTI2_IRQHandler - .thumb_set EXTI2_IRQHandler,Default_Handler - - .weak EXTI3_IRQHandler - .thumb_set EXTI3_IRQHandler,Default_Handler - - .weak EXTI4_IRQHandler - .thumb_set EXTI4_IRQHandler,Default_Handler - - .weak DMA1_Channel1_IRQHandler - .thumb_set DMA1_Channel1_IRQHandler,Default_Handler - - .weak DMA1_Channel2_IRQHandler - .thumb_set DMA1_Channel2_IRQHandler,Default_Handler - - .weak DMA1_Channel3_IRQHandler - .thumb_set DMA1_Channel3_IRQHandler,Default_Handler - - .weak DMA1_Channel4_IRQHandler - .thumb_set DMA1_Channel4_IRQHandler,Default_Handler - - .weak DMA1_Channel5_IRQHandler - .thumb_set DMA1_Channel5_IRQHandler,Default_Handler - - .weak DMA1_Channel6_IRQHandler - .thumb_set DMA1_Channel6_IRQHandler,Default_Handler - - .weak DMA1_Channel7_IRQHandler - .thumb_set DMA1_Channel7_IRQHandler,Default_Handler - - .weak ADC1_IRQHandler - .thumb_set ADC1_IRQHandler,Default_Handler - - .weak EXTI9_5_IRQHandler - .thumb_set EXTI9_5_IRQHandler,Default_Handler - - .weak TIM1_BRK_TIM15_IRQHandler - .thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler - - .weak TIM1_UP_TIM16_IRQHandler - .thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler - - .weak TIM1_TRG_COM_TIM17_IRQHandler - .thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler - - .weak TIM1_CC_IRQHandler - .thumb_set TIM1_CC_IRQHandler,Default_Handler - - .weak TIM2_IRQHandler - .thumb_set TIM2_IRQHandler,Default_Handler - - .weak TIM3_IRQHandler - .thumb_set TIM3_IRQHandler,Default_Handler - - .weak TIM4_IRQHandler - .thumb_set TIM4_IRQHandler,Default_Handler - - .weak I2C1_EV_IRQHandler - .thumb_set I2C1_EV_IRQHandler,Default_Handler - - .weak I2C1_ER_IRQHandler - .thumb_set I2C1_ER_IRQHandler,Default_Handler - - .weak I2C2_EV_IRQHandler - .thumb_set I2C2_EV_IRQHandler,Default_Handler - - .weak I2C2_ER_IRQHandler - .thumb_set I2C2_ER_IRQHandler,Default_Handler - - .weak SPI1_IRQHandler - .thumb_set SPI1_IRQHandler,Default_Handler - - .weak SPI2_IRQHandler - .thumb_set SPI2_IRQHandler,Default_Handler - - .weak USART1_IRQHandler - .thumb_set USART1_IRQHandler,Default_Handler - - .weak USART2_IRQHandler - .thumb_set USART2_IRQHandler,Default_Handler - - .weak EXTI15_10_IRQHandler - .thumb_set EXTI15_10_IRQHandler,Default_Handler - - .weak RTCAlarm_IRQHandler - .thumb_set RTCAlarm_IRQHandler,Default_Handler - - .weak CEC_IRQHandler - .thumb_set CEC_IRQHandler,Default_Handler - - .weak TIM6_DAC_IRQHandler - .thumb_set TIM6_DAC_IRQHandler,Default_Handler - - .weak TIM7_IRQHandler - .thumb_set TIM7_IRQHandler,Default_Handler - -/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/Libraries/CMSIS/CM3/DeviceSupport/ST/STM32F10x/startup/iar/startup_stm32f10x_cl.s b/bsp/stm32_radio/Libraries/CMSIS/CM3/DeviceSupport/ST/STM32F10x/startup/iar/startup_stm32f10x_cl.s deleted file mode 100644 index 729be8d5c6..0000000000 --- a/bsp/stm32_radio/Libraries/CMSIS/CM3/DeviceSupport/ST/STM32F10x/startup/iar/startup_stm32f10x_cl.s +++ /dev/null @@ -1,507 +0,0 @@ -;/******************** (C) COPYRIGHT 2010 STMicroelectronics ******************** -;* File Name : startup_stm32f10x_cl.s -;* Author : MCD Application Team -;* Version : V3.2.0 -;* Date : 03/01/2010 -;* Description : STM32F10x Connectivity line devices vector table for -;* EWARM5.x toolchain. -;* This module performs: -;* - Set the initial SP -;* - Configure the clock system -;* - Set the initial PC == __iar_program_start, -;* - Set the vector table entries with the exceptions ISR -;* address. -;* After Reset the Cortex-M3 processor is in Thread mode, -;* priority is Privileged, and the Stack is set to Main. -;******************************************************************************** -;* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS -;* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. -;* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, -;* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE -;* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING -;* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -;*******************************************************************************/ -; -; -; The modules in this file are included in the libraries, and may be replaced -; by any user-defined modules that define the PUBLIC symbol _program_start or -; a user defined start symbol. -; To override the cstartup defined in the library, simply add your modified -; version to the workbench project. -; -; The vector table is normally located at address 0. -; When debugging in RAM, it can be located in RAM, aligned to at least 2^6. -; The name "__vector_table" has special meaning for C-SPY: -; it is where the SP start value is found, and the NVIC vector -; table register (VTOR) is initialized to this address if != 0. -; -; Cortex-M version -; - - MODULE ?cstartup - - ;; Forward declaration of sections. - SECTION CSTACK:DATA:NOROOT(3) - - SECTION .intvec:CODE:NOROOT(2) - - EXTERN __iar_program_start - EXTERN SystemInit - PUBLIC __vector_table - - DATA -__vector_table - DCD sfe(CSTACK) - DCD Reset_Handler ; Reset Handler - DCD NMI_Handler ; NMI Handler - DCD HardFault_Handler ; Hard Fault Handler - DCD MemManage_Handler ; MPU Fault Handler - DCD BusFault_Handler ; Bus Fault Handler - DCD UsageFault_Handler ; Usage Fault Handler - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD SVC_Handler ; SVCall Handler - DCD DebugMon_Handler ; Debug Monitor Handler - DCD 0 ; Reserved - DCD PendSV_Handler ; PendSV Handler - DCD SysTick_Handler ; SysTick Handler - - ; External Interrupts - DCD WWDG_IRQHandler ; Window Watchdog - DCD PVD_IRQHandler ; PVD through EXTI Line detect - DCD TAMPER_IRQHandler ; Tamper - DCD RTC_IRQHandler ; RTC - DCD FLASH_IRQHandler ; Flash - DCD RCC_IRQHandler ; RCC - DCD EXTI0_IRQHandler ; EXTI Line 0 - DCD EXTI1_IRQHandler ; EXTI Line 1 - DCD EXTI2_IRQHandler ; EXTI Line 2 - DCD EXTI3_IRQHandler ; EXTI Line 3 - DCD EXTI4_IRQHandler ; EXTI Line 4 - DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1 - DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2 - DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3 - DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4 - DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5 - DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6 - DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7 - DCD ADC1_2_IRQHandler ; ADC1 and ADC2 - DCD CAN1_TX_IRQHandler ; CAN1 TX - DCD CAN1_RX0_IRQHandler ; CAN1 RX0 - DCD CAN1_RX1_IRQHandler ; CAN1 RX1 - DCD CAN1_SCE_IRQHandler ; CAN1 SCE - DCD EXTI9_5_IRQHandler ; EXTI Line 9..5 - DCD TIM1_BRK_IRQHandler ; TIM1 Break - DCD TIM1_UP_IRQHandler ; TIM1 Update - DCD TIM1_TRG_COM_IRQHandler ; TIM1 Trigger and Commutation - DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare - DCD TIM2_IRQHandler ; TIM2 - DCD TIM3_IRQHandler ; TIM3 - DCD TIM4_IRQHandler ; TIM4 - DCD I2C1_EV_IRQHandler ; I2C1 Event - DCD I2C1_ER_IRQHandler ; I2C1 Error - DCD I2C2_EV_IRQHandler ; I2C2 Event - DCD I2C2_ER_IRQHandler ; I2C1 Error - DCD SPI1_IRQHandler ; SPI1 - DCD SPI2_IRQHandler ; SPI2 - DCD USART1_IRQHandler ; USART1 - DCD USART2_IRQHandler ; USART2 - DCD USART3_IRQHandler ; USART3 - DCD EXTI15_10_IRQHandler ; EXTI Line 15..10 - DCD RTCAlarm_IRQHandler ; RTC alarm through EXTI line - DCD OTG_FS_WKUP_IRQHandler ; USB OTG FS Wakeup through EXTI line - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD TIM5_IRQHandler ; TIM5 - DCD SPI3_IRQHandler ; SPI3 - DCD UART4_IRQHandler ; UART4 - DCD UART5_IRQHandler ; UART5 - DCD TIM6_IRQHandler ; TIM6 - DCD TIM7_IRQHandler ; TIM7 - DCD DMA2_Channel1_IRQHandler ; DMA2 Channel1 - DCD DMA2_Channel2_IRQHandler ; DMA2 Channel2 - DCD DMA2_Channel3_IRQHandler ; DMA2 Channel3 - DCD DMA2_Channel4_IRQHandler ; DMA2 Channel4 - DCD DMA2_Channel5_IRQHandler ; DMA2 Channel5 - DCD ETH_IRQHandler ; Ethernet - DCD ETH_WKUP_IRQHandler ; Ethernet Wakeup through EXTI line - DCD CAN2_TX_IRQHandler ; CAN2 TX - DCD CAN2_RX0_IRQHandler ; CAN2 RX0 - DCD CAN2_RX1_IRQHandler ; CAN2 RX1 - DCD CAN2_SCE_IRQHandler ; CAN2 SCE - DCD OTG_FS_IRQHandler ; USB OTG FS - -;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -;; -;; Default interrupt handlers. -;; - THUMB - - PUBWEAK Reset_Handler - SECTION .text:CODE:REORDER(2) -Reset_Handler - LDR R0, =SystemInit - BLX R0 - LDR R0, =__iar_program_start - BX R0 - - PUBWEAK NMI_Handler - SECTION .text:CODE:REORDER(1) -NMI_Handler - B NMI_Handler - - PUBWEAK HardFault_Handler - SECTION .text:CODE:REORDER(1) -HardFault_Handler - B HardFault_Handler - - PUBWEAK MemManage_Handler - SECTION .text:CODE:REORDER(1) -MemManage_Handler - B MemManage_Handler - - PUBWEAK BusFault_Handler - SECTION .text:CODE:REORDER(1) -BusFault_Handler - B BusFault_Handler - - PUBWEAK UsageFault_Handler - SECTION .text:CODE:REORDER(1) -UsageFault_Handler - B UsageFault_Handler - - PUBWEAK SVC_Handler - SECTION .text:CODE:REORDER(1) -SVC_Handler - B SVC_Handler - - PUBWEAK DebugMon_Handler - SECTION .text:CODE:REORDER(1) -DebugMon_Handler - B DebugMon_Handler - - PUBWEAK PendSV_Handler - SECTION .text:CODE:REORDER(1) -PendSV_Handler - B PendSV_Handler - - PUBWEAK SysTick_Handler - SECTION .text:CODE:REORDER(1) -SysTick_Handler - B SysTick_Handler - - PUBWEAK WWDG_IRQHandler - SECTION .text:CODE:REORDER(1) -WWDG_IRQHandler - B WWDG_IRQHandler - - PUBWEAK PVD_IRQHandler - SECTION .text:CODE:REORDER(1) -PVD_IRQHandler - B PVD_IRQHandler - - PUBWEAK TAMPER_IRQHandler - SECTION .text:CODE:REORDER(1) -TAMPER_IRQHandler - B TAMPER_IRQHandler - - PUBWEAK RTC_IRQHandler - SECTION .text:CODE:REORDER(1) -RTC_IRQHandler - B RTC_IRQHandler - - PUBWEAK FLASH_IRQHandler - SECTION .text:CODE:REORDER(1) -FLASH_IRQHandler - B FLASH_IRQHandler - - PUBWEAK RCC_IRQHandler - SECTION .text:CODE:REORDER(1) -RCC_IRQHandler - B RCC_IRQHandler - - PUBWEAK EXTI0_IRQHandler - SECTION .text:CODE:REORDER(1) -EXTI0_IRQHandler - B EXTI0_IRQHandler - - PUBWEAK EXTI1_IRQHandler - SECTION .text:CODE:REORDER(1) -EXTI1_IRQHandler - B EXTI1_IRQHandler - - PUBWEAK EXTI2_IRQHandler - SECTION .text:CODE:REORDER(1) -EXTI2_IRQHandler - B EXTI2_IRQHandler - - PUBWEAK EXTI3_IRQHandler - SECTION .text:CODE:REORDER(1) -EXTI3_IRQHandler - B EXTI3_IRQHandler - - - PUBWEAK EXTI4_IRQHandler - SECTION .text:CODE:REORDER(1) -EXTI4_IRQHandler - B EXTI4_IRQHandler - - PUBWEAK DMA1_Channel1_IRQHandler - SECTION .text:CODE:REORDER(1) -DMA1_Channel1_IRQHandler - B DMA1_Channel1_IRQHandler - - PUBWEAK DMA1_Channel2_IRQHandler - SECTION .text:CODE:REORDER(1) -DMA1_Channel2_IRQHandler - B DMA1_Channel2_IRQHandler - - PUBWEAK DMA1_Channel3_IRQHandler - SECTION .text:CODE:REORDER(1) -DMA1_Channel3_IRQHandler - B DMA1_Channel3_IRQHandler - - PUBWEAK DMA1_Channel4_IRQHandler - SECTION .text:CODE:REORDER(1) -DMA1_Channel4_IRQHandler - B DMA1_Channel4_IRQHandler - - PUBWEAK DMA1_Channel5_IRQHandler - SECTION .text:CODE:REORDER(1) -DMA1_Channel5_IRQHandler - B DMA1_Channel5_IRQHandler - - PUBWEAK DMA1_Channel6_IRQHandler - SECTION .text:CODE:REORDER(1) -DMA1_Channel6_IRQHandler - B DMA1_Channel6_IRQHandler - - PUBWEAK DMA1_Channel7_IRQHandler - SECTION .text:CODE:REORDER(1) -DMA1_Channel7_IRQHandler - B DMA1_Channel7_IRQHandler - - PUBWEAK ADC1_2_IRQHandler - SECTION .text:CODE:REORDER(1) -ADC1_2_IRQHandler - B ADC1_2_IRQHandler - - PUBWEAK CAN1_TX_IRQHandler - SECTION .text:CODE:REORDER(1) -CAN1_TX_IRQHandler - B CAN1_TX_IRQHandler - - PUBWEAK CAN1_RX0_IRQHandler - SECTION .text:CODE:REORDER(1) -CAN1_RX0_IRQHandler - B CAN1_RX0_IRQHandler - - PUBWEAK CAN1_RX1_IRQHandler - SECTION .text:CODE:REORDER(1) -CAN1_RX1_IRQHandler - B CAN1_RX1_IRQHandler - - PUBWEAK CAN1_SCE_IRQHandler - SECTION .text:CODE:REORDER(1) -CAN1_SCE_IRQHandler - B CAN1_SCE_IRQHandler - - PUBWEAK EXTI9_5_IRQHandler - SECTION .text:CODE:REORDER(1) -EXTI9_5_IRQHandler - B EXTI9_5_IRQHandler - - PUBWEAK TIM1_BRK_IRQHandler - SECTION .text:CODE:REORDER(1) -TIM1_BRK_IRQHandler - B TIM1_BRK_IRQHandler - - PUBWEAK TIM1_UP_IRQHandler - SECTION .text:CODE:REORDER(1) -TIM1_UP_IRQHandler - B TIM1_UP_IRQHandler - - PUBWEAK TIM1_TRG_COM_IRQHandler - SECTION .text:CODE:REORDER(1) -TIM1_TRG_COM_IRQHandler - B TIM1_TRG_COM_IRQHandler - - PUBWEAK TIM1_CC_IRQHandler - SECTION .text:CODE:REORDER(1) -TIM1_CC_IRQHandler - B TIM1_CC_IRQHandler - - PUBWEAK TIM2_IRQHandler - SECTION .text:CODE:REORDER(1) -TIM2_IRQHandler - B TIM2_IRQHandler - - PUBWEAK TIM3_IRQHandler - SECTION .text:CODE:REORDER(1) -TIM3_IRQHandler - B TIM3_IRQHandler - - PUBWEAK TIM4_IRQHandler - SECTION .text:CODE:REORDER(1) -TIM4_IRQHandler - B TIM4_IRQHandler - - PUBWEAK I2C1_EV_IRQHandler - SECTION .text:CODE:REORDER(1) -I2C1_EV_IRQHandler - B I2C1_EV_IRQHandler - - PUBWEAK I2C1_ER_IRQHandler - SECTION .text:CODE:REORDER(1) -I2C1_ER_IRQHandler - B I2C1_ER_IRQHandler - - PUBWEAK I2C2_EV_IRQHandler - SECTION .text:CODE:REORDER(1) -I2C2_EV_IRQHandler - B I2C2_EV_IRQHandler - - PUBWEAK I2C2_ER_IRQHandler - SECTION .text:CODE:REORDER(1) -I2C2_ER_IRQHandler - B I2C2_ER_IRQHandler - - PUBWEAK SPI1_IRQHandler - SECTION .text:CODE:REORDER(1) -SPI1_IRQHandler - B SPI1_IRQHandler - - PUBWEAK SPI2_IRQHandler - SECTION .text:CODE:REORDER(1) -SPI2_IRQHandler - B SPI2_IRQHandler - - PUBWEAK USART1_IRQHandler - SECTION .text:CODE:REORDER(1) -USART1_IRQHandler - B USART1_IRQHandler - - PUBWEAK USART2_IRQHandler - SECTION .text:CODE:REORDER(1) -USART2_IRQHandler - B USART2_IRQHandler - - PUBWEAK USART3_IRQHandler - SECTION .text:CODE:REORDER(1) -USART3_IRQHandler - B USART3_IRQHandler - - PUBWEAK EXTI15_10_IRQHandler - SECTION .text:CODE:REORDER(1) -EXTI15_10_IRQHandler - B EXTI15_10_IRQHandler - - PUBWEAK RTCAlarm_IRQHandler - SECTION .text:CODE:REORDER(1) -RTCAlarm_IRQHandler - B RTCAlarm_IRQHandler - - PUBWEAK OTG_FS_WKUP_IRQHandler - SECTION .text:CODE:REORDER(1) -OTG_FS_WKUP_IRQHandler - B OTG_FS_WKUP_IRQHandler - - PUBWEAK TIM5_IRQHandler - SECTION .text:CODE:REORDER(1) -TIM5_IRQHandler - B TIM5_IRQHandler - - PUBWEAK SPI3_IRQHandler - SECTION .text:CODE:REORDER(1) -SPI3_IRQHandler - B SPI3_IRQHandler - - PUBWEAK UART4_IRQHandler - SECTION .text:CODE:REORDER(1) -UART4_IRQHandler - B UART4_IRQHandler - - PUBWEAK UART5_IRQHandler - SECTION .text:CODE:REORDER(1) -UART5_IRQHandler - B UART5_IRQHandler - - PUBWEAK TIM6_IRQHandler - SECTION .text:CODE:REORDER(1) -TIM6_IRQHandler - B TIM6_IRQHandler - - PUBWEAK TIM7_IRQHandler - SECTION .text:CODE:REORDER(1) -TIM7_IRQHandler - B TIM7_IRQHandler - - PUBWEAK DMA2_Channel1_IRQHandler - SECTION .text:CODE:REORDER(1) -DMA2_Channel1_IRQHandler - B DMA2_Channel1_IRQHandler - - PUBWEAK DMA2_Channel2_IRQHandler - SECTION .text:CODE:REORDER(1) -DMA2_Channel2_IRQHandler - B DMA2_Channel2_IRQHandler - - PUBWEAK DMA2_Channel3_IRQHandler - SECTION .text:CODE:REORDER(1) -DMA2_Channel3_IRQHandler - B DMA2_Channel3_IRQHandler - - PUBWEAK DMA2_Channel4_IRQHandler - SECTION .text:CODE:REORDER(1) -DMA2_Channel4_IRQHandler - B DMA2_Channel4_IRQHandler - - PUBWEAK DMA2_Channel5_IRQHandler - SECTION .text:CODE:REORDER(1) -DMA2_Channel5_IRQHandler - B DMA2_Channel5_IRQHandler - - PUBWEAK ETH_IRQHandler - SECTION .text:CODE:REORDER(1) -ETH_IRQHandler - B ETH_IRQHandler - - PUBWEAK ETH_WKUP_IRQHandler - SECTION .text:CODE:REORDER(1) -ETH_WKUP_IRQHandler - B ETH_WKUP_IRQHandler - - PUBWEAK CAN2_TX_IRQHandler - SECTION .text:CODE:REORDER(1) -CAN2_TX_IRQHandler - B CAN2_TX_IRQHandler - - PUBWEAK CAN2_RX0_IRQHandler - SECTION .text:CODE:REORDER(1) -CAN2_RX0_IRQHandler - B CAN2_RX0_IRQHandler - - PUBWEAK CAN2_RX1_IRQHandler - SECTION .text:CODE:REORDER(1) -CAN2_RX1_IRQHandler - B CAN2_RX1_IRQHandler - - PUBWEAK CAN2_SCE_IRQHandler - SECTION .text:CODE:REORDER(1) -CAN2_SCE_IRQHandler - B CAN2_SCE_IRQHandler - - PUBWEAK OTG_FS_IRQHandler - SECTION .text:CODE:REORDER(1) -OTG_FS_IRQHandler - B OTG_FS_IRQHandler - - END -/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/Libraries/CMSIS/CM3/DeviceSupport/ST/STM32F10x/startup/iar/startup_stm32f10x_hd.s b/bsp/stm32_radio/Libraries/CMSIS/CM3/DeviceSupport/ST/STM32F10x/startup/iar/startup_stm32f10x_hd.s deleted file mode 100644 index 2e8c0ba228..0000000000 --- a/bsp/stm32_radio/Libraries/CMSIS/CM3/DeviceSupport/ST/STM32F10x/startup/iar/startup_stm32f10x_hd.s +++ /dev/null @@ -1,496 +0,0 @@ -;/******************** (C) COPYRIGHT 2010 STMicroelectronics ******************** -;* File Name : startup_stm32f10x_hd.s -;* Author : MCD Application Team -;* Version : V3.2.0 -;* Date : 03/01/2010 -;* Description : STM32F10x High Density Devices vector table for EWARM5.x -;* toolchain. -;* This module performs: -;* - Set the initial SP -;* - Configure the clock system and the external SRAM -;* mounted on STM3210E-EVAL board to be used as data -;* memory (optional, to be enabled by user) -;* - Set the initial PC == __iar_program_start, -;* - Set the vector table entries with the exceptions ISR address, -;* After Reset the Cortex-M3 processor is in Thread mode, -;* priority is Privileged, and the Stack is set to Main. -;******************************************************************************** -;* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS -;* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. -;* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, -;* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE -;* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING -;* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -;*******************************************************************************/ -; -; -; The modules in this file are included in the libraries, and may be replaced -; by any user-defined modules that define the PUBLIC symbol _program_start or -; a user defined start symbol. -; To override the cstartup defined in the library, simply add your modified -; version to the workbench project. -; -; The vector table is normally located at address 0. -; When debugging in RAM, it can be located in RAM, aligned to at least 2^6. -; The name "__vector_table" has special meaning for C-SPY: -; it is where the SP start value is found, and the NVIC vector -; table register (VTOR) is initialized to this address if != 0. -; -; Cortex-M version -; - - MODULE ?cstartup - - ;; Forward declaration of sections. - SECTION CSTACK:DATA:NOROOT(3) - - SECTION .intvec:CODE:NOROOT(2) - - EXTERN __iar_program_start - EXTERN SystemInit - PUBLIC __vector_table - - DATA - -__vector_table - DCD sfe(CSTACK) - DCD Reset_Handler ; Reset Handler - DCD NMI_Handler ; NMI Handler - DCD HardFault_Handler ; Hard Fault Handler - DCD MemManage_Handler ; MPU Fault Handler - DCD BusFault_Handler ; Bus Fault Handler - DCD UsageFault_Handler ; Usage Fault Handler - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD SVC_Handler ; SVCall Handler - DCD DebugMon_Handler ; Debug Monitor Handler - DCD 0 ; Reserved - DCD PendSV_Handler ; PendSV Handler - DCD SysTick_Handler ; SysTick Handler - - ; External Interrupts - DCD WWDG_IRQHandler ; Window Watchdog - DCD PVD_IRQHandler ; PVD through EXTI Line detect - DCD TAMPER_IRQHandler ; Tamper - DCD RTC_IRQHandler ; RTC - DCD FLASH_IRQHandler ; Flash - DCD RCC_IRQHandler ; RCC - DCD EXTI0_IRQHandler ; EXTI Line 0 - DCD EXTI1_IRQHandler ; EXTI Line 1 - DCD EXTI2_IRQHandler ; EXTI Line 2 - DCD EXTI3_IRQHandler ; EXTI Line 3 - DCD EXTI4_IRQHandler ; EXTI Line 4 - DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1 - DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2 - DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3 - DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4 - DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5 - DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6 - DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7 - DCD ADC1_2_IRQHandler ; ADC1 & ADC2 - DCD USB_HP_CAN1_TX_IRQHandler ; USB High Priority or CAN1 TX - DCD USB_LP_CAN1_RX0_IRQHandler ; USB Low Priority or CAN1 RX0 - DCD CAN1_RX1_IRQHandler ; CAN1 RX1 - DCD CAN1_SCE_IRQHandler ; CAN1 SCE - DCD EXTI9_5_IRQHandler ; EXTI Line 9..5 - DCD TIM1_BRK_IRQHandler ; TIM1 Break - DCD TIM1_UP_IRQHandler ; TIM1 Update - DCD TIM1_TRG_COM_IRQHandler ; TIM1 Trigger and Commutation - DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare - DCD TIM2_IRQHandler ; TIM2 - DCD TIM3_IRQHandler ; TIM3 - DCD TIM4_IRQHandler ; TIM4 - DCD I2C1_EV_IRQHandler ; I2C1 Event - DCD I2C1_ER_IRQHandler ; I2C1 Error - DCD I2C2_EV_IRQHandler ; I2C2 Event - DCD I2C2_ER_IRQHandler ; I2C2 Error - DCD SPI1_IRQHandler ; SPI1 - DCD SPI2_IRQHandler ; SPI2 - DCD USART1_IRQHandler ; USART1 - DCD USART2_IRQHandler ; USART2 - DCD USART3_IRQHandler ; USART3 - DCD EXTI15_10_IRQHandler ; EXTI Line 15..10 - DCD RTCAlarm_IRQHandler ; RTC Alarm through EXTI Line - DCD USBWakeUp_IRQHandler ; USB Wakeup from suspend - DCD TIM8_BRK_IRQHandler ; TIM8 Break - DCD TIM8_UP_IRQHandler ; TIM8 Update - DCD TIM8_TRG_COM_IRQHandler ; TIM8 Trigger and Commutation - DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare - DCD ADC3_IRQHandler ; ADC3 - DCD FSMC_IRQHandler ; FSMC - DCD SDIO_IRQHandler ; SDIO - DCD TIM5_IRQHandler ; TIM5 - DCD SPI3_IRQHandler ; SPI3 - DCD UART4_IRQHandler ; UART4 - DCD UART5_IRQHandler ; UART5 - DCD TIM6_IRQHandler ; TIM6 - DCD TIM7_IRQHandler ; TIM7 - DCD DMA2_Channel1_IRQHandler ; DMA2 Channel1 - DCD DMA2_Channel2_IRQHandler ; DMA2 Channel2 - DCD DMA2_Channel3_IRQHandler ; DMA2 Channel3 - DCD DMA2_Channel4_5_IRQHandler ; DMA2 Channel4 & Channel5 -;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -;; -;; Default interrupt handlers. -;; - THUMB - - PUBWEAK Reset_Handler - SECTION .text:CODE:REORDER(2) -Reset_Handler - LDR R0, =SystemInit - BLX R0 - LDR R0, =__iar_program_start - BX R0 - - PUBWEAK NMI_Handler - SECTION .text:CODE:REORDER(1) -NMI_Handler - B NMI_Handler - - PUBWEAK HardFault_Handler - SECTION .text:CODE:REORDER(1) -HardFault_Handler - B HardFault_Handler - - PUBWEAK MemManage_Handler - SECTION .text:CODE:REORDER(1) -MemManage_Handler - B MemManage_Handler - - PUBWEAK BusFault_Handler - SECTION .text:CODE:REORDER(1) -BusFault_Handler - B BusFault_Handler - - PUBWEAK UsageFault_Handler - SECTION .text:CODE:REORDER(1) -UsageFault_Handler - B UsageFault_Handler - - PUBWEAK SVC_Handler - SECTION .text:CODE:REORDER(1) -SVC_Handler - B SVC_Handler - - PUBWEAK DebugMon_Handler - SECTION .text:CODE:REORDER(1) -DebugMon_Handler - B DebugMon_Handler - - PUBWEAK PendSV_Handler - SECTION .text:CODE:REORDER(1) -PendSV_Handler - B PendSV_Handler - - PUBWEAK SysTick_Handler - SECTION .text:CODE:REORDER(1) -SysTick_Handler - B SysTick_Handler - - PUBWEAK WWDG_IRQHandler - SECTION .text:CODE:REORDER(1) -WWDG_IRQHandler - B WWDG_IRQHandler - - PUBWEAK PVD_IRQHandler - SECTION .text:CODE:REORDER(1) -PVD_IRQHandler - B PVD_IRQHandler - - PUBWEAK TAMPER_IRQHandler - SECTION .text:CODE:REORDER(1) -TAMPER_IRQHandler - B TAMPER_IRQHandler - - PUBWEAK RTC_IRQHandler - SECTION .text:CODE:REORDER(1) -RTC_IRQHandler - B RTC_IRQHandler - - PUBWEAK FLASH_IRQHandler - SECTION .text:CODE:REORDER(1) -FLASH_IRQHandler - B FLASH_IRQHandler - - PUBWEAK RCC_IRQHandler - SECTION .text:CODE:REORDER(1) -RCC_IRQHandler - B RCC_IRQHandler - - PUBWEAK EXTI0_IRQHandler - SECTION .text:CODE:REORDER(1) -EXTI0_IRQHandler - B EXTI0_IRQHandler - - PUBWEAK EXTI1_IRQHandler - SECTION .text:CODE:REORDER(1) -EXTI1_IRQHandler - B EXTI1_IRQHandler - - PUBWEAK EXTI2_IRQHandler - SECTION .text:CODE:REORDER(1) -EXTI2_IRQHandler - B EXTI2_IRQHandler - - PUBWEAK EXTI3_IRQHandler - SECTION .text:CODE:REORDER(1) -EXTI3_IRQHandler - B EXTI3_IRQHandler - - PUBWEAK EXTI4_IRQHandler - SECTION .text:CODE:REORDER(1) -EXTI4_IRQHandler - B EXTI4_IRQHandler - - PUBWEAK DMA1_Channel1_IRQHandler - SECTION .text:CODE:REORDER(1) -DMA1_Channel1_IRQHandler - B DMA1_Channel1_IRQHandler - - PUBWEAK DMA1_Channel2_IRQHandler - SECTION .text:CODE:REORDER(1) -DMA1_Channel2_IRQHandler - B DMA1_Channel2_IRQHandler - - PUBWEAK DMA1_Channel3_IRQHandler - SECTION .text:CODE:REORDER(1) -DMA1_Channel3_IRQHandler - B DMA1_Channel3_IRQHandler - - PUBWEAK DMA1_Channel4_IRQHandler - SECTION .text:CODE:REORDER(1) -DMA1_Channel4_IRQHandler - B DMA1_Channel4_IRQHandler - - PUBWEAK DMA1_Channel5_IRQHandler - SECTION .text:CODE:REORDER(1) -DMA1_Channel5_IRQHandler - B DMA1_Channel5_IRQHandler - - PUBWEAK DMA1_Channel6_IRQHandler - SECTION .text:CODE:REORDER(1) -DMA1_Channel6_IRQHandler - B DMA1_Channel6_IRQHandler - - PUBWEAK DMA1_Channel7_IRQHandler - SECTION .text:CODE:REORDER(1) -DMA1_Channel7_IRQHandler - B DMA1_Channel7_IRQHandler - - PUBWEAK ADC1_2_IRQHandler - SECTION .text:CODE:REORDER(1) -ADC1_2_IRQHandler - B ADC1_2_IRQHandler - - PUBWEAK USB_HP_CAN1_TX_IRQHandler - SECTION .text:CODE:REORDER(1) -USB_HP_CAN1_TX_IRQHandler - B USB_HP_CAN1_TX_IRQHandler - - PUBWEAK USB_LP_CAN1_RX0_IRQHandler - SECTION .text:CODE:REORDER(1) -USB_LP_CAN1_RX0_IRQHandler - B USB_LP_CAN1_RX0_IRQHandler - - PUBWEAK CAN1_RX1_IRQHandler - SECTION .text:CODE:REORDER(1) -CAN1_RX1_IRQHandler - B CAN1_RX1_IRQHandler - - PUBWEAK CAN1_SCE_IRQHandler - SECTION .text:CODE:REORDER(1) -CAN1_SCE_IRQHandler - B CAN1_SCE_IRQHandler - - PUBWEAK EXTI9_5_IRQHandler - SECTION .text:CODE:REORDER(1) -EXTI9_5_IRQHandler - B EXTI9_5_IRQHandler - - PUBWEAK TIM1_BRK_IRQHandler - SECTION .text:CODE:REORDER(1) -TIM1_BRK_IRQHandler - B TIM1_BRK_IRQHandler - - PUBWEAK TIM1_UP_IRQHandler - SECTION .text:CODE:REORDER(1) -TIM1_UP_IRQHandler - B TIM1_UP_IRQHandler - - PUBWEAK TIM1_TRG_COM_IRQHandler - SECTION .text:CODE:REORDER(1) -TIM1_TRG_COM_IRQHandler - B TIM1_TRG_COM_IRQHandler - - PUBWEAK TIM1_CC_IRQHandler - SECTION .text:CODE:REORDER(1) -TIM1_CC_IRQHandler - B TIM1_CC_IRQHandler - - PUBWEAK TIM2_IRQHandler - SECTION .text:CODE:REORDER(1) -TIM2_IRQHandler - B TIM2_IRQHandler - - PUBWEAK TIM3_IRQHandler - SECTION .text:CODE:REORDER(1) -TIM3_IRQHandler - B TIM3_IRQHandler - - PUBWEAK TIM4_IRQHandler - SECTION .text:CODE:REORDER(1) -TIM4_IRQHandler - B TIM4_IRQHandler - - PUBWEAK I2C1_EV_IRQHandler - SECTION .text:CODE:REORDER(1) -I2C1_EV_IRQHandler - B I2C1_EV_IRQHandler - - PUBWEAK I2C1_ER_IRQHandler - SECTION .text:CODE:REORDER(1) -I2C1_ER_IRQHandler - B I2C1_ER_IRQHandler - - PUBWEAK I2C2_EV_IRQHandler - SECTION .text:CODE:REORDER(1) -I2C2_EV_IRQHandler - B I2C2_EV_IRQHandler - - PUBWEAK I2C2_ER_IRQHandler - SECTION .text:CODE:REORDER(1) -I2C2_ER_IRQHandler - B I2C2_ER_IRQHandler - - PUBWEAK SPI1_IRQHandler - SECTION .text:CODE:REORDER(1) -SPI1_IRQHandler - B SPI1_IRQHandler - - PUBWEAK SPI2_IRQHandler - SECTION .text:CODE:REORDER(1) -SPI2_IRQHandler - B SPI2_IRQHandler - - PUBWEAK USART1_IRQHandler - SECTION .text:CODE:REORDER(1) -USART1_IRQHandler - B USART1_IRQHandler - - PUBWEAK USART2_IRQHandler - SECTION .text:CODE:REORDER(1) -USART2_IRQHandler - B USART2_IRQHandler - - PUBWEAK USART3_IRQHandler - SECTION .text:CODE:REORDER(1) -USART3_IRQHandler - B USART3_IRQHandler - - PUBWEAK EXTI15_10_IRQHandler - SECTION .text:CODE:REORDER(1) -EXTI15_10_IRQHandler - B EXTI15_10_IRQHandler - - PUBWEAK RTCAlarm_IRQHandler - SECTION .text:CODE:REORDER(1) -RTCAlarm_IRQHandler - B RTCAlarm_IRQHandler - - PUBWEAK USBWakeUp_IRQHandler - SECTION .text:CODE:REORDER(1) -USBWakeUp_IRQHandler - B USBWakeUp_IRQHandler - - PUBWEAK TIM8_BRK_IRQHandler - SECTION .text:CODE:REORDER(1) -TIM8_BRK_IRQHandler - B TIM8_BRK_IRQHandler - - PUBWEAK TIM8_UP_IRQHandler - SECTION .text:CODE:REORDER(1) -TIM8_UP_IRQHandler - B TIM8_UP_IRQHandler - - PUBWEAK TIM8_TRG_COM_IRQHandler - SECTION .text:CODE:REORDER(1) -TIM8_TRG_COM_IRQHandler - B TIM8_TRG_COM_IRQHandler - - PUBWEAK TIM8_CC_IRQHandler - SECTION .text:CODE:REORDER(1) -TIM8_CC_IRQHandler - B TIM8_CC_IRQHandler - - PUBWEAK ADC3_IRQHandler - SECTION .text:CODE:REORDER(1) -ADC3_IRQHandler - B ADC3_IRQHandler - - PUBWEAK FSMC_IRQHandler - SECTION .text:CODE:REORDER(1) -FSMC_IRQHandler - B FSMC_IRQHandler - - PUBWEAK SDIO_IRQHandler - SECTION .text:CODE:REORDER(1) -SDIO_IRQHandler - B SDIO_IRQHandler - - PUBWEAK TIM5_IRQHandler - SECTION .text:CODE:REORDER(1) -TIM5_IRQHandler - B TIM5_IRQHandler - - PUBWEAK SPI3_IRQHandler - SECTION .text:CODE:REORDER(1) -SPI3_IRQHandler - B SPI3_IRQHandler - - PUBWEAK UART4_IRQHandler - SECTION .text:CODE:REORDER(1) -UART4_IRQHandler - B UART4_IRQHandler - - PUBWEAK UART5_IRQHandler - SECTION .text:CODE:REORDER(1) -UART5_IRQHandler - B UART5_IRQHandler - - PUBWEAK TIM6_IRQHandler - SECTION .text:CODE:REORDER(1) -TIM6_IRQHandler - B TIM6_IRQHandler - - PUBWEAK TIM7_IRQHandler - SECTION .text:CODE:REORDER(1) -TIM7_IRQHandler - B TIM7_IRQHandler - - PUBWEAK DMA2_Channel1_IRQHandler - SECTION .text:CODE:REORDER(1) -DMA2_Channel1_IRQHandler - B DMA2_Channel1_IRQHandler - - PUBWEAK DMA2_Channel2_IRQHandler - SECTION .text:CODE:REORDER(1) -DMA2_Channel2_IRQHandler - B DMA2_Channel2_IRQHandler - - PUBWEAK DMA2_Channel3_IRQHandler - SECTION .text:CODE:REORDER(1) -DMA2_Channel3_IRQHandler - B DMA2_Channel3_IRQHandler - - PUBWEAK DMA2_Channel4_5_IRQHandler - SECTION .text:CODE:REORDER(1) -DMA2_Channel4_5_IRQHandler - B DMA2_Channel4_5_IRQHandler - - - END - -/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/Libraries/CMSIS/CM3/DeviceSupport/ST/STM32F10x/startup/iar/startup_stm32f10x_ld.s b/bsp/stm32_radio/Libraries/CMSIS/CM3/DeviceSupport/ST/STM32F10x/startup/iar/startup_stm32f10x_ld.s deleted file mode 100644 index 9c709518f2..0000000000 --- a/bsp/stm32_radio/Libraries/CMSIS/CM3/DeviceSupport/ST/STM32F10x/startup/iar/startup_stm32f10x_ld.s +++ /dev/null @@ -1,366 +0,0 @@ -;/******************** (C) COPYRIGHT 2010 STMicroelectronics ******************** -;* File Name : startup_stm32f10x_ld.s -;* Author : MCD Application Team -;* Version : V3.2.0 -;* Date : 03/01/2010 -;* Description : STM32F10x Low Density Devices vector table for EWARM5.x -;* toolchain. -;* This module performs: -;* - Set the initial SP -;* - Configure the clock system -;* - Set the initial PC == __iar_program_start, -;* - Set the vector table entries with the exceptions ISR -;* address. -;* After Reset the Cortex-M3 processor is in Thread mode, -;* priority is Privileged, and the Stack is set to Main. -;******************************************************************************** -;* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS -;* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. -;* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, -;* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE -;* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING -;* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -;*******************************************************************************/ -; -; -; The modules in this file are included in the libraries, and may be replaced -; by any user-defined modules that define the PUBLIC symbol _program_start or -; a user defined start symbol. -; To override the cstartup defined in the library, simply add your modified -; version to the workbench project. -; -; The vector table is normally located at address 0. -; When debugging in RAM, it can be located in RAM, aligned to at least 2^6. -; The name "__vector_table" has special meaning for C-SPY: -; it is where the SP start value is found, and the NVIC vector -; table register (VTOR) is initialized to this address if != 0. -; -; Cortex-M version -; - - MODULE ?cstartup - - ;; Forward declaration of sections. - SECTION CSTACK:DATA:NOROOT(3) - - SECTION .intvec:CODE:NOROOT(2) - - EXTERN __iar_program_start - EXTERN SystemInit - PUBLIC __vector_table - - DATA -__vector_table - DCD sfe(CSTACK) - DCD Reset_Handler ; Reset Handler - DCD NMI_Handler ; NMI Handler - DCD HardFault_Handler ; Hard Fault Handler - DCD MemManage_Handler ; MPU Fault Handler - DCD BusFault_Handler ; Bus Fault Handler - DCD UsageFault_Handler ; Usage Fault Handler - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD SVC_Handler ; SVCall Handler - DCD DebugMon_Handler ; Debug Monitor Handler - DCD 0 ; Reserved - DCD PendSV_Handler ; PendSV Handler - DCD SysTick_Handler ; SysTick Handler - - ; External Interrupts - DCD WWDG_IRQHandler ; Window Watchdog - DCD PVD_IRQHandler ; PVD through EXTI Line detect - DCD TAMPER_IRQHandler ; Tamper - DCD RTC_IRQHandler ; RTC - DCD FLASH_IRQHandler ; Flash - DCD RCC_IRQHandler ; RCC - DCD EXTI0_IRQHandler ; EXTI Line 0 - DCD EXTI1_IRQHandler ; EXTI Line 1 - DCD EXTI2_IRQHandler ; EXTI Line 2 - DCD EXTI3_IRQHandler ; EXTI Line 3 - DCD EXTI4_IRQHandler ; EXTI Line 4 - DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1 - DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2 - DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3 - DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4 - DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5 - DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6 - DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7 - DCD ADC1_2_IRQHandler ; ADC1 & ADC2 - DCD USB_HP_CAN1_TX_IRQHandler ; USB High Priority or CAN1 TX - DCD USB_LP_CAN1_RX0_IRQHandler ; USB Low Priority or CAN1 RX0 - DCD CAN1_RX1_IRQHandler ; CAN1 RX1 - DCD CAN1_SCE_IRQHandler ; CAN1 SCE - DCD EXTI9_5_IRQHandler ; EXTI Line 9..5 - DCD TIM1_BRK_IRQHandler ; TIM1 Break - DCD TIM1_UP_IRQHandler ; TIM1 Update - DCD TIM1_TRG_COM_IRQHandler ; TIM1 Trigger and Commutation - DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare - DCD TIM2_IRQHandler ; TIM2 - DCD TIM3_IRQHandler ; TIM3 - DCD 0 ; Reserved - DCD I2C1_EV_IRQHandler ; I2C1 Event - DCD I2C1_ER_IRQHandler ; I2C1 Error - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD SPI1_IRQHandler ; SPI1 - DCD 0 ; Reserved - DCD USART1_IRQHandler ; USART1 - DCD USART2_IRQHandler ; USART2 - DCD 0 ; Reserved - DCD EXTI15_10_IRQHandler ; EXTI Line 15..10 - DCD RTCAlarm_IRQHandler ; RTC Alarm through EXTI Line - DCD USBWakeUp_IRQHandler ; USB Wakeup from suspend - -;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -;; -;; Default interrupt handlers. -;; - THUMB - - PUBWEAK Reset_Handler - SECTION .text:CODE:REORDER(2) -Reset_Handler - LDR R0, =SystemInit - BLX R0 - LDR R0, =__iar_program_start - BX R0 - - PUBWEAK NMI_Handler - SECTION .text:CODE:REORDER(1) -NMI_Handler - B NMI_Handler - - PUBWEAK HardFault_Handler - SECTION .text:CODE:REORDER(1) -HardFault_Handler - B HardFault_Handler - - PUBWEAK MemManage_Handler - SECTION .text:CODE:REORDER(1) -MemManage_Handler - B MemManage_Handler - - PUBWEAK BusFault_Handler - SECTION .text:CODE:REORDER(1) -BusFault_Handler - B BusFault_Handler - - PUBWEAK UsageFault_Handler - SECTION .text:CODE:REORDER(1) -UsageFault_Handler - B UsageFault_Handler - - PUBWEAK SVC_Handler - SECTION .text:CODE:REORDER(1) -SVC_Handler - B SVC_Handler - - PUBWEAK DebugMon_Handler - SECTION .text:CODE:REORDER(1) -DebugMon_Handler - B DebugMon_Handler - - PUBWEAK PendSV_Handler - SECTION .text:CODE:REORDER(1) -PendSV_Handler - B PendSV_Handler - - PUBWEAK SysTick_Handler - SECTION .text:CODE:REORDER(1) -SysTick_Handler - B SysTick_Handler - - PUBWEAK WWDG_IRQHandler - SECTION .text:CODE:REORDER(1) -WWDG_IRQHandler - B WWDG_IRQHandler - - PUBWEAK PVD_IRQHandler - SECTION .text:CODE:REORDER(1) -PVD_IRQHandler - B PVD_IRQHandler - - PUBWEAK TAMPER_IRQHandler - SECTION .text:CODE:REORDER(1) -TAMPER_IRQHandler - B TAMPER_IRQHandler - - PUBWEAK RTC_IRQHandler - SECTION .text:CODE:REORDER(1) -RTC_IRQHandler - B RTC_IRQHandler - - PUBWEAK FLASH_IRQHandler - SECTION .text:CODE:REORDER(1) -FLASH_IRQHandler - B FLASH_IRQHandler - - PUBWEAK RCC_IRQHandler - SECTION .text:CODE:REORDER(1) -RCC_IRQHandler - B RCC_IRQHandler - - PUBWEAK EXTI0_IRQHandler - SECTION .text:CODE:REORDER(1) -EXTI0_IRQHandler - B EXTI0_IRQHandler - - PUBWEAK EXTI1_IRQHandler - SECTION .text:CODE:REORDER(1) -EXTI1_IRQHandler - B EXTI1_IRQHandler - - PUBWEAK EXTI2_IRQHandler - SECTION .text:CODE:REORDER(1) -EXTI2_IRQHandler - B EXTI2_IRQHandler - - PUBWEAK EXTI3_IRQHandler - SECTION .text:CODE:REORDER(1) -EXTI3_IRQHandler - B EXTI3_IRQHandler - - PUBWEAK EXTI4_IRQHandler - SECTION .text:CODE:REORDER(1) -EXTI4_IRQHandler - B EXTI4_IRQHandler - - PUBWEAK DMA1_Channel1_IRQHandler - SECTION .text:CODE:REORDER(1) -DMA1_Channel1_IRQHandler - B DMA1_Channel1_IRQHandler - - PUBWEAK DMA1_Channel2_IRQHandler - SECTION .text:CODE:REORDER(1) -DMA1_Channel2_IRQHandler - B DMA1_Channel2_IRQHandler - - PUBWEAK DMA1_Channel3_IRQHandler - SECTION .text:CODE:REORDER(1) -DMA1_Channel3_IRQHandler - B DMA1_Channel3_IRQHandler - - PUBWEAK DMA1_Channel4_IRQHandler - SECTION .text:CODE:REORDER(1) -DMA1_Channel4_IRQHandler - B DMA1_Channel4_IRQHandler - - PUBWEAK DMA1_Channel5_IRQHandler - SECTION .text:CODE:REORDER(1) -DMA1_Channel5_IRQHandler - B DMA1_Channel5_IRQHandler - - PUBWEAK DMA1_Channel6_IRQHandler - SECTION .text:CODE:REORDER(1) -DMA1_Channel6_IRQHandler - B DMA1_Channel6_IRQHandler - - PUBWEAK DMA1_Channel7_IRQHandler - SECTION .text:CODE:REORDER(1) -DMA1_Channel7_IRQHandler - B DMA1_Channel7_IRQHandler - - PUBWEAK ADC1_2_IRQHandler - SECTION .text:CODE:REORDER(1) -ADC1_2_IRQHandler - B ADC1_2_IRQHandler - - PUBWEAK USB_HP_CAN1_TX_IRQHandler - SECTION .text:CODE:REORDER(1) -USB_HP_CAN1_TX_IRQHandler - B USB_HP_CAN1_TX_IRQHandler - - PUBWEAK USB_LP_CAN1_RX0_IRQHandler - SECTION .text:CODE:REORDER(1) -USB_LP_CAN1_RX0_IRQHandler - B USB_LP_CAN1_RX0_IRQHandler - - PUBWEAK CAN1_RX1_IRQHandler - SECTION .text:CODE:REORDER(1) -CAN1_RX1_IRQHandler - B CAN1_RX1_IRQHandler - - PUBWEAK CAN1_SCE_IRQHandler - SECTION .text:CODE:REORDER(1) -CAN1_SCE_IRQHandler - B CAN1_SCE_IRQHandler - - PUBWEAK EXTI9_5_IRQHandler - SECTION .text:CODE:REORDER(1) -EXTI9_5_IRQHandler - B EXTI9_5_IRQHandler - - PUBWEAK TIM1_BRK_IRQHandler - SECTION .text:CODE:REORDER(1) -TIM1_BRK_IRQHandler - B TIM1_BRK_IRQHandler - - PUBWEAK TIM1_UP_IRQHandler - SECTION .text:CODE:REORDER(1) -TIM1_UP_IRQHandler - B TIM1_UP_IRQHandler - - PUBWEAK TIM1_TRG_COM_IRQHandler - SECTION .text:CODE:REORDER(1) -TIM1_TRG_COM_IRQHandler - B TIM1_TRG_COM_IRQHandler - - PUBWEAK TIM1_CC_IRQHandler - SECTION .text:CODE:REORDER(1) -TIM1_CC_IRQHandler - B TIM1_CC_IRQHandler - - PUBWEAK TIM2_IRQHandler - SECTION .text:CODE:REORDER(1) -TIM2_IRQHandler - B TIM2_IRQHandler - - PUBWEAK TIM3_IRQHandler - SECTION .text:CODE:REORDER(1) -TIM3_IRQHandler - B TIM3_IRQHandler - - PUBWEAK I2C1_EV_IRQHandler - SECTION .text:CODE:REORDER(1) -I2C1_EV_IRQHandler - B I2C1_EV_IRQHandler - - PUBWEAK I2C1_ER_IRQHandler - SECTION .text:CODE:REORDER(1) -I2C1_ER_IRQHandler - B I2C1_ER_IRQHandler - - PUBWEAK SPI1_IRQHandler - SECTION .text:CODE:REORDER(1) -SPI1_IRQHandler - B SPI1_IRQHandler - - PUBWEAK USART1_IRQHandler - SECTION .text:CODE:REORDER(1) -USART1_IRQHandler - B USART1_IRQHandler - - PUBWEAK USART2_IRQHandler - SECTION .text:CODE:REORDER(1) -USART2_IRQHandler - B USART2_IRQHandler - - PUBWEAK EXTI15_10_IRQHandler - SECTION .text:CODE:REORDER(1) -EXTI15_10_IRQHandler - B EXTI15_10_IRQHandler - - PUBWEAK RTCAlarm_IRQHandler - SECTION .text:CODE:REORDER(1) -RTCAlarm_IRQHandler - B RTCAlarm_IRQHandler - - PUBWEAK USBWakeUp_IRQHandler - SECTION .text:CODE:REORDER(1) -USBWakeUp_IRQHandler - B USBWakeUp_IRQHandler - - END -/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/Libraries/CMSIS/CM3/DeviceSupport/ST/STM32F10x/startup/iar/startup_stm32f10x_ld_vl.s b/bsp/stm32_radio/Libraries/CMSIS/CM3/DeviceSupport/ST/STM32F10x/startup/iar/startup_stm32f10x_ld_vl.s deleted file mode 100644 index 511a4746c1..0000000000 --- a/bsp/stm32_radio/Libraries/CMSIS/CM3/DeviceSupport/ST/STM32F10x/startup/iar/startup_stm32f10x_ld_vl.s +++ /dev/null @@ -1,369 +0,0 @@ -;/******************** (C) COPYRIGHT 2010 STMicroelectronics ******************** -;* File Name : startup_stm32f10x_ld_vl.s -;* Author : MCD Application Team -;* Version : V3.2.0 -;* Date : 03/01/2010 -;* Description : STM32F10x Low Density Value Line Devices vector table -;* for EWARM5.x toolchain. -;* This module performs: -;* - Set the initial SP -;* - Configure the clock system -;* - Set the initial PC == __iar_program_start, -;* - Set the vector table entries with the exceptions ISR -;* address. -;* After Reset the Cortex-M3 processor is in Thread mode, -;* priority is Privileged, and the Stack is set to Main. -;******************************************************************************** -;* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS -;* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. -;* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, -;* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE -;* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING -;* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -;*******************************************************************************/ -; -; -; The modules in this file are included in the libraries, and may be replaced -; by any user-defined modules that define the PUBLIC symbol _program_start or -; a user defined start symbol. -; To override the cstartup defined in the library, simply add your modified -; version to the workbench project. -; -; The vector table is normally located at address 0. -; When debugging in RAM, it can be located in RAM, aligned to at least 2^6. -; The name "__vector_table" has special meaning for C-SPY: -; it is where the SP start value is found, and the NVIC vector -; table register (VTOR) is initialized to this address if != 0. -; -; Cortex-M version -; - - MODULE ?cstartup - - ;; Forward declaration of sections. - SECTION CSTACK:DATA:NOROOT(3) - - SECTION .intvec:CODE:NOROOT(2) - - EXTERN __iar_program_start - EXTERN SystemInit - PUBLIC __vector_table - - DATA -__vector_table - DCD sfe(CSTACK) - DCD Reset_Handler ; Reset Handler - DCD NMI_Handler ; NMI Handler - DCD HardFault_Handler ; Hard Fault Handler - DCD MemManage_Handler ; MPU Fault Handler - DCD BusFault_Handler ; Bus Fault Handler - DCD UsageFault_Handler ; Usage Fault Handler - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD SVC_Handler ; SVCall Handler - DCD DebugMon_Handler ; Debug Monitor Handler - DCD 0 ; Reserved - DCD PendSV_Handler ; PendSV Handler - DCD SysTick_Handler ; SysTick Handler - - ; External Interrupts - DCD WWDG_IRQHandler ; Window Watchdog - DCD PVD_IRQHandler ; PVD through EXTI Line detect - DCD TAMPER_IRQHandler ; Tamper - DCD RTC_IRQHandler ; RTC - DCD FLASH_IRQHandler ; Flash - DCD RCC_IRQHandler ; RCC - DCD EXTI0_IRQHandler ; EXTI Line 0 - DCD EXTI1_IRQHandler ; EXTI Line 1 - DCD EXTI2_IRQHandler ; EXTI Line 2 - DCD EXTI3_IRQHandler ; EXTI Line 3 - DCD EXTI4_IRQHandler ; EXTI Line 4 - DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1 - DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2 - DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3 - DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4 - DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5 - DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6 - DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7 - DCD ADC1_IRQHandler ; ADC1 - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD EXTI9_5_IRQHandler ; EXTI Line 9..5 - DCD TIM1_BRK_TIM15_IRQHandler ; TIM1 Break and TIM15 - DCD TIM1_UP_TIM16_IRQHandler ; TIM1 Update and TIM16 - DCD TIM1_TRG_COM_TIM17_IRQHandler ; TIM1 Trigger and Commutation and TIM17 - DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare - DCD TIM2_IRQHandler ; TIM2 - DCD TIM3_IRQHandler ; TIM3 - DCD 0 ; Reserved - DCD I2C1_EV_IRQHandler ; I2C1 Event - DCD I2C1_ER_IRQHandler ; I2C1 Error - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD SPI1_IRQHandler ; SPI1 - DCD 0 ; Reserved - DCD USART1_IRQHandler ; USART1 - DCD USART2_IRQHandler ; USART2 - DCD 0 ; Reserved - DCD EXTI15_10_IRQHandler ; EXTI Line 15..10 - DCD RTCAlarm_IRQHandler ; RTC Alarm through EXTI Line - DCD CEC_IRQHandler ; HDMI-CEC - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD TIM6_DAC_IRQHandler ; TIM6 and DAC underrun - DCD TIM7_IRQHandler ; TIM7 - -;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -;; -;; Default interrupt handlers. -;; - THUMB - - PUBWEAK Reset_Handler - SECTION .text:CODE:REORDER(2) -Reset_Handler - LDR R0, =SystemInit - BLX R0 - LDR R0, =__iar_program_start - BX R0 - - PUBWEAK NMI_Handler - SECTION .text:CODE:REORDER(1) -NMI_Handler - B NMI_Handler - - PUBWEAK HardFault_Handler - SECTION .text:CODE:REORDER(1) -HardFault_Handler - B HardFault_Handler - - PUBWEAK MemManage_Handler - SECTION .text:CODE:REORDER(1) -MemManage_Handler - B MemManage_Handler - - PUBWEAK BusFault_Handler - SECTION .text:CODE:REORDER(1) -BusFault_Handler - B BusFault_Handler - - PUBWEAK UsageFault_Handler - SECTION .text:CODE:REORDER(1) -UsageFault_Handler - B UsageFault_Handler - - PUBWEAK SVC_Handler - SECTION .text:CODE:REORDER(1) -SVC_Handler - B SVC_Handler - - PUBWEAK DebugMon_Handler - SECTION .text:CODE:REORDER(1) -DebugMon_Handler - B DebugMon_Handler - - PUBWEAK PendSV_Handler - SECTION .text:CODE:REORDER(1) -PendSV_Handler - B PendSV_Handler - - PUBWEAK SysTick_Handler - SECTION .text:CODE:REORDER(1) -SysTick_Handler - B SysTick_Handler - - PUBWEAK WWDG_IRQHandler - SECTION .text:CODE:REORDER(1) -WWDG_IRQHandler - B WWDG_IRQHandler - - PUBWEAK PVD_IRQHandler - SECTION .text:CODE:REORDER(1) -PVD_IRQHandler - B PVD_IRQHandler - - PUBWEAK TAMPER_IRQHandler - SECTION .text:CODE:REORDER(1) -TAMPER_IRQHandler - B TAMPER_IRQHandler - - PUBWEAK RTC_IRQHandler - SECTION .text:CODE:REORDER(1) -RTC_IRQHandler - B RTC_IRQHandler - - PUBWEAK FLASH_IRQHandler - SECTION .text:CODE:REORDER(1) -FLASH_IRQHandler - B FLASH_IRQHandler - - PUBWEAK RCC_IRQHandler - SECTION .text:CODE:REORDER(1) -RCC_IRQHandler - B RCC_IRQHandler - - PUBWEAK EXTI0_IRQHandler - SECTION .text:CODE:REORDER(1) -EXTI0_IRQHandler - B EXTI0_IRQHandler - - PUBWEAK EXTI1_IRQHandler - SECTION .text:CODE:REORDER(1) -EXTI1_IRQHandler - B EXTI1_IRQHandler - - PUBWEAK EXTI2_IRQHandler - SECTION .text:CODE:REORDER(1) -EXTI2_IRQHandler - B EXTI2_IRQHandler - - PUBWEAK EXTI3_IRQHandler - SECTION .text:CODE:REORDER(1) -EXTI3_IRQHandler - B EXTI3_IRQHandler - - PUBWEAK EXTI4_IRQHandler - SECTION .text:CODE:REORDER(1) -EXTI4_IRQHandler - B EXTI4_IRQHandler - - PUBWEAK DMA1_Channel1_IRQHandler - SECTION .text:CODE:REORDER(1) -DMA1_Channel1_IRQHandler - B DMA1_Channel1_IRQHandler - - PUBWEAK DMA1_Channel2_IRQHandler - SECTION .text:CODE:REORDER(1) -DMA1_Channel2_IRQHandler - B DMA1_Channel2_IRQHandler - - PUBWEAK DMA1_Channel3_IRQHandler - SECTION .text:CODE:REORDER(1) -DMA1_Channel3_IRQHandler - B DMA1_Channel3_IRQHandler - - PUBWEAK DMA1_Channel4_IRQHandler - SECTION .text:CODE:REORDER(1) -DMA1_Channel4_IRQHandler - B DMA1_Channel4_IRQHandler - - PUBWEAK DMA1_Channel5_IRQHandler - SECTION .text:CODE:REORDER(1) -DMA1_Channel5_IRQHandler - B DMA1_Channel5_IRQHandler - - PUBWEAK DMA1_Channel6_IRQHandler - SECTION .text:CODE:REORDER(1) -DMA1_Channel6_IRQHandler - B DMA1_Channel6_IRQHandler - - PUBWEAK DMA1_Channel7_IRQHandler - SECTION .text:CODE:REORDER(1) -DMA1_Channel7_IRQHandler - B DMA1_Channel7_IRQHandler - - PUBWEAK ADC1_IRQHandler - SECTION .text:CODE:REORDER(1) -ADC1_IRQHandler - B ADC1_IRQHandler - - PUBWEAK EXTI9_5_IRQHandler - SECTION .text:CODE:REORDER(1) -EXTI9_5_IRQHandler - B EXTI9_5_IRQHandler - - PUBWEAK TIM1_BRK_TIM15_IRQHandler - SECTION .text:CODE:REORDER(1) -TIM1_BRK_TIM15_IRQHandler - B TIM1_BRK_TIM15_IRQHandler - - PUBWEAK TIM1_UP_TIM16_IRQHandler - SECTION .text:CODE:REORDER(1) -TIM1_UP_TIM16_IRQHandler - B TIM1_UP_TIM16_IRQHandler - - PUBWEAK TIM1_TRG_COM_TIM17_IRQHandler - SECTION .text:CODE:REORDER(1) -TIM1_TRG_COM_TIM17_IRQHandler - B TIM1_TRG_COM_TIM17_IRQHandler - - PUBWEAK TIM1_CC_IRQHandler - SECTION .text:CODE:REORDER(1) -TIM1_CC_IRQHandler - B TIM1_CC_IRQHandler - - PUBWEAK TIM2_IRQHandler - SECTION .text:CODE:REORDER(1) -TIM2_IRQHandler - B TIM2_IRQHandler - - PUBWEAK TIM3_IRQHandler - SECTION .text:CODE:REORDER(1) -TIM3_IRQHandler - B TIM3_IRQHandler - - PUBWEAK I2C1_EV_IRQHandler - SECTION .text:CODE:REORDER(1) -I2C1_EV_IRQHandler - B I2C1_EV_IRQHandler - - PUBWEAK I2C1_ER_IRQHandler - SECTION .text:CODE:REORDER(1) -I2C1_ER_IRQHandler - B I2C1_ER_IRQHandler - - PUBWEAK SPI1_IRQHandler - SECTION .text:CODE:REORDER(1) -SPI1_IRQHandler - B SPI1_IRQHandler - - PUBWEAK USART1_IRQHandler - SECTION .text:CODE:REORDER(1) -USART1_IRQHandler - B USART1_IRQHandler - - PUBWEAK USART2_IRQHandler - SECTION .text:CODE:REORDER(1) -USART2_IRQHandler - B USART2_IRQHandler - - PUBWEAK EXTI15_10_IRQHandler - SECTION .text:CODE:REORDER(1) -EXTI15_10_IRQHandler - B EXTI15_10_IRQHandler - - PUBWEAK RTCAlarm_IRQHandler - SECTION .text:CODE:REORDER(1) -RTCAlarm_IRQHandler - B RTCAlarm_IRQHandler - - PUBWEAK CEC_IRQHandler - SECTION .text:CODE:REORDER(1) -CEC_IRQHandler - B CEC_IRQHandler - - PUBWEAK TIM6_DAC_IRQHandler - SECTION .text:CODE:REORDER(1) -TIM6_DAC_IRQHandler - B TIM6_DAC_IRQHandler - - PUBWEAK TIM7_IRQHandler - SECTION .text:CODE:REORDER(1) -TIM7_IRQHandler - B TIM7_IRQHandler - - END -/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/Libraries/CMSIS/CM3/DeviceSupport/ST/STM32F10x/startup/iar/startup_stm32f10x_md.s b/bsp/stm32_radio/Libraries/CMSIS/CM3/DeviceSupport/ST/STM32F10x/startup/iar/startup_stm32f10x_md.s deleted file mode 100644 index b767c0e216..0000000000 --- a/bsp/stm32_radio/Libraries/CMSIS/CM3/DeviceSupport/ST/STM32F10x/startup/iar/startup_stm32f10x_md.s +++ /dev/null @@ -1,391 +0,0 @@ -;/******************** (C) COPYRIGHT 2010 STMicroelectronics ******************** -;* File Name : startup_stm32f10x_md.s -;* Author : MCD Application Team -;* Version : V3.2.0 -;* Date : 03/01/2010 -;* Description : STM32F10x Medium Density Devices vector table for -;* EWARM5.x toolchain. -;* This module performs: -;* - Set the initial SP -;* - Configure the clock system -;* - Set the initial PC == __iar_program_start, -;* - Set the vector table entries with the exceptions ISR -;* address. -;* After Reset the Cortex-M3 processor is in Thread mode, -;* priority is Privileged, and the Stack is set to Main. -;******************************************************************************** -;* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS -;* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. -;* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, -;* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE -;* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING -;* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -;*******************************************************************************/ -; -; -; The modules in this file are included in the libraries, and may be replaced -; by any user-defined modules that define the PUBLIC symbol _program_start or -; a user defined start symbol. -; To override the cstartup defined in the library, simply add your modified -; version to the workbench project. -; -; The vector table is normally located at address 0. -; When debugging in RAM, it can be located in RAM, aligned to at least 2^6. -; The name "__vector_table" has special meaning for C-SPY: -; it is where the SP start value is found, and the NVIC vector -; table register (VTOR) is initialized to this address if != 0. -; -; Cortex-M version -; - - MODULE ?cstartup - - ;; Forward declaration of sections. - SECTION CSTACK:DATA:NOROOT(3) - - SECTION .intvec:CODE:NOROOT(2) - - EXTERN __iar_program_start - EXTERN SystemInit - PUBLIC __vector_table - - DATA -__vector_table - DCD sfe(CSTACK) - DCD Reset_Handler ; Reset Handler - DCD NMI_Handler ; NMI Handler - DCD HardFault_Handler ; Hard Fault Handler - DCD MemManage_Handler ; MPU Fault Handler - DCD BusFault_Handler ; Bus Fault Handler - DCD UsageFault_Handler ; Usage Fault Handler - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD SVC_Handler ; SVCall Handler - DCD DebugMon_Handler ; Debug Monitor Handler - DCD 0 ; Reserved - DCD PendSV_Handler ; PendSV Handler - DCD SysTick_Handler ; SysTick Handler - - ; External Interrupts - DCD WWDG_IRQHandler ; Window Watchdog - DCD PVD_IRQHandler ; PVD through EXTI Line detect - DCD TAMPER_IRQHandler ; Tamper - DCD RTC_IRQHandler ; RTC - DCD FLASH_IRQHandler ; Flash - DCD RCC_IRQHandler ; RCC - DCD EXTI0_IRQHandler ; EXTI Line 0 - DCD EXTI1_IRQHandler ; EXTI Line 1 - DCD EXTI2_IRQHandler ; EXTI Line 2 - DCD EXTI3_IRQHandler ; EXTI Line 3 - DCD EXTI4_IRQHandler ; EXTI Line 4 - DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1 - DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2 - DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3 - DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4 - DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5 - DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6 - DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7 - DCD ADC1_2_IRQHandler ; ADC1 & ADC2 - DCD USB_HP_CAN1_TX_IRQHandler ; USB High Priority or CAN1 TX - DCD USB_LP_CAN1_RX0_IRQHandler ; USB Low Priority or CAN1 RX0 - DCD CAN1_RX1_IRQHandler ; CAN1 RX1 - DCD CAN1_SCE_IRQHandler ; CAN1 SCE - DCD EXTI9_5_IRQHandler ; EXTI Line 9..5 - DCD TIM1_BRK_IRQHandler ; TIM1 Break - DCD TIM1_UP_IRQHandler ; TIM1 Update - DCD TIM1_TRG_COM_IRQHandler ; TIM1 Trigger and Commutation - DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare - DCD TIM2_IRQHandler ; TIM2 - DCD TIM3_IRQHandler ; TIM3 - DCD TIM4_IRQHandler ; TIM4 - DCD I2C1_EV_IRQHandler ; I2C1 Event - DCD I2C1_ER_IRQHandler ; I2C1 Error - DCD I2C2_EV_IRQHandler ; I2C2 Event - DCD I2C2_ER_IRQHandler ; I2C2 Error - DCD SPI1_IRQHandler ; SPI1 - DCD SPI2_IRQHandler ; SPI2 - DCD USART1_IRQHandler ; USART1 - DCD USART2_IRQHandler ; USART2 - DCD USART3_IRQHandler ; USART3 - DCD EXTI15_10_IRQHandler ; EXTI Line 15..10 - DCD RTCAlarm_IRQHandler ; RTC Alarm through EXTI Line - DCD USBWakeUp_IRQHandler ; USB Wakeup from suspend - -;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -;; -;; Default interrupt handlers. -;; - THUMB - - PUBWEAK Reset_Handler - SECTION .text:CODE:REORDER(2) -Reset_Handler - LDR R0, =SystemInit - BLX R0 - LDR R0, =__iar_program_start - BX R0 - - PUBWEAK NMI_Handler - SECTION .text:CODE:REORDER(1) -NMI_Handler - B NMI_Handler - - PUBWEAK HardFault_Handler - SECTION .text:CODE:REORDER(1) -HardFault_Handler - B HardFault_Handler - - PUBWEAK MemManage_Handler - SECTION .text:CODE:REORDER(1) -MemManage_Handler - B MemManage_Handler - - PUBWEAK BusFault_Handler - SECTION .text:CODE:REORDER(1) -BusFault_Handler - B BusFault_Handler - - PUBWEAK UsageFault_Handler - SECTION .text:CODE:REORDER(1) -UsageFault_Handler - B UsageFault_Handler - - PUBWEAK SVC_Handler - SECTION .text:CODE:REORDER(1) -SVC_Handler - B SVC_Handler - - PUBWEAK DebugMon_Handler - SECTION .text:CODE:REORDER(1) -DebugMon_Handler - B DebugMon_Handler - - PUBWEAK PendSV_Handler - SECTION .text:CODE:REORDER(1) -PendSV_Handler - B PendSV_Handler - - PUBWEAK SysTick_Handler - SECTION .text:CODE:REORDER(1) -SysTick_Handler - B SysTick_Handler - - PUBWEAK WWDG_IRQHandler - SECTION .text:CODE:REORDER(1) -WWDG_IRQHandler - B WWDG_IRQHandler - - PUBWEAK PVD_IRQHandler - SECTION .text:CODE:REORDER(1) -PVD_IRQHandler - B PVD_IRQHandler - - PUBWEAK TAMPER_IRQHandler - SECTION .text:CODE:REORDER(1) -TAMPER_IRQHandler - B TAMPER_IRQHandler - - PUBWEAK RTC_IRQHandler - SECTION .text:CODE:REORDER(1) -RTC_IRQHandler - B RTC_IRQHandler - - PUBWEAK FLASH_IRQHandler - SECTION .text:CODE:REORDER(1) -FLASH_IRQHandler - B FLASH_IRQHandler - - PUBWEAK RCC_IRQHandler - SECTION .text:CODE:REORDER(1) -RCC_IRQHandler - B RCC_IRQHandler - - PUBWEAK EXTI0_IRQHandler - SECTION .text:CODE:REORDER(1) -EXTI0_IRQHandler - B EXTI0_IRQHandler - - PUBWEAK EXTI1_IRQHandler - SECTION .text:CODE:REORDER(1) -EXTI1_IRQHandler - B EXTI1_IRQHandler - - PUBWEAK EXTI2_IRQHandler - SECTION .text:CODE:REORDER(1) -EXTI2_IRQHandler - B EXTI2_IRQHandler - - PUBWEAK EXTI3_IRQHandler - SECTION .text:CODE:REORDER(1) -EXTI3_IRQHandler - B EXTI3_IRQHandler - - PUBWEAK EXTI4_IRQHandler - SECTION .text:CODE:REORDER(1) -EXTI4_IRQHandler - B EXTI4_IRQHandler - - PUBWEAK DMA1_Channel1_IRQHandler - SECTION .text:CODE:REORDER(1) -DMA1_Channel1_IRQHandler - B DMA1_Channel1_IRQHandler - - PUBWEAK DMA1_Channel2_IRQHandler - SECTION .text:CODE:REORDER(1) -DMA1_Channel2_IRQHandler - B DMA1_Channel2_IRQHandler - - PUBWEAK DMA1_Channel3_IRQHandler - SECTION .text:CODE:REORDER(1) -DMA1_Channel3_IRQHandler - B DMA1_Channel3_IRQHandler - - PUBWEAK DMA1_Channel4_IRQHandler - SECTION .text:CODE:REORDER(1) -DMA1_Channel4_IRQHandler - B DMA1_Channel4_IRQHandler - - PUBWEAK DMA1_Channel5_IRQHandler - SECTION .text:CODE:REORDER(1) -DMA1_Channel5_IRQHandler - B DMA1_Channel5_IRQHandler - - PUBWEAK DMA1_Channel6_IRQHandler - SECTION .text:CODE:REORDER(1) -DMA1_Channel6_IRQHandler - B DMA1_Channel6_IRQHandler - - PUBWEAK DMA1_Channel7_IRQHandler - SECTION .text:CODE:REORDER(1) -DMA1_Channel7_IRQHandler - B DMA1_Channel7_IRQHandler - - PUBWEAK ADC1_2_IRQHandler - SECTION .text:CODE:REORDER(1) -ADC1_2_IRQHandler - B ADC1_2_IRQHandler - - PUBWEAK USB_HP_CAN1_TX_IRQHandler - SECTION .text:CODE:REORDER(1) -USB_HP_CAN1_TX_IRQHandler - B USB_HP_CAN1_TX_IRQHandler - - PUBWEAK USB_LP_CAN1_RX0_IRQHandler - SECTION .text:CODE:REORDER(1) -USB_LP_CAN1_RX0_IRQHandler - B USB_LP_CAN1_RX0_IRQHandler - - PUBWEAK CAN1_RX1_IRQHandler - SECTION .text:CODE:REORDER(1) -CAN1_RX1_IRQHandler - B CAN1_RX1_IRQHandler - - PUBWEAK CAN1_SCE_IRQHandler - SECTION .text:CODE:REORDER(1) -CAN1_SCE_IRQHandler - B CAN1_SCE_IRQHandler - - PUBWEAK EXTI9_5_IRQHandler - SECTION .text:CODE:REORDER(1) -EXTI9_5_IRQHandler - B EXTI9_5_IRQHandler - - PUBWEAK TIM1_BRK_IRQHandler - SECTION .text:CODE:REORDER(1) -TIM1_BRK_IRQHandler - B TIM1_BRK_IRQHandler - - PUBWEAK TIM1_UP_IRQHandler - SECTION .text:CODE:REORDER(1) -TIM1_UP_IRQHandler - B TIM1_UP_IRQHandler - - PUBWEAK TIM1_TRG_COM_IRQHandler - SECTION .text:CODE:REORDER(1) -TIM1_TRG_COM_IRQHandler - B TIM1_TRG_COM_IRQHandler - - PUBWEAK TIM1_CC_IRQHandler - SECTION .text:CODE:REORDER(1) -TIM1_CC_IRQHandler - B TIM1_CC_IRQHandler - - PUBWEAK TIM2_IRQHandler - SECTION .text:CODE:REORDER(1) -TIM2_IRQHandler - B TIM2_IRQHandler - - PUBWEAK TIM3_IRQHandler - SECTION .text:CODE:REORDER(1) -TIM3_IRQHandler - B TIM3_IRQHandler - - PUBWEAK TIM4_IRQHandler - SECTION .text:CODE:REORDER(1) -TIM4_IRQHandler - B TIM4_IRQHandler - - PUBWEAK I2C1_EV_IRQHandler - SECTION .text:CODE:REORDER(1) -I2C1_EV_IRQHandler - B I2C1_EV_IRQHandler - - PUBWEAK I2C1_ER_IRQHandler - SECTION .text:CODE:REORDER(1) -I2C1_ER_IRQHandler - B I2C1_ER_IRQHandler - - PUBWEAK I2C2_EV_IRQHandler - SECTION .text:CODE:REORDER(1) -I2C2_EV_IRQHandler - B I2C2_EV_IRQHandler - - PUBWEAK I2C2_ER_IRQHandler - SECTION .text:CODE:REORDER(1) -I2C2_ER_IRQHandler - B I2C2_ER_IRQHandler - - PUBWEAK SPI1_IRQHandler - SECTION .text:CODE:REORDER(1) -SPI1_IRQHandler - B SPI1_IRQHandler - - PUBWEAK SPI2_IRQHandler - SECTION .text:CODE:REORDER(1) -SPI2_IRQHandler - B SPI2_IRQHandler - - PUBWEAK USART1_IRQHandler - SECTION .text:CODE:REORDER(1) -USART1_IRQHandler - B USART1_IRQHandler - - PUBWEAK USART2_IRQHandler - SECTION .text:CODE:REORDER(1) -USART2_IRQHandler - B USART2_IRQHandler - - PUBWEAK USART3_IRQHandler - SECTION .text:CODE:REORDER(1) -USART3_IRQHandler - B USART3_IRQHandler - - PUBWEAK EXTI15_10_IRQHandler - SECTION .text:CODE:REORDER(1) -EXTI15_10_IRQHandler - B EXTI15_10_IRQHandler - - PUBWEAK RTCAlarm_IRQHandler - SECTION .text:CODE:REORDER(1) -RTCAlarm_IRQHandler - B RTCAlarm_IRQHandler - - PUBWEAK USBWakeUp_IRQHandler - SECTION .text:CODE:REORDER(1) -USBWakeUp_IRQHandler - B USBWakeUp_IRQHandler - - END -/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/Libraries/CMSIS/CM3/DeviceSupport/ST/STM32F10x/startup/iar/startup_stm32f10x_md_vl.s b/bsp/stm32_radio/Libraries/CMSIS/CM3/DeviceSupport/ST/STM32F10x/startup/iar/startup_stm32f10x_md_vl.s deleted file mode 100644 index e72a294013..0000000000 --- a/bsp/stm32_radio/Libraries/CMSIS/CM3/DeviceSupport/ST/STM32F10x/startup/iar/startup_stm32f10x_md_vl.s +++ /dev/null @@ -1,394 +0,0 @@ -;/******************** (C) COPYRIGHT 2010 STMicroelectronics ******************** -;* File Name : startup_stm32f10x_md_vl.s -;* Author : MCD Application Team -;* Version : V3.2.0 -;* Date : 03/01/2010 -;* Description : STM32F10x Medium Density Value Line Devices vector table -;* for EWARM5.x toolchain. -;* This module performs: -;* - Set the initial SP -;* - Configure the clock system -;* - Set the initial PC == __iar_program_start, -;* - Set the vector table entries with the exceptions ISR -;* address. -;* After Reset the Cortex-M3 processor is in Thread mode, -;* priority is Privileged, and the Stack is set to Main. -;******************************************************************************** -;* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS -;* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. -;* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, -;* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE -;* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING -;* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -;*******************************************************************************/ -; -; -; The modules in this file are included in the libraries, and may be replaced -; by any user-defined modules that define the PUBLIC symbol _program_start or -; a user defined start symbol. -; To override the cstartup defined in the library, simply add your modified -; version to the workbench project. -; -; The vector table is normally located at address 0. -; When debugging in RAM, it can be located in RAM, aligned to at least 2^6. -; The name "__vector_table" has special meaning for C-SPY: -; it is where the SP start value is found, and the NVIC vector -; table register (VTOR) is initialized to this address if != 0. -; -; Cortex-M version -; - - MODULE ?cstartup - - ;; Forward declaration of sections. - SECTION CSTACK:DATA:NOROOT(3) - - SECTION .intvec:CODE:NOROOT(2) - - EXTERN __iar_program_start - EXTERN SystemInit - PUBLIC __vector_table - - DATA -__vector_table - DCD sfe(CSTACK) - DCD Reset_Handler ; Reset Handler - DCD NMI_Handler ; NMI Handler - DCD HardFault_Handler ; Hard Fault Handler - DCD MemManage_Handler ; MPU Fault Handler - DCD BusFault_Handler ; Bus Fault Handler - DCD UsageFault_Handler ; Usage Fault Handler - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD SVC_Handler ; SVCall Handler - DCD DebugMon_Handler ; Debug Monitor Handler - DCD 0 ; Reserved - DCD PendSV_Handler ; PendSV Handler - DCD SysTick_Handler ; SysTick Handler - - ; External Interrupts - DCD WWDG_IRQHandler ; Window Watchdog - DCD PVD_IRQHandler ; PVD through EXTI Line detect - DCD TAMPER_IRQHandler ; Tamper - DCD RTC_IRQHandler ; RTC - DCD FLASH_IRQHandler ; Flash - DCD RCC_IRQHandler ; RCC - DCD EXTI0_IRQHandler ; EXTI Line 0 - DCD EXTI1_IRQHandler ; EXTI Line 1 - DCD EXTI2_IRQHandler ; EXTI Line 2 - DCD EXTI3_IRQHandler ; EXTI Line 3 - DCD EXTI4_IRQHandler ; EXTI Line 4 - DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1 - DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2 - DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3 - DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4 - DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5 - DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6 - DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7 - DCD ADC1_IRQHandler ; ADC1 - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD EXTI9_5_IRQHandler ; EXTI Line 9..5 - DCD TIM1_BRK_TIM15_IRQHandler ; TIM1 Break and TIM15 - DCD TIM1_UP_TIM16_IRQHandler ; TIM1 Update and TIM16 - DCD TIM1_TRG_COM_TIM17_IRQHandler ; TIM1 Trigger and Commutation and TIM17 - DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare - DCD TIM2_IRQHandler ; TIM2 - DCD TIM3_IRQHandler ; TIM3 - DCD TIM4_IRQHandler ; TIM4 - DCD I2C1_EV_IRQHandler ; I2C1 Event - DCD I2C1_ER_IRQHandler ; I2C1 Error - DCD I2C2_EV_IRQHandler ; I2C2 Event - DCD I2C2_ER_IRQHandler ; I2C2 Error - DCD SPI1_IRQHandler ; SPI1 - DCD SPI2_IRQHandler ; SPI2 - DCD USART1_IRQHandler ; USART1 - DCD USART2_IRQHandler ; USART2 - DCD USART3_IRQHandler ; USART3 - DCD EXTI15_10_IRQHandler ; EXTI Line 15..10 - DCD RTCAlarm_IRQHandler ; RTC Alarm through EXTI Line - DCD CEC_IRQHandler ; HDMI-CEC - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD TIM6_DAC_IRQHandler ; TIM6 and DAC underrun - DCD TIM7_IRQHandler ; TIM7 - -;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -;; -;; Default interrupt handlers. -;; - THUMB - - PUBWEAK Reset_Handler - SECTION .text:CODE:REORDER(2) -Reset_Handler - LDR R0, =SystemInit - BLX R0 - LDR R0, =__iar_program_start - BX R0 - - PUBWEAK NMI_Handler - SECTION .text:CODE:REORDER(1) -NMI_Handler - B NMI_Handler - - PUBWEAK HardFault_Handler - SECTION .text:CODE:REORDER(1) -HardFault_Handler - B HardFault_Handler - - PUBWEAK MemManage_Handler - SECTION .text:CODE:REORDER(1) -MemManage_Handler - B MemManage_Handler - - PUBWEAK BusFault_Handler - SECTION .text:CODE:REORDER(1) -BusFault_Handler - B BusFault_Handler - - PUBWEAK UsageFault_Handler - SECTION .text:CODE:REORDER(1) -UsageFault_Handler - B UsageFault_Handler - - PUBWEAK SVC_Handler - SECTION .text:CODE:REORDER(1) -SVC_Handler - B SVC_Handler - - PUBWEAK DebugMon_Handler - SECTION .text:CODE:REORDER(1) -DebugMon_Handler - B DebugMon_Handler - - PUBWEAK PendSV_Handler - SECTION .text:CODE:REORDER(1) -PendSV_Handler - B PendSV_Handler - - PUBWEAK SysTick_Handler - SECTION .text:CODE:REORDER(1) -SysTick_Handler - B SysTick_Handler - - PUBWEAK WWDG_IRQHandler - SECTION .text:CODE:REORDER(1) -WWDG_IRQHandler - B WWDG_IRQHandler - - PUBWEAK PVD_IRQHandler - SECTION .text:CODE:REORDER(1) -PVD_IRQHandler - B PVD_IRQHandler - - PUBWEAK TAMPER_IRQHandler - SECTION .text:CODE:REORDER(1) -TAMPER_IRQHandler - B TAMPER_IRQHandler - - PUBWEAK RTC_IRQHandler - SECTION .text:CODE:REORDER(1) -RTC_IRQHandler - B RTC_IRQHandler - - PUBWEAK FLASH_IRQHandler - SECTION .text:CODE:REORDER(1) -FLASH_IRQHandler - B FLASH_IRQHandler - - PUBWEAK RCC_IRQHandler - SECTION .text:CODE:REORDER(1) -RCC_IRQHandler - B RCC_IRQHandler - - PUBWEAK EXTI0_IRQHandler - SECTION .text:CODE:REORDER(1) -EXTI0_IRQHandler - B EXTI0_IRQHandler - - PUBWEAK EXTI1_IRQHandler - SECTION .text:CODE:REORDER(1) -EXTI1_IRQHandler - B EXTI1_IRQHandler - - PUBWEAK EXTI2_IRQHandler - SECTION .text:CODE:REORDER(1) -EXTI2_IRQHandler - B EXTI2_IRQHandler - - PUBWEAK EXTI3_IRQHandler - SECTION .text:CODE:REORDER(1) -EXTI3_IRQHandler - B EXTI3_IRQHandler - - PUBWEAK EXTI4_IRQHandler - SECTION .text:CODE:REORDER(1) -EXTI4_IRQHandler - B EXTI4_IRQHandler - - PUBWEAK DMA1_Channel1_IRQHandler - SECTION .text:CODE:REORDER(1) -DMA1_Channel1_IRQHandler - B DMA1_Channel1_IRQHandler - - PUBWEAK DMA1_Channel2_IRQHandler - SECTION .text:CODE:REORDER(1) -DMA1_Channel2_IRQHandler - B DMA1_Channel2_IRQHandler - - PUBWEAK DMA1_Channel3_IRQHandler - SECTION .text:CODE:REORDER(1) -DMA1_Channel3_IRQHandler - B DMA1_Channel3_IRQHandler - - PUBWEAK DMA1_Channel4_IRQHandler - SECTION .text:CODE:REORDER(1) -DMA1_Channel4_IRQHandler - B DMA1_Channel4_IRQHandler - - PUBWEAK DMA1_Channel5_IRQHandler - SECTION .text:CODE:REORDER(1) -DMA1_Channel5_IRQHandler - B DMA1_Channel5_IRQHandler - - PUBWEAK DMA1_Channel6_IRQHandler - SECTION .text:CODE:REORDER(1) -DMA1_Channel6_IRQHandler - B DMA1_Channel6_IRQHandler - - PUBWEAK DMA1_Channel7_IRQHandler - SECTION .text:CODE:REORDER(1) -DMA1_Channel7_IRQHandler - B DMA1_Channel7_IRQHandler - - PUBWEAK ADC1_IRQHandler - SECTION .text:CODE:REORDER(1) -ADC1_IRQHandler - B ADC1_IRQHandler - - PUBWEAK EXTI9_5_IRQHandler - SECTION .text:CODE:REORDER(1) -EXTI9_5_IRQHandler - B EXTI9_5_IRQHandler - - PUBWEAK TIM1_BRK_TIM15_IRQHandler - SECTION .text:CODE:REORDER(1) -TIM1_BRK_TIM15_IRQHandler - B TIM1_BRK_TIM15_IRQHandler - - PUBWEAK TIM1_UP_TIM16_IRQHandler - SECTION .text:CODE:REORDER(1) -TIM1_UP_TIM16_IRQHandler - B TIM1_UP_TIM16_IRQHandler - - PUBWEAK TIM1_TRG_COM_TIM17_IRQHandler - SECTION .text:CODE:REORDER(1) -TIM1_TRG_COM_TIM17_IRQHandler - B TIM1_TRG_COM_TIM17_IRQHandler - - PUBWEAK TIM1_CC_IRQHandler - SECTION .text:CODE:REORDER(1) -TIM1_CC_IRQHandler - B TIM1_CC_IRQHandler - - PUBWEAK TIM2_IRQHandler - SECTION .text:CODE:REORDER(1) -TIM2_IRQHandler - B TIM2_IRQHandler - - PUBWEAK TIM3_IRQHandler - SECTION .text:CODE:REORDER(1) -TIM3_IRQHandler - B TIM3_IRQHandler - - PUBWEAK TIM4_IRQHandler - SECTION .text:CODE:REORDER(1) -TIM4_IRQHandler - B TIM4_IRQHandler - - PUBWEAK I2C1_EV_IRQHandler - SECTION .text:CODE:REORDER(1) -I2C1_EV_IRQHandler - B I2C1_EV_IRQHandler - - PUBWEAK I2C1_ER_IRQHandler - SECTION .text:CODE:REORDER(1) -I2C1_ER_IRQHandler - B I2C1_ER_IRQHandler - - PUBWEAK I2C2_EV_IRQHandler - SECTION .text:CODE:REORDER(1) -I2C2_EV_IRQHandler - B I2C2_EV_IRQHandler - - PUBWEAK I2C2_ER_IRQHandler - SECTION .text:CODE:REORDER(1) -I2C2_ER_IRQHandler - B I2C2_ER_IRQHandler - - PUBWEAK SPI1_IRQHandler - SECTION .text:CODE:REORDER(1) -SPI1_IRQHandler - B SPI1_IRQHandler - - PUBWEAK SPI2_IRQHandler - SECTION .text:CODE:REORDER(1) -SPI2_IRQHandler - B SPI2_IRQHandler - - PUBWEAK USART1_IRQHandler - SECTION .text:CODE:REORDER(1) -USART1_IRQHandler - B USART1_IRQHandler - - PUBWEAK USART2_IRQHandler - SECTION .text:CODE:REORDER(1) -USART2_IRQHandler - B USART2_IRQHandler - - PUBWEAK USART3_IRQHandler - SECTION .text:CODE:REORDER(1) -USART3_IRQHandler - B USART3_IRQHandler - - PUBWEAK EXTI15_10_IRQHandler - SECTION .text:CODE:REORDER(1) -EXTI15_10_IRQHandler - B EXTI15_10_IRQHandler - - PUBWEAK RTCAlarm_IRQHandler - SECTION .text:CODE:REORDER(1) -RTCAlarm_IRQHandler - B RTCAlarm_IRQHandler - - PUBWEAK CEC_IRQHandler - SECTION .text:CODE:REORDER(1) -CEC_IRQHandler - B CEC_IRQHandler - - PUBWEAK TIM6_DAC_IRQHandler - SECTION .text:CODE:REORDER(1) -TIM6_DAC_IRQHandler - B TIM6_DAC_IRQHandler - - PUBWEAK TIM7_IRQHandler - SECTION .text:CODE:REORDER(1) -TIM7_IRQHandler - B TIM7_IRQHandler - - END -/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/Libraries/CMSIS/CM3/DeviceSupport/ST/STM32F10x/stm32f10x.h b/bsp/stm32_radio/Libraries/CMSIS/CM3/DeviceSupport/ST/STM32F10x/stm32f10x.h deleted file mode 100644 index 46098c283e..0000000000 --- a/bsp/stm32_radio/Libraries/CMSIS/CM3/DeviceSupport/ST/STM32F10x/stm32f10x.h +++ /dev/null @@ -1,8112 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f10x.h - * @author MCD Application Team - * @version V3.2.0 - * @date 03/01/2010 - * @brief CMSIS Cortex-M3 Device Peripheral Access Layer Header File. - * This file contains all the peripheral register's definitions, bits - * definitions and memory mapping for STM32F10x Connectivity line, High - * density, Medium density, Medium density Value line, Low density - * and Low density Value line devices. - ****************************************************************************** - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2010 STMicroelectronics

- ****************************************************************************** - */ - -/** @addtogroup CMSIS - * @{ - */ - -/** @addtogroup stm32f10x - * @{ - */ - -#ifndef __STM32F10x_H -#define __STM32F10x_H - -#ifdef __cplusplus - extern "C" { -#endif - -/** @addtogroup Library_configuration_section - * @{ - */ - -/* Uncomment the line below according to the target STM32 device used in your - application - */ - -#if !defined (STM32F10X_LD) && !defined (STM32F10X_LD_VL) && !defined (STM32F10X_MD) && !defined (STM32F10X_MD_VL) && !defined (STM32F10X_HD) && !defined (STM32F10X_CL) - /* #define STM32F10X_LD */ /*!< STM32F10X_LD: STM32 Low density devices */ - /* #define STM32F10X_LD_VL */ /*!< STM32F10X_LD_VL: STM32 Low density Value Line devices */ - /* #define STM32F10X_MD */ /*!< STM32F10X_MD: STM32 Medium density devices */ - #define STM32F10X_MD_VL /*!< STM32F10X_MD_VL: STM32 Medium density Value Line devices */ - /* #define STM32F10X_HD */ /*!< STM32F10X_HD: STM32 High density devices */ - /* #define STM32F10X_CL */ /*!< STM32F10X_CL: STM32 Connectivity line devices */ -#endif -/* Tip: To avoid modifying this file each time you need to switch between these - devices, you can define the device in your toolchain compiler preprocessor. - - - Low density devices are STM32F101xx, STM32F102xx and STM32F103xx microcontrollers - where the Flash memory density ranges between 16 and 32 Kbytes. - - Low-density value line devices are STM32F100xx microcontrollers where the Flash - memory density ranges between 16 and 32 Kbytes. - - Medium density devices are STM32F101xx, STM32F102xx and STM32F103xx microcontrollers - where the Flash memory density ranges between 64 and 128 Kbytes. - - Medium-density value line devices are STM32F100xx microcontrollers where the - Flash memory density ranges between 64 and 128 Kbytes. - - High density devices are STM32F101xx and STM32F103xx microcontrollers where - the Flash memory density ranges between 256 and 512 Kbytes. - - Connectivity line devices are STM32F105xx and STM32F107xx microcontrollers. - */ - -#if !defined USE_STDPERIPH_DRIVER -/** - * @brief Comment the line below if you will not use the peripherals drivers. - In this case, these drivers will not be included and the application code will - be based on direct access to peripherals registers - */ - /*#define USE_STDPERIPH_DRIVER*/ -#endif - -/** - * @brief In the following line adjust the value of External High Speed oscillator (HSE) - used in your application - - Tip: To avoid modifying this file each time you need to use different HSE, you - can define the HSE value in your toolchain compiler preprocessor. - */ -#if !defined HSE_VALUE - #ifdef STM32F10X_CL - #define HSE_VALUE ((uint32_t)25000000) /*!< Value of the External oscillator in Hz */ - #else - #define HSE_VALUE ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */ - #endif /* STM32F10X_CL */ -#endif /* HSE_VALUE */ - - -/** - * @brief In the following line adjust the External High Speed oscillator (HSE) Startup - Timeout value - */ -#define HSE_STARTUP_TIMEOUT ((uint16_t)0x0500) /*!< Time out for HSE start up */ - -#define HSI_VALUE ((uint32_t)8000000) /*!< Value of the Internal oscillator in Hz*/ - -/** - * @brief STM32F10x Standard Peripheral Library version number - */ -#define __STM32F10X_STDPERIPH_VERSION_MAIN (0x03) /*!< [31:16] STM32F10x Standard Peripheral Library main version */ -#define __STM32F10X_STDPERIPH_VERSION_SUB1 (0x02) /*!< [15:8] STM32F10x Standard Peripheral Library sub1 version */ -#define __STM32F10X_STDPERIPH_VERSION_SUB2 (0x00) /*!< [7:0] STM32F10x Standard Peripheral Library sub2 version */ -#define __STM32F10X_STDPERIPH_VERSION ((__STM32F10X_STDPERIPH_VERSION_MAIN << 16)\ - | (__STM32F10X_STDPERIPH_VERSION_SUB1 << 8)\ - | __STM32F10X_STDPERIPH_VERSION_SUB2) - -/** - * @} - */ - -/** @addtogroup Configuration_section_for_CMSIS - * @{ - */ - -/** - * @brief Configuration of the Cortex-M3 Processor and Core Peripherals - */ -#define __MPU_PRESENT 0 /*!< STM32 does not provide an MPU */ -#define __NVIC_PRIO_BITS 4 /*!< STM32 uses 4 Bits for the Priority Levels */ -#define __Vendor_SysTickConfig 0 /*!< Set to 1 if different SysTick Config is used */ - -/** - * @brief STM32F10x Interrupt Number Definition, according to the selected device - * in @ref Library_configuration_section - */ -typedef enum IRQn -{ -/****** Cortex-M3 Processor Exceptions Numbers ***************************************************/ - NonMaskableInt_IRQn = -14, /*!< 2 Non Maskable Interrupt */ - MemoryManagement_IRQn = -12, /*!< 4 Cortex-M3 Memory Management Interrupt */ - BusFault_IRQn = -11, /*!< 5 Cortex-M3 Bus Fault Interrupt */ - UsageFault_IRQn = -10, /*!< 6 Cortex-M3 Usage Fault Interrupt */ - SVCall_IRQn = -5, /*!< 11 Cortex-M3 SV Call Interrupt */ - DebugMonitor_IRQn = -4, /*!< 12 Cortex-M3 Debug Monitor Interrupt */ - PendSV_IRQn = -2, /*!< 14 Cortex-M3 Pend SV Interrupt */ - SysTick_IRQn = -1, /*!< 15 Cortex-M3 System Tick Interrupt */ - -/****** STM32 specific Interrupt Numbers *********************************************************/ - WWDG_IRQn = 0, /*!< Window WatchDog Interrupt */ - PVD_IRQn = 1, /*!< PVD through EXTI Line detection Interrupt */ - TAMPER_IRQn = 2, /*!< Tamper Interrupt */ - RTC_IRQn = 3, /*!< RTC global Interrupt */ - FLASH_IRQn = 4, /*!< FLASH global Interrupt */ - RCC_IRQn = 5, /*!< RCC global Interrupt */ - EXTI0_IRQn = 6, /*!< EXTI Line0 Interrupt */ - EXTI1_IRQn = 7, /*!< EXTI Line1 Interrupt */ - EXTI2_IRQn = 8, /*!< EXTI Line2 Interrupt */ - EXTI3_IRQn = 9, /*!< EXTI Line3 Interrupt */ - EXTI4_IRQn = 10, /*!< EXTI Line4 Interrupt */ - DMA1_Channel1_IRQn = 11, /*!< DMA1 Channel 1 global Interrupt */ - DMA1_Channel2_IRQn = 12, /*!< DMA1 Channel 2 global Interrupt */ - DMA1_Channel3_IRQn = 13, /*!< DMA1 Channel 3 global Interrupt */ - DMA1_Channel4_IRQn = 14, /*!< DMA1 Channel 4 global Interrupt */ - DMA1_Channel5_IRQn = 15, /*!< DMA1 Channel 5 global Interrupt */ - DMA1_Channel6_IRQn = 16, /*!< DMA1 Channel 6 global Interrupt */ - DMA1_Channel7_IRQn = 17, /*!< DMA1 Channel 7 global Interrupt */ - -#ifdef STM32F10X_LD - ADC1_2_IRQn = 18, /*!< ADC1 and ADC2 global Interrupt */ - USB_HP_CAN1_TX_IRQn = 19, /*!< USB Device High Priority or CAN1 TX Interrupts */ - USB_LP_CAN1_RX0_IRQn = 20, /*!< USB Device Low Priority or CAN1 RX0 Interrupts */ - CAN1_RX1_IRQn = 21, /*!< CAN1 RX1 Interrupt */ - CAN1_SCE_IRQn = 22, /*!< CAN1 SCE Interrupt */ - EXTI9_5_IRQn = 23, /*!< External Line[9:5] Interrupts */ - TIM1_BRK_IRQn = 24, /*!< TIM1 Break Interrupt */ - TIM1_UP_IRQn = 25, /*!< TIM1 Update Interrupt */ - TIM1_TRG_COM_IRQn = 26, /*!< TIM1 Trigger and Commutation Interrupt */ - TIM1_CC_IRQn = 27, /*!< TIM1 Capture Compare Interrupt */ - TIM2_IRQn = 28, /*!< TIM2 global Interrupt */ - TIM3_IRQn = 29, /*!< TIM3 global Interrupt */ - I2C1_EV_IRQn = 31, /*!< I2C1 Event Interrupt */ - I2C1_ER_IRQn = 32, /*!< I2C1 Error Interrupt */ - SPI1_IRQn = 35, /*!< SPI1 global Interrupt */ - USART1_IRQn = 37, /*!< USART1 global Interrupt */ - USART2_IRQn = 38, /*!< USART2 global Interrupt */ - EXTI15_10_IRQn = 40, /*!< External Line[15:10] Interrupts */ - RTCAlarm_IRQn = 41, /*!< RTC Alarm through EXTI Line Interrupt */ - USBWakeUp_IRQn = 42, /*!< USB Device WakeUp from suspend through EXTI Line Interrupt */ -#endif /* STM32F10X_LD */ - -#ifdef STM32F10X_LD_VL - ADC1_IRQn = 18, /*!< ADC1 global Interrupt */ - EXTI9_5_IRQn = 23, /*!< External Line[9:5] Interrupts */ - TIM1_BRK_TIM15_IRQn = 24, /*!< TIM1 Break and TIM15 Interrupts */ - TIM1_UP_TIM16_IRQn = 25, /*!< TIM1 Update and TIM16 Interrupts */ - TIM1_TRG_COM_TIM17_IRQn = 26, /*!< TIM1 Trigger and Commutation and TIM17 Interrupt */ - TIM1_CC_IRQn = 27, /*!< TIM1 Capture Compare Interrupt */ - TIM2_IRQn = 28, /*!< TIM2 global Interrupt */ - TIM3_IRQn = 29, /*!< TIM3 global Interrupt */ - I2C1_EV_IRQn = 31, /*!< I2C1 Event Interrupt */ - I2C1_ER_IRQn = 32, /*!< I2C1 Error Interrupt */ - SPI1_IRQn = 35, /*!< SPI1 global Interrupt */ - USART1_IRQn = 37, /*!< USART1 global Interrupt */ - USART2_IRQn = 38, /*!< USART2 global Interrupt */ - EXTI15_10_IRQn = 40, /*!< External Line[15:10] Interrupts */ - RTCAlarm_IRQn = 41, /*!< RTC Alarm through EXTI Line Interrupt */ - CEC_IRQn = 42, /*!< HDMI-CEC Interrupt */ - TIM6_DAC_IRQn = 54, /*!< TIM6 and DAC underrun Interrupt */ - TIM7_IRQn = 55, /*!< TIM7 Interrupt */ -#endif /* STM32F10X_LD_VL */ - -#ifdef STM32F10X_MD - ADC1_2_IRQn = 18, /*!< ADC1 and ADC2 global Interrupt */ - USB_HP_CAN1_TX_IRQn = 19, /*!< USB Device High Priority or CAN1 TX Interrupts */ - USB_LP_CAN1_RX0_IRQn = 20, /*!< USB Device Low Priority or CAN1 RX0 Interrupts */ - CAN1_RX1_IRQn = 21, /*!< CAN1 RX1 Interrupt */ - CAN1_SCE_IRQn = 22, /*!< CAN1 SCE Interrupt */ - EXTI9_5_IRQn = 23, /*!< External Line[9:5] Interrupts */ - TIM1_BRK_IRQn = 24, /*!< TIM1 Break Interrupt */ - TIM1_UP_IRQn = 25, /*!< TIM1 Update Interrupt */ - TIM1_TRG_COM_IRQn = 26, /*!< TIM1 Trigger and Commutation Interrupt */ - TIM1_CC_IRQn = 27, /*!< TIM1 Capture Compare Interrupt */ - TIM2_IRQn = 28, /*!< TIM2 global Interrupt */ - TIM3_IRQn = 29, /*!< TIM3 global Interrupt */ - TIM4_IRQn = 30, /*!< TIM4 global Interrupt */ - I2C1_EV_IRQn = 31, /*!< I2C1 Event Interrupt */ - I2C1_ER_IRQn = 32, /*!< I2C1 Error Interrupt */ - I2C2_EV_IRQn = 33, /*!< I2C2 Event Interrupt */ - I2C2_ER_IRQn = 34, /*!< I2C2 Error Interrupt */ - SPI1_IRQn = 35, /*!< SPI1 global Interrupt */ - SPI2_IRQn = 36, /*!< SPI2 global Interrupt */ - USART1_IRQn = 37, /*!< USART1 global Interrupt */ - USART2_IRQn = 38, /*!< USART2 global Interrupt */ - USART3_IRQn = 39, /*!< USART3 global Interrupt */ - EXTI15_10_IRQn = 40, /*!< External Line[15:10] Interrupts */ - RTCAlarm_IRQn = 41, /*!< RTC Alarm through EXTI Line Interrupt */ - USBWakeUp_IRQn = 42, /*!< USB Device WakeUp from suspend through EXTI Line Interrupt */ -#endif /* STM32F10X_MD */ - -#ifdef STM32F10X_MD_VL - ADC1_IRQn = 18, /*!< ADC1 global Interrupt */ - EXTI9_5_IRQn = 23, /*!< External Line[9:5] Interrupts */ - TIM1_BRK_TIM15_IRQn = 24, /*!< TIM1 Break and TIM15 Interrupts */ - TIM1_UP_TIM16_IRQn = 25, /*!< TIM1 Update and TIM16 Interrupts */ - TIM1_TRG_COM_TIM17_IRQn = 26, /*!< TIM1 Trigger and Commutation and TIM17 Interrupt */ - TIM1_CC_IRQn = 27, /*!< TIM1 Capture Compare Interrupt */ - TIM2_IRQn = 28, /*!< TIM2 global Interrupt */ - TIM3_IRQn = 29, /*!< TIM3 global Interrupt */ - TIM4_IRQn = 30, /*!< TIM4 global Interrupt */ - I2C1_EV_IRQn = 31, /*!< I2C1 Event Interrupt */ - I2C1_ER_IRQn = 32, /*!< I2C1 Error Interrupt */ - I2C2_EV_IRQn = 33, /*!< I2C2 Event Interrupt */ - I2C2_ER_IRQn = 34, /*!< I2C2 Error Interrupt */ - SPI1_IRQn = 35, /*!< SPI1 global Interrupt */ - SPI2_IRQn = 36, /*!< SPI2 global Interrupt */ - USART1_IRQn = 37, /*!< USART1 global Interrupt */ - USART2_IRQn = 38, /*!< USART2 global Interrupt */ - USART3_IRQn = 39, /*!< USART3 global Interrupt */ - EXTI15_10_IRQn = 40, /*!< External Line[15:10] Interrupts */ - RTCAlarm_IRQn = 41, /*!< RTC Alarm through EXTI Line Interrupt */ - CEC_IRQn = 42, /*!< HDMI-CEC Interrupt */ - TIM6_DAC_IRQn = 54, /*!< TIM6 and DAC underrun Interrupt */ - TIM7_IRQn = 55, /*!< TIM7 Interrupt */ -#endif /* STM32F10X_MD_VL */ - -#ifdef STM32F10X_HD - ADC1_2_IRQn = 18, /*!< ADC1 and ADC2 global Interrupt */ - USB_HP_CAN1_TX_IRQn = 19, /*!< USB Device High Priority or CAN1 TX Interrupts */ - USB_LP_CAN1_RX0_IRQn = 20, /*!< USB Device Low Priority or CAN1 RX0 Interrupts */ - CAN1_RX1_IRQn = 21, /*!< CAN1 RX1 Interrupt */ - CAN1_SCE_IRQn = 22, /*!< CAN1 SCE Interrupt */ - EXTI9_5_IRQn = 23, /*!< External Line[9:5] Interrupts */ - TIM1_BRK_IRQn = 24, /*!< TIM1 Break Interrupt */ - TIM1_UP_IRQn = 25, /*!< TIM1 Update Interrupt */ - TIM1_TRG_COM_IRQn = 26, /*!< TIM1 Trigger and Commutation Interrupt */ - TIM1_CC_IRQn = 27, /*!< TIM1 Capture Compare Interrupt */ - TIM2_IRQn = 28, /*!< TIM2 global Interrupt */ - TIM3_IRQn = 29, /*!< TIM3 global Interrupt */ - TIM4_IRQn = 30, /*!< TIM4 global Interrupt */ - I2C1_EV_IRQn = 31, /*!< I2C1 Event Interrupt */ - I2C1_ER_IRQn = 32, /*!< I2C1 Error Interrupt */ - I2C2_EV_IRQn = 33, /*!< I2C2 Event Interrupt */ - I2C2_ER_IRQn = 34, /*!< I2C2 Error Interrupt */ - SPI1_IRQn = 35, /*!< SPI1 global Interrupt */ - SPI2_IRQn = 36, /*!< SPI2 global Interrupt */ - USART1_IRQn = 37, /*!< USART1 global Interrupt */ - USART2_IRQn = 38, /*!< USART2 global Interrupt */ - USART3_IRQn = 39, /*!< USART3 global Interrupt */ - EXTI15_10_IRQn = 40, /*!< External Line[15:10] Interrupts */ - RTCAlarm_IRQn = 41, /*!< RTC Alarm through EXTI Line Interrupt */ - USBWakeUp_IRQn = 42, /*!< USB Device WakeUp from suspend through EXTI Line Interrupt */ - TIM8_BRK_IRQn = 43, /*!< TIM8 Break Interrupt */ - TIM8_UP_IRQn = 44, /*!< TIM8 Update Interrupt */ - TIM8_TRG_COM_IRQn = 45, /*!< TIM8 Trigger and Commutation Interrupt */ - TIM8_CC_IRQn = 46, /*!< TIM8 Capture Compare Interrupt */ - ADC3_IRQn = 47, /*!< ADC3 global Interrupt */ - FSMC_IRQn = 48, /*!< FSMC global Interrupt */ - SDIO_IRQn = 49, /*!< SDIO global Interrupt */ - TIM5_IRQn = 50, /*!< TIM5 global Interrupt */ - SPI3_IRQn = 51, /*!< SPI3 global Interrupt */ - UART4_IRQn = 52, /*!< UART4 global Interrupt */ - UART5_IRQn = 53, /*!< UART5 global Interrupt */ - TIM6_IRQn = 54, /*!< TIM6 global Interrupt */ - TIM7_IRQn = 55, /*!< TIM7 global Interrupt */ - DMA2_Channel1_IRQn = 56, /*!< DMA2 Channel 1 global Interrupt */ - DMA2_Channel2_IRQn = 57, /*!< DMA2 Channel 2 global Interrupt */ - DMA2_Channel3_IRQn = 58, /*!< DMA2 Channel 3 global Interrupt */ - DMA2_Channel4_5_IRQn = 59 /*!< DMA2 Channel 4 and Channel 5 global Interrupt */ -#endif /* STM32F10X_HD */ - -#ifdef STM32F10X_CL - ADC1_2_IRQn = 18, /*!< ADC1 and ADC2 global Interrupt */ - CAN1_TX_IRQn = 19, /*!< USB Device High Priority or CAN1 TX Interrupts */ - CAN1_RX0_IRQn = 20, /*!< USB Device Low Priority or CAN1 RX0 Interrupts */ - CAN1_RX1_IRQn = 21, /*!< CAN1 RX1 Interrupt */ - CAN1_SCE_IRQn = 22, /*!< CAN1 SCE Interrupt */ - EXTI9_5_IRQn = 23, /*!< External Line[9:5] Interrupts */ - TIM1_BRK_IRQn = 24, /*!< TIM1 Break Interrupt */ - TIM1_UP_IRQn = 25, /*!< TIM1 Update Interrupt */ - TIM1_TRG_COM_IRQn = 26, /*!< TIM1 Trigger and Commutation Interrupt */ - TIM1_CC_IRQn = 27, /*!< TIM1 Capture Compare Interrupt */ - TIM2_IRQn = 28, /*!< TIM2 global Interrupt */ - TIM3_IRQn = 29, /*!< TIM3 global Interrupt */ - TIM4_IRQn = 30, /*!< TIM4 global Interrupt */ - I2C1_EV_IRQn = 31, /*!< I2C1 Event Interrupt */ - I2C1_ER_IRQn = 32, /*!< I2C1 Error Interrupt */ - I2C2_EV_IRQn = 33, /*!< I2C2 Event Interrupt */ - I2C2_ER_IRQn = 34, /*!< I2C2 Error Interrupt */ - SPI1_IRQn = 35, /*!< SPI1 global Interrupt */ - SPI2_IRQn = 36, /*!< SPI2 global Interrupt */ - USART1_IRQn = 37, /*!< USART1 global Interrupt */ - USART2_IRQn = 38, /*!< USART2 global Interrupt */ - USART3_IRQn = 39, /*!< USART3 global Interrupt */ - EXTI15_10_IRQn = 40, /*!< External Line[15:10] Interrupts */ - RTCAlarm_IRQn = 41, /*!< RTC Alarm through EXTI Line Interrupt */ - OTG_FS_WKUP_IRQn = 42, /*!< USB OTG FS WakeUp from suspend through EXTI Line Interrupt */ - TIM5_IRQn = 50, /*!< TIM5 global Interrupt */ - SPI3_IRQn = 51, /*!< SPI3 global Interrupt */ - UART4_IRQn = 52, /*!< UART4 global Interrupt */ - UART5_IRQn = 53, /*!< UART5 global Interrupt */ - TIM6_IRQn = 54, /*!< TIM6 global Interrupt */ - TIM7_IRQn = 55, /*!< TIM7 global Interrupt */ - DMA2_Channel1_IRQn = 56, /*!< DMA2 Channel 1 global Interrupt */ - DMA2_Channel2_IRQn = 57, /*!< DMA2 Channel 2 global Interrupt */ - DMA2_Channel3_IRQn = 58, /*!< DMA2 Channel 3 global Interrupt */ - DMA2_Channel4_IRQn = 59, /*!< DMA2 Channel 4 global Interrupt */ - DMA2_Channel5_IRQn = 60, /*!< DMA2 Channel 5 global Interrupt */ - ETH_IRQn = 61, /*!< Ethernet global Interrupt */ - ETH_WKUP_IRQn = 62, /*!< Ethernet Wakeup through EXTI line Interrupt */ - CAN2_TX_IRQn = 63, /*!< CAN2 TX Interrupt */ - CAN2_RX0_IRQn = 64, /*!< CAN2 RX0 Interrupt */ - CAN2_RX1_IRQn = 65, /*!< CAN2 RX1 Interrupt */ - CAN2_SCE_IRQn = 66, /*!< CAN2 SCE Interrupt */ - OTG_FS_IRQn = 67 /*!< USB OTG FS global Interrupt */ -#endif /* STM32F10X_CL */ -} IRQn_Type; - -/** - * @} - */ - -#include "core_cm3.h" -#include "system_stm32f10x.h" -#include - -/** @addtogroup Exported_types - * @{ - */ - -/*!< STM32F10x Standard Peripheral Library old types (maintained for legacy purpose) */ -typedef int32_t s32; -typedef int16_t s16; -typedef int8_t s8; - -typedef const int32_t sc32; /*!< Read Only */ -typedef const int16_t sc16; /*!< Read Only */ -typedef const int8_t sc8; /*!< Read Only */ - -typedef __IO int32_t vs32; -typedef __IO int16_t vs16; -typedef __IO int8_t vs8; - -typedef __I int32_t vsc32; /*!< Read Only */ -typedef __I int16_t vsc16; /*!< Read Only */ -typedef __I int8_t vsc8; /*!< Read Only */ - -typedef uint32_t u32; -typedef uint16_t u16; -typedef uint8_t u8; - -typedef const uint32_t uc32; /*!< Read Only */ -typedef const uint16_t uc16; /*!< Read Only */ -typedef const uint8_t uc8; /*!< Read Only */ - -typedef __IO uint32_t vu32; -typedef __IO uint16_t vu16; -typedef __IO uint8_t vu8; - -typedef __I uint32_t vuc32; /*!< Read Only */ -typedef __I uint16_t vuc16; /*!< Read Only */ -typedef __I uint8_t vuc8; /*!< Read Only */ - -#ifndef __cplusplus -typedef enum {FALSE = 0, TRUE = !FALSE} bool; -#endif - -typedef enum {RESET = 0, SET = !RESET} FlagStatus, ITStatus; - -typedef enum {DISABLE = 0, ENABLE = !DISABLE} FunctionalState; -#define IS_FUNCTIONAL_STATE(STATE) (((STATE) == DISABLE) || ((STATE) == ENABLE)) - -typedef enum {ERROR = 0, SUCCESS = !ERROR} ErrorStatus; - -/*!< STM32F10x Standard Peripheral Library old definitions (maintained for legacy purpose) */ -#define HSEStartUp_TimeOut HSE_STARTUP_TIMEOUT -#define HSE_Value HSE_VALUE -#define HSI_Value HSI_VALUE -/** - * @} - */ - -/** @addtogroup Peripheral_registers_structures - * @{ - */ - -/** - * @brief Analog to Digital Converter - */ - -typedef struct -{ - __IO uint32_t SR; - __IO uint32_t CR1; - __IO uint32_t CR2; - __IO uint32_t SMPR1; - __IO uint32_t SMPR2; - __IO uint32_t JOFR1; - __IO uint32_t JOFR2; - __IO uint32_t JOFR3; - __IO uint32_t JOFR4; - __IO uint32_t HTR; - __IO uint32_t LTR; - __IO uint32_t SQR1; - __IO uint32_t SQR2; - __IO uint32_t SQR3; - __IO uint32_t JSQR; - __IO uint32_t JDR1; - __IO uint32_t JDR2; - __IO uint32_t JDR3; - __IO uint32_t JDR4; - __IO uint32_t DR; -} ADC_TypeDef; - -/** - * @brief Backup Registers - */ - -typedef struct -{ - uint32_t RESERVED0; - __IO uint16_t DR1; - uint16_t RESERVED1; - __IO uint16_t DR2; - uint16_t RESERVED2; - __IO uint16_t DR3; - uint16_t RESERVED3; - __IO uint16_t DR4; - uint16_t RESERVED4; - __IO uint16_t DR5; - uint16_t RESERVED5; - __IO uint16_t DR6; - uint16_t RESERVED6; - __IO uint16_t DR7; - uint16_t RESERVED7; - __IO uint16_t DR8; - uint16_t RESERVED8; - __IO uint16_t DR9; - uint16_t RESERVED9; - __IO uint16_t DR10; - uint16_t RESERVED10; - __IO uint16_t RTCCR; - uint16_t RESERVED11; - __IO uint16_t CR; - uint16_t RESERVED12; - __IO uint16_t CSR; - uint16_t RESERVED13[5]; - __IO uint16_t DR11; - uint16_t RESERVED14; - __IO uint16_t DR12; - uint16_t RESERVED15; - __IO uint16_t DR13; - uint16_t RESERVED16; - __IO uint16_t DR14; - uint16_t RESERVED17; - __IO uint16_t DR15; - uint16_t RESERVED18; - __IO uint16_t DR16; - uint16_t RESERVED19; - __IO uint16_t DR17; - uint16_t RESERVED20; - __IO uint16_t DR18; - uint16_t RESERVED21; - __IO uint16_t DR19; - uint16_t RESERVED22; - __IO uint16_t DR20; - uint16_t RESERVED23; - __IO uint16_t DR21; - uint16_t RESERVED24; - __IO uint16_t DR22; - uint16_t RESERVED25; - __IO uint16_t DR23; - uint16_t RESERVED26; - __IO uint16_t DR24; - uint16_t RESERVED27; - __IO uint16_t DR25; - uint16_t RESERVED28; - __IO uint16_t DR26; - uint16_t RESERVED29; - __IO uint16_t DR27; - uint16_t RESERVED30; - __IO uint16_t DR28; - uint16_t RESERVED31; - __IO uint16_t DR29; - uint16_t RESERVED32; - __IO uint16_t DR30; - uint16_t RESERVED33; - __IO uint16_t DR31; - uint16_t RESERVED34; - __IO uint16_t DR32; - uint16_t RESERVED35; - __IO uint16_t DR33; - uint16_t RESERVED36; - __IO uint16_t DR34; - uint16_t RESERVED37; - __IO uint16_t DR35; - uint16_t RESERVED38; - __IO uint16_t DR36; - uint16_t RESERVED39; - __IO uint16_t DR37; - uint16_t RESERVED40; - __IO uint16_t DR38; - uint16_t RESERVED41; - __IO uint16_t DR39; - uint16_t RESERVED42; - __IO uint16_t DR40; - uint16_t RESERVED43; - __IO uint16_t DR41; - uint16_t RESERVED44; - __IO uint16_t DR42; - uint16_t RESERVED45; -} BKP_TypeDef; - -/** - * @brief Controller Area Network TxMailBox - */ - -typedef struct -{ - __IO uint32_t TIR; - __IO uint32_t TDTR; - __IO uint32_t TDLR; - __IO uint32_t TDHR; -} CAN_TxMailBox_TypeDef; - -/** - * @brief Controller Area Network FIFOMailBox - */ - -typedef struct -{ - __IO uint32_t RIR; - __IO uint32_t RDTR; - __IO uint32_t RDLR; - __IO uint32_t RDHR; -} CAN_FIFOMailBox_TypeDef; - -/** - * @brief Controller Area Network FilterRegister - */ - -typedef struct -{ - __IO uint32_t FR1; - __IO uint32_t FR2; -} CAN_FilterRegister_TypeDef; - -/** - * @brief Controller Area Network - */ - -typedef struct -{ - __IO uint32_t MCR; - __IO uint32_t MSR; - __IO uint32_t TSR; - __IO uint32_t RF0R; - __IO uint32_t RF1R; - __IO uint32_t IER; - __IO uint32_t ESR; - __IO uint32_t BTR; - uint32_t RESERVED0[88]; - CAN_TxMailBox_TypeDef sTxMailBox[3]; - CAN_FIFOMailBox_TypeDef sFIFOMailBox[2]; - uint32_t RESERVED1[12]; - __IO uint32_t FMR; - __IO uint32_t FM1R; - uint32_t RESERVED2; - __IO uint32_t FS1R; - uint32_t RESERVED3; - __IO uint32_t FFA1R; - uint32_t RESERVED4; - __IO uint32_t FA1R; - uint32_t RESERVED5[8]; -#ifndef STM32F10X_CL - CAN_FilterRegister_TypeDef sFilterRegister[14]; -#else - CAN_FilterRegister_TypeDef sFilterRegister[28]; -#endif /* STM32F10X_CL */ -} CAN_TypeDef; - -/** - * @brief Consumer Electronics Control (CEC) - */ -typedef struct -{ - __IO uint32_t CFGR; - __IO uint32_t OAR; - __IO uint32_t PRES; - __IO uint32_t ESR; - __IO uint32_t CSR; - __IO uint32_t TXD; - __IO uint32_t RXD; -} CEC_TypeDef; - -/** - * @brief CRC calculation unit - */ - -typedef struct -{ - __IO uint32_t DR; - __IO uint8_t IDR; - uint8_t RESERVED0; - uint16_t RESERVED1; - __IO uint32_t CR; -} CRC_TypeDef; - -/** - * @brief Digital to Analog Converter - */ - -typedef struct -{ - __IO uint32_t CR; - __IO uint32_t SWTRIGR; - __IO uint32_t DHR12R1; - __IO uint32_t DHR12L1; - __IO uint32_t DHR8R1; - __IO uint32_t DHR12R2; - __IO uint32_t DHR12L2; - __IO uint32_t DHR8R2; - __IO uint32_t DHR12RD; - __IO uint32_t DHR12LD; - __IO uint32_t DHR8RD; - __IO uint32_t DOR1; - __IO uint32_t DOR2; -#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) - __IO uint32_t SR; -#endif -} DAC_TypeDef; - -/** - * @brief Debug MCU - */ - -typedef struct -{ - __IO uint32_t IDCODE; - __IO uint32_t CR; -}DBGMCU_TypeDef; - -/** - * @brief DMA Controller - */ - -typedef struct -{ - __IO uint32_t CCR; - __IO uint32_t CNDTR; - __IO uint32_t CPAR; - __IO uint32_t CMAR; -} DMA_Channel_TypeDef; - -typedef struct -{ - __IO uint32_t ISR; - __IO uint32_t IFCR; -} DMA_TypeDef; - -/** - * @brief Ethernet MAC - */ - -typedef struct -{ - __IO uint32_t MACCR; - __IO uint32_t MACFFR; - __IO uint32_t MACHTHR; - __IO uint32_t MACHTLR; - __IO uint32_t MACMIIAR; - __IO uint32_t MACMIIDR; - __IO uint32_t MACFCR; - __IO uint32_t MACVLANTR; /* 8 */ - uint32_t RESERVED0[2]; - __IO uint32_t MACRWUFFR; /* 11 */ - __IO uint32_t MACPMTCSR; - uint32_t RESERVED1[2]; - __IO uint32_t MACSR; /* 15 */ - __IO uint32_t MACIMR; - __IO uint32_t MACA0HR; - __IO uint32_t MACA0LR; - __IO uint32_t MACA1HR; - __IO uint32_t MACA1LR; - __IO uint32_t MACA2HR; - __IO uint32_t MACA2LR; - __IO uint32_t MACA3HR; - __IO uint32_t MACA3LR; /* 24 */ - uint32_t RESERVED2[40]; - __IO uint32_t MMCCR; /* 65 */ - __IO uint32_t MMCRIR; - __IO uint32_t MMCTIR; - __IO uint32_t MMCRIMR; - __IO uint32_t MMCTIMR; /* 69 */ - uint32_t RESERVED3[14]; - __IO uint32_t MMCTGFSCCR; /* 84 */ - __IO uint32_t MMCTGFMSCCR; - uint32_t RESERVED4[5]; - __IO uint32_t MMCTGFCR; - uint32_t RESERVED5[10]; - __IO uint32_t MMCRFCECR; - __IO uint32_t MMCRFAECR; - uint32_t RESERVED6[10]; - __IO uint32_t MMCRGUFCR; - uint32_t RESERVED7[334]; - __IO uint32_t PTPTSCR; - __IO uint32_t PTPSSIR; - __IO uint32_t PTPTSHR; - __IO uint32_t PTPTSLR; - __IO uint32_t PTPTSHUR; - __IO uint32_t PTPTSLUR; - __IO uint32_t PTPTSAR; - __IO uint32_t PTPTTHR; - __IO uint32_t PTPTTLR; - uint32_t RESERVED8[567]; - __IO uint32_t DMABMR; - __IO uint32_t DMATPDR; - __IO uint32_t DMARPDR; - __IO uint32_t DMARDLAR; - __IO uint32_t DMATDLAR; - __IO uint32_t DMASR; - __IO uint32_t DMAOMR; - __IO uint32_t DMAIER; - __IO uint32_t DMAMFBOCR; - uint32_t RESERVED9[9]; - __IO uint32_t DMACHTDR; - __IO uint32_t DMACHRDR; - __IO uint32_t DMACHTBAR; - __IO uint32_t DMACHRBAR; -} ETH_TypeDef; - -/** - * @brief External Interrupt/Event Controller - */ - -typedef struct -{ - __IO uint32_t IMR; - __IO uint32_t EMR; - __IO uint32_t RTSR; - __IO uint32_t FTSR; - __IO uint32_t SWIER; - __IO uint32_t PR; -} EXTI_TypeDef; - -/** - * @brief FLASH Registers - */ - -typedef struct -{ - __IO uint32_t ACR; - __IO uint32_t KEYR; - __IO uint32_t OPTKEYR; - __IO uint32_t SR; - __IO uint32_t CR; - __IO uint32_t AR; - __IO uint32_t RESERVED; - __IO uint32_t OBR; - __IO uint32_t WRPR; -} FLASH_TypeDef; - -/** - * @brief Option Bytes Registers - */ - -typedef struct -{ - __IO uint16_t RDP; - __IO uint16_t USER; - __IO uint16_t Data0; - __IO uint16_t Data1; - __IO uint16_t WRP0; - __IO uint16_t WRP1; - __IO uint16_t WRP2; - __IO uint16_t WRP3; -} OB_TypeDef; - -/** - * @brief Flexible Static Memory Controller - */ - -typedef struct -{ - __IO uint32_t BTCR[8]; -} FSMC_Bank1_TypeDef; - -/** - * @brief Flexible Static Memory Controller Bank1E - */ - -typedef struct -{ - __IO uint32_t BWTR[7]; -} FSMC_Bank1E_TypeDef; - -/** - * @brief Flexible Static Memory Controller Bank2 - */ - -typedef struct -{ - __IO uint32_t PCR2; - __IO uint32_t SR2; - __IO uint32_t PMEM2; - __IO uint32_t PATT2; - uint32_t RESERVED0; - __IO uint32_t ECCR2; -} FSMC_Bank2_TypeDef; - -/** - * @brief Flexible Static Memory Controller Bank3 - */ - -typedef struct -{ - __IO uint32_t PCR3; - __IO uint32_t SR3; - __IO uint32_t PMEM3; - __IO uint32_t PATT3; - uint32_t RESERVED0; - __IO uint32_t ECCR3; -} FSMC_Bank3_TypeDef; - -/** - * @brief Flexible Static Memory Controller Bank4 - */ - -typedef struct -{ - __IO uint32_t PCR4; - __IO uint32_t SR4; - __IO uint32_t PMEM4; - __IO uint32_t PATT4; - __IO uint32_t PIO4; -} FSMC_Bank4_TypeDef; - -/** - * @brief General Purpose I/O - */ - -typedef struct -{ - __IO uint32_t CRL; - __IO uint32_t CRH; - __IO uint32_t IDR; - __IO uint32_t ODR; - __IO uint32_t BSRR; - __IO uint32_t BRR; - __IO uint32_t LCKR; -} GPIO_TypeDef; - -/** - * @brief Alternate Function I/O - */ - -typedef struct -{ - __IO uint32_t EVCR; - __IO uint32_t MAPR; - __IO uint32_t EXTICR[4]; - uint32_t RESERVED0; - __IO uint32_t MAPR2; -} AFIO_TypeDef; -/** - * @brief Inter-integrated Circuit Interface - */ - -typedef struct -{ - __IO uint16_t CR1; - uint16_t RESERVED0; - __IO uint16_t CR2; - uint16_t RESERVED1; - __IO uint16_t OAR1; - uint16_t RESERVED2; - __IO uint16_t OAR2; - uint16_t RESERVED3; - __IO uint16_t DR; - uint16_t RESERVED4; - __IO uint16_t SR1; - uint16_t RESERVED5; - __IO uint16_t SR2; - uint16_t RESERVED6; - __IO uint16_t CCR; - uint16_t RESERVED7; - __IO uint16_t TRISE; - uint16_t RESERVED8; -} I2C_TypeDef; - -/** - * @brief Independent WATCHDOG - */ - -typedef struct -{ - __IO uint32_t KR; - __IO uint32_t PR; - __IO uint32_t RLR; - __IO uint32_t SR; -} IWDG_TypeDef; - -/** - * @brief Power Control - */ - -typedef struct -{ - __IO uint32_t CR; - __IO uint32_t CSR; -} PWR_TypeDef; - -/** - * @brief Reset and Clock Control - */ - -typedef struct -{ - __IO uint32_t CR; - __IO uint32_t CFGR; - __IO uint32_t CIR; - __IO uint32_t APB2RSTR; - __IO uint32_t APB1RSTR; - __IO uint32_t AHBENR; - __IO uint32_t APB2ENR; - __IO uint32_t APB1ENR; - __IO uint32_t BDCR; - __IO uint32_t CSR; - -#ifdef STM32F10X_CL - __IO uint32_t AHBRSTR; - __IO uint32_t CFGR2; -#endif /* STM32F10X_CL */ - -#if defined STM32F10X_LD_VL || defined STM32F10X_MD_VL - uint32_t RESERVED0; - __IO uint32_t CFGR2; -#endif /* STM32F10X_LD_VL || STM32F10X_MD_VL */ -} RCC_TypeDef; - -/** - * @brief Real-Time Clock - */ - -typedef struct -{ - __IO uint16_t CRH; - uint16_t RESERVED0; - __IO uint16_t CRL; - uint16_t RESERVED1; - __IO uint16_t PRLH; - uint16_t RESERVED2; - __IO uint16_t PRLL; - uint16_t RESERVED3; - __IO uint16_t DIVH; - uint16_t RESERVED4; - __IO uint16_t DIVL; - uint16_t RESERVED5; - __IO uint16_t CNTH; - uint16_t RESERVED6; - __IO uint16_t CNTL; - uint16_t RESERVED7; - __IO uint16_t ALRH; - uint16_t RESERVED8; - __IO uint16_t ALRL; - uint16_t RESERVED9; -} RTC_TypeDef; - -/** - * @brief SD host Interface - */ - -typedef struct -{ - __IO uint32_t POWER; - __IO uint32_t CLKCR; - __IO uint32_t ARG; - __IO uint32_t CMD; - __I uint32_t RESPCMD; - __I uint32_t RESP1; - __I uint32_t RESP2; - __I uint32_t RESP3; - __I uint32_t RESP4; - __IO uint32_t DTIMER; - __IO uint32_t DLEN; - __IO uint32_t DCTRL; - __I uint32_t DCOUNT; - __I uint32_t STA; - __IO uint32_t ICR; - __IO uint32_t MASK; - uint32_t RESERVED0[2]; - __I uint32_t FIFOCNT; - uint32_t RESERVED1[13]; - __IO uint32_t FIFO; -} SDIO_TypeDef; - -/** - * @brief Serial Peripheral Interface - */ - -typedef struct -{ - __IO uint16_t CR1; - uint16_t RESERVED0; - __IO uint16_t CR2; - uint16_t RESERVED1; - __IO uint16_t SR; - uint16_t RESERVED2; - __IO uint16_t DR; - uint16_t RESERVED3; - __IO uint16_t CRCPR; - uint16_t RESERVED4; - __IO uint16_t RXCRCR; - uint16_t RESERVED5; - __IO uint16_t TXCRCR; - uint16_t RESERVED6; - __IO uint16_t I2SCFGR; - uint16_t RESERVED7; - __IO uint16_t I2SPR; - uint16_t RESERVED8; -} SPI_TypeDef; - -/** - * @brief TIM - */ - -typedef struct -{ - __IO uint16_t CR1; - uint16_t RESERVED0; - __IO uint16_t CR2; - uint16_t RESERVED1; - __IO uint16_t SMCR; - uint16_t RESERVED2; - __IO uint16_t DIER; - uint16_t RESERVED3; - __IO uint16_t SR; - uint16_t RESERVED4; - __IO uint16_t EGR; - uint16_t RESERVED5; - __IO uint16_t CCMR1; - uint16_t RESERVED6; - __IO uint16_t CCMR2; - uint16_t RESERVED7; - __IO uint16_t CCER; - uint16_t RESERVED8; - __IO uint16_t CNT; - uint16_t RESERVED9; - __IO uint16_t PSC; - uint16_t RESERVED10; - __IO uint16_t ARR; - uint16_t RESERVED11; - __IO uint16_t RCR; - uint16_t RESERVED12; - __IO uint16_t CCR1; - uint16_t RESERVED13; - __IO uint16_t CCR2; - uint16_t RESERVED14; - __IO uint16_t CCR3; - uint16_t RESERVED15; - __IO uint16_t CCR4; - uint16_t RESERVED16; - __IO uint16_t BDTR; - uint16_t RESERVED17; - __IO uint16_t DCR; - uint16_t RESERVED18; - __IO uint16_t DMAR; - uint16_t RESERVED19; -} TIM_TypeDef; - -/** - * @brief Universal Synchronous Asynchronous Receiver Transmitter - */ - -typedef struct -{ - __IO uint16_t SR; - uint16_t RESERVED0; - __IO uint16_t DR; - uint16_t RESERVED1; - __IO uint16_t BRR; - uint16_t RESERVED2; - __IO uint16_t CR1; - uint16_t RESERVED3; - __IO uint16_t CR2; - uint16_t RESERVED4; - __IO uint16_t CR3; - uint16_t RESERVED5; - __IO uint16_t GTPR; - uint16_t RESERVED6; -} USART_TypeDef; - -/** - * @brief Window WATCHDOG - */ - -typedef struct -{ - __IO uint32_t CR; - __IO uint32_t CFR; - __IO uint32_t SR; -} WWDG_TypeDef; - -/** - * @} - */ - -/** @addtogroup Peripheral_memory_map - * @{ - */ - -#define PERIPH_BB_BASE ((uint32_t)0x42000000) /*!< Peripheral base address in the alias region */ -#define SRAM_BB_BASE ((uint32_t)0x22000000) /*!< SRAM base address in the alias region */ - -#define SRAM_BASE ((uint32_t)0x20000000) /*!< SRAM base address in the bit-band region */ -#define PERIPH_BASE ((uint32_t)0x40000000) /*!< Peripheral base address in the bit-band region */ - -#define FSMC_R_BASE ((uint32_t)0xA0000000) /*!< FSMC registers base address */ - -/*!< Peripheral memory map */ -#define APB1PERIPH_BASE PERIPH_BASE -#define APB2PERIPH_BASE (PERIPH_BASE + 0x10000) -#define AHBPERIPH_BASE (PERIPH_BASE + 0x20000) - -#define TIM2_BASE (APB1PERIPH_BASE + 0x0000) -#define TIM3_BASE (APB1PERIPH_BASE + 0x0400) -#define TIM4_BASE (APB1PERIPH_BASE + 0x0800) -#define TIM5_BASE (APB1PERIPH_BASE + 0x0C00) -#define TIM6_BASE (APB1PERIPH_BASE + 0x1000) -#define TIM7_BASE (APB1PERIPH_BASE + 0x1400) -#define RTC_BASE (APB1PERIPH_BASE + 0x2800) -#define WWDG_BASE (APB1PERIPH_BASE + 0x2C00) -#define IWDG_BASE (APB1PERIPH_BASE + 0x3000) -#define SPI2_BASE (APB1PERIPH_BASE + 0x3800) -#define SPI3_BASE (APB1PERIPH_BASE + 0x3C00) -#define USART2_BASE (APB1PERIPH_BASE + 0x4400) -#define USART3_BASE (APB1PERIPH_BASE + 0x4800) -#define UART4_BASE (APB1PERIPH_BASE + 0x4C00) -#define UART5_BASE (APB1PERIPH_BASE + 0x5000) -#define I2C1_BASE (APB1PERIPH_BASE + 0x5400) -#define I2C2_BASE (APB1PERIPH_BASE + 0x5800) -#define CAN1_BASE (APB1PERIPH_BASE + 0x6400) -#define CAN2_BASE (APB1PERIPH_BASE + 0x6800) -#define BKP_BASE (APB1PERIPH_BASE + 0x6C00) -#define PWR_BASE (APB1PERIPH_BASE + 0x7000) -#define DAC_BASE (APB1PERIPH_BASE + 0x7400) -#define CEC_BASE (APB1PERIPH_BASE + 0x7800) - -#define AFIO_BASE (APB2PERIPH_BASE + 0x0000) -#define EXTI_BASE (APB2PERIPH_BASE + 0x0400) -#define GPIOA_BASE (APB2PERIPH_BASE + 0x0800) -#define GPIOB_BASE (APB2PERIPH_BASE + 0x0C00) -#define GPIOC_BASE (APB2PERIPH_BASE + 0x1000) -#define GPIOD_BASE (APB2PERIPH_BASE + 0x1400) -#define GPIOE_BASE (APB2PERIPH_BASE + 0x1800) -#define GPIOF_BASE (APB2PERIPH_BASE + 0x1C00) -#define GPIOG_BASE (APB2PERIPH_BASE + 0x2000) -#define ADC1_BASE (APB2PERIPH_BASE + 0x2400) -#define ADC2_BASE (APB2PERIPH_BASE + 0x2800) -#define TIM1_BASE (APB2PERIPH_BASE + 0x2C00) -#define SPI1_BASE (APB2PERIPH_BASE + 0x3000) -#define TIM8_BASE (APB2PERIPH_BASE + 0x3400) -#define USART1_BASE (APB2PERIPH_BASE + 0x3800) -#define ADC3_BASE (APB2PERIPH_BASE + 0x3C00) -#define TIM15_BASE (APB2PERIPH_BASE + 0x4000) -#define TIM16_BASE (APB2PERIPH_BASE + 0x4400) -#define TIM17_BASE (APB2PERIPH_BASE + 0x4800) - -#define SDIO_BASE (PERIPH_BASE + 0x18000) - -#define DMA1_BASE (AHBPERIPH_BASE + 0x0000) -#define DMA1_Channel1_BASE (AHBPERIPH_BASE + 0x0008) -#define DMA1_Channel2_BASE (AHBPERIPH_BASE + 0x001C) -#define DMA1_Channel3_BASE (AHBPERIPH_BASE + 0x0030) -#define DMA1_Channel4_BASE (AHBPERIPH_BASE + 0x0044) -#define DMA1_Channel5_BASE (AHBPERIPH_BASE + 0x0058) -#define DMA1_Channel6_BASE (AHBPERIPH_BASE + 0x006C) -#define DMA1_Channel7_BASE (AHBPERIPH_BASE + 0x0080) -#define DMA2_BASE (AHBPERIPH_BASE + 0x0400) -#define DMA2_Channel1_BASE (AHBPERIPH_BASE + 0x0408) -#define DMA2_Channel2_BASE (AHBPERIPH_BASE + 0x041C) -#define DMA2_Channel3_BASE (AHBPERIPH_BASE + 0x0430) -#define DMA2_Channel4_BASE (AHBPERIPH_BASE + 0x0444) -#define DMA2_Channel5_BASE (AHBPERIPH_BASE + 0x0458) -#define RCC_BASE (AHBPERIPH_BASE + 0x1000) -#define CRC_BASE (AHBPERIPH_BASE + 0x3000) - -#define FLASH_R_BASE (AHBPERIPH_BASE + 0x2000) /*!< Flash registers base address */ -#define OB_BASE ((uint32_t)0x1FFFF800) /*!< Flash Option Bytes base address */ - -#define ETH_BASE (AHBPERIPH_BASE + 0x8000) -#define ETH_MAC_BASE (ETH_BASE) -#define ETH_MMC_BASE (ETH_BASE + 0x0100) -#define ETH_PTP_BASE (ETH_BASE + 0x0700) -#define ETH_DMA_BASE (ETH_BASE + 0x1000) - -#define FSMC_Bank1_R_BASE (FSMC_R_BASE + 0x0000) /*!< FSMC Bank1 registers base address */ -#define FSMC_Bank1E_R_BASE (FSMC_R_BASE + 0x0104) /*!< FSMC Bank1E registers base address */ -#define FSMC_Bank2_R_BASE (FSMC_R_BASE + 0x0060) /*!< FSMC Bank2 registers base address */ -#define FSMC_Bank3_R_BASE (FSMC_R_BASE + 0x0080) /*!< FSMC Bank3 registers base address */ -#define FSMC_Bank4_R_BASE (FSMC_R_BASE + 0x00A0) /*!< FSMC Bank4 registers base address */ - -#define DBGMCU_BASE ((uint32_t)0xE0042000) /*!< Debug MCU registers base address */ - -/** - * @} - */ - -/** @addtogroup Peripheral_declaration - * @{ - */ - -#define TIM2 ((TIM_TypeDef *) TIM2_BASE) -#define TIM3 ((TIM_TypeDef *) TIM3_BASE) -#define TIM4 ((TIM_TypeDef *) TIM4_BASE) -#define TIM5 ((TIM_TypeDef *) TIM5_BASE) -#define TIM6 ((TIM_TypeDef *) TIM6_BASE) -#define TIM7 ((TIM_TypeDef *) TIM7_BASE) -#define RTC ((RTC_TypeDef *) RTC_BASE) -#define WWDG ((WWDG_TypeDef *) WWDG_BASE) -#define IWDG ((IWDG_TypeDef *) IWDG_BASE) -#define SPI2 ((SPI_TypeDef *) SPI2_BASE) -#define SPI3 ((SPI_TypeDef *) SPI3_BASE) -#define USART2 ((USART_TypeDef *) USART2_BASE) -#define USART3 ((USART_TypeDef *) USART3_BASE) -#define UART4 ((USART_TypeDef *) UART4_BASE) -#define UART5 ((USART_TypeDef *) UART5_BASE) -#define I2C1 ((I2C_TypeDef *) I2C1_BASE) -#define I2C2 ((I2C_TypeDef *) I2C2_BASE) -#define CAN1 ((CAN_TypeDef *) CAN1_BASE) -#define CAN2 ((CAN_TypeDef *) CAN2_BASE) -#define BKP ((BKP_TypeDef *) BKP_BASE) -#define PWR ((PWR_TypeDef *) PWR_BASE) -#define DAC ((DAC_TypeDef *) DAC_BASE) -#define CEC ((CEC_TypeDef *) CEC_BASE) -#define AFIO ((AFIO_TypeDef *) AFIO_BASE) -#define EXTI ((EXTI_TypeDef *) EXTI_BASE) -#define GPIOA ((GPIO_TypeDef *) GPIOA_BASE) -#define GPIOB ((GPIO_TypeDef *) GPIOB_BASE) -#define GPIOC ((GPIO_TypeDef *) GPIOC_BASE) -#define GPIOD ((GPIO_TypeDef *) GPIOD_BASE) -#define GPIOE ((GPIO_TypeDef *) GPIOE_BASE) -#define GPIOF ((GPIO_TypeDef *) GPIOF_BASE) -#define GPIOG ((GPIO_TypeDef *) GPIOG_BASE) -#define ADC1 ((ADC_TypeDef *) ADC1_BASE) -#define ADC2 ((ADC_TypeDef *) ADC2_BASE) -#define TIM1 ((TIM_TypeDef *) TIM1_BASE) -#define SPI1 ((SPI_TypeDef *) SPI1_BASE) -#define TIM8 ((TIM_TypeDef *) TIM8_BASE) -#define USART1 ((USART_TypeDef *) USART1_BASE) -#define ADC3 ((ADC_TypeDef *) ADC3_BASE) -#define TIM15 ((TIM_TypeDef *) TIM15_BASE) -#define TIM16 ((TIM_TypeDef *) TIM16_BASE) -#define TIM17 ((TIM_TypeDef *) TIM17_BASE) -#define SDIO ((SDIO_TypeDef *) SDIO_BASE) -#define DMA1 ((DMA_TypeDef *) DMA1_BASE) -#define DMA2 ((DMA_TypeDef *) DMA2_BASE) -#define DMA1_Channel1 ((DMA_Channel_TypeDef *) DMA1_Channel1_BASE) -#define DMA1_Channel2 ((DMA_Channel_TypeDef *) DMA1_Channel2_BASE) -#define DMA1_Channel3 ((DMA_Channel_TypeDef *) DMA1_Channel3_BASE) -#define DMA1_Channel4 ((DMA_Channel_TypeDef *) DMA1_Channel4_BASE) -#define DMA1_Channel5 ((DMA_Channel_TypeDef *) DMA1_Channel5_BASE) -#define DMA1_Channel6 ((DMA_Channel_TypeDef *) DMA1_Channel6_BASE) -#define DMA1_Channel7 ((DMA_Channel_TypeDef *) DMA1_Channel7_BASE) -#define DMA2_Channel1 ((DMA_Channel_TypeDef *) DMA2_Channel1_BASE) -#define DMA2_Channel2 ((DMA_Channel_TypeDef *) DMA2_Channel2_BASE) -#define DMA2_Channel3 ((DMA_Channel_TypeDef *) DMA2_Channel3_BASE) -#define DMA2_Channel4 ((DMA_Channel_TypeDef *) DMA2_Channel4_BASE) -#define DMA2_Channel5 ((DMA_Channel_TypeDef *) DMA2_Channel5_BASE) -#define RCC ((RCC_TypeDef *) RCC_BASE) -#define CRC ((CRC_TypeDef *) CRC_BASE) -#define FLASH ((FLASH_TypeDef *) FLASH_R_BASE) -#define OB ((OB_TypeDef *) OB_BASE) -#define ETH ((ETH_TypeDef *) ETH_BASE) -#define FSMC_Bank1 ((FSMC_Bank1_TypeDef *) FSMC_Bank1_R_BASE) -#define FSMC_Bank1E ((FSMC_Bank1E_TypeDef *) FSMC_Bank1E_R_BASE) -#define FSMC_Bank2 ((FSMC_Bank2_TypeDef *) FSMC_Bank2_R_BASE) -#define FSMC_Bank3 ((FSMC_Bank3_TypeDef *) FSMC_Bank3_R_BASE) -#define FSMC_Bank4 ((FSMC_Bank4_TypeDef *) FSMC_Bank4_R_BASE) -#define DBGMCU ((DBGMCU_TypeDef *) DBGMCU_BASE) - -/** - * @} - */ - -/** @addtogroup Exported_constants - * @{ - */ - - /** @addtogroup Peripheral_Registers_Bits_Definition - * @{ - */ - -/******************************************************************************/ -/* Peripheral Registers_Bits_Definition */ -/******************************************************************************/ - -/******************************************************************************/ -/* */ -/* CRC calculation unit */ -/* */ -/******************************************************************************/ - -/******************* Bit definition for CRC_DR register *********************/ -#define CRC_DR_DR ((uint32_t)0xFFFFFFFF) /*!< Data register bits */ - - -/******************* Bit definition for CRC_IDR register ********************/ -#define CRC_IDR_IDR ((uint8_t)0xFF) /*!< General-purpose 8-bit data register bits */ - - -/******************** Bit definition for CRC_CR register ********************/ -#define CRC_CR_RESET ((uint8_t)0x01) /*!< RESET bit */ - -/******************************************************************************/ -/* */ -/* Power Control */ -/* */ -/******************************************************************************/ - -/******************** Bit definition for PWR_CR register ********************/ -#define PWR_CR_LPDS ((uint16_t)0x0001) /*!< Low-Power Deepsleep */ -#define PWR_CR_PDDS ((uint16_t)0x0002) /*!< Power Down Deepsleep */ -#define PWR_CR_CWUF ((uint16_t)0x0004) /*!< Clear Wakeup Flag */ -#define PWR_CR_CSBF ((uint16_t)0x0008) /*!< Clear Standby Flag */ -#define PWR_CR_PVDE ((uint16_t)0x0010) /*!< Power Voltage Detector Enable */ - -#define PWR_CR_PLS ((uint16_t)0x00E0) /*!< PLS[2:0] bits (PVD Level Selection) */ -#define PWR_CR_PLS_0 ((uint16_t)0x0020) /*!< Bit 0 */ -#define PWR_CR_PLS_1 ((uint16_t)0x0040) /*!< Bit 1 */ -#define PWR_CR_PLS_2 ((uint16_t)0x0080) /*!< Bit 2 */ - -/*!< PVD level configuration */ -#define PWR_CR_PLS_2V2 ((uint16_t)0x0000) /*!< PVD level 2.2V */ -#define PWR_CR_PLS_2V3 ((uint16_t)0x0020) /*!< PVD level 2.3V */ -#define PWR_CR_PLS_2V4 ((uint16_t)0x0040) /*!< PVD level 2.4V */ -#define PWR_CR_PLS_2V5 ((uint16_t)0x0060) /*!< PVD level 2.5V */ -#define PWR_CR_PLS_2V6 ((uint16_t)0x0080) /*!< PVD level 2.6V */ -#define PWR_CR_PLS_2V7 ((uint16_t)0x00A0) /*!< PVD level 2.7V */ -#define PWR_CR_PLS_2V8 ((uint16_t)0x00C0) /*!< PVD level 2.8V */ -#define PWR_CR_PLS_2V9 ((uint16_t)0x00E0) /*!< PVD level 2.9V */ - -#define PWR_CR_DBP ((uint16_t)0x0100) /*!< Disable Backup Domain write protection */ - - -/******************* Bit definition for PWR_CSR register ********************/ -#define PWR_CSR_WUF ((uint16_t)0x0001) /*!< Wakeup Flag */ -#define PWR_CSR_SBF ((uint16_t)0x0002) /*!< Standby Flag */ -#define PWR_CSR_PVDO ((uint16_t)0x0004) /*!< PVD Output */ -#define PWR_CSR_EWUP ((uint16_t)0x0100) /*!< Enable WKUP pin */ - -/******************************************************************************/ -/* */ -/* Backup registers */ -/* */ -/******************************************************************************/ - -/******************* Bit definition for BKP_DR1 register ********************/ -#define BKP_DR1_D ((uint16_t)0xFFFF) /*!< Backup data */ - -/******************* Bit definition for BKP_DR2 register ********************/ -#define BKP_DR2_D ((uint16_t)0xFFFF) /*!< Backup data */ - -/******************* Bit definition for BKP_DR3 register ********************/ -#define BKP_DR3_D ((uint16_t)0xFFFF) /*!< Backup data */ - -/******************* Bit definition for BKP_DR4 register ********************/ -#define BKP_DR4_D ((uint16_t)0xFFFF) /*!< Backup data */ - -/******************* Bit definition for BKP_DR5 register ********************/ -#define BKP_DR5_D ((uint16_t)0xFFFF) /*!< Backup data */ - -/******************* Bit definition for BKP_DR6 register ********************/ -#define BKP_DR6_D ((uint16_t)0xFFFF) /*!< Backup data */ - -/******************* Bit definition for BKP_DR7 register ********************/ -#define BKP_DR7_D ((uint16_t)0xFFFF) /*!< Backup data */ - -/******************* Bit definition for BKP_DR8 register ********************/ -#define BKP_DR8_D ((uint16_t)0xFFFF) /*!< Backup data */ - -/******************* Bit definition for BKP_DR9 register ********************/ -#define BKP_DR9_D ((uint16_t)0xFFFF) /*!< Backup data */ - -/******************* Bit definition for BKP_DR10 register *******************/ -#define BKP_DR10_D ((uint16_t)0xFFFF) /*!< Backup data */ - -/******************* Bit definition for BKP_DR11 register *******************/ -#define BKP_DR11_D ((uint16_t)0xFFFF) /*!< Backup data */ - -/******************* Bit definition for BKP_DR12 register *******************/ -#define BKP_DR12_D ((uint16_t)0xFFFF) /*!< Backup data */ - -/******************* Bit definition for BKP_DR13 register *******************/ -#define BKP_DR13_D ((uint16_t)0xFFFF) /*!< Backup data */ - -/******************* Bit definition for BKP_DR14 register *******************/ -#define BKP_DR14_D ((uint16_t)0xFFFF) /*!< Backup data */ - -/******************* Bit definition for BKP_DR15 register *******************/ -#define BKP_DR15_D ((uint16_t)0xFFFF) /*!< Backup data */ - -/******************* Bit definition for BKP_DR16 register *******************/ -#define BKP_DR16_D ((uint16_t)0xFFFF) /*!< Backup data */ - -/******************* Bit definition for BKP_DR17 register *******************/ -#define BKP_DR17_D ((uint16_t)0xFFFF) /*!< Backup data */ - -/****************** Bit definition for BKP_DR18 register ********************/ -#define BKP_DR18_D ((uint16_t)0xFFFF) /*!< Backup data */ - -/******************* Bit definition for BKP_DR19 register *******************/ -#define BKP_DR19_D ((uint16_t)0xFFFF) /*!< Backup data */ - -/******************* Bit definition for BKP_DR20 register *******************/ -#define BKP_DR20_D ((uint16_t)0xFFFF) /*!< Backup data */ - -/******************* Bit definition for BKP_DR21 register *******************/ -#define BKP_DR21_D ((uint16_t)0xFFFF) /*!< Backup data */ - -/******************* Bit definition for BKP_DR22 register *******************/ -#define BKP_DR22_D ((uint16_t)0xFFFF) /*!< Backup data */ - -/******************* Bit definition for BKP_DR23 register *******************/ -#define BKP_DR23_D ((uint16_t)0xFFFF) /*!< Backup data */ - -/******************* Bit definition for BKP_DR24 register *******************/ -#define BKP_DR24_D ((uint16_t)0xFFFF) /*!< Backup data */ - -/******************* Bit definition for BKP_DR25 register *******************/ -#define BKP_DR25_D ((uint16_t)0xFFFF) /*!< Backup data */ - -/******************* Bit definition for BKP_DR26 register *******************/ -#define BKP_DR26_D ((uint16_t)0xFFFF) /*!< Backup data */ - -/******************* Bit definition for BKP_DR27 register *******************/ -#define BKP_DR27_D ((uint16_t)0xFFFF) /*!< Backup data */ - -/******************* Bit definition for BKP_DR28 register *******************/ -#define BKP_DR28_D ((uint16_t)0xFFFF) /*!< Backup data */ - -/******************* Bit definition for BKP_DR29 register *******************/ -#define BKP_DR29_D ((uint16_t)0xFFFF) /*!< Backup data */ - -/******************* Bit definition for BKP_DR30 register *******************/ -#define BKP_DR30_D ((uint16_t)0xFFFF) /*!< Backup data */ - -/******************* Bit definition for BKP_DR31 register *******************/ -#define BKP_DR31_D ((uint16_t)0xFFFF) /*!< Backup data */ - -/******************* Bit definition for BKP_DR32 register *******************/ -#define BKP_DR32_D ((uint16_t)0xFFFF) /*!< Backup data */ - -/******************* Bit definition for BKP_DR33 register *******************/ -#define BKP_DR33_D ((uint16_t)0xFFFF) /*!< Backup data */ - -/******************* Bit definition for BKP_DR34 register *******************/ -#define BKP_DR34_D ((uint16_t)0xFFFF) /*!< Backup data */ - -/******************* Bit definition for BKP_DR35 register *******************/ -#define BKP_DR35_D ((uint16_t)0xFFFF) /*!< Backup data */ - -/******************* Bit definition for BKP_DR36 register *******************/ -#define BKP_DR36_D ((uint16_t)0xFFFF) /*!< Backup data */ - -/******************* Bit definition for BKP_DR37 register *******************/ -#define BKP_DR37_D ((uint16_t)0xFFFF) /*!< Backup data */ - -/******************* Bit definition for BKP_DR38 register *******************/ -#define BKP_DR38_D ((uint16_t)0xFFFF) /*!< Backup data */ - -/******************* Bit definition for BKP_DR39 register *******************/ -#define BKP_DR39_D ((uint16_t)0xFFFF) /*!< Backup data */ - -/******************* Bit definition for BKP_DR40 register *******************/ -#define BKP_DR40_D ((uint16_t)0xFFFF) /*!< Backup data */ - -/******************* Bit definition for BKP_DR41 register *******************/ -#define BKP_DR41_D ((uint16_t)0xFFFF) /*!< Backup data */ - -/******************* Bit definition for BKP_DR42 register *******************/ -#define BKP_DR42_D ((uint16_t)0xFFFF) /*!< Backup data */ - -/****************** Bit definition for BKP_RTCCR register *******************/ -#define BKP_RTCCR_CAL ((uint16_t)0x007F) /*!< Calibration value */ -#define BKP_RTCCR_CCO ((uint16_t)0x0080) /*!< Calibration Clock Output */ -#define BKP_RTCCR_ASOE ((uint16_t)0x0100) /*!< Alarm or Second Output Enable */ -#define BKP_RTCCR_ASOS ((uint16_t)0x0200) /*!< Alarm or Second Output Selection */ - -/******************** Bit definition for BKP_CR register ********************/ -#define BKP_CR_TPE ((uint8_t)0x01) /*!< TAMPER pin enable */ -#define BKP_CR_TPAL ((uint8_t)0x02) /*!< TAMPER pin active level */ - -/******************* Bit definition for BKP_CSR register ********************/ -#define BKP_CSR_CTE ((uint16_t)0x0001) /*!< Clear Tamper event */ -#define BKP_CSR_CTI ((uint16_t)0x0002) /*!< Clear Tamper Interrupt */ -#define BKP_CSR_TPIE ((uint16_t)0x0004) /*!< TAMPER Pin interrupt enable */ -#define BKP_CSR_TEF ((uint16_t)0x0100) /*!< Tamper Event Flag */ -#define BKP_CSR_TIF ((uint16_t)0x0200) /*!< Tamper Interrupt Flag */ - -/******************************************************************************/ -/* */ -/* Reset and Clock Control */ -/* */ -/******************************************************************************/ - -/******************** Bit definition for RCC_CR register ********************/ -#define RCC_CR_HSION ((uint32_t)0x00000001) /*!< Internal High Speed clock enable */ -#define RCC_CR_HSIRDY ((uint32_t)0x00000002) /*!< Internal High Speed clock ready flag */ -#define RCC_CR_HSITRIM ((uint32_t)0x000000F8) /*!< Internal High Speed clock trimming */ -#define RCC_CR_HSICAL ((uint32_t)0x0000FF00) /*!< Internal High Speed clock Calibration */ -#define RCC_CR_HSEON ((uint32_t)0x00010000) /*!< External High Speed clock enable */ -#define RCC_CR_HSERDY ((uint32_t)0x00020000) /*!< External High Speed clock ready flag */ -#define RCC_CR_HSEBYP ((uint32_t)0x00040000) /*!< External High Speed clock Bypass */ -#define RCC_CR_CSSON ((uint32_t)0x00080000) /*!< Clock Security System enable */ -#define RCC_CR_PLLON ((uint32_t)0x01000000) /*!< PLL enable */ -#define RCC_CR_PLLRDY ((uint32_t)0x02000000) /*!< PLL clock ready flag */ - -#ifdef STM32F10X_CL - #define RCC_CR_PLL2ON ((uint32_t)0x04000000) /*!< PLL2 enable */ - #define RCC_CR_PLL2RDY ((uint32_t)0x08000000) /*!< PLL2 clock ready flag */ - #define RCC_CR_PLL3ON ((uint32_t)0x10000000) /*!< PLL3 enable */ - #define RCC_CR_PLL3RDY ((uint32_t)0x20000000) /*!< PLL3 clock ready flag */ -#endif /* STM32F10X_CL */ - -/******************* Bit definition for RCC_CFGR register *******************/ -/*!< SW configuration */ -#define RCC_CFGR_SW ((uint32_t)0x00000003) /*!< SW[1:0] bits (System clock Switch) */ -#define RCC_CFGR_SW_0 ((uint32_t)0x00000001) /*!< Bit 0 */ -#define RCC_CFGR_SW_1 ((uint32_t)0x00000002) /*!< Bit 1 */ - -#define RCC_CFGR_SW_HSI ((uint32_t)0x00000000) /*!< HSI selected as system clock */ -#define RCC_CFGR_SW_HSE ((uint32_t)0x00000001) /*!< HSE selected as system clock */ -#define RCC_CFGR_SW_PLL ((uint32_t)0x00000002) /*!< PLL selected as system clock */ - -/*!< SWS configuration */ -#define RCC_CFGR_SWS ((uint32_t)0x0000000C) /*!< SWS[1:0] bits (System Clock Switch Status) */ -#define RCC_CFGR_SWS_0 ((uint32_t)0x00000004) /*!< Bit 0 */ -#define RCC_CFGR_SWS_1 ((uint32_t)0x00000008) /*!< Bit 1 */ - -#define RCC_CFGR_SWS_HSI ((uint32_t)0x00000000) /*!< HSI oscillator used as system clock */ -#define RCC_CFGR_SWS_HSE ((uint32_t)0x00000004) /*!< HSE oscillator used as system clock */ -#define RCC_CFGR_SWS_PLL ((uint32_t)0x00000008) /*!< PLL used as system clock */ - -/*!< HPRE configuration */ -#define RCC_CFGR_HPRE ((uint32_t)0x000000F0) /*!< HPRE[3:0] bits (AHB prescaler) */ -#define RCC_CFGR_HPRE_0 ((uint32_t)0x00000010) /*!< Bit 0 */ -#define RCC_CFGR_HPRE_1 ((uint32_t)0x00000020) /*!< Bit 1 */ -#define RCC_CFGR_HPRE_2 ((uint32_t)0x00000040) /*!< Bit 2 */ -#define RCC_CFGR_HPRE_3 ((uint32_t)0x00000080) /*!< Bit 3 */ - -#define RCC_CFGR_HPRE_DIV1 ((uint32_t)0x00000000) /*!< SYSCLK not divided */ -#define RCC_CFGR_HPRE_DIV2 ((uint32_t)0x00000080) /*!< SYSCLK divided by 2 */ -#define RCC_CFGR_HPRE_DIV4 ((uint32_t)0x00000090) /*!< SYSCLK divided by 4 */ -#define RCC_CFGR_HPRE_DIV8 ((uint32_t)0x000000A0) /*!< SYSCLK divided by 8 */ -#define RCC_CFGR_HPRE_DIV16 ((uint32_t)0x000000B0) /*!< SYSCLK divided by 16 */ -#define RCC_CFGR_HPRE_DIV64 ((uint32_t)0x000000C0) /*!< SYSCLK divided by 64 */ -#define RCC_CFGR_HPRE_DIV128 ((uint32_t)0x000000D0) /*!< SYSCLK divided by 128 */ -#define RCC_CFGR_HPRE_DIV256 ((uint32_t)0x000000E0) /*!< SYSCLK divided by 256 */ -#define RCC_CFGR_HPRE_DIV512 ((uint32_t)0x000000F0) /*!< SYSCLK divided by 512 */ - -/*!< PPRE1 configuration */ -#define RCC_CFGR_PPRE1 ((uint32_t)0x00000700) /*!< PRE1[2:0] bits (APB1 prescaler) */ -#define RCC_CFGR_PPRE1_0 ((uint32_t)0x00000100) /*!< Bit 0 */ -#define RCC_CFGR_PPRE1_1 ((uint32_t)0x00000200) /*!< Bit 1 */ -#define RCC_CFGR_PPRE1_2 ((uint32_t)0x00000400) /*!< Bit 2 */ - -#define RCC_CFGR_PPRE1_DIV1 ((uint32_t)0x00000000) /*!< HCLK not divided */ -#define RCC_CFGR_PPRE1_DIV2 ((uint32_t)0x00000400) /*!< HCLK divided by 2 */ -#define RCC_CFGR_PPRE1_DIV4 ((uint32_t)0x00000500) /*!< HCLK divided by 4 */ -#define RCC_CFGR_PPRE1_DIV8 ((uint32_t)0x00000600) /*!< HCLK divided by 8 */ -#define RCC_CFGR_PPRE1_DIV16 ((uint32_t)0x00000700) /*!< HCLK divided by 16 */ - -/*!< PPRE2 configuration */ -#define RCC_CFGR_PPRE2 ((uint32_t)0x00003800) /*!< PRE2[2:0] bits (APB2 prescaler) */ -#define RCC_CFGR_PPRE2_0 ((uint32_t)0x00000800) /*!< Bit 0 */ -#define RCC_CFGR_PPRE2_1 ((uint32_t)0x00001000) /*!< Bit 1 */ -#define RCC_CFGR_PPRE2_2 ((uint32_t)0x00002000) /*!< Bit 2 */ - -#define RCC_CFGR_PPRE2_DIV1 ((uint32_t)0x00000000) /*!< HCLK not divided */ -#define RCC_CFGR_PPRE2_DIV2 ((uint32_t)0x00002000) /*!< HCLK divided by 2 */ -#define RCC_CFGR_PPRE2_DIV4 ((uint32_t)0x00002800) /*!< HCLK divided by 4 */ -#define RCC_CFGR_PPRE2_DIV8 ((uint32_t)0x00003000) /*!< HCLK divided by 8 */ -#define RCC_CFGR_PPRE2_DIV16 ((uint32_t)0x00003800) /*!< HCLK divided by 16 */ - -/*!< ADCPPRE configuration */ -#define RCC_CFGR_ADCPRE ((uint32_t)0x0000C000) /*!< ADCPRE[1:0] bits (ADC prescaler) */ -#define RCC_CFGR_ADCPRE_0 ((uint32_t)0x00004000) /*!< Bit 0 */ -#define RCC_CFGR_ADCPRE_1 ((uint32_t)0x00008000) /*!< Bit 1 */ - -#define RCC_CFGR_ADCPRE_DIV2 ((uint32_t)0x00000000) /*!< PCLK2 divided by 2 */ -#define RCC_CFGR_ADCPRE_DIV4 ((uint32_t)0x00004000) /*!< PCLK2 divided by 4 */ -#define RCC_CFGR_ADCPRE_DIV6 ((uint32_t)0x00008000) /*!< PCLK2 divided by 6 */ -#define RCC_CFGR_ADCPRE_DIV8 ((uint32_t)0x0000C000) /*!< PCLK2 divided by 8 */ - -#define RCC_CFGR_PLLSRC ((uint32_t)0x00010000) /*!< PLL entry clock source */ - -#define RCC_CFGR_PLLXTPRE ((uint32_t)0x00020000) /*!< HSE divider for PLL entry */ - -/*!< PLLMUL configuration */ -#define RCC_CFGR_PLLMULL ((uint32_t)0x003C0000) /*!< PLLMUL[3:0] bits (PLL multiplication factor) */ -#define RCC_CFGR_PLLMULL_0 ((uint32_t)0x00040000) /*!< Bit 0 */ -#define RCC_CFGR_PLLMULL_1 ((uint32_t)0x00080000) /*!< Bit 1 */ -#define RCC_CFGR_PLLMULL_2 ((uint32_t)0x00100000) /*!< Bit 2 */ -#define RCC_CFGR_PLLMULL_3 ((uint32_t)0x00200000) /*!< Bit 3 */ - -#ifdef STM32F10X_CL - #define RCC_CFGR_PLLSRC_HSI_Div2 ((uint32_t)0x00000000) /*!< HSI clock divided by 2 selected as PLL entry clock source */ - #define RCC_CFGR_PLLSRC_PREDIV1 ((uint32_t)0x00010000) /*!< PREDIV1 clock selected as PLL entry clock source */ - - #define RCC_CFGR_PLLXTPRE_PREDIV1 ((uint32_t)0x00000000) /*!< PREDIV1 clock not divided for PLL entry */ - #define RCC_CFGR_PLLXTPRE_PREDIV1_Div2 ((uint32_t)0x00020000) /*!< PREDIV1 clock divided by 2 for PLL entry */ - - #define RCC_CFGR_PLLMULL4 ((uint32_t)0x00080000) /*!< PLL input clock * 4 */ - #define RCC_CFGR_PLLMULL5 ((uint32_t)0x000C0000) /*!< PLL input clock * 5 */ - #define RCC_CFGR_PLLMULL6 ((uint32_t)0x00100000) /*!< PLL input clock * 6 */ - #define RCC_CFGR_PLLMULL7 ((uint32_t)0x00140000) /*!< PLL input clock * 7 */ - #define RCC_CFGR_PLLMULL8 ((uint32_t)0x00180000) /*!< PLL input clock * 8 */ - #define RCC_CFGR_PLLMULL9 ((uint32_t)0x001C0000) /*!< PLL input clock * 9 */ - #define RCC_CFGR_PLLMULL6_5 ((uint32_t)0x00340000) /*!< PLL input clock * 6.5 */ - - #define RCC_CFGR_OTGFSPRE ((uint32_t)0x00400000) /*!< USB OTG FS prescaler */ - -/*!< MCO configuration */ - #define RCC_CFGR_MCO ((uint32_t)0x0F000000) /*!< MCO[3:0] bits (Microcontroller Clock Output) */ - #define RCC_CFGR_MCO_0 ((uint32_t)0x01000000) /*!< Bit 0 */ - #define RCC_CFGR_MCO_1 ((uint32_t)0x02000000) /*!< Bit 1 */ - #define RCC_CFGR_MCO_2 ((uint32_t)0x04000000) /*!< Bit 2 */ - #define RCC_CFGR_MCO_3 ((uint32_t)0x08000000) /*!< Bit 3 */ - - #define RCC_CFGR_MCO_NOCLOCK ((uint32_t)0x00000000) /*!< No clock */ - #define RCC_CFGR_MCO_SYSCLK ((uint32_t)0x04000000) /*!< System clock selected as MCO source */ - #define RCC_CFGR_MCO_HSI ((uint32_t)0x05000000) /*!< HSI clock selected as MCO source */ - #define RCC_CFGR_MCO_HSE ((uint32_t)0x06000000) /*!< HSE clock selected as MCO source */ - #define RCC_CFGR_MCO_PLLCLK_Div2 ((uint32_t)0x07000000) /*!< PLL clock divided by 2 selected as MCO source */ - #define RCC_CFGR_MCO_PLL2CLK ((uint32_t)0x08000000) /*!< PLL2 clock selected as MCO source*/ - #define RCC_CFGR_MCO_PLL3CLK_Div2 ((uint32_t)0x09000000) /*!< PLL3 clock divided by 2 selected as MCO source*/ - #define RCC_CFGR_MCO_Ext_HSE ((uint32_t)0x0A000000) /*!< XT1 external 3-25 MHz oscillator clock selected as MCO source */ - #define RCC_CFGR_MCO_PLL3CLK ((uint32_t)0x0B000000) /*!< PLL3 clock selected as MCO source */ -#elif defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) - #define RCC_CFGR_PLLSRC_HSI_Div2 ((uint32_t)0x00000000) /*!< HSI clock divided by 2 selected as PLL entry clock source */ - #define RCC_CFGR_PLLSRC_PREDIV1 ((uint32_t)0x00010000) /*!< PREDIV1 clock selected as PLL entry clock source */ - - #define RCC_CFGR_PLLXTPRE_PREDIV1 ((uint32_t)0x00000000) /*!< PREDIV1 clock not divided for PLL entry */ - #define RCC_CFGR_PLLXTPRE_PREDIV1_Div2 ((uint32_t)0x00020000) /*!< PREDIV1 clock divided by 2 for PLL entry */ - - #define RCC_CFGR_PLLMULL2 ((uint32_t)0x00000000) /*!< PLL input clock*2 */ - #define RCC_CFGR_PLLMULL3 ((uint32_t)0x00040000) /*!< PLL input clock*3 */ - #define RCC_CFGR_PLLMULL4 ((uint32_t)0x00080000) /*!< PLL input clock*4 */ - #define RCC_CFGR_PLLMULL5 ((uint32_t)0x000C0000) /*!< PLL input clock*5 */ - #define RCC_CFGR_PLLMULL6 ((uint32_t)0x00100000) /*!< PLL input clock*6 */ - #define RCC_CFGR_PLLMULL7 ((uint32_t)0x00140000) /*!< PLL input clock*7 */ - #define RCC_CFGR_PLLMULL8 ((uint32_t)0x00180000) /*!< PLL input clock*8 */ - #define RCC_CFGR_PLLMULL9 ((uint32_t)0x001C0000) /*!< PLL input clock*9 */ - #define RCC_CFGR_PLLMULL10 ((uint32_t)0x00200000) /*!< PLL input clock10 */ - #define RCC_CFGR_PLLMULL11 ((uint32_t)0x00240000) /*!< PLL input clock*11 */ - #define RCC_CFGR_PLLMULL12 ((uint32_t)0x00280000) /*!< PLL input clock*12 */ - #define RCC_CFGR_PLLMULL13 ((uint32_t)0x002C0000) /*!< PLL input clock*13 */ - #define RCC_CFGR_PLLMULL14 ((uint32_t)0x00300000) /*!< PLL input clock*14 */ - #define RCC_CFGR_PLLMULL15 ((uint32_t)0x00340000) /*!< PLL input clock*15 */ - #define RCC_CFGR_PLLMULL16 ((uint32_t)0x00380000) /*!< PLL input clock*16 */ - -/*!< MCO configuration */ - #define RCC_CFGR_MCO ((uint32_t)0x07000000) /*!< MCO[2:0] bits (Microcontroller Clock Output) */ - #define RCC_CFGR_MCO_0 ((uint32_t)0x01000000) /*!< Bit 0 */ - #define RCC_CFGR_MCO_1 ((uint32_t)0x02000000) /*!< Bit 1 */ - #define RCC_CFGR_MCO_2 ((uint32_t)0x04000000) /*!< Bit 2 */ - - #define RCC_CFGR_MCO_NOCLOCK ((uint32_t)0x00000000) /*!< No clock */ - #define RCC_CFGR_MCO_SYSCLK ((uint32_t)0x04000000) /*!< System clock selected as MCO source */ - #define RCC_CFGR_MCO_HSI ((uint32_t)0x05000000) /*!< HSI clock selected as MCO source */ - #define RCC_CFGR_MCO_HSE ((uint32_t)0x06000000) /*!< HSE clock selected as MCO source */ - #define RCC_CFGR_MCO_PLL ((uint32_t)0x07000000) /*!< PLL clock divided by 2 selected as MCO source */ -#else - #define RCC_CFGR_PLLSRC_HSI_Div2 ((uint32_t)0x00000000) /*!< HSI clock divided by 2 selected as PLL entry clock source */ - #define RCC_CFGR_PLLSRC_HSE ((uint32_t)0x00010000) /*!< HSE clock selected as PLL entry clock source */ - - #define RCC_CFGR_PLLXTPRE_HSE ((uint32_t)0x00000000) /*!< HSE clock not divided for PLL entry */ - #define RCC_CFGR_PLLXTPRE_HSE_Div2 ((uint32_t)0x00020000) /*!< HSE clock divided by 2 for PLL entry */ - - #define RCC_CFGR_PLLMULL2 ((uint32_t)0x00000000) /*!< PLL input clock*2 */ - #define RCC_CFGR_PLLMULL3 ((uint32_t)0x00040000) /*!< PLL input clock*3 */ - #define RCC_CFGR_PLLMULL4 ((uint32_t)0x00080000) /*!< PLL input clock*4 */ - #define RCC_CFGR_PLLMULL5 ((uint32_t)0x000C0000) /*!< PLL input clock*5 */ - #define RCC_CFGR_PLLMULL6 ((uint32_t)0x00100000) /*!< PLL input clock*6 */ - #define RCC_CFGR_PLLMULL7 ((uint32_t)0x00140000) /*!< PLL input clock*7 */ - #define RCC_CFGR_PLLMULL8 ((uint32_t)0x00180000) /*!< PLL input clock*8 */ - #define RCC_CFGR_PLLMULL9 ((uint32_t)0x001C0000) /*!< PLL input clock*9 */ - #define RCC_CFGR_PLLMULL10 ((uint32_t)0x00200000) /*!< PLL input clock10 */ - #define RCC_CFGR_PLLMULL11 ((uint32_t)0x00240000) /*!< PLL input clock*11 */ - #define RCC_CFGR_PLLMULL12 ((uint32_t)0x00280000) /*!< PLL input clock*12 */ - #define RCC_CFGR_PLLMULL13 ((uint32_t)0x002C0000) /*!< PLL input clock*13 */ - #define RCC_CFGR_PLLMULL14 ((uint32_t)0x00300000) /*!< PLL input clock*14 */ - #define RCC_CFGR_PLLMULL15 ((uint32_t)0x00340000) /*!< PLL input clock*15 */ - #define RCC_CFGR_PLLMULL16 ((uint32_t)0x00380000) /*!< PLL input clock*16 */ - #define RCC_CFGR_USBPRE ((uint32_t)0x00400000) /*!< USB Device prescaler */ - -/*!< MCO configuration */ - #define RCC_CFGR_MCO ((uint32_t)0x07000000) /*!< MCO[2:0] bits (Microcontroller Clock Output) */ - #define RCC_CFGR_MCO_0 ((uint32_t)0x01000000) /*!< Bit 0 */ - #define RCC_CFGR_MCO_1 ((uint32_t)0x02000000) /*!< Bit 1 */ - #define RCC_CFGR_MCO_2 ((uint32_t)0x04000000) /*!< Bit 2 */ - - #define RCC_CFGR_MCO_NOCLOCK ((uint32_t)0x00000000) /*!< No clock */ - #define RCC_CFGR_MCO_SYSCLK ((uint32_t)0x04000000) /*!< System clock selected as MCO source */ - #define RCC_CFGR_MCO_HSI ((uint32_t)0x05000000) /*!< HSI clock selected as MCO source */ - #define RCC_CFGR_MCO_HSE ((uint32_t)0x06000000) /*!< HSE clock selected as MCO source */ - #define RCC_CFGR_MCO_PLL ((uint32_t)0x07000000) /*!< PLL clock divided by 2 selected as MCO source */ -#endif /* STM32F10X_CL */ - -/*!<****************** Bit definition for RCC_CIR register ********************/ -#define RCC_CIR_LSIRDYF ((uint32_t)0x00000001) /*!< LSI Ready Interrupt flag */ -#define RCC_CIR_LSERDYF ((uint32_t)0x00000002) /*!< LSE Ready Interrupt flag */ -#define RCC_CIR_HSIRDYF ((uint32_t)0x00000004) /*!< HSI Ready Interrupt flag */ -#define RCC_CIR_HSERDYF ((uint32_t)0x00000008) /*!< HSE Ready Interrupt flag */ -#define RCC_CIR_PLLRDYF ((uint32_t)0x00000010) /*!< PLL Ready Interrupt flag */ -#define RCC_CIR_CSSF ((uint32_t)0x00000080) /*!< Clock Security System Interrupt flag */ -#define RCC_CIR_LSIRDYIE ((uint32_t)0x00000100) /*!< LSI Ready Interrupt Enable */ -#define RCC_CIR_LSERDYIE ((uint32_t)0x00000200) /*!< LSE Ready Interrupt Enable */ -#define RCC_CIR_HSIRDYIE ((uint32_t)0x00000400) /*!< HSI Ready Interrupt Enable */ -#define RCC_CIR_HSERDYIE ((uint32_t)0x00000800) /*!< HSE Ready Interrupt Enable */ -#define RCC_CIR_PLLRDYIE ((uint32_t)0x00001000) /*!< PLL Ready Interrupt Enable */ -#define RCC_CIR_LSIRDYC ((uint32_t)0x00010000) /*!< LSI Ready Interrupt Clear */ -#define RCC_CIR_LSERDYC ((uint32_t)0x00020000) /*!< LSE Ready Interrupt Clear */ -#define RCC_CIR_HSIRDYC ((uint32_t)0x00040000) /*!< HSI Ready Interrupt Clear */ -#define RCC_CIR_HSERDYC ((uint32_t)0x00080000) /*!< HSE Ready Interrupt Clear */ -#define RCC_CIR_PLLRDYC ((uint32_t)0x00100000) /*!< PLL Ready Interrupt Clear */ -#define RCC_CIR_CSSC ((uint32_t)0x00800000) /*!< Clock Security System Interrupt Clear */ - -#ifdef STM32F10X_CL - #define RCC_CIR_PLL2RDYF ((uint32_t)0x00000020) /*!< PLL2 Ready Interrupt flag */ - #define RCC_CIR_PLL3RDYF ((uint32_t)0x00000040) /*!< PLL3 Ready Interrupt flag */ - #define RCC_CIR_PLL2RDYIE ((uint32_t)0x00002000) /*!< PLL2 Ready Interrupt Enable */ - #define RCC_CIR_PLL3RDYIE ((uint32_t)0x00004000) /*!< PLL3 Ready Interrupt Enable */ - #define RCC_CIR_PLL2RDYC ((uint32_t)0x00200000) /*!< PLL2 Ready Interrupt Clear */ - #define RCC_CIR_PLL3RDYC ((uint32_t)0x00400000) /*!< PLL3 Ready Interrupt Clear */ -#endif /* STM32F10X_CL */ - -/***************** Bit definition for RCC_APB2RSTR register *****************/ -#define RCC_APB2RSTR_AFIORST ((uint32_t)0x00000001) /*!< Alternate Function I/O reset */ -#define RCC_APB2RSTR_IOPARST ((uint32_t)0x00000004) /*!< I/O port A reset */ -#define RCC_APB2RSTR_IOPBRST ((uint32_t)0x00000008) /*!< I/O port B reset */ -#define RCC_APB2RSTR_IOPCRST ((uint32_t)0x00000010) /*!< I/O port C reset */ -#define RCC_APB2RSTR_IOPDRST ((uint32_t)0x00000020) /*!< I/O port D reset */ -#define RCC_APB2RSTR_ADC1RST ((uint32_t)0x00000200) /*!< ADC 1 interface reset */ - -#if !defined (STM32F10X_LD_VL) && !defined (STM32F10X_MD_VL) -#define RCC_APB2RSTR_ADC2RST ((uint32_t)0x00000400) /*!< ADC 2 interface reset */ -#endif - -#define RCC_APB2RSTR_TIM1RST ((uint32_t)0x00000800) /*!< TIM1 Timer reset */ -#define RCC_APB2RSTR_SPI1RST ((uint32_t)0x00001000) /*!< SPI 1 reset */ -#define RCC_APB2RSTR_USART1RST ((uint32_t)0x00004000) /*!< USART1 reset */ - -#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) -#define RCC_APB2RSTR_TIM15RST ((uint32_t)0x00010000) /*!< TIM15 Timer reset */ -#define RCC_APB2RSTR_TIM16RST ((uint32_t)0x00020000) /*!< TIM16 Timer reset */ -#define RCC_APB2RSTR_TIM17RST ((uint32_t)0x00040000) /*!< TIM17 Timer reset */ -#endif - -#if !defined (STM32F10X_LD) && !defined (STM32F10X_LD_VL) - #define RCC_APB2RSTR_IOPERST ((uint32_t)0x00000040) /*!< I/O port E reset */ -#endif /* STM32F10X_LD && STM32F10X_LD_VL */ - -#ifdef STM32F10X_HD - #define RCC_APB2RSTR_IOPFRST ((uint32_t)0x00000080) /*!< I/O port F reset */ - #define RCC_APB2RSTR_IOPGRST ((uint32_t)0x00000100) /*!< I/O port G reset */ - #define RCC_APB2RSTR_TIM8RST ((uint32_t)0x00002000) /*!< TIM8 Timer reset */ - #define RCC_APB2RSTR_ADC3RST ((uint32_t)0x00008000) /*!< ADC3 interface reset */ -#endif /* STM32F10X_HD */ - -/***************** Bit definition for RCC_APB1RSTR register *****************/ -#define RCC_APB1RSTR_TIM2RST ((uint32_t)0x00000001) /*!< Timer 2 reset */ -#define RCC_APB1RSTR_TIM3RST ((uint32_t)0x00000002) /*!< Timer 3 reset */ -#define RCC_APB1RSTR_WWDGRST ((uint32_t)0x00000800) /*!< Window Watchdog reset */ -#define RCC_APB1RSTR_USART2RST ((uint32_t)0x00020000) /*!< USART 2 reset */ -#define RCC_APB1RSTR_I2C1RST ((uint32_t)0x00200000) /*!< I2C 1 reset */ - -#if !defined (STM32F10X_LD_VL) && !defined (STM32F10X_MD_VL) -#define RCC_APB1RSTR_CAN1RST ((uint32_t)0x02000000) /*!< CAN1 reset */ -#endif - -#define RCC_APB1RSTR_BKPRST ((uint32_t)0x08000000) /*!< Backup interface reset */ -#define RCC_APB1RSTR_PWRRST ((uint32_t)0x10000000) /*!< Power interface reset */ - -#if !defined (STM32F10X_LD) && !defined (STM32F10X_LD_VL) - #define RCC_APB1RSTR_TIM4RST ((uint32_t)0x00000004) /*!< Timer 4 reset */ - #define RCC_APB1RSTR_SPI2RST ((uint32_t)0x00004000) /*!< SPI 2 reset */ - #define RCC_APB1RSTR_USART3RST ((uint32_t)0x00040000) /*!< RUSART 3 reset */ - #define RCC_APB1RSTR_I2C2RST ((uint32_t)0x00400000) /*!< I2C 2 reset */ -#endif /* STM32F10X_LD && STM32F10X_LD_VL */ - -#if defined (STM32F10X_HD) || defined (STM32F10X_MD) || defined (STM32F10X_LD) - #define RCC_APB1RSTR_USBRST ((uint32_t)0x00800000) /*!< USB Device reset */ -#endif - -#if defined (STM32F10X_HD) || defined (STM32F10X_CL) - #define RCC_APB1RSTR_TIM5RST ((uint32_t)0x00000008) /*!< Timer 5 reset */ - #define RCC_APB1RSTR_TIM6RST ((uint32_t)0x00000010) /*!< Timer 6 reset */ - #define RCC_APB1RSTR_TIM7RST ((uint32_t)0x00000020) /*!< Timer 7 reset */ - #define RCC_APB1RSTR_SPI3RST ((uint32_t)0x00008000) /*!< SPI 3 reset */ - #define RCC_APB1RSTR_UART4RST ((uint32_t)0x00080000) /*!< UART 4 reset */ - #define RCC_APB1RSTR_UART5RST ((uint32_t)0x00100000) /*!< UART 5 reset */ - #define RCC_APB1RSTR_DACRST ((uint32_t)0x20000000) /*!< DAC interface reset */ -#endif - -#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) - #define RCC_APB1RSTR_TIM6RST ((uint32_t)0x00000010) /*!< Timer 6 reset */ - #define RCC_APB1RSTR_TIM7RST ((uint32_t)0x00000020) /*!< Timer 7 reset */ - #define RCC_APB1RSTR_DACRST ((uint32_t)0x20000000) /*!< DAC interface reset */ - #define RCC_APB1RSTR_CECRST ((uint32_t)0x40000000) /*!< CEC interface reset */ -#endif - -#ifdef STM32F10X_CL - #define RCC_APB1RSTR_CAN2RST ((uint32_t)0x04000000) /*!< CAN2 reset */ -#endif /* STM32F10X_CL */ - -/****************** Bit definition for RCC_AHBENR register ******************/ -#define RCC_AHBENR_DMA1EN ((uint16_t)0x0001) /*!< DMA1 clock enable */ -#define RCC_AHBENR_SRAMEN ((uint16_t)0x0004) /*!< SRAM interface clock enable */ -#define RCC_AHBENR_FLITFEN ((uint16_t)0x0010) /*!< FLITF clock enable */ -#define RCC_AHBENR_CRCEN ((uint16_t)0x0040) /*!< CRC clock enable */ - -#if defined (STM32F10X_HD) || defined (STM32F10X_CL) - #define RCC_AHBENR_DMA2EN ((uint16_t)0x0002) /*!< DMA2 clock enable */ -#endif - -#ifdef STM32F10X_HD - #define RCC_AHBENR_FSMCEN ((uint16_t)0x0100) /*!< FSMC clock enable */ - #define RCC_AHBENR_SDIOEN ((uint16_t)0x0400) /*!< SDIO clock enable */ -#endif /* STM32F10X_HD */ - -#ifdef STM32F10X_CL - #define RCC_AHBENR_OTGFSEN ((uint32_t)0x00001000) /*!< USB OTG FS clock enable */ - #define RCC_AHBENR_ETHMACEN ((uint32_t)0x00004000) /*!< ETHERNET MAC clock enable */ - #define RCC_AHBENR_ETHMACTXEN ((uint32_t)0x00008000) /*!< ETHERNET MAC Tx clock enable */ - #define RCC_AHBENR_ETHMACRXEN ((uint32_t)0x00010000) /*!< ETHERNET MAC Rx clock enable */ -#endif /* STM32F10X_CL */ - -/****************** Bit definition for RCC_APB2ENR register *****************/ -#define RCC_APB2ENR_AFIOEN ((uint32_t)0x00000001) /*!< Alternate Function I/O clock enable */ -#define RCC_APB2ENR_IOPAEN ((uint32_t)0x00000004) /*!< I/O port A clock enable */ -#define RCC_APB2ENR_IOPBEN ((uint32_t)0x00000008) /*!< I/O port B clock enable */ -#define RCC_APB2ENR_IOPCEN ((uint32_t)0x00000010) /*!< I/O port C clock enable */ -#define RCC_APB2ENR_IOPDEN ((uint32_t)0x00000020) /*!< I/O port D clock enable */ -#define RCC_APB2ENR_ADC1EN ((uint32_t)0x00000200) /*!< ADC 1 interface clock enable */ - -#if !defined (STM32F10X_LD_VL) && !defined (STM32F10X_MD_VL) -#define RCC_APB2ENR_ADC2EN ((uint32_t)0x00000400) /*!< ADC 2 interface clock enable */ -#endif - -#define RCC_APB2ENR_TIM1EN ((uint32_t)0x00000800) /*!< TIM1 Timer clock enable */ -#define RCC_APB2ENR_SPI1EN ((uint32_t)0x00001000) /*!< SPI 1 clock enable */ -#define RCC_APB2ENR_USART1EN ((uint32_t)0x00004000) /*!< USART1 clock enable */ - -#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) -#define RCC_APB2ENR_TIM15EN ((uint32_t)0x00010000) /*!< TIM15 Timer clock enable */ -#define RCC_APB2ENR_TIM16EN ((uint32_t)0x00020000) /*!< TIM16 Timer clock enable */ -#define RCC_APB2ENR_TIM17EN ((uint32_t)0x00040000) /*!< TIM17 Timer clock enable */ -#endif - -#if !defined (STM32F10X_LD) && !defined (STM32F10X_LD_VL) - #define RCC_APB2ENR_IOPEEN ((uint32_t)0x00000040) /*!< I/O port E clock enable */ -#endif /* STM32F10X_LD && STM32F10X_LD_VL */ - -#ifdef STM32F10X_HD - #define RCC_APB2ENR_IOPFEN ((uint32_t)0x00000080) /*!< I/O port F clock enable */ - #define RCC_APB2ENR_IOPGEN ((uint32_t)0x00000100) /*!< I/O port G clock enable */ - #define RCC_APB2ENR_TIM8EN ((uint32_t)0x00002000) /*!< TIM8 Timer clock enable */ - #define RCC_APB2ENR_ADC3EN ((uint32_t)0x00008000) /*!< DMA1 clock enable */ -#endif /* STM32F10X_HD */ - -/***************** Bit definition for RCC_APB1ENR register ******************/ -#define RCC_APB1ENR_TIM2EN ((uint32_t)0x00000001) /*!< Timer 2 clock enabled*/ -#define RCC_APB1ENR_TIM3EN ((uint32_t)0x00000002) /*!< Timer 3 clock enable */ -#define RCC_APB1ENR_WWDGEN ((uint32_t)0x00000800) /*!< Window Watchdog clock enable */ -#define RCC_APB1ENR_USART2EN ((uint32_t)0x00020000) /*!< USART 2 clock enable */ -#define RCC_APB1ENR_I2C1EN ((uint32_t)0x00200000) /*!< I2C 1 clock enable */ - -#if !defined (STM32F10X_LD_VL) && !defined (STM32F10X_MD_VL) -#define RCC_APB1ENR_CAN1EN ((uint32_t)0x02000000) /*!< CAN1 clock enable */ -#endif - -#define RCC_APB1ENR_BKPEN ((uint32_t)0x08000000) /*!< Backup interface clock enable */ -#define RCC_APB1ENR_PWREN ((uint32_t)0x10000000) /*!< Power interface clock enable */ - -#if !defined (STM32F10X_LD) && !defined (STM32F10X_LD_VL) - #define RCC_APB1ENR_TIM4EN ((uint32_t)0x00000004) /*!< Timer 4 clock enable */ - #define RCC_APB1ENR_SPI2EN ((uint32_t)0x00004000) /*!< SPI 2 clock enable */ - #define RCC_APB1ENR_USART3EN ((uint32_t)0x00040000) /*!< USART 3 clock enable */ - #define RCC_APB1ENR_I2C2EN ((uint32_t)0x00400000) /*!< I2C 2 clock enable */ -#endif /* STM32F10X_LD && STM32F10X_LD_VL */ - -#if defined (STM32F10X_HD) || defined (STM32F10X_MD) || defined (STM32F10X_LD) - #define RCC_APB1ENR_USBEN ((uint32_t)0x00800000) /*!< USB Device clock enable */ -#endif - -#if defined (STM32F10X_HD) || defined (STM32F10X_CL) - #define RCC_APB1ENR_TIM5EN ((uint32_t)0x00000008) /*!< Timer 5 clock enable */ - #define RCC_APB1ENR_TIM6EN ((uint32_t)0x00000010) /*!< Timer 6 clock enable */ - #define RCC_APB1ENR_TIM7EN ((uint32_t)0x00000020) /*!< Timer 7 clock enable */ - #define RCC_APB1ENR_SPI3EN ((uint32_t)0x00008000) /*!< SPI 3 clock enable */ - #define RCC_APB1ENR_UART4EN ((uint32_t)0x00080000) /*!< UART 4 clock enable */ - #define RCC_APB1ENR_UART5EN ((uint32_t)0x00100000) /*!< UART 5 clock enable */ - #define RCC_APB1ENR_DACEN ((uint32_t)0x20000000) /*!< DAC interface clock enable */ -#endif - -#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) - #define RCC_APB1ENR_TIM6EN ((uint32_t)0x00000010) /*!< Timer 6 clock enable */ - #define RCC_APB1ENR_TIM7EN ((uint32_t)0x00000020) /*!< Timer 7 clock enable */ - #define RCC_APB1ENR_DACEN ((uint32_t)0x20000000) /*!< DAC interface clock enable */ - #define RCC_APB1ENR_CECEN ((uint32_t)0x40000000) /*!< CEC interface clock enable */ -#endif - -#ifdef STM32F10X_CL - #define RCC_APB1ENR_CAN2EN ((uint32_t)0x04000000) /*!< CAN2 clock enable */ -#endif /* STM32F10X_CL */ - -/******************* Bit definition for RCC_BDCR register *******************/ -#define RCC_BDCR_LSEON ((uint32_t)0x00000001) /*!< External Low Speed oscillator enable */ -#define RCC_BDCR_LSERDY ((uint32_t)0x00000002) /*!< External Low Speed oscillator Ready */ -#define RCC_BDCR_LSEBYP ((uint32_t)0x00000004) /*!< External Low Speed oscillator Bypass */ - -#define RCC_BDCR_RTCSEL ((uint32_t)0x00000300) /*!< RTCSEL[1:0] bits (RTC clock source selection) */ -#define RCC_BDCR_RTCSEL_0 ((uint32_t)0x00000100) /*!< Bit 0 */ -#define RCC_BDCR_RTCSEL_1 ((uint32_t)0x00000200) /*!< Bit 1 */ - -/*!< RTC congiguration */ -#define RCC_BDCR_RTCSEL_NOCLOCK ((uint32_t)0x00000000) /*!< No clock */ -#define RCC_BDCR_RTCSEL_LSE ((uint32_t)0x00000100) /*!< LSE oscillator clock used as RTC clock */ -#define RCC_BDCR_RTCSEL_LSI ((uint32_t)0x00000200) /*!< LSI oscillator clock used as RTC clock */ -#define RCC_BDCR_RTCSEL_HSE ((uint32_t)0x00000300) /*!< HSE oscillator clock divided by 128 used as RTC clock */ - -#define RCC_BDCR_RTCEN ((uint32_t)0x00008000) /*!< RTC clock enable */ -#define RCC_BDCR_BDRST ((uint32_t)0x00010000) /*!< Backup domain software reset */ - -/******************* Bit definition for RCC_CSR register ********************/ -#define RCC_CSR_LSION ((uint32_t)0x00000001) /*!< Internal Low Speed oscillator enable */ -#define RCC_CSR_LSIRDY ((uint32_t)0x00000002) /*!< Internal Low Speed oscillator Ready */ -#define RCC_CSR_RMVF ((uint32_t)0x01000000) /*!< Remove reset flag */ -#define RCC_CSR_PINRSTF ((uint32_t)0x04000000) /*!< PIN reset flag */ -#define RCC_CSR_PORRSTF ((uint32_t)0x08000000) /*!< POR/PDR reset flag */ -#define RCC_CSR_SFTRSTF ((uint32_t)0x10000000) /*!< Software Reset flag */ -#define RCC_CSR_IWDGRSTF ((uint32_t)0x20000000) /*!< Independent Watchdog reset flag */ -#define RCC_CSR_WWDGRSTF ((uint32_t)0x40000000) /*!< Window watchdog reset flag */ -#define RCC_CSR_LPWRRSTF ((uint32_t)0x80000000) /*!< Low-Power reset flag */ - -#ifdef STM32F10X_CL -/******************* Bit definition for RCC_AHBRSTR register ****************/ - #define RCC_AHBRSTR_OTGFSRST ((uint32_t)0x00001000) /*!< USB OTG FS reset */ - #define RCC_AHBRSTR_ETHMACRST ((uint32_t)0x00004000) /*!< ETHERNET MAC reset */ - -/******************* Bit definition for RCC_CFGR2 register ******************/ -/*!< PREDIV1 configuration */ - #define RCC_CFGR2_PREDIV1 ((uint32_t)0x0000000F) /*!< PREDIV1[3:0] bits */ - #define RCC_CFGR2_PREDIV1_0 ((uint32_t)0x00000001) /*!< Bit 0 */ - #define RCC_CFGR2_PREDIV1_1 ((uint32_t)0x00000002) /*!< Bit 1 */ - #define RCC_CFGR2_PREDIV1_2 ((uint32_t)0x00000004) /*!< Bit 2 */ - #define RCC_CFGR2_PREDIV1_3 ((uint32_t)0x00000008) /*!< Bit 3 */ - - #define RCC_CFGR2_PREDIV1_DIV1 ((uint32_t)0x00000000) /*!< PREDIV1 input clock not divided */ - #define RCC_CFGR2_PREDIV1_DIV2 ((uint32_t)0x00000001) /*!< PREDIV1 input clock divided by 2 */ - #define RCC_CFGR2_PREDIV1_DIV3 ((uint32_t)0x00000002) /*!< PREDIV1 input clock divided by 3 */ - #define RCC_CFGR2_PREDIV1_DIV4 ((uint32_t)0x00000003) /*!< PREDIV1 input clock divided by 4 */ - #define RCC_CFGR2_PREDIV1_DIV5 ((uint32_t)0x00000004) /*!< PREDIV1 input clock divided by 5 */ - #define RCC_CFGR2_PREDIV1_DIV6 ((uint32_t)0x00000005) /*!< PREDIV1 input clock divided by 6 */ - #define RCC_CFGR2_PREDIV1_DIV7 ((uint32_t)0x00000006) /*!< PREDIV1 input clock divided by 7 */ - #define RCC_CFGR2_PREDIV1_DIV8 ((uint32_t)0x00000007) /*!< PREDIV1 input clock divided by 8 */ - #define RCC_CFGR2_PREDIV1_DIV9 ((uint32_t)0x00000008) /*!< PREDIV1 input clock divided by 9 */ - #define RCC_CFGR2_PREDIV1_DIV10 ((uint32_t)0x00000009) /*!< PREDIV1 input clock divided by 10 */ - #define RCC_CFGR2_PREDIV1_DIV11 ((uint32_t)0x0000000A) /*!< PREDIV1 input clock divided by 11 */ - #define RCC_CFGR2_PREDIV1_DIV12 ((uint32_t)0x0000000B) /*!< PREDIV1 input clock divided by 12 */ - #define RCC_CFGR2_PREDIV1_DIV13 ((uint32_t)0x0000000C) /*!< PREDIV1 input clock divided by 13 */ - #define RCC_CFGR2_PREDIV1_DIV14 ((uint32_t)0x0000000D) /*!< PREDIV1 input clock divided by 14 */ - #define RCC_CFGR2_PREDIV1_DIV15 ((uint32_t)0x0000000E) /*!< PREDIV1 input clock divided by 15 */ - #define RCC_CFGR2_PREDIV1_DIV16 ((uint32_t)0x0000000F) /*!< PREDIV1 input clock divided by 16 */ - -/*!< PREDIV2 configuration */ - #define RCC_CFGR2_PREDIV2 ((uint32_t)0x000000F0) /*!< PREDIV2[3:0] bits */ - #define RCC_CFGR2_PREDIV2_0 ((uint32_t)0x00000010) /*!< Bit 0 */ - #define RCC_CFGR2_PREDIV2_1 ((uint32_t)0x00000020) /*!< Bit 1 */ - #define RCC_CFGR2_PREDIV2_2 ((uint32_t)0x00000040) /*!< Bit 2 */ - #define RCC_CFGR2_PREDIV2_3 ((uint32_t)0x00000080) /*!< Bit 3 */ - - #define RCC_CFGR2_PREDIV2_DIV1 ((uint32_t)0x00000000) /*!< PREDIV2 input clock not divided */ - #define RCC_CFGR2_PREDIV2_DIV2 ((uint32_t)0x00000010) /*!< PREDIV2 input clock divided by 2 */ - #define RCC_CFGR2_PREDIV2_DIV3 ((uint32_t)0x00000020) /*!< PREDIV2 input clock divided by 3 */ - #define RCC_CFGR2_PREDIV2_DIV4 ((uint32_t)0x00000030) /*!< PREDIV2 input clock divided by 4 */ - #define RCC_CFGR2_PREDIV2_DIV5 ((uint32_t)0x00000040) /*!< PREDIV2 input clock divided by 5 */ - #define RCC_CFGR2_PREDIV2_DIV6 ((uint32_t)0x00000050) /*!< PREDIV2 input clock divided by 6 */ - #define RCC_CFGR2_PREDIV2_DIV7 ((uint32_t)0x00000060) /*!< PREDIV2 input clock divided by 7 */ - #define RCC_CFGR2_PREDIV2_DIV8 ((uint32_t)0x00000070) /*!< PREDIV2 input clock divided by 8 */ - #define RCC_CFGR2_PREDIV2_DIV9 ((uint32_t)0x00000080) /*!< PREDIV2 input clock divided by 9 */ - #define RCC_CFGR2_PREDIV2_DIV10 ((uint32_t)0x00000090) /*!< PREDIV2 input clock divided by 10 */ - #define RCC_CFGR2_PREDIV2_DIV11 ((uint32_t)0x000000A0) /*!< PREDIV2 input clock divided by 11 */ - #define RCC_CFGR2_PREDIV2_DIV12 ((uint32_t)0x000000B0) /*!< PREDIV2 input clock divided by 12 */ - #define RCC_CFGR2_PREDIV2_DIV13 ((uint32_t)0x000000C0) /*!< PREDIV2 input clock divided by 13 */ - #define RCC_CFGR2_PREDIV2_DIV14 ((uint32_t)0x000000D0) /*!< PREDIV2 input clock divided by 14 */ - #define RCC_CFGR2_PREDIV2_DIV15 ((uint32_t)0x000000E0) /*!< PREDIV2 input clock divided by 15 */ - #define RCC_CFGR2_PREDIV2_DIV16 ((uint32_t)0x000000F0) /*!< PREDIV2 input clock divided by 16 */ - -/*!< PLL2MUL configuration */ - #define RCC_CFGR2_PLL2MUL ((uint32_t)0x00000F00) /*!< PLL2MUL[3:0] bits */ - #define RCC_CFGR2_PLL2MUL_0 ((uint32_t)0x00000100) /*!< Bit 0 */ - #define RCC_CFGR2_PLL2MUL_1 ((uint32_t)0x00000200) /*!< Bit 1 */ - #define RCC_CFGR2_PLL2MUL_2 ((uint32_t)0x00000400) /*!< Bit 2 */ - #define RCC_CFGR2_PLL2MUL_3 ((uint32_t)0x00000800) /*!< Bit 3 */ - - #define RCC_CFGR2_PLL2MUL8 ((uint32_t)0x00000600) /*!< PLL2 input clock * 8 */ - #define RCC_CFGR2_PLL2MUL9 ((uint32_t)0x00000700) /*!< PLL2 input clock * 9 */ - #define RCC_CFGR2_PLL2MUL10 ((uint32_t)0x00000800) /*!< PLL2 input clock * 10 */ - #define RCC_CFGR2_PLL2MUL11 ((uint32_t)0x00000900) /*!< PLL2 input clock * 11 */ - #define RCC_CFGR2_PLL2MUL12 ((uint32_t)0x00000A00) /*!< PLL2 input clock * 12 */ - #define RCC_CFGR2_PLL2MUL13 ((uint32_t)0x00000B00) /*!< PLL2 input clock * 13 */ - #define RCC_CFGR2_PLL2MUL14 ((uint32_t)0x00000C00) /*!< PLL2 input clock * 14 */ - #define RCC_CFGR2_PLL2MUL16 ((uint32_t)0x00000E00) /*!< PLL2 input clock * 16 */ - #define RCC_CFGR2_PLL2MUL20 ((uint32_t)0x00000F00) /*!< PLL2 input clock * 20 */ - -/*!< PLL3MUL configuration */ - #define RCC_CFGR2_PLL3MUL ((uint32_t)0x0000F000) /*!< PLL3MUL[3:0] bits */ - #define RCC_CFGR2_PLL3MUL_0 ((uint32_t)0x00001000) /*!< Bit 0 */ - #define RCC_CFGR2_PLL3MUL_1 ((uint32_t)0x00002000) /*!< Bit 1 */ - #define RCC_CFGR2_PLL3MUL_2 ((uint32_t)0x00004000) /*!< Bit 2 */ - #define RCC_CFGR2_PLL3MUL_3 ((uint32_t)0x00008000) /*!< Bit 3 */ - - #define RCC_CFGR2_PLL3MUL8 ((uint32_t)0x00006000) /*!< PLL3 input clock * 8 */ - #define RCC_CFGR2_PLL3MUL9 ((uint32_t)0x00007000) /*!< PLL3 input clock * 9 */ - #define RCC_CFGR2_PLL3MUL10 ((uint32_t)0x00008000) /*!< PLL3 input clock * 10 */ - #define RCC_CFGR2_PLL3MUL11 ((uint32_t)0x00009000) /*!< PLL3 input clock * 11 */ - #define RCC_CFGR2_PLL3MUL12 ((uint32_t)0x0000A000) /*!< PLL3 input clock * 12 */ - #define RCC_CFGR2_PLL3MUL13 ((uint32_t)0x0000B000) /*!< PLL3 input clock * 13 */ - #define RCC_CFGR2_PLL3MUL14 ((uint32_t)0x0000C000) /*!< PLL3 input clock * 14 */ - #define RCC_CFGR2_PLL3MUL16 ((uint32_t)0x0000E000) /*!< PLL3 input clock * 16 */ - #define RCC_CFGR2_PLL3MUL20 ((uint32_t)0x0000F000) /*!< PLL3 input clock * 20 */ - - #define RCC_CFGR2_PREDIV1SRC ((uint32_t)0x00010000) /*!< PREDIV1 entry clock source */ - #define RCC_CFGR2_PREDIV1SRC_PLL2 ((uint32_t)0x00010000) /*!< PLL2 selected as PREDIV1 entry clock source */ - #define RCC_CFGR2_PREDIV1SRC_HSE ((uint32_t)0x00000000) /*!< HSE selected as PREDIV1 entry clock source */ - #define RCC_CFGR2_I2S2SRC ((uint32_t)0x00020000) /*!< I2S2 entry clock source */ - #define RCC_CFGR2_I2S3SRC ((uint32_t)0x00040000) /*!< I2S3 clock source */ -#endif /* STM32F10X_CL */ - -#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) -/******************* Bit definition for RCC_CFGR2 register ******************/ -/*!< PREDIV1 configuration */ - #define RCC_CFGR2_PREDIV1 ((uint32_t)0x0000000F) /*!< PREDIV1[3:0] bits */ - #define RCC_CFGR2_PREDIV1_0 ((uint32_t)0x00000001) /*!< Bit 0 */ - #define RCC_CFGR2_PREDIV1_1 ((uint32_t)0x00000002) /*!< Bit 1 */ - #define RCC_CFGR2_PREDIV1_2 ((uint32_t)0x00000004) /*!< Bit 2 */ - #define RCC_CFGR2_PREDIV1_3 ((uint32_t)0x00000008) /*!< Bit 3 */ - - #define RCC_CFGR2_PREDIV1_DIV1 ((uint32_t)0x00000000) /*!< PREDIV1 input clock not divided */ - #define RCC_CFGR2_PREDIV1_DIV2 ((uint32_t)0x00000001) /*!< PREDIV1 input clock divided by 2 */ - #define RCC_CFGR2_PREDIV1_DIV3 ((uint32_t)0x00000002) /*!< PREDIV1 input clock divided by 3 */ - #define RCC_CFGR2_PREDIV1_DIV4 ((uint32_t)0x00000003) /*!< PREDIV1 input clock divided by 4 */ - #define RCC_CFGR2_PREDIV1_DIV5 ((uint32_t)0x00000004) /*!< PREDIV1 input clock divided by 5 */ - #define RCC_CFGR2_PREDIV1_DIV6 ((uint32_t)0x00000005) /*!< PREDIV1 input clock divided by 6 */ - #define RCC_CFGR2_PREDIV1_DIV7 ((uint32_t)0x00000006) /*!< PREDIV1 input clock divided by 7 */ - #define RCC_CFGR2_PREDIV1_DIV8 ((uint32_t)0x00000007) /*!< PREDIV1 input clock divided by 8 */ - #define RCC_CFGR2_PREDIV1_DIV9 ((uint32_t)0x00000008) /*!< PREDIV1 input clock divided by 9 */ - #define RCC_CFGR2_PREDIV1_DIV10 ((uint32_t)0x00000009) /*!< PREDIV1 input clock divided by 10 */ - #define RCC_CFGR2_PREDIV1_DIV11 ((uint32_t)0x0000000A) /*!< PREDIV1 input clock divided by 11 */ - #define RCC_CFGR2_PREDIV1_DIV12 ((uint32_t)0x0000000B) /*!< PREDIV1 input clock divided by 12 */ - #define RCC_CFGR2_PREDIV1_DIV13 ((uint32_t)0x0000000C) /*!< PREDIV1 input clock divided by 13 */ - #define RCC_CFGR2_PREDIV1_DIV14 ((uint32_t)0x0000000D) /*!< PREDIV1 input clock divided by 14 */ - #define RCC_CFGR2_PREDIV1_DIV15 ((uint32_t)0x0000000E) /*!< PREDIV1 input clock divided by 15 */ - #define RCC_CFGR2_PREDIV1_DIV16 ((uint32_t)0x0000000F) /*!< PREDIV1 input clock divided by 16 */ -#endif - -/******************************************************************************/ -/* */ -/* General Purpose and Alternate Function I/O */ -/* */ -/******************************************************************************/ - -/******************* Bit definition for GPIO_CRL register *******************/ -#define GPIO_CRL_MODE ((uint32_t)0x33333333) /*!< Port x mode bits */ - -#define GPIO_CRL_MODE0 ((uint32_t)0x00000003) /*!< MODE0[1:0] bits (Port x mode bits, pin 0) */ -#define GPIO_CRL_MODE0_0 ((uint32_t)0x00000001) /*!< Bit 0 */ -#define GPIO_CRL_MODE0_1 ((uint32_t)0x00000002) /*!< Bit 1 */ - -#define GPIO_CRL_MODE1 ((uint32_t)0x00000030) /*!< MODE1[1:0] bits (Port x mode bits, pin 1) */ -#define GPIO_CRL_MODE1_0 ((uint32_t)0x00000010) /*!< Bit 0 */ -#define GPIO_CRL_MODE1_1 ((uint32_t)0x00000020) /*!< Bit 1 */ - -#define GPIO_CRL_MODE2 ((uint32_t)0x00000300) /*!< MODE2[1:0] bits (Port x mode bits, pin 2) */ -#define GPIO_CRL_MODE2_0 ((uint32_t)0x00000100) /*!< Bit 0 */ -#define GPIO_CRL_MODE2_1 ((uint32_t)0x00000200) /*!< Bit 1 */ - -#define GPIO_CRL_MODE3 ((uint32_t)0x00003000) /*!< MODE3[1:0] bits (Port x mode bits, pin 3) */ -#define GPIO_CRL_MODE3_0 ((uint32_t)0x00001000) /*!< Bit 0 */ -#define GPIO_CRL_MODE3_1 ((uint32_t)0x00002000) /*!< Bit 1 */ - -#define GPIO_CRL_MODE4 ((uint32_t)0x00030000) /*!< MODE4[1:0] bits (Port x mode bits, pin 4) */ -#define GPIO_CRL_MODE4_0 ((uint32_t)0x00010000) /*!< Bit 0 */ -#define GPIO_CRL_MODE4_1 ((uint32_t)0x00020000) /*!< Bit 1 */ - -#define GPIO_CRL_MODE5 ((uint32_t)0x00300000) /*!< MODE5[1:0] bits (Port x mode bits, pin 5) */ -#define GPIO_CRL_MODE5_0 ((uint32_t)0x00100000) /*!< Bit 0 */ -#define GPIO_CRL_MODE5_1 ((uint32_t)0x00200000) /*!< Bit 1 */ - -#define GPIO_CRL_MODE6 ((uint32_t)0x03000000) /*!< MODE6[1:0] bits (Port x mode bits, pin 6) */ -#define GPIO_CRL_MODE6_0 ((uint32_t)0x01000000) /*!< Bit 0 */ -#define GPIO_CRL_MODE6_1 ((uint32_t)0x02000000) /*!< Bit 1 */ - -#define GPIO_CRL_MODE7 ((uint32_t)0x30000000) /*!< MODE7[1:0] bits (Port x mode bits, pin 7) */ -#define GPIO_CRL_MODE7_0 ((uint32_t)0x10000000) /*!< Bit 0 */ -#define GPIO_CRL_MODE7_1 ((uint32_t)0x20000000) /*!< Bit 1 */ - -#define GPIO_CRL_CNF ((uint32_t)0xCCCCCCCC) /*!< Port x configuration bits */ - -#define GPIO_CRL_CNF0 ((uint32_t)0x0000000C) /*!< CNF0[1:0] bits (Port x configuration bits, pin 0) */ -#define GPIO_CRL_CNF0_0 ((uint32_t)0x00000004) /*!< Bit 0 */ -#define GPIO_CRL_CNF0_1 ((uint32_t)0x00000008) /*!< Bit 1 */ - -#define GPIO_CRL_CNF1 ((uint32_t)0x000000C0) /*!< CNF1[1:0] bits (Port x configuration bits, pin 1) */ -#define GPIO_CRL_CNF1_0 ((uint32_t)0x00000040) /*!< Bit 0 */ -#define GPIO_CRL_CNF1_1 ((uint32_t)0x00000080) /*!< Bit 1 */ - -#define GPIO_CRL_CNF2 ((uint32_t)0x00000C00) /*!< CNF2[1:0] bits (Port x configuration bits, pin 2) */ -#define GPIO_CRL_CNF2_0 ((uint32_t)0x00000400) /*!< Bit 0 */ -#define GPIO_CRL_CNF2_1 ((uint32_t)0x00000800) /*!< Bit 1 */ - -#define GPIO_CRL_CNF3 ((uint32_t)0x0000C000) /*!< CNF3[1:0] bits (Port x configuration bits, pin 3) */ -#define GPIO_CRL_CNF3_0 ((uint32_t)0x00004000) /*!< Bit 0 */ -#define GPIO_CRL_CNF3_1 ((uint32_t)0x00008000) /*!< Bit 1 */ - -#define GPIO_CRL_CNF4 ((uint32_t)0x000C0000) /*!< CNF4[1:0] bits (Port x configuration bits, pin 4) */ -#define GPIO_CRL_CNF4_0 ((uint32_t)0x00040000) /*!< Bit 0 */ -#define GPIO_CRL_CNF4_1 ((uint32_t)0x00080000) /*!< Bit 1 */ - -#define GPIO_CRL_CNF5 ((uint32_t)0x00C00000) /*!< CNF5[1:0] bits (Port x configuration bits, pin 5) */ -#define GPIO_CRL_CNF5_0 ((uint32_t)0x00400000) /*!< Bit 0 */ -#define GPIO_CRL_CNF5_1 ((uint32_t)0x00800000) /*!< Bit 1 */ - -#define GPIO_CRL_CNF6 ((uint32_t)0x0C000000) /*!< CNF6[1:0] bits (Port x configuration bits, pin 6) */ -#define GPIO_CRL_CNF6_0 ((uint32_t)0x04000000) /*!< Bit 0 */ -#define GPIO_CRL_CNF6_1 ((uint32_t)0x08000000) /*!< Bit 1 */ - -#define GPIO_CRL_CNF7 ((uint32_t)0xC0000000) /*!< CNF7[1:0] bits (Port x configuration bits, pin 7) */ -#define GPIO_CRL_CNF7_0 ((uint32_t)0x40000000) /*!< Bit 0 */ -#define GPIO_CRL_CNF7_1 ((uint32_t)0x80000000) /*!< Bit 1 */ - -/******************* Bit definition for GPIO_CRH register *******************/ -#define GPIO_CRH_MODE ((uint32_t)0x33333333) /*!< Port x mode bits */ - -#define GPIO_CRH_MODE8 ((uint32_t)0x00000003) /*!< MODE8[1:0] bits (Port x mode bits, pin 8) */ -#define GPIO_CRH_MODE8_0 ((uint32_t)0x00000001) /*!< Bit 0 */ -#define GPIO_CRH_MODE8_1 ((uint32_t)0x00000002) /*!< Bit 1 */ - -#define GPIO_CRH_MODE9 ((uint32_t)0x00000030) /*!< MODE9[1:0] bits (Port x mode bits, pin 9) */ -#define GPIO_CRH_MODE9_0 ((uint32_t)0x00000010) /*!< Bit 0 */ -#define GPIO_CRH_MODE9_1 ((uint32_t)0x00000020) /*!< Bit 1 */ - -#define GPIO_CRH_MODE10 ((uint32_t)0x00000300) /*!< MODE10[1:0] bits (Port x mode bits, pin 10) */ -#define GPIO_CRH_MODE10_0 ((uint32_t)0x00000100) /*!< Bit 0 */ -#define GPIO_CRH_MODE10_1 ((uint32_t)0x00000200) /*!< Bit 1 */ - -#define GPIO_CRH_MODE11 ((uint32_t)0x00003000) /*!< MODE11[1:0] bits (Port x mode bits, pin 11) */ -#define GPIO_CRH_MODE11_0 ((uint32_t)0x00001000) /*!< Bit 0 */ -#define GPIO_CRH_MODE11_1 ((uint32_t)0x00002000) /*!< Bit 1 */ - -#define GPIO_CRH_MODE12 ((uint32_t)0x00030000) /*!< MODE12[1:0] bits (Port x mode bits, pin 12) */ -#define GPIO_CRH_MODE12_0 ((uint32_t)0x00010000) /*!< Bit 0 */ -#define GPIO_CRH_MODE12_1 ((uint32_t)0x00020000) /*!< Bit 1 */ - -#define GPIO_CRH_MODE13 ((uint32_t)0x00300000) /*!< MODE13[1:0] bits (Port x mode bits, pin 13) */ -#define GPIO_CRH_MODE13_0 ((uint32_t)0x00100000) /*!< Bit 0 */ -#define GPIO_CRH_MODE13_1 ((uint32_t)0x00200000) /*!< Bit 1 */ - -#define GPIO_CRH_MODE14 ((uint32_t)0x03000000) /*!< MODE14[1:0] bits (Port x mode bits, pin 14) */ -#define GPIO_CRH_MODE14_0 ((uint32_t)0x01000000) /*!< Bit 0 */ -#define GPIO_CRH_MODE14_1 ((uint32_t)0x02000000) /*!< Bit 1 */ - -#define GPIO_CRH_MODE15 ((uint32_t)0x30000000) /*!< MODE15[1:0] bits (Port x mode bits, pin 15) */ -#define GPIO_CRH_MODE15_0 ((uint32_t)0x10000000) /*!< Bit 0 */ -#define GPIO_CRH_MODE15_1 ((uint32_t)0x20000000) /*!< Bit 1 */ - -#define GPIO_CRH_CNF ((uint32_t)0xCCCCCCCC) /*!< Port x configuration bits */ - -#define GPIO_CRH_CNF8 ((uint32_t)0x0000000C) /*!< CNF8[1:0] bits (Port x configuration bits, pin 8) */ -#define GPIO_CRH_CNF8_0 ((uint32_t)0x00000004) /*!< Bit 0 */ -#define GPIO_CRH_CNF8_1 ((uint32_t)0x00000008) /*!< Bit 1 */ - -#define GPIO_CRH_CNF9 ((uint32_t)0x000000C0) /*!< CNF9[1:0] bits (Port x configuration bits, pin 9) */ -#define GPIO_CRH_CNF9_0 ((uint32_t)0x00000040) /*!< Bit 0 */ -#define GPIO_CRH_CNF9_1 ((uint32_t)0x00000080) /*!< Bit 1 */ - -#define GPIO_CRH_CNF10 ((uint32_t)0x00000C00) /*!< CNF10[1:0] bits (Port x configuration bits, pin 10) */ -#define GPIO_CRH_CNF10_0 ((uint32_t)0x00000400) /*!< Bit 0 */ -#define GPIO_CRH_CNF10_1 ((uint32_t)0x00000800) /*!< Bit 1 */ - -#define GPIO_CRH_CNF11 ((uint32_t)0x0000C000) /*!< CNF11[1:0] bits (Port x configuration bits, pin 11) */ -#define GPIO_CRH_CNF11_0 ((uint32_t)0x00004000) /*!< Bit 0 */ -#define GPIO_CRH_CNF11_1 ((uint32_t)0x00008000) /*!< Bit 1 */ - -#define GPIO_CRH_CNF12 ((uint32_t)0x000C0000) /*!< CNF12[1:0] bits (Port x configuration bits, pin 12) */ -#define GPIO_CRH_CNF12_0 ((uint32_t)0x00040000) /*!< Bit 0 */ -#define GPIO_CRH_CNF12_1 ((uint32_t)0x00080000) /*!< Bit 1 */ - -#define GPIO_CRH_CNF13 ((uint32_t)0x00C00000) /*!< CNF13[1:0] bits (Port x configuration bits, pin 13) */ -#define GPIO_CRH_CNF13_0 ((uint32_t)0x00400000) /*!< Bit 0 */ -#define GPIO_CRH_CNF13_1 ((uint32_t)0x00800000) /*!< Bit 1 */ - -#define GPIO_CRH_CNF14 ((uint32_t)0x0C000000) /*!< CNF14[1:0] bits (Port x configuration bits, pin 14) */ -#define GPIO_CRH_CNF14_0 ((uint32_t)0x04000000) /*!< Bit 0 */ -#define GPIO_CRH_CNF14_1 ((uint32_t)0x08000000) /*!< Bit 1 */ - -#define GPIO_CRH_CNF15 ((uint32_t)0xC0000000) /*!< CNF15[1:0] bits (Port x configuration bits, pin 15) */ -#define GPIO_CRH_CNF15_0 ((uint32_t)0x40000000) /*!< Bit 0 */ -#define GPIO_CRH_CNF15_1 ((uint32_t)0x80000000) /*!< Bit 1 */ - -/*!<****************** Bit definition for GPIO_IDR register *******************/ -#define GPIO_IDR_IDR0 ((uint16_t)0x0001) /*!< Port input data, bit 0 */ -#define GPIO_IDR_IDR1 ((uint16_t)0x0002) /*!< Port input data, bit 1 */ -#define GPIO_IDR_IDR2 ((uint16_t)0x0004) /*!< Port input data, bit 2 */ -#define GPIO_IDR_IDR3 ((uint16_t)0x0008) /*!< Port input data, bit 3 */ -#define GPIO_IDR_IDR4 ((uint16_t)0x0010) /*!< Port input data, bit 4 */ -#define GPIO_IDR_IDR5 ((uint16_t)0x0020) /*!< Port input data, bit 5 */ -#define GPIO_IDR_IDR6 ((uint16_t)0x0040) /*!< Port input data, bit 6 */ -#define GPIO_IDR_IDR7 ((uint16_t)0x0080) /*!< Port input data, bit 7 */ -#define GPIO_IDR_IDR8 ((uint16_t)0x0100) /*!< Port input data, bit 8 */ -#define GPIO_IDR_IDR9 ((uint16_t)0x0200) /*!< Port input data, bit 9 */ -#define GPIO_IDR_IDR10 ((uint16_t)0x0400) /*!< Port input data, bit 10 */ -#define GPIO_IDR_IDR11 ((uint16_t)0x0800) /*!< Port input data, bit 11 */ -#define GPIO_IDR_IDR12 ((uint16_t)0x1000) /*!< Port input data, bit 12 */ -#define GPIO_IDR_IDR13 ((uint16_t)0x2000) /*!< Port input data, bit 13 */ -#define GPIO_IDR_IDR14 ((uint16_t)0x4000) /*!< Port input data, bit 14 */ -#define GPIO_IDR_IDR15 ((uint16_t)0x8000) /*!< Port input data, bit 15 */ - -/******************* Bit definition for GPIO_ODR register *******************/ -#define GPIO_ODR_ODR0 ((uint16_t)0x0001) /*!< Port output data, bit 0 */ -#define GPIO_ODR_ODR1 ((uint16_t)0x0002) /*!< Port output data, bit 1 */ -#define GPIO_ODR_ODR2 ((uint16_t)0x0004) /*!< Port output data, bit 2 */ -#define GPIO_ODR_ODR3 ((uint16_t)0x0008) /*!< Port output data, bit 3 */ -#define GPIO_ODR_ODR4 ((uint16_t)0x0010) /*!< Port output data, bit 4 */ -#define GPIO_ODR_ODR5 ((uint16_t)0x0020) /*!< Port output data, bit 5 */ -#define GPIO_ODR_ODR6 ((uint16_t)0x0040) /*!< Port output data, bit 6 */ -#define GPIO_ODR_ODR7 ((uint16_t)0x0080) /*!< Port output data, bit 7 */ -#define GPIO_ODR_ODR8 ((uint16_t)0x0100) /*!< Port output data, bit 8 */ -#define GPIO_ODR_ODR9 ((uint16_t)0x0200) /*!< Port output data, bit 9 */ -#define GPIO_ODR_ODR10 ((uint16_t)0x0400) /*!< Port output data, bit 10 */ -#define GPIO_ODR_ODR11 ((uint16_t)0x0800) /*!< Port output data, bit 11 */ -#define GPIO_ODR_ODR12 ((uint16_t)0x1000) /*!< Port output data, bit 12 */ -#define GPIO_ODR_ODR13 ((uint16_t)0x2000) /*!< Port output data, bit 13 */ -#define GPIO_ODR_ODR14 ((uint16_t)0x4000) /*!< Port output data, bit 14 */ -#define GPIO_ODR_ODR15 ((uint16_t)0x8000) /*!< Port output data, bit 15 */ - -/****************** Bit definition for GPIO_BSRR register *******************/ -#define GPIO_BSRR_BS0 ((uint32_t)0x00000001) /*!< Port x Set bit 0 */ -#define GPIO_BSRR_BS1 ((uint32_t)0x00000002) /*!< Port x Set bit 1 */ -#define GPIO_BSRR_BS2 ((uint32_t)0x00000004) /*!< Port x Set bit 2 */ -#define GPIO_BSRR_BS3 ((uint32_t)0x00000008) /*!< Port x Set bit 3 */ -#define GPIO_BSRR_BS4 ((uint32_t)0x00000010) /*!< Port x Set bit 4 */ -#define GPIO_BSRR_BS5 ((uint32_t)0x00000020) /*!< Port x Set bit 5 */ -#define GPIO_BSRR_BS6 ((uint32_t)0x00000040) /*!< Port x Set bit 6 */ -#define GPIO_BSRR_BS7 ((uint32_t)0x00000080) /*!< Port x Set bit 7 */ -#define GPIO_BSRR_BS8 ((uint32_t)0x00000100) /*!< Port x Set bit 8 */ -#define GPIO_BSRR_BS9 ((uint32_t)0x00000200) /*!< Port x Set bit 9 */ -#define GPIO_BSRR_BS10 ((uint32_t)0x00000400) /*!< Port x Set bit 10 */ -#define GPIO_BSRR_BS11 ((uint32_t)0x00000800) /*!< Port x Set bit 11 */ -#define GPIO_BSRR_BS12 ((uint32_t)0x00001000) /*!< Port x Set bit 12 */ -#define GPIO_BSRR_BS13 ((uint32_t)0x00002000) /*!< Port x Set bit 13 */ -#define GPIO_BSRR_BS14 ((uint32_t)0x00004000) /*!< Port x Set bit 14 */ -#define GPIO_BSRR_BS15 ((uint32_t)0x00008000) /*!< Port x Set bit 15 */ - -#define GPIO_BSRR_BR0 ((uint32_t)0x00010000) /*!< Port x Reset bit 0 */ -#define GPIO_BSRR_BR1 ((uint32_t)0x00020000) /*!< Port x Reset bit 1 */ -#define GPIO_BSRR_BR2 ((uint32_t)0x00040000) /*!< Port x Reset bit 2 */ -#define GPIO_BSRR_BR3 ((uint32_t)0x00080000) /*!< Port x Reset bit 3 */ -#define GPIO_BSRR_BR4 ((uint32_t)0x00100000) /*!< Port x Reset bit 4 */ -#define GPIO_BSRR_BR5 ((uint32_t)0x00200000) /*!< Port x Reset bit 5 */ -#define GPIO_BSRR_BR6 ((uint32_t)0x00400000) /*!< Port x Reset bit 6 */ -#define GPIO_BSRR_BR7 ((uint32_t)0x00800000) /*!< Port x Reset bit 7 */ -#define GPIO_BSRR_BR8 ((uint32_t)0x01000000) /*!< Port x Reset bit 8 */ -#define GPIO_BSRR_BR9 ((uint32_t)0x02000000) /*!< Port x Reset bit 9 */ -#define GPIO_BSRR_BR10 ((uint32_t)0x04000000) /*!< Port x Reset bit 10 */ -#define GPIO_BSRR_BR11 ((uint32_t)0x08000000) /*!< Port x Reset bit 11 */ -#define GPIO_BSRR_BR12 ((uint32_t)0x10000000) /*!< Port x Reset bit 12 */ -#define GPIO_BSRR_BR13 ((uint32_t)0x20000000) /*!< Port x Reset bit 13 */ -#define GPIO_BSRR_BR14 ((uint32_t)0x40000000) /*!< Port x Reset bit 14 */ -#define GPIO_BSRR_BR15 ((uint32_t)0x80000000) /*!< Port x Reset bit 15 */ - -/******************* Bit definition for GPIO_BRR register *******************/ -#define GPIO_BRR_BR0 ((uint16_t)0x0001) /*!< Port x Reset bit 0 */ -#define GPIO_BRR_BR1 ((uint16_t)0x0002) /*!< Port x Reset bit 1 */ -#define GPIO_BRR_BR2 ((uint16_t)0x0004) /*!< Port x Reset bit 2 */ -#define GPIO_BRR_BR3 ((uint16_t)0x0008) /*!< Port x Reset bit 3 */ -#define GPIO_BRR_BR4 ((uint16_t)0x0010) /*!< Port x Reset bit 4 */ -#define GPIO_BRR_BR5 ((uint16_t)0x0020) /*!< Port x Reset bit 5 */ -#define GPIO_BRR_BR6 ((uint16_t)0x0040) /*!< Port x Reset bit 6 */ -#define GPIO_BRR_BR7 ((uint16_t)0x0080) /*!< Port x Reset bit 7 */ -#define GPIO_BRR_BR8 ((uint16_t)0x0100) /*!< Port x Reset bit 8 */ -#define GPIO_BRR_BR9 ((uint16_t)0x0200) /*!< Port x Reset bit 9 */ -#define GPIO_BRR_BR10 ((uint16_t)0x0400) /*!< Port x Reset bit 10 */ -#define GPIO_BRR_BR11 ((uint16_t)0x0800) /*!< Port x Reset bit 11 */ -#define GPIO_BRR_BR12 ((uint16_t)0x1000) /*!< Port x Reset bit 12 */ -#define GPIO_BRR_BR13 ((uint16_t)0x2000) /*!< Port x Reset bit 13 */ -#define GPIO_BRR_BR14 ((uint16_t)0x4000) /*!< Port x Reset bit 14 */ -#define GPIO_BRR_BR15 ((uint16_t)0x8000) /*!< Port x Reset bit 15 */ - -/****************** Bit definition for GPIO_LCKR register *******************/ -#define GPIO_LCKR_LCK0 ((uint32_t)0x00000001) /*!< Port x Lock bit 0 */ -#define GPIO_LCKR_LCK1 ((uint32_t)0x00000002) /*!< Port x Lock bit 1 */ -#define GPIO_LCKR_LCK2 ((uint32_t)0x00000004) /*!< Port x Lock bit 2 */ -#define GPIO_LCKR_LCK3 ((uint32_t)0x00000008) /*!< Port x Lock bit 3 */ -#define GPIO_LCKR_LCK4 ((uint32_t)0x00000010) /*!< Port x Lock bit 4 */ -#define GPIO_LCKR_LCK5 ((uint32_t)0x00000020) /*!< Port x Lock bit 5 */ -#define GPIO_LCKR_LCK6 ((uint32_t)0x00000040) /*!< Port x Lock bit 6 */ -#define GPIO_LCKR_LCK7 ((uint32_t)0x00000080) /*!< Port x Lock bit 7 */ -#define GPIO_LCKR_LCK8 ((uint32_t)0x00000100) /*!< Port x Lock bit 8 */ -#define GPIO_LCKR_LCK9 ((uint32_t)0x00000200) /*!< Port x Lock bit 9 */ -#define GPIO_LCKR_LCK10 ((uint32_t)0x00000400) /*!< Port x Lock bit 10 */ -#define GPIO_LCKR_LCK11 ((uint32_t)0x00000800) /*!< Port x Lock bit 11 */ -#define GPIO_LCKR_LCK12 ((uint32_t)0x00001000) /*!< Port x Lock bit 12 */ -#define GPIO_LCKR_LCK13 ((uint32_t)0x00002000) /*!< Port x Lock bit 13 */ -#define GPIO_LCKR_LCK14 ((uint32_t)0x00004000) /*!< Port x Lock bit 14 */ -#define GPIO_LCKR_LCK15 ((uint32_t)0x00008000) /*!< Port x Lock bit 15 */ -#define GPIO_LCKR_LCKK ((uint32_t)0x00010000) /*!< Lock key */ - -/*----------------------------------------------------------------------------*/ - -/****************** Bit definition for AFIO_EVCR register *******************/ -#define AFIO_EVCR_PIN ((uint8_t)0x0F) /*!< PIN[3:0] bits (Pin selection) */ -#define AFIO_EVCR_PIN_0 ((uint8_t)0x01) /*!< Bit 0 */ -#define AFIO_EVCR_PIN_1 ((uint8_t)0x02) /*!< Bit 1 */ -#define AFIO_EVCR_PIN_2 ((uint8_t)0x04) /*!< Bit 2 */ -#define AFIO_EVCR_PIN_3 ((uint8_t)0x08) /*!< Bit 3 */ - -/*!< PIN configuration */ -#define AFIO_EVCR_PIN_PX0 ((uint8_t)0x00) /*!< Pin 0 selected */ -#define AFIO_EVCR_PIN_PX1 ((uint8_t)0x01) /*!< Pin 1 selected */ -#define AFIO_EVCR_PIN_PX2 ((uint8_t)0x02) /*!< Pin 2 selected */ -#define AFIO_EVCR_PIN_PX3 ((uint8_t)0x03) /*!< Pin 3 selected */ -#define AFIO_EVCR_PIN_PX4 ((uint8_t)0x04) /*!< Pin 4 selected */ -#define AFIO_EVCR_PIN_PX5 ((uint8_t)0x05) /*!< Pin 5 selected */ -#define AFIO_EVCR_PIN_PX6 ((uint8_t)0x06) /*!< Pin 6 selected */ -#define AFIO_EVCR_PIN_PX7 ((uint8_t)0x07) /*!< Pin 7 selected */ -#define AFIO_EVCR_PIN_PX8 ((uint8_t)0x08) /*!< Pin 8 selected */ -#define AFIO_EVCR_PIN_PX9 ((uint8_t)0x09) /*!< Pin 9 selected */ -#define AFIO_EVCR_PIN_PX10 ((uint8_t)0x0A) /*!< Pin 10 selected */ -#define AFIO_EVCR_PIN_PX11 ((uint8_t)0x0B) /*!< Pin 11 selected */ -#define AFIO_EVCR_PIN_PX12 ((uint8_t)0x0C) /*!< Pin 12 selected */ -#define AFIO_EVCR_PIN_PX13 ((uint8_t)0x0D) /*!< Pin 13 selected */ -#define AFIO_EVCR_PIN_PX14 ((uint8_t)0x0E) /*!< Pin 14 selected */ -#define AFIO_EVCR_PIN_PX15 ((uint8_t)0x0F) /*!< Pin 15 selected */ - -#define AFIO_EVCR_PORT ((uint8_t)0x70) /*!< PORT[2:0] bits (Port selection) */ -#define AFIO_EVCR_PORT_0 ((uint8_t)0x10) /*!< Bit 0 */ -#define AFIO_EVCR_PORT_1 ((uint8_t)0x20) /*!< Bit 1 */ -#define AFIO_EVCR_PORT_2 ((uint8_t)0x40) /*!< Bit 2 */ - -/*!< PORT configuration */ -#define AFIO_EVCR_PORT_PA ((uint8_t)0x00) /*!< Port A selected */ -#define AFIO_EVCR_PORT_PB ((uint8_t)0x10) /*!< Port B selected */ -#define AFIO_EVCR_PORT_PC ((uint8_t)0x20) /*!< Port C selected */ -#define AFIO_EVCR_PORT_PD ((uint8_t)0x30) /*!< Port D selected */ -#define AFIO_EVCR_PORT_PE ((uint8_t)0x40) /*!< Port E selected */ - -#define AFIO_EVCR_EVOE ((uint8_t)0x80) /*!< Event Output Enable */ - -/****************** Bit definition for AFIO_MAPR register *******************/ -#define AFIO_MAPR_SPI1_REMAP ((uint32_t)0x00000001) /*!< SPI1 remapping */ -#define AFIO_MAPR_I2C1_REMAP ((uint32_t)0x00000002) /*!< I2C1 remapping */ -#define AFIO_MAPR_USART1_REMAP ((uint32_t)0x00000004) /*!< USART1 remapping */ -#define AFIO_MAPR_USART2_REMAP ((uint32_t)0x00000008) /*!< USART2 remapping */ - -#define AFIO_MAPR_USART3_REMAP ((uint32_t)0x00000030) /*!< USART3_REMAP[1:0] bits (USART3 remapping) */ -#define AFIO_MAPR_USART3_REMAP_0 ((uint32_t)0x00000010) /*!< Bit 0 */ -#define AFIO_MAPR_USART3_REMAP_1 ((uint32_t)0x00000020) /*!< Bit 1 */ - -/* USART3_REMAP configuration */ -#define AFIO_MAPR_USART3_REMAP_NOREMAP ((uint32_t)0x00000000) /*!< No remap (TX/PB10, RX/PB11, CK/PB12, CTS/PB13, RTS/PB14) */ -#define AFIO_MAPR_USART3_REMAP_PARTIALREMAP ((uint32_t)0x00000010) /*!< Partial remap (TX/PC10, RX/PC11, CK/PC12, CTS/PB13, RTS/PB14) */ -#define AFIO_MAPR_USART3_REMAP_FULLREMAP ((uint32_t)0x00000030) /*!< Full remap (TX/PD8, RX/PD9, CK/PD10, CTS/PD11, RTS/PD12) */ - -#define AFIO_MAPR_TIM1_REMAP ((uint32_t)0x000000C0) /*!< TIM1_REMAP[1:0] bits (TIM1 remapping) */ -#define AFIO_MAPR_TIM1_REMAP_0 ((uint32_t)0x00000040) /*!< Bit 0 */ -#define AFIO_MAPR_TIM1_REMAP_1 ((uint32_t)0x00000080) /*!< Bit 1 */ - -/*!< TIM1_REMAP configuration */ -#define AFIO_MAPR_TIM1_REMAP_NOREMAP ((uint32_t)0x00000000) /*!< No remap (ETR/PA12, CH1/PA8, CH2/PA9, CH3/PA10, CH4/PA11, BKIN/PB12, CH1N/PB13, CH2N/PB14, CH3N/PB15) */ -#define AFIO_MAPR_TIM1_REMAP_PARTIALREMAP ((uint32_t)0x00000040) /*!< Partial remap (ETR/PA12, CH1/PA8, CH2/PA9, CH3/PA10, CH4/PA11, BKIN/PA6, CH1N/PA7, CH2N/PB0, CH3N/PB1) */ -#define AFIO_MAPR_TIM1_REMAP_FULLREMAP ((uint32_t)0x000000C0) /*!< Full remap (ETR/PE7, CH1/PE9, CH2/PE11, CH3/PE13, CH4/PE14, BKIN/PE15, CH1N/PE8, CH2N/PE10, CH3N/PE12) */ - -#define AFIO_MAPR_TIM2_REMAP ((uint32_t)0x00000300) /*!< TIM2_REMAP[1:0] bits (TIM2 remapping) */ -#define AFIO_MAPR_TIM2_REMAP_0 ((uint32_t)0x00000100) /*!< Bit 0 */ -#define AFIO_MAPR_TIM2_REMAP_1 ((uint32_t)0x00000200) /*!< Bit 1 */ - -/*!< TIM2_REMAP configuration */ -#define AFIO_MAPR_TIM2_REMAP_NOREMAP ((uint32_t)0x00000000) /*!< No remap (CH1/ETR/PA0, CH2/PA1, CH3/PA2, CH4/PA3) */ -#define AFIO_MAPR_TIM2_REMAP_PARTIALREMAP1 ((uint32_t)0x00000100) /*!< Partial remap (CH1/ETR/PA15, CH2/PB3, CH3/PA2, CH4/PA3) */ -#define AFIO_MAPR_TIM2_REMAP_PARTIALREMAP2 ((uint32_t)0x00000200) /*!< Partial remap (CH1/ETR/PA0, CH2/PA1, CH3/PB10, CH4/PB11) */ -#define AFIO_MAPR_TIM2_REMAP_FULLREMAP ((uint32_t)0x00000300) /*!< Full remap (CH1/ETR/PA15, CH2/PB3, CH3/PB10, CH4/PB11) */ - -#define AFIO_MAPR_TIM3_REMAP ((uint32_t)0x00000C00) /*!< TIM3_REMAP[1:0] bits (TIM3 remapping) */ -#define AFIO_MAPR_TIM3_REMAP_0 ((uint32_t)0x00000400) /*!< Bit 0 */ -#define AFIO_MAPR_TIM3_REMAP_1 ((uint32_t)0x00000800) /*!< Bit 1 */ - -/*!< TIM3_REMAP configuration */ -#define AFIO_MAPR_TIM3_REMAP_NOREMAP ((uint32_t)0x00000000) /*!< No remap (CH1/PA6, CH2/PA7, CH3/PB0, CH4/PB1) */ -#define AFIO_MAPR_TIM3_REMAP_PARTIALREMAP ((uint32_t)0x00000800) /*!< Partial remap (CH1/PB4, CH2/PB5, CH3/PB0, CH4/PB1) */ -#define AFIO_MAPR_TIM3_REMAP_FULLREMAP ((uint32_t)0x00000C00) /*!< Full remap (CH1/PC6, CH2/PC7, CH3/PC8, CH4/PC9) */ - -#define AFIO_MAPR_TIM4_REMAP ((uint32_t)0x00001000) /*!< TIM4_REMAP bit (TIM4 remapping) */ - -#define AFIO_MAPR_CAN_REMAP ((uint32_t)0x00006000) /*!< CAN_REMAP[1:0] bits (CAN Alternate function remapping) */ -#define AFIO_MAPR_CAN_REMAP_0 ((uint32_t)0x00002000) /*!< Bit 0 */ -#define AFIO_MAPR_CAN_REMAP_1 ((uint32_t)0x00004000) /*!< Bit 1 */ - -/*!< CAN_REMAP configuration */ -#define AFIO_MAPR_CAN_REMAP_REMAP1 ((uint32_t)0x00000000) /*!< CANRX mapped to PA11, CANTX mapped to PA12 */ -#define AFIO_MAPR_CAN_REMAP_REMAP2 ((uint32_t)0x00004000) /*!< CANRX mapped to PB8, CANTX mapped to PB9 */ -#define AFIO_MAPR_CAN_REMAP_REMAP3 ((uint32_t)0x00006000) /*!< CANRX mapped to PD0, CANTX mapped to PD1 */ - -#define AFIO_MAPR_PD01_REMAP ((uint32_t)0x00008000) /*!< Port D0/Port D1 mapping on OSC_IN/OSC_OUT */ -#define AFIO_MAPR_TIM5CH4_IREMAP ((uint32_t)0x00010000) /*!< TIM5 Channel4 Internal Remap */ -#define AFIO_MAPR_ADC1_ETRGINJ_REMAP ((uint32_t)0x00020000) /*!< ADC 1 External Trigger Injected Conversion remapping */ -#define AFIO_MAPR_ADC1_ETRGREG_REMAP ((uint32_t)0x00040000) /*!< ADC 1 External Trigger Regular Conversion remapping */ -#define AFIO_MAPR_ADC2_ETRGINJ_REMAP ((uint32_t)0x00080000) /*!< ADC 2 External Trigger Injected Conversion remapping */ -#define AFIO_MAPR_ADC2_ETRGREG_REMAP ((uint32_t)0x00100000) /*!< ADC 2 External Trigger Regular Conversion remapping */ - -/*!< SWJ_CFG configuration */ -#define AFIO_MAPR_SWJ_CFG ((uint32_t)0x07000000) /*!< SWJ_CFG[2:0] bits (Serial Wire JTAG configuration) */ -#define AFIO_MAPR_SWJ_CFG_0 ((uint32_t)0x01000000) /*!< Bit 0 */ -#define AFIO_MAPR_SWJ_CFG_1 ((uint32_t)0x02000000) /*!< Bit 1 */ -#define AFIO_MAPR_SWJ_CFG_2 ((uint32_t)0x04000000) /*!< Bit 2 */ - -#define AFIO_MAPR_SWJ_CFG_RESET ((uint32_t)0x00000000) /*!< Full SWJ (JTAG-DP + SW-DP) : Reset State */ -#define AFIO_MAPR_SWJ_CFG_NOJNTRST ((uint32_t)0x01000000) /*!< Full SWJ (JTAG-DP + SW-DP) but without JNTRST */ -#define AFIO_MAPR_SWJ_CFG_JTAGDISABLE ((uint32_t)0x02000000) /*!< JTAG-DP Disabled and SW-DP Enabled */ -#define AFIO_MAPR_SWJ_CFG_DISABLE ((uint32_t)0x04000000) /*!< JTAG-DP Disabled and SW-DP Disabled */ - -#ifdef STM32F10X_CL -/*!< ETH_REMAP configuration */ - #define AFIO_MAPR_ETH_REMAP ((uint32_t)0x00200000) /*!< SPI3_REMAP bit (Ethernet MAC I/O remapping) */ - -/*!< CAN2_REMAP configuration */ - #define AFIO_MAPR_CAN2_REMAP ((uint32_t)0x00400000) /*!< CAN2_REMAP bit (CAN2 I/O remapping) */ - -/*!< MII_RMII_SEL configuration */ - #define AFIO_MAPR_MII_RMII_SEL ((uint32_t)0x00800000) /*!< MII_RMII_SEL bit (Ethernet MII or RMII selection) */ - -/*!< SPI3_REMAP configuration */ - #define AFIO_MAPR_SPI3_REMAP ((uint32_t)0x10000000) /*!< SPI3_REMAP bit (SPI3 remapping) */ - -/*!< TIM2ITR1_IREMAP configuration */ - #define AFIO_MAPR_TIM2ITR1_IREMAP ((uint32_t)0x20000000) /*!< TIM2ITR1_IREMAP bit (TIM2 internal trigger 1 remapping) */ - -/*!< PTP_PPS_REMAP configuration */ - #define AFIO_MAPR_PTP_PPS_REMAP ((uint32_t)0x20000000) /*!< PTP_PPS_REMAP bit (Ethernet PTP PPS remapping) */ -#endif - -/***************** Bit definition for AFIO_EXTICR1 register *****************/ -#define AFIO_EXTICR1_EXTI0 ((uint16_t)0x000F) /*!< EXTI 0 configuration */ -#define AFIO_EXTICR1_EXTI1 ((uint16_t)0x00F0) /*!< EXTI 1 configuration */ -#define AFIO_EXTICR1_EXTI2 ((uint16_t)0x0F00) /*!< EXTI 2 configuration */ -#define AFIO_EXTICR1_EXTI3 ((uint16_t)0xF000) /*!< EXTI 3 configuration */ - -/*!< EXTI0 configuration */ -#define AFIO_EXTICR1_EXTI0_PA ((uint16_t)0x0000) /*!< PA[0] pin */ -#define AFIO_EXTICR1_EXTI0_PB ((uint16_t)0x0001) /*!< PB[0] pin */ -#define AFIO_EXTICR1_EXTI0_PC ((uint16_t)0x0002) /*!< PC[0] pin */ -#define AFIO_EXTICR1_EXTI0_PD ((uint16_t)0x0003) /*!< PD[0] pin */ -#define AFIO_EXTICR1_EXTI0_PE ((uint16_t)0x0004) /*!< PE[0] pin */ -#define AFIO_EXTICR1_EXTI0_PF ((uint16_t)0x0005) /*!< PF[0] pin */ -#define AFIO_EXTICR1_EXTI0_PG ((uint16_t)0x0006) /*!< PG[0] pin */ - -/*!< EXTI1 configuration */ -#define AFIO_EXTICR1_EXTI1_PA ((uint16_t)0x0000) /*!< PA[1] pin */ -#define AFIO_EXTICR1_EXTI1_PB ((uint16_t)0x0010) /*!< PB[1] pin */ -#define AFIO_EXTICR1_EXTI1_PC ((uint16_t)0x0020) /*!< PC[1] pin */ -#define AFIO_EXTICR1_EXTI1_PD ((uint16_t)0x0030) /*!< PD[1] pin */ -#define AFIO_EXTICR1_EXTI1_PE ((uint16_t)0x0040) /*!< PE[1] pin */ -#define AFIO_EXTICR1_EXTI1_PF ((uint16_t)0x0050) /*!< PF[1] pin */ -#define AFIO_EXTICR1_EXTI1_PG ((uint16_t)0x0060) /*!< PG[1] pin */ - -/*!< EXTI2 configuration */ -#define AFIO_EXTICR1_EXTI2_PA ((uint16_t)0x0000) /*!< PA[2] pin */ -#define AFIO_EXTICR1_EXTI2_PB ((uint16_t)0x0100) /*!< PB[2] pin */ -#define AFIO_EXTICR1_EXTI2_PC ((uint16_t)0x0200) /*!< PC[2] pin */ -#define AFIO_EXTICR1_EXTI2_PD ((uint16_t)0x0300) /*!< PD[2] pin */ -#define AFIO_EXTICR1_EXTI2_PE ((uint16_t)0x0400) /*!< PE[2] pin */ -#define AFIO_EXTICR1_EXTI2_PF ((uint16_t)0x0500) /*!< PF[2] pin */ -#define AFIO_EXTICR1_EXTI2_PG ((uint16_t)0x0600) /*!< PG[2] pin */ - -/*!< EXTI3 configuration */ -#define AFIO_EXTICR1_EXTI3_PA ((uint16_t)0x0000) /*!< PA[3] pin */ -#define AFIO_EXTICR1_EXTI3_PB ((uint16_t)0x1000) /*!< PB[3] pin */ -#define AFIO_EXTICR1_EXTI3_PC ((uint16_t)0x2000) /*!< PC[3] pin */ -#define AFIO_EXTICR1_EXTI3_PD ((uint16_t)0x3000) /*!< PD[3] pin */ -#define AFIO_EXTICR1_EXTI3_PE ((uint16_t)0x4000) /*!< PE[3] pin */ -#define AFIO_EXTICR1_EXTI3_PF ((uint16_t)0x5000) /*!< PF[3] pin */ -#define AFIO_EXTICR1_EXTI3_PG ((uint16_t)0x6000) /*!< PG[3] pin */ - -/***************** Bit definition for AFIO_EXTICR2 register *****************/ -#define AFIO_EXTICR2_EXTI4 ((uint16_t)0x000F) /*!< EXTI 4 configuration */ -#define AFIO_EXTICR2_EXTI5 ((uint16_t)0x00F0) /*!< EXTI 5 configuration */ -#define AFIO_EXTICR2_EXTI6 ((uint16_t)0x0F00) /*!< EXTI 6 configuration */ -#define AFIO_EXTICR2_EXTI7 ((uint16_t)0xF000) /*!< EXTI 7 configuration */ - -/*!< EXTI4 configuration */ -#define AFIO_EXTICR2_EXTI4_PA ((uint16_t)0x0000) /*!< PA[4] pin */ -#define AFIO_EXTICR2_EXTI4_PB ((uint16_t)0x0001) /*!< PB[4] pin */ -#define AFIO_EXTICR2_EXTI4_PC ((uint16_t)0x0002) /*!< PC[4] pin */ -#define AFIO_EXTICR2_EXTI4_PD ((uint16_t)0x0003) /*!< PD[4] pin */ -#define AFIO_EXTICR2_EXTI4_PE ((uint16_t)0x0004) /*!< PE[4] pin */ -#define AFIO_EXTICR2_EXTI4_PF ((uint16_t)0x0005) /*!< PF[4] pin */ -#define AFIO_EXTICR2_EXTI4_PG ((uint16_t)0x0006) /*!< PG[4] pin */ - -/* EXTI5 configuration */ -#define AFIO_EXTICR2_EXTI5_PA ((uint16_t)0x0000) /*!< PA[5] pin */ -#define AFIO_EXTICR2_EXTI5_PB ((uint16_t)0x0010) /*!< PB[5] pin */ -#define AFIO_EXTICR2_EXTI5_PC ((uint16_t)0x0020) /*!< PC[5] pin */ -#define AFIO_EXTICR2_EXTI5_PD ((uint16_t)0x0030) /*!< PD[5] pin */ -#define AFIO_EXTICR2_EXTI5_PE ((uint16_t)0x0040) /*!< PE[5] pin */ -#define AFIO_EXTICR2_EXTI5_PF ((uint16_t)0x0050) /*!< PF[5] pin */ -#define AFIO_EXTICR2_EXTI5_PG ((uint16_t)0x0060) /*!< PG[5] pin */ - -/*!< EXTI6 configuration */ -#define AFIO_EXTICR2_EXTI6_PA ((uint16_t)0x0000) /*!< PA[6] pin */ -#define AFIO_EXTICR2_EXTI6_PB ((uint16_t)0x0100) /*!< PB[6] pin */ -#define AFIO_EXTICR2_EXTI6_PC ((uint16_t)0x0200) /*!< PC[6] pin */ -#define AFIO_EXTICR2_EXTI6_PD ((uint16_t)0x0300) /*!< PD[6] pin */ -#define AFIO_EXTICR2_EXTI6_PE ((uint16_t)0x0400) /*!< PE[6] pin */ -#define AFIO_EXTICR2_EXTI6_PF ((uint16_t)0x0500) /*!< PF[6] pin */ -#define AFIO_EXTICR2_EXTI6_PG ((uint16_t)0x0600) /*!< PG[6] pin */ - -/*!< EXTI7 configuration */ -#define AFIO_EXTICR2_EXTI7_PA ((uint16_t)0x0000) /*!< PA[7] pin */ -#define AFIO_EXTICR2_EXTI7_PB ((uint16_t)0x1000) /*!< PB[7] pin */ -#define AFIO_EXTICR2_EXTI7_PC ((uint16_t)0x2000) /*!< PC[7] pin */ -#define AFIO_EXTICR2_EXTI7_PD ((uint16_t)0x3000) /*!< PD[7] pin */ -#define AFIO_EXTICR2_EXTI7_PE ((uint16_t)0x4000) /*!< PE[7] pin */ -#define AFIO_EXTICR2_EXTI7_PF ((uint16_t)0x5000) /*!< PF[7] pin */ -#define AFIO_EXTICR2_EXTI7_PG ((uint16_t)0x6000) /*!< PG[7] pin */ - -/***************** Bit definition for AFIO_EXTICR3 register *****************/ -#define AFIO_EXTICR3_EXTI8 ((uint16_t)0x000F) /*!< EXTI 8 configuration */ -#define AFIO_EXTICR3_EXTI9 ((uint16_t)0x00F0) /*!< EXTI 9 configuration */ -#define AFIO_EXTICR3_EXTI10 ((uint16_t)0x0F00) /*!< EXTI 10 configuration */ -#define AFIO_EXTICR3_EXTI11 ((uint16_t)0xF000) /*!< EXTI 11 configuration */ - -/*!< EXTI8 configuration */ -#define AFIO_EXTICR3_EXTI8_PA ((uint16_t)0x0000) /*!< PA[8] pin */ -#define AFIO_EXTICR3_EXTI8_PB ((uint16_t)0x0001) /*!< PB[8] pin */ -#define AFIO_EXTICR3_EXTI8_PC ((uint16_t)0x0002) /*!< PC[8] pin */ -#define AFIO_EXTICR3_EXTI8_PD ((uint16_t)0x0003) /*!< PD[8] pin */ -#define AFIO_EXTICR3_EXTI8_PE ((uint16_t)0x0004) /*!< PE[8] pin */ -#define AFIO_EXTICR3_EXTI8_PF ((uint16_t)0x0005) /*!< PF[8] pin */ -#define AFIO_EXTICR3_EXTI8_PG ((uint16_t)0x0006) /*!< PG[8] pin */ - -/*!< EXTI9 configuration */ -#define AFIO_EXTICR3_EXTI9_PA ((uint16_t)0x0000) /*!< PA[9] pin */ -#define AFIO_EXTICR3_EXTI9_PB ((uint16_t)0x0010) /*!< PB[9] pin */ -#define AFIO_EXTICR3_EXTI9_PC ((uint16_t)0x0020) /*!< PC[9] pin */ -#define AFIO_EXTICR3_EXTI9_PD ((uint16_t)0x0030) /*!< PD[9] pin */ -#define AFIO_EXTICR3_EXTI9_PE ((uint16_t)0x0040) /*!< PE[9] pin */ -#define AFIO_EXTICR3_EXTI9_PF ((uint16_t)0x0050) /*!< PF[9] pin */ -#define AFIO_EXTICR3_EXTI9_PG ((uint16_t)0x0060) /*!< PG[9] pin */ - -/*!< EXTI10 configuration */ -#define AFIO_EXTICR3_EXTI10_PA ((uint16_t)0x0000) /*!< PA[10] pin */ -#define AFIO_EXTICR3_EXTI10_PB ((uint16_t)0x0100) /*!< PB[10] pin */ -#define AFIO_EXTICR3_EXTI10_PC ((uint16_t)0x0200) /*!< PC[10] pin */ -#define AFIO_EXTICR3_EXTI10_PD ((uint16_t)0x0300) /*!< PD[10] pin */ -#define AFIO_EXTICR3_EXTI10_PE ((uint16_t)0x0400) /*!< PE[10] pin */ -#define AFIO_EXTICR3_EXTI10_PF ((uint16_t)0x0500) /*!< PF[10] pin */ -#define AFIO_EXTICR3_EXTI10_PG ((uint16_t)0x0600) /*!< PG[10] pin */ - -/*!< EXTI11 configuration */ -#define AFIO_EXTICR3_EXTI11_PA ((uint16_t)0x0000) /*!< PA[11] pin */ -#define AFIO_EXTICR3_EXTI11_PB ((uint16_t)0x1000) /*!< PB[11] pin */ -#define AFIO_EXTICR3_EXTI11_PC ((uint16_t)0x2000) /*!< PC[11] pin */ -#define AFIO_EXTICR3_EXTI11_PD ((uint16_t)0x3000) /*!< PD[11] pin */ -#define AFIO_EXTICR3_EXTI11_PE ((uint16_t)0x4000) /*!< PE[11] pin */ -#define AFIO_EXTICR3_EXTI11_PF ((uint16_t)0x5000) /*!< PF[11] pin */ -#define AFIO_EXTICR3_EXTI11_PG ((uint16_t)0x6000) /*!< PG[11] pin */ - -/***************** Bit definition for AFIO_EXTICR4 register *****************/ -#define AFIO_EXTICR4_EXTI12 ((uint16_t)0x000F) /*!< EXTI 12 configuration */ -#define AFIO_EXTICR4_EXTI13 ((uint16_t)0x00F0) /*!< EXTI 13 configuration */ -#define AFIO_EXTICR4_EXTI14 ((uint16_t)0x0F00) /*!< EXTI 14 configuration */ -#define AFIO_EXTICR4_EXTI15 ((uint16_t)0xF000) /*!< EXTI 15 configuration */ - -/* EXTI12 configuration */ -#define AFIO_EXTICR4_EXTI12_PA ((uint16_t)0x0000) /*!< PA[12] pin */ -#define AFIO_EXTICR4_EXTI12_PB ((uint16_t)0x0001) /*!< PB[12] pin */ -#define AFIO_EXTICR4_EXTI12_PC ((uint16_t)0x0002) /*!< PC[12] pin */ -#define AFIO_EXTICR4_EXTI12_PD ((uint16_t)0x0003) /*!< PD[12] pin */ -#define AFIO_EXTICR4_EXTI12_PE ((uint16_t)0x0004) /*!< PE[12] pin */ -#define AFIO_EXTICR4_EXTI12_PF ((uint16_t)0x0005) /*!< PF[12] pin */ -#define AFIO_EXTICR4_EXTI12_PG ((uint16_t)0x0006) /*!< PG[12] pin */ - -/* EXTI13 configuration */ -#define AFIO_EXTICR4_EXTI13_PA ((uint16_t)0x0000) /*!< PA[13] pin */ -#define AFIO_EXTICR4_EXTI13_PB ((uint16_t)0x0010) /*!< PB[13] pin */ -#define AFIO_EXTICR4_EXTI13_PC ((uint16_t)0x0020) /*!< PC[13] pin */ -#define AFIO_EXTICR4_EXTI13_PD ((uint16_t)0x0030) /*!< PD[13] pin */ -#define AFIO_EXTICR4_EXTI13_PE ((uint16_t)0x0040) /*!< PE[13] pin */ -#define AFIO_EXTICR4_EXTI13_PF ((uint16_t)0x0050) /*!< PF[13] pin */ -#define AFIO_EXTICR4_EXTI13_PG ((uint16_t)0x0060) /*!< PG[13] pin */ - -/*!< EXTI14 configuration */ -#define AFIO_EXTICR4_EXTI14_PA ((uint16_t)0x0000) /*!< PA[14] pin */ -#define AFIO_EXTICR4_EXTI14_PB ((uint16_t)0x0100) /*!< PB[14] pin */ -#define AFIO_EXTICR4_EXTI14_PC ((uint16_t)0x0200) /*!< PC[14] pin */ -#define AFIO_EXTICR4_EXTI14_PD ((uint16_t)0x0300) /*!< PD[14] pin */ -#define AFIO_EXTICR4_EXTI14_PE ((uint16_t)0x0400) /*!< PE[14] pin */ -#define AFIO_EXTICR4_EXTI14_PF ((uint16_t)0x0500) /*!< PF[14] pin */ -#define AFIO_EXTICR4_EXTI14_PG ((uint16_t)0x0600) /*!< PG[14] pin */ - -/*!< EXTI15 configuration */ -#define AFIO_EXTICR4_EXTI15_PA ((uint16_t)0x0000) /*!< PA[15] pin */ -#define AFIO_EXTICR4_EXTI15_PB ((uint16_t)0x1000) /*!< PB[15] pin */ -#define AFIO_EXTICR4_EXTI15_PC ((uint16_t)0x2000) /*!< PC[15] pin */ -#define AFIO_EXTICR4_EXTI15_PD ((uint16_t)0x3000) /*!< PD[15] pin */ -#define AFIO_EXTICR4_EXTI15_PE ((uint16_t)0x4000) /*!< PE[15] pin */ -#define AFIO_EXTICR4_EXTI15_PF ((uint16_t)0x5000) /*!< PF[15] pin */ -#define AFIO_EXTICR4_EXTI15_PG ((uint16_t)0x6000) /*!< PG[15] pin */ - -#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) -/****************** Bit definition for AFIO_MAPR2 register ******************/ -#define AFIO_MAPR2_TIM15_REMAP ((uint32_t)0x00000001) /*!< TIM15 remapping */ -#define AFIO_MAPR2_TIM16_REMAP ((uint32_t)0x00000002) /*!< TIM16 remapping */ -#define AFIO_MAPR2_TIM17_REMAP ((uint32_t)0x00000004) /*!< TIM17 remapping */ -#define AFIO_MAPR2_CEC_REMAP ((uint32_t)0x00000008) /*!< CEC remapping */ -#define AFIO_MAPR2_TIM1_DMA_REMAP ((uint32_t)0x00000010) /*!< TIM1_DMA remapping */ -#endif - -/******************************************************************************/ -/* */ -/* SystemTick */ -/* */ -/******************************************************************************/ - -/***************** Bit definition for SysTick_CTRL register *****************/ -#define SysTick_CTRL_ENABLE ((uint32_t)0x00000001) /*!< Counter enable */ -#define SysTick_CTRL_TICKINT ((uint32_t)0x00000002) /*!< Counting down to 0 pends the SysTick handler */ -#define SysTick_CTRL_CLKSOURCE ((uint32_t)0x00000004) /*!< Clock source */ -#define SysTick_CTRL_COUNTFLAG ((uint32_t)0x00010000) /*!< Count Flag */ - -/***************** Bit definition for SysTick_LOAD register *****************/ -#define SysTick_LOAD_RELOAD ((uint32_t)0x00FFFFFF) /*!< Value to load into the SysTick Current Value Register when the counter reaches 0 */ - -/***************** Bit definition for SysTick_VAL register ******************/ -#define SysTick_VAL_CURRENT ((uint32_t)0x00FFFFFF) /*!< Current value at the time the register is accessed */ - -/***************** Bit definition for SysTick_CALIB register ****************/ -#define SysTick_CALIB_TENMS ((uint32_t)0x00FFFFFF) /*!< Reload value to use for 10ms timing */ -#define SysTick_CALIB_SKEW ((uint32_t)0x40000000) /*!< Calibration value is not exactly 10 ms */ -#define SysTick_CALIB_NOREF ((uint32_t)0x80000000) /*!< The reference clock is not provided */ - -/******************************************************************************/ -/* */ -/* Nested Vectored Interrupt Controller */ -/* */ -/******************************************************************************/ - -/****************** Bit definition for NVIC_ISER register *******************/ -#define NVIC_ISER_SETENA ((uint32_t)0xFFFFFFFF) /*!< Interrupt set enable bits */ -#define NVIC_ISER_SETENA_0 ((uint32_t)0x00000001) /*!< bit 0 */ -#define NVIC_ISER_SETENA_1 ((uint32_t)0x00000002) /*!< bit 1 */ -#define NVIC_ISER_SETENA_2 ((uint32_t)0x00000004) /*!< bit 2 */ -#define NVIC_ISER_SETENA_3 ((uint32_t)0x00000008) /*!< bit 3 */ -#define NVIC_ISER_SETENA_4 ((uint32_t)0x00000010) /*!< bit 4 */ -#define NVIC_ISER_SETENA_5 ((uint32_t)0x00000020) /*!< bit 5 */ -#define NVIC_ISER_SETENA_6 ((uint32_t)0x00000040) /*!< bit 6 */ -#define NVIC_ISER_SETENA_7 ((uint32_t)0x00000080) /*!< bit 7 */ -#define NVIC_ISER_SETENA_8 ((uint32_t)0x00000100) /*!< bit 8 */ -#define NVIC_ISER_SETENA_9 ((uint32_t)0x00000200) /*!< bit 9 */ -#define NVIC_ISER_SETENA_10 ((uint32_t)0x00000400) /*!< bit 10 */ -#define NVIC_ISER_SETENA_11 ((uint32_t)0x00000800) /*!< bit 11 */ -#define NVIC_ISER_SETENA_12 ((uint32_t)0x00001000) /*!< bit 12 */ -#define NVIC_ISER_SETENA_13 ((uint32_t)0x00002000) /*!< bit 13 */ -#define NVIC_ISER_SETENA_14 ((uint32_t)0x00004000) /*!< bit 14 */ -#define NVIC_ISER_SETENA_15 ((uint32_t)0x00008000) /*!< bit 15 */ -#define NVIC_ISER_SETENA_16 ((uint32_t)0x00010000) /*!< bit 16 */ -#define NVIC_ISER_SETENA_17 ((uint32_t)0x00020000) /*!< bit 17 */ -#define NVIC_ISER_SETENA_18 ((uint32_t)0x00040000) /*!< bit 18 */ -#define NVIC_ISER_SETENA_19 ((uint32_t)0x00080000) /*!< bit 19 */ -#define NVIC_ISER_SETENA_20 ((uint32_t)0x00100000) /*!< bit 20 */ -#define NVIC_ISER_SETENA_21 ((uint32_t)0x00200000) /*!< bit 21 */ -#define NVIC_ISER_SETENA_22 ((uint32_t)0x00400000) /*!< bit 22 */ -#define NVIC_ISER_SETENA_23 ((uint32_t)0x00800000) /*!< bit 23 */ -#define NVIC_ISER_SETENA_24 ((uint32_t)0x01000000) /*!< bit 24 */ -#define NVIC_ISER_SETENA_25 ((uint32_t)0x02000000) /*!< bit 25 */ -#define NVIC_ISER_SETENA_26 ((uint32_t)0x04000000) /*!< bit 26 */ -#define NVIC_ISER_SETENA_27 ((uint32_t)0x08000000) /*!< bit 27 */ -#define NVIC_ISER_SETENA_28 ((uint32_t)0x10000000) /*!< bit 28 */ -#define NVIC_ISER_SETENA_29 ((uint32_t)0x20000000) /*!< bit 29 */ -#define NVIC_ISER_SETENA_30 ((uint32_t)0x40000000) /*!< bit 30 */ -#define NVIC_ISER_SETENA_31 ((uint32_t)0x80000000) /*!< bit 31 */ - -/****************** Bit definition for NVIC_ICER register *******************/ -#define NVIC_ICER_CLRENA ((uint32_t)0xFFFFFFFF) /*!< Interrupt clear-enable bits */ -#define NVIC_ICER_CLRENA_0 ((uint32_t)0x00000001) /*!< bit 0 */ -#define NVIC_ICER_CLRENA_1 ((uint32_t)0x00000002) /*!< bit 1 */ -#define NVIC_ICER_CLRENA_2 ((uint32_t)0x00000004) /*!< bit 2 */ -#define NVIC_ICER_CLRENA_3 ((uint32_t)0x00000008) /*!< bit 3 */ -#define NVIC_ICER_CLRENA_4 ((uint32_t)0x00000010) /*!< bit 4 */ -#define NVIC_ICER_CLRENA_5 ((uint32_t)0x00000020) /*!< bit 5 */ -#define NVIC_ICER_CLRENA_6 ((uint32_t)0x00000040) /*!< bit 6 */ -#define NVIC_ICER_CLRENA_7 ((uint32_t)0x00000080) /*!< bit 7 */ -#define NVIC_ICER_CLRENA_8 ((uint32_t)0x00000100) /*!< bit 8 */ -#define NVIC_ICER_CLRENA_9 ((uint32_t)0x00000200) /*!< bit 9 */ -#define NVIC_ICER_CLRENA_10 ((uint32_t)0x00000400) /*!< bit 10 */ -#define NVIC_ICER_CLRENA_11 ((uint32_t)0x00000800) /*!< bit 11 */ -#define NVIC_ICER_CLRENA_12 ((uint32_t)0x00001000) /*!< bit 12 */ -#define NVIC_ICER_CLRENA_13 ((uint32_t)0x00002000) /*!< bit 13 */ -#define NVIC_ICER_CLRENA_14 ((uint32_t)0x00004000) /*!< bit 14 */ -#define NVIC_ICER_CLRENA_15 ((uint32_t)0x00008000) /*!< bit 15 */ -#define NVIC_ICER_CLRENA_16 ((uint32_t)0x00010000) /*!< bit 16 */ -#define NVIC_ICER_CLRENA_17 ((uint32_t)0x00020000) /*!< bit 17 */ -#define NVIC_ICER_CLRENA_18 ((uint32_t)0x00040000) /*!< bit 18 */ -#define NVIC_ICER_CLRENA_19 ((uint32_t)0x00080000) /*!< bit 19 */ -#define NVIC_ICER_CLRENA_20 ((uint32_t)0x00100000) /*!< bit 20 */ -#define NVIC_ICER_CLRENA_21 ((uint32_t)0x00200000) /*!< bit 21 */ -#define NVIC_ICER_CLRENA_22 ((uint32_t)0x00400000) /*!< bit 22 */ -#define NVIC_ICER_CLRENA_23 ((uint32_t)0x00800000) /*!< bit 23 */ -#define NVIC_ICER_CLRENA_24 ((uint32_t)0x01000000) /*!< bit 24 */ -#define NVIC_ICER_CLRENA_25 ((uint32_t)0x02000000) /*!< bit 25 */ -#define NVIC_ICER_CLRENA_26 ((uint32_t)0x04000000) /*!< bit 26 */ -#define NVIC_ICER_CLRENA_27 ((uint32_t)0x08000000) /*!< bit 27 */ -#define NVIC_ICER_CLRENA_28 ((uint32_t)0x10000000) /*!< bit 28 */ -#define NVIC_ICER_CLRENA_29 ((uint32_t)0x20000000) /*!< bit 29 */ -#define NVIC_ICER_CLRENA_30 ((uint32_t)0x40000000) /*!< bit 30 */ -#define NVIC_ICER_CLRENA_31 ((uint32_t)0x80000000) /*!< bit 31 */ - -/****************** Bit definition for NVIC_ISPR register *******************/ -#define NVIC_ISPR_SETPEND ((uint32_t)0xFFFFFFFF) /*!< Interrupt set-pending bits */ -#define NVIC_ISPR_SETPEND_0 ((uint32_t)0x00000001) /*!< bit 0 */ -#define NVIC_ISPR_SETPEND_1 ((uint32_t)0x00000002) /*!< bit 1 */ -#define NVIC_ISPR_SETPEND_2 ((uint32_t)0x00000004) /*!< bit 2 */ -#define NVIC_ISPR_SETPEND_3 ((uint32_t)0x00000008) /*!< bit 3 */ -#define NVIC_ISPR_SETPEND_4 ((uint32_t)0x00000010) /*!< bit 4 */ -#define NVIC_ISPR_SETPEND_5 ((uint32_t)0x00000020) /*!< bit 5 */ -#define NVIC_ISPR_SETPEND_6 ((uint32_t)0x00000040) /*!< bit 6 */ -#define NVIC_ISPR_SETPEND_7 ((uint32_t)0x00000080) /*!< bit 7 */ -#define NVIC_ISPR_SETPEND_8 ((uint32_t)0x00000100) /*!< bit 8 */ -#define NVIC_ISPR_SETPEND_9 ((uint32_t)0x00000200) /*!< bit 9 */ -#define NVIC_ISPR_SETPEND_10 ((uint32_t)0x00000400) /*!< bit 10 */ -#define NVIC_ISPR_SETPEND_11 ((uint32_t)0x00000800) /*!< bit 11 */ -#define NVIC_ISPR_SETPEND_12 ((uint32_t)0x00001000) /*!< bit 12 */ -#define NVIC_ISPR_SETPEND_13 ((uint32_t)0x00002000) /*!< bit 13 */ -#define NVIC_ISPR_SETPEND_14 ((uint32_t)0x00004000) /*!< bit 14 */ -#define NVIC_ISPR_SETPEND_15 ((uint32_t)0x00008000) /*!< bit 15 */ -#define NVIC_ISPR_SETPEND_16 ((uint32_t)0x00010000) /*!< bit 16 */ -#define NVIC_ISPR_SETPEND_17 ((uint32_t)0x00020000) /*!< bit 17 */ -#define NVIC_ISPR_SETPEND_18 ((uint32_t)0x00040000) /*!< bit 18 */ -#define NVIC_ISPR_SETPEND_19 ((uint32_t)0x00080000) /*!< bit 19 */ -#define NVIC_ISPR_SETPEND_20 ((uint32_t)0x00100000) /*!< bit 20 */ -#define NVIC_ISPR_SETPEND_21 ((uint32_t)0x00200000) /*!< bit 21 */ -#define NVIC_ISPR_SETPEND_22 ((uint32_t)0x00400000) /*!< bit 22 */ -#define NVIC_ISPR_SETPEND_23 ((uint32_t)0x00800000) /*!< bit 23 */ -#define NVIC_ISPR_SETPEND_24 ((uint32_t)0x01000000) /*!< bit 24 */ -#define NVIC_ISPR_SETPEND_25 ((uint32_t)0x02000000) /*!< bit 25 */ -#define NVIC_ISPR_SETPEND_26 ((uint32_t)0x04000000) /*!< bit 26 */ -#define NVIC_ISPR_SETPEND_27 ((uint32_t)0x08000000) /*!< bit 27 */ -#define NVIC_ISPR_SETPEND_28 ((uint32_t)0x10000000) /*!< bit 28 */ -#define NVIC_ISPR_SETPEND_29 ((uint32_t)0x20000000) /*!< bit 29 */ -#define NVIC_ISPR_SETPEND_30 ((uint32_t)0x40000000) /*!< bit 30 */ -#define NVIC_ISPR_SETPEND_31 ((uint32_t)0x80000000) /*!< bit 31 */ - -/****************** Bit definition for NVIC_ICPR register *******************/ -#define NVIC_ICPR_CLRPEND ((uint32_t)0xFFFFFFFF) /*!< Interrupt clear-pending bits */ -#define NVIC_ICPR_CLRPEND_0 ((uint32_t)0x00000001) /*!< bit 0 */ -#define NVIC_ICPR_CLRPEND_1 ((uint32_t)0x00000002) /*!< bit 1 */ -#define NVIC_ICPR_CLRPEND_2 ((uint32_t)0x00000004) /*!< bit 2 */ -#define NVIC_ICPR_CLRPEND_3 ((uint32_t)0x00000008) /*!< bit 3 */ -#define NVIC_ICPR_CLRPEND_4 ((uint32_t)0x00000010) /*!< bit 4 */ -#define NVIC_ICPR_CLRPEND_5 ((uint32_t)0x00000020) /*!< bit 5 */ -#define NVIC_ICPR_CLRPEND_6 ((uint32_t)0x00000040) /*!< bit 6 */ -#define NVIC_ICPR_CLRPEND_7 ((uint32_t)0x00000080) /*!< bit 7 */ -#define NVIC_ICPR_CLRPEND_8 ((uint32_t)0x00000100) /*!< bit 8 */ -#define NVIC_ICPR_CLRPEND_9 ((uint32_t)0x00000200) /*!< bit 9 */ -#define NVIC_ICPR_CLRPEND_10 ((uint32_t)0x00000400) /*!< bit 10 */ -#define NVIC_ICPR_CLRPEND_11 ((uint32_t)0x00000800) /*!< bit 11 */ -#define NVIC_ICPR_CLRPEND_12 ((uint32_t)0x00001000) /*!< bit 12 */ -#define NVIC_ICPR_CLRPEND_13 ((uint32_t)0x00002000) /*!< bit 13 */ -#define NVIC_ICPR_CLRPEND_14 ((uint32_t)0x00004000) /*!< bit 14 */ -#define NVIC_ICPR_CLRPEND_15 ((uint32_t)0x00008000) /*!< bit 15 */ -#define NVIC_ICPR_CLRPEND_16 ((uint32_t)0x00010000) /*!< bit 16 */ -#define NVIC_ICPR_CLRPEND_17 ((uint32_t)0x00020000) /*!< bit 17 */ -#define NVIC_ICPR_CLRPEND_18 ((uint32_t)0x00040000) /*!< bit 18 */ -#define NVIC_ICPR_CLRPEND_19 ((uint32_t)0x00080000) /*!< bit 19 */ -#define NVIC_ICPR_CLRPEND_20 ((uint32_t)0x00100000) /*!< bit 20 */ -#define NVIC_ICPR_CLRPEND_21 ((uint32_t)0x00200000) /*!< bit 21 */ -#define NVIC_ICPR_CLRPEND_22 ((uint32_t)0x00400000) /*!< bit 22 */ -#define NVIC_ICPR_CLRPEND_23 ((uint32_t)0x00800000) /*!< bit 23 */ -#define NVIC_ICPR_CLRPEND_24 ((uint32_t)0x01000000) /*!< bit 24 */ -#define NVIC_ICPR_CLRPEND_25 ((uint32_t)0x02000000) /*!< bit 25 */ -#define NVIC_ICPR_CLRPEND_26 ((uint32_t)0x04000000) /*!< bit 26 */ -#define NVIC_ICPR_CLRPEND_27 ((uint32_t)0x08000000) /*!< bit 27 */ -#define NVIC_ICPR_CLRPEND_28 ((uint32_t)0x10000000) /*!< bit 28 */ -#define NVIC_ICPR_CLRPEND_29 ((uint32_t)0x20000000) /*!< bit 29 */ -#define NVIC_ICPR_CLRPEND_30 ((uint32_t)0x40000000) /*!< bit 30 */ -#define NVIC_ICPR_CLRPEND_31 ((uint32_t)0x80000000) /*!< bit 31 */ - -/****************** Bit definition for NVIC_IABR register *******************/ -#define NVIC_IABR_ACTIVE ((uint32_t)0xFFFFFFFF) /*!< Interrupt active flags */ -#define NVIC_IABR_ACTIVE_0 ((uint32_t)0x00000001) /*!< bit 0 */ -#define NVIC_IABR_ACTIVE_1 ((uint32_t)0x00000002) /*!< bit 1 */ -#define NVIC_IABR_ACTIVE_2 ((uint32_t)0x00000004) /*!< bit 2 */ -#define NVIC_IABR_ACTIVE_3 ((uint32_t)0x00000008) /*!< bit 3 */ -#define NVIC_IABR_ACTIVE_4 ((uint32_t)0x00000010) /*!< bit 4 */ -#define NVIC_IABR_ACTIVE_5 ((uint32_t)0x00000020) /*!< bit 5 */ -#define NVIC_IABR_ACTIVE_6 ((uint32_t)0x00000040) /*!< bit 6 */ -#define NVIC_IABR_ACTIVE_7 ((uint32_t)0x00000080) /*!< bit 7 */ -#define NVIC_IABR_ACTIVE_8 ((uint32_t)0x00000100) /*!< bit 8 */ -#define NVIC_IABR_ACTIVE_9 ((uint32_t)0x00000200) /*!< bit 9 */ -#define NVIC_IABR_ACTIVE_10 ((uint32_t)0x00000400) /*!< bit 10 */ -#define NVIC_IABR_ACTIVE_11 ((uint32_t)0x00000800) /*!< bit 11 */ -#define NVIC_IABR_ACTIVE_12 ((uint32_t)0x00001000) /*!< bit 12 */ -#define NVIC_IABR_ACTIVE_13 ((uint32_t)0x00002000) /*!< bit 13 */ -#define NVIC_IABR_ACTIVE_14 ((uint32_t)0x00004000) /*!< bit 14 */ -#define NVIC_IABR_ACTIVE_15 ((uint32_t)0x00008000) /*!< bit 15 */ -#define NVIC_IABR_ACTIVE_16 ((uint32_t)0x00010000) /*!< bit 16 */ -#define NVIC_IABR_ACTIVE_17 ((uint32_t)0x00020000) /*!< bit 17 */ -#define NVIC_IABR_ACTIVE_18 ((uint32_t)0x00040000) /*!< bit 18 */ -#define NVIC_IABR_ACTIVE_19 ((uint32_t)0x00080000) /*!< bit 19 */ -#define NVIC_IABR_ACTIVE_20 ((uint32_t)0x00100000) /*!< bit 20 */ -#define NVIC_IABR_ACTIVE_21 ((uint32_t)0x00200000) /*!< bit 21 */ -#define NVIC_IABR_ACTIVE_22 ((uint32_t)0x00400000) /*!< bit 22 */ -#define NVIC_IABR_ACTIVE_23 ((uint32_t)0x00800000) /*!< bit 23 */ -#define NVIC_IABR_ACTIVE_24 ((uint32_t)0x01000000) /*!< bit 24 */ -#define NVIC_IABR_ACTIVE_25 ((uint32_t)0x02000000) /*!< bit 25 */ -#define NVIC_IABR_ACTIVE_26 ((uint32_t)0x04000000) /*!< bit 26 */ -#define NVIC_IABR_ACTIVE_27 ((uint32_t)0x08000000) /*!< bit 27 */ -#define NVIC_IABR_ACTIVE_28 ((uint32_t)0x10000000) /*!< bit 28 */ -#define NVIC_IABR_ACTIVE_29 ((uint32_t)0x20000000) /*!< bit 29 */ -#define NVIC_IABR_ACTIVE_30 ((uint32_t)0x40000000) /*!< bit 30 */ -#define NVIC_IABR_ACTIVE_31 ((uint32_t)0x80000000) /*!< bit 31 */ - -/****************** Bit definition for NVIC_PRI0 register *******************/ -#define NVIC_IPR0_PRI_0 ((uint32_t)0x000000FF) /*!< Priority of interrupt 0 */ -#define NVIC_IPR0_PRI_1 ((uint32_t)0x0000FF00) /*!< Priority of interrupt 1 */ -#define NVIC_IPR0_PRI_2 ((uint32_t)0x00FF0000) /*!< Priority of interrupt 2 */ -#define NVIC_IPR0_PRI_3 ((uint32_t)0xFF000000) /*!< Priority of interrupt 3 */ - -/****************** Bit definition for NVIC_PRI1 register *******************/ -#define NVIC_IPR1_PRI_4 ((uint32_t)0x000000FF) /*!< Priority of interrupt 4 */ -#define NVIC_IPR1_PRI_5 ((uint32_t)0x0000FF00) /*!< Priority of interrupt 5 */ -#define NVIC_IPR1_PRI_6 ((uint32_t)0x00FF0000) /*!< Priority of interrupt 6 */ -#define NVIC_IPR1_PRI_7 ((uint32_t)0xFF000000) /*!< Priority of interrupt 7 */ - -/****************** Bit definition for NVIC_PRI2 register *******************/ -#define NVIC_IPR2_PRI_8 ((uint32_t)0x000000FF) /*!< Priority of interrupt 8 */ -#define NVIC_IPR2_PRI_9 ((uint32_t)0x0000FF00) /*!< Priority of interrupt 9 */ -#define NVIC_IPR2_PRI_10 ((uint32_t)0x00FF0000) /*!< Priority of interrupt 10 */ -#define NVIC_IPR2_PRI_11 ((uint32_t)0xFF000000) /*!< Priority of interrupt 11 */ - -/****************** Bit definition for NVIC_PRI3 register *******************/ -#define NVIC_IPR3_PRI_12 ((uint32_t)0x000000FF) /*!< Priority of interrupt 12 */ -#define NVIC_IPR3_PRI_13 ((uint32_t)0x0000FF00) /*!< Priority of interrupt 13 */ -#define NVIC_IPR3_PRI_14 ((uint32_t)0x00FF0000) /*!< Priority of interrupt 14 */ -#define NVIC_IPR3_PRI_15 ((uint32_t)0xFF000000) /*!< Priority of interrupt 15 */ - -/****************** Bit definition for NVIC_PRI4 register *******************/ -#define NVIC_IPR4_PRI_16 ((uint32_t)0x000000FF) /*!< Priority of interrupt 16 */ -#define NVIC_IPR4_PRI_17 ((uint32_t)0x0000FF00) /*!< Priority of interrupt 17 */ -#define NVIC_IPR4_PRI_18 ((uint32_t)0x00FF0000) /*!< Priority of interrupt 18 */ -#define NVIC_IPR4_PRI_19 ((uint32_t)0xFF000000) /*!< Priority of interrupt 19 */ - -/****************** Bit definition for NVIC_PRI5 register *******************/ -#define NVIC_IPR5_PRI_20 ((uint32_t)0x000000FF) /*!< Priority of interrupt 20 */ -#define NVIC_IPR5_PRI_21 ((uint32_t)0x0000FF00) /*!< Priority of interrupt 21 */ -#define NVIC_IPR5_PRI_22 ((uint32_t)0x00FF0000) /*!< Priority of interrupt 22 */ -#define NVIC_IPR5_PRI_23 ((uint32_t)0xFF000000) /*!< Priority of interrupt 23 */ - -/****************** Bit definition for NVIC_PRI6 register *******************/ -#define NVIC_IPR6_PRI_24 ((uint32_t)0x000000FF) /*!< Priority of interrupt 24 */ -#define NVIC_IPR6_PRI_25 ((uint32_t)0x0000FF00) /*!< Priority of interrupt 25 */ -#define NVIC_IPR6_PRI_26 ((uint32_t)0x00FF0000) /*!< Priority of interrupt 26 */ -#define NVIC_IPR6_PRI_27 ((uint32_t)0xFF000000) /*!< Priority of interrupt 27 */ - -/****************** Bit definition for NVIC_PRI7 register *******************/ -#define NVIC_IPR7_PRI_28 ((uint32_t)0x000000FF) /*!< Priority of interrupt 28 */ -#define NVIC_IPR7_PRI_29 ((uint32_t)0x0000FF00) /*!< Priority of interrupt 29 */ -#define NVIC_IPR7_PRI_30 ((uint32_t)0x00FF0000) /*!< Priority of interrupt 30 */ -#define NVIC_IPR7_PRI_31 ((uint32_t)0xFF000000) /*!< Priority of interrupt 31 */ - -/****************** Bit definition for SCB_CPUID register *******************/ -#define SCB_CPUID_REVISION ((uint32_t)0x0000000F) /*!< Implementation defined revision number */ -#define SCB_CPUID_PARTNO ((uint32_t)0x0000FFF0) /*!< Number of processor within family */ -#define SCB_CPUID_Constant ((uint32_t)0x000F0000) /*!< Reads as 0x0F */ -#define SCB_CPUID_VARIANT ((uint32_t)0x00F00000) /*!< Implementation defined variant number */ -#define SCB_CPUID_IMPLEMENTER ((uint32_t)0xFF000000) /*!< Implementer code. ARM is 0x41 */ - -/******************* Bit definition for SCB_ICSR register *******************/ -#define SCB_ICSR_VECTACTIVE ((uint32_t)0x000001FF) /*!< Active ISR number field */ -#define SCB_ICSR_RETTOBASE ((uint32_t)0x00000800) /*!< All active exceptions minus the IPSR_current_exception yields the empty set */ -#define SCB_ICSR_VECTPENDING ((uint32_t)0x003FF000) /*!< Pending ISR number field */ -#define SCB_ICSR_ISRPENDING ((uint32_t)0x00400000) /*!< Interrupt pending flag */ -#define SCB_ICSR_ISRPREEMPT ((uint32_t)0x00800000) /*!< It indicates that a pending interrupt becomes active in the next running cycle */ -#define SCB_ICSR_PENDSTCLR ((uint32_t)0x02000000) /*!< Clear pending SysTick bit */ -#define SCB_ICSR_PENDSTSET ((uint32_t)0x04000000) /*!< Set pending SysTick bit */ -#define SCB_ICSR_PENDSVCLR ((uint32_t)0x08000000) /*!< Clear pending pendSV bit */ -#define SCB_ICSR_PENDSVSET ((uint32_t)0x10000000) /*!< Set pending pendSV bit */ -#define SCB_ICSR_NMIPENDSET ((uint32_t)0x80000000) /*!< Set pending NMI bit */ - -/******************* Bit definition for SCB_VTOR register *******************/ -#define SCB_VTOR_TBLOFF ((uint32_t)0x1FFFFF80) /*!< Vector table base offset field */ -#define SCB_VTOR_TBLBASE ((uint32_t)0x20000000) /*!< Table base in code(0) or RAM(1) */ - -/*!<***************** Bit definition for SCB_AIRCR register *******************/ -#define SCB_AIRCR_VECTRESET ((uint32_t)0x00000001) /*!< System Reset bit */ -#define SCB_AIRCR_VECTCLRACTIVE ((uint32_t)0x00000002) /*!< Clear active vector bit */ -#define SCB_AIRCR_SYSRESETREQ ((uint32_t)0x00000004) /*!< Requests chip control logic to generate a reset */ - -#define SCB_AIRCR_PRIGROUP ((uint32_t)0x00000700) /*!< PRIGROUP[2:0] bits (Priority group) */ -#define SCB_AIRCR_PRIGROUP_0 ((uint32_t)0x00000100) /*!< Bit 0 */ -#define SCB_AIRCR_PRIGROUP_1 ((uint32_t)0x00000200) /*!< Bit 1 */ -#define SCB_AIRCR_PRIGROUP_2 ((uint32_t)0x00000400) /*!< Bit 2 */ - -/* prority group configuration */ -#define SCB_AIRCR_PRIGROUP0 ((uint32_t)0x00000000) /*!< Priority group=0 (7 bits of pre-emption priority, 1 bit of subpriority) */ -#define SCB_AIRCR_PRIGROUP1 ((uint32_t)0x00000100) /*!< Priority group=1 (6 bits of pre-emption priority, 2 bits of subpriority) */ -#define SCB_AIRCR_PRIGROUP2 ((uint32_t)0x00000200) /*!< Priority group=2 (5 bits of pre-emption priority, 3 bits of subpriority) */ -#define SCB_AIRCR_PRIGROUP3 ((uint32_t)0x00000300) /*!< Priority group=3 (4 bits of pre-emption priority, 4 bits of subpriority) */ -#define SCB_AIRCR_PRIGROUP4 ((uint32_t)0x00000400) /*!< Priority group=4 (3 bits of pre-emption priority, 5 bits of subpriority) */ -#define SCB_AIRCR_PRIGROUP5 ((uint32_t)0x00000500) /*!< Priority group=5 (2 bits of pre-emption priority, 6 bits of subpriority) */ -#define SCB_AIRCR_PRIGROUP6 ((uint32_t)0x00000600) /*!< Priority group=6 (1 bit of pre-emption priority, 7 bits of subpriority) */ -#define SCB_AIRCR_PRIGROUP7 ((uint32_t)0x00000700) /*!< Priority group=7 (no pre-emption priority, 8 bits of subpriority) */ - -#define SCB_AIRCR_ENDIANESS ((uint32_t)0x00008000) /*!< Data endianness bit */ -#define SCB_AIRCR_VECTKEY ((uint32_t)0xFFFF0000) /*!< Register key (VECTKEY) - Reads as 0xFA05 (VECTKEYSTAT) */ - -/******************* Bit definition for SCB_SCR register ********************/ -#define SCB_SCR_SLEEPONEXIT ((uint8_t)0x02) /*!< Sleep on exit bit */ -#define SCB_SCR_SLEEPDEEP ((uint8_t)0x04) /*!< Sleep deep bit */ -#define SCB_SCR_SEVONPEND ((uint8_t)0x10) /*!< Wake up from WFE */ - -/******************** Bit definition for SCB_CCR register *******************/ -#define SCB_CCR_NONBASETHRDENA ((uint16_t)0x0001) /*!< Thread mode can be entered from any level in Handler mode by controlled return value */ -#define SCB_CCR_USERSETMPEND ((uint16_t)0x0002) /*!< Enables user code to write the Software Trigger Interrupt register to trigger (pend) a Main exception */ -#define SCB_CCR_UNALIGN_TRP ((uint16_t)0x0008) /*!< Trap for unaligned access */ -#define SCB_CCR_DIV_0_TRP ((uint16_t)0x0010) /*!< Trap on Divide by 0 */ -#define SCB_CCR_BFHFNMIGN ((uint16_t)0x0100) /*!< Handlers running at priority -1 and -2 */ -#define SCB_CCR_STKALIGN ((uint16_t)0x0200) /*!< On exception entry, the SP used prior to the exception is adjusted to be 8-byte aligned */ - -/******************* Bit definition for SCB_SHPR register ********************/ -#define SCB_SHPR_PRI_N ((uint32_t)0x000000FF) /*!< Priority of system handler 4,8, and 12. Mem Manage, reserved and Debug Monitor */ -#define SCB_SHPR_PRI_N1 ((uint32_t)0x0000FF00) /*!< Priority of system handler 5,9, and 13. Bus Fault, reserved and reserved */ -#define SCB_SHPR_PRI_N2 ((uint32_t)0x00FF0000) /*!< Priority of system handler 6,10, and 14. Usage Fault, reserved and PendSV */ -#define SCB_SHPR_PRI_N3 ((uint32_t)0xFF000000) /*!< Priority of system handler 7,11, and 15. Reserved, SVCall and SysTick */ - -/****************** Bit definition for SCB_SHCSR register *******************/ -#define SCB_SHCSR_MEMFAULTACT ((uint32_t)0x00000001) /*!< MemManage is active */ -#define SCB_SHCSR_BUSFAULTACT ((uint32_t)0x00000002) /*!< BusFault is active */ -#define SCB_SHCSR_USGFAULTACT ((uint32_t)0x00000008) /*!< UsageFault is active */ -#define SCB_SHCSR_SVCALLACT ((uint32_t)0x00000080) /*!< SVCall is active */ -#define SCB_SHCSR_MONITORACT ((uint32_t)0x00000100) /*!< Monitor is active */ -#define SCB_SHCSR_PENDSVACT ((uint32_t)0x00000400) /*!< PendSV is active */ -#define SCB_SHCSR_SYSTICKACT ((uint32_t)0x00000800) /*!< SysTick is active */ -#define SCB_SHCSR_USGFAULTPENDED ((uint32_t)0x00001000) /*!< Usage Fault is pended */ -#define SCB_SHCSR_MEMFAULTPENDED ((uint32_t)0x00002000) /*!< MemManage is pended */ -#define SCB_SHCSR_BUSFAULTPENDED ((uint32_t)0x00004000) /*!< Bus Fault is pended */ -#define SCB_SHCSR_SVCALLPENDED ((uint32_t)0x00008000) /*!< SVCall is pended */ -#define SCB_SHCSR_MEMFAULTENA ((uint32_t)0x00010000) /*!< MemManage enable */ -#define SCB_SHCSR_BUSFAULTENA ((uint32_t)0x00020000) /*!< Bus Fault enable */ -#define SCB_SHCSR_USGFAULTENA ((uint32_t)0x00040000) /*!< UsageFault enable */ - -/******************* Bit definition for SCB_CFSR register *******************/ -/*!< MFSR */ -#define SCB_CFSR_IACCVIOL ((uint32_t)0x00000001) /*!< Instruction access violation */ -#define SCB_CFSR_DACCVIOL ((uint32_t)0x00000002) /*!< Data access violation */ -#define SCB_CFSR_MUNSTKERR ((uint32_t)0x00000008) /*!< Unstacking error */ -#define SCB_CFSR_MSTKERR ((uint32_t)0x00000010) /*!< Stacking error */ -#define SCB_CFSR_MMARVALID ((uint32_t)0x00000080) /*!< Memory Manage Address Register address valid flag */ -/*!< BFSR */ -#define SCB_CFSR_IBUSERR ((uint32_t)0x00000100) /*!< Instruction bus error flag */ -#define SCB_CFSR_PRECISERR ((uint32_t)0x00000200) /*!< Precise data bus error */ -#define SCB_CFSR_IMPRECISERR ((uint32_t)0x00000400) /*!< Imprecise data bus error */ -#define SCB_CFSR_UNSTKERR ((uint32_t)0x00000800) /*!< Unstacking error */ -#define SCB_CFSR_STKERR ((uint32_t)0x00001000) /*!< Stacking error */ -#define SCB_CFSR_BFARVALID ((uint32_t)0x00008000) /*!< Bus Fault Address Register address valid flag */ -/*!< UFSR */ -#define SCB_CFSR_UNDEFINSTR ((uint32_t)0x00010000) /*!< The processor attempt to excecute an undefined instruction */ -#define SCB_CFSR_INVSTATE ((uint32_t)0x00020000) /*!< Invalid combination of EPSR and instruction */ -#define SCB_CFSR_INVPC ((uint32_t)0x00040000) /*!< Attempt to load EXC_RETURN into pc illegally */ -#define SCB_CFSR_NOCP ((uint32_t)0x00080000) /*!< Attempt to use a coprocessor instruction */ -#define SCB_CFSR_UNALIGNED ((uint32_t)0x01000000) /*!< Fault occurs when there is an attempt to make an unaligned memory access */ -#define SCB_CFSR_DIVBYZERO ((uint32_t)0x02000000) /*!< Fault occurs when SDIV or DIV instruction is used with a divisor of 0 */ - -/******************* Bit definition for SCB_HFSR register *******************/ -#define SCB_HFSR_VECTTBL ((uint32_t)0x00000002) /*!< Fault occures because of vector table read on exception processing */ -#define SCB_HFSR_FORCED ((uint32_t)0x40000000) /*!< Hard Fault activated when a configurable Fault was received and cannot activate */ -#define SCB_HFSR_DEBUGEVT ((uint32_t)0x80000000) /*!< Fault related to debug */ - -/******************* Bit definition for SCB_DFSR register *******************/ -#define SCB_DFSR_HALTED ((uint8_t)0x01) /*!< Halt request flag */ -#define SCB_DFSR_BKPT ((uint8_t)0x02) /*!< BKPT flag */ -#define SCB_DFSR_DWTTRAP ((uint8_t)0x04) /*!< Data Watchpoint and Trace (DWT) flag */ -#define SCB_DFSR_VCATCH ((uint8_t)0x08) /*!< Vector catch flag */ -#define SCB_DFSR_EXTERNAL ((uint8_t)0x10) /*!< External debug request flag */ - -/******************* Bit definition for SCB_MMFAR register ******************/ -#define SCB_MMFAR_ADDRESS ((uint32_t)0xFFFFFFFF) /*!< Mem Manage fault address field */ - -/******************* Bit definition for SCB_BFAR register *******************/ -#define SCB_BFAR_ADDRESS ((uint32_t)0xFFFFFFFF) /*!< Bus fault address field */ - -/******************* Bit definition for SCB_afsr register *******************/ -#define SCB_AFSR_IMPDEF ((uint32_t)0xFFFFFFFF) /*!< Implementation defined */ - -/******************************************************************************/ -/* */ -/* External Interrupt/Event Controller */ -/* */ -/******************************************************************************/ - -/******************* Bit definition for EXTI_IMR register *******************/ -#define EXTI_IMR_MR0 ((uint32_t)0x00000001) /*!< Interrupt Mask on line 0 */ -#define EXTI_IMR_MR1 ((uint32_t)0x00000002) /*!< Interrupt Mask on line 1 */ -#define EXTI_IMR_MR2 ((uint32_t)0x00000004) /*!< Interrupt Mask on line 2 */ -#define EXTI_IMR_MR3 ((uint32_t)0x00000008) /*!< Interrupt Mask on line 3 */ -#define EXTI_IMR_MR4 ((uint32_t)0x00000010) /*!< Interrupt Mask on line 4 */ -#define EXTI_IMR_MR5 ((uint32_t)0x00000020) /*!< Interrupt Mask on line 5 */ -#define EXTI_IMR_MR6 ((uint32_t)0x00000040) /*!< Interrupt Mask on line 6 */ -#define EXTI_IMR_MR7 ((uint32_t)0x00000080) /*!< Interrupt Mask on line 7 */ -#define EXTI_IMR_MR8 ((uint32_t)0x00000100) /*!< Interrupt Mask on line 8 */ -#define EXTI_IMR_MR9 ((uint32_t)0x00000200) /*!< Interrupt Mask on line 9 */ -#define EXTI_IMR_MR10 ((uint32_t)0x00000400) /*!< Interrupt Mask on line 10 */ -#define EXTI_IMR_MR11 ((uint32_t)0x00000800) /*!< Interrupt Mask on line 11 */ -#define EXTI_IMR_MR12 ((uint32_t)0x00001000) /*!< Interrupt Mask on line 12 */ -#define EXTI_IMR_MR13 ((uint32_t)0x00002000) /*!< Interrupt Mask on line 13 */ -#define EXTI_IMR_MR14 ((uint32_t)0x00004000) /*!< Interrupt Mask on line 14 */ -#define EXTI_IMR_MR15 ((uint32_t)0x00008000) /*!< Interrupt Mask on line 15 */ -#define EXTI_IMR_MR16 ((uint32_t)0x00010000) /*!< Interrupt Mask on line 16 */ -#define EXTI_IMR_MR17 ((uint32_t)0x00020000) /*!< Interrupt Mask on line 17 */ -#define EXTI_IMR_MR18 ((uint32_t)0x00040000) /*!< Interrupt Mask on line 18 */ -#define EXTI_IMR_MR19 ((uint32_t)0x00080000) /*!< Interrupt Mask on line 19 */ - -/******************* Bit definition for EXTI_EMR register *******************/ -#define EXTI_EMR_MR0 ((uint32_t)0x00000001) /*!< Event Mask on line 0 */ -#define EXTI_EMR_MR1 ((uint32_t)0x00000002) /*!< Event Mask on line 1 */ -#define EXTI_EMR_MR2 ((uint32_t)0x00000004) /*!< Event Mask on line 2 */ -#define EXTI_EMR_MR3 ((uint32_t)0x00000008) /*!< Event Mask on line 3 */ -#define EXTI_EMR_MR4 ((uint32_t)0x00000010) /*!< Event Mask on line 4 */ -#define EXTI_EMR_MR5 ((uint32_t)0x00000020) /*!< Event Mask on line 5 */ -#define EXTI_EMR_MR6 ((uint32_t)0x00000040) /*!< Event Mask on line 6 */ -#define EXTI_EMR_MR7 ((uint32_t)0x00000080) /*!< Event Mask on line 7 */ -#define EXTI_EMR_MR8 ((uint32_t)0x00000100) /*!< Event Mask on line 8 */ -#define EXTI_EMR_MR9 ((uint32_t)0x00000200) /*!< Event Mask on line 9 */ -#define EXTI_EMR_MR10 ((uint32_t)0x00000400) /*!< Event Mask on line 10 */ -#define EXTI_EMR_MR11 ((uint32_t)0x00000800) /*!< Event Mask on line 11 */ -#define EXTI_EMR_MR12 ((uint32_t)0x00001000) /*!< Event Mask on line 12 */ -#define EXTI_EMR_MR13 ((uint32_t)0x00002000) /*!< Event Mask on line 13 */ -#define EXTI_EMR_MR14 ((uint32_t)0x00004000) /*!< Event Mask on line 14 */ -#define EXTI_EMR_MR15 ((uint32_t)0x00008000) /*!< Event Mask on line 15 */ -#define EXTI_EMR_MR16 ((uint32_t)0x00010000) /*!< Event Mask on line 16 */ -#define EXTI_EMR_MR17 ((uint32_t)0x00020000) /*!< Event Mask on line 17 */ -#define EXTI_EMR_MR18 ((uint32_t)0x00040000) /*!< Event Mask on line 18 */ -#define EXTI_EMR_MR19 ((uint32_t)0x00080000) /*!< Event Mask on line 19 */ - -/****************** Bit definition for EXTI_RTSR register *******************/ -#define EXTI_RTSR_TR0 ((uint32_t)0x00000001) /*!< Rising trigger event configuration bit of line 0 */ -#define EXTI_RTSR_TR1 ((uint32_t)0x00000002) /*!< Rising trigger event configuration bit of line 1 */ -#define EXTI_RTSR_TR2 ((uint32_t)0x00000004) /*!< Rising trigger event configuration bit of line 2 */ -#define EXTI_RTSR_TR3 ((uint32_t)0x00000008) /*!< Rising trigger event configuration bit of line 3 */ -#define EXTI_RTSR_TR4 ((uint32_t)0x00000010) /*!< Rising trigger event configuration bit of line 4 */ -#define EXTI_RTSR_TR5 ((uint32_t)0x00000020) /*!< Rising trigger event configuration bit of line 5 */ -#define EXTI_RTSR_TR6 ((uint32_t)0x00000040) /*!< Rising trigger event configuration bit of line 6 */ -#define EXTI_RTSR_TR7 ((uint32_t)0x00000080) /*!< Rising trigger event configuration bit of line 7 */ -#define EXTI_RTSR_TR8 ((uint32_t)0x00000100) /*!< Rising trigger event configuration bit of line 8 */ -#define EXTI_RTSR_TR9 ((uint32_t)0x00000200) /*!< Rising trigger event configuration bit of line 9 */ -#define EXTI_RTSR_TR10 ((uint32_t)0x00000400) /*!< Rising trigger event configuration bit of line 10 */ -#define EXTI_RTSR_TR11 ((uint32_t)0x00000800) /*!< Rising trigger event configuration bit of line 11 */ -#define EXTI_RTSR_TR12 ((uint32_t)0x00001000) /*!< Rising trigger event configuration bit of line 12 */ -#define EXTI_RTSR_TR13 ((uint32_t)0x00002000) /*!< Rising trigger event configuration bit of line 13 */ -#define EXTI_RTSR_TR14 ((uint32_t)0x00004000) /*!< Rising trigger event configuration bit of line 14 */ -#define EXTI_RTSR_TR15 ((uint32_t)0x00008000) /*!< Rising trigger event configuration bit of line 15 */ -#define EXTI_RTSR_TR16 ((uint32_t)0x00010000) /*!< Rising trigger event configuration bit of line 16 */ -#define EXTI_RTSR_TR17 ((uint32_t)0x00020000) /*!< Rising trigger event configuration bit of line 17 */ -#define EXTI_RTSR_TR18 ((uint32_t)0x00040000) /*!< Rising trigger event configuration bit of line 18 */ -#define EXTI_RTSR_TR19 ((uint32_t)0x00080000) /*!< Rising trigger event configuration bit of line 19 */ - -/****************** Bit definition for EXTI_FTSR register *******************/ -#define EXTI_FTSR_TR0 ((uint32_t)0x00000001) /*!< Falling trigger event configuration bit of line 0 */ -#define EXTI_FTSR_TR1 ((uint32_t)0x00000002) /*!< Falling trigger event configuration bit of line 1 */ -#define EXTI_FTSR_TR2 ((uint32_t)0x00000004) /*!< Falling trigger event configuration bit of line 2 */ -#define EXTI_FTSR_TR3 ((uint32_t)0x00000008) /*!< Falling trigger event configuration bit of line 3 */ -#define EXTI_FTSR_TR4 ((uint32_t)0x00000010) /*!< Falling trigger event configuration bit of line 4 */ -#define EXTI_FTSR_TR5 ((uint32_t)0x00000020) /*!< Falling trigger event configuration bit of line 5 */ -#define EXTI_FTSR_TR6 ((uint32_t)0x00000040) /*!< Falling trigger event configuration bit of line 6 */ -#define EXTI_FTSR_TR7 ((uint32_t)0x00000080) /*!< Falling trigger event configuration bit of line 7 */ -#define EXTI_FTSR_TR8 ((uint32_t)0x00000100) /*!< Falling trigger event configuration bit of line 8 */ -#define EXTI_FTSR_TR9 ((uint32_t)0x00000200) /*!< Falling trigger event configuration bit of line 9 */ -#define EXTI_FTSR_TR10 ((uint32_t)0x00000400) /*!< Falling trigger event configuration bit of line 10 */ -#define EXTI_FTSR_TR11 ((uint32_t)0x00000800) /*!< Falling trigger event configuration bit of line 11 */ -#define EXTI_FTSR_TR12 ((uint32_t)0x00001000) /*!< Falling trigger event configuration bit of line 12 */ -#define EXTI_FTSR_TR13 ((uint32_t)0x00002000) /*!< Falling trigger event configuration bit of line 13 */ -#define EXTI_FTSR_TR14 ((uint32_t)0x00004000) /*!< Falling trigger event configuration bit of line 14 */ -#define EXTI_FTSR_TR15 ((uint32_t)0x00008000) /*!< Falling trigger event configuration bit of line 15 */ -#define EXTI_FTSR_TR16 ((uint32_t)0x00010000) /*!< Falling trigger event configuration bit of line 16 */ -#define EXTI_FTSR_TR17 ((uint32_t)0x00020000) /*!< Falling trigger event configuration bit of line 17 */ -#define EXTI_FTSR_TR18 ((uint32_t)0x00040000) /*!< Falling trigger event configuration bit of line 18 */ -#define EXTI_FTSR_TR19 ((uint32_t)0x00080000) /*!< Falling trigger event configuration bit of line 19 */ - -/****************** Bit definition for EXTI_SWIER register ******************/ -#define EXTI_SWIER_SWIER0 ((uint32_t)0x00000001) /*!< Software Interrupt on line 0 */ -#define EXTI_SWIER_SWIER1 ((uint32_t)0x00000002) /*!< Software Interrupt on line 1 */ -#define EXTI_SWIER_SWIER2 ((uint32_t)0x00000004) /*!< Software Interrupt on line 2 */ -#define EXTI_SWIER_SWIER3 ((uint32_t)0x00000008) /*!< Software Interrupt on line 3 */ -#define EXTI_SWIER_SWIER4 ((uint32_t)0x00000010) /*!< Software Interrupt on line 4 */ -#define EXTI_SWIER_SWIER5 ((uint32_t)0x00000020) /*!< Software Interrupt on line 5 */ -#define EXTI_SWIER_SWIER6 ((uint32_t)0x00000040) /*!< Software Interrupt on line 6 */ -#define EXTI_SWIER_SWIER7 ((uint32_t)0x00000080) /*!< Software Interrupt on line 7 */ -#define EXTI_SWIER_SWIER8 ((uint32_t)0x00000100) /*!< Software Interrupt on line 8 */ -#define EXTI_SWIER_SWIER9 ((uint32_t)0x00000200) /*!< Software Interrupt on line 9 */ -#define EXTI_SWIER_SWIER10 ((uint32_t)0x00000400) /*!< Software Interrupt on line 10 */ -#define EXTI_SWIER_SWIER11 ((uint32_t)0x00000800) /*!< Software Interrupt on line 11 */ -#define EXTI_SWIER_SWIER12 ((uint32_t)0x00001000) /*!< Software Interrupt on line 12 */ -#define EXTI_SWIER_SWIER13 ((uint32_t)0x00002000) /*!< Software Interrupt on line 13 */ -#define EXTI_SWIER_SWIER14 ((uint32_t)0x00004000) /*!< Software Interrupt on line 14 */ -#define EXTI_SWIER_SWIER15 ((uint32_t)0x00008000) /*!< Software Interrupt on line 15 */ -#define EXTI_SWIER_SWIER16 ((uint32_t)0x00010000) /*!< Software Interrupt on line 16 */ -#define EXTI_SWIER_SWIER17 ((uint32_t)0x00020000) /*!< Software Interrupt on line 17 */ -#define EXTI_SWIER_SWIER18 ((uint32_t)0x00040000) /*!< Software Interrupt on line 18 */ -#define EXTI_SWIER_SWIER19 ((uint32_t)0x00080000) /*!< Software Interrupt on line 19 */ - -/******************* Bit definition for EXTI_PR register ********************/ -#define EXTI_PR_PR0 ((uint32_t)0x00000001) /*!< Pending bit for line 0 */ -#define EXTI_PR_PR1 ((uint32_t)0x00000002) /*!< Pending bit for line 1 */ -#define EXTI_PR_PR2 ((uint32_t)0x00000004) /*!< Pending bit for line 2 */ -#define EXTI_PR_PR3 ((uint32_t)0x00000008) /*!< Pending bit for line 3 */ -#define EXTI_PR_PR4 ((uint32_t)0x00000010) /*!< Pending bit for line 4 */ -#define EXTI_PR_PR5 ((uint32_t)0x00000020) /*!< Pending bit for line 5 */ -#define EXTI_PR_PR6 ((uint32_t)0x00000040) /*!< Pending bit for line 6 */ -#define EXTI_PR_PR7 ((uint32_t)0x00000080) /*!< Pending bit for line 7 */ -#define EXTI_PR_PR8 ((uint32_t)0x00000100) /*!< Pending bit for line 8 */ -#define EXTI_PR_PR9 ((uint32_t)0x00000200) /*!< Pending bit for line 9 */ -#define EXTI_PR_PR10 ((uint32_t)0x00000400) /*!< Pending bit for line 10 */ -#define EXTI_PR_PR11 ((uint32_t)0x00000800) /*!< Pending bit for line 11 */ -#define EXTI_PR_PR12 ((uint32_t)0x00001000) /*!< Pending bit for line 12 */ -#define EXTI_PR_PR13 ((uint32_t)0x00002000) /*!< Pending bit for line 13 */ -#define EXTI_PR_PR14 ((uint32_t)0x00004000) /*!< Pending bit for line 14 */ -#define EXTI_PR_PR15 ((uint32_t)0x00008000) /*!< Pending bit for line 15 */ -#define EXTI_PR_PR16 ((uint32_t)0x00010000) /*!< Pending bit for line 16 */ -#define EXTI_PR_PR17 ((uint32_t)0x00020000) /*!< Pending bit for line 17 */ -#define EXTI_PR_PR18 ((uint32_t)0x00040000) /*!< Pending bit for line 18 */ -#define EXTI_PR_PR19 ((uint32_t)0x00080000) /*!< Pending bit for line 19 */ - -/******************************************************************************/ -/* */ -/* DMA Controller */ -/* */ -/******************************************************************************/ - -/******************* Bit definition for DMA_ISR register ********************/ -#define DMA_ISR_GIF1 ((uint32_t)0x00000001) /*!< Channel 1 Global interrupt flag */ -#define DMA_ISR_TCIF1 ((uint32_t)0x00000002) /*!< Channel 1 Transfer Complete flag */ -#define DMA_ISR_HTIF1 ((uint32_t)0x00000004) /*!< Channel 1 Half Transfer flag */ -#define DMA_ISR_TEIF1 ((uint32_t)0x00000008) /*!< Channel 1 Transfer Error flag */ -#define DMA_ISR_GIF2 ((uint32_t)0x00000010) /*!< Channel 2 Global interrupt flag */ -#define DMA_ISR_TCIF2 ((uint32_t)0x00000020) /*!< Channel 2 Transfer Complete flag */ -#define DMA_ISR_HTIF2 ((uint32_t)0x00000040) /*!< Channel 2 Half Transfer flag */ -#define DMA_ISR_TEIF2 ((uint32_t)0x00000080) /*!< Channel 2 Transfer Error flag */ -#define DMA_ISR_GIF3 ((uint32_t)0x00000100) /*!< Channel 3 Global interrupt flag */ -#define DMA_ISR_TCIF3 ((uint32_t)0x00000200) /*!< Channel 3 Transfer Complete flag */ -#define DMA_ISR_HTIF3 ((uint32_t)0x00000400) /*!< Channel 3 Half Transfer flag */ -#define DMA_ISR_TEIF3 ((uint32_t)0x00000800) /*!< Channel 3 Transfer Error flag */ -#define DMA_ISR_GIF4 ((uint32_t)0x00001000) /*!< Channel 4 Global interrupt flag */ -#define DMA_ISR_TCIF4 ((uint32_t)0x00002000) /*!< Channel 4 Transfer Complete flag */ -#define DMA_ISR_HTIF4 ((uint32_t)0x00004000) /*!< Channel 4 Half Transfer flag */ -#define DMA_ISR_TEIF4 ((uint32_t)0x00008000) /*!< Channel 4 Transfer Error flag */ -#define DMA_ISR_GIF5 ((uint32_t)0x00010000) /*!< Channel 5 Global interrupt flag */ -#define DMA_ISR_TCIF5 ((uint32_t)0x00020000) /*!< Channel 5 Transfer Complete flag */ -#define DMA_ISR_HTIF5 ((uint32_t)0x00040000) /*!< Channel 5 Half Transfer flag */ -#define DMA_ISR_TEIF5 ((uint32_t)0x00080000) /*!< Channel 5 Transfer Error flag */ -#define DMA_ISR_GIF6 ((uint32_t)0x00100000) /*!< Channel 6 Global interrupt flag */ -#define DMA_ISR_TCIF6 ((uint32_t)0x00200000) /*!< Channel 6 Transfer Complete flag */ -#define DMA_ISR_HTIF6 ((uint32_t)0x00400000) /*!< Channel 6 Half Transfer flag */ -#define DMA_ISR_TEIF6 ((uint32_t)0x00800000) /*!< Channel 6 Transfer Error flag */ -#define DMA_ISR_GIF7 ((uint32_t)0x01000000) /*!< Channel 7 Global interrupt flag */ -#define DMA_ISR_TCIF7 ((uint32_t)0x02000000) /*!< Channel 7 Transfer Complete flag */ -#define DMA_ISR_HTIF7 ((uint32_t)0x04000000) /*!< Channel 7 Half Transfer flag */ -#define DMA_ISR_TEIF7 ((uint32_t)0x08000000) /*!< Channel 7 Transfer Error flag */ - -/******************* Bit definition for DMA_IFCR register *******************/ -#define DMA_IFCR_CGIF1 ((uint32_t)0x00000001) /*!< Channel 1 Global interrupt clearr */ -#define DMA_IFCR_CTCIF1 ((uint32_t)0x00000002) /*!< Channel 1 Transfer Complete clear */ -#define DMA_IFCR_CHTIF1 ((uint32_t)0x00000004) /*!< Channel 1 Half Transfer clear */ -#define DMA_IFCR_CTEIF1 ((uint32_t)0x00000008) /*!< Channel 1 Transfer Error clear */ -#define DMA_IFCR_CGIF2 ((uint32_t)0x00000010) /*!< Channel 2 Global interrupt clear */ -#define DMA_IFCR_CTCIF2 ((uint32_t)0x00000020) /*!< Channel 2 Transfer Complete clear */ -#define DMA_IFCR_CHTIF2 ((uint32_t)0x00000040) /*!< Channel 2 Half Transfer clear */ -#define DMA_IFCR_CTEIF2 ((uint32_t)0x00000080) /*!< Channel 2 Transfer Error clear */ -#define DMA_IFCR_CGIF3 ((uint32_t)0x00000100) /*!< Channel 3 Global interrupt clear */ -#define DMA_IFCR_CTCIF3 ((uint32_t)0x00000200) /*!< Channel 3 Transfer Complete clear */ -#define DMA_IFCR_CHTIF3 ((uint32_t)0x00000400) /*!< Channel 3 Half Transfer clear */ -#define DMA_IFCR_CTEIF3 ((uint32_t)0x00000800) /*!< Channel 3 Transfer Error clear */ -#define DMA_IFCR_CGIF4 ((uint32_t)0x00001000) /*!< Channel 4 Global interrupt clear */ -#define DMA_IFCR_CTCIF4 ((uint32_t)0x00002000) /*!< Channel 4 Transfer Complete clear */ -#define DMA_IFCR_CHTIF4 ((uint32_t)0x00004000) /*!< Channel 4 Half Transfer clear */ -#define DMA_IFCR_CTEIF4 ((uint32_t)0x00008000) /*!< Channel 4 Transfer Error clear */ -#define DMA_IFCR_CGIF5 ((uint32_t)0x00010000) /*!< Channel 5 Global interrupt clear */ -#define DMA_IFCR_CTCIF5 ((uint32_t)0x00020000) /*!< Channel 5 Transfer Complete clear */ -#define DMA_IFCR_CHTIF5 ((uint32_t)0x00040000) /*!< Channel 5 Half Transfer clear */ -#define DMA_IFCR_CTEIF5 ((uint32_t)0x00080000) /*!< Channel 5 Transfer Error clear */ -#define DMA_IFCR_CGIF6 ((uint32_t)0x00100000) /*!< Channel 6 Global interrupt clear */ -#define DMA_IFCR_CTCIF6 ((uint32_t)0x00200000) /*!< Channel 6 Transfer Complete clear */ -#define DMA_IFCR_CHTIF6 ((uint32_t)0x00400000) /*!< Channel 6 Half Transfer clear */ -#define DMA_IFCR_CTEIF6 ((uint32_t)0x00800000) /*!< Channel 6 Transfer Error clear */ -#define DMA_IFCR_CGIF7 ((uint32_t)0x01000000) /*!< Channel 7 Global interrupt clear */ -#define DMA_IFCR_CTCIF7 ((uint32_t)0x02000000) /*!< Channel 7 Transfer Complete clear */ -#define DMA_IFCR_CHTIF7 ((uint32_t)0x04000000) /*!< Channel 7 Half Transfer clear */ -#define DMA_IFCR_CTEIF7 ((uint32_t)0x08000000) /*!< Channel 7 Transfer Error clear */ - -/******************* Bit definition for DMA_CCR1 register *******************/ -#define DMA_CCR1_EN ((uint16_t)0x0001) /*!< Channel enable*/ -#define DMA_CCR1_TCIE ((uint16_t)0x0002) /*!< Transfer complete interrupt enable */ -#define DMA_CCR1_HTIE ((uint16_t)0x0004) /*!< Half Transfer interrupt enable */ -#define DMA_CCR1_TEIE ((uint16_t)0x0008) /*!< Transfer error interrupt enable */ -#define DMA_CCR1_DIR ((uint16_t)0x0010) /*!< Data transfer direction */ -#define DMA_CCR1_CIRC ((uint16_t)0x0020) /*!< Circular mode */ -#define DMA_CCR1_PINC ((uint16_t)0x0040) /*!< Peripheral increment mode */ -#define DMA_CCR1_MINC ((uint16_t)0x0080) /*!< Memory increment mode */ - -#define DMA_CCR1_PSIZE ((uint16_t)0x0300) /*!< PSIZE[1:0] bits (Peripheral size) */ -#define DMA_CCR1_PSIZE_0 ((uint16_t)0x0100) /*!< Bit 0 */ -#define DMA_CCR1_PSIZE_1 ((uint16_t)0x0200) /*!< Bit 1 */ - -#define DMA_CCR1_MSIZE ((uint16_t)0x0C00) /*!< MSIZE[1:0] bits (Memory size) */ -#define DMA_CCR1_MSIZE_0 ((uint16_t)0x0400) /*!< Bit 0 */ -#define DMA_CCR1_MSIZE_1 ((uint16_t)0x0800) /*!< Bit 1 */ - -#define DMA_CCR1_PL ((uint16_t)0x3000) /*!< PL[1:0] bits(Channel Priority level) */ -#define DMA_CCR1_PL_0 ((uint16_t)0x1000) /*!< Bit 0 */ -#define DMA_CCR1_PL_1 ((uint16_t)0x2000) /*!< Bit 1 */ - -#define DMA_CCR1_MEM2MEM ((uint16_t)0x4000) /*!< Memory to memory mode */ - -/******************* Bit definition for DMA_CCR2 register *******************/ -#define DMA_CCR2_EN ((uint16_t)0x0001) /*!< Channel enable */ -#define DMA_CCR2_TCIE ((uint16_t)0x0002) /*!< ransfer complete interrupt enable */ -#define DMA_CCR2_HTIE ((uint16_t)0x0004) /*!< Half Transfer interrupt enable */ -#define DMA_CCR2_TEIE ((uint16_t)0x0008) /*!< Transfer error interrupt enable */ -#define DMA_CCR2_DIR ((uint16_t)0x0010) /*!< Data transfer direction */ -#define DMA_CCR2_CIRC ((uint16_t)0x0020) /*!< Circular mode */ -#define DMA_CCR2_PINC ((uint16_t)0x0040) /*!< Peripheral increment mode */ -#define DMA_CCR2_MINC ((uint16_t)0x0080) /*!< Memory increment mode */ - -#define DMA_CCR2_PSIZE ((uint16_t)0x0300) /*!< PSIZE[1:0] bits (Peripheral size) */ -#define DMA_CCR2_PSIZE_0 ((uint16_t)0x0100) /*!< Bit 0 */ -#define DMA_CCR2_PSIZE_1 ((uint16_t)0x0200) /*!< Bit 1 */ - -#define DMA_CCR2_MSIZE ((uint16_t)0x0C00) /*!< MSIZE[1:0] bits (Memory size) */ -#define DMA_CCR2_MSIZE_0 ((uint16_t)0x0400) /*!< Bit 0 */ -#define DMA_CCR2_MSIZE_1 ((uint16_t)0x0800) /*!< Bit 1 */ - -#define DMA_CCR2_PL ((uint16_t)0x3000) /*!< PL[1:0] bits (Channel Priority level) */ -#define DMA_CCR2_PL_0 ((uint16_t)0x1000) /*!< Bit 0 */ -#define DMA_CCR2_PL_1 ((uint16_t)0x2000) /*!< Bit 1 */ - -#define DMA_CCR2_MEM2MEM ((uint16_t)0x4000) /*!< Memory to memory mode */ - -/******************* Bit definition for DMA_CCR3 register *******************/ -#define DMA_CCR3_EN ((uint16_t)0x0001) /*!< Channel enable */ -#define DMA_CCR3_TCIE ((uint16_t)0x0002) /*!< Transfer complete interrupt enable */ -#define DMA_CCR3_HTIE ((uint16_t)0x0004) /*!< Half Transfer interrupt enable */ -#define DMA_CCR3_TEIE ((uint16_t)0x0008) /*!< Transfer error interrupt enable */ -#define DMA_CCR3_DIR ((uint16_t)0x0010) /*!< Data transfer direction */ -#define DMA_CCR3_CIRC ((uint16_t)0x0020) /*!< Circular mode */ -#define DMA_CCR3_PINC ((uint16_t)0x0040) /*!< Peripheral increment mode */ -#define DMA_CCR3_MINC ((uint16_t)0x0080) /*!< Memory increment mode */ - -#define DMA_CCR3_PSIZE ((uint16_t)0x0300) /*!< PSIZE[1:0] bits (Peripheral size) */ -#define DMA_CCR3_PSIZE_0 ((uint16_t)0x0100) /*!< Bit 0 */ -#define DMA_CCR3_PSIZE_1 ((uint16_t)0x0200) /*!< Bit 1 */ - -#define DMA_CCR3_MSIZE ((uint16_t)0x0C00) /*!< MSIZE[1:0] bits (Memory size) */ -#define DMA_CCR3_MSIZE_0 ((uint16_t)0x0400) /*!< Bit 0 */ -#define DMA_CCR3_MSIZE_1 ((uint16_t)0x0800) /*!< Bit 1 */ - -#define DMA_CCR3_PL ((uint16_t)0x3000) /*!< PL[1:0] bits (Channel Priority level) */ -#define DMA_CCR3_PL_0 ((uint16_t)0x1000) /*!< Bit 0 */ -#define DMA_CCR3_PL_1 ((uint16_t)0x2000) /*!< Bit 1 */ - -#define DMA_CCR3_MEM2MEM ((uint16_t)0x4000) /*!< Memory to memory mode */ - -/*!<****************** Bit definition for DMA_CCR4 register *******************/ -#define DMA_CCR4_EN ((uint16_t)0x0001) /*!
© COPYRIGHT 2010 STMicroelectronics
- ****************************************************************************** - */ - -/** @addtogroup CMSIS - * @{ - */ - -/** @addtogroup stm32f10x_system - * @{ - */ - -/** @addtogroup STM32F10x_System_Private_Includes - * @{ - */ - -#include "stm32f10x.h" - -/** - * @} - */ - -/** @addtogroup STM32F10x_System_Private_TypesDefinitions - * @{ - */ - -/** - * @} - */ - -/** @addtogroup STM32F10x_System_Private_Defines - * @{ - */ - -/*!< Uncomment the line corresponding to the desired System clock (SYSCLK) - frequency (after reset the HSI is used as SYSCLK source) - - IMPORTANT NOTE: - ============== - 1. After each device reset the HSI is used as System clock source. - - 2. Please make sure that the selected System clock doesn't exceed your device's - maximum frequency. - - 3. If none of the define below is enabled, the HSI is used as System clock - source. - - 4. The System clock configuration functions provided within this file assume that: - - For Low and Medium density Value line devices an external 8MHz crystal - is used to drive the System clock. - - For Low, Medium and High density devices an external 8MHz crystal is - used to drive the System clock. - - For Connectivity line devices an external 25MHz crystal is used to drive - the System clock. - If you are using different crystal you have to adapt those functions accordingly. - */ - -#if defined (STM32F10X_LD_VL) || (defined STM32F10X_MD_VL) -/* #define SYSCLK_FREQ_HSE HSE_Value */ - #define SYSCLK_FREQ_24MHz 24000000 -#else -/* #define SYSCLK_FREQ_HSE HSE_Value */ -/* #define SYSCLK_FREQ_24MHz 24000000 */ -/* #define SYSCLK_FREQ_36MHz 36000000 */ -/* #define SYSCLK_FREQ_48MHz 48000000 */ -/* #define SYSCLK_FREQ_56MHz 56000000 */ -#define SYSCLK_FREQ_72MHz 72000000 -#endif - -/*!< Uncomment the following line if you need to use external SRAM mounted - on STM3210E-EVAL board (STM32 High density devices) as data memory */ -#ifdef STM32F10X_HD -/* #define DATA_IN_ExtSRAM */ -#endif /* STM32F10X_HD */ - -/** - * @} - */ - -/** @addtogroup STM32F10x_System_Private_Macros - * @{ - */ - -/** - * @} - */ - -/** @addtogroup STM32F10x_System_Private_Variables - * @{ - */ - -/******************************************************************************* -* Clock Definitions -*******************************************************************************/ -#ifdef SYSCLK_FREQ_HSE - uint32_t SystemCoreClock = SYSCLK_FREQ_HSE; /*!< System Clock Frequency (Core Clock) */ -#elif defined SYSCLK_FREQ_24MHz - uint32_t SystemCoreClock = SYSCLK_FREQ_24MHz; /*!< System Clock Frequency (Core Clock) */ -#elif defined SYSCLK_FREQ_36MHz - uint32_t SystemCoreClock = SYSCLK_FREQ_36MHz; /*!< System Clock Frequency (Core Clock) */ -#elif defined SYSCLK_FREQ_48MHz - uint32_t SystemCoreClock = SYSCLK_FREQ_48MHz; /*!< System Clock Frequency (Core Clock) */ -#elif defined SYSCLK_FREQ_56MHz - uint32_t SystemCoreClock = SYSCLK_FREQ_56MHz; /*!< System Clock Frequency (Core Clock) */ -#elif defined SYSCLK_FREQ_72MHz - uint32_t SystemCoreClock = SYSCLK_FREQ_72MHz; /*!< System Clock Frequency (Core Clock) */ -#else /*!< HSI Selected as System Clock source */ - uint32_t SystemCoreClock = HSI_Value; /*!< System Clock Frequency (Core Clock) */ -#endif - -__I uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9}; -/** - * @} - */ - -/** @addtogroup STM32F10x_System_Private_FunctionPrototypes - * @{ - */ - -static void SetSysClock(void); - -#ifdef SYSCLK_FREQ_HSE - static void SetSysClockToHSE(void); -#elif defined SYSCLK_FREQ_24MHz - static void SetSysClockTo24(void); -#elif defined SYSCLK_FREQ_36MHz - static void SetSysClockTo36(void); -#elif defined SYSCLK_FREQ_48MHz - static void SetSysClockTo48(void); -#elif defined SYSCLK_FREQ_56MHz - static void SetSysClockTo56(void); -#elif defined SYSCLK_FREQ_72MHz - static void SetSysClockTo72(void); -#endif - -#ifdef DATA_IN_ExtSRAM - static void SystemInit_ExtMemCtl(void); -#endif /* DATA_IN_ExtSRAM */ - -/** - * @} - */ - -/** @addtogroup STM32F10x_System_Private_Functions - * @{ - */ - -/** - * @brief Setup the microcontroller system - * Initialize the Embedded Flash Interface, the PLL and update the - * SystemCoreClock variable. - * @note This function should be used only after reset. - * @param None - * @retval None - */ -void SystemInit (void) -{ - /* Reset the RCC clock configuration to the default reset state(for debug purpose) */ - /* Set HSION bit */ - RCC->CR |= (uint32_t)0x00000001; - - /* Reset SW, HPRE, PPRE1, PPRE2, ADCPRE and MCO bits */ -#ifndef STM32F10X_CL - RCC->CFGR &= (uint32_t)0xF8FF0000; -#else - RCC->CFGR &= (uint32_t)0xF0FF0000; -#endif /* STM32F10X_CL */ - - /* Reset HSEON, CSSON and PLLON bits */ - RCC->CR &= (uint32_t)0xFEF6FFFF; - - /* Reset HSEBYP bit */ - RCC->CR &= (uint32_t)0xFFFBFFFF; - - /* Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE/OTGFSPRE bits */ - RCC->CFGR &= (uint32_t)0xFF80FFFF; - -#ifdef STM32F10X_CL - /* Reset PLL2ON and PLL3ON bits */ - RCC->CR &= (uint32_t)0xEBFFFFFF; - - /* Disable all interrupts and clear pending bits */ - RCC->CIR = 0x00FF0000; - - /* Reset CFGR2 register */ - RCC->CFGR2 = 0x00000000; -#elif defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) - /* Disable all interrupts and clear pending bits */ - RCC->CIR = 0x009F0000; - - /* Reset CFGR2 register */ - RCC->CFGR2 = 0x00000000; -#else - /* Disable all interrupts and clear pending bits */ - RCC->CIR = 0x009F0000; -#endif /* STM32F10X_CL */ - - /* Configure the System clock frequency, HCLK, PCLK2 and PCLK1 prescalers */ - /* Configure the Flash Latency cycles and enable prefetch buffer */ - SetSysClock(); - -#ifdef STM32F10X_HD - #ifdef DATA_IN_ExtSRAM - SystemInit_ExtMemCtl(); - #endif /* DATA_IN_ExtSRAM */ -#endif /* STM32F10X_HD */ - -} - -/** - * @brief Update SystemCoreClock according to Clock Register Values - * @note None - * @param None - * @retval None - */ -void SystemCoreClockUpdate (void) -{ - uint32_t tmp = 0, pllmull = 0, pllsource = 0; - -#ifdef STM32F10X_CL - uint32_t prediv1source = 0, prediv1factor = 0, prediv2factor = 0, pll2mull = 0; -#endif /* STM32F10X_CL */ - -#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) - uint32_t prediv1factor = 0; -#endif /* STM32F10X_LD_VL or STM32F10X_MD_VL */ - - /* Get SYSCLK source -------------------------------------------------------*/ - tmp = RCC->CFGR & RCC_CFGR_SWS; - - switch (tmp) - { - case 0x00: /* HSI used as system clock */ - SystemCoreClock = HSI_Value; - break; - case 0x04: /* HSE used as system clock */ - SystemCoreClock = HSE_Value; - break; - case 0x08: /* PLL used as system clock */ - - /* Get PLL clock source and multiplication factor ----------------------*/ - pllmull = RCC->CFGR & RCC_CFGR_PLLMULL; - pllsource = RCC->CFGR & RCC_CFGR_PLLSRC; - -#ifndef STM32F10X_CL - pllmull = ( pllmull >> 18) + 2; - - if (pllsource == 0x00) - { - /* HSI oscillator clock divided by 2 selected as PLL clock entry */ - SystemCoreClock = (HSI_Value >> 1) * pllmull; - } - else - { - #if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) - prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1; - /* HSE oscillator clock selected as PREDIV1 clock entry */ - SystemCoreClock = (HSE_Value / prediv1factor) * pllmull; - #else - /* HSE selected as PLL clock entry */ - if ((RCC->CFGR & RCC_CFGR_PLLXTPRE) != (uint32_t)RESET) - {/* HSE oscillator clock divided by 2 */ - SystemCoreClock = (HSE_Value >> 1) * pllmull; - } - else - { - SystemCoreClock = HSE_Value * pllmull; - } - #endif - } -#else - pllmull = pllmull >> 18; - - if (pllmull != 0x0D) - { - pllmull += 2; - } - else - { /* PLL multiplication factor = PLL input clock * 6.5 */ - pllmull = 13 / 2; - } - - if (pllsource == 0x00) - { - /* HSI oscillator clock divided by 2 selected as PLL clock entry */ - SystemCoreClock = (HSI_Value >> 1) * pllmull; - } - else - {/* PREDIV1 selected as PLL clock entry */ - - /* Get PREDIV1 clock source and division factor */ - prediv1source = RCC->CFGR2 & RCC_CFGR2_PREDIV1SRC; - prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1; - - if (prediv1source == 0) - { - /* HSE oscillator clock selected as PREDIV1 clock entry */ - SystemCoreClock = (HSE_Value / prediv1factor) * pllmull; - } - else - {/* PLL2 clock selected as PREDIV1 clock entry */ - - /* Get PREDIV2 division factor and PLL2 multiplication factor */ - prediv2factor = ((RCC->CFGR2 & RCC_CFGR2_PREDIV2) >> 4) + 1; - pll2mull = ((RCC->CFGR2 & RCC_CFGR2_PLL2MUL) >> 8 ) + 2; - SystemCoreClock = (((HSE_Value / prediv2factor) * pll2mull) / prediv1factor) * pllmull; - } - } -#endif /* STM32F10X_CL */ - break; - - default: - SystemCoreClock = HSI_Value; - break; - } - - /* Compute HCLK clock frequency ----------------*/ - /* Get HCLK prescaler */ - tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)]; - /* HCLK clock frequency */ - SystemCoreClock >>= tmp; -} - -/** - * @brief Configures the System clock frequency, HCLK, PCLK2 and PCLK1 prescalers. - * @param None - * @retval None - */ -static void SetSysClock(void) -{ -#ifdef SYSCLK_FREQ_HSE - SetSysClockToHSE(); -#elif defined SYSCLK_FREQ_24MHz - SetSysClockTo24(); -#elif defined SYSCLK_FREQ_36MHz - SetSysClockTo36(); -#elif defined SYSCLK_FREQ_48MHz - SetSysClockTo48(); -#elif defined SYSCLK_FREQ_56MHz - SetSysClockTo56(); -#elif defined SYSCLK_FREQ_72MHz - SetSysClockTo72(); -#endif - - /* If none of the define above is enabled, the HSI is used as System clock - source (default after reset) */ -} - -/** - * @brief Setup the external memory controller. Called in startup_stm32f10x.s - * before jump to __main - * @param None - * @retval None - */ -#ifdef DATA_IN_ExtSRAM -/** - * @brief Setup the external memory controller. - * Called in startup_stm32f10x_xx.s/.c before jump to main. - * This function configures the external SRAM mounted on STM3210E-EVAL - * board (STM32 High density devices). This SRAM will be used as program - * data memory (including heap and stack). - * @param None - * @retval None - */ -void SystemInit_ExtMemCtl(void) -{ -/*!< FSMC Bank1 NOR/SRAM3 is used for the STM3210E-EVAL, if another Bank is - required, then adjust the Register Addresses */ - - /* Enable FSMC clock */ - RCC->AHBENR = 0x00000114; - - /* Enable GPIOD, GPIOE, GPIOF and GPIOG clocks */ - RCC->APB2ENR = 0x000001E0; - -/* --------------- SRAM Data lines, NOE and NWE configuration ---------------*/ -/*---------------- SRAM Address lines configuration -------------------------*/ -/*---------------- NOE and NWE configuration --------------------------------*/ -/*---------------- NE3 configuration ----------------------------------------*/ -/*---------------- NBL0, NBL1 configuration ---------------------------------*/ - - GPIOD->CRL = 0x44BB44BB; - GPIOD->CRH = 0xBBBBBBBB; - - GPIOE->CRL = 0xB44444BB; - GPIOE->CRH = 0xBBBBBBBB; - - GPIOF->CRL = 0x44BBBBBB; - GPIOF->CRH = 0xBBBB4444; - - GPIOG->CRL = 0x44BBBBBB; - GPIOG->CRH = 0x44444B44; - -/*---------------- FSMC Configuration ---------------------------------------*/ -/*---------------- Enable FSMC Bank1_SRAM Bank ------------------------------*/ - - FSMC_Bank1->BTCR[4] = 0x00001011; - FSMC_Bank1->BTCR[5] = 0x00000200; -} -#endif /* DATA_IN_ExtSRAM */ - -#ifdef SYSCLK_FREQ_HSE -/** - * @brief Selects HSE as System clock source and configure HCLK, PCLK2 - * and PCLK1 prescalers. - * @note This function should be used only after reset. - * @param None - * @retval None - */ -static void SetSysClockToHSE(void) -{ - __IO uint32_t StartUpCounter = 0, HSEStatus = 0; - - /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/ - /* Enable HSE */ - RCC->CR |= ((uint32_t)RCC_CR_HSEON); - - /* Wait till HSE is ready and if Time out is reached exit */ - do - { - HSEStatus = RCC->CR & RCC_CR_HSERDY; - StartUpCounter++; - } while((HSEStatus == 0) && (StartUpCounter != HSEStartUp_TimeOut)); - - if ((RCC->CR & RCC_CR_HSERDY) != RESET) - { - HSEStatus = (uint32_t)0x01; - } - else - { - HSEStatus = (uint32_t)0x00; - } - - if (HSEStatus == (uint32_t)0x01) - { - -#if !defined STM32F10X_LD_VL && !defined STM32F10X_MD_VL - /* Enable Prefetch Buffer */ - FLASH->ACR |= FLASH_ACR_PRFTBE; - - /* Flash 0 wait state */ - FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); - -#ifndef STM32F10X_CL - FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_0; -#else - if (HSE_Value <= 24000000) - { - FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_0; - } - else - { - FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_1; - } -#endif /* STM32F10X_CL */ -#endif - - /* HCLK = SYSCLK */ - RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1; - - /* PCLK2 = HCLK */ - RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1; - - /* PCLK1 = HCLK */ - RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV1; - - /* Select HSE as system clock source */ - RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); - RCC->CFGR |= (uint32_t)RCC_CFGR_SW_HSE; - - /* Wait till HSE is used as system clock source */ - while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x04) - { - } - } - else - { /* If HSE fails to start-up, the application will have wrong clock - configuration. User can add here some code to deal with this error */ - } -} -#elif defined SYSCLK_FREQ_24MHz -/** - * @brief Sets System clock frequency to 24MHz and configure HCLK, PCLK2 - * and PCLK1 prescalers. - * @note This function should be used only after reset. - * @param None - * @retval None - */ -static void SetSysClockTo24(void) -{ - __IO uint32_t StartUpCounter = 0, HSEStatus = 0; - - /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/ - /* Enable HSE */ - RCC->CR |= ((uint32_t)RCC_CR_HSEON); - - /* Wait till HSE is ready and if Time out is reached exit */ - do - { - HSEStatus = RCC->CR & RCC_CR_HSERDY; - StartUpCounter++; - } while((HSEStatus == 0) && (StartUpCounter != HSEStartUp_TimeOut)); - - if ((RCC->CR & RCC_CR_HSERDY) != RESET) - { - HSEStatus = (uint32_t)0x01; - } - else - { - HSEStatus = (uint32_t)0x00; - } - - if (HSEStatus == (uint32_t)0x01) - { -#if !defined STM32F10X_LD_VL && !defined STM32F10X_MD_VL - /* Enable Prefetch Buffer */ - FLASH->ACR |= FLASH_ACR_PRFTBE; - - /* Flash 0 wait state */ - FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); - FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_0; -#endif - - /* HCLK = SYSCLK */ - RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1; - - /* PCLK2 = HCLK */ - RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1; - - /* PCLK1 = HCLK */ - RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV1; - -#ifdef STM32F10X_CL - /* Configure PLLs ------------------------------------------------------*/ - /* PLL configuration: PLLCLK = PREDIV1 * 6 = 24 MHz */ - RCC->CFGR &= (uint32_t)~(RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLSRC | RCC_CFGR_PLLMULL); - RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLXTPRE_PREDIV1 | RCC_CFGR_PLLSRC_PREDIV1 | - RCC_CFGR_PLLMULL6); - - /* PLL2 configuration: PLL2CLK = (HSE / 5) * 8 = 40 MHz */ - /* PREDIV1 configuration: PREDIV1CLK = PLL2 / 10 = 4 MHz */ - RCC->CFGR2 &= (uint32_t)~(RCC_CFGR2_PREDIV2 | RCC_CFGR2_PLL2MUL | - RCC_CFGR2_PREDIV1 | RCC_CFGR2_PREDIV1SRC); - RCC->CFGR2 |= (uint32_t)(RCC_CFGR2_PREDIV2_DIV5 | RCC_CFGR2_PLL2MUL8 | - RCC_CFGR2_PREDIV1SRC_PLL2 | RCC_CFGR2_PREDIV1_DIV10); - - /* Enable PLL2 */ - RCC->CR |= RCC_CR_PLL2ON; - /* Wait till PLL2 is ready */ - while((RCC->CR & RCC_CR_PLL2RDY) == 0) - { - } -#elif defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) - /* PLL configuration: = (HSE / 2) * 6 = 24 MHz */ - RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLMULL)); - RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_PREDIV1 | RCC_CFGR_PLLXTPRE_PREDIV1_Div2 | RCC_CFGR_PLLMULL6); -#else - /* PLL configuration: = (HSE / 2) * 6 = 24 MHz */ - RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLMULL)); - RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSE | RCC_CFGR_PLLXTPRE_HSE_Div2 | RCC_CFGR_PLLMULL6); -#endif /* STM32F10X_CL */ - - /* Enable PLL */ - RCC->CR |= RCC_CR_PLLON; - - /* Wait till PLL is ready */ - while((RCC->CR & RCC_CR_PLLRDY) == 0) - { - } - - /* Select PLL as system clock source */ - RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); - RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; - - /* Wait till PLL is used as system clock source */ - while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08) - { - } - } - else - { /* If HSE fails to start-up, the application will have wrong clock - configuration. User can add here some code to deal with this error */ - } -} -#elif defined SYSCLK_FREQ_36MHz -/** - * @brief Sets System clock frequency to 36MHz and configure HCLK, PCLK2 - * and PCLK1 prescalers. - * @note This function should be used only after reset. - * @param None - * @retval None - */ -static void SetSysClockTo36(void) -{ - __IO uint32_t StartUpCounter = 0, HSEStatus = 0; - - /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/ - /* Enable HSE */ - RCC->CR |= ((uint32_t)RCC_CR_HSEON); - - /* Wait till HSE is ready and if Time out is reached exit */ - do - { - HSEStatus = RCC->CR & RCC_CR_HSERDY; - StartUpCounter++; - } while((HSEStatus == 0) && (StartUpCounter != HSEStartUp_TimeOut)); - - if ((RCC->CR & RCC_CR_HSERDY) != RESET) - { - HSEStatus = (uint32_t)0x01; - } - else - { - HSEStatus = (uint32_t)0x00; - } - - if (HSEStatus == (uint32_t)0x01) - { - /* Enable Prefetch Buffer */ - FLASH->ACR |= FLASH_ACR_PRFTBE; - - /* Flash 1 wait state */ - FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); - FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_1; - - /* HCLK = SYSCLK */ - RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1; - - /* PCLK2 = HCLK */ - RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1; - - /* PCLK1 = HCLK */ - RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV1; - -#ifdef STM32F10X_CL - /* Configure PLLs ------------------------------------------------------*/ - - /* PLL configuration: PLLCLK = PREDIV1 * 9 = 36 MHz */ - RCC->CFGR &= (uint32_t)~(RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLSRC | RCC_CFGR_PLLMULL); - RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLXTPRE_PREDIV1 | RCC_CFGR_PLLSRC_PREDIV1 | - RCC_CFGR_PLLMULL9); - - /*!< PLL2 configuration: PLL2CLK = (HSE / 5) * 8 = 40 MHz */ - /* PREDIV1 configuration: PREDIV1CLK = PLL2 / 10 = 4 MHz */ - - RCC->CFGR2 &= (uint32_t)~(RCC_CFGR2_PREDIV2 | RCC_CFGR2_PLL2MUL | - RCC_CFGR2_PREDIV1 | RCC_CFGR2_PREDIV1SRC); - RCC->CFGR2 |= (uint32_t)(RCC_CFGR2_PREDIV2_DIV5 | RCC_CFGR2_PLL2MUL8 | - RCC_CFGR2_PREDIV1SRC_PLL2 | RCC_CFGR2_PREDIV1_DIV10); - - /* Enable PLL2 */ - RCC->CR |= RCC_CR_PLL2ON; - /* Wait till PLL2 is ready */ - while((RCC->CR & RCC_CR_PLL2RDY) == 0) - { - } - -#else - /* PLL configuration: PLLCLK = (HSE / 2) * 9 = 36 MHz */ - RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLMULL)); - RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSE | RCC_CFGR_PLLXTPRE_HSE_Div2 | RCC_CFGR_PLLMULL9); -#endif /* STM32F10X_CL */ - - /* Enable PLL */ - RCC->CR |= RCC_CR_PLLON; - - /* Wait till PLL is ready */ - while((RCC->CR & RCC_CR_PLLRDY) == 0) - { - } - - /* Select PLL as system clock source */ - RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); - RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; - - /* Wait till PLL is used as system clock source */ - while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08) - { - } - } - else - { /* If HSE fails to start-up, the application will have wrong clock - configuration. User can add here some code to deal with this error */ - } -} -#elif defined SYSCLK_FREQ_48MHz -/** - * @brief Sets System clock frequency to 48MHz and configure HCLK, PCLK2 - * and PCLK1 prescalers. - * @note This function should be used only after reset. - * @param None - * @retval None - */ -static void SetSysClockTo48(void) -{ - __IO uint32_t StartUpCounter = 0, HSEStatus = 0; - - /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/ - /* Enable HSE */ - RCC->CR |= ((uint32_t)RCC_CR_HSEON); - - /* Wait till HSE is ready and if Time out is reached exit */ - do - { - HSEStatus = RCC->CR & RCC_CR_HSERDY; - StartUpCounter++; - } while((HSEStatus == 0) && (StartUpCounter != HSEStartUp_TimeOut)); - - if ((RCC->CR & RCC_CR_HSERDY) != RESET) - { - HSEStatus = (uint32_t)0x01; - } - else - { - HSEStatus = (uint32_t)0x00; - } - - if (HSEStatus == (uint32_t)0x01) - { - /* Enable Prefetch Buffer */ - FLASH->ACR |= FLASH_ACR_PRFTBE; - - /* Flash 1 wait state */ - FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); - FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_1; - - /* HCLK = SYSCLK */ - RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1; - - /* PCLK2 = HCLK */ - RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1; - - /* PCLK1 = HCLK */ - RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV2; - -#ifdef STM32F10X_CL - /* Configure PLLs ------------------------------------------------------*/ - /* PLL2 configuration: PLL2CLK = (HSE / 5) * 8 = 40 MHz */ - /* PREDIV1 configuration: PREDIV1CLK = PLL2 / 5 = 8 MHz */ - - RCC->CFGR2 &= (uint32_t)~(RCC_CFGR2_PREDIV2 | RCC_CFGR2_PLL2MUL | - RCC_CFGR2_PREDIV1 | RCC_CFGR2_PREDIV1SRC); - RCC->CFGR2 |= (uint32_t)(RCC_CFGR2_PREDIV2_DIV5 | RCC_CFGR2_PLL2MUL8 | - RCC_CFGR2_PREDIV1SRC_PLL2 | RCC_CFGR2_PREDIV1_DIV5); - - /* Enable PLL2 */ - RCC->CR |= RCC_CR_PLL2ON; - /* Wait till PLL2 is ready */ - while((RCC->CR & RCC_CR_PLL2RDY) == 0) - { - } - - - /* PLL configuration: PLLCLK = PREDIV1 * 6 = 48 MHz */ - RCC->CFGR &= (uint32_t)~(RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLSRC | RCC_CFGR_PLLMULL); - RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLXTPRE_PREDIV1 | RCC_CFGR_PLLSRC_PREDIV1 | - RCC_CFGR_PLLMULL6); -#else - /* PLL configuration: PLLCLK = HSE * 6 = 48 MHz */ - RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLMULL)); - RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSE | RCC_CFGR_PLLMULL6); -#endif /* STM32F10X_CL */ - - /* Enable PLL */ - RCC->CR |= RCC_CR_PLLON; - - /* Wait till PLL is ready */ - while((RCC->CR & RCC_CR_PLLRDY) == 0) - { - } - - /* Select PLL as system clock source */ - RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); - RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; - - /* Wait till PLL is used as system clock source */ - while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08) - { - } - } - else - { /* If HSE fails to start-up, the application will have wrong clock - configuration. User can add here some code to deal with this error */ - } -} - -#elif defined SYSCLK_FREQ_56MHz -/** - * @brief Sets System clock frequency to 56MHz and configure HCLK, PCLK2 - * and PCLK1 prescalers. - * @note This function should be used only after reset. - * @param None - * @retval None - */ -static void SetSysClockTo56(void) -{ - __IO uint32_t StartUpCounter = 0, HSEStatus = 0; - - /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/ - /* Enable HSE */ - RCC->CR |= ((uint32_t)RCC_CR_HSEON); - - /* Wait till HSE is ready and if Time out is reached exit */ - do - { - HSEStatus = RCC->CR & RCC_CR_HSERDY; - StartUpCounter++; - } while((HSEStatus == 0) && (StartUpCounter != HSEStartUp_TimeOut)); - - if ((RCC->CR & RCC_CR_HSERDY) != RESET) - { - HSEStatus = (uint32_t)0x01; - } - else - { - HSEStatus = (uint32_t)0x00; - } - - if (HSEStatus == (uint32_t)0x01) - { - /* Enable Prefetch Buffer */ - FLASH->ACR |= FLASH_ACR_PRFTBE; - - /* Flash 2 wait state */ - FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); - FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_2; - - /* HCLK = SYSCLK */ - RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1; - - /* PCLK2 = HCLK */ - RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1; - - /* PCLK1 = HCLK */ - RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV2; - -#ifdef STM32F10X_CL - /* Configure PLLs ------------------------------------------------------*/ - /* PLL2 configuration: PLL2CLK = (HSE / 5) * 8 = 40 MHz */ - /* PREDIV1 configuration: PREDIV1CLK = PLL2 / 5 = 8 MHz */ - - RCC->CFGR2 &= (uint32_t)~(RCC_CFGR2_PREDIV2 | RCC_CFGR2_PLL2MUL | - RCC_CFGR2_PREDIV1 | RCC_CFGR2_PREDIV1SRC); - RCC->CFGR2 |= (uint32_t)(RCC_CFGR2_PREDIV2_DIV5 | RCC_CFGR2_PLL2MUL8 | - RCC_CFGR2_PREDIV1SRC_PLL2 | RCC_CFGR2_PREDIV1_DIV5); - - /* Enable PLL2 */ - RCC->CR |= RCC_CR_PLL2ON; - /* Wait till PLL2 is ready */ - while((RCC->CR & RCC_CR_PLL2RDY) == 0) - { - } - - - /* PLL configuration: PLLCLK = PREDIV1 * 7 = 56 MHz */ - RCC->CFGR &= (uint32_t)~(RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLSRC | RCC_CFGR_PLLMULL); - RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLXTPRE_PREDIV1 | RCC_CFGR_PLLSRC_PREDIV1 | - RCC_CFGR_PLLMULL7); -#else - /* PLL configuration: PLLCLK = HSE * 7 = 56 MHz */ - RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLMULL)); - RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSE | RCC_CFGR_PLLMULL7); - -#endif /* STM32F10X_CL */ - - /* Enable PLL */ - RCC->CR |= RCC_CR_PLLON; - - /* Wait till PLL is ready */ - while((RCC->CR & RCC_CR_PLLRDY) == 0) - { - } - - /* Select PLL as system clock source */ - RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); - RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; - - /* Wait till PLL is used as system clock source */ - while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08) - { - } - } - else - { /* If HSE fails to start-up, the application will have wrong clock - configuration. User can add here some code to deal with this error */ - } -} - -#elif defined SYSCLK_FREQ_72MHz -/** - * @brief Sets System clock frequency to 72MHz and configure HCLK, PCLK2 - * and PCLK1 prescalers. - * @note This function should be used only after reset. - * @param None - * @retval None - */ -static void SetSysClockTo72(void) -{ - __IO uint32_t StartUpCounter = 0, HSEStatus = 0; - - /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/ - /* Enable HSE */ - RCC->CR |= ((uint32_t)RCC_CR_HSEON); - - /* Wait till HSE is ready and if Time out is reached exit */ - do - { - HSEStatus = RCC->CR & RCC_CR_HSERDY; - StartUpCounter++; - } while((HSEStatus == 0) && (StartUpCounter != HSEStartUp_TimeOut)); - - if ((RCC->CR & RCC_CR_HSERDY) != RESET) - { - HSEStatus = (uint32_t)0x01; - } - else - { - HSEStatus = (uint32_t)0x00; - } - - if (HSEStatus == (uint32_t)0x01) - { - /* Enable Prefetch Buffer */ - FLASH->ACR |= FLASH_ACR_PRFTBE; - - /* Flash 2 wait state */ - FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); - FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_2; - - - /* HCLK = SYSCLK */ - RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1; - - /* PCLK2 = HCLK */ - RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1; - - /* PCLK1 = HCLK */ - RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV2; - -#ifdef STM32F10X_CL - /* Configure PLLs ------------------------------------------------------*/ - /* PLL2 configuration: PLL2CLK = (HSE / 5) * 8 = 40 MHz */ - /* PREDIV1 configuration: PREDIV1CLK = PLL2 / 5 = 8 MHz */ - - RCC->CFGR2 &= (uint32_t)~(RCC_CFGR2_PREDIV2 | RCC_CFGR2_PLL2MUL | - RCC_CFGR2_PREDIV1 | RCC_CFGR2_PREDIV1SRC); - RCC->CFGR2 |= (uint32_t)(RCC_CFGR2_PREDIV2_DIV5 | RCC_CFGR2_PLL2MUL8 | - RCC_CFGR2_PREDIV1SRC_PLL2 | RCC_CFGR2_PREDIV1_DIV5); - - /* Enable PLL2 */ - RCC->CR |= RCC_CR_PLL2ON; - /* Wait till PLL2 is ready */ - while((RCC->CR & RCC_CR_PLL2RDY) == 0) - { - } - - - /* PLL configuration: PLLCLK = PREDIV1 * 9 = 72 MHz */ - RCC->CFGR &= (uint32_t)~(RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLSRC | RCC_CFGR_PLLMULL); - RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLXTPRE_PREDIV1 | RCC_CFGR_PLLSRC_PREDIV1 | - RCC_CFGR_PLLMULL9); -#else - /* PLL configuration: PLLCLK = HSE * 9 = 72 MHz */ - RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | - RCC_CFGR_PLLMULL)); - RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSE | RCC_CFGR_PLLMULL9); -#endif /* STM32F10X_CL */ - - /* Enable PLL */ - RCC->CR |= RCC_CR_PLLON; - - /* Wait till PLL is ready */ - while((RCC->CR & RCC_CR_PLLRDY) == 0) - { - } - - /* Select PLL as system clock source */ - RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); - RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; - - /* Wait till PLL is used as system clock source */ - while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08) - { - } - } - else - { /* If HSE fails to start-up, the application will have wrong clock - configuration. User can add here some code to deal with this error */ - } -} -#endif - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ -/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/Libraries/CMSIS/CM3/DeviceSupport/ST/STM32F10x/system_stm32f10x.h b/bsp/stm32_radio/Libraries/CMSIS/CM3/DeviceSupport/ST/STM32F10x/system_stm32f10x.h deleted file mode 100644 index 8bbd2cb1ff..0000000000 --- a/bsp/stm32_radio/Libraries/CMSIS/CM3/DeviceSupport/ST/STM32F10x/system_stm32f10x.h +++ /dev/null @@ -1,97 +0,0 @@ -/** - ****************************************************************************** - * @file system_stm32f10x.h - * @author MCD Application Team - * @version V3.2.0 - * @date 03/01/2010 - * @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Header File. - ****************************************************************************** - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2010 STMicroelectronics

- ****************************************************************************** - */ - -/** @addtogroup CMSIS - * @{ - */ - -/** @addtogroup stm32f10x_system - * @{ - */ - -/** - * @brief Define to prevent recursive inclusion - */ -#ifndef __SYSTEM_STM32F10X_H -#define __SYSTEM_STM32F10X_H - -#ifdef __cplusplus - extern "C" { -#endif - -/** @addtogroup STM32F10x_System_Includes - * @{ - */ - -/** - * @} - */ - - -/** @addtogroup STM32F10x_System_Exported_types - * @{ - */ - -extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */ - -/** - * @} - */ - -/** @addtogroup STM32F10x_System_Exported_Constants - * @{ - */ - -/** - * @} - */ - -/** @addtogroup STM32F10x_System_Exported_Macros - * @{ - */ - -/** - * @} - */ - -/** @addtogroup STM32F10x_System_Exported_Functions - * @{ - */ - -extern void SystemInit(void); -extern void SystemCoreClockUpdate(void); -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /*__SYSTEM_STM32F10X_H */ - -/** - * @} - */ - -/** - * @} - */ -/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/Libraries/CMSIS/CMSIS debug support.htm b/bsp/stm32_radio/Libraries/CMSIS/CMSIS debug support.htm deleted file mode 100644 index efda685be6..0000000000 --- a/bsp/stm32_radio/Libraries/CMSIS/CMSIS debug support.htm +++ /dev/null @@ -1,243 +0,0 @@ - - - -CMSIS Debug Support - - - - - - - - -

CMSIS Debug Support

- -
- -

Cortex-M3 ITM Debug Access

-

- The Cortex-M3 incorporates the Instrumented Trace Macrocell (ITM) that provides together with - the Serial Viewer Output trace capabilities for the microcontroller system. The ITM has - 32 communication channels which are able to transmit 32 / 16 / 8 bit values; two ITM - communication channels are used by CMSIS to output the following information: -

-
    -
  • ITM Channel 0: used for printf-style output via the debug interface.
    • -
  • ITM Channel 31: is reserved for RTOS kernel awareness debugging.
    • -
- -

Debug IN / OUT functions

-

CMSIS provides following debug functions:

-
    -
  • ITM_SendChar (uses ITM channel 0)
    • -
  • ITM_ReceiveChar (uses global variable)
    • -
  • ITM_CheckChar (uses global variable)
    • -
- -

ITM_SendChar

-

- ITM_SendChar is used to transmit a character over ITM channel 0 from - the microcontroller system to the debug system.
- Only a 8 bit value is transmitted. -

-
-static __INLINE uint32_t ITM_SendChar (uint32_t ch)
-{
-  /* check if debugger connected and ITM channel enabled for tracing */
-  if ((CoreDebug->DEMCR & CoreDebug_DEMCR_TRCENA)  &&
-      (ITM->TCR & ITM_TCR_ITMENA)                  &&
-      (ITM->TER & (1UL << 0))  ) 
-  {
-    while (ITM->PORT[0].u32 == 0);
-    ITM->PORT[0].u8 = (uint8_t)ch;
-  }  
-  return (ch);
-}
- -

ITM_ReceiveChar

-

- ITM communication channel is only capable for OUT direction. For IN direction - a globel variable is used. A simple mechansim detects if a character is received. - The project to test need to be build with debug information. -

- -

- The globale variable ITM_RxBuffer is used to transmit a 8 bit value from debug system - to microcontroller system. ITM_RxBuffer is 32 bit wide to enshure a proper handshake. -

-
-extern volatile int ITM_RxBuffer;                    /* variable to receive characters                             */
-
-

- A dedicated bit pattern is used to determin if ITM_RxBuffer is empty - or contains a valid value. -

-
-#define             ITM_RXBUFFER_EMPTY    0x5AA55AA5 /* value identifying ITM_RxBuffer is ready for next character */
-
-

- ITM_ReceiveChar is used to receive a 8 bit value from the debug system. The function is nonblocking. - It returns the received character or '-1' if no character was available. -

-
-static __INLINE int ITM_ReceiveChar (void) {
-  int ch = -1;                               /* no character available */
-
-  if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY) {
-    ch = ITM_RxBuffer;
-    ITM_RxBuffer = ITM_RXBUFFER_EMPTY;       /* ready for next character */
-  }
-  
-  return (ch); 
-}
-
- -

ITM_CheckChar

-

- ITM_CheckChar is used to check if a character is received. -

-
-static __INLINE int ITM_CheckChar (void) {
-
-  if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY) {
-    return (0);                                 /* no character available */
-  } else {
-    return (1);                                 /*    character available */
-  }
-}
- - -

ITM Debug Support in uVision

-

- uVision uses in a debug session the Debug (printf) Viewer window to - display the debug data. -

-

Direction microcontroller system -> uVision:

-
    -
  • - Characters received via ITM communication channel 0 are written in a printf style - to Debug (printf) Viewer window. -
    • -
- -

Direction uVision -> microcontroller system:

-
    -
  • Check if ITM_RxBuffer variable is available (only performed once).
    • -
  • Read character from Debug (printf) Viewer window.
    • -
  • If ITM_RxBuffer empty write character to ITM_RxBuffer.
    • -
- -

Note

-
    -

  • Current solution does not use a buffer machanism for trasmitting the characters.

    -
    • -
- -

RTX Kernel awareness in uVision

-

- uVision / RTX are using a simple and efficient solution for RTX Kernel awareness. - No format overhead is necessary.
- uVsion debugger decodes the RTX events via the 32 / 16 / 8 bit ITM write access - to ITM communication channel 31. -

- -

Following RTX events are traced:

-
    -
  • Task Create / Delete event -
      -
    1. 32 bit access. Task start address is transmitted
      2. -
    2. 16 bit access. Task ID and Create/Delete flag are transmitted
      - High byte holds Create/Delete flag, Low byte holds TASK ID. -
      3. -
    -
    • -
  • Task switch event -
      -
    1. 8 bit access. Task ID of current task is transmitted
      2. -
    -
    • -
- -

Note

-
    -

  • Other RTOS information could be retrieved via memory read access in a polling mode manner.

    -
    • -
- - -

 

- -
- -

Copyright © KEIL - An ARM Company.
-All rights reserved.
-Visit our web site at www.keil.com. -

- - - - \ No newline at end of file diff --git a/bsp/stm32_radio/Libraries/CMSIS/CMSIS_changes.htm b/bsp/stm32_radio/Libraries/CMSIS/CMSIS_changes.htm deleted file mode 100644 index 162ffcc9dc..0000000000 --- a/bsp/stm32_radio/Libraries/CMSIS/CMSIS_changes.htm +++ /dev/null @@ -1,320 +0,0 @@ - - - -CMSIS Changes - - - - - - - - -

Changes to CMSIS version V1.20

- -
- -

1. Removed CMSIS Middelware packages

-

- CMSIS Middleware is on hold from ARM side until a agreement between all CMSIS partners is found. -

- -

2. SystemFrequency renamed to SystemCoreClock

-

- The variable name SystemCoreClock is more precise than SystemFrequency - because the variable holds the clock value at which the core is running. -

- -

3. Changed startup concept

-

- The old startup concept (calling SystemInit_ExtMemCtl from startup file and calling SystemInit - from main) has the weakness that it does not work for controllers which need a already - configuerd clock system to configure the external memory controller. -

- -

Changed startup concept

-
    -
  • - SystemInit() is called from startup file before premain. -
    • -
  • - SystemInit() configures the clock system and also configures - an existing external memory controller. -
    • -
  • - SystemInit() must not use global variables. -
    • -
  • - SystemCoreClock is initialized with a correct predefined value. -
    • -
  • - Additional function void SystemCoreClockUpdate (void) is provided.
    - SystemCoreClockUpdate() updates the variable SystemCoreClock - and must be called whenever the core clock is changed.
    - SystemCoreClockUpdate() evaluates the clock register settings and calculates - the current core clock. -
    • -
- - -

4. Advanced Debug Functions

-

- ITM communication channel is only capable for OUT direction. To allow also communication for - IN direction a simple concept is provided. -

-
    -
  • - Global variable volatile int ITM_RxBuffer used for IN data. -
    • -
  • - Function int ITM_CheckChar (void) checks if a new character is available. -
    • -
  • - Function int ITM_ReceiveChar (void) retrieves the new character. -
    • -
- -

- For detailed explanation see file CMSIS debug support.htm. -

- - -

5. Core Register Bit Definitions

-

- Files core_cm3.h and core_cm0.h contain now bit definitions for Core Registers. The name for the - defines correspond with the Cortex-M Technical Reference Manual. -

-

- e.g. SysTick structure with bit definitions -

-
-/** @addtogroup CMSIS_CM3_SysTick CMSIS CM3 SysTick
-  memory mapped structure for SysTick
-  @{
- */
-typedef struct
-{
-  __IO uint32_t CTRL;                         /*!< Offset: 0x00  SysTick Control and Status Register */
-  __IO uint32_t LOAD;                         /*!< Offset: 0x04  SysTick Reload Value Register       */
-  __IO uint32_t VAL;                          /*!< Offset: 0x08  SysTick Current Value Register      */
-  __I  uint32_t CALIB;                        /*!< Offset: 0x0C  SysTick Calibration Register        */
-} SysTick_Type;
-
-/* SysTick Control / Status Register Definitions */
-#define SysTick_CTRL_COUNTFLAG_Pos         16                                             /*!< SysTick CTRL: COUNTFLAG Position */
-#define SysTick_CTRL_COUNTFLAG_Msk         (1ul << SysTick_CTRL_COUNTFLAG_Pos)            /*!< SysTick CTRL: COUNTFLAG Mask */
-
-#define SysTick_CTRL_CLKSOURCE_Pos          2                                             /*!< SysTick CTRL: CLKSOURCE Position */
-#define SysTick_CTRL_CLKSOURCE_Msk         (1ul << SysTick_CTRL_CLKSOURCE_Pos)            /*!< SysTick CTRL: CLKSOURCE Mask */
-
-#define SysTick_CTRL_TICKINT_Pos            1                                             /*!< SysTick CTRL: TICKINT Position */
-#define SysTick_CTRL_TICKINT_Msk           (1ul << SysTick_CTRL_TICKINT_Pos)              /*!< SysTick CTRL: TICKINT Mask */
-
-#define SysTick_CTRL_ENABLE_Pos             0                                             /*!< SysTick CTRL: ENABLE Position */
-#define SysTick_CTRL_ENABLE_Msk            (1ul << SysTick_CTRL_ENABLE_Pos)               /*!< SysTick CTRL: ENABLE Mask */
-
-/* SysTick Reload Register Definitions */
-#define SysTick_LOAD_RELOAD_Pos             0                                             /*!< SysTick LOAD: RELOAD Position */
-#define SysTick_LOAD_RELOAD_Msk            (0xFFFFFFul << SysTick_LOAD_RELOAD_Pos)        /*!< SysTick LOAD: RELOAD Mask */
-
-/* SysTick Current Register Definitions */
-#define SysTick_VAL_CURRENT_Pos             0                                             /*!< SysTick VAL: CURRENT Position */
-#define SysTick_VAL_CURRENT_Msk            (0xFFFFFFul << SysTick_VAL_CURRENT_Pos)        /*!< SysTick VAL: CURRENT Mask */
-
-/* SysTick Calibration Register Definitions */
-#define SysTick_CALIB_NOREF_Pos            31                                             /*!< SysTick CALIB: NOREF Position */
-#define SysTick_CALIB_NOREF_Msk            (1ul << SysTick_CALIB_NOREF_Pos)               /*!< SysTick CALIB: NOREF Mask */
-
-#define SysTick_CALIB_SKEW_Pos             30                                             /*!< SysTick CALIB: SKEW Position */
-#define SysTick_CALIB_SKEW_Msk             (1ul << SysTick_CALIB_SKEW_Pos)                /*!< SysTick CALIB: SKEW Mask */
-
-#define SysTick_CALIB_TENMS_Pos             0                                             /*!< SysTick CALIB: TENMS Position */
-#define SysTick_CALIB_TENMS_Msk            (0xFFFFFFul << SysTick_VAL_CURRENT_Pos)        /*!< SysTick CALIB: TENMS Mask */
-/*@}*/ /* end of group CMSIS_CM3_SysTick */
- -

7. DoxyGen Tags

-

- DoxyGen tags in files core_cm3.[c,h] and core_cm0.[c,h] are reworked to create proper documentation - using DoxyGen. -

- -

8. Folder Structure

-

- The folder structure is changed to differentiate the single support packages. -

- -
    -
  • CM0
    • -
  • CM3 -
      -
    • CoreSupport
      • -
    • DeviceSupport
      • -
        -
      • Vendor -
          -
        • Device -
            -
          • Startup -
              -
            • Toolchain
              • -
            • Toolchain
              • -
            • ...
              • -
            -
            • -
          -
          • -
        • Device
          • -
        • ...
          • -
        -
        • -
      • Vendor
        • -
      • ...
        • -
      - -
    • Example -
        -
      • Toolchain -
          -
        • Device
          • -
        • Device
          • -
        • ...
          • -
        -
        • -
      • Toolchain
        • -
      • ...
        • -
      -
      • -
    -
    • - -
  • Documentation
    • -
- -

9. Open Points

-

- Following points need to be clarified and solved: -

-
    -
  • -

    - Equivalent C and Assembler startup files. -

    -

    - Is there a need for having C startup files although assembler startup files are - very efficient and do not need to be changed? -

    -

    • -
  • -

    - Placing of HEAP in external RAM. -

    -

    - It must be possible to place HEAP in external RAM if the device supports an - external memory controller. -

    -
    • -
  • -

    - Placing of STACK /HEAP. -

    -

    - STACK should always be placed at the end of internal RAM. -

    -

    - If HEAP is placed in internal RAM than it should be placed after RW ZI section. -

    -
    • -
  • -

    - Removing core_cm3.c and core_cm0.c. -

    -

    - On a long term the functions in core_cm3.c and core_cm0.c must be replaced with - appropriate compiler intrinsics. -

    -
    • -
- - -

10. Limitations

-

- The following limitations are not covered with the current CMSIS version: -

-
    -
  • - No C startup files for ARM toolchain are provided. -
    • -
  • - No C startup files for GNU toolchain are provided. -
    • -
  • - No C startup files for IAR toolchain are provided. -
    • -
  • - No Tasking projects are provided yet. -
    • -
diff --git a/bsp/stm32_radio/Libraries/CMSIS/Documentation/CMSIS_Core.htm b/bsp/stm32_radio/Libraries/CMSIS/Documentation/CMSIS_Core.htm deleted file mode 100644 index 6fd131e125..0000000000 --- a/bsp/stm32_radio/Libraries/CMSIS/Documentation/CMSIS_Core.htm +++ /dev/null @@ -1,1337 +0,0 @@ - - - - CMSIS: Cortex Microcontroller Software Interface Standard - - - -

Cortex Microcontroller Software Interface Standard

- -

This file describes the Cortex Microcontroller Software Interface Standard (CMSIS).

-

Version: 1.30 - 30. October 2009

- -

Information in this file, the accompany manuals, and software is
- Copyright © ARM Ltd.
All rights reserved. -

- -
- -

Revision History

-
    -
  • Version 1.00: initial release.
    • -
  • Version 1.01: added __LDREXx, __STREXx, and __CLREX.
    • -
  • Version 1.02: added Cortex-M0.
    • -
  • Version 1.10: second review.
    • -
  • Version 1.20: third review.
    • -
  • Version 1.30 PRE-RELEASE: reworked Startup Concept, additional Debug Functionality.
    • -
  • Version 1.30 2nd PRE-RELEASE: changed folder structure, added doxyGen comments, added Bit definitions.
    • -
  • Version 1.30: updated Device Support Packages.
    • -
- -
- -

Contents

- -
    -
  1. About
    2. -
  2. Coding Rules and Conventions
    3. -
  3. CMSIS Files
    4. -
  4. Core Peripheral Access Layer
    5. -
  5. CMSIS Example
    6. -
- -

About

- -

- The Cortex Microcontroller Software Interface Standard (CMSIS) answers the challenges - that are faced when software components are deployed to physical microcontroller devices based on a - Cortex-M0 or Cortex-M3 processor. The CMSIS will be also expanded to future Cortex-M - processor cores (the term Cortex-M is used to indicate that). The CMSIS is defined in close co-operation - with various silicon and software vendors and provides a common approach to interface to peripherals, - real-time operating systems, and middleware components. -

- -

ARM provides as part of the CMSIS the following software layers that are -available for various compiler implementations:

-
    -
  • Core Peripheral Access Layer: contains name definitions, - address definitions and helper functions to - access core registers and peripherals. It defines also a device - independent interface for RTOS Kernels that includes debug channel - definitions.
    • -
- -

These software layers are expanded by Silicon partners with:

-
    -
  • Device Peripheral Access Layer: provides definitions - for all device peripherals
    • -
  • Access Functions for Peripherals (optional): provides - additional helper functions for peripherals
    • -
- -

CMSIS defines for a Cortex-M Microcontroller System:

-
    -
  • A common way to access peripheral registers - and a common way to define exception vectors.
    • -
  • The register names of the Core - Peripherals and the names of the Core - Exception Vectors.
    • -
  • An device independent interface for RTOS Kernels including a debug - channel.
    • -
- -

- By using CMSIS compliant software components, the user can easier re-use template code. - CMSIS is intended to enable the combination of software components from multiple middleware vendors. -

- -

Coding Rules and Conventions

- -

- The following section describes the coding rules and conventions used in the CMSIS - implementation. It contains also information about data types and version number information. -

- -

Essentials

-
    -
  • The CMSIS C code conforms to MISRA 2004 rules. In case of MISRA violations, - there are disable and enable sequences for PC-LINT inserted.
    • -
  • ANSI standard data types defined in the ANSI C header file - <stdint.h> are used.
    • -
  • #define constants that include expressions must be enclosed by - parenthesis.
    • -
  • Variables and parameters have a complete data type.
    • -
  • All functions in the Core Peripheral Access Layer are - re-entrant.
    • -
  • The Core Peripheral Access Layer has no blocking code - (which means that wait/query loops are done at other software layers).
    • -
  • For each exception/interrupt there is definition for: -
      -
    • an exception/interrupt handler with the postfix _Handler - (for exceptions) or _IRQHandler (for interrupts).
      • -
    • a default exception/interrupt handler (weak definition) that contains an endless loop.
      • -
    • a #define of the interrupt number with the postfix _IRQn.
      • -
    • -
- -

Recommendations

- -

The CMSIS recommends the following conventions for identifiers.

-
    -
  • CAPITAL names to identify Core Registers, Peripheral Registers, and CPU Instructions.
    • -
  • CamelCase names to identify peripherals access functions and interrupts.
    • -
  • PERIPHERAL_ prefix to identify functions that belong to specify peripherals.
    • -
  • Doxygen comments for all functions are included as described under Function Comments below.
    • -
- -Comments - -
    -
  • Comments use the ANSI C90 style (/* comment */) or C++ style - (// comment). It is assumed that the programming tools support today - consistently the C++ comment style.
    • -
  • Function Comments provide for each function the following information: -
      -
    • one-line brief function overview.
      • -
    • detailed parameter explanation.
      • -
    • detailed information about return values.
      • -
    • detailed description of the actual function.
      • -
    -

    Doxygen Example:

    - 
    -/** 
- * @brief  Enable Interrupt in NVIC Interrupt Controller
- * @param  IRQn  interrupt number that specifies the interrupt
- * @return none.
- * Enable the specified interrupt in the NVIC Interrupt Controller.
- * Other settings of the interrupt such as priority are not affected.
- */
    -
    • -
- -

Data Types and IO Type Qualifiers

- -

- The Cortex-M HAL uses the standard types from the standard ANSI C header file - <stdint.h>. IO Type Qualifiers are used to specify the access - to peripheral variables. IO Type Qualifiers are indented to be used for automatic generation of - debug information of peripheral registers. -

- - - - - - - - - - - - - - - - - - - - - - - - -
IO Type Qualifier#defineDescription
__Ivolatile constRead access only
__OvolatileWrite access only
__IOvolatileRead and write access
- -

CMSIS Version Number

-

- File core_cm3.h contains the version number of the CMSIS with the following define: -

- -
-#define __CM3_CMSIS_VERSION_MAIN  (0x01)      /* [31:16] main version       */
-#define __CM3_CMSIS_VERSION_SUB   (0x30)      /* [15:0]  sub version        */
-#define __CM3_CMSIS_VERSION       ((__CM3_CMSIS_VERSION_MAIN << 16) | __CM3_CMSIS_VERSION_SUB)
- -

- File core_cm0.h contains the version number of the CMSIS with the following define: -

- -
-#define __CM0_CMSIS_VERSION_MAIN  (0x01)      /* [31:16] main version       */
-#define __CM0_CMSIS_VERSION_SUB   (0x30)      /* [15:0]  sub version        */
-#define __CM0_CMSIS_VERSION       ((__CM0_CMSIS_VERSION_MAIN << 16) | __CM0_CMSIS_VERSION_SUB)
- - -

CMSIS Cortex Core

-

- File core_cm3.h contains the type of the CMSIS Cortex-M with the following define: -

- -
-#define __CORTEX_M                (0x03)
- -

- File core_cm0.h contains the type of the CMSIS Cortex-M with the following define: -

- -
-#define __CORTEX_M                (0x00)
- - -

CMSIS Files

-

- This section describes the Files provided in context with the CMSIS to access the Cortex-M - hardware and peripherals. -

- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
FileProviderDescription
device.hDevice specific (provided by silicon partner)Defines the peripherals for the actual device. The file may use - several other include files to define the peripherals of the actual device.
core_cm0.hARM (for RealView ARMCC, IAR, and GNU GCC)Defines the core peripherals for the Cortex-M0 CPU and core peripherals.
core_cm3.hARM (for RealView ARMCC, IAR, and GNU GCC)Defines the core peripherals for the Cortex-M3 CPU and core peripherals.
core_cm0.cARM (for RealView ARMCC, IAR, and GNU GCC)Provides helper functions that access core registers.
core_cm3.cARM (for RealView ARMCC, IAR, and GNU GCC)Provides helper functions that access core registers.
startup_deviceARM (adapted by compiler partner / silicon partner)Provides the Cortex-M startup code and the complete (device specific) Interrupt Vector Table
system_deviceARM (adapted by silicon partner)Provides a device specific configuration file for the device. It configures the device initializes - typically the oscillator (PLL) that is part of the microcontroller device
- -

device.h

- -

- The file device.h is provided by the silicon vendor and is the - central include file that the application programmer is using in - the C source code. This file contains: -

-
    -
  • -

    Interrupt Number Definition: provides interrupt numbers - (IRQn) for all core and device specific exceptions and interrupts.

    -
    • -
  • -

    Configuration for core_cm0.h / core_cm3.h: reflects the - actual configuration of the Cortex-M processor that is part of the actual - device. As such the file core_cm0.h / core_cm3.h is included that - implements access to processor registers and core peripherals.

    -
    • -
  • -

    Device Peripheral Access Layer: provides definitions - for all device peripherals. It contains all data structures and the address - mapping for the device specific peripherals.

    -
    • -
  • Access Functions for Peripherals (optional): provides - additional helper functions for peripherals that are useful for programming - of these peripherals. Access Functions may be provided as inline functions - or can be extern references to a device specific library provided by the - silicon vendor.
    • -
- - -

Interrupt Number Definition

- -

To access the device specific interrupts the device.h file defines IRQn -numbers for the complete device using a enum typedef as shown below:

-
-typedef enum IRQn
-{
-/******  Cortex-M3 Processor Exceptions/Interrupt Numbers ************************************************/
-  NonMaskableInt_IRQn             = -14,      /*!< 2 Non Maskable Interrupt                              */
-  HardFault_IRQn                  = -13,      /*!< 3 Cortex-M3 Hard Fault Interrupt                      */
-  MemoryManagement_IRQn           = -12,      /*!< 4 Cortex-M3 Memory Management Interrupt               */
-  BusFault_IRQn                   = -11,      /*!< 5 Cortex-M3 Bus Fault Interrupt                       */
-  UsageFault_IRQn                 = -10,      /*!< 6 Cortex-M3 Usage Fault Interrupt                     */
-  SVCall_IRQn                     = -5,       /*!< 11 Cortex-M3 SV Call Interrupt                        */
-  DebugMonitor_IRQn               = -4,       /*!< 12 Cortex-M3 Debug Monitor Interrupt                  */
-  PendSV_IRQn                     = -2,       /*!< 14 Cortex-M3 Pend SV Interrupt                        */
-  SysTick_IRQn                    = -1,       /*!< 15 Cortex-M3 System Tick Interrupt                    */
-/******  STM32 specific Interrupt Numbers ****************************************************************/
-  WWDG_STM_IRQn                   = 0,        /*!< Window WatchDog Interrupt                             */
-  PVD_STM_IRQn                    = 1,        /*!< PVD through EXTI Line detection Interrupt             */
-  :
-  :
-  } IRQn_Type;
- - -

Configuration for core_cm0.h / core_cm3.h

-

- The Cortex-M core configuration options which are defined for each device implementation. Some - configuration options are reflected in the CMSIS layer using the #define settings described below. -

-

- To access core peripherals file device.h includes file core_cm0.h / core_cm3.h. - Several features in core_cm0.h / core_cm3.h are configured by the following defines that must be - defined before #include <core_cm0.h> / #include <core_cm3.h> - preprocessor command. -

- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
#defineFileValueDescription
__NVIC_PRIO_BITScore_cm0.h(2)Number of priority bits implemented in the NVIC (device specific)
__NVIC_PRIO_BITScore_cm3.h(2 ... 8)Number of priority bits implemented in the NVIC (device specific)
__MPU_PRESENTcore_cm0.h, core_cm3.h(0, 1)Defines if an MPU is present or not
__Vendor_SysTickConfigcore_cm0.h, core_cm3.h(1)When this define is setup to 1, the SysTickConfig function - in core_cm3.h is excluded. In this case the device.h - file must contain a vendor specific implementation of this function.
- - -

Device Peripheral Access Layer

-

- Each peripheral uses a prefix which consists of <device abbreviation>_ - and <peripheral name>_ to identify peripheral registers that access this - specific peripheral. The intention of this is to avoid name collisions caused - due to short names. If more than one peripheral of the same type exists, - identifiers have a postfix (digit or letter). For example: -

-
    -
  • <device abbreviation>_UART_Type: defines the generic register layout for all UART channels in a device. - 
    -typedef struct
-{
-  union {
-  __I  uint8_t  RBR;                     /*!< Offset: 0x000   Receiver Buffer Register    */
-  __O  uint8_t  THR;                     /*!< Offset: 0x000   Transmit Holding Register   */
-  __IO uint8_t  DLL;                     /*!< Offset: 0x000   Divisor Latch LSB           */
-       uint32_t RESERVED0;
-  };
-  union {
-  __IO uint8_t  DLM;                     /*!< Offset: 0x004   Divisor Latch MSB           */
-  __IO uint32_t IER;                     /*!< Offset: 0x004   Interrupt Enable Register   */
-  };
-  union {
-  __I  uint32_t IIR;                     /*!< Offset: 0x008   Interrupt ID Register       */
-  __O  uint8_t  FCR;                     /*!< Offset: 0x008   FIFO Control Register       */
-  };
-  __IO uint8_t  LCR;                     /*!< Offset: 0x00C   Line Control Register       */
-       uint8_t  RESERVED1[7];
-  __I  uint8_t  LSR;                     /*!< Offset: 0x014   Line Status Register        */
-       uint8_t  RESERVED2[7];
-  __IO uint8_t  SCR;                     /*!< Offset: 0x01C   Scratch Pad Register        */
-       uint8_t  RESERVED3[3];
-  __IO uint32_t ACR;                     /*!< Offset: 0x020   Autobaud Control Register   */
-  __IO uint8_t  ICR;                     /*!< Offset: 0x024   IrDA Control Register       */
-       uint8_t  RESERVED4[3];
-  __IO uint8_t  FDR;                     /*!< Offset: 0x028   Fractional Divider Register */
-       uint8_t  RESERVED5[7];
-  __IO uint8_t  TER;                     /*!< Offset: 0x030   Transmit Enable Register    */
-       uint8_t  RESERVED6[39];
-  __I  uint8_t  FIFOLVL;                 /*!< Offset: 0x058   FIFO Level Register         */
-} LPC_UART_TypeDef;
    -
    • -
  • <device abbreviation>_UART1: is a pointer to a register structure that refers to a specific UART. - For example UART1->DR is the data register of UART1. - 
    -#define LPC_UART2             ((LPC_UART_TypeDef      *) LPC_UART2_BASE    )
-#define LPC_UART3             ((LPC_UART_TypeDef      *) LPC_UART3_BASE    )
    -
    • -
- -
Minimal Requiements
-

- To access the peripheral registers and related function in a device the files device.h - and core_cm0.h / core_cm3.h defines as a minimum: -

-
    -
  • The Register Layout Typedef for each peripheral that defines all register names. - Names that start with RESERVE are used to introduce space into the structure to adjust the addresses of - the peripheral registers. For example: - 
    -typedef struct {
-  __IO uint32_t CTRL;      /* SysTick Control and Status Register */
-  __IO uint32_t LOAD;      /* SysTick Reload Value Register       */
-  __IO uint32_t VAL;       /* SysTick Current Value Register      */
-  __I  uint32_t CALIB;     /* SysTick Calibration Register        */
-  } SysTick_Type;
    -
    • - -
  • - Base Address for each peripheral (in case of multiple peripherals - that use the same register layout typedef multiple base addresses are defined). For example: - 
    -#define SysTick_BASE (SCS_BASE + 0x0010)            /* SysTick Base Address */
    -
    • - -
  • - Access Definition for each peripheral (in case of multiple peripherals that use - the same register layout typedef multiple access definitions exist, i.e. LPC_UART0, - LPC_UART2). For Example: - 
    -#define SysTick ((SysTick_Type *) SysTick_BASE)     /* SysTick access definition */
    -
    • -
- -

- These definitions allow to access the peripheral registers from user code with simple assignments like: -

-
SysTick->CTRL = 0;
- -
Optional Features
-

In addition the device.h file may define:

-
    -
  • - #define constants that simplify access to the peripheral registers. - These constant define bit-positions or other specific patterns are that required for the - programming of the peripheral registers. The identifiers used start with - <device abbreviation>_ and <peripheral name>_. - It is recommended to use CAPITAL letters for such #define constants. -
    • -
  • - Functions that perform more complex functions with the peripheral (i.e. status query before - a sending register is accessed). Again these function start with - <device abbreviation>_ and <peripheral name>_. -
    • -
- -

core_cm0.h and core_cm0.c

-

- File core_cm0.h describes the data structures for the Cortex-M0 core peripherals and does - the address mapping of this structures. It also provides basic access to the Cortex-M0 core registers - and core peripherals with efficient functions (defined as static inline). -

-

- File core_cm0.c defines several helper functions that access processor registers. -

-

Together these files implement the Core Peripheral Access Layer for a Cortex-M0.

- -

core_cm3.h and core_cm3.c

-

- File core_cm3.h describes the data structures for the Cortex-M3 core peripherals and does - the address mapping of this structures. It also provides basic access to the Cortex-M3 core registers - and core peripherals with efficient functions (defined as static inline). -

-

- File core_cm3.c defines several helper functions that access processor registers. -

-

Together these files implement the Core Peripheral Access Layer for a Cortex-M3.

- -

startup_device

-

- A template file for startup_device is provided by ARM for each supported - compiler. It is adapted by the silicon vendor to include interrupt vectors for all device specific - interrupt handlers. Each interrupt handler is defined as weak function - to an dummy handler. Therefore the interrupt handler can be directly used in application software - without any requirements to adapt the startup_device file. -

-

- The following exception names are fixed and define the start of the vector table for a Cortex-M0: -

-
-__Vectors       DCD     __initial_sp              ; Top of Stack
-                DCD     Reset_Handler             ; Reset Handler
-                DCD     NMI_Handler               ; NMI Handler
-                DCD     HardFault_Handler         ; Hard Fault Handler
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     SVC_Handler               ; SVCall Handler
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     PendSV_Handler            ; PendSV Handler
-                DCD     SysTick_Handler           ; SysTick Handler
- -

- The following exception names are fixed and define the start of the vector table for a Cortex-M3: -

-
-__Vectors       DCD     __initial_sp              ; Top of Stack
-                DCD     Reset_Handler             ; Reset Handler
-                DCD     NMI_Handler               ; NMI Handler
-                DCD     HardFault_Handler         ; Hard Fault Handler
-                DCD     MemManage_Handler         ; MPU Fault Handler
-                DCD     BusFault_Handler          ; Bus Fault Handler
-                DCD     UsageFault_Handler        ; Usage Fault Handler
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     SVC_Handler               ; SVCall Handler
-                DCD     DebugMon_Handler          ; Debug Monitor Handler
-                DCD     0                         ; Reserved
-                DCD     PendSV_Handler            ; PendSV Handler
-                DCD     SysTick_Handler           ; SysTick Handler
- -

- In the following examples for device specific interrupts are shown: -

-
-; External Interrupts
-                DCD     WWDG_IRQHandler           ; Window Watchdog
-                DCD     PVD_IRQHandler            ; PVD through EXTI Line detect
-                DCD     TAMPER_IRQHandler         ; Tamper
- -

- Device specific interrupts must have a dummy function that can be overwritten in user code. - Below is an example for this dummy function. -

-
-Default_Handler PROC
-                EXPORT WWDG_IRQHandler   [WEAK]
-                EXPORT PVD_IRQHandler    [WEAK]
-                EXPORT TAMPER_IRQHandler [WEAK]
-                :
-                :
-                WWDG_IRQHandler
-                PVD_IRQHandler
-                TAMPER_IRQHandler
-                :
-                :
-                B .
-                ENDP
- -

- The user application may simply define an interrupt handler function by using the handler name - as shown below. -

-
-void WWDG_IRQHandler(void)
-{
-  :
-  :
-}
- - -

system_device.c

-

- A template file for system_device.c is provided by ARM but adapted by - the silicon vendor to match their actual device. As a minimum requirement - this file must provide a device specific system configuration function and a global variable - that contains the system frequency. It configures the device and initializes typically the - oscillator (PLL) that is part of the microcontroller device. -

-

- The file system_device.c must provide - as a minimum requirement the SystemInit function as shown below. -

- - - - - - - - - - - - - - - - -
Function DefinitionDescription
void SystemInit (void)Setup the microcontroller system. Typically this function configures the - oscillator (PLL) that is part of the microcontroller device. For systems - with variable clock speed it also updates the variable SystemCoreClock.
- SystemInit is called from startup_device file.
void SystemCoreClockUpdate (void)Updates the variable SystemCoreClock and must be called whenever the - core clock is changed during program execution. SystemCoreClockUpdate() - evaluates the clock register settings and calculates the current core clock. -
- -

- Also part of the file system_device.c - is the variable SystemCoreClock which contains the current CPU clock speed shown below. -

- - - - - - - - - - - - -
Variable DefinitionDescription
uint32_t SystemCoreClockContains the system core clock (which is the system clock frequency supplied - to the SysTick timer and the processor core clock). This variable can be - used by the user application to setup the SysTick timer or configure other - parameters. It may also be used by debugger to query the frequency of the - debug timer or configure the trace clock speed.
- SystemCoreClock is initialized with a correct predefined value.

- The compiler must be configured to avoid the removal of this variable in - case that the application program is not using it. It is important for - debug systems that the variable is physically present in memory so that - it can be examined to configure the debugger.
- -

Note

-
    -

  • The above definitions are the minimum requirements for the file - system_device.c. This - file may export more functions or variables that provide a more flexible - configuration of the microcontroller system.

    -
    • -
- - -

Core Peripheral Access Layer

- -

Cortex-M Core Register Access

-

- The following functions are defined in core_cm0.h / core_cm3.h - and provide access to Cortex-M core registers. -

- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
Function DefinitionCoreCore RegisterDescription
void __enable_irq (void)M0, M3PRIMASK = 0Global Interrupt enable (using the instruction CPSIE - i)
void __disable_irq (void)M0, M3PRIMASK = 1Global Interrupt disable (using the instruction - CPSID i)
void __set_PRIMASK (uint32_t value)M0, M3PRIMASK = valueAssign value to Priority Mask Register (using the instruction - MSR)
uint32_t __get_PRIMASK (void)M0, M3return PRIMASKReturn Priority Mask Register (using the instruction - MRS)
void __enable_fault_irq (void)M3FAULTMASK = 0Global Fault exception and Interrupt enable (using the - instruction CPSIE - f)
void __disable_fault_irq (void)M3FAULTMASK = 1Global Fault exception and Interrupt disable (using the - instruction CPSID f)
void __set_FAULTMASK (uint32_t value)M3FAULTMASK = valueAssign value to Fault Mask Register (using the instruction - MSR)
uint32_t __get_FAULTMASK (void)M3return FAULTMASKReturn Fault Mask Register (using the instruction MRS)
void __set_BASEPRI (uint32_t value)M3BASEPRI = valueSet Base Priority (using the instruction MSR)
uiuint32_t __get_BASEPRI (void)M3return BASEPRIReturn Base Priority (using the instruction MRS)
void __set_CONTROL (uint32_t value)M0, M3CONTROL = valueSet CONTROL register value (using the instruction MSR)
uint32_t __get_CONTROL (void)M0, M3return CONTROLReturn Control Register Value (using the instruction - MRS)
void __set_PSP (uint32_t TopOfProcStack)M0, M3PSP = TopOfProcStackSet Process Stack Pointer value (using the instruction - MSR)
uint32_t __get_PSP (void)M0, M3return PSPReturn Process Stack Pointer (using the instruction MRS)
void __set_MSP (uint32_t TopOfMainStack)M0, M3MSP = TopOfMainStackSet Main Stack Pointer (using the instruction MSR)
uint32_t __get_MSP (void)M0, M3return MSPReturn Main Stack Pointer (using the instruction MRS)
- -

Cortex-M Instruction Access

-

- The following functions are defined in core_cm0.h / core_cm3.hand - generate specific Cortex-M instructions. The functions are implemented in the file - core_cm0.c / core_cm3.c. -

- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
NameCoreGenerated CPU InstructionDescription
void __NOP (void)M0, M3NOPNo Operation
void __WFI (void)M0, M3WFIWait for Interrupt
void __WFE (void)M0, M3WFEWait for Event
void __SEV (void)M0, M3SEVSet Event
void __ISB (void)M0, M3ISBInstruction Synchronization Barrier
void __DSB (void)M0, M3DSBData Synchronization Barrier
void __DMB (void)M0, M3DMBData Memory Barrier
uint32_t __REV (uint32_t value)M0, M3REVReverse byte order in integer value.
uint32_t __REV16 (uint16_t value)M0, M3REV16Reverse byte order in unsigned short value.
sint32_t __REVSH (sint16_t value)M0, M3REVSHReverse byte order in signed short value with sign extension to integer.
uint32_t __RBIT (uint32_t value)M3RBITReverse bit order of value
uint8_t __LDREXB (uint8_t *addr)M3LDREXBLoad exclusive byte
uint16_t __LDREXH (uint16_t *addr)M3LDREXHLoad exclusive half-word
uint32_t __LDREXW (uint32_t *addr)M3LDREXWLoad exclusive word
uint32_t __STREXB (uint8_t value, uint8_t *addr)M3STREXBStore exclusive byte
uint32_t __STREXB (uint16_t value, uint16_t *addr)M3STREXHStore exclusive half-word
uint32_t __STREXB (uint32_t value, uint32_t *addr)M3STREXWStore exclusive word
void __CLREX (void)M3CLREXRemove the exclusive lock created by __LDREXB, __LDREXH, or __LDREXW
- - -

NVIC Access Functions

-

- The CMSIS provides access to the NVIC via the register interface structure and several helper - functions that simplify the setup of the NVIC. The CMSIS HAL uses IRQ numbers (IRQn) to - identify the interrupts. The first device interrupt has the IRQn value 0. Therefore negative - IRQn values are used for processor core exceptions. -

-

- For the IRQn values of core exceptions the file device.h provides - the following enum names. -

- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
Core Exception enum ValueCoreIRQnDescription
NonMaskableInt_IRQnM0, M3-14Cortex-M Non Maskable Interrupt
HardFault_IRQnM0, M3-13Cortex-M Hard Fault Interrupt
MemoryManagement_IRQnM3-12Cortex-M Memory Management Interrupt
BusFault_IRQnM3-11Cortex-M Bus Fault Interrupt
UsageFault_IRQnM3-10Cortex-M Usage Fault Interrupt
SVCall_IRQnM0, M3-5Cortex-M SV Call Interrupt
DebugMonitor_IRQnM3-4Cortex-M Debug Monitor Interrupt
PendSV_IRQnM0, M3-2Cortex-M Pend SV Interrupt
SysTick_IRQnM0, M3-1Cortex-M System Tick Interrupt
- -

The following functions simplify the setup of the NVIC. -The functions are defined as static inline.

- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
NameCoreParameterDescription
void NVIC_SetPriorityGrouping (uint32_t PriorityGroup)M3Priority Grouping ValueSet the Priority Grouping (Groups . Subgroups)
uint32_t NVIC_GetPriorityGrouping (void)M3(void)Get the Priority Grouping (Groups . Subgroups)
void NVIC_EnableIRQ (IRQn_Type IRQn)M0, M3IRQ NumberEnable IRQn
void NVIC_DisableIRQ (IRQn_Type IRQn)M0, M3IRQ NumberDisable IRQn
uint32_t NVIC_GetPendingIRQ (IRQn_Type IRQn)M0, M3IRQ NumberReturn 1 if IRQn is pending else 0
void NVIC_SetPendingIRQ (IRQn_Type IRQn)M0, M3IRQ NumberSet IRQn Pending
void NVIC_ClearPendingIRQ (IRQn_Type IRQn)M0, M3IRQ NumberClear IRQn Pending Status
uint32_t NVIC_GetActive (IRQn_Type IRQn)M3IRQ NumberReturn 1 if IRQn is active else 0
void NVIC_SetPriority (IRQn_Type IRQn, uint32_t priority)M0, M3IRQ Number, PrioritySet Priority for IRQn
- (not threadsafe for Cortex-M0)
uint32_t NVIC_GetPriority (IRQn_Type IRQn)M0, M3IRQ NumberGet Priority for IRQn
uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)M3IRQ Number, Priority Group, Preemptive Priority, Sub PriorityEncode priority for given group, preemptive and sub priority
NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* pPreemptPriority, uint32_t* pSubPriority)M3IRQ Number, Priority, pointer to Priority Group, pointer to Preemptive Priority, pointer to Sub PriorityDeccode given priority to group, preemptive and sub priority
void NVIC_SystemReset (void)M0, M3(void)Resets the System
-

Note

-
    -

  • The processor exceptions have negative enum values. Device specific interrupts - have positive enum values and start with 0. The values are defined in - device.h file. -

    -
    • -

  • The values for PreemptPriority and SubPriority - used in functions NVIC_EncodePriority and NVIC_DecodePriority - depend on the available __NVIC_PRIO_BITS implemented in the NVIC. -

    -
    • -
- - -

SysTick Configuration Function

- -

The following function is used to configure the SysTick timer and start the -SysTick interrupt.

- - - - - - - - - - - - - - -
NameParameterDescription
uint32_t SysTickConfig - (uint32_t ticks)ticks is SysTick counter reload valueSetup the SysTick timer and enable the SysTick interrupt. After this - call the SysTick timer creates interrupts with the specified time - interval.
-
- Return: 0 when successful, 1 on failure.
-
- - -

Cortex-M3 ITM Debug Access

- -

The Cortex-M3 incorporates the Instrumented Trace Macrocell (ITM) that -provides together with the Serial Viewer Output trace capabilities for the -microcontroller system. The ITM has 32 communication channels; two ITM -communication channels are used by CMSIS to output the following information:

-
    -
  • ITM Channel 0: implements the ITM_SendChar function - which can be used for printf-style output via the debug interface.
    • -
  • ITM Channel 31: is reserved for the RTOS kernel and can be used for - kernel awareness debugging.
    • -
-

Note

-
    -

  • The ITM channel 31 is selected for the RTOS kernel since some kernels - may use the Privileged level for program execution. ITM - channels have 4 groups with 8 channels each, whereby each group can be - configured for access rights in the Unprivileged level. The ITM channel 0 - may be therefore enabled for the user task whereas ITM channel 31 may be - accessible only in Privileged level from the RTOS kernel itself.

    -
    • -
- -

The prototype of the ITM_SendChar routine is shown in the -table below.

- - - - - - - - - - - - - - -
NameParameterDescription
void uint32_t ITM_SendChar(uint32_t chr)character to outputThe function outputs a character via the ITM channel 0. The - function returns when no debugger is connected that has booked the - output. It is blocking when a debugger is connected, but the - previous character send is not transmitted.

- Return: the input character 'chr'.
- -

- Example for the usage of the ITM Channel 31 for RTOS Kernels: -

-
-  // check if debugger connected and ITM channel enabled for tracing
-  if ((CoreDebug->DEMCR & CoreDebug_DEMCR_TRCENA) &&
-  (ITM->TCR & ITM_TCR_ITMENA) &&
-  (ITM->TER & (1UL << 31))) {
-    // transmit trace data
-    while (ITM->PORT31_U32 == 0);
-    ITM->PORT[31].u8 = task_id;      // id of next task
-    while (ITM->PORT[31].u32 == 0);
-    ITM->PORT[31].u32 = task_status; // status information
-  }
- - -

Cortex-M3 additional Debug Access

- -

CMSIS provides additional debug functions to enlarge the Cortex-M3 Debug Access. -Data can be transmitted via a certain global buffer variable towards the target system.

- -

The buffer variable and the prototypes of the additional functions are shown in the -table below.

- - - - - - - - - - - - - - - - - - - - - - - - -
NameParameterDescription
extern volatile int ITM_RxBuffer Buffer to transmit data towards debug system.

- Value 0x5AA55AA5 indicates that buffer is empty.
int ITM_ReceiveChar (void)noneThe nonblocking functions returns the character stored in - ITM_RxBuffer.

- Return: -1 indicates that no character was received.
int ITM_CheckChar (void)noneThe function checks if a character is available in ITM_RxBuffer.

- Return: 1 indicates that a character is available, 0 indicates that - no character is available.
- - -

CMSIS Example

-

- The following section shows a typical example for using the CMSIS layer in user applications. - The example is based on a STM32F10x Device. -

-
-#include "stm32f10x.h"
-
-volatile uint32_t msTicks;                       /* timeTicks counter */
-
-void SysTick_Handler(void) {
-  msTicks++;                                     /* increment timeTicks counter */
-}
-
-__INLINE static void Delay (uint32_t dlyTicks) {
-  uint32_t curTicks = msTicks;
-
-  while ((msTicks - curTicks) < dlyTicks);
-}
-
-__INLINE static void LED_Config(void) {
-  ;                                              /* Configure the LEDs */
-}
-
-__INLINE static void LED_On (uint32_t led) {
-  ;                                              /* Turn On  LED */
-}
-
-__INLINE static void LED_Off (uint32_t led) {
-  ;                                              /* Turn Off LED */
-}
-
-int main (void) {
-  if (SysTick_Config (SystemCoreClock / 1000)) { /* Setup SysTick for 1 msec interrupts */
-    ;                                            /* Handle Error */
-    while (1);
-  }
-  
-  LED_Config();                                  /* configure the LEDs */                            
- 
-  while(1) {
-    LED_On (0x100);                              /* Turn  on the LED   */
-    Delay (100);                                 /* delay  100 Msec    */
-    LED_Off (0x100);                             /* Turn off the LED   */
-    Delay (100);                                 /* delay  100 Msec    */
-  }
-}
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zU;jHIYZ|O+)p<3d?3~tpm7iX9g89RTAN+I9wcVQ;h1?Ty;4iuU4^_6tk7NCBgs4Yd zGXeW;_)97i(V8p0u>QZd^_G g!+ZG+YJlCX=dW%57tSBCAIe6m^l&ZsOP@db55$o82LJ#7 diff --git a/bsp/stm32_radio/Libraries/Mass_Storage/inc/fsmc_nand.h b/bsp/stm32_radio/Libraries/Mass_Storage/inc/fsmc_nand.h deleted file mode 100644 index dc6ebb9fdb..0000000000 --- a/bsp/stm32_radio/Libraries/Mass_Storage/inc/fsmc_nand.h +++ /dev/null @@ -1,99 +0,0 @@ -/******************** (C) COPYRIGHT 2009 STMicroelectronics ******************** -* File Name : fsmc_nand.h -* Author : MCD Application Team -* Version : V3.1.0 -* Date : 10/30/2009 -* Description : Header for fsmc_nand.c file. -******************************************************************************** -* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS -* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. -* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, -* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE -* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING -* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __FSMC_NAND_H -#define __FSMC_NAND_H - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x.h" - -/* Exported types ------------------------------------------------------------*/ -typedef struct -{ - uint8_t Maker_ID; - uint8_t Device_ID; - uint8_t Third_ID; - uint8_t Fourth_ID; -}NAND_IDTypeDef; - -typedef struct -{ - uint16_t Zone; - uint16_t Block; - uint16_t Page; -} NAND_ADDRESS; - -/* Exported constants --------------------------------------------------------*/ -/* NAND Area definition for STM3210E-EVAL Board RevD */ -#define CMD_AREA (uint32_t)(1<<16) /* A16 = CLE high */ -#define ADDR_AREA (uint32_t)(1<<17) /* A17 = ALE high */ - -#define DATA_AREA ((uint32_t)0x00000000) - -/* FSMC NAND memory command */ -#define NAND_CMD_AREA_A ((uint8_t)0x00) -#define NAND_CMD_AREA_B ((uint8_t)0x01) -#define NAND_CMD_AREA_C ((uint8_t)0x50) -#define NAND_CMD_AREA_TRUE1 ((uint8_t)0x30) - -#define NAND_CMD_WRITE0 ((uint8_t)0x80) -#define NAND_CMD_WRITE_TRUE1 ((uint8_t)0x10) - -#define NAND_CMD_ERASE0 ((uint8_t)0x60) -#define NAND_CMD_ERASE1 ((uint8_t)0xD0) - -#define NAND_CMD_READID ((uint8_t)0x90) -#define NAND_CMD_STATUS ((uint8_t)0x70) -#define NAND_CMD_LOCK_STATUS ((uint8_t)0x7A) -#define NAND_CMD_RESET ((uint8_t)0xFF) - -/* NAND memory status */ -#define NAND_VALID_ADDRESS ((uint32_t)0x00000100) -#define NAND_INVALID_ADDRESS ((uint32_t)0x00000200) -#define NAND_TIMEOUT_ERROR ((uint32_t)0x00000400) -#define NAND_BUSY ((uint32_t)0x00000000) -#define NAND_ERROR ((uint32_t)0x00000001) -#define NAND_READY ((uint32_t)0x00000040) - -/* FSMC NAND memory parameters */ -#define NAND_PAGE_SIZE ((uint16_t)0x0200) /* 512 bytes per page w/o Spare Area */ -#define NAND_BLOCK_SIZE ((uint16_t)0x0020) /* 32x512 bytes pages per block */ -#define NAND_ZONE_SIZE ((uint16_t)0x0400) /* 1024 Block per zone */ -#define NAND_SPARE_AREA_SIZE ((uint16_t)0x0010) /* last 16 bytes as spare area */ -#define NAND_MAX_ZONE ((uint16_t)0x0004) /* 4 zones of 1024 block */ - -/* FSMC NAND memory address computation */ -#define ADDR_1st_CYCLE(ADDR) (uint8_t)((ADDR)& 0xFF) /* 1st addressing cycle */ -#define ADDR_2nd_CYCLE(ADDR) (uint8_t)(((ADDR)& 0xFF00) >> 8) /* 2nd addressing cycle */ -#define ADDR_3rd_CYCLE(ADDR) (uint8_t)(((ADDR)& 0xFF0000) >> 16) /* 3rd addressing cycle */ -#define ADDR_4th_CYCLE(ADDR) (uint8_t)(((ADDR)& 0xFF000000) >> 24) /* 4th addressing cycle */ - -/* Exported macro ------------------------------------------------------------*/ -/* Exported functions ------------------------------------------------------- */ -void FSMC_NAND_Init(void); -void FSMC_NAND_ReadID(NAND_IDTypeDef* NAND_ID); -uint32_t FSMC_NAND_WriteSmallPage(uint8_t *pBuffer, NAND_ADDRESS Address, uint32_t NumPageToWrite); -uint32_t FSMC_NAND_ReadSmallPage (uint8_t *pBuffer, NAND_ADDRESS Address, uint32_t NumPageToRead); -uint32_t FSMC_NAND_WriteSpareArea(uint8_t *pBuffer, NAND_ADDRESS Address, uint32_t NumSpareAreaTowrite); -uint32_t FSMC_NAND_ReadSpareArea(uint8_t *pBuffer, NAND_ADDRESS Address, uint32_t NumSpareAreaToRead); -uint32_t FSMC_NAND_EraseBlock(NAND_ADDRESS Address); -uint32_t FSMC_NAND_Reset(void); -uint32_t FSMC_NAND_GetStatus(void); -uint32_t FSMC_NAND_ReadStatus(void); -uint32_t FSMC_NAND_AddressIncrement(NAND_ADDRESS* Address); - -#endif /* __FSMC_NAND_H */ - -/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/Libraries/Mass_Storage/inc/hw_config.h b/bsp/stm32_radio/Libraries/Mass_Storage/inc/hw_config.h deleted file mode 100644 index fc63a69773..0000000000 --- a/bsp/stm32_radio/Libraries/Mass_Storage/inc/hw_config.h +++ /dev/null @@ -1,49 +0,0 @@ -/******************** (C) COPYRIGHT 2009 STMicroelectronics ******************** -* File Name : hw_config.h -* Author : MCD Application Team -* Version : V3.1.0 -* Date : 10/30/2009 -* Description : Hardware Configuration & Setup -******************************************************************************** -* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS -* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. -* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, -* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE -* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING -* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __HW_CONFIG_H -#define __HW_CONFIG_H - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x.h" -#include "platform_config.h" - -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ -/* Exported macro ------------------------------------------------------------*/ -/* Exported define -----------------------------------------------------------*/ -#define BULK_MAX_PACKET_SIZE 0x00000040 - -/* Exported functions ------------------------------------------------------- */ -void Set_System(void); -void Set_USBClock(void); -void Enter_LowPowerMode(void); -void Leave_LowPowerMode(void); -void USB_Interrupts_Config(void); -void Led_Config(void); -void Led_RW_ON(void); -void Led_RW_OFF(void); -void USB_Configured_LED(void); -void USB_NotConfigured_LED(void); -void USB_Cable_Config (FunctionalState NewState); -void Get_SerialNum(void); -void MAL_Config(void); -void USB_Disconnect_Config(void); -/* External variables --------------------------------------------------------*/ - -#endif /*__HW_CONFIG_H*/ - -/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/Libraries/Mass_Storage/inc/mass_mal.h b/bsp/stm32_radio/Libraries/Mass_Storage/inc/mass_mal.h deleted file mode 100644 index 0de1d63107..0000000000 --- a/bsp/stm32_radio/Libraries/Mass_Storage/inc/mass_mal.h +++ /dev/null @@ -1,35 +0,0 @@ -/******************** (C) COPYRIGHT 2009 STMicroelectronics ******************** -* File Name : mass_mal.h -* Author : MCD Application Team -* Version : V3.1.0 -* Date : 10/30/2009 -* Description : Header for mass_mal.c file. -******************************************************************************** -* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS -* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. -* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, -* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE -* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING -* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __MASS_MAL_H -#define __MASS_MAL_H - -/* Includes ------------------------------------------------------------------*/ -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ -#define MAL_OK 0 -#define MAL_FAIL 1 - -/* Exported macro ------------------------------------------------------------*/ -/* Exported functions ------------------------------------------------------- */ - -uint16_t MAL_Init (uint8_t lun); -uint16_t MAL_GetStatus (uint8_t lun); -uint16_t MAL_Read(uint8_t lun, uint32_t Memory_Offset, uint32_t *Readbuff, uint16_t Transfer_Length); -uint16_t MAL_Write(uint8_t lun, uint32_t Memory_Offset, uint32_t *Writebuff, uint16_t Transfer_Length); -#endif /* __MASS_MAL_H */ - -/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/Libraries/Mass_Storage/inc/memory.h b/bsp/stm32_radio/Libraries/Mass_Storage/inc/memory.h deleted file mode 100644 index 508faa2467..0000000000 --- a/bsp/stm32_radio/Libraries/Mass_Storage/inc/memory.h +++ /dev/null @@ -1,33 +0,0 @@ -/******************** (C) COPYRIGHT 2009 STMicroelectronics ******************** -* File Name : memory.h -* Author : MCD Application Team -* Version : V3.1.0 -* Date : 10/30/2009 -* Description : Memory management layer -******************************************************************************** -* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS -* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. -* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, -* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE -* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING -* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __memory_H -#define __memory_H - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x.h" -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ -#define TXFR_IDLE 0 -#define TXFR_ONGOING 1 - -/* Exported macro ------------------------------------------------------------*/ -/* Exported functions ------------------------------------------------------- */ -void Write_Memory (uint8_t lun, uint32_t Memory_Offset, uint32_t Transfer_Length); -void Read_Memory (uint8_t lun, uint32_t Memory_Offset, uint32_t Transfer_Length); -#endif /* __memory_H */ - -/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/Libraries/Mass_Storage/inc/nand_if.h b/bsp/stm32_radio/Libraries/Mass_Storage/inc/nand_if.h deleted file mode 100644 index d07eb51c16..0000000000 --- a/bsp/stm32_radio/Libraries/Mass_Storage/inc/nand_if.h +++ /dev/null @@ -1,67 +0,0 @@ -/******************** (C) COPYRIGHT 2009 STMicroelectronics ******************** -* File Name : nand_if.h -* Author : MCD Application Team -* Version : V3.1.0 -* Date : 10/30/2009 -* Description : All functions related to the NAND process -******************************************************************************** -* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS -* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. -* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, -* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE -* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING -* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __NAND_IF_H -#define __NAND_IF_H - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x.h" -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ -#define NAND_OK 0 -#define NAND_FAIL 1 - -#define FREE_BLOCK (1 << 12 ) -#define BAD_BLOCK (1 << 13 ) -#define VALID_BLOCK (1 << 14 ) -#define USED_BLOCK (1 << 15 ) - -#define MAX_PHY_BLOCKS_PER_ZONE 1024 -#define MAX_LOG_BLOCKS_PER_ZONE 1000 -/* Private Structures---------------------------------------------------------*/ -typedef struct __SPARE_AREA { - uint16_t LogicalIndex; - uint16_t DataStatus; - uint16_t BlockStatus; -} SPARE_AREA; - -typedef enum { - WRITE_IDLE = 0, - POST_WRITE, - PRE_WRITE, - WRITE_CLEANUP, - WRITE_ONGOING -}WRITE_STATE; - -typedef enum { - OLD_BLOCK = 0, - UNUSED_BLOCK -}BLOCK_STATE; - -/* Private macro --------------------------------------------------------------*/ -//#define WEAR_LEVELLING_SUPPORT -#define WEAR_DEPTH 10 -#define PAGE_TO_WRITE (Transfer_Length/512) -/* Private variables ----------------------------------------------------------*/ -/* Private function prototypes ------------------------------------------------*/ -/* exported functions ---------------------------------------------------------*/ -uint16_t NAND_Init (void); -uint16_t NAND_Write (uint32_t Memory_Offset, uint32_t *Writebuff, uint16_t Transfer_Length); -uint16_t NAND_Read (uint32_t Memory_Offset, uint32_t *Readbuff, uint16_t Transfer_Length); -uint16_t NAND_Format (void); -SPARE_AREA ReadSpareArea (uint32_t address); -#endif -/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/Libraries/Mass_Storage/inc/platform_config.h b/bsp/stm32_radio/Libraries/Mass_Storage/inc/platform_config.h deleted file mode 100644 index 909289b91c..0000000000 --- a/bsp/stm32_radio/Libraries/Mass_Storage/inc/platform_config.h +++ /dev/null @@ -1,37 +0,0 @@ -/******************** (C) COPYRIGHT 2009 STMicroelectronics ******************** -* File Name : platform_config.h -* Author : MCD Application Team -* Version : V3.1.0 -* Date : 10/30/2009 -* Description : Evaluation board specific configuration file. -******************************************************************************** -* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS -* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. -* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, -* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE -* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING -* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __PLATFORM_CONFIG_H -#define __PLATFORM_CONFIG_H - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x.h" - -#define USB_DISCONNECT GPIOG -#define USB_DISCONNECT_PIN GPIO_Pin_7 -#define RCC_APB2Periph_GPIO_DISCONNECT RCC_APB2Periph_GPIOG - -/* use auto remove: 0-NO 1-YES */ -#define USB_USE_AUTO_REMOVE 1 - -/* use led: 0-NO 1-YES */ -#define USB_USE_LED 1 -#define USB_LED_PORT GPIOE -#define USB_LED_PIN GPIO_Pin_2 - -#endif /* __PLATFORM_CONFIG_H */ - -/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/Libraries/Mass_Storage/inc/stm32f10x_conf.h b/bsp/stm32_radio/Libraries/Mass_Storage/inc/stm32f10x_conf.h deleted file mode 100644 index fa2676c5a6..0000000000 --- a/bsp/stm32_radio/Libraries/Mass_Storage/inc/stm32f10x_conf.h +++ /dev/null @@ -1,72 +0,0 @@ -/******************** (C) COPYRIGHT 2009 STMicroelectronics ******************** -* File Name : stm32f10x_conf.h -* Author : MCD Application Team -* Version : V3.1.0 -* Date : 10/30/2009 -* Description : Library configuration file. -******************************************************************************** -* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS -* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. -* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, -* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE -* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING -* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F10x_CONF_H -#define __STM32F10x_CONF_H - -/* Includes ------------------------------------------------------------------*/ -/* Uncomment the line below to enable peripheral header file inclusion */ -/* #include "stm32f10x_adc.h" */ -/* #include "stm32f10x_bkp.h" */ -/* #include "stm32f10x_can.h" */ -/* #include "stm32f10x_crc.h" */ -/* #include "stm32f10x_dac.h" */ -/* #include "stm32f10x_dbgmcu.h" */ -#include "stm32f10x_dma.h" -#include "stm32f10x_exti.h" -#include "stm32f10x_flash.h" -#include "stm32f10x_fsmc.h" -#include "stm32f10x_gpio.h" -/* #include "stm32f10x_i2c.h" */ -/* #include "stm32f10x_iwdg.h" */ -/* #include "stm32f10x_pwr.h" */ -#include "stm32f10x_rcc.h" -/* #include "stm32f10x_rtc.h" */ -#include "stm32f10x_sdio.h" -#include "stm32f10x_spi.h" -/* #include "stm32f10x_tim.h" */ -#include "stm32f10x_usart.h" -/* #include "stm32f10x_wwdg.h" */ -#include "misc.h" /* High level functions for NVIC and SysTick (add-on to CMSIS functions) */ - -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ -/* Uncomment the line below to expanse the "assert_param" macro in the - Standard Peripheral Library drivers code */ -/* #define USE_FULL_ASSERT 1 */ - -/* Exported macro ------------------------------------------------------------*/ -#ifdef USE_FULL_ASSERT - -/******************************************************************************* -* Macro Name : assert_param -* Description : The assert_param macro is used for function's parameters check. -* Input : - expr: If expr is false, it calls assert_failed function -* which reports the name of the source file and the source -* line number of the call that failed. -* If expr is true, it returns no value. -* Return : None -*******************************************************************************/ - #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__)) -/* Exported functions ------------------------------------------------------- */ - void assert_failed(uint8_t* file, uint32_t line); -#else - #define assert_param(expr) ((void)0) -#endif /* USE_FULL_ASSERT */ - -#endif /* __STM32F10x_CONF_H */ - -/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/Libraries/Mass_Storage/inc/usb_bot.h b/bsp/stm32_radio/Libraries/Mass_Storage/inc/usb_bot.h deleted file mode 100644 index 9c4affe0b3..0000000000 --- a/bsp/stm32_radio/Libraries/Mass_Storage/inc/usb_bot.h +++ /dev/null @@ -1,87 +0,0 @@ -/******************** (C) COPYRIGHT 2009 STMicroelectronics ******************** -* File Name : usb_bot.h -* Author : MCD Application Team -* Version : V3.1.0 -* Date : 10/30/2009 -* Description : BOT State Machine management -******************************************************************************** -* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS -* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. -* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, -* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE -* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING -* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __USB_BOT_H -#define __USB_BOT_H - -/* Includes ------------------------------------------------------------------*/ -/* Exported types ------------------------------------------------------------*/ -/* Bulk-only Command Block Wrapper */ - -typedef struct _Bulk_Only_CBW -{ - uint32_t dSignature; - uint32_t dTag; - uint32_t dDataLength; - uint8_t bmFlags; - uint8_t bLUN; - uint8_t bCBLength; - uint8_t CB[16]; -} -Bulk_Only_CBW; - -/* Bulk-only Command Status Wrapper */ -typedef struct _Bulk_Only_CSW -{ - uint32_t dSignature; - uint32_t dTag; - uint32_t dDataResidue; - uint8_t bStatus; -} -Bulk_Only_CSW; -/* Exported constants --------------------------------------------------------*/ - -/*****************************************************************************/ -/*********************** Bulk-Only Transfer State machine ********************/ -/*****************************************************************************/ -#define BOT_IDLE 0 /* Idle state */ -#define BOT_DATA_OUT 1 /* Data Out state */ -#define BOT_DATA_IN 2 /* Data In state */ -#define BOT_DATA_IN_LAST 3 /* Last Data In Last */ -#define BOT_CSW_Send 4 /* Command Status Wrapper */ -#define BOT_ERROR 5 /* error state */ - -#define BOT_CBW_SIGNATURE 0x43425355 -#define BOT_CSW_SIGNATURE 0x53425355 -#define BOT_CBW_PACKET_LENGTH 31 - -#define CSW_DATA_LENGTH 0x000D - -/* CSW Status Definitions */ -#define CSW_CMD_PASSED 0x00 -#define CSW_CMD_FAILED 0x01 -#define CSW_PHASE_ERROR 0x02 - -#define SEND_CSW_DISABLE 0 -#define SEND_CSW_ENABLE 1 - -#define DIR_IN 0 -#define DIR_OUT 1 -#define BOTH_DIR 2 - -/* Exported macro ------------------------------------------------------------*/ -/* Exported functions ------------------------------------------------------- */ -void Mass_Storage_In (void); -void Mass_Storage_Out (void); -void CBW_Decode(void); -void Transfer_Data_Request(uint8_t* Data_Pointer, uint16_t Data_Len); -void Set_CSW (uint8_t CSW_Status, uint8_t Send_Permission); -void Bot_Abort(uint8_t Direction); - -#endif /* __USB_BOT_H */ - -/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/ - diff --git a/bsp/stm32_radio/Libraries/Mass_Storage/inc/usb_conf.h b/bsp/stm32_radio/Libraries/Mass_Storage/inc/usb_conf.h deleted file mode 100644 index 97f63e300f..0000000000 --- a/bsp/stm32_radio/Libraries/Mass_Storage/inc/usb_conf.h +++ /dev/null @@ -1,132 +0,0 @@ -/******************** (C) COPYRIGHT 2009 STMicroelectronics ******************** -* File Name : usb_conf.h -* Author : MCD Application Team -* Version : V3.1.0 -* Date : 10/30/2009 -* Description : Mass Storage Demo configuration header -******************************************************************************** -* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS -* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. -* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, -* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE -* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING -* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __USB_CONF_H -#define __USB_CONF_H - -/*-------------------------------------------------------------*/ -/* EP_NUM */ -/* defines how many endpoints are used by the device */ -/*-------------------------------------------------------------*/ -#define EP_NUM (3) - -#ifndef STM32F10X_CL -/*-------------------------------------------------------------*/ -/* -------------- Buffer Description Table -----------------*/ -/*-------------------------------------------------------------*/ -/* buffer table base address */ - -#define BTABLE_ADDRESS (0x00) - -/* EP0 */ -/* rx/tx buffer base address */ -#define ENDP0_RXADDR (0x18) -#define ENDP0_TXADDR (0x58) - -/* EP1 */ -/* tx buffer base address */ -#define ENDP1_TXADDR (0x98) - -/* EP2 */ -/* Rx buffer base address */ -#define ENDP2_RXADDR (0xD8) - - -/* ISTR events */ -/* IMR_MSK */ -/* mask defining which events has to be handled */ -/* by the device application software */ -#define IMR_MSK (CNTR_CTRM | CNTR_RESETM) -#endif /* STM32F10X_CL */ - -/* CTR service routines */ -/* associated to defined endpoints */ -//#define EP1_IN_Callback NOP_Process -#define EP2_IN_Callback NOP_Process -#define EP3_IN_Callback NOP_Process -#define EP4_IN_Callback NOP_Process -#define EP5_IN_Callback NOP_Process -#define EP6_IN_Callback NOP_Process -#define EP7_IN_Callback NOP_Process - - -#define EP1_OUT_Callback NOP_Process -//#define EP2_OUT_Callback NOP_Process -#define EP3_OUT_Callback NOP_Process -#define EP4_OUT_Callback NOP_Process -#define EP5_OUT_Callback NOP_Process -#define EP6_OUT_Callback NOP_Process -#define EP7_OUT_Callback NOP_Process - -#ifdef STM32F10X_CL - -/* OTGD-FS-DEVICE IP interrupts Enable definitions */ -/* Uncomment the define to enable the selected interrupt */ -//#define INTR_MODEMISMATCH -#define INTR_SOFINTR -#define INTR_RXSTSQLVL /* Mandatory */ -//#define INTR_NPTXFEMPTY -//#define INTR_GINNAKEFF -//#define INTR_GOUTNAKEFF -//#define INTR_ERLYSUSPEND -#define INTR_USBSUSPEND /* Mandatory */ -#define INTR_USBRESET /* Mandatory */ -#define INTR_ENUMDONE /* Mandatory */ -//#define INTR_ISOOUTDROP -#define INTR_EOPFRAME -//#define INTR_EPMISMATCH -#define INTR_INEPINTR /* Mandatory */ -#define INTR_OUTEPINTR /* Mandatory */ -//#define INTR_INCOMPLISOIN -//#define INTR_INCOMPLISOOUT -#define INTR_WKUPINTR /* Mandatory */ - -/* OTGD-FS-DEVICE IP interrupts subroutines */ -/* Comment the define to enable the selected interrupt subroutine and replace it - by user code */ -#define INTR_MODEMISMATCH_Callback NOP_Process -#define INTR_SOFINTR_Callback NOP_Process -#define INTR_RXSTSQLVL_Callback NOP_Process -#define INTR_NPTXFEMPTY_Callback NOP_Process -#define INTR_NPTXFEMPTY_Callback NOP_Process -#define INTR_GINNAKEFF_Callback NOP_Process -#define INTR_GOUTNAKEFF_Callback NOP_Process -#define INTR_ERLYSUSPEND_Callback NOP_Process -#define INTR_USBSUSPEND_Callback NOP_Process -#define INTR_USBRESET_Callback NOP_Process -#define INTR_ENUMDONE_Callback NOP_Process -#define INTR_ISOOUTDROP_Callback NOP_Process -#define INTR_EOPFRAME_Callback NOP_Process -#define INTR_EPMISMATCH_Callback NOP_Process -#define INTR_INEPINTR_Callback NOP_Process -#define INTR_OUTEPINTR_Callback NOP_Process -#define INTR_INCOMPLISOIN_Callback NOP_Process -#define INTR_INCOMPLISOOUT_Callback NOP_Process -#define INTR_WKUPINTR_Callback NOP_Process - -/* Isochronous data update */ -#define INTR_RXSTSQLVL_ISODU_Callback NOP_Process - -/* Isochronous transfer parameters */ -/* Size of a single Isochronous buffer (size of a single transfer) */ -#define ISOC_BUFFER_SZE 1 -/* Number of sub-buffers (number of single buffers/transfers), should be even */ -#define NUM_SUB_BUFFERS 2 - -#endif /* STM32F10X_CL */ - -#endif /* __USB_CONF_H */ - -/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/Libraries/Mass_Storage/inc/usb_desc.h b/bsp/stm32_radio/Libraries/Mass_Storage/inc/usb_desc.h deleted file mode 100644 index bf331e8219..0000000000 --- a/bsp/stm32_radio/Libraries/Mass_Storage/inc/usb_desc.h +++ /dev/null @@ -1,49 +0,0 @@ -/******************** (C) COPYRIGHT 2009 STMicroelectronics ******************** -* File Name : usb_desc.h -* Author : MCD Application Team -* Version : V3.1.0 -* Date : 10/30/2009 -* Description : Descriptor Header for Mass Storage Device -******************************************************************************** -* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS -* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. -* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, -* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE -* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING -* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __USB_DESC_H -#define __USB_DESC_H - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x.h" -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ -/* Exported macro ------------------------------------------------------------*/ -/* Exported define -----------------------------------------------------------*/ -#define MASS_SIZ_DEVICE_DESC 18 -#define MASS_SIZ_CONFIG_DESC 32 - -#define MASS_SIZ_STRING_LANGID 4 -#define MASS_SIZ_STRING_VENDOR 38 -#define MASS_SIZ_STRING_PRODUCT 38 -#define MASS_SIZ_STRING_SERIAL 26 -#define MASS_SIZ_STRING_INTERFACE 16 - -/* Exported functions ------------------------------------------------------- */ -extern const uint8_t MASS_DeviceDescriptor[MASS_SIZ_DEVICE_DESC]; -extern const uint8_t MASS_ConfigDescriptor[MASS_SIZ_CONFIG_DESC]; - -extern const uint8_t MASS_StringLangID[MASS_SIZ_STRING_LANGID]; -extern const uint8_t MASS_StringVendor[MASS_SIZ_STRING_VENDOR]; -extern const uint8_t MASS_StringProduct[MASS_SIZ_STRING_PRODUCT]; -extern uint8_t MASS_StringSerial[MASS_SIZ_STRING_SERIAL]; -extern const uint8_t MASS_StringInterface[MASS_SIZ_STRING_INTERFACE]; - -#endif /* __USB_DESC_H */ - -/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/ - - diff --git a/bsp/stm32_radio/Libraries/Mass_Storage/inc/usb_istr.h b/bsp/stm32_radio/Libraries/Mass_Storage/inc/usb_istr.h deleted file mode 100644 index ef7db31383..0000000000 --- a/bsp/stm32_radio/Libraries/Mass_Storage/inc/usb_istr.h +++ /dev/null @@ -1,121 +0,0 @@ -/******************** (C) COPYRIGHT 2009 STMicroelectronics ******************** -* File Name : usb_istr.h -* Author : MCD Application Team -* Version : V3.1.0 -* Date : 10/30/2009 -* Description : This file includes the peripherals header files in the -* user application. -******************************************************************************** -* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS -* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. -* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, -* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE -* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING -* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __USB_ISTR_H -#define __USB_ISTR_H - -/* Includes ------------------------------------------------------------------*/ -#include "usb_conf.h" - -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ -/* Exported macro ------------------------------------------------------------*/ -/* Exported functions ------------------------------------------------------- */ - -#ifndef STM32F10X_CL - void USB_Istr(void); -#else /* STM32F10X_CL */ - u32 STM32_PCD_OTG_ISR_Handler(void); -#endif /* STM32F10X_CL */ - -/* function prototypes Automatically built defining related macros */ - -void EP1_IN_Callback(void); -void EP2_IN_Callback(void); -void EP3_IN_Callback(void); -void EP4_IN_Callback(void); -void EP5_IN_Callback(void); -void EP6_IN_Callback(void); -void EP7_IN_Callback(void); - -void EP1_OUT_Callback(void); -void EP2_OUT_Callback(void); -void EP3_OUT_Callback(void); -void EP4_OUT_Callback(void); -void EP5_OUT_Callback(void); -void EP6_OUT_Callback(void); -void EP7_OUT_Callback(void); - -#ifndef STM32F10X_CL - -#ifdef CTR_CALLBACK -void CTR_Callback(void); -#endif - -#ifdef DOVR_CALLBACK -void DOVR_Callback(void); -#endif - -#ifdef ERR_CALLBACK -void ERR_Callback(void); -#endif - -#ifdef WKUP_CALLBACK -void WKUP_Callback(void); -#endif - -#ifdef SUSP_CALLBACK -void SUSP_Callback(void); -#endif - -#ifdef RESET_CALLBACK -void RESET_Callback(void); -#endif - -#ifdef SOF_CALLBACK -void SOF_Callback(void); -#endif - -#ifdef ESOF_CALLBACK -void ESOF_Callback(void); -#endif - -#else /* STM32F10X_CL */ - -/* Interrupt subroutines user callbacks prototypes. - These callbacks are called into the respective interrupt sunroutine functinos - and can be tailored for various user application purposes. - Note: Make sure that the correspondant interrupt is enabled through the - definition in usb_conf.h file */ -void INTR_MODEMISMATCH_Callback(void); -void INTR_SOFINTR_Callback(void); -void INTR_RXSTSQLVL_Callback(void); -void INTR_NPTXFEMPTY_Callback(void); -void INTR_GINNAKEFF_Callback(void); -void INTR_GOUTNAKEFF_Callback(void); -void INTR_ERLYSUSPEND_Callback(void); -void INTR_USBSUSPEND_Callback(void); -void INTR_USBRESET_Callback(void); -void INTR_ENUMDONE_Callback(void); -void INTR_ISOOUTDROP_Callback(void); -void INTR_EOPFRAME_Callback(void); -void INTR_EPMISMATCH_Callback(void); -void INTR_INEPINTR_Callback(void); -void INTR_OUTEPINTR_Callback(void); -void INTR_INCOMPLISOIN_Callback(void); -void INTR_INCOMPLISOOUT_Callback(void); -void INTR_WKUPINTR_Callback(void); - -/* Isochronous data update */ -void INTR_RXSTSQLVL_ISODU_Callback(void); - -#endif /* STM32F10X_CL */ - - -#endif /*__USB_ISTR_H*/ - -/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/Libraries/Mass_Storage/inc/usb_prop.h b/bsp/stm32_radio/Libraries/Mass_Storage/inc/usb_prop.h deleted file mode 100644 index dad9f391ed..0000000000 --- a/bsp/stm32_radio/Libraries/Mass_Storage/inc/usb_prop.h +++ /dev/null @@ -1,58 +0,0 @@ -/******************** (C) COPYRIGHT 2009 STMicroelectronics ******************** -* File Name : usb_prop.h -* Author : MCD Application Team -* Version : V3.1.0 -* Date : 10/30/2009 -* Description : All processing related to Mass Storage Demo (Endpoint 0) -******************************************************************************** -* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS -* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. -* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, -* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE -* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING -* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __usb_prop_H -#define __usb_prop_H -/* Includes ------------------------------------------------------------------*/ -/* Exported types ------------------------------------------------------------*/ - -/* Exported constants --------------------------------------------------------*/ -#define Mass_Storage_GetConfiguration NOP_Process -/* #define Mass_Storage_SetConfiguration NOP_Process*/ -#define Mass_Storage_GetInterface NOP_Process -#define Mass_Storage_SetInterface NOP_Process -#define Mass_Storage_GetStatus NOP_Process -/* #define Mass_Storage_ClearFeature NOP_Process*/ -#define Mass_Storage_SetEndPointFeature NOP_Process -#define Mass_Storage_SetDeviceFeature NOP_Process -/*#define Mass_Storage_SetDeviceAddress NOP_Process*/ - -/* MASS Storage Requests*/ -#define GET_MAX_LUN 0xFE -#define MASS_STORAGE_RESET 0xFF -#define LUN_DATA_LENGTH 1 - -/* Exported macro ------------------------------------------------------------*/ -/* Exported functions ------------------------------------------------------- */ -void MASS_init(void); -void MASS_Reset(void); -void Mass_Storage_SetConfiguration(void); -void Mass_Storage_ClearFeature(void); -void Mass_Storage_SetDeviceAddress (void); -void MASS_Status_In (void); -void MASS_Status_Out (void); -RESULT MASS_Data_Setup(uint8_t); -RESULT MASS_NoData_Setup(uint8_t); -RESULT MASS_Get_Interface_Setting(uint8_t Interface, uint8_t AlternateSetting); -uint8_t *MASS_GetDeviceDescriptor(uint16_t ); -uint8_t *MASS_GetConfigDescriptor(uint16_t); -uint8_t *MASS_GetStringDescriptor(uint16_t); -uint8_t *Get_Max_Lun(uint16_t Length); - -#endif /* __usb_prop_H */ - -/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/ - diff --git a/bsp/stm32_radio/Libraries/Mass_Storage/inc/usb_pwr.h b/bsp/stm32_radio/Libraries/Mass_Storage/inc/usb_pwr.h deleted file mode 100644 index 3bef34b921..0000000000 --- a/bsp/stm32_radio/Libraries/Mass_Storage/inc/usb_pwr.h +++ /dev/null @@ -1,58 +0,0 @@ -/******************** (C) COPYRIGHT 2009 STMicroelectronics ******************** -* File Name : usb_pwr.h -* Author : MCD Application Team -* Version : V3.1.0 -* Date : 10/30/2009 -* Description : Connection/disconnection & power management header -******************************************************************************** -* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS -* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. -* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, -* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE -* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING -* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __USB_PWR_H -#define __USB_PWR_H -/* Includes ------------------------------------------------------------------*/ -#include "usb_core.h" -/* Exported types ------------------------------------------------------------*/ -typedef enum _RESUME_STATE -{ - RESUME_EXTERNAL, - RESUME_INTERNAL, - RESUME_LATER, - RESUME_WAIT, - RESUME_START, - RESUME_ON, - RESUME_OFF, - RESUME_ESOF -} RESUME_STATE; - -typedef enum _DEVICE_STATE -{ - UNCONNECTED, - ATTACHED, - POWERED, - SUSPENDED, - ADDRESSED, - CONFIGURED -} DEVICE_STATE; - -/* Exported constants --------------------------------------------------------*/ -/* Exported macro ------------------------------------------------------------*/ -/* Exported functions ------------------------------------------------------- */ -void Suspend(void); -void Resume_Init(void); -void Resume(RESUME_STATE eResumeSetVal); -RESULT PowerOn(void); -RESULT PowerOff(void); - -/* External variables --------------------------------------------------------*/ -extern __IO uint32_t bDeviceState; /* USB device status */ -extern __IO bool fSuspendEnabled; /* true when suspend is possible */ - -#endif /*__USB_PWR_H*/ - -/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/Libraries/Mass_Storage/inc/usb_scsi.h b/bsp/stm32_radio/Libraries/Mass_Storage/inc/usb_scsi.h deleted file mode 100644 index e7a11198d8..0000000000 --- a/bsp/stm32_radio/Libraries/Mass_Storage/inc/usb_scsi.h +++ /dev/null @@ -1,140 +0,0 @@ -/******************** (C) COPYRIGHT 2009 STMicroelectronics ******************** -* File Name : usb_scsi.h -* Author : MCD Application Team -* Version : V3.1.0 -* Date : 10/30/2009 -* Description : All processing related to the SCSI commands -******************************************************************************** -* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS -* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. -* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, -* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE -* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING -* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __USB_SCSI_H -#define __USB_SCSI_H - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x.h" -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ - -/* SCSI Commands */ -#define SCSI_FORMAT_UNIT 0x04 -#define SCSI_INQUIRY 0x12 -#define SCSI_MODE_SELECT6 0x15 -#define SCSI_MODE_SELECT10 0x55 -#define SCSI_MODE_SENSE6 0x1A -#define SCSI_MODE_SENSE10 0x5A -#define SCSI_ALLOW_MEDIUM_REMOVAL 0x1E -#define SCSI_READ6 0x08 -#define SCSI_READ10 0x28 -#define SCSI_READ12 0xA8 -#define SCSI_READ16 0x88 - -#define SCSI_READ_CAPACITY10 0x25 -#define SCSI_READ_CAPACITY16 0x9E - -#define SCSI_REQUEST_SENSE 0x03 -#define SCSI_START_STOP_UNIT 0x1B -#define SCSI_TEST_UNIT_READY 0x00 -#define SCSI_WRITE6 0x0A -#define SCSI_WRITE10 0x2A -#define SCSI_WRITE12 0xAA -#define SCSI_WRITE16 0x8A - -#define SCSI_VERIFY10 0x2F -#define SCSI_VERIFY12 0xAF -#define SCSI_VERIFY16 0x8F - -#define SCSI_SEND_DIAGNOSTIC 0x1D -#define SCSI_READ_FORMAT_CAPACITIES 0x23 - -#define NO_SENSE 0 -#define RECOVERED_ERROR 1 -#define NOT_READY 2 -#define MEDIUM_ERROR 3 -#define HARDWARE_ERROR 4 -#define ILLEGAL_REQUEST 5 -#define UNIT_ATTENTION 6 -#define DATA_PROTECT 7 -#define BLANK_CHECK 8 -#define VENDOR_SPECIFIC 9 -#define COPY_ABORTED 10 -#define ABORTED_COMMAND 11 -#define VOLUME_OVERFLOW 13 -#define MISCOMPARE 14 - - -#define INVALID_COMMAND 0x20 -#define INVALID_FIELED_IN_COMMAND 0x24 -#define PARAMETER_LIST_LENGTH_ERROR 0x1A -#define INVALID_FIELD_IN_PARAMETER_LIST 0x26 -#define ADDRESS_OUT_OF_RANGE 0x21 -#define MEDIUM_NOT_PRESENT 0x3A -#define MEDIUM_HAVE_CHANGED 0x28 - -#define READ_FORMAT_CAPACITY_DATA_LEN 0x0C -#define READ_CAPACITY10_DATA_LEN 0x08 -#define MODE_SENSE10_DATA_LEN 0x08 -#define MODE_SENSE6_DATA_LEN 0x04 -#define REQUEST_SENSE_DATA_LEN 0x12 -#define STANDARD_INQUIRY_DATA_LEN 0x24 -#define BLKVFY 0x04 - -extern uint8_t Page00_Inquiry_Data[]; -extern uint8_t Standard_Inquiry_Data1[]; -extern uint8_t Standard_Inquiry_Data2[]; -extern uint8_t Standard_Inquiry_Data3[]; -extern uint8_t Mode_Sense6_data[]; -extern uint8_t Mode_Sense10_data[]; -extern uint8_t Scsi_Sense_Data[]; -extern uint8_t ReadCapacity10_Data[]; -extern uint8_t ReadFormatCapacity_Data []; - -/* Exported macro ------------------------------------------------------------*/ -/* Exported functions ------------------------------------------------------- */ -void SCSI_Inquiry_Cmd(uint8_t lun); -void SCSI_ReadFormatCapacity_Cmd(uint8_t lun); -void SCSI_ReadCapacity10_Cmd(uint8_t lun); -void SCSI_RequestSense_Cmd (uint8_t lun); -void SCSI_Start_Stop_Unit_Cmd(uint8_t lun); -void SCSI_ModeSense6_Cmd (uint8_t lun); -void SCSI_ModeSense10_Cmd (uint8_t lun); -void SCSI_Write10_Cmd(uint8_t lun , uint32_t LBA , uint32_t BlockNbr); -void SCSI_Read10_Cmd(uint8_t lun , uint32_t LBA , uint32_t BlockNbr); -void SCSI_Verify10_Cmd(uint8_t lun); - -void SCSI_Invalid_Cmd(uint8_t lun); -void SCSI_Valid_Cmd(uint8_t lun); -bool SCSI_Address_Management(uint8_t lun , uint8_t Cmd , uint32_t LBA , uint32_t BlockNbr); - -void Set_Scsi_Sense_Data(uint8_t lun , uint8_t Sens_Key, uint8_t Asc); -void SCSI_TestUnitReady_Cmd (uint8_t lun); -void SCSI_Format_Cmd (uint8_t lun); - -//#define SCSI_TestUnitReady_Cmd SCSI_Valid_Cmd -#define SCSI_Prevent_Removal_Cmd SCSI_Valid_Cmd - -/* Invalid (Unsupported) commands */ -#define SCSI_READ_CAPACITY16_Cmd SCSI_Invalid_Cmd -//#define SCSI_FormatUnit_Cmd SCSI_Invalid_Cmd -#define SCSI_Write6_Cmd SCSI_Invalid_Cmd -#define SCSI_Write16_Cmd SCSI_Invalid_Cmd -#define SCSI_Write12_Cmd SCSI_Invalid_Cmd -#define SCSI_Read6_Cmd SCSI_Invalid_Cmd -#define SCSI_Read12_Cmd SCSI_Invalid_Cmd -#define SCSI_Read16_Cmd SCSI_Invalid_Cmd -#define SCSI_Send_Diagnostic_Cmd SCSI_Invalid_Cmd -#define SCSI_Mode_Select6_Cmd SCSI_Invalid_Cmd -#define SCSI_Mode_Select10_Cmd SCSI_Invalid_Cmd -#define SCSI_Verify12_Cmd SCSI_Invalid_Cmd -#define SCSI_Verify16_Cmd SCSI_Invalid_Cmd - -#endif /* __USB_SCSI_H */ - -/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/ - diff --git a/bsp/stm32_radio/Libraries/Mass_Storage/src/fsmc_nand.c b/bsp/stm32_radio/Libraries/Mass_Storage/src/fsmc_nand.c deleted file mode 100644 index 9bbe94dad7..0000000000 --- a/bsp/stm32_radio/Libraries/Mass_Storage/src/fsmc_nand.c +++ /dev/null @@ -1,490 +0,0 @@ -/******************** (C) COPYRIGHT 2009 STMicroelectronics ******************** -* File Name : fsmc_nand.c -* Author : MCD Application Team -* Version : V3.0.1 -* Date : 04/27/2009 -* Description : This file provides a set of functions needed to drive the -* NAND512W3A2 memory mounted on STM3210E-EVAL board. -******************************************************************************** -* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS -* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. -* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, -* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE -* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING -* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ -/* Includes ------------------------------------------------------------------*/ -#include "fsmc_nand.h" - -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ - -#define FSMC_Bank_NAND FSMC_Bank2_NAND -#define Bank_NAND_ADDR Bank2_NAND_ADDR -#define Bank2_NAND_ADDR ((uint32_t)0x70000000) - -/* Private macro -------------------------------------------------------------*/ -#define ROW_ADDRESS (Address.Page + (Address.Block + (Address.Zone * NAND_ZONE_SIZE)) * NAND_BLOCK_SIZE) - -/* Private variables ---------------------------------------------------------*/ -/* Private function prototypes -----------------------------------------------*/ -/* Private functions ---------------------------------------------------------*/ -/******************************************************************************* -* Function Name : FSMC_NAND_Init -* Description : Configures the FSMC and GPIOs to interface with the NAND memory. -* This function must be called before any write/read operation -* on the NAND. -* Input : None -* Output : None -* Return : None -*******************************************************************************/ -void FSMC_NAND_Init(void) -{ - GPIO_InitTypeDef GPIO_InitStructure; - FSMC_NANDInitTypeDef FSMC_NANDInitStructure; - FSMC_NAND_PCCARDTimingInitTypeDef p; - - RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOD | RCC_APB2Periph_GPIOE | - RCC_APB2Periph_GPIOF | RCC_APB2Periph_GPIOG, ENABLE); - -/*-- GPIO Configuration ------------------------------------------------------*/ -/* CLE, ALE, D0->D3, NOE, NWE and NCE2 NAND pin configuration */ - GPIO_InitStructure.GPIO_Pin = GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_14 | GPIO_Pin_15 | - GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_4 | GPIO_Pin_5 | - GPIO_Pin_7; - GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; - GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; - - GPIO_Init(GPIOD, &GPIO_InitStructure); - -/* D4->D7 NAND pin configuration */ - GPIO_InitStructure.GPIO_Pin = GPIO_Pin_7 | GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10; - - GPIO_Init(GPIOE, &GPIO_InitStructure); - - -/* NWAIT NAND pin configuration */ - GPIO_InitStructure.GPIO_Pin = GPIO_Pin_6; - GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; - GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IPU; - - GPIO_Init(GPIOD, &GPIO_InitStructure); - -/* INT2 NAND pin configuration */ - GPIO_InitStructure.GPIO_Pin = GPIO_Pin_6; - GPIO_Init(GPIOG, &GPIO_InitStructure); - - /*-- FSMC Configuration ------------------------------------------------------*/ - p.FSMC_SetupTime = 0x1; - p.FSMC_WaitSetupTime = 0x3; - p.FSMC_HoldSetupTime = 0x2; - p.FSMC_HiZSetupTime = 0x1; - - FSMC_NANDInitStructure.FSMC_Bank = FSMC_Bank2_NAND; - FSMC_NANDInitStructure.FSMC_Waitfeature = FSMC_Waitfeature_Enable; - FSMC_NANDInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_8b; - FSMC_NANDInitStructure.FSMC_ECC = FSMC_ECC_Enable; - FSMC_NANDInitStructure.FSMC_ECCPageSize = FSMC_ECCPageSize_512Bytes; - FSMC_NANDInitStructure.FSMC_TCLRSetupTime = 0x00; - FSMC_NANDInitStructure.FSMC_TARSetupTime = 0x00; - FSMC_NANDInitStructure.FSMC_CommonSpaceTimingStruct = &p; - FSMC_NANDInitStructure.FSMC_AttributeSpaceTimingStruct = &p; - - FSMC_NANDInit(&FSMC_NANDInitStructure); - - /* FSMC NAND Bank Cmd Test */ - FSMC_NANDCmd(FSMC_Bank2_NAND, ENABLE); -} - -/****************************************************************************** -* Function Name : FSMC_NAND_ReadID -* Description : Reads NAND memory's ID. -* Input : - NAND_ID: pointer to a NAND_IDTypeDef structure which will hold -* the Manufacturer and Device ID. -* Output : None -* Return : None -*******************************************************************************/ -void FSMC_NAND_ReadID(NAND_IDTypeDef* NAND_ID) -{ - uint32_t data = 0; - - /* Send Command to the command area */ - *(__IO uint8_t *)(Bank_NAND_ADDR | CMD_AREA) = 0x90; - *(__IO uint8_t *)(Bank_NAND_ADDR | ADDR_AREA) = 0x00; - - /* Sequence to read ID from NAND flash */ - data = *(__IO uint32_t *)(Bank_NAND_ADDR | DATA_AREA); - - NAND_ID->Maker_ID = ADDR_1st_CYCLE (data); - NAND_ID->Device_ID = ADDR_2nd_CYCLE (data); - NAND_ID->Third_ID = ADDR_3rd_CYCLE (data); - NAND_ID->Fourth_ID = ADDR_4th_CYCLE (data); -} - -/****************************************************************************** -* Function Name : FSMC_NAND_WriteSmallPage -* Description : This routine is for writing one or several 512 Bytes Page size. -* Input : - pBuffer: pointer on the Buffer containing data to be written -* - Address: First page address -* - NumPageToWrite: Number of page to write -* Output : None -* Return : New status of the NAND operation. This parameter can be: -* - NAND_TIMEOUT_ERROR: when the previous operation generate -* a Timeout error -* - NAND_READY: when memory is ready for the next operation -* And the new status of the increment address operation. It can be: -* - NAND_VALID_ADDRESS: When the new address is valid address -* - NAND_INVALID_ADDRESS: When the new address is invalid address -*******************************************************************************/ -uint32_t FSMC_NAND_WriteSmallPage(uint8_t *pBuffer, NAND_ADDRESS Address, uint32_t NumPageToWrite) -{ - uint32_t index = 0x00, numpagewritten = 0x00, addressstatus = NAND_VALID_ADDRESS; - uint32_t status = NAND_READY, size = 0x00; - - while((NumPageToWrite != 0x00) && (addressstatus == NAND_VALID_ADDRESS) && (status == NAND_READY)) - { - /* Page write command and address */ - *(__IO uint8_t *)(Bank_NAND_ADDR | CMD_AREA) = NAND_CMD_AREA_A; - *(__IO uint8_t *)(Bank_NAND_ADDR | CMD_AREA) = NAND_CMD_WRITE0; - - *(__IO uint8_t *)(Bank_NAND_ADDR | ADDR_AREA) = 0x00; - *(__IO uint8_t *)(Bank_NAND_ADDR | ADDR_AREA) = ADDR_1st_CYCLE(ROW_ADDRESS); - *(__IO uint8_t *)(Bank_NAND_ADDR | ADDR_AREA) = ADDR_2nd_CYCLE(ROW_ADDRESS); - *(__IO uint8_t *)(Bank_NAND_ADDR | ADDR_AREA) = ADDR_3rd_CYCLE(ROW_ADDRESS); - - /* Calculate the size */ - size = NAND_PAGE_SIZE + (NAND_PAGE_SIZE * numpagewritten); - - /* Write data */ - for(; index < size; index++) - { - *(__IO uint8_t *)(Bank_NAND_ADDR | DATA_AREA) = pBuffer[index]; - } - - *(__IO uint8_t *)(Bank_NAND_ADDR | CMD_AREA) = NAND_CMD_WRITE_TRUE1; - - /* Check status for successful operation */ - status = FSMC_NAND_GetStatus(); - - if(status == NAND_READY) - { - numpagewritten++; - - NumPageToWrite--; - - /* Calculate Next small page Address */ - addressstatus = FSMC_NAND_AddressIncrement(&Address); - } - } - - return (status | addressstatus); -} - -/****************************************************************************** -* Function Name : FSMC_NAND_ReadSmallPage -* Description : This routine is for sequential read from one or several -* 512 Bytes Page size. -* Input : - pBuffer: pointer on the Buffer to fill -* - Address: First page address -* - NumPageToRead: Number of page to read -* Output : None -* Return : New status of the NAND operation. This parameter can be: -* - NAND_TIMEOUT_ERROR: when the previous operation generate -* a Timeout error -* - NAND_READY: when memory is ready for the next operation -* And the new status of the increment address operation. It can be: -* - NAND_VALID_ADDRESS: When the new address is valid address -* - NAND_INVALID_ADDRESS: When the new address is invalid address -*******************************************************************************/ -uint32_t FSMC_NAND_ReadSmallPage(uint8_t *pBuffer, NAND_ADDRESS Address, uint32_t NumPageToRead) -{ - uint32_t index = 0x00, numpageread = 0x00, addressstatus = NAND_VALID_ADDRESS; - uint32_t status = NAND_READY, size = 0x00; - - while((NumPageToRead != 0x0) && (addressstatus == NAND_VALID_ADDRESS)) - { - /* Page Read command and page address */ - *(__IO uint8_t *)(Bank_NAND_ADDR | CMD_AREA) = NAND_CMD_AREA_A; - - *(__IO uint8_t *)(Bank_NAND_ADDR | ADDR_AREA) = 0x00; - *(__IO uint8_t *)(Bank_NAND_ADDR | ADDR_AREA) = ADDR_1st_CYCLE(ROW_ADDRESS); - *(__IO uint8_t *)(Bank_NAND_ADDR | ADDR_AREA) = ADDR_2nd_CYCLE(ROW_ADDRESS); - *(__IO uint8_t *)(Bank_NAND_ADDR | ADDR_AREA) = ADDR_3rd_CYCLE(ROW_ADDRESS); - - *(__IO uint8_t *)(Bank_NAND_ADDR | CMD_AREA) = NAND_CMD_AREA_TRUE1; - - /* Calculate the size */ - size = NAND_PAGE_SIZE + (NAND_PAGE_SIZE * numpageread); - - /* Get Data into Buffer */ - for(; index < size; index++) - { - pBuffer[index]= *(__IO uint8_t *)(Bank_NAND_ADDR | DATA_AREA); - } - - numpageread++; - - NumPageToRead--; - - /* Calculate page address */ - addressstatus = FSMC_NAND_AddressIncrement(&Address); - } - - status = FSMC_NAND_GetStatus(); - - return (status | addressstatus); -} - -/****************************************************************************** -* Function Name : FSMC_NAND_WriteSpareArea -* Description : This routine write the spare area information for the specified -* pages addresses. -* Input : - pBuffer: pointer on the Buffer containing data to be written -* - Address: First page address -* - NumSpareAreaTowrite: Number of Spare Area to write -* Output : None -* Return : New status of the NAND operation. This parameter can be: -* - NAND_TIMEOUT_ERROR: when the previous operation generate -* a Timeout error -* - NAND_READY: when memory is ready for the next operation -* And the new status of the increment address operation. It can be: -* - NAND_VALID_ADDRESS: When the new address is valid address -* - NAND_INVALID_ADDRESS: When the new address is invalid address -*******************************************************************************/ -uint32_t FSMC_NAND_WriteSpareArea(uint8_t *pBuffer, NAND_ADDRESS Address, uint32_t NumSpareAreaTowrite) -{ - uint32_t index = 0x00, numsparesreawritten = 0x00, addressstatus = NAND_VALID_ADDRESS; - uint32_t status = NAND_READY, size = 0x00; - - while((NumSpareAreaTowrite != 0x00) && (addressstatus == NAND_VALID_ADDRESS) && (status == NAND_READY)) - { - /* Page write Spare area command and address */ - *(__IO uint8_t *)(Bank_NAND_ADDR | CMD_AREA) = NAND_CMD_AREA_C; - *(__IO uint8_t *)(Bank_NAND_ADDR | CMD_AREA) = NAND_CMD_WRITE0; - - *(__IO uint8_t *)(Bank_NAND_ADDR | ADDR_AREA) = 0x00; - *(__IO uint8_t *)(Bank_NAND_ADDR | ADDR_AREA) = ADDR_1st_CYCLE(ROW_ADDRESS); - *(__IO uint8_t *)(Bank_NAND_ADDR | ADDR_AREA) = ADDR_2nd_CYCLE(ROW_ADDRESS); - *(__IO uint8_t *)(Bank_NAND_ADDR | ADDR_AREA) = ADDR_3rd_CYCLE(ROW_ADDRESS); - - /* Calculate the size */ - size = NAND_SPARE_AREA_SIZE + (NAND_SPARE_AREA_SIZE * numsparesreawritten); - - /* Write the data */ - for(; index < size; index++) - { - *(__IO uint8_t *)(Bank_NAND_ADDR | DATA_AREA) = pBuffer[index]; - } - - *(__IO uint8_t *)(Bank_NAND_ADDR | CMD_AREA) = NAND_CMD_WRITE_TRUE1; - - /* Check status for successful operation */ - status = FSMC_NAND_GetStatus(); - - if(status == NAND_READY) - { - numsparesreawritten++; - - NumSpareAreaTowrite--; - - /* Calculate Next page Address */ - addressstatus = FSMC_NAND_AddressIncrement(&Address); - } - } - - return (status | addressstatus); -} - -/****************************************************************************** -* Function Name : FSMC_NAND_ReadSpareArea -* Description : This routine read the spare area information from the specified -* pages addresses. -* Input : - pBuffer: pointer on the Buffer to fill -* - Address: First page address -* - NumSpareAreaToRead: Number of Spare Area to read -* Output : None -* Return : New status of the NAND operation. This parameter can be: -* - NAND_TIMEOUT_ERROR: when the previous operation generate -* a Timeout error -* - NAND_READY: when memory is ready for the next operation -* And the new status of the increment address operation. It can be: -* - NAND_VALID_ADDRESS: When the new address is valid address -* - NAND_INVALID_ADDRESS: When the new address is invalid address -*******************************************************************************/ -uint32_t FSMC_NAND_ReadSpareArea(uint8_t *pBuffer, NAND_ADDRESS Address, uint32_t NumSpareAreaToRead) -{ - uint32_t numsparearearead = 0x00, index = 0x00, addressstatus = NAND_VALID_ADDRESS; - uint32_t status = NAND_READY, size = 0x00; - - while((NumSpareAreaToRead != 0x0) && (addressstatus == NAND_VALID_ADDRESS)) - { - /* Page Read command and page address */ - *(__IO uint8_t *)(Bank_NAND_ADDR | CMD_AREA) = NAND_CMD_AREA_C; - - *(__IO uint8_t *)(Bank_NAND_ADDR | ADDR_AREA) = 0x00; - *(__IO uint8_t *)(Bank_NAND_ADDR | ADDR_AREA) = ADDR_1st_CYCLE(ROW_ADDRESS); - *(__IO uint8_t *)(Bank_NAND_ADDR | ADDR_AREA) = ADDR_2nd_CYCLE(ROW_ADDRESS); - *(__IO uint8_t *)(Bank_NAND_ADDR | ADDR_AREA) = ADDR_3rd_CYCLE(ROW_ADDRESS); - - *(__IO uint8_t *)(Bank_NAND_ADDR | CMD_AREA) = NAND_CMD_AREA_TRUE1; - - /* Data Read */ - size = NAND_SPARE_AREA_SIZE + (NAND_SPARE_AREA_SIZE * numsparearearead); - - /* Get Data into Buffer */ - for ( ;index < size; index++) - { - pBuffer[index] = *(__IO uint8_t *)(Bank_NAND_ADDR | DATA_AREA); - } - - numsparearearead++; - - NumSpareAreaToRead--; - - /* Calculate page address */ - addressstatus = FSMC_NAND_AddressIncrement(&Address); - } - - status = FSMC_NAND_GetStatus(); - - return (status | addressstatus); -} - -/****************************************************************************** -* Function Name : FSMC_NAND_EraseBlock -* Description : This routine erase complete block from NAND FLASH -* Input : - Address: Any address into block to be erased -* Output : None -* Return : New status of the NAND operation. This parameter can be: -* - NAND_TIMEOUT_ERROR: when the previous operation generate -* a Timeout error -* - NAND_READY: when memory is ready for the next operation -*******************************************************************************/ -uint32_t FSMC_NAND_EraseBlock(NAND_ADDRESS Address) -{ - *(__IO uint8_t *)(Bank_NAND_ADDR | CMD_AREA) = NAND_CMD_ERASE0; - - *(__IO uint8_t *)(Bank_NAND_ADDR | ADDR_AREA) = ADDR_1st_CYCLE(ROW_ADDRESS); - *(__IO uint8_t *)(Bank_NAND_ADDR | ADDR_AREA) = ADDR_2nd_CYCLE(ROW_ADDRESS); - *(__IO uint8_t *)(Bank_NAND_ADDR | ADDR_AREA) = ADDR_3rd_CYCLE(ROW_ADDRESS); - - *(__IO uint8_t *)(Bank_NAND_ADDR | CMD_AREA) = NAND_CMD_ERASE1; - - return (FSMC_NAND_GetStatus()); -} - -/****************************************************************************** -* Function Name : FSMC_NAND_Reset -* Description : This routine reset the NAND FLASH -* Input : None -* Output : None -* Return : NAND_READY -*******************************************************************************/ -uint32_t FSMC_NAND_Reset(void) -{ - *(__IO uint8_t *)(Bank_NAND_ADDR | CMD_AREA) = NAND_CMD_RESET; - - return (NAND_READY); -} - -/****************************************************************************** -* Function Name : FSMC_NAND_GetStatus -* Description : Get the NAND operation status -* Input : None -* Output : None -* Return : New status of the NAND operation. This parameter can be: -* - NAND_TIMEOUT_ERROR: when the previous operation generate -* a Timeout error -* - NAND_READY: when memory is ready for the next operation -*******************************************************************************/ -uint32_t FSMC_NAND_GetStatus(void) -{ - uint32_t timeout = 0x1000000, status = NAND_READY; - - status = FSMC_NAND_ReadStatus(); - - /* Wait for a NAND operation to complete or a TIMEOUT to occur */ - while ((status != NAND_READY) &&( timeout != 0x00)) - { - status = FSMC_NAND_ReadStatus(); - timeout --; - } - - if(timeout == 0x00) - { - status = NAND_TIMEOUT_ERROR; - } - - /* Return the operation status */ - return (status); -} -/****************************************************************************** -* Function Name : FSMC_NAND_ReadStatus -* Description : Reads the NAND memory status using the Read status command -* Input : None -* Output : None -* Return : The status of the NAND memory. This parameter can be: -* - NAND_BUSY: when memory is busy -* - NAND_READY: when memory is ready for the next operation -* - NAND_ERROR: when the previous operation gererates error -*******************************************************************************/ -uint32_t FSMC_NAND_ReadStatus(void) -{ - uint32_t data = 0x00, status = NAND_BUSY; - - /* Read status operation ------------------------------------ */ - *(__IO uint8_t *)(Bank_NAND_ADDR | CMD_AREA) = NAND_CMD_STATUS; - data = *(__IO uint8_t *)(Bank_NAND_ADDR); - - if((data & NAND_ERROR) == NAND_ERROR) - { - status = NAND_ERROR; - } - else if((data & NAND_READY) == NAND_READY) - { - status = NAND_READY; - } - else - { - status = NAND_BUSY; - } - - return (status); -} - -/****************************************************************************** -* Function Name : NAND_AddressIncrement -* Description : Increment the NAND memory address -* Input : - Address: address to be incremented. -* Output : None -* Return : The new status of the increment address operation. It can be: -* - NAND_VALID_ADDRESS: When the new address is valid address -* - NAND_INVALID_ADDRESS: When the new address is invalid address -*******************************************************************************/ -uint32_t FSMC_NAND_AddressIncrement(NAND_ADDRESS* Address) -{ - uint32_t status = NAND_VALID_ADDRESS; - - Address->Page++; - - if(Address->Page == NAND_BLOCK_SIZE) - { - Address->Page = 0; - Address->Block++; - - if(Address->Block == NAND_ZONE_SIZE) - { - Address->Block = 0; - Address->Zone++; - - if(Address->Zone == NAND_MAX_ZONE) - { - status = NAND_INVALID_ADDRESS; - } - } - } - - return (status); -} - -/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/Libraries/Mass_Storage/src/hw_config.c b/bsp/stm32_radio/Libraries/Mass_Storage/src/hw_config.c deleted file mode 100644 index b1fb978854..0000000000 --- a/bsp/stm32_radio/Libraries/Mass_Storage/src/hw_config.c +++ /dev/null @@ -1,260 +0,0 @@ -/******************** (C) COPYRIGHT 2009 STMicroelectronics ******************** -* File Name : hw_config.c -* Author : MCD Application Team -* Version : V3.0.1 -* Date : 04/27/2009 -* Description : Hardware Configuration & Setup -******************************************************************************** -* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS -* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. -* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, -* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE -* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING -* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -/* Includes ------------------------------------------------------------------*/ -#include "hw_config.h" -#include "platform_config.h" -#include "mass_mal.h" -#include "usb_desc.h" -#include "usb_pwr.h" - -void Set_System(void) -{ - /* Enable and GPIOD clock */ - USB_Disconnect_Config(); - - /* MAL configuration */ - MAL_Config(); -} - -/******************************************************************************* -* Function Name : Set_USBClock -* Description : Configures USB Clock input (48MHz) -* Input : None. -* Return : None. -*******************************************************************************/ -void Set_USBClock(void) -{ - /* USBCLK = PLLCLK */ - RCC_USBCLKConfig(RCC_USBCLKSource_PLLCLK_1Div5); - - /* Enable USB clock */ - RCC_APB1PeriphClockCmd(RCC_APB1Periph_USB, ENABLE); -} - -/******************************************************************************* -* Function Name : Enter_LowPowerMode -* Description : Power-off system clocks and power while entering suspend mode -* Input : None. -* Return : None. -*******************************************************************************/ -void Enter_LowPowerMode(void) -{ - /* Set the device state to suspend */ - bDeviceState = SUSPENDED; -} - -/******************************************************************************* -* Function Name : Leave_LowPowerMode -* Description : Restores system clocks and power while exiting suspend mode -* Input : None. -* Return : None. -*******************************************************************************/ -void Leave_LowPowerMode(void) -{ - DEVICE_INFO *pInfo = &Device_Info; - - /* Set the device state to the correct state */ - if (pInfo->Current_Configuration != 0) - { - /* Device configured */ - bDeviceState = CONFIGURED; - } - else - { - bDeviceState = ATTACHED; - } - -} - -/******************************************************************************* -* Function Name : USB_Interrupts_Config -* Description : Configures the USB interrupts -* Input : None. -* Return : None. -*******************************************************************************/ -void USB_Interrupts_Config(void) -{ - NVIC_InitTypeDef NVIC_InitStructure; - - //NVIC_PriorityGroupConfig(NVIC_PriorityGroup_1); - - NVIC_InitStructure.NVIC_IRQChannel = USB_LP_CAN1_RX0_IRQn; - NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1; - NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1; - NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; - NVIC_Init(&NVIC_InitStructure); - - NVIC_InitStructure.NVIC_IRQChannel = USB_HP_CAN1_TX_IRQn; - NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1; - NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; - NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; - NVIC_Init(&NVIC_InitStructure); - -#if 0 - NVIC_InitStructure.NVIC_IRQChannel = SDIO_IRQn; - NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0; - NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; - NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; - NVIC_Init(&NVIC_InitStructure); -#endif /* USE_STM3210E_EVAL */ - -} - -/******************************************************************************* -* Function Name : Led_Config -* Description : configure the Read/Write LEDs. -* Input : None. -* Output : None. -* Return : None. -*******************************************************************************/ -void Led_Config(void) -{ -} - -/******************************************************************************* -* Function Name : Led_RW_ON -* Description : Turn ON the Read/Write LEDs. -* Input : None. -* Output : None. -* Return : None. -*******************************************************************************/ -void Led_RW_ON(void) -{ -#if (USB_USE_LED == 1) - GPIO_SetBits(USB_LED_PORT, USB_LED_PIN); -#endif -} - -/******************************************************************************* -* Function Name : Led_RW_OFF -* Description : Turn off the Read/Write LEDs. -* Input : None. -* Output : None. -* Return : None. -*******************************************************************************/ -void Led_RW_OFF(void) -{ -#if (USB_USE_LED == 1) - GPIO_ResetBits(USB_LED_PORT, USB_LED_PIN); -#endif -} -/******************************************************************************* -* Function Name : USB_Configured_LED -* Description : Turn ON the Read/Write LEDs. -* Input : None. -* Output : None. -* Return : None. -*******************************************************************************/ -void USB_Configured_LED(void) -{ - //GPIO_SetBits(USB_LED_PORT, GPIO_Pin_6); -} - -/******************************************************************************* -* Function Name : USB_NotConfigured_LED -* Description : Turn off the Read/Write LEDs. -* Input : None. -* Output : None. -* Return : None. -*******************************************************************************/ -void USB_NotConfigured_LED(void) -{ - //GPIO_ResetBits(USB_LED_PORT, GPIO_Pin_6); -} - -/******************************************************************************* -* Function Name : USB_Cable_Config -* Description : Software Connection/Disconnection of USB Cable. -* Input : None. -* Return : Status -*******************************************************************************/ -void USB_Cable_Config (FunctionalState NewState) -{ - if (NewState != DISABLE) - { - GPIO_SetBits(USB_DISCONNECT, USB_DISCONNECT_PIN); - } - else - { - GPIO_ResetBits(USB_DISCONNECT, USB_DISCONNECT_PIN); - } -} - -/******************************************************************************* -* Function Name : Get_SerialNum. -* Description : Create the serial number string descriptor. -* Input : None. -* Output : None. -* Return : None. -*******************************************************************************/ -void Get_SerialNum(void) -{ - uint32_t Device_Serial0, Device_Serial1, Device_Serial2; - - Device_Serial0 = *(__IO uint32_t*)(0x1FFFF7E8); - Device_Serial1 = *(__IO uint32_t*)(0x1FFFF7EC); - Device_Serial2 = *(__IO uint32_t*)(0x1FFFF7F0); - - if (Device_Serial0 != 0) - { - MASS_StringSerial[2] = (uint8_t)(Device_Serial0 & 0x000000FF); - MASS_StringSerial[4] = (uint8_t)((Device_Serial0 & 0x0000FF00) >> 8); - MASS_StringSerial[6] = (uint8_t)((Device_Serial0 & 0x00FF0000) >> 16); - MASS_StringSerial[8] = (uint8_t)((Device_Serial0 & 0xFF000000) >> 24); - - MASS_StringSerial[10] = (uint8_t)(Device_Serial1 & 0x000000FF); - MASS_StringSerial[12] = (uint8_t)((Device_Serial1 & 0x0000FF00) >> 8); - MASS_StringSerial[14] = (uint8_t)((Device_Serial1 & 0x00FF0000) >> 16); - MASS_StringSerial[16] = (uint8_t)((Device_Serial1 & 0xFF000000) >> 24); - - MASS_StringSerial[18] = (uint8_t)(Device_Serial2 & 0x000000FF); - MASS_StringSerial[20] = (uint8_t)((Device_Serial2 & 0x0000FF00) >> 8); - MASS_StringSerial[22] = (uint8_t)((Device_Serial2 & 0x00FF0000) >> 16); - MASS_StringSerial[24] = (uint8_t)((Device_Serial2 & 0xFF000000) >> 24); - } -} - -/******************************************************************************* -* Function Name : MAL_Config -* Description : MAL_layer configuration -* Input : None. -* Return : None. -*******************************************************************************/ -void MAL_Config(void) -{ - MAL_Init(0); -} - -/******************************************************************************* -* Function Name : USB_Disconnect_Config -* Description : Disconnect pin configuration -* Input : None. -* Return : None. -*******************************************************************************/ -void USB_Disconnect_Config(void) -{ - GPIO_InitTypeDef GPIO_InitStructure; - - RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIO_DISCONNECT, ENABLE); - - /* config USB cable pin */ - GPIO_InitStructure.GPIO_Pin = USB_DISCONNECT_PIN; - GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz; - GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP; - GPIO_Init(USB_DISCONNECT, &GPIO_InitStructure); -} - -/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/Libraries/Mass_Storage/src/mass_mal.c b/bsp/stm32_radio/Libraries/Mass_Storage/src/mass_mal.c deleted file mode 100644 index 37cef20559..0000000000 --- a/bsp/stm32_radio/Libraries/Mass_Storage/src/mass_mal.c +++ /dev/null @@ -1,119 +0,0 @@ -/******************** (C) COPYRIGHT 2009 STMicroelectronics ******************** -* File Name : mass_mal.c -* Author : MCD Application Team -* Version : V3.0.1 -* Date : 04/27/2009 -* Description : Medium Access Layer interface -******************************************************************************** -* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS -* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. -* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, -* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE -* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING -* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -/* Includes ------------------------------------------------------------------*/ -#include "platform_config.h" -#include "mass_mal.h" -#include "rtthread.h" - -uint32_t Mass_Memory_Size[3]; -uint32_t Mass_Block_Size[3]; -uint32_t Mass_Block_Count[3]; - -/* logic unit count; the first is 0 */ -uint32_t Max_Lun = 2; - -rt_device_t dev_sdio = RT_NULL; -rt_device_t dev_spi_flash = RT_NULL; -#if (USB_USE_AUTO_REMOVE == 1) -unsigned long test_unit_ready_last = 0; -#endif - -uint16_t MAL_Init(uint8_t lun) -{ - uint16_t status = MAL_OK; - - switch (lun) - { - case 0: - status = MAL_OK; - break; - case 1: - status = MAL_OK; - break; - case 2: - status = MAL_FAIL; - break; - default: - return MAL_FAIL; - } - return status; -} - -uint16_t MAL_Write(uint8_t lun, uint32_t Memory_Offset, uint32_t *Writebuff, uint16_t Transfer_Length) -{ -#if (USB_USE_AUTO_REMOVE == 1) - test_unit_ready_last = rt_tick_get(); -#endif - switch (lun) - { - case 0: - { - dev_sdio->write(dev_sdio,Memory_Offset,Writebuff,Transfer_Length); - } - break; - case 1: - { - dev_spi_flash->write(dev_spi_flash,Memory_Offset,Writebuff,Transfer_Length); - } - break; - default: - return MAL_FAIL; - } - return MAL_OK; -} - -uint16_t MAL_Read(uint8_t lun, uint32_t Memory_Offset, uint32_t *Readbuff, uint16_t Transfer_Length) -{ -#if (USB_USE_AUTO_REMOVE == 1) - test_unit_ready_last = rt_tick_get(); -#endif - switch (lun) - { - case 0: - { - dev_sdio->read(dev_sdio,Memory_Offset,Readbuff,Transfer_Length); - } - break; - case 1: - { - dev_spi_flash->read(dev_spi_flash,Memory_Offset,Readbuff,Transfer_Length); - } - break; - default: - return MAL_FAIL; - } - return MAL_OK; -} - -uint16_t MAL_GetStatus (uint8_t lun) -{ -#if (USB_USE_AUTO_REMOVE == 1) - test_unit_ready_last = rt_tick_get(); -#endif - switch(lun) - { - case 0: - return MAL_OK; - case 1: - return MAL_OK; - case 2: - return MAL_FAIL; - default: - return MAL_FAIL; - } -} - -/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/Libraries/Mass_Storage/src/memory.c b/bsp/stm32_radio/Libraries/Mass_Storage/src/memory.c deleted file mode 100644 index 5245d09c53..0000000000 --- a/bsp/stm32_radio/Libraries/Mass_Storage/src/memory.c +++ /dev/null @@ -1,168 +0,0 @@ -/******************** (C) COPYRIGHT 2009 STMicroelectronics ******************** -* File Name : memory.c -* Author : MCD Application Team -* Version : V3.1.0 -* Date : 10/30/2009 -* Description : Memory management layer -******************************************************************************** -* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS -* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. -* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, -* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE -* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING -* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -/* Includes ------------------------------------------------------------------*/ - -#include "memory.h" -#include "usb_scsi.h" -#include "usb_bot.h" -#include "usb_regs.h" -#include "usb_mem.h" -#include "usb_conf.h" -#include "hw_config.h" -#include "mass_mal.h" -#include "usb_lib.h" - -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ -/* Private macro -------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -__IO uint32_t Block_Read_count = 0; -__IO uint32_t Block_offset; -__IO uint32_t Counter = 0; -uint32_t Idx; -uint32_t Data_Buffer[BULK_MAX_PACKET_SIZE *2]; /* 512 bytes*/ -uint8_t TransferState = TXFR_IDLE; -/* Extern variables ----------------------------------------------------------*/ -extern uint8_t Bulk_Data_Buff[BULK_MAX_PACKET_SIZE]; /* data buffer*/ -extern uint16_t Data_Len; -extern uint8_t Bot_State; -extern Bulk_Only_CBW CBW; -extern Bulk_Only_CSW CSW; -extern uint32_t Mass_Memory_Size[2]; -extern uint32_t Mass_Block_Size[2]; - -/* Private function prototypes -----------------------------------------------*/ -/* Extern function prototypes ------------------------------------------------*/ -/* Private functions ---------------------------------------------------------*/ - -/******************************************************************************* -* Function Name : Read_Memory -* Description : Handle the Read operation from the microSD card. -* Input : None. -* Output : None. -* Return : None. -*******************************************************************************/ -void Read_Memory(uint8_t lun, uint32_t Memory_Offset, uint32_t Transfer_Length) -{ - static uint32_t Offset, Length; - - if (TransferState == TXFR_IDLE ) - { - Offset = Memory_Offset * Mass_Block_Size[lun]; - Length = Transfer_Length * Mass_Block_Size[lun]; - TransferState = TXFR_ONGOING; - } - - if (TransferState == TXFR_ONGOING ) - { - if (!Block_Read_count) - { - MAL_Read(lun , - Offset , - Data_Buffer, - Mass_Block_Size[lun]); - - USB_SIL_Write(EP1_IN, (uint8_t *)Data_Buffer, BULK_MAX_PACKET_SIZE); - - Block_Read_count = Mass_Block_Size[lun] - BULK_MAX_PACKET_SIZE; - Block_offset = BULK_MAX_PACKET_SIZE; - } - else - { - USB_SIL_Write(EP1_IN, (uint8_t *)Data_Buffer + Block_offset, BULK_MAX_PACKET_SIZE); - - Block_Read_count -= BULK_MAX_PACKET_SIZE; - Block_offset += BULK_MAX_PACKET_SIZE; - } - - SetEPTxCount(ENDP1, BULK_MAX_PACKET_SIZE); - SetEPTxStatus(ENDP1, EP_TX_VALID); - Offset += BULK_MAX_PACKET_SIZE; - Length -= BULK_MAX_PACKET_SIZE; - - CSW.dDataResidue -= BULK_MAX_PACKET_SIZE; - Led_RW_ON(); - } - if (Length == 0) - { - Block_Read_count = 0; - Block_offset = 0; - Offset = 0; - Bot_State = BOT_DATA_IN_LAST; - TransferState = TXFR_IDLE; - Led_RW_OFF(); - } -} - -/******************************************************************************* -* Function Name : Write_Memory -* Description : Handle the Write operation to the microSD card. -* Input : None. -* Output : None. -* Return : None. -*******************************************************************************/ -void Write_Memory (uint8_t lun, uint32_t Memory_Offset, uint32_t Transfer_Length) -{ - - static uint32_t W_Offset, W_Length; - - uint32_t temp = Counter + 64; - - if (TransferState == TXFR_IDLE ) - { - W_Offset = Memory_Offset * Mass_Block_Size[lun]; - W_Length = Transfer_Length * Mass_Block_Size[lun]; - TransferState = TXFR_ONGOING; - } - - if (TransferState == TXFR_ONGOING ) - { - - for (Idx = 0 ; Counter < temp; Counter++) - { - *((uint8_t *)Data_Buffer + Counter) = Bulk_Data_Buff[Idx++]; - } - - W_Offset += Data_Len; - W_Length -= Data_Len; - - if (!(W_Length % Mass_Block_Size[lun])) - { - Counter = 0; - MAL_Write(lun , - W_Offset - Mass_Block_Size[lun], - Data_Buffer, - Mass_Block_Size[lun]); - } - - CSW.dDataResidue -= Data_Len; - #ifndef STM32F10X_CL - SetEPRxStatus(ENDP2, EP_RX_VALID); /* enable the next transaction*/ - #endif /* STM32F10X_CL */ - - Led_RW_ON(); - } - - if ((W_Length == 0) || (Bot_State == BOT_CSW_Send)) - { - Counter = 0; - Set_CSW (CSW_CMD_PASSED, SEND_CSW_ENABLE); - TransferState = TXFR_IDLE; - Led_RW_OFF(); - } -} -/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/ - diff --git a/bsp/stm32_radio/Libraries/Mass_Storage/src/nand_if.c b/bsp/stm32_radio/Libraries/Mass_Storage/src/nand_if.c deleted file mode 100644 index 5ba38716a9..0000000000 --- a/bsp/stm32_radio/Libraries/Mass_Storage/src/nand_if.c +++ /dev/null @@ -1,544 +0,0 @@ -/******************** (C) COPYRIGHT 2009 STMicroelectronics ******************** -* File Name : nand_if.c -* Author : MCD Application Team -* Version : V3.0.1 -* Date : 04/27/2009 -* Description : manage NAND operationx state machine -******************************************************************************** -* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS -* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. -* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, -* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE -* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING -* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ -#include "platform_config.h" - -#ifdef USE_STM3210E_EVAL -/* Includes ------------------------------------------------------------------*/ -#include "nand_if.h" -#include "mass_mal.h" -#include "fsmc_nand.h" -#include "memory.h" -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ -/* extern variables-----------------------------------------------------------*/ -extern uint32_t SCSI_LBA; -extern uint32_t SCSI_BlkLen; -/* Private variables ---------------------------------------------------------*/ -uint16_t LUT[1024]; //Look Up Table Buffer -WRITE_STATE Write_State; -BLOCK_STATE Block_State; -NAND_ADDRESS wAddress, fAddress; -uint16_t phBlock, LogAddress, Initial_Page, CurrentZone = 0; -uint16_t Written_Pages = 0; - -uint16_t LUT[1024]; //Look Up Table Buffer -/* Private function prototypes -----------------------------------------------*/ -/* Private functions ---------------------------------------------------------*/ -static uint16_t NAND_CleanLUT(uint8_t ZoneNbr); -static NAND_ADDRESS NAND_GetAddress(uint32_t Address); -static uint16_t NAND_GetFreeBlock(void); -static uint16_t NAND_Write_Cleanup(void); -SPARE_AREA ReadSpareArea(uint32_t address); -static uint16_t NAND_Copy(NAND_ADDRESS Address_Src, NAND_ADDRESS Address_Dest, uint16_t PageToCopy); -static NAND_ADDRESS NAND_ConvertPhyAddress(uint32_t Address); -static uint16_t NAND_BuildLUT(uint8_t ZoneNbr); - -/******************************************************************************* -* Function Name : NAND_Init -* Description : Init NAND Interface -* Input : None -* Output : None -* Return : Status -*******************************************************************************/ -uint16_t NAND_Init(void) -{ - uint16_t Status = NAND_OK; - - FSMC_NAND_Init(); - Status = NAND_BuildLUT(0); - Write_State = WRITE_IDLE; - return Status; -} - -/******************************************************************************* -* Function Name : NAND_Write -* Description : write one sector by once -* Input : None -* Output : None -* Return : Status -*******************************************************************************/ -uint16_t NAND_Write(uint32_t Memory_Offset, uint32_t *Writebuff, uint16_t Transfer_Length) -{ - /* check block status and calculate start and end addreses */ - wAddress = NAND_GetAddress(Memory_Offset / 512); - - /*check Zone: if second zone is requested build second LUT*/ - if (wAddress.Zone != CurrentZone) - { - CurrentZone = wAddress.Zone; - NAND_BuildLUT(CurrentZone); - } - - phBlock = LUT[wAddress.Block]; /* Block Index + flags */ - LogAddress = wAddress.Block ; /* save logical block */ - - /* IDLE state */ - /****************/ - if ( Write_State == WRITE_IDLE) - {/* Idle state */ - - if (phBlock & USED_BLOCK) - { /* USED BLOCK */ - - Block_State = OLD_BLOCK; - /* Get a free Block for swap */ - fAddress.Block = NAND_GetFreeBlock(); - fAddress.Zone = wAddress.Zone; - Initial_Page = fAddress.Page = wAddress.Page; - - /* write the new page */ - FSMC_NAND_WriteSmallPage((uint8_t *)Writebuff, fAddress, PAGE_TO_WRITE); - Written_Pages++; - - /* get physical block */ - wAddress.Block = phBlock & 0x3FF; - - - if (Written_Pages == SCSI_BlkLen) - { - NAND_Write_Cleanup(); - Written_Pages = 0; - return NAND_OK; - } - else - { - if (wAddress.Page == (NAND_BLOCK_SIZE - 1)) - { - NAND_Write_Cleanup(); - return NAND_OK; - } - Write_State = WRITE_ONGOING; - return NAND_OK; - } - } - else - {/* UNUSED BLOCK */ - - Block_State = UNUSED_BLOCK; - /* write the new page */ - wAddress.Block = phBlock & 0x3FF; - FSMC_NAND_WriteSmallPage( (uint8_t *)Writebuff , wAddress, PAGE_TO_WRITE); - - Written_Pages++; - if (Written_Pages == SCSI_BlkLen) - { - Written_Pages = 0; - NAND_Write_Cleanup(); - return NAND_OK; - } - else - { - Write_State = WRITE_ONGOING; - return NAND_OK; - } - } - } - /* WRITE state */ - /***************/ - if ( Write_State == WRITE_ONGOING) - {/* Idle state */ - if (phBlock & USED_BLOCK) - { /* USED BLOCK */ - - wAddress.Block = phBlock & 0x3FF; - Block_State = OLD_BLOCK; - fAddress.Page = wAddress.Page; - - /* check if next pages are in next block */ - if (wAddress.Page == (NAND_BLOCK_SIZE - 1)) - { - /* write Last page */ - FSMC_NAND_WriteSmallPage( (uint8_t *)Writebuff , fAddress, PAGE_TO_WRITE); - Written_Pages++; - if (Written_Pages == SCSI_BlkLen) - { - Written_Pages = 0; - } - /* Clean up and Update the LUT */ - NAND_Write_Cleanup(); - Write_State = WRITE_IDLE; - return NAND_OK; - } - - /* write next page */ - FSMC_NAND_WriteSmallPage( (uint8_t *)Writebuff , fAddress, PAGE_TO_WRITE); - Written_Pages++; - if (Written_Pages == SCSI_BlkLen) - { - Write_State = WRITE_IDLE; - NAND_Write_Cleanup(); - Written_Pages = 0; - } - - } - else - {/* UNUSED BLOCK */ - wAddress.Block = phBlock & 0x3FF; - /* check if it is the last page in prev block */ - if (wAddress.Page == (NAND_BLOCK_SIZE - 1)) - { - /* write Last page */ - FSMC_NAND_WriteSmallPage( (uint8_t *)Writebuff , wAddress, PAGE_TO_WRITE); - Written_Pages++; - if (Written_Pages == SCSI_BlkLen) - { - Written_Pages = 0; - } - - /* Clean up and Update the LUT */ - NAND_Write_Cleanup(); - Write_State = WRITE_IDLE; - - - - return NAND_OK; - } - /* write next page in same block */ - FSMC_NAND_WriteSmallPage( (uint8_t *)Writebuff , wAddress, PAGE_TO_WRITE); - Written_Pages++; - if (Written_Pages == SCSI_BlkLen) - { - Write_State = WRITE_IDLE; - NAND_Write_Cleanup(); - Written_Pages = 0; - } - } - } - return NAND_OK; -} - -/******************************************************************************* -* Function Name : NAND_Read -* Description : Read sectors -* Input : None -* Output : None -* Return : Status -*******************************************************************************/ -uint16_t NAND_Read(uint32_t Memory_Offset, uint32_t *Readbuff, uint16_t Transfer_Length) -{ - NAND_ADDRESS phAddress; - - phAddress = NAND_GetAddress(Memory_Offset / 512); - - if (phAddress.Zone != CurrentZone) - { - CurrentZone = phAddress.Zone; - NAND_BuildLUT(CurrentZone); - } - - if (LUT [phAddress.Block] & BAD_BLOCK) - { - return NAND_FAIL; - } - else - { - phAddress.Block = LUT [phAddress.Block] & ~ (USED_BLOCK | VALID_BLOCK); - FSMC_NAND_ReadSmallPage ( (uint8_t *)Readbuff , phAddress, Transfer_Length / 512); - } - return NAND_OK; -} - -/******************************************************************************* -* Function Name : NAND_CleanLUT -* Description : Erase old blocks & rebuild the look up table -* Input : None -* Output : None -* Return : Status -*******************************************************************************/ -static uint16_t NAND_CleanLUT (uint8_t ZoneNbr) -{ -#ifdef WEAR_LEVELLING_SUPPORT - uint16_t BlockIdx, LUT_Item; -#endif - /* Rebuild the LUT for the current zone */ - NAND_BuildLUT (ZoneNbr); - -#ifdef WEAR_LEVELLING_SUPPORT - /* Wear Leveling : circular use of free blocks */ - LUT_Item = LUT [BlockIdx] - for (BlockIdx == MAX_LOG_BLOCKS_PER_ZONE ; BlockIdx < MAX_LOG_BLOCKS_PER_ZONE + WEAR_DEPTH ; BlockIdx++) - { - LUT [BlockIdx] = LUT [BlockIdx + 1]; - } - LUT [ MAX_LOG_BLOCKS_PER_ZONE + WEAR_DEPTH - 1] = LUT_Item ; -#endif - - return NAND_OK; -} - -/******************************************************************************* -* Function Name : NAND_GetAddress -* Description : Translate logical address into a phy one -* Input : None -* Output : None -* Return : Status -*******************************************************************************/ -static NAND_ADDRESS NAND_GetAddress (uint32_t Address) -{ - NAND_ADDRESS Address_t; - - Address_t.Page = Address & (NAND_BLOCK_SIZE - 1); - Address_t.Block = Address / NAND_BLOCK_SIZE; - Address_t.Zone = 0; - - while (Address_t.Block >= MAX_LOG_BLOCKS_PER_ZONE) - { - Address_t.Block -= MAX_LOG_BLOCKS_PER_ZONE; - Address_t.Zone++; - } - return Address_t; -} - -/******************************************************************************* -* Function Name : NAND_GetFreeBlock -* Description : Look for a free block for data exchange -* Input : None -* Output : None -* Return : Status -*******************************************************************************/ -static uint16_t NAND_GetFreeBlock (void) -{ - return LUT[MAX_LOG_BLOCKS_PER_ZONE]& ~(USED_BLOCK | VALID_BLOCK); -} - -/******************************************************************************* -* Function Name : ReadSpareArea -* Description : Check used block -* Input : None -* Output : None -* Return : Status -*******************************************************************************/ -SPARE_AREA ReadSpareArea (uint32_t address) -{ - SPARE_AREA t; - uint8_t Buffer[16]; - NAND_ADDRESS address_s; - address_s = NAND_ConvertPhyAddress(address); - FSMC_NAND_ReadSpareArea(Buffer , address_s, 1) ; - - t = *(SPARE_AREA *)Buffer; - - return t; -} - -/******************************************************************************* -* Function Name : NAND_Copy -* Description : Copy page -* Input : None -* Output : None -* Return : Status -*******************************************************************************/ -static uint16_t NAND_Copy (NAND_ADDRESS Address_Src, NAND_ADDRESS Address_Dest, uint16_t PageToCopy) -{ - uint8_t Copybuff[512]; - for ( ; PageToCopy > 0 ; PageToCopy-- ) - { - FSMC_NAND_ReadSmallPage ((uint8_t *)Copybuff, Address_Src , 1 ); - FSMC_NAND_WriteSmallPage ((uint8_t *)Copybuff, Address_Dest, 1); - FSMC_NAND_AddressIncrement(&Address_Src); - FSMC_NAND_AddressIncrement(&Address_Dest); - } - - return NAND_OK; -} - -/******************************************************************************* -* Function Name : NAND_Format -* Description : Format the entire NAND flash -* Input : None -* Output : None -* Return : Status -*******************************************************************************/ -uint16_t NAND_Format (void) -{ - NAND_ADDRESS phAddress; - SPARE_AREA SpareArea; - uint32_t BlockIndex; - - for (BlockIndex = 0 ; BlockIndex < NAND_ZONE_SIZE * NAND_MAX_ZONE; BlockIndex++) - { - phAddress = NAND_ConvertPhyAddress(BlockIndex * NAND_BLOCK_SIZE ); - SpareArea = ReadSpareArea(BlockIndex * NAND_BLOCK_SIZE); - - if((SpareArea.DataStatus != 0)||(SpareArea.BlockStatus != 0)){ - FSMC_NAND_EraseBlock (phAddress); - } - } - NAND_BuildLUT(0); - return NAND_OK; -} - -/******************************************************************************* -* Function Name : NAND_Write_Cleanup -* Description : None -* Input : None -* Output : None -* Return : Status -*******************************************************************************/ -static uint16_t NAND_Write_Cleanup (void) -{ - uint16_t tempSpareArea [8]; - uint16_t Page_Back; - - if ( Block_State == OLD_BLOCK ) - { - /* precopy old first pages */ - if (Initial_Page != 0) - { - Page_Back = wAddress.Page; - fAddress.Page = wAddress.Page = 0; - NAND_Copy (wAddress, fAddress, Initial_Page); - wAddress.Page = Page_Back ; - } - - /* postcopy remaining pages */ - if ((NAND_BLOCK_SIZE - (wAddress.Page + 1)) != 0) - { - FSMC_NAND_AddressIncrement(&wAddress); - fAddress.Page = wAddress.Page; - NAND_Copy (wAddress, fAddress, NAND_BLOCK_SIZE - wAddress.Page); - } - - /* assign logical address to new block */ - tempSpareArea [0] = LogAddress | USED_BLOCK ; - tempSpareArea [1] = 0xFFFF; - tempSpareArea [2] = 0xFFFF; - - fAddress.Page = 0x00; - FSMC_NAND_WriteSpareArea( (uint8_t *)tempSpareArea , fAddress , 1); - - /* erase old block */ - FSMC_NAND_EraseBlock(wAddress); - NAND_CleanLUT(wAddress.Zone); - } - else - {/* unused block case */ - /* assign logical address to the new used block */ - tempSpareArea [0] = LogAddress | USED_BLOCK ; - tempSpareArea [1] = 0xFFFF; - tempSpareArea [2] = 0xFFFF; - - wAddress.Page = 0x00; - FSMC_NAND_WriteSpareArea((uint8_t *)tempSpareArea , wAddress, 1); - NAND_CleanLUT(wAddress.Zone); - } - return NAND_OK; -} - -/******************************************************************************* -* Function Name : NAND_ConvertPhyAddress -* Description : None -* Input : physical Address -* Output : None -* Return : Status -*******************************************************************************/ -static NAND_ADDRESS NAND_ConvertPhyAddress (uint32_t Address) -{ - NAND_ADDRESS Address_t; - - Address_t.Page = Address & (NAND_BLOCK_SIZE - 1); - Address_t.Block = Address / NAND_BLOCK_SIZE; - Address_t.Zone = 0; - - while (Address_t.Block >= MAX_PHY_BLOCKS_PER_ZONE) - { - Address_t.Block -= MAX_PHY_BLOCKS_PER_ZONE; - Address_t.Zone++; - } - return Address_t; -} - -/******************************************************************************* -* Function Name : NAND_BuildLUT -* Description : Build the look up table -* Input : None -* Output : None -* Return : Status -* !!!! NOTE : THIS ALGORITHM IS A SUBJECT OF PATENT FOR STMICROELECTRONICS !!!!! -*******************************************************************************/ -static uint16_t NAND_BuildLUT (uint8_t ZoneNbr) -{ - - uint16_t pBadBlock, pCurrentBlock, pFreeBlock; - SPARE_AREA SpareArea; - /***************************************************************************** - 1st step : Init. - *****************************************************************************/ - /*Init the LUT (assume all blocks free) */ - for (pCurrentBlock = 0 ; pCurrentBlock < MAX_PHY_BLOCKS_PER_ZONE ; pCurrentBlock++) - { - LUT[pCurrentBlock] = FREE_BLOCK; /* 12th bit is set to 1 */ - } - - /* Init Pointers */ - pBadBlock = MAX_PHY_BLOCKS_PER_ZONE - 1; - pCurrentBlock = 0; - - /***************************************************************************** - 2nd step : locate used and bad blocks - *****************************************************************************/ - - while (pCurrentBlock < MAX_PHY_BLOCKS_PER_ZONE) - { - - SpareArea = ReadSpareArea(pCurrentBlock * NAND_BLOCK_SIZE + (ZoneNbr * NAND_BLOCK_SIZE * MAX_PHY_BLOCKS_PER_ZONE)); - - if ((SpareArea.DataStatus == 0) || (SpareArea.BlockStatus == 0)) - { - - LUT[pBadBlock--] |= pCurrentBlock | (uint16_t)BAD_BLOCK ; - LUT[pCurrentBlock] &= (uint16_t)~FREE_BLOCK; - if (pBadBlock == MAX_LOG_BLOCKS_PER_ZONE) - { - return NAND_FAIL; - } - } - else if (SpareArea.LogicalIndex != 0xFFFF) - { - - LUT[SpareArea.LogicalIndex & 0x3FF] |= pCurrentBlock | VALID_BLOCK | USED_BLOCK; - LUT[pCurrentBlock] &= (uint16_t)( ~FREE_BLOCK); - } - pCurrentBlock++ ; - } - - /***************************************************************************** - 3rd step : locate Free Blocks by scanning the LUT already built partially - *****************************************************************************/ - pFreeBlock = 0; - for (pCurrentBlock = 0 ; pCurrentBlock < MAX_PHY_BLOCKS_PER_ZONE ; pCurrentBlock++ ) - { - - if ( !(LUT[pCurrentBlock]& USED_BLOCK)) - { - do - { - if (LUT[pFreeBlock] & FREE_BLOCK) - { - - LUT [pCurrentBlock] |= pFreeBlock; - LUT [pFreeBlock] &= ~FREE_BLOCK; - break; - } - pFreeBlock++; - } - while ( pFreeBlock < MAX_PHY_BLOCKS_PER_ZONE ); - } - } - return NAND_OK; -} -#endif - -/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/Libraries/Mass_Storage/src/scsi_data.c b/bsp/stm32_radio/Libraries/Mass_Storage/src/scsi_data.c deleted file mode 100644 index 828ce19400..0000000000 --- a/bsp/stm32_radio/Libraries/Mass_Storage/src/scsi_data.c +++ /dev/null @@ -1,164 +0,0 @@ -/******************** (C) COPYRIGHT 2009 STMicroelectronics ******************** -* File Name : scsi_data.c -* Author : MCD Application Team -* Version : V3.0.1 -* Date : 04/27/2009 -* Description : Initialization of the SCSI data -******************************************************************************** -* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS -* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. -* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, -* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE -* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING -* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -/* Includes ------------------------------------------------------------------*/ -#include "usb_scsi.h" -#include "memory.h" -uint8_t Page00_Inquiry_Data[] = -{ - 0x00, /* PERIPHERAL QUALIFIER & PERIPHERAL DEVICE TYPE*/ - 0x00, - 0x00, - 0x00, - 0x00 /* Supported Pages 00*/ -}; -uint8_t Standard_Inquiry_Data1[] = -{ - 0x00, /* Direct Access Device */ - 0x80, /* RMB = 1: Removable Medium */ - 0x02, /* Version: No conformance claim to standard */ - 0x02, - - 36 - 4, /* Additional Length */ - 0x00, /* SCCS = 1: Storage Controller Component */ - 0x00, - 0x00, - /* Vendor Identification */ - 'S', 'T', 'M', '3', '2', ' ', ' ', ' ', - /* Product Identification */ - 'n', 'e', 't', 'r', 'a', 'd', 'i', 'o', ' ', - 'D', 'I', 'S', 'K', '1', ' ', ' ', - /* Product Revision Level */ - '1', '.', '0', ' ' -}; -uint8_t Standard_Inquiry_Data2[] = -{ - 0x00, /* Direct Access Device */ - 0x80, /* RMB = 1: Removable Medium */ - - 0x02, /* Version: No conformance claim to standard */ - 0x02, /* Êý¾ÝÏìÓ¦¸ñʽ */ - - 36 - 4, /* ¸½¼ÓÊý¾Ý³¤¶È£¬Îª31×Ö½Ú */ - 0x00, /* SCCS = 1: Storage Controller Component */ - 0x00, - 0x00, - /* Vendor Identification */ - 'S', 'T', 'M', '3', '2', ' ', ' ', ' ', - /* Product Identification */ - 'n', 'e', 't', 'r', 'a', 'd', 'i', 'o', ' ', - 'D', 'I', 'S', 'K', '2', ' ', ' ', - /* Product Revision Level */ - '1', '.', '0', ' ' -}; -uint8_t Standard_Inquiry_Data3[] = -{ - 0x00, /* Direct Access Device */ - 0x80, /* RMB = 1: Removable Medium */ - - 0x02, /* Version: No conformance claim to standard */ - 0x02, /* Êý¾ÝÏìÓ¦¸ñʽ */ - - 36 - 4, /* ¸½¼ÓÊý¾Ý³¤¶È£¬Îª31×Ö½Ú */ - 0x00, /* SCCS = 1: Storage Controller Component */ - 0x00, - 0x00, - /* Vendor Identification */ - 'S', 'T', 'M', '3', '2', ' ', ' ', ' ', - /* Product Identification */ - 'n', 'e', 't', 'r', 'a', 'd', 'i', 'o', ' ', - 'D', 'I', 'S', 'K', '3', ' ', ' ', - /* Product Revision Level */ - '1', '.', '0', ' ' -}; -/*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/ -uint8_t Mode_Sense6_data[] = -{ - 0x03, - 0x00, - 0x00, - 0x00, -}; - -/*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/ - -uint8_t Mode_Sense10_data[] = -{ - 0x00, - 0x06, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00 -}; -uint8_t Scsi_Sense_Data[] = -{ - 0x70, /*RespCode*/ - 0x00, /*SegmentNumber*/ - NO_SENSE, /* Sens_Key*/ - 0x00, - 0x00, - 0x00, - 0x00, /*Information*/ - 0x0A, /*AdditionalSenseLength*/ - 0x00, - 0x00, - 0x00, - 0x00, /*CmdInformation*/ - NO_SENSE, /*Asc*/ - 0x00, /*ASCQ*/ - 0x00, /*FRUC*/ - 0x00, /*TBD*/ - 0x00, - 0x00 /*SenseKeySpecific*/ -}; -uint8_t ReadCapacity10_Data[] = -{ - /* Last Logical Block */ - 0, - 0, - 0, - 0, - - /* Block Length */ - 0, - 0, - 0, - 0 -}; - -uint8_t ReadFormatCapacity_Data [] = -{ - 0x00, - 0x00, - 0x00, - 0x08, /* Capacity List Length */ - - /* Block Count */ - 0, - 0, - 0, - 0, - - /* Block Length */ - 0x02,/* Descriptor Code: Formatted Media */ - 0, - 0, - 0 -}; - -/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/Libraries/Mass_Storage/src/usb_bot.c b/bsp/stm32_radio/Libraries/Mass_Storage/src/usb_bot.c deleted file mode 100644 index 49ace5636f..0000000000 --- a/bsp/stm32_radio/Libraries/Mass_Storage/src/usb_bot.c +++ /dev/null @@ -1,335 +0,0 @@ -/******************** (C) COPYRIGHT 2009 STMicroelectronics ******************** -* File Name : usb_bot.c -* Author : MCD Application Team -* Version : V3.0.1 -* Date : 04/27/2009 -* Description : BOT State Machine management -******************************************************************************** -* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS -* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. -* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, -* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE -* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING -* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -/* Includes ------------------------------------------------------------------*/ -#include "usb_scsi.h" -#include "hw_config.h" -#include "usb_regs.h" -#include "usb_mem.h" -#include "usb_conf.h" -#include "usb_bot.h" -#include "memory.h" - -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ -/* Private macro -------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -uint8_t Bot_State; -uint8_t Bulk_Data_Buff[BULK_MAX_PACKET_SIZE]; /* data buffer*/ -uint16_t Data_Len; -Bulk_Only_CBW CBW; -Bulk_Only_CSW CSW; -uint32_t SCSI_LBA , SCSI_BlkLen; -extern uint32_t Max_Lun; -/* Extern variables ----------------------------------------------------------*/ -/* Private function prototypes -----------------------------------------------*/ -/* Extern function prototypes ------------------------------------------------*/ -/* Private functions ---------------------------------------------------------*/ - -/******************************************************************************* -* Function Name : Mass_Storage_In -* Description : Mass Storage IN transfer. -* Input : None. -* Output : None. -* Return : None. -*******************************************************************************/ -void Mass_Storage_In (void) -{ - switch (Bot_State) - { - case BOT_CSW_Send: - case BOT_ERROR: - Bot_State = BOT_IDLE; - SetEPRxStatus(ENDP2, EP_RX_VALID);/* enable the Endpoint to recive the next cmd*/ - break; - case BOT_DATA_IN: - switch (CBW.CB[0]) - { - case SCSI_READ10: - SCSI_Read10_Cmd(CBW.bLUN , SCSI_LBA , SCSI_BlkLen); - break; - } - break; - case BOT_DATA_IN_LAST: - Set_CSW (CSW_CMD_PASSED, SEND_CSW_ENABLE); - SetEPRxStatus(ENDP2, EP_RX_VALID); - break; - - default: - break; - } -} - -/******************************************************************************* -* Function Name : Mass_Storage_Out -* Description : Mass Storage OUT transfer. -* Input : None. -* Output : None. -* Return : None. -*******************************************************************************/ -void Mass_Storage_Out (void) -{ - uint8_t CMD; - CMD = CBW.CB[0]; - Data_Len = GetEPRxCount(ENDP2); - - - /* read data to Bulk_Data_Buff */ - PMAToUserBufferCopy(Bulk_Data_Buff, ENDP2_RXADDR, Data_Len); - - switch (Bot_State) - { - case BOT_IDLE: - CBW_Decode(); - break; - case BOT_DATA_OUT: - if (CMD == SCSI_WRITE10) - { - SCSI_Write10_Cmd(CBW.bLUN , SCSI_LBA , SCSI_BlkLen); - break; - } - Bot_Abort(DIR_OUT); - Set_Scsi_Sense_Data(CBW.bLUN, ILLEGAL_REQUEST, INVALID_FIELED_IN_COMMAND); - Set_CSW (CSW_PHASE_ERROR, SEND_CSW_DISABLE); - break; - default: - Bot_Abort(BOTH_DIR); - Set_Scsi_Sense_Data(CBW.bLUN, ILLEGAL_REQUEST, INVALID_FIELED_IN_COMMAND); - Set_CSW (CSW_PHASE_ERROR, SEND_CSW_DISABLE); - break; - } -} - -/******************************************************************************* -* Function Name : CBW_Decode -* Description : Decode the received CBW and call the related SCSI command -* routine. -* Input : None. -* Output : None. -* Return : None. -*******************************************************************************/ -void CBW_Decode(void) -{ - uint32_t Counter; - - /* read data from Bulk_Data_Buff to CBW */ - for (Counter = 0; Counter < Data_Len; Counter++) - { - *((uint8_t *)&CBW + Counter) = Bulk_Data_Buff[Counter]; - } - /* copy return TAG */ - CSW.dTag = CBW.dTag; - CSW.dDataResidue = CBW.dDataLength; - - if (Data_Len != BOT_CBW_PACKET_LENGTH) - { - Bot_Abort(BOTH_DIR); - /* reset the CBW.dSignature to desible the clear feature until receiving a Mass storage reset*/ - CBW.dSignature = 0; - Set_Scsi_Sense_Data(CBW.bLUN, ILLEGAL_REQUEST, PARAMETER_LIST_LENGTH_ERROR); - Set_CSW (CSW_CMD_FAILED, SEND_CSW_DISABLE); - return; - } - - if ((CBW.CB[0] == SCSI_READ10 ) || (CBW.CB[0] == SCSI_WRITE10 )) - { - /* Calculate Logical Block Address */ - SCSI_LBA = (CBW.CB[2] << 24) | (CBW.CB[3] << 16) | (CBW.CB[4] << 8) | CBW.CB[5]; - /* Calculate the Number of Blocks to transfer */ - SCSI_BlkLen = (CBW.CB[7] << 8) | CBW.CB[8]; - } - - /* USBC */ - if (CBW.dSignature == BOT_CBW_SIGNATURE) - { - /* Valid CBW */ - if ((CBW.bLUN > Max_Lun) || (CBW.bCBLength < 1) || (CBW.bCBLength > 16)) - { - Bot_Abort(BOTH_DIR); - Set_Scsi_Sense_Data(CBW.bLUN, ILLEGAL_REQUEST, INVALID_FIELED_IN_COMMAND); - Set_CSW (CSW_CMD_FAILED, SEND_CSW_DISABLE); - } - else - { - switch (CBW.CB[0]) - { - case SCSI_REQUEST_SENSE: - SCSI_RequestSense_Cmd (CBW.bLUN); - break; - case SCSI_INQUIRY: - SCSI_Inquiry_Cmd(CBW.bLUN); - break; - case SCSI_START_STOP_UNIT: - SCSI_Start_Stop_Unit_Cmd(CBW.bLUN); - break; - case SCSI_ALLOW_MEDIUM_REMOVAL: - SCSI_Start_Stop_Unit_Cmd(CBW.bLUN); - break; - case SCSI_MODE_SENSE6: - SCSI_ModeSense6_Cmd (CBW.bLUN); - break; - case SCSI_MODE_SENSE10: - SCSI_ModeSense10_Cmd (CBW.bLUN); - break; - case SCSI_READ_FORMAT_CAPACITIES: - SCSI_ReadFormatCapacity_Cmd(CBW.bLUN); - break; - case SCSI_READ_CAPACITY10: - SCSI_ReadCapacity10_Cmd(CBW.bLUN); - break; - case SCSI_TEST_UNIT_READY: - SCSI_TestUnitReady_Cmd(CBW.bLUN); - break; - case SCSI_READ10: - SCSI_Read10_Cmd(CBW.bLUN, SCSI_LBA , SCSI_BlkLen); - break; - case SCSI_WRITE10: - SCSI_Write10_Cmd(CBW.bLUN, SCSI_LBA , SCSI_BlkLen); - break; - case SCSI_VERIFY10: - SCSI_Verify10_Cmd(CBW.bLUN); - break; - case SCSI_FORMAT_UNIT: - SCSI_Format_Cmd(CBW.bLUN); - break; - /*Unsupported command*/ - - case SCSI_MODE_SELECT10: - SCSI_Mode_Select10_Cmd(CBW.bLUN); - break; - case SCSI_MODE_SELECT6: - SCSI_Mode_Select6_Cmd(CBW.bLUN); - break; - - case SCSI_SEND_DIAGNOSTIC: - SCSI_Send_Diagnostic_Cmd(CBW.bLUN); - break; - case SCSI_READ6: - SCSI_Read6_Cmd(CBW.bLUN); - break; - case SCSI_READ12: - SCSI_Read12_Cmd(CBW.bLUN); - break; - case SCSI_READ16: - SCSI_Read16_Cmd(CBW.bLUN); - break; - case SCSI_READ_CAPACITY16: - SCSI_READ_CAPACITY16_Cmd(CBW.bLUN); - break; - case SCSI_WRITE6: - SCSI_Write6_Cmd(CBW.bLUN); - break; - case SCSI_WRITE12: - SCSI_Write12_Cmd(CBW.bLUN); - break; - case SCSI_WRITE16: - SCSI_Write16_Cmd(CBW.bLUN); - break; - case SCSI_VERIFY12: - SCSI_Verify12_Cmd(CBW.bLUN); - break; - case SCSI_VERIFY16: - SCSI_Verify16_Cmd(CBW.bLUN); - break; - - default: - { - Bot_Abort(BOTH_DIR); - Set_Scsi_Sense_Data(CBW.bLUN, ILLEGAL_REQUEST, INVALID_COMMAND); - Set_CSW (CSW_CMD_FAILED, SEND_CSW_DISABLE); - } - } - } - } - else - { - /* Invalid CBW */ - Bot_Abort(BOTH_DIR); - Set_Scsi_Sense_Data(CBW.bLUN, ILLEGAL_REQUEST, INVALID_COMMAND); - Set_CSW (CSW_CMD_FAILED, SEND_CSW_DISABLE); - } -} - -/******************************************************************************* -* Function Name : Transfer_Data_Request -* Description : Send the request response to the PC HOST. -* Input : uint8_t* Data_Address : point to the data to transfer. -* uint16_t Data_Length : the nember of Bytes to transfer. -* Output : None. -* Return : None. -*******************************************************************************/ -void Transfer_Data_Request(uint8_t* Data_Pointer, uint16_t Data_Len) -{ - UserToPMABufferCopy(Data_Pointer, ENDP1_TXADDR, Data_Len); - - SetEPTxCount(ENDP1, Data_Len); - SetEPTxStatus(ENDP1, EP_TX_VALID); - Bot_State = BOT_DATA_IN_LAST; - CSW.dDataResidue -= Data_Len; - CSW.bStatus = CSW_CMD_PASSED; -} - -/******************************************************************************* -* Function Name : Set_CSW -* Description : Set the SCW with the needed fields. -* Input : uint8_t CSW_Status this filed can be CSW_CMD_PASSED,CSW_CMD_FAILED, -* or CSW_PHASE_ERROR. -* Output : None. -* Return : None. -*******************************************************************************/ -void Set_CSW (uint8_t CSW_Status, uint8_t Send_Permission) -{ - CSW.dSignature = BOT_CSW_SIGNATURE; - CSW.bStatus = CSW_Status; - - UserToPMABufferCopy(((uint8_t *)& CSW), ENDP1_TXADDR, CSW_DATA_LENGTH); - - SetEPTxCount(ENDP1, CSW_DATA_LENGTH); - Bot_State = BOT_ERROR; - if (Send_Permission) - { - Bot_State = BOT_CSW_Send; - SetEPTxStatus(ENDP1, EP_TX_VALID); - } - -} - -/******************************************************************************* -* Function Name : Bot_Abort -* Description : Stall the needed Endpoint according to the selected direction. -* Input : Endpoint direction IN, OUT or both directions -* Output : None. -* Return : None. -*******************************************************************************/ -void Bot_Abort(uint8_t Direction) -{ - switch (Direction) - { - case DIR_IN : - SetEPTxStatus(ENDP1, EP_TX_STALL); - break; - case DIR_OUT : - SetEPRxStatus(ENDP2, EP_RX_STALL); - break; - case BOTH_DIR : - SetEPTxStatus(ENDP1, EP_TX_STALL); - SetEPRxStatus(ENDP2, EP_RX_STALL); - break; - default: - break; - } -} - -/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/Libraries/Mass_Storage/src/usb_desc.c b/bsp/stm32_radio/Libraries/Mass_Storage/src/usb_desc.c deleted file mode 100644 index 0e2543c567..0000000000 --- a/bsp/stm32_radio/Libraries/Mass_Storage/src/usb_desc.c +++ /dev/null @@ -1,161 +0,0 @@ -/******************** (C) COPYRIGHT 2009 STMicroelectronics ******************** -* File Name : usb_desc.c -* Author : MCD Application Team -* Version : V3.0.1 -* Date : 04/27/2009 -* Description : Descriptors for Mass Storage Device -******************************************************************************** -* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS -* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. -* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, -* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE -* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING -* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -/* Includes ------------------------------------------------------------------*/ -#include "usb_desc.h" - -const uint8_t MASS_DeviceDescriptor[MASS_SIZ_DEVICE_DESC] = -{ - 0x12, /* bLength */ - 0x01, /* bDescriptorType */ - 0x00, /* bcdUSB, version 2.00 */ - 0x02, - 0x00, /* bDeviceClass : each interface define the device class */ - 0x00, /* bDeviceSubClass */ - 0x00, /* bDeviceProtocol */ - 0x40, /* bMaxPacketSize0 0x40 = 64 */ - 0x83, /* idVendor (0483) */ - 0x04, - 0x20, /* idProduct */ - 0x57, - 0x00, /* bcdDevice 2.00*/ - 0x02, - 1, /* index of string Manufacturer */ - /**/ - 2, /* index of string descriptor of product*/ - /* */ - 3, /* */ - /* */ - /* */ - 0x01 /*bNumConfigurations */ -}; - -const uint8_t MASS_ConfigDescriptor[MASS_SIZ_CONFIG_DESC] = -{ - - 0x09, /* bLength: Configuation Descriptor size */ - 0x02, /* bDescriptorType: Configuration */ - MASS_SIZ_CONFIG_DESC, - - 0x00, - 0x01, /* bNumInterfaces: 1 interface */ - 0x01, /* bConfigurationValue: */ - /* Configuration value */ - 0x00, /* iConfiguration: */ - /* Index of string descriptor */ - /* describing the configuration */ - 0xC0, /* bmAttributes: */ - /* bus powered */ - 100, /* MaxPower 100 mA */ - - /*****************½Ó¿ÚÃèÊö·û*******************/ -//bLength×ֶΡ£½Ó¿ÚÃèÊö·ûµÄ³¤¶ÈΪ9×Ö½Ú¡£ - 0x09, - -//bDescriptorType×ֶΡ£½Ó¿ÚÃèÊö·ûµÄ±àºÅΪ0x04¡£ - 0x04, - -//bInterfaceNumber×ֶΡ£¸Ã½Ó¿ÚµÄ±àºÅ£¬µÚÒ»¸ö½Ó¿Ú£¬±àºÅΪ0¡£ - 0x00, - -//bAlternateSetting×ֶΡ£¸Ã½Ó¿ÚµÄ±¸ÓñàºÅ£¬Îª0¡£ - 0x00, - -//bNumEndpoints×ֶΡ£·Ç0¶ËµãµÄÊýÄ¿¡£¸Ã½Ó¿ÚÓÐ2¸öÅúÁ¿¶Ëµã - 0x02, - -//bInterfaceClass×ֶΡ£¸Ã½Ó¿ÚËùʹÓõÄÀà¡£´óÈÝÁ¿´æ´¢É豸½Ó¿ÚÀàµÄ´úÂëΪ0x08¡£ - 0x08, - -//bInterfaceSubClass×ֶΡ£¸Ã½Ó¿ÚËùʹÓõÄ×ÓÀà¡£SCSI͸Ã÷ÃüÁµÄ×ÓÀà´úÂëΪ0x06¡£ - 0x06, - -//bInterfaceProtocol×ֶΡ£Ð­ÒéΪ½öÅúÁ¿´«Ê䣬´úÂëΪ0x50¡£ - 0x50, - -//iConfiguration×ֶΡ£¸Ã½Ó¿ÚµÄ×Ö·û´®Ë÷ÒýÖµ¡£ - 4, /* iInterface: */ - - /*************±ê×¼ÅúÁ¿Êý¾ÝÊäÈë¶ËµãÃèÊö·û****************/ - /* 18 */ - 0x07, /*Endpoint descriptor length = 7*/ - 0x05, /*Endpoint descriptor type *///bDescriptorType×ֶΡ£¶ËµãÃèÊö·û±àºÅΪ0x05¡£ - -//bEndpointAddress×ֶΡ£¶ËµãµÄµØÖ·¡£ÎÒÃÇʹÓÃD12µÄÊäÈë¶Ëµã2¡£ -//D7λ±íʾÊý¾Ý·½Ïò£¬ÊäÈë¶ËµãD7Ϊ1¡£ËùÒÔÊäÈë¶Ëµã2µÄµØַΪ0x82¡£ - 0x81, /*Endpoint address (IN, address 1) */ - - //bmAttributes×ֶΡ£D1~D0Ϊ¶Ëµã´«ÊäÀàÐÍÑ¡Ôñ¡£ -//¸Ã¶ËµãΪÅú¶Ëµã¡£ÅúÁ¿¶ËµãµÄ±àºÅΪ2¡£ÆäËüλ±£ÁôΪ0¡£ - 0x02, /*Bulk endpoint type */ - - 0x40, /*Maximum packet size (64 bytes) */ - 0x00, - 0x00, /*Polling interval in milliseconds */ - - /*************±ê×¼ÅúÁ¿Êý¾ÝÊä³ö¶ËµãÃèÊö·û****************/ - /* 25 */ - 0x07, /*Endpoint descriptor length = 7 */ - 0x05, /*Endpoint descriptor type */ - 0x02, /*Endpoint address (OUT, address 2) */ - 0x02, /*Bulk endpoint type */ - 0x40, /*Maximum packet size (64 bytes) */ - 0x00, - 0x00 /*Polling interval in milliseconds*/ - /*32*/ -}; -const uint8_t MASS_StringLangID[MASS_SIZ_STRING_LANGID] = -{ - MASS_SIZ_STRING_LANGID, - 0x03, - 0x09, - 0x04 -} -; /* LangID = 0x0409: U.S. English */ -const uint8_t MASS_StringVendor[MASS_SIZ_STRING_VENDOR] = -{ - MASS_SIZ_STRING_VENDOR, /* Size of manufaturer string */ - 0x03, /* bDescriptorType = String descriptor */ - /* Manufacturer: "STMicroelectronics" */ - 'S', 0, 'T', 0, 'M', 0, 'i', 0, 'c', 0, 'r', 0, 'o', 0, 'e', 0, - 'l', 0, 'e', 0, 'c', 0, 't', 0, 'r', 0, 'o', 0, 'n', 0, 'i', 0, - 'c', 0, 's', 0 -}; -const uint8_t MASS_StringProduct[MASS_SIZ_STRING_PRODUCT] = -{ - MASS_SIZ_STRING_PRODUCT, - 0x03, - /* Product name: "STM32F10x:USB Mass Storage" */ - 'S', 0, 'T', 0, 'M', 0, '3', 0, '2', 0, ' ', 0, 'M', 0, 'a', 0, 's', 0, - 's', 0, ' ', 0, 'S', 0, 't', 0, 'o', 0, 'r', 0, 'a', 0, 'g', 0, 'e', 0 - -}; - -uint8_t MASS_StringSerial[MASS_SIZ_STRING_SERIAL] = -{ - MASS_SIZ_STRING_SERIAL, - 0x03, - /* STM3210 */ - 'S', 0, 'T', 0, 'M', 0, '3', 0, '2', 0, '1', 0, '0', 0 -}; -const uint8_t MASS_StringInterface[MASS_SIZ_STRING_INTERFACE] = -{ - MASS_SIZ_STRING_INTERFACE, - 0x03, - /* Interface 0: "ST Mass" */ - 'S', 0, 'T', 0, ' ', 0, 'M', 0, 'a', 0, 's', 0, 's', 0 -}; - -/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/Libraries/Mass_Storage/src/usb_endp.c b/bsp/stm32_radio/Libraries/Mass_Storage/src/usb_endp.c deleted file mode 100644 index 11326d2722..0000000000 --- a/bsp/stm32_radio/Libraries/Mass_Storage/src/usb_endp.c +++ /dev/null @@ -1,55 +0,0 @@ -/******************** (C) COPYRIGHT 2009 STMicroelectronics ******************** -* File Name : usb_endp.c -* Author : MCD Application Team -* Version : V3.0.1 -* Date : 04/27/2009 -* Description : Endpoint routines -******************************************************************************** -* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS -* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. -* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, -* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE -* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING -* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -/* Includes ------------------------------------------------------------------*/ -#include "usb_lib.h" -#include "usb_bot.h" -#include "usb_istr.h" - -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ -/* Private macro -------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/* Private function prototypes -----------------------------------------------*/ -/* Private functions ---------------------------------------------------------*/ - -/******************************************************************************* -* Function Name : EP1_IN_Callback -* Description : EP1 IN Callback Routine -* Input : None. -* Output : None. -* Return : None. -*******************************************************************************/ -void EP1_IN_Callback(void) -{ - // IN - Mass_Storage_In(); -} - -/******************************************************************************* -* Function Name : EP2_OUT_Callback. -* Description : EP2 OUT Callback Routine. -* Input : None. -* Output : None. -* Return : None. -*******************************************************************************/ -void EP2_OUT_Callback(void) -{ - // OUT ÊÕµ½Ö÷»ú·¢À´µÄÊý¾Ý»òÃüÁî - Mass_Storage_Out(); -} - -/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/ - diff --git a/bsp/stm32_radio/Libraries/Mass_Storage/src/usb_istr.c b/bsp/stm32_radio/Libraries/Mass_Storage/src/usb_istr.c deleted file mode 100644 index f54db810a3..0000000000 --- a/bsp/stm32_radio/Libraries/Mass_Storage/src/usb_istr.c +++ /dev/null @@ -1,174 +0,0 @@ -/******************** (C) COPYRIGHT 2009 STMicroelectronics ******************** -* File Name : usb_istr.c -* Author : MCD Application Team -* Version : V3.0.1 -* Date : 04/27/2009 -* Description : ISTR events interrupt service routines -******************************************************************************** -* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS -* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. -* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, -* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE -* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING -* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x.h" -#include "usb_type.h" -#include "usb_regs.h" -#include "usb_pwr.h" -#include "usb_istr.h" -#include "usb_init.h" -#include "usb_int.h" - -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ -/* Private macro -------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -__IO uint16_t wIstr; /* ISTR register last read value */ -__IO uint8_t bIntPackSOF = 0; /* SOFs received between 2 consecutive packets */ - -/* Extern variables ----------------------------------------------------------*/ -/* Private function prototypes -----------------------------------------------*/ -/* Private functions ---------------------------------------------------------*/ -/* function pointers to non-control endpoints service routines */ -void (*pEpInt_IN[7])(void) = - { - EP1_IN_Callback, - EP2_IN_Callback, - EP3_IN_Callback, - EP4_IN_Callback, - EP5_IN_Callback, - EP6_IN_Callback, - EP7_IN_Callback, - }; - -void (*pEpInt_OUT[7])(void) = - { - EP1_OUT_Callback, - EP2_OUT_Callback, - EP3_OUT_Callback, - EP4_OUT_Callback, - EP5_OUT_Callback, - EP6_OUT_Callback, - EP7_OUT_Callback, - }; - - -/******************************************************************************* -* Function Name : USB_Istr -* Description : ISTR events interrupt service routine -* Input : None. -* Output : None. -* Return : None. -*******************************************************************************/ -void USB_Istr(void) -{ - - wIstr = _GetISTR(); - -#if (IMR_MSK & ISTR_RESET) - if (wIstr & ISTR_RESET & wInterrupt_Mask) - { - _SetISTR((uint16_t)CLR_RESET); - Device_Property.Reset(); -#ifdef RESET_CALLBACK - RESET_Callback(); -#endif - } -#endif - /*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/ -#if (IMR_MSK & ISTR_DOVR) - if (wIstr & ISTR_DOVR & wInterrupt_Mask) - { - _SetISTR((uint16_t)CLR_DOVR); -#ifdef DOVR_CALLBACK - DOVR_Callback(); -#endif - } -#endif - /*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/ -#if (IMR_MSK & ISTR_ERR) - if (wIstr & ISTR_ERR & wInterrupt_Mask) - { - _SetISTR((uint16_t)CLR_ERR); -#ifdef ERR_CALLBACK - ERR_Callback(); -#endif - } -#endif - /*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/ -#if (IMR_MSK & ISTR_WKUP) - if (wIstr & ISTR_WKUP & wInterrupt_Mask) - { - _SetISTR((uint16_t)CLR_WKUP); - Resume(RESUME_EXTERNAL); -#ifdef WKUP_CALLBACK - WKUP_Callback(); -#endif - } -#endif - /*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/ -#if (IMR_MSK & ISTR_SUSP) - if (wIstr & ISTR_SUSP & wInterrupt_Mask) - { - - /* check if SUSPEND is possible */ - if (fSuspendEnabled) - { - Suspend(); - } - else - { - /* if not possible then resume after xx ms */ - Resume(RESUME_LATER); - } - /* clear of the ISTR bit must be done after setting of CNTR_FSUSP */ - _SetISTR((uint16_t)CLR_SUSP); -#ifdef SUSP_CALLBACK - SUSP_Callback(); -#endif - } -#endif - /*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/ -#if (IMR_MSK & ISTR_SOF) - if (wIstr & ISTR_SOF & wInterrupt_Mask) - { - _SetISTR((uint16_t)CLR_SOF); - bIntPackSOF++; - -#ifdef SOF_CALLBACK - SOF_Callback(); -#endif - } -#endif - /*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/ -#if (IMR_MSK & ISTR_ESOF) - if (wIstr & ISTR_ESOF & wInterrupt_Mask) - { - _SetISTR((uint16_t)CLR_ESOF); - /* resume handling timing is made with ESOFs */ - Resume(RESUME_ESOF); /* request without change of the machine state */ - -#ifdef ESOF_CALLBACK - ESOF_Callback(); -#endif - } -#endif - /*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/ -#if (IMR_MSK & ISTR_CTR) - if (wIstr & ISTR_CTR & wInterrupt_Mask) - { - /* servicing of the endpoint correct transfer interrupt */ - /* clear of the CTR flag into the sub */ - CTR_LP(); -#ifdef CTR_CALLBACK - CTR_Callback(); -#endif - } -#endif -} /* USB_Istr */ - -/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/ - diff --git a/bsp/stm32_radio/Libraries/Mass_Storage/src/usb_main.c b/bsp/stm32_radio/Libraries/Mass_Storage/src/usb_main.c deleted file mode 100644 index ca975458b0..0000000000 --- a/bsp/stm32_radio/Libraries/Mass_Storage/src/usb_main.c +++ /dev/null @@ -1,116 +0,0 @@ -#include "stm32f10x.h" -#include "usb_lib.h" -#include "usb_istr.h" -#include "hw_config.h" -#include "usb_pwr.h" - -#include "rtthread.h" - -extern uint32_t Mass_Memory_Size[3]; -extern uint32_t Mass_Block_Size[3]; -extern uint32_t Mass_Block_Count[3]; -extern rt_device_t dev_sdio; -extern rt_device_t dev_spi_flash; - -#if (USB_USE_AUTO_REMOVE == 1) -extern unsigned long test_unit_ready_last; -void msc_thread_entry(void *parameter) -{ - extern void player_ui_freeze(void); - unsigned long test_unit_ready_start = rt_tick_get(); - test_unit_ready_last = test_unit_ready_start; - - /* wait connection */ - while( test_unit_ready_last == test_unit_ready_start ) - { - rt_thread_delay( RT_TICK_PER_SECOND ); - } - - - /* freeze player UI */ - player_ui_freeze(); - - /* wait remove */ - while(1) - { - rt_thread_delay( RT_TICK_PER_SECOND/2 ); - if( rt_tick_get() - test_unit_ready_last > RT_TICK_PER_SECOND*2 ) - { - rt_kprintf("\r\nCable removed!\r\nSystemReset\r\n\r\n"); - NVIC_SystemReset(); - } - } -} -#endif - -#include -#include "sdcard.h" -void USB_cable(void) -{ - rt_device_t dev = RT_NULL; - SD_CardInfo * sdio_info = RT_NULL; - dev = rt_device_find("sd0"); - - { - SPI_InitTypeDef SPI_InitStructure; - /*------------------------ SPI1 configuration ------------------------*/ - SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex;//SPI_Direction_1Line_Tx; - SPI_InitStructure.SPI_Mode = SPI_Mode_Master; - SPI_InitStructure.SPI_DataSize = SPI_DataSize_8b; - SPI_InitStructure.SPI_CPOL = SPI_CPOL_Low; - SPI_InitStructure.SPI_CPHA = SPI_CPHA_1Edge; - SPI_InitStructure.SPI_NSS = SPI_NSS_Soft; - SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_16;/* 72M/64=1.125M */ - SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB; - SPI_InitStructure.SPI_CRCPolynomial = 7; - - SPI_I2S_DeInit(SPI1); - SPI_Init(SPI1, &SPI_InitStructure); - - /* Enable SPI_MASTER */ - SPI_Cmd(SPI1, ENABLE); - SPI_CalculateCRC(SPI1, DISABLE); - } - - - /* SPI_FLASH */ - dev_spi_flash = rt_device_find("spi0"); - Mass_Block_Size[1] = 512; - Mass_Block_Count[1] = 4096; - Mass_Memory_Size[1] = 4096*512; - - if(dev != RT_NULL) - { - dev_sdio = dev; - sdio_info = (SD_CardInfo *)dev->private; - Mass_Memory_Size[0] = sdio_info->CardCapacity; - Mass_Block_Size[0] = sdio_info->CardBlockSize; - Mass_Block_Count[0] = Mass_Memory_Size[0] / Mass_Block_Size[0]; - } - else - { - rt_kprintf("\r\nNo find the device sd0 !!!!"); - } - - /* 3:NAND */ - - /* usb msc up*/ - Set_System(); - Set_USBClock(); - USB_Interrupts_Config(); - USB_Init(); - -#if (USB_USE_AUTO_REMOVE == 1) - /* delete the other thread */ - - /* create msc_thread */ - { - rt_thread_t msc_thread; - msc_thread = rt_thread_create("msc_thread", - msc_thread_entry, RT_NULL, - 1024, RT_THREAD_PRIORITY_MAX-1,1); - if (msc_thread != RT_NULL) rt_thread_startup(msc_thread); - } -#endif -} -FINSH_FUNCTION_EXPORT(USB_cable, cable_the_usb); diff --git a/bsp/stm32_radio/Libraries/Mass_Storage/src/usb_prop.c b/bsp/stm32_radio/Libraries/Mass_Storage/src/usb_prop.c deleted file mode 100644 index b36658b175..0000000000 --- a/bsp/stm32_radio/Libraries/Mass_Storage/src/usb_prop.c +++ /dev/null @@ -1,392 +0,0 @@ -/******************** (C) COPYRIGHT 2009 STMicroelectronics ******************** -* File Name : usb_prop.c -* Author : MCD Application Team -* Version : V3.0.1 -* Date : 04/27/2009 -* Description : All processing related to Mass Storage Demo -******************************************************************************** -* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS -* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. -* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, -* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE -* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING -* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -/* Includes ------------------------------------------------------------------*/ -#include "usb_lib.h" -#include "usb_desc.h" -#include "usb_pwr.h" -#include "usb_bot.h" -#include "hw_config.h" -#include "memory.h" -#include "mass_mal.h" -#include "usb_prop.h" - -extern uint32_t Max_Lun; - -DEVICE Device_Table = -{ - EP_NUM, - 1 -}; - -DEVICE_PROP Device_Property = -{ - MASS_init, - MASS_Reset, - MASS_Status_In, - MASS_Status_Out, - MASS_Data_Setup, - MASS_NoData_Setup, - MASS_Get_Interface_Setting, - MASS_GetDeviceDescriptor, - MASS_GetConfigDescriptor, - MASS_GetStringDescriptor, - 0, - 0x40 /*MAX PACKET SIZE*/ -}; - -USER_STANDARD_REQUESTS User_Standard_Requests = -{ - Mass_Storage_GetConfiguration, - Mass_Storage_SetConfiguration, - Mass_Storage_GetInterface, - Mass_Storage_SetInterface, - Mass_Storage_GetStatus, - Mass_Storage_ClearFeature, - Mass_Storage_SetEndPointFeature, - Mass_Storage_SetDeviceFeature, - Mass_Storage_SetDeviceAddress -}; - -ONE_DESCRIPTOR Device_Descriptor = -{ - (uint8_t*)MASS_DeviceDescriptor, - MASS_SIZ_DEVICE_DESC -}; - -ONE_DESCRIPTOR Config_Descriptor = -{ - (uint8_t*)MASS_ConfigDescriptor, - MASS_SIZ_CONFIG_DESC -}; - -ONE_DESCRIPTOR String_Descriptor[5] = -{ - {(uint8_t*)MASS_StringLangID, MASS_SIZ_STRING_LANGID}, - {(uint8_t*)MASS_StringVendor, MASS_SIZ_STRING_VENDOR}, - {(uint8_t*)MASS_StringProduct, MASS_SIZ_STRING_PRODUCT}, - {(uint8_t*)MASS_StringSerial, MASS_SIZ_STRING_SERIAL}, - {(uint8_t*)MASS_StringInterface, MASS_SIZ_STRING_INTERFACE}, -}; - -/* Extern variables ----------------------------------------------------------*/ -extern unsigned char Bot_State; -extern Bulk_Only_CBW CBW; - -/* Private function prototypes -----------------------------------------------*/ -/* Extern function prototypes ------------------------------------------------*/ -/* Private functions ---------------------------------------------------------*/ -/******************************************************************************* -* Function Name : MASS_init -* Description : Mass Storage init routine. -* Input : None. -* Output : None. -* Return : None. -*******************************************************************************/ -void MASS_init() -{ - /* Update the serial number string descriptor with the data from the unique - ID*/ - Get_SerialNum(); - - pInformation->Current_Configuration = 0; - - /* Connect the device */ - PowerOn(); - - /* USB interrupts initialization */ - /* clear pending interrupts */ - _SetISTR(0); - wInterrupt_Mask = IMR_MSK; - /* set interrupts mask */ - _SetCNTR(wInterrupt_Mask); - - bDeviceState = UNCONNECTED; -} - -/******************************************************************************* -* Function Name : MASS_Reset -* Description : Mass Storage reset routine. -* Input : None. -* Output : None. -* Return : None. -*******************************************************************************/ -void MASS_Reset() -{ - /* Set the device as not configured */ - Device_Info.Current_Configuration = 0; - - /* Current Feature initialization */ - pInformation->Current_Feature = MASS_ConfigDescriptor[7]; - - SetBTABLE(BTABLE_ADDRESS); - - /* Initialize Endpoint 0 */ - SetEPType(ENDP0, EP_CONTROL); - SetEPTxStatus(ENDP0, EP_TX_NAK); - SetEPRxAddr(ENDP0, ENDP0_RXADDR); - SetEPRxCount(ENDP0, Device_Property.MaxPacketSize); - SetEPTxAddr(ENDP0, ENDP0_TXADDR); - Clear_Status_Out(ENDP0); - SetEPRxValid(ENDP0); - - /* Initialize Endpoint 1 */ - SetEPType(ENDP1, EP_BULK); - SetEPTxAddr(ENDP1, ENDP1_TXADDR); - SetEPTxStatus(ENDP1, EP_TX_NAK); - SetEPRxStatus(ENDP1, EP_RX_DIS); - - /* Initialize Endpoint 2 */ - SetEPType(ENDP2, EP_BULK); - SetEPRxAddr(ENDP2, ENDP2_RXADDR); - SetEPRxCount(ENDP2, Device_Property.MaxPacketSize); - SetEPRxStatus(ENDP2, EP_RX_VALID); - SetEPTxStatus(ENDP2, EP_TX_DIS); - - - SetEPRxCount(ENDP0, Device_Property.MaxPacketSize); - SetEPRxValid(ENDP0); - - /* Set the device to response on default address */ - SetDeviceAddress(0); - - bDeviceState = ATTACHED; - - CBW.dSignature = BOT_CBW_SIGNATURE; - Bot_State = BOT_IDLE; - //USB_NotConfigured_LED(); -} - -/******************************************************************************* -* Function Name : Mass_Storage_SetConfiguration -* Description : Handle the SetConfiguration request. -* Input : None. -* Output : None. -* Return : None. -*******************************************************************************/ -void Mass_Storage_SetConfiguration(void) -{ - if (pInformation->Current_Configuration != 0) - { - /* Device configured */ - bDeviceState = CONFIGURED; - - ClearDTOG_TX(ENDP1); - ClearDTOG_RX(ENDP2); - Bot_State = BOT_IDLE; /* set the Bot state machine to the IDLE state */ - } -} - -/******************************************************************************* -* Function Name : Mass_Storage_ClearFeature -* Description : Handle the ClearFeature request. -* Input : None. -* Output : None. -* Return : None. -*******************************************************************************/ -void Mass_Storage_ClearFeature(void) -{ - /* when the host send a CBW with invalid signature or invalid length the two - Endpoints (IN & OUT) shall stall until receiving a Mass Storage Reset */ - if (CBW.dSignature != BOT_CBW_SIGNATURE) - Bot_Abort(BOTH_DIR); -} - -/******************************************************************************* -* Function Name : Mass_Storage_SetConfiguration. -* Description : Udpade the device state to addressed. -* Input : None. -* Output : None. -* Return : None. -*******************************************************************************/ -void Mass_Storage_SetDeviceAddress (void) -{ - bDeviceState = ADDRESSED; -} -/******************************************************************************* -* Function Name : MASS_Status_In -* Description : Mass Storage Status IN routine. -* Input : None. -* Output : None. -* Return : None. -*******************************************************************************/ -void MASS_Status_In(void) -{ - return; -} - -/******************************************************************************* -* Function Name : MASS_Status_Out -* Description : Mass Storage Status OUT routine. -* Input : None. -* Output : None. -* Return : None. -*******************************************************************************/ -void MASS_Status_Out(void) -{ - return; -} - -/******************************************************************************* -* Function Name : MASS_Data_Setup. -* Description : Handle the data class specific requests.. -* Input : RequestNo. -* Output : None. -* Return : RESULT. -*******************************************************************************/ -RESULT MASS_Data_Setup(uint8_t RequestNo) -{ - uint8_t *(*CopyRoutine)(uint16_t); - - CopyRoutine = NULL; - if ((Type_Recipient == (CLASS_REQUEST | INTERFACE_RECIPIENT)) - && (RequestNo == GET_MAX_LUN) && (pInformation->USBwValue == 0) - && (pInformation->USBwIndex == 0) && (pInformation->USBwLength == 0x01)) - { - CopyRoutine = Get_Max_Lun; - } - else - { - return USB_UNSUPPORT; - } - - if (CopyRoutine == NULL) - { - return USB_UNSUPPORT; - } - - pInformation->Ctrl_Info.CopyData = CopyRoutine; - pInformation->Ctrl_Info.Usb_wOffset = 0; - (*CopyRoutine)(0); - - return USB_SUCCESS; - -} - -/******************************************************************************* -* Function Name : MASS_NoData_Setup. -* Description : Handle the no data class specific requests. -* Input : RequestNo. -* Output : None. -* Return : RESULT. -*******************************************************************************/ -RESULT MASS_NoData_Setup(uint8_t RequestNo) -{ - if ((Type_Recipient == (CLASS_REQUEST | INTERFACE_RECIPIENT)) - && (RequestNo == MASS_STORAGE_RESET) && (pInformation->USBwValue == 0) - && (pInformation->USBwIndex == 0) && (pInformation->USBwLength == 0x00)) - { - /* Initialize Endpoint 1 */ - ClearDTOG_TX(ENDP1); - - /* Initialize Endpoint 2 */ - ClearDTOG_RX(ENDP2); - - /*intialise the CBW signature to enable the clear feature*/ - CBW.dSignature = BOT_CBW_SIGNATURE; - Bot_State = BOT_IDLE; - - return USB_SUCCESS; - } - return USB_UNSUPPORT; -} - -/******************************************************************************* -* Function Name : MASS_Get_Interface_Setting -* Description : Test the interface and the alternate setting according to the -* supported one. -* Input : uint8_t Interface, uint8_t AlternateSetting. -* Output : None. -* Return : RESULT. -*******************************************************************************/ -RESULT MASS_Get_Interface_Setting(uint8_t Interface, uint8_t AlternateSetting) -{ - if (AlternateSetting > 0) - { - return USB_UNSUPPORT;/* in this application we don't have AlternateSetting*/ - } - else if (Interface > 0) - { - return USB_UNSUPPORT;/*in this application we have only 1 interfaces*/ - } - return USB_SUCCESS; -} - -/******************************************************************************* -* Function Name : MASS_GetDeviceDescriptor -* Description : Get the device descriptor. -* Input : uint16_t Length. -* Output : None. -* Return : None. -*******************************************************************************/ -uint8_t *MASS_GetDeviceDescriptor(uint16_t Length) -{ - return Standard_GetDescriptorData(Length, &Device_Descriptor ); -} - -/******************************************************************************* -* Function Name : MASS_GetConfigDescriptor -* Description : Get the configuration descriptor. -* Input : uint16_t Length. -* Output : None. -* Return : None. -*******************************************************************************/ -uint8_t *MASS_GetConfigDescriptor(uint16_t Length) -{ - return Standard_GetDescriptorData(Length, &Config_Descriptor ); -} - -/******************************************************************************* -* Function Name : MASS_GetStringDescriptor -* Description : Get the string descriptors according to the needed index. -* Input : uint16_t Length. -* Output : None. -* Return : None. -*******************************************************************************/ -uint8_t *MASS_GetStringDescriptor(uint16_t Length) -{ - uint8_t wValue0 = pInformation->USBwValue0; - - if (wValue0 > 5) - { - return NULL; - } - else - { - return Standard_GetDescriptorData(Length, &String_Descriptor[wValue0]); - } -} - -/******************************************************************************* -* Function Name : Get_Max_Lun -* Description : Handle the Get Max Lun request. -* Input : uint16_t Length. -* Output : None. -* Return : None. -*******************************************************************************/ -uint8_t *Get_Max_Lun(uint16_t Length) -{ - if (Length == 0) - { - pInformation->Ctrl_Info.Usb_wLength = LUN_DATA_LENGTH; - return 0; - } - else - { - return((uint8_t*)(&Max_Lun)); - } -} - -/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/Libraries/Mass_Storage/src/usb_pwr.c b/bsp/stm32_radio/Libraries/Mass_Storage/src/usb_pwr.c deleted file mode 100644 index b3096a8e64..0000000000 --- a/bsp/stm32_radio/Libraries/Mass_Storage/src/usb_pwr.c +++ /dev/null @@ -1,224 +0,0 @@ -/******************** (C) COPYRIGHT 2009 STMicroelectronics ******************** -* File Name : usb_pwr.c -* Author : MCD Application Team -* Version : V3.0.1 -* Date : 04/27/2009 -* Description : Connection/disconnection & power management -******************************************************************************** -* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS -* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. -* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, -* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE -* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING -* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x.h" -#include "usb_lib.h" -#include "usb_conf.h" -#include "usb_pwr.h" -#include "hw_config.h" - -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ -/* Private macro -------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -__IO uint32_t bDeviceState = UNCONNECTED; /* USB device status */ -__IO bool fSuspendEnabled = TRUE; /* true when suspend is possible */ - -struct -{ - __IO RESUME_STATE eState; - __IO uint8_t bESOFcnt; -} -ResumeS; - -/* Extern variables ----------------------------------------------------------*/ -/* Private function prototypes -----------------------------------------------*/ -/* Extern function prototypes ------------------------------------------------*/ -/* Private functions ---------------------------------------------------------*/ - -/******************************************************************************* -* Function Name : PowerOn -* Description : -* Input : None. -* Output : None. -* Return : USB_SUCCESS. -*******************************************************************************/ -RESULT PowerOn(void) -{ - uint16_t wRegVal; - - /*** cable plugged-in ? ***/ - /*while(!CablePluggedIn());*/ - USB_Cable_Config(ENABLE); - - /*** CNTR_PWDN = 0 ***/ - wRegVal = CNTR_FRES; - _SetCNTR(wRegVal); - - /*** CNTR_FRES = 0 ***/ - wInterrupt_Mask = 0; - _SetCNTR(wInterrupt_Mask); - /*** Clear pending interrupts ***/ - _SetISTR(0); - /*** Set interrupt mask ***/ - wInterrupt_Mask = CNTR_RESETM | CNTR_SUSPM | CNTR_WKUPM; - _SetCNTR(wInterrupt_Mask); - - return USB_SUCCESS; -} - -/******************************************************************************* -* Function Name : PowerOff -* Description : handles switch-off conditions -* Input : None. -* Output : None. -* Return : USB_SUCCESS. -*******************************************************************************/ -RESULT PowerOff() -{ - /* disable all ints and force USB reset */ - _SetCNTR(CNTR_FRES); - /* clear interrupt status register */ - _SetISTR(0); - /* Disable the Pull-Up*/ - USB_Cable_Config(DISABLE); - /* switch-off device */ - _SetCNTR(CNTR_FRES + CNTR_PDWN); - /* sw variables reset */ - /* ... */ - - return USB_SUCCESS; -} - -/******************************************************************************* -* Function Name : Suspend -* Description : sets suspend mode operating conditions -* Input : None. -* Output : None. -* Return : USB_SUCCESS. -*******************************************************************************/ -void Suspend(void) -{ - uint16_t wCNTR; - /* suspend preparation */ - /* ... */ - - /* macrocell enters suspend mode */ - wCNTR = _GetCNTR(); - wCNTR |= CNTR_FSUSP; - _SetCNTR(wCNTR); - - /* ------------------ ONLY WITH BUS-POWERED DEVICES ---------------------- */ - /* power reduction */ - /* ... on connected devices */ - - - /* force low-power mode in the macrocell */ - wCNTR = _GetCNTR(); - wCNTR |= CNTR_LPMODE; - _SetCNTR(wCNTR); - - /* switch-off the clocks */ - /* ... */ - Enter_LowPowerMode(); - -} - -/******************************************************************************* -* Function Name : Resume_Init -* Description : Handles wake-up restoring normal operations -* Input : None. -* Output : None. -* Return : USB_SUCCESS. -*******************************************************************************/ -void Resume_Init(void) -{ - uint16_t wCNTR; - /* ------------------ ONLY WITH BUS-POWERED DEVICES ---------------------- */ - /* restart the clocks */ - /* ... */ - - /* CNTR_LPMODE = 0 */ - wCNTR = _GetCNTR(); - wCNTR &= (~CNTR_LPMODE); - _SetCNTR(wCNTR); - - /* restore full power */ - /* ... on connected devices */ - Leave_LowPowerMode(); - - /* reset FSUSP bit */ - _SetCNTR(IMR_MSK); - - /* reverse suspend preparation */ - /* ... */ - -} - -/******************************************************************************* -* Function Name : Resume -* Description : This is the state machine handling resume operations and -* timing sequence. The control is based on the Resume structure -* variables and on the ESOF interrupt calling this subroutine -* without changing machine state. -* Input : a state machine value (RESUME_STATE) -* RESUME_ESOF doesn't change ResumeS.eState allowing -* decrementing of the ESOF counter in different states. -* Output : None. -* Return : None. -*******************************************************************************/ -void Resume(RESUME_STATE eResumeSetVal) -{ - uint16_t wCNTR; - - if (eResumeSetVal != RESUME_ESOF) - ResumeS.eState = eResumeSetVal; - - switch (ResumeS.eState) - { - case RESUME_EXTERNAL: - Resume_Init(); - ResumeS.eState = RESUME_OFF; - break; - case RESUME_INTERNAL: - Resume_Init(); - ResumeS.eState = RESUME_START; - break; - case RESUME_LATER: - ResumeS.bESOFcnt = 2; - ResumeS.eState = RESUME_WAIT; - break; - case RESUME_WAIT: - ResumeS.bESOFcnt--; - if (ResumeS.bESOFcnt == 0) - ResumeS.eState = RESUME_START; - break; - case RESUME_START: - wCNTR = _GetCNTR(); - wCNTR |= CNTR_RESUME; - _SetCNTR(wCNTR); - ResumeS.eState = RESUME_ON; - ResumeS.bESOFcnt = 10; - break; - case RESUME_ON: - ResumeS.bESOFcnt--; - if (ResumeS.bESOFcnt == 0) - { - wCNTR = _GetCNTR(); - wCNTR &= (~CNTR_RESUME); - _SetCNTR(wCNTR); - ResumeS.eState = RESUME_OFF; - } - break; - case RESUME_OFF: - case RESUME_ESOF: - default: - ResumeS.eState = RESUME_OFF; - break; - } -} - -/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/Libraries/Mass_Storage/src/usb_scsi.c b/bsp/stm32_radio/Libraries/Mass_Storage/src/usb_scsi.c deleted file mode 100644 index 64869a0a24..0000000000 --- a/bsp/stm32_radio/Libraries/Mass_Storage/src/usb_scsi.c +++ /dev/null @@ -1,438 +0,0 @@ -/******************** (C) COPYRIGHT 2009 STMicroelectronics ******************** -* File Name : usb_scsi.c -* Author : MCD Application Team -* Version : V3.0.1 -* Date : 04/27/2009 -* Description : All processing related to the SCSI commands -******************************************************************************** -* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS -* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. -* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, -* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE -* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING -* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -/* Includes ------------------------------------------------------------------*/ -#include "hw_config.h" -#include "usb_scsi.h" -#include "mass_mal.h" -#include "usb_bot.h" -#include "usb_regs.h" -#include "memory.h" -#include "nand_if.h" -#include "platform_config.h" - -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ -/* Private macro -------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/* External variables --------------------------------------------------------*/ -extern uint8_t Bulk_Data_Buff[BULK_MAX_PACKET_SIZE]; /* data buffer*/ -extern uint8_t Bot_State; -extern Bulk_Only_CBW CBW; -extern Bulk_Only_CSW CSW; - -/* lun=3 1:SPI_FLASH 2:SD card 3:NAND-FLASH */ -extern uint32_t Mass_Memory_Size[3]; -extern uint32_t Mass_Block_Size[3]; -extern uint32_t Mass_Block_Count[3]; - -/* Private function prototypes -----------------------------------------------*/ -/* Private functions ---------------------------------------------------------*/ - -/******************************************************************************* -* Function Name : SCSI_Inquiry_Cmd -* Description : SCSI Inquiry Command routine. -* Input : None. -* Output : None. -* Return : None. -*******************************************************************************/ -void SCSI_Inquiry_Cmd(uint8_t lun) -{ - uint8_t* Inquiry_Data; - uint16_t Inquiry_Data_Length; - - if (CBW.CB[1] & 0x01)/*Evpd is set*/ - { - Inquiry_Data = Page00_Inquiry_Data; - Inquiry_Data_Length = 5; - } - else - { - switch(lun) - { - case 0: - Inquiry_Data = Standard_Inquiry_Data1; - break; - case 1: - Inquiry_Data = Standard_Inquiry_Data2; - break; - case 2: - Inquiry_Data = Standard_Inquiry_Data3; - break; - } - - if (CBW.CB[4] <= STANDARD_INQUIRY_DATA_LEN) - Inquiry_Data_Length = CBW.CB[4]; - else - Inquiry_Data_Length = STANDARD_INQUIRY_DATA_LEN; - - } - Transfer_Data_Request(Inquiry_Data, Inquiry_Data_Length); -} - -/******************************************************************************* -* Function Name : SCSI_ReadFormatCapacity_Cmd -* Description : SCSI ReadFormatCapacity Command routine. -* Input : None. -* Output : None. -* Return : None. -*******************************************************************************/ -void SCSI_ReadFormatCapacity_Cmd(uint8_t lun) -{ - - if (MAL_GetStatus(lun) != 0 ) - { - Set_Scsi_Sense_Data(CBW.bLUN, NOT_READY, MEDIUM_NOT_PRESENT); - Set_CSW (CSW_CMD_FAILED, SEND_CSW_ENABLE); - Bot_Abort(DIR_IN); - return; - } - ReadFormatCapacity_Data[4] = (uint8_t)(Mass_Block_Count[lun] >> 24); - ReadFormatCapacity_Data[5] = (uint8_t)(Mass_Block_Count[lun] >> 16); - ReadFormatCapacity_Data[6] = (uint8_t)(Mass_Block_Count[lun] >> 8); - ReadFormatCapacity_Data[7] = (uint8_t)(Mass_Block_Count[lun]); - - ReadFormatCapacity_Data[9] = (uint8_t)(Mass_Block_Size[lun] >> 16); - ReadFormatCapacity_Data[10] = (uint8_t)(Mass_Block_Size[lun] >> 8); - ReadFormatCapacity_Data[11] = (uint8_t)(Mass_Block_Size[lun]); - Transfer_Data_Request(ReadFormatCapacity_Data, READ_FORMAT_CAPACITY_DATA_LEN); -} - -/******************************************************************************* -* Function Name : SCSI_ReadCapacity10_Cmd -* Description : SCSI ReadCapacity10 Command routine. -* Input : None. -* Output : None. -* Return : None. -*******************************************************************************/ -void SCSI_ReadCapacity10_Cmd(uint8_t lun) -{ - - if (MAL_GetStatus(lun)) - { - Set_Scsi_Sense_Data(CBW.bLUN, NOT_READY, MEDIUM_NOT_PRESENT); - Set_CSW (CSW_CMD_FAILED, SEND_CSW_ENABLE); - Bot_Abort(DIR_IN); - return; - } - - ReadCapacity10_Data[0] = (uint8_t)(Mass_Block_Count[lun] - 1 >> 24); - ReadCapacity10_Data[1] = (uint8_t)(Mass_Block_Count[lun] - 1 >> 16); - ReadCapacity10_Data[2] = (uint8_t)(Mass_Block_Count[lun] - 1 >> 8); - ReadCapacity10_Data[3] = (uint8_t)(Mass_Block_Count[lun] - 1); - - ReadCapacity10_Data[4] = (uint8_t)(Mass_Block_Size[lun] >> 24); - ReadCapacity10_Data[5] = (uint8_t)(Mass_Block_Size[lun] >> 16); - ReadCapacity10_Data[6] = (uint8_t)(Mass_Block_Size[lun] >> 8); - ReadCapacity10_Data[7] = (uint8_t)(Mass_Block_Size[lun]); - Transfer_Data_Request(ReadCapacity10_Data, READ_CAPACITY10_DATA_LEN); -} - -/******************************************************************************* -* Function Name : SCSI_ModeSense6_Cmd -* Description : SCSI ModeSense6 Command routine. -* Input : None. -* Output : None. -* Return : None. -*******************************************************************************/ -void SCSI_ModeSense6_Cmd (uint8_t lun) -{ - Transfer_Data_Request(Mode_Sense6_data, MODE_SENSE6_DATA_LEN); -} - -/******************************************************************************* -* Function Name : SCSI_ModeSense10_Cmd -* Description : SCSI ModeSense10 Command routine. -* Input : None. -* Output : None. -* Return : None. -*******************************************************************************/ -void SCSI_ModeSense10_Cmd (uint8_t lun) -{ - Transfer_Data_Request(Mode_Sense10_data, MODE_SENSE10_DATA_LEN); -} - -/******************************************************************************* -* Function Name : SCSI_RequestSense_Cmd -* Description : SCSI RequestSense Command routine. -* Input : None. -* Output : None. -* Return : None. -*******************************************************************************/ -void SCSI_RequestSense_Cmd (uint8_t lun) -{ - uint8_t Request_Sense_data_Length; - - if (CBW.CB[4] <= REQUEST_SENSE_DATA_LEN) - { - Request_Sense_data_Length = CBW.CB[4]; - } - else - { - Request_Sense_data_Length = REQUEST_SENSE_DATA_LEN; - } - Transfer_Data_Request(Scsi_Sense_Data, Request_Sense_data_Length); -} - -/******************************************************************************* -* Function Name : Set_Scsi_Sense_Data -* Description : Set Scsi Sense Data routine. -* Input : uint8_t Sens_Key - uint8_t Asc. -* Output : None. -* Return : None. -*******************************************************************************/ -void Set_Scsi_Sense_Data(uint8_t lun, uint8_t Sens_Key, uint8_t Asc) -{ - Scsi_Sense_Data[2] = Sens_Key; - Scsi_Sense_Data[12] = Asc; -} - -/******************************************************************************* -* Function Name : SCSI_Start_Stop_Unit_Cmd -* Description : SCSI Start_Stop_Unit Command routine. -* Input : None. -* Output : None. -* Return : None. -*******************************************************************************/ -void SCSI_Start_Stop_Unit_Cmd(uint8_t lun) -{ - Set_CSW (CSW_CMD_PASSED, SEND_CSW_ENABLE); -} - -/******************************************************************************* -* Function Name : SCSI_Read10_Cmd -* Description : SCSI Read10 Command routine. -* Input : None. -* Output : None. -* Return : None. -*******************************************************************************/ -void SCSI_Read10_Cmd(uint8_t lun , uint32_t LBA , uint32_t BlockNbr) -{ - - if (Bot_State == BOT_IDLE) - { - /*address out of range*/ - if (!(SCSI_Address_Management(CBW.bLUN, SCSI_READ10, LBA, BlockNbr))) - { - return; - } - - if ((CBW.bmFlags & 0x80) != 0) - { - Bot_State = BOT_DATA_IN; - Read_Memory(lun, LBA , BlockNbr); - } - else - { - Bot_Abort(BOTH_DIR); - Set_Scsi_Sense_Data(CBW.bLUN, ILLEGAL_REQUEST, INVALID_FIELED_IN_COMMAND); - Set_CSW (CSW_CMD_FAILED, SEND_CSW_ENABLE); - } - return; - } - else if (Bot_State == BOT_DATA_IN) - { - Read_Memory(lun , LBA , BlockNbr); - } -} - -/******************************************************************************* -* Function Name : SCSI_Write10_Cmd -* Description : SCSI Write10 Command routine. -* Input : None. -* Output : None. -* Return : None. -*******************************************************************************/ -void SCSI_Write10_Cmd(uint8_t lun , uint32_t LBA , uint32_t BlockNbr) -{ - - if (Bot_State == BOT_IDLE) - { - if (!(SCSI_Address_Management(CBW.bLUN, SCSI_WRITE10 , LBA, BlockNbr)))/*address out of range*/ - { - return; - } - - if ((CBW.bmFlags & 0x80) == 0) - { - Bot_State = BOT_DATA_OUT; - SetEPRxStatus(ENDP2, EP_RX_VALID); - } - else - { - Bot_Abort(DIR_IN); - Set_Scsi_Sense_Data(CBW.bLUN, ILLEGAL_REQUEST, INVALID_FIELED_IN_COMMAND); - Set_CSW (CSW_CMD_FAILED, SEND_CSW_DISABLE); - } - return; - } - else if (Bot_State == BOT_DATA_OUT) - { - Write_Memory(lun , LBA , BlockNbr); - } -} - -/******************************************************************************* -* Function Name : SCSI_Verify10_Cmd -* Description : SCSI Verify10 Command routine. -* Input : None. -* Output : None. -* Return : None. -*******************************************************************************/ -void SCSI_Verify10_Cmd(uint8_t lun) -{ - if ((CBW.dDataLength == 0) && !(CBW.CB[1] & BLKVFY))/* BLKVFY not set*/ - { - Set_CSW (CSW_CMD_PASSED, SEND_CSW_ENABLE); - } - else - { - Bot_Abort(BOTH_DIR); - Set_Scsi_Sense_Data(CBW.bLUN, ILLEGAL_REQUEST, INVALID_FIELED_IN_COMMAND); - Set_CSW (CSW_CMD_FAILED, SEND_CSW_DISABLE); - } -} -/******************************************************************************* -* Function Name : SCSI_Valid_Cmd -* Description : Valid Commands routine. -* Input : None. -* Output : None. -* Return : None. -*******************************************************************************/ -void SCSI_Valid_Cmd(uint8_t lun) -{ - if (CBW.dDataLength != 0) - { - Bot_Abort(BOTH_DIR); - Set_Scsi_Sense_Data(CBW.bLUN, ILLEGAL_REQUEST, INVALID_COMMAND); - Set_CSW (CSW_CMD_FAILED, SEND_CSW_DISABLE); - } - else - Set_CSW (CSW_CMD_PASSED, SEND_CSW_ENABLE); -} -/******************************************************************************* -* Function Name : SCSI_Valid_Cmd -* Description : Valid Commands routine. -* Input : None. -* Output : None. -* Return : None. -*******************************************************************************/ -void SCSI_TestUnitReady_Cmd(uint8_t lun) -{ - if (MAL_GetStatus(lun)) - { - Set_Scsi_Sense_Data(CBW.bLUN, NOT_READY, MEDIUM_NOT_PRESENT); - Set_CSW (CSW_CMD_FAILED, SEND_CSW_ENABLE); - Bot_Abort(DIR_IN); - return; - } - else - { - Set_CSW (CSW_CMD_PASSED, SEND_CSW_ENABLE); - } -} -/******************************************************************************* -* Function Name : SCSI_Format_Cmd -* Description : Format Commands routine. -* Input : None. -* Output : None. -* Return : None. -*******************************************************************************/ -void SCSI_Format_Cmd(uint8_t lun) -{ - if (MAL_GetStatus(lun)) - { - Set_Scsi_Sense_Data(CBW.bLUN, NOT_READY, MEDIUM_NOT_PRESENT); - Set_CSW (CSW_CMD_FAILED, SEND_CSW_ENABLE); - Bot_Abort(DIR_IN); - return; - } -#ifdef USE_STM3210E_EVAL - else - { - //NAND_Format(); - Set_CSW (CSW_CMD_PASSED, SEND_CSW_ENABLE); - } -#endif -} -/******************************************************************************* -* Function Name : SCSI_Invalid_Cmd -* Description : Invalid Commands routine -* Input : None. -* Output : None. -* Return : None. -*******************************************************************************/ -void SCSI_Invalid_Cmd(uint8_t lun) -{ - if (CBW.dDataLength == 0) - { - Bot_Abort(DIR_IN); - } - else - { - if ((CBW.bmFlags & 0x80) != 0) - { - Bot_Abort(DIR_IN); - } - else - { - Bot_Abort(BOTH_DIR); - } - } - Set_Scsi_Sense_Data(CBW.bLUN, ILLEGAL_REQUEST, INVALID_COMMAND); - Set_CSW (CSW_CMD_FAILED, SEND_CSW_DISABLE); -} - -/******************************************************************************* -* Function Name : SCSI_Address_Management -* Description : Test the received address. -* Input : uint8_t Cmd : the command can be SCSI_READ10 or SCSI_WRITE10. -* Output : None. -* Return : Read\Write status (bool). -*******************************************************************************/ -bool SCSI_Address_Management(uint8_t lun , uint8_t Cmd , uint32_t LBA , uint32_t BlockNbr) -{ - - if ((LBA + BlockNbr) > Mass_Block_Count[lun] ) - { - if (Cmd == SCSI_WRITE10) - { - Bot_Abort(BOTH_DIR); - } - Bot_Abort(DIR_IN); - Set_Scsi_Sense_Data(lun, ILLEGAL_REQUEST, ADDRESS_OUT_OF_RANGE); - Set_CSW (CSW_CMD_FAILED, SEND_CSW_DISABLE); - return (FALSE); - } - - - if (CBW.dDataLength != BlockNbr * Mass_Block_Size[lun]) - { - if (Cmd == SCSI_WRITE10) - { - Bot_Abort(BOTH_DIR); - } - else - { - Bot_Abort(DIR_IN); - } - Set_Scsi_Sense_Data(CBW.bLUN, ILLEGAL_REQUEST, INVALID_FIELED_IN_COMMAND); - Set_CSW (CSW_CMD_FAILED, SEND_CSW_DISABLE); - return (FALSE); - } - return (TRUE); -} -/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/Release_Notes_for_STM32F10x_StdPeriph_Driver.html b/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/Release_Notes_for_STM32F10x_StdPeriph_Driver.html deleted file mode 100644 index 56cc3cbfe5..0000000000 --- a/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/Release_Notes_for_STM32F10x_StdPeriph_Driver.html +++ /dev/null @@ -1,179 +0,0 @@ - - - - - - -Release Notes for STM32F10x Standard Peripherals Library Drivers - - - - -
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Back to Release page
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Release -Notes for STM32F10x Standard Peripherals Library Drivers -(StdPeriph_Driver)

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Copyright 2010 STMicroelectronics

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Contents

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  1. STM32F10x Standard Peripherals Library -Drivers update History
    2. -
  2. License
    3. -
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STM32F10x Standard -Peripherals Library Drivers  update History

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3.2.0 -- 03/01/2010

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  1. General
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  • Add support -for STM32 Low-density Value line (STM32F100x4/6) and -Medium-density Value line (STM32F100x8/B) devices.
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  • Almost -peripherals drivers were updated to support Value -line devices features
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  • Drivers limitations fix and enhancements.
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  1. STM32F10x_StdPeriph_Driver
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  • Add new -firmware driver for CEC peripheral: stm32f10x_cec.h and stm32f10x_cec.c
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  • Timers drivers stm32f10x_tim.h/.c: add support for new General Purpose Timers: TIM15, TIM16 and TIM17.
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  • RCC driver: add support for new Value peripherals: HDMI-CEC, TIM15, TIM16 and TIM17.
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  • GPIO driver: add new remap parameters for TIM1, TIM15, TIM16, TIM17 and HDMI-CEC: GPIO_Remap_TIM1_DMA, GPIO_Remap_TIM15, GPIO_Remap_TIM16, GPIO_Remap_TIM17, GPIO_Remap_CEC.
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  • USART -driver: add support for Oversampling by 8 mode and onebit method. 2 -functions has been added: USART_OverSampling8Cmd() and -USART_OneBitMethodCmd().
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  • DAC -driver: add new functions handling the DAC under run feature: -DAC_ITConfig(), DAC_GetFlagStatus(), DAC_ClearFlag(), DAC_GetITStatus() -and DAC_ClearITPendingBit().
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  • DBGMCU driver: add new parameters for TIM15, TIM16 and TIM17: DBGMCU_TIM15_STOP, DBGMCU_TIM16_STOP, DBGMCU_TIM17_STOP.
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  • FLASH -driver: the FLASH_EraseOptionBytes() function updated. This is now just -erasing the option bytes without modifying the RDP status either -enabled or disabled.
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  • PWR -driver: the PWR_EnterSTOPMode() function updated. When woken up from -STOP mode, this function resets again the SLEEPDEEP bit in the -Cortex-M3 System Control register to allow Sleep mode entering.
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License

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The -enclosed firmware and all the related documentation are not covered by -a License Agreement, if you need such License you can contact your -local STMicroelectronics office.

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THE -PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS -WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO -SAVE TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR -ANY DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY -CLAIMS ARISING FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY -CUSTOMERS OF THE CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH -THEIR PRODUCTS.

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For -complete documentation on STM32(CORTEX M3) 32-Bit Microcontrollers -visit www.st.com/STM32

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- \ No newline at end of file diff --git a/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/inc/misc.h b/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/inc/misc.h deleted file mode 100644 index 7e96ab8829..0000000000 --- a/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/inc/misc.h +++ /dev/null @@ -1,219 +0,0 @@ -/** - ****************************************************************************** - * @file misc.h - * @author MCD Application Team - * @version V3.2.0 - * @date 03/01/2010 - * @brief This file contains all the functions prototypes for the miscellaneous - * firmware library functions (add-on to CMSIS functions). - ****************************************************************************** - * @copy - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2010 STMicroelectronics

- */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __MISC_H -#define __MISC_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x.h" - -/** @addtogroup STM32F10x_StdPeriph_Driver - * @{ - */ - -/** @addtogroup MISC - * @{ - */ - -/** @defgroup MISC_Exported_Types - * @{ - */ - -/** - * @brief NVIC Init Structure definition - */ - -typedef struct -{ - uint8_t NVIC_IRQChannel; /*!< Specifies the IRQ channel to be enabled or disabled. - This parameter can be a value of @ref IRQn_Type - (For the complete STM32 Devices IRQ Channels list, please - refer to stm32f10x.h file) */ - - uint8_t NVIC_IRQChannelPreemptionPriority; /*!< Specifies the pre-emption priority for the IRQ channel - specified in NVIC_IRQChannel. This parameter can be a value - between 0 and 15 as described in the table @ref NVIC_Priority_Table */ - - uint8_t NVIC_IRQChannelSubPriority; /*!< Specifies the subpriority level for the IRQ channel specified - in NVIC_IRQChannel. This parameter can be a value - between 0 and 15 as described in the table @ref NVIC_Priority_Table */ - - FunctionalState NVIC_IRQChannelCmd; /*!< Specifies whether the IRQ channel defined in NVIC_IRQChannel - will be enabled or disabled. - This parameter can be set either to ENABLE or DISABLE */ -} NVIC_InitTypeDef; - -/** - * @} - */ - -/** @defgroup NVIC_Priority_Table - * @{ - */ - -/** -@code - The table below gives the allowed values of the pre-emption priority and subpriority according - to the Priority Grouping configuration performed by NVIC_PriorityGroupConfig function - ============================================================================================================================ - NVIC_PriorityGroup | NVIC_IRQChannelPreemptionPriority | NVIC_IRQChannelSubPriority | Description - ============================================================================================================================ - NVIC_PriorityGroup_0 | 0 | 0-15 | 0 bits for pre-emption priority - | | | 4 bits for subpriority - ---------------------------------------------------------------------------------------------------------------------------- - NVIC_PriorityGroup_1 | 0-1 | 0-7 | 1 bits for pre-emption priority - | | | 3 bits for subpriority - ---------------------------------------------------------------------------------------------------------------------------- - NVIC_PriorityGroup_2 | 0-3 | 0-3 | 2 bits for pre-emption priority - | | | 2 bits for subpriority - ---------------------------------------------------------------------------------------------------------------------------- - NVIC_PriorityGroup_3 | 0-7 | 0-1 | 3 bits for pre-emption priority - | | | 1 bits for subpriority - ---------------------------------------------------------------------------------------------------------------------------- - NVIC_PriorityGroup_4 | 0-15 | 0 | 4 bits for pre-emption priority - | | | 0 bits for subpriority - ============================================================================================================================ -@endcode -*/ - -/** - * @} - */ - -/** @defgroup MISC_Exported_Constants - * @{ - */ - -/** @defgroup Vector_Table_Base - * @{ - */ - -#define NVIC_VectTab_RAM ((uint32_t)0x20000000) -#define NVIC_VectTab_FLASH ((uint32_t)0x08000000) -#define IS_NVIC_VECTTAB(VECTTAB) (((VECTTAB) == NVIC_VectTab_RAM) || \ - ((VECTTAB) == NVIC_VectTab_FLASH)) -/** - * @} - */ - -/** @defgroup System_Low_Power - * @{ - */ - -#define NVIC_LP_SEVONPEND ((uint8_t)0x10) -#define NVIC_LP_SLEEPDEEP ((uint8_t)0x04) -#define NVIC_LP_SLEEPONEXIT ((uint8_t)0x02) -#define IS_NVIC_LP(LP) (((LP) == NVIC_LP_SEVONPEND) || \ - ((LP) == NVIC_LP_SLEEPDEEP) || \ - ((LP) == NVIC_LP_SLEEPONEXIT)) -/** - * @} - */ - -/** @defgroup Preemption_Priority_Group - * @{ - */ - -#define NVIC_PriorityGroup_0 ((uint32_t)0x700) /*!< 0 bits for pre-emption priority - 4 bits for subpriority */ -#define NVIC_PriorityGroup_1 ((uint32_t)0x600) /*!< 1 bits for pre-emption priority - 3 bits for subpriority */ -#define NVIC_PriorityGroup_2 ((uint32_t)0x500) /*!< 2 bits for pre-emption priority - 2 bits for subpriority */ -#define NVIC_PriorityGroup_3 ((uint32_t)0x400) /*!< 3 bits for pre-emption priority - 1 bits for subpriority */ -#define NVIC_PriorityGroup_4 ((uint32_t)0x300) /*!< 4 bits for pre-emption priority - 0 bits for subpriority */ - -#define IS_NVIC_PRIORITY_GROUP(GROUP) (((GROUP) == NVIC_PriorityGroup_0) || \ - ((GROUP) == NVIC_PriorityGroup_1) || \ - ((GROUP) == NVIC_PriorityGroup_2) || \ - ((GROUP) == NVIC_PriorityGroup_3) || \ - ((GROUP) == NVIC_PriorityGroup_4)) - -#define IS_NVIC_PREEMPTION_PRIORITY(PRIORITY) ((PRIORITY) < 0x10) - -#define IS_NVIC_SUB_PRIORITY(PRIORITY) ((PRIORITY) < 0x10) - -#define IS_NVIC_OFFSET(OFFSET) ((OFFSET) < 0x0007FFFF) - -/** - * @} - */ - -/** @defgroup SysTick_clock_source - * @{ - */ - -#define SysTick_CLKSource_HCLK_Div8 ((uint32_t)0xFFFFFFFB) -#define SysTick_CLKSource_HCLK ((uint32_t)0x00000004) -#define IS_SYSTICK_CLK_SOURCE(SOURCE) (((SOURCE) == SysTick_CLKSource_HCLK) || \ - ((SOURCE) == SysTick_CLKSource_HCLK_Div8)) -/** - * @} - */ - -/** - * @} - */ - -/** @defgroup MISC_Exported_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup MISC_Exported_Functions - * @{ - */ - -void NVIC_PriorityGroupConfig(uint32_t NVIC_PriorityGroup); -void NVIC_Init(NVIC_InitTypeDef* NVIC_InitStruct); -void NVIC_SetVectorTable(uint32_t NVIC_VectTab, uint32_t Offset); -void NVIC_SystemLPConfig(uint8_t LowPowerMode, FunctionalState NewState); -void SysTick_CLKSourceConfig(uint32_t SysTick_CLKSource); - -#ifdef __cplusplus -} -#endif - -#endif /* __MISC_H */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_adc.h b/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_adc.h deleted file mode 100644 index 41942cfc9b..0000000000 --- a/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_adc.h +++ /dev/null @@ -1,479 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f10x_adc.h - * @author MCD Application Team - * @version V3.2.0 - * @date 03/01/2010 - * @brief This file contains all the functions prototypes for the ADC firmware - * library. - ****************************************************************************** - * @copy - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2010 STMicroelectronics

- */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F10x_ADC_H -#define __STM32F10x_ADC_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x.h" - -/** @addtogroup STM32F10x_StdPeriph_Driver - * @{ - */ - -/** @addtogroup ADC - * @{ - */ - -/** @defgroup ADC_Exported_Types - * @{ - */ - -/** - * @brief ADC Init structure definition - */ - -typedef struct -{ - uint32_t ADC_Mode; /*!< Configures the ADC to operate in independent or - dual mode. - This parameter can be a value of @ref ADC_mode */ - - FunctionalState ADC_ScanConvMode; /*!< Specifies whether the conversion is performed in - Scan (multichannels) or Single (one channel) mode. - This parameter can be set to ENABLE or DISABLE */ - - FunctionalState ADC_ContinuousConvMode; /*!< Specifies whether the conversion is performed in - Continuous or Single mode. - This parameter can be set to ENABLE or DISABLE. */ - - uint32_t ADC_ExternalTrigConv; /*!< Defines the external trigger used to start the analog - to digital conversion of regular channels. This parameter - can be a value of @ref ADC_external_trigger_sources_for_regular_channels_conversion */ - - uint32_t ADC_DataAlign; /*!< Specifies whether the ADC data alignment is left or right. - This parameter can be a value of @ref ADC_data_align */ - - uint8_t ADC_NbrOfChannel; /*!< Specifies the number of ADC channels that will be converted - using the sequencer for regular channel group. - This parameter must range from 1 to 16. */ -}ADC_InitTypeDef; -/** - * @} - */ - -/** @defgroup ADC_Exported_Constants - * @{ - */ - -#define IS_ADC_ALL_PERIPH(PERIPH) (((PERIPH) == ADC1) || \ - ((PERIPH) == ADC2) || \ - ((PERIPH) == ADC3)) - -#define IS_ADC_DMA_PERIPH(PERIPH) (((PERIPH) == ADC1) || \ - ((PERIPH) == ADC3)) - -/** @defgroup ADC_mode - * @{ - */ - -#define ADC_Mode_Independent ((uint32_t)0x00000000) -#define ADC_Mode_RegInjecSimult ((uint32_t)0x00010000) -#define ADC_Mode_RegSimult_AlterTrig ((uint32_t)0x00020000) -#define ADC_Mode_InjecSimult_FastInterl ((uint32_t)0x00030000) -#define ADC_Mode_InjecSimult_SlowInterl ((uint32_t)0x00040000) -#define ADC_Mode_InjecSimult ((uint32_t)0x00050000) -#define ADC_Mode_RegSimult ((uint32_t)0x00060000) -#define ADC_Mode_FastInterl ((uint32_t)0x00070000) -#define ADC_Mode_SlowInterl ((uint32_t)0x00080000) -#define ADC_Mode_AlterTrig ((uint32_t)0x00090000) - -#define IS_ADC_MODE(MODE) (((MODE) == ADC_Mode_Independent) || \ - ((MODE) == ADC_Mode_RegInjecSimult) || \ - ((MODE) == ADC_Mode_RegSimult_AlterTrig) || \ - ((MODE) == ADC_Mode_InjecSimult_FastInterl) || \ - ((MODE) == ADC_Mode_InjecSimult_SlowInterl) || \ - ((MODE) == ADC_Mode_InjecSimult) || \ - ((MODE) == ADC_Mode_RegSimult) || \ - ((MODE) == ADC_Mode_FastInterl) || \ - ((MODE) == ADC_Mode_SlowInterl) || \ - ((MODE) == ADC_Mode_AlterTrig)) -/** - * @} - */ - -/** @defgroup ADC_external_trigger_sources_for_regular_channels_conversion - * @{ - */ - -#define ADC_ExternalTrigConv_T1_CC1 ((uint32_t)0x00000000) /*!< For ADC1 and ADC2 */ -#define ADC_ExternalTrigConv_T1_CC2 ((uint32_t)0x00020000) /*!< For ADC1 and ADC2 */ -#define ADC_ExternalTrigConv_T2_CC2 ((uint32_t)0x00060000) /*!< For ADC1 and ADC2 */ -#define ADC_ExternalTrigConv_T3_TRGO ((uint32_t)0x00080000) /*!< For ADC1 and ADC2 */ -#define ADC_ExternalTrigConv_T4_CC4 ((uint32_t)0x000A0000) /*!< For ADC1 and ADC2 */ -#define ADC_ExternalTrigConv_Ext_IT11_TIM8_TRGO ((uint32_t)0x000C0000) /*!< For ADC1 and ADC2 */ - -#define ADC_ExternalTrigConv_T1_CC3 ((uint32_t)0x00040000) /*!< For ADC1, ADC2 and ADC3 */ -#define ADC_ExternalTrigConv_None ((uint32_t)0x000E0000) /*!< For ADC1, ADC2 and ADC3 */ - -#define ADC_ExternalTrigConv_T3_CC1 ((uint32_t)0x00000000) /*!< For ADC3 only */ -#define ADC_ExternalTrigConv_T2_CC3 ((uint32_t)0x00020000) /*!< For ADC3 only */ -#define ADC_ExternalTrigConv_T8_CC1 ((uint32_t)0x00060000) /*!< For ADC3 only */ -#define ADC_ExternalTrigConv_T8_TRGO ((uint32_t)0x00080000) /*!< For ADC3 only */ -#define ADC_ExternalTrigConv_T5_CC1 ((uint32_t)0x000A0000) /*!< For ADC3 only */ -#define ADC_ExternalTrigConv_T5_CC3 ((uint32_t)0x000C0000) /*!< For ADC3 only */ - -#define IS_ADC_EXT_TRIG(REGTRIG) (((REGTRIG) == ADC_ExternalTrigConv_T1_CC1) || \ - ((REGTRIG) == ADC_ExternalTrigConv_T1_CC2) || \ - ((REGTRIG) == ADC_ExternalTrigConv_T1_CC3) || \ - ((REGTRIG) == ADC_ExternalTrigConv_T2_CC2) || \ - ((REGTRIG) == ADC_ExternalTrigConv_T3_TRGO) || \ - ((REGTRIG) == ADC_ExternalTrigConv_T4_CC4) || \ - ((REGTRIG) == ADC_ExternalTrigConv_Ext_IT11_TIM8_TRGO) || \ - ((REGTRIG) == ADC_ExternalTrigConv_None) || \ - ((REGTRIG) == ADC_ExternalTrigConv_T3_CC1) || \ - ((REGTRIG) == ADC_ExternalTrigConv_T2_CC3) || \ - ((REGTRIG) == ADC_ExternalTrigConv_T8_CC1) || \ - ((REGTRIG) == ADC_ExternalTrigConv_T8_TRGO) || \ - ((REGTRIG) == ADC_ExternalTrigConv_T5_CC1) || \ - ((REGTRIG) == ADC_ExternalTrigConv_T5_CC3)) -/** - * @} - */ - -/** @defgroup ADC_data_align - * @{ - */ - -#define ADC_DataAlign_Right ((uint32_t)0x00000000) -#define ADC_DataAlign_Left ((uint32_t)0x00000800) -#define IS_ADC_DATA_ALIGN(ALIGN) (((ALIGN) == ADC_DataAlign_Right) || \ - ((ALIGN) == ADC_DataAlign_Left)) -/** - * @} - */ - -/** @defgroup ADC_channels - * @{ - */ - -#define ADC_Channel_0 ((uint8_t)0x00) -#define ADC_Channel_1 ((uint8_t)0x01) -#define ADC_Channel_2 ((uint8_t)0x02) -#define ADC_Channel_3 ((uint8_t)0x03) -#define ADC_Channel_4 ((uint8_t)0x04) -#define ADC_Channel_5 ((uint8_t)0x05) -#define ADC_Channel_6 ((uint8_t)0x06) -#define ADC_Channel_7 ((uint8_t)0x07) -#define ADC_Channel_8 ((uint8_t)0x08) -#define ADC_Channel_9 ((uint8_t)0x09) -#define ADC_Channel_10 ((uint8_t)0x0A) -#define ADC_Channel_11 ((uint8_t)0x0B) -#define ADC_Channel_12 ((uint8_t)0x0C) -#define ADC_Channel_13 ((uint8_t)0x0D) -#define ADC_Channel_14 ((uint8_t)0x0E) -#define ADC_Channel_15 ((uint8_t)0x0F) -#define ADC_Channel_16 ((uint8_t)0x10) -#define ADC_Channel_17 ((uint8_t)0x11) - -#define IS_ADC_CHANNEL(CHANNEL) (((CHANNEL) == ADC_Channel_0) || ((CHANNEL) == ADC_Channel_1) || \ - ((CHANNEL) == ADC_Channel_2) || ((CHANNEL) == ADC_Channel_3) || \ - ((CHANNEL) == ADC_Channel_4) || ((CHANNEL) == ADC_Channel_5) || \ - ((CHANNEL) == ADC_Channel_6) || ((CHANNEL) == ADC_Channel_7) || \ - ((CHANNEL) == ADC_Channel_8) || ((CHANNEL) == ADC_Channel_9) || \ - ((CHANNEL) == ADC_Channel_10) || ((CHANNEL) == ADC_Channel_11) || \ - ((CHANNEL) == ADC_Channel_12) || ((CHANNEL) == ADC_Channel_13) || \ - ((CHANNEL) == ADC_Channel_14) || ((CHANNEL) == ADC_Channel_15) || \ - ((CHANNEL) == ADC_Channel_16) || ((CHANNEL) == ADC_Channel_17)) -/** - * @} - */ - -/** @defgroup ADC_sampling_time - * @{ - */ - -#define ADC_SampleTime_1Cycles5 ((uint8_t)0x00) -#define ADC_SampleTime_7Cycles5 ((uint8_t)0x01) -#define ADC_SampleTime_13Cycles5 ((uint8_t)0x02) -#define ADC_SampleTime_28Cycles5 ((uint8_t)0x03) -#define ADC_SampleTime_41Cycles5 ((uint8_t)0x04) -#define ADC_SampleTime_55Cycles5 ((uint8_t)0x05) -#define ADC_SampleTime_71Cycles5 ((uint8_t)0x06) -#define ADC_SampleTime_239Cycles5 ((uint8_t)0x07) -#define IS_ADC_SAMPLE_TIME(TIME) (((TIME) == ADC_SampleTime_1Cycles5) || \ - ((TIME) == ADC_SampleTime_7Cycles5) || \ - ((TIME) == ADC_SampleTime_13Cycles5) || \ - ((TIME) == ADC_SampleTime_28Cycles5) || \ - ((TIME) == ADC_SampleTime_41Cycles5) || \ - ((TIME) == ADC_SampleTime_55Cycles5) || \ - ((TIME) == ADC_SampleTime_71Cycles5) || \ - ((TIME) == ADC_SampleTime_239Cycles5)) -/** - * @} - */ - -/** @defgroup ADC_external_trigger_sources_for_injected_channels_conversion - * @{ - */ - -#define ADC_ExternalTrigInjecConv_T2_TRGO ((uint32_t)0x00002000) /*!< For ADC1 and ADC2 */ -#define ADC_ExternalTrigInjecConv_T2_CC1 ((uint32_t)0x00003000) /*!< For ADC1 and ADC2 */ -#define ADC_ExternalTrigInjecConv_T3_CC4 ((uint32_t)0x00004000) /*!< For ADC1 and ADC2 */ -#define ADC_ExternalTrigInjecConv_T4_TRGO ((uint32_t)0x00005000) /*!< For ADC1 and ADC2 */ -#define ADC_ExternalTrigInjecConv_Ext_IT15_TIM8_CC4 ((uint32_t)0x00006000) /*!< For ADC1 and ADC2 */ - -#define ADC_ExternalTrigInjecConv_T1_TRGO ((uint32_t)0x00000000) /*!< For ADC1, ADC2 and ADC3 */ -#define ADC_ExternalTrigInjecConv_T1_CC4 ((uint32_t)0x00001000) /*!< For ADC1, ADC2 and ADC3 */ -#define ADC_ExternalTrigInjecConv_None ((uint32_t)0x00007000) /*!< For ADC1, ADC2 and ADC3 */ - -#define ADC_ExternalTrigInjecConv_T4_CC3 ((uint32_t)0x00002000) /*!< For ADC3 only */ -#define ADC_ExternalTrigInjecConv_T8_CC2 ((uint32_t)0x00003000) /*!< For ADC3 only */ -#define ADC_ExternalTrigInjecConv_T8_CC4 ((uint32_t)0x00004000) /*!< For ADC3 only */ -#define ADC_ExternalTrigInjecConv_T5_TRGO ((uint32_t)0x00005000) /*!< For ADC3 only */ -#define ADC_ExternalTrigInjecConv_T5_CC4 ((uint32_t)0x00006000) /*!< For ADC3 only */ - -#define IS_ADC_EXT_INJEC_TRIG(INJTRIG) (((INJTRIG) == ADC_ExternalTrigInjecConv_T1_TRGO) || \ - ((INJTRIG) == ADC_ExternalTrigInjecConv_T1_CC4) || \ - ((INJTRIG) == ADC_ExternalTrigInjecConv_T2_TRGO) || \ - ((INJTRIG) == ADC_ExternalTrigInjecConv_T2_CC1) || \ - ((INJTRIG) == ADC_ExternalTrigInjecConv_T3_CC4) || \ - ((INJTRIG) == ADC_ExternalTrigInjecConv_T4_TRGO) || \ - ((INJTRIG) == ADC_ExternalTrigInjecConv_Ext_IT15_TIM8_CC4) || \ - ((INJTRIG) == ADC_ExternalTrigInjecConv_None) || \ - ((INJTRIG) == ADC_ExternalTrigInjecConv_T4_CC3) || \ - ((INJTRIG) == ADC_ExternalTrigInjecConv_T8_CC2) || \ - ((INJTRIG) == ADC_ExternalTrigInjecConv_T8_CC4) || \ - ((INJTRIG) == ADC_ExternalTrigInjecConv_T5_TRGO) || \ - ((INJTRIG) == ADC_ExternalTrigInjecConv_T5_CC4)) -/** - * @} - */ - -/** @defgroup ADC_injected_channel_selection - * @{ - */ - -#define ADC_InjectedChannel_1 ((uint8_t)0x14) -#define ADC_InjectedChannel_2 ((uint8_t)0x18) -#define ADC_InjectedChannel_3 ((uint8_t)0x1C) -#define ADC_InjectedChannel_4 ((uint8_t)0x20) -#define IS_ADC_INJECTED_CHANNEL(CHANNEL) (((CHANNEL) == ADC_InjectedChannel_1) || \ - ((CHANNEL) == ADC_InjectedChannel_2) || \ - ((CHANNEL) == ADC_InjectedChannel_3) || \ - ((CHANNEL) == ADC_InjectedChannel_4)) -/** - * @} - */ - -/** @defgroup ADC_analog_watchdog_selection - * @{ - */ - -#define ADC_AnalogWatchdog_SingleRegEnable ((uint32_t)0x00800200) -#define ADC_AnalogWatchdog_SingleInjecEnable ((uint32_t)0x00400200) -#define ADC_AnalogWatchdog_SingleRegOrInjecEnable ((uint32_t)0x00C00200) -#define ADC_AnalogWatchdog_AllRegEnable ((uint32_t)0x00800000) -#define ADC_AnalogWatchdog_AllInjecEnable ((uint32_t)0x00400000) -#define ADC_AnalogWatchdog_AllRegAllInjecEnable ((uint32_t)0x00C00000) -#define ADC_AnalogWatchdog_None ((uint32_t)0x00000000) - -#define IS_ADC_ANALOG_WATCHDOG(WATCHDOG) (((WATCHDOG) == ADC_AnalogWatchdog_SingleRegEnable) || \ - ((WATCHDOG) == ADC_AnalogWatchdog_SingleInjecEnable) || \ - ((WATCHDOG) == ADC_AnalogWatchdog_SingleRegOrInjecEnable) || \ - ((WATCHDOG) == ADC_AnalogWatchdog_AllRegEnable) || \ - ((WATCHDOG) == ADC_AnalogWatchdog_AllInjecEnable) || \ - ((WATCHDOG) == ADC_AnalogWatchdog_AllRegAllInjecEnable) || \ - ((WATCHDOG) == ADC_AnalogWatchdog_None)) -/** - * @} - */ - -/** @defgroup ADC_interrupts_definition - * @{ - */ - -#define ADC_IT_EOC ((uint16_t)0x0220) -#define ADC_IT_AWD ((uint16_t)0x0140) -#define ADC_IT_JEOC ((uint16_t)0x0480) - -#define IS_ADC_IT(IT) ((((IT) & (uint16_t)0xF81F) == 0x00) && ((IT) != 0x00)) - -#define IS_ADC_GET_IT(IT) (((IT) == ADC_IT_EOC) || ((IT) == ADC_IT_AWD) || \ - ((IT) == ADC_IT_JEOC)) -/** - * @} - */ - -/** @defgroup ADC_flags_definition - * @{ - */ - -#define ADC_FLAG_AWD ((uint8_t)0x01) -#define ADC_FLAG_EOC ((uint8_t)0x02) -#define ADC_FLAG_JEOC ((uint8_t)0x04) -#define ADC_FLAG_JSTRT ((uint8_t)0x08) -#define ADC_FLAG_STRT ((uint8_t)0x10) -#define IS_ADC_CLEAR_FLAG(FLAG) ((((FLAG) & (uint8_t)0xE0) == 0x00) && ((FLAG) != 0x00)) -#define IS_ADC_GET_FLAG(FLAG) (((FLAG) == ADC_FLAG_AWD) || ((FLAG) == ADC_FLAG_EOC) || \ - ((FLAG) == ADC_FLAG_JEOC) || ((FLAG)== ADC_FLAG_JSTRT) || \ - ((FLAG) == ADC_FLAG_STRT)) -/** - * @} - */ - -/** @defgroup ADC_thresholds - * @{ - */ - -#define IS_ADC_THRESHOLD(THRESHOLD) ((THRESHOLD) <= 0xFFF) - -/** - * @} - */ - -/** @defgroup ADC_injected_offset - * @{ - */ - -#define IS_ADC_OFFSET(OFFSET) ((OFFSET) <= 0xFFF) - -/** - * @} - */ - -/** @defgroup ADC_injected_length - * @{ - */ - -#define IS_ADC_INJECTED_LENGTH(LENGTH) (((LENGTH) >= 0x1) && ((LENGTH) <= 0x4)) - -/** - * @} - */ - -/** @defgroup ADC_injected_rank - * @{ - */ - -#define IS_ADC_INJECTED_RANK(RANK) (((RANK) >= 0x1) && ((RANK) <= 0x4)) - -/** - * @} - */ - - -/** @defgroup ADC_regular_length - * @{ - */ - -#define IS_ADC_REGULAR_LENGTH(LENGTH) (((LENGTH) >= 0x1) && ((LENGTH) <= 0x10)) -/** - * @} - */ - -/** @defgroup ADC_regular_rank - * @{ - */ - -#define IS_ADC_REGULAR_RANK(RANK) (((RANK) >= 0x1) && ((RANK) <= 0x10)) - -/** - * @} - */ - -/** @defgroup ADC_regular_discontinuous_mode_number - * @{ - */ - -#define IS_ADC_REGULAR_DISC_NUMBER(NUMBER) (((NUMBER) >= 0x1) && ((NUMBER) <= 0x8)) - -/** - * @} - */ - -/** - * @} - */ - -/** @defgroup ADC_Exported_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup ADC_Exported_Functions - * @{ - */ - -void ADC_DeInit(ADC_TypeDef* ADCx); -void ADC_Init(ADC_TypeDef* ADCx, ADC_InitTypeDef* ADC_InitStruct); -void ADC_StructInit(ADC_InitTypeDef* ADC_InitStruct); -void ADC_Cmd(ADC_TypeDef* ADCx, FunctionalState NewState); -void ADC_DMACmd(ADC_TypeDef* ADCx, FunctionalState NewState); -void ADC_ITConfig(ADC_TypeDef* ADCx, uint16_t ADC_IT, FunctionalState NewState); -void ADC_ResetCalibration(ADC_TypeDef* ADCx); -FlagStatus ADC_GetResetCalibrationStatus(ADC_TypeDef* ADCx); -void ADC_StartCalibration(ADC_TypeDef* ADCx); -FlagStatus ADC_GetCalibrationStatus(ADC_TypeDef* ADCx); -void ADC_SoftwareStartConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState); -FlagStatus ADC_GetSoftwareStartConvStatus(ADC_TypeDef* ADCx); -void ADC_DiscModeChannelCountConfig(ADC_TypeDef* ADCx, uint8_t Number); -void ADC_DiscModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState); -void ADC_RegularChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel, uint8_t Rank, uint8_t ADC_SampleTime); -void ADC_ExternalTrigConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState); -uint16_t ADC_GetConversionValue(ADC_TypeDef* ADCx); -uint32_t ADC_GetDualModeConversionValue(void); -void ADC_AutoInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState); -void ADC_InjectedDiscModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState); -void ADC_ExternalTrigInjectedConvConfig(ADC_TypeDef* ADCx, uint32_t ADC_ExternalTrigInjecConv); -void ADC_ExternalTrigInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState); -void ADC_SoftwareStartInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState); -FlagStatus ADC_GetSoftwareStartInjectedConvCmdStatus(ADC_TypeDef* ADCx); -void ADC_InjectedChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel, uint8_t Rank, uint8_t ADC_SampleTime); -void ADC_InjectedSequencerLengthConfig(ADC_TypeDef* ADCx, uint8_t Length); -void ADC_SetInjectedOffset(ADC_TypeDef* ADCx, uint8_t ADC_InjectedChannel, uint16_t Offset); -uint16_t ADC_GetInjectedConversionValue(ADC_TypeDef* ADCx, uint8_t ADC_InjectedChannel); -void ADC_AnalogWatchdogCmd(ADC_TypeDef* ADCx, uint32_t ADC_AnalogWatchdog); -void ADC_AnalogWatchdogThresholdsConfig(ADC_TypeDef* ADCx, uint16_t HighThreshold, uint16_t LowThreshold); -void ADC_AnalogWatchdogSingleChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel); -void ADC_TempSensorVrefintCmd(FunctionalState NewState); -FlagStatus ADC_GetFlagStatus(ADC_TypeDef* ADCx, uint8_t ADC_FLAG); -void ADC_ClearFlag(ADC_TypeDef* ADCx, uint8_t ADC_FLAG); -ITStatus ADC_GetITStatus(ADC_TypeDef* ADCx, uint16_t ADC_IT); -void ADC_ClearITPendingBit(ADC_TypeDef* ADCx, uint16_t ADC_IT); - -#ifdef __cplusplus -} -#endif - -#endif /*__STM32F10x_ADC_H */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_bkp.h b/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_bkp.h deleted file mode 100644 index 8eba3b1736..0000000000 --- a/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_bkp.h +++ /dev/null @@ -1,194 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f10x_bkp.h - * @author MCD Application Team - * @version V3.2.0 - * @date 03/01/2010 - * @brief This file contains all the functions prototypes for the BKP firmware - * library. - ****************************************************************************** - * @copy - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2010 STMicroelectronics

- */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F10x_BKP_H -#define __STM32F10x_BKP_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x.h" - -/** @addtogroup STM32F10x_StdPeriph_Driver - * @{ - */ - -/** @addtogroup BKP - * @{ - */ - -/** @defgroup BKP_Exported_Types - * @{ - */ - -/** - * @} - */ - -/** @defgroup BKP_Exported_Constants - * @{ - */ - -/** @defgroup Tamper_Pin_active_level - * @{ - */ - -#define BKP_TamperPinLevel_High ((uint16_t)0x0000) -#define BKP_TamperPinLevel_Low ((uint16_t)0x0001) -#define IS_BKP_TAMPER_PIN_LEVEL(LEVEL) (((LEVEL) == BKP_TamperPinLevel_High) || \ - ((LEVEL) == BKP_TamperPinLevel_Low)) -/** - * @} - */ - -/** @defgroup RTC_output_source_to_output_on_the_Tamper_pin - * @{ - */ - -#define BKP_RTCOutputSource_None ((uint16_t)0x0000) -#define BKP_RTCOutputSource_CalibClock ((uint16_t)0x0080) -#define BKP_RTCOutputSource_Alarm ((uint16_t)0x0100) -#define BKP_RTCOutputSource_Second ((uint16_t)0x0300) -#define IS_BKP_RTC_OUTPUT_SOURCE(SOURCE) (((SOURCE) == BKP_RTCOutputSource_None) || \ - ((SOURCE) == BKP_RTCOutputSource_CalibClock) || \ - ((SOURCE) == BKP_RTCOutputSource_Alarm) || \ - ((SOURCE) == BKP_RTCOutputSource_Second)) -/** - * @} - */ - -/** @defgroup Data_Backup_Register - * @{ - */ - -#define BKP_DR1 ((uint16_t)0x0004) -#define BKP_DR2 ((uint16_t)0x0008) -#define BKP_DR3 ((uint16_t)0x000C) -#define BKP_DR4 ((uint16_t)0x0010) -#define BKP_DR5 ((uint16_t)0x0014) -#define BKP_DR6 ((uint16_t)0x0018) -#define BKP_DR7 ((uint16_t)0x001C) -#define BKP_DR8 ((uint16_t)0x0020) -#define BKP_DR9 ((uint16_t)0x0024) -#define BKP_DR10 ((uint16_t)0x0028) -#define BKP_DR11 ((uint16_t)0x0040) -#define BKP_DR12 ((uint16_t)0x0044) -#define BKP_DR13 ((uint16_t)0x0048) -#define BKP_DR14 ((uint16_t)0x004C) -#define BKP_DR15 ((uint16_t)0x0050) -#define BKP_DR16 ((uint16_t)0x0054) -#define BKP_DR17 ((uint16_t)0x0058) -#define BKP_DR18 ((uint16_t)0x005C) -#define BKP_DR19 ((uint16_t)0x0060) -#define BKP_DR20 ((uint16_t)0x0064) -#define BKP_DR21 ((uint16_t)0x0068) -#define BKP_DR22 ((uint16_t)0x006C) -#define BKP_DR23 ((uint16_t)0x0070) -#define BKP_DR24 ((uint16_t)0x0074) -#define BKP_DR25 ((uint16_t)0x0078) -#define BKP_DR26 ((uint16_t)0x007C) -#define BKP_DR27 ((uint16_t)0x0080) -#define BKP_DR28 ((uint16_t)0x0084) -#define BKP_DR29 ((uint16_t)0x0088) -#define BKP_DR30 ((uint16_t)0x008C) -#define BKP_DR31 ((uint16_t)0x0090) -#define BKP_DR32 ((uint16_t)0x0094) -#define BKP_DR33 ((uint16_t)0x0098) -#define BKP_DR34 ((uint16_t)0x009C) -#define BKP_DR35 ((uint16_t)0x00A0) -#define BKP_DR36 ((uint16_t)0x00A4) -#define BKP_DR37 ((uint16_t)0x00A8) -#define BKP_DR38 ((uint16_t)0x00AC) -#define BKP_DR39 ((uint16_t)0x00B0) -#define BKP_DR40 ((uint16_t)0x00B4) -#define BKP_DR41 ((uint16_t)0x00B8) -#define BKP_DR42 ((uint16_t)0x00BC) - -#define IS_BKP_DR(DR) (((DR) == BKP_DR1) || ((DR) == BKP_DR2) || ((DR) == BKP_DR3) || \ - ((DR) == BKP_DR4) || ((DR) == BKP_DR5) || ((DR) == BKP_DR6) || \ - ((DR) == BKP_DR7) || ((DR) == BKP_DR8) || ((DR) == BKP_DR9) || \ - ((DR) == BKP_DR10) || ((DR) == BKP_DR11) || ((DR) == BKP_DR12) || \ - ((DR) == BKP_DR13) || ((DR) == BKP_DR14) || ((DR) == BKP_DR15) || \ - ((DR) == BKP_DR16) || ((DR) == BKP_DR17) || ((DR) == BKP_DR18) || \ - ((DR) == BKP_DR19) || ((DR) == BKP_DR20) || ((DR) == BKP_DR21) || \ - ((DR) == BKP_DR22) || ((DR) == BKP_DR23) || ((DR) == BKP_DR24) || \ - ((DR) == BKP_DR25) || ((DR) == BKP_DR26) || ((DR) == BKP_DR27) || \ - ((DR) == BKP_DR28) || ((DR) == BKP_DR29) || ((DR) == BKP_DR30) || \ - ((DR) == BKP_DR31) || ((DR) == BKP_DR32) || ((DR) == BKP_DR33) || \ - ((DR) == BKP_DR34) || ((DR) == BKP_DR35) || ((DR) == BKP_DR36) || \ - ((DR) == BKP_DR37) || ((DR) == BKP_DR38) || ((DR) == BKP_DR39) || \ - ((DR) == BKP_DR40) || ((DR) == BKP_DR41) || ((DR) == BKP_DR42)) - -#define IS_BKP_CALIBRATION_VALUE(VALUE) ((VALUE) <= 0x7F) -/** - * @} - */ - -/** - * @} - */ - -/** @defgroup BKP_Exported_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup BKP_Exported_Functions - * @{ - */ - -void BKP_DeInit(void); -void BKP_TamperPinLevelConfig(uint16_t BKP_TamperPinLevel); -void BKP_TamperPinCmd(FunctionalState NewState); -void BKP_ITConfig(FunctionalState NewState); -void BKP_RTCOutputConfig(uint16_t BKP_RTCOutputSource); -void BKP_SetRTCCalibrationValue(uint8_t CalibrationValue); -void BKP_WriteBackupRegister(uint16_t BKP_DR, uint16_t Data); -uint16_t BKP_ReadBackupRegister(uint16_t BKP_DR); -FlagStatus BKP_GetFlagStatus(void); -void BKP_ClearFlag(void); -ITStatus BKP_GetITStatus(void); -void BKP_ClearITPendingBit(void); - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32F10x_BKP_H */ -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_can.h b/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_can.h deleted file mode 100644 index 900eb5e5fa..0000000000 --- a/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_can.h +++ /dev/null @@ -1,535 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f10x_can.h - * @author MCD Application Team - * @version V3.2.0 - * @date 03/01/2010 - * @brief This file contains all the functions prototypes for the CAN firmware - * library. - ****************************************************************************** - * @copy - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2010 STMicroelectronics

- */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F10x_CAN_H -#define __STM32F10x_CAN_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x.h" - -/** @addtogroup STM32F10x_StdPeriph_Driver - * @{ - */ - -/** @addtogroup CAN - * @{ - */ - -/** @defgroup CAN_Exported_Types - * @{ - */ - -#define IS_CAN_ALL_PERIPH(PERIPH) (((PERIPH) == CAN1) || \ - ((PERIPH) == CAN2)) - -/** - * @brief CAN init structure definition - */ - -typedef struct -{ - uint16_t CAN_Prescaler; /*!< Specifies the length of a time quantum. It ranges from 1 to 1024. */ - - uint8_t CAN_Mode; /*!< Specifies the CAN operating mode. - This parameter can be a value of @ref CAN_operating_mode */ - - uint8_t CAN_SJW; /*!< Specifies the maximum number of time quanta the CAN hardware - is allowed to lengthen or shorten a bit to perform resynchronization. - This parameter can be a value of @ref CAN_synchronisation_jump_width */ - - uint8_t CAN_BS1; /*!< Specifies the number of time quanta in Bit Segment 1. - This parameter can be a value of @ref CAN_time_quantum_in_bit_segment_1 */ - - uint8_t CAN_BS2; /*!< Specifies the number of time quanta in Bit Segment 2. - This parameter can be a value of @ref CAN_time_quantum_in_bit_segment_2 */ - - FunctionalState CAN_TTCM; /*!< Enable or disable the time triggered communication mode. - This parameter can be set either to ENABLE or DISABLE. */ - - FunctionalState CAN_ABOM; /*!< Enable or disable the automatic bus-off management. - This parameter can be set either to ENABLE or DISABLE. */ - - FunctionalState CAN_AWUM; /*!< Enable or disable the automatic wake-up mode. - This parameter can be set either to ENABLE or DISABLE. */ - - FunctionalState CAN_NART; /*!< Enable or disable the no-automatic retransmission mode. - This parameter can be set either to ENABLE or DISABLE. */ - - FunctionalState CAN_RFLM; /*!< Enable or disable the Receive FIFO Locked mode. - This parameter can be set either to ENABLE or DISABLE. */ - - FunctionalState CAN_TXFP; /*!< Enable or disable the transmit FIFO priority. - This parameter can be set either to ENABLE or DISABLE. */ -} CAN_InitTypeDef; - -/** - * @brief CAN filter init structure definition - */ - -typedef struct -{ - uint16_t CAN_FilterIdHigh; /*!< Specifies the filter identification number (MSBs for a 32-bit - configuration, first one for a 16-bit configuration). - This parameter can be a value between 0x0000 and 0xFFFF */ - - uint16_t CAN_FilterIdLow; /*!< Specifies the filter identification number (LSBs for a 32-bit - configuration, second one for a 16-bit configuration). - This parameter can be a value between 0x0000 and 0xFFFF */ - - uint16_t CAN_FilterMaskIdHigh; /*!< Specifies the filter mask number or identification number, - according to the mode (MSBs for a 32-bit configuration, - first one for a 16-bit configuration). - This parameter can be a value between 0x0000 and 0xFFFF */ - - uint16_t CAN_FilterMaskIdLow; /*!< Specifies the filter mask number or identification number, - according to the mode (LSBs for a 32-bit configuration, - second one for a 16-bit configuration). - This parameter can be a value between 0x0000 and 0xFFFF */ - - uint16_t CAN_FilterFIFOAssignment; /*!< Specifies the FIFO (0 or 1) which will be assigned to the filter. - This parameter can be a value of @ref CAN_filter_FIFO */ - - uint8_t CAN_FilterNumber; /*!< Specifies the filter which will be initialized. It ranges from 0 to 13. */ - - uint8_t CAN_FilterMode; /*!< Specifies the filter mode to be initialized. - This parameter can be a value of @ref CAN_filter_mode */ - - uint8_t CAN_FilterScale; /*!< Specifies the filter scale. - This parameter can be a value of @ref CAN_filter_scale */ - - FunctionalState CAN_FilterActivation; /*!< Enable or disable the filter. - This parameter can be set either to ENABLE or DISABLE. */ -} CAN_FilterInitTypeDef; - -/** - * @brief CAN Tx message structure definition - */ - -typedef struct -{ - uint32_t StdId; /*!< Specifies the standard identifier. - This parameter can be a value between 0 to 0x7FF. */ - - uint32_t ExtId; /*!< Specifies the extended identifier. - This parameter can be a value between 0 to 0x1FFFFFFF. */ - - uint8_t IDE; /*!< Specifies the type of identifier for the message that will be transmitted. - This parameter can be a value of @ref CAN_identifier_type */ - - uint8_t RTR; /*!< Specifies the type of frame for the message that will be transmitted. - This parameter can be a value of @ref CAN_remote_transmission_request */ - - uint8_t DLC; /*!< Specifies the length of the frame that will be transmitted. - This parameter can be a value between 0 to 8 */ - - uint8_t Data[8]; /*!< Contains the data to be transmitted. It ranges from 0 to 0xFF. */ -} CanTxMsg; - -/** - * @brief CAN Rx message structure definition - */ - -typedef struct -{ - uint32_t StdId; /*!< Specifies the standard identifier. - This parameter can be a value between 0 to 0x7FF. */ - - uint32_t ExtId; /*!< Specifies the extended identifier. - This parameter can be a value between 0 to 0x1FFFFFFF. */ - - uint8_t IDE; /*!< Specifies the type of identifier for the message that will be received. - This parameter can be a value of @ref CAN_identifier_type */ - - uint8_t RTR; /*!< Specifies the type of frame for the received message. - This parameter can be a value of @ref CAN_remote_transmission_request */ - - uint8_t DLC; /*!< Specifies the length of the frame that will be received. - This parameter can be a value between 0 to 8 */ - - uint8_t Data[8]; /*!< Contains the data to be received. It ranges from 0 to 0xFF. */ - - uint8_t FMI; /*!< Specifies the index of the filter the message stored in the mailbox passes through. - This parameter can be a value between 0 to 0xFF */ -} CanRxMsg; - -/** - * @} - */ - -/** @defgroup CAN_Exported_Constants - * @{ - */ - -/** @defgroup CAN_sleep_constants - * @{ - */ - -#define CANINITFAILED ((uint8_t)0x00) /*!< CAN initialization failed */ -#define CANINITOK ((uint8_t)0x01) /*!< CAN initialization failed */ - -/** - * @} - */ - -/** @defgroup CAN_operating_mode - * @{ - */ - -#define CAN_Mode_Normal ((uint8_t)0x00) /*!< normal mode */ -#define CAN_Mode_LoopBack ((uint8_t)0x01) /*!< loopback mode */ -#define CAN_Mode_Silent ((uint8_t)0x02) /*!< silent mode */ -#define CAN_Mode_Silent_LoopBack ((uint8_t)0x03) /*!< loopback combined with silent mode */ - -#define IS_CAN_MODE(MODE) (((MODE) == CAN_Mode_Normal) || ((MODE) == CAN_Mode_LoopBack)|| \ - ((MODE) == CAN_Mode_Silent) || ((MODE) == CAN_Mode_Silent_LoopBack)) -/** - * @} - */ - -/** @defgroup CAN_synchronisation_jump_width - * @{ - */ - -#define CAN_SJW_1tq ((uint8_t)0x00) /*!< 1 time quantum */ -#define CAN_SJW_2tq ((uint8_t)0x01) /*!< 2 time quantum */ -#define CAN_SJW_3tq ((uint8_t)0x02) /*!< 3 time quantum */ -#define CAN_SJW_4tq ((uint8_t)0x03) /*!< 4 time quantum */ - -#define IS_CAN_SJW(SJW) (((SJW) == CAN_SJW_1tq) || ((SJW) == CAN_SJW_2tq)|| \ - ((SJW) == CAN_SJW_3tq) || ((SJW) == CAN_SJW_4tq)) -/** - * @} - */ - -/** @defgroup CAN_time_quantum_in_bit_segment_1 - * @{ - */ - -#define CAN_BS1_1tq ((uint8_t)0x00) /*!< 1 time quantum */ -#define CAN_BS1_2tq ((uint8_t)0x01) /*!< 2 time quantum */ -#define CAN_BS1_3tq ((uint8_t)0x02) /*!< 3 time quantum */ -#define CAN_BS1_4tq ((uint8_t)0x03) /*!< 4 time quantum */ -#define CAN_BS1_5tq ((uint8_t)0x04) /*!< 5 time quantum */ -#define CAN_BS1_6tq ((uint8_t)0x05) /*!< 6 time quantum */ -#define CAN_BS1_7tq ((uint8_t)0x06) /*!< 7 time quantum */ -#define CAN_BS1_8tq ((uint8_t)0x07) /*!< 8 time quantum */ -#define CAN_BS1_9tq ((uint8_t)0x08) /*!< 9 time quantum */ -#define CAN_BS1_10tq ((uint8_t)0x09) /*!< 10 time quantum */ -#define CAN_BS1_11tq ((uint8_t)0x0A) /*!< 11 time quantum */ -#define CAN_BS1_12tq ((uint8_t)0x0B) /*!< 12 time quantum */ -#define CAN_BS1_13tq ((uint8_t)0x0C) /*!< 13 time quantum */ -#define CAN_BS1_14tq ((uint8_t)0x0D) /*!< 14 time quantum */ -#define CAN_BS1_15tq ((uint8_t)0x0E) /*!< 15 time quantum */ -#define CAN_BS1_16tq ((uint8_t)0x0F) /*!< 16 time quantum */ - -#define IS_CAN_BS1(BS1) ((BS1) <= CAN_BS1_16tq) -/** - * @} - */ - -/** @defgroup CAN_time_quantum_in_bit_segment_2 - * @{ - */ - -#define CAN_BS2_1tq ((uint8_t)0x00) /*!< 1 time quantum */ -#define CAN_BS2_2tq ((uint8_t)0x01) /*!< 2 time quantum */ -#define CAN_BS2_3tq ((uint8_t)0x02) /*!< 3 time quantum */ -#define CAN_BS2_4tq ((uint8_t)0x03) /*!< 4 time quantum */ -#define CAN_BS2_5tq ((uint8_t)0x04) /*!< 5 time quantum */ -#define CAN_BS2_6tq ((uint8_t)0x05) /*!< 6 time quantum */ -#define CAN_BS2_7tq ((uint8_t)0x06) /*!< 7 time quantum */ -#define CAN_BS2_8tq ((uint8_t)0x07) /*!< 8 time quantum */ - -#define IS_CAN_BS2(BS2) ((BS2) <= CAN_BS2_8tq) - -/** - * @} - */ - -/** @defgroup CAN_clock_prescaler - * @{ - */ - -#define IS_CAN_PRESCALER(PRESCALER) (((PRESCALER) >= 1) && ((PRESCALER) <= 1024)) - -/** - * @} - */ - -/** @defgroup CAN_filter_number - * @{ - */ -#ifndef STM32F10X_CL - #define IS_CAN_FILTER_NUMBER(NUMBER) ((NUMBER) <= 13) -#else - #define IS_CAN_FILTER_NUMBER(NUMBER) ((NUMBER) <= 27) -#endif /* STM32F10X_CL */ -/** - * @} - */ - -/** @defgroup CAN_filter_mode - * @{ - */ - -#define CAN_FilterMode_IdMask ((uint8_t)0x00) /*!< id/mask mode */ -#define CAN_FilterMode_IdList ((uint8_t)0x01) /*!< identifier list mode */ - -#define IS_CAN_FILTER_MODE(MODE) (((MODE) == CAN_FilterMode_IdMask) || \ - ((MODE) == CAN_FilterMode_IdList)) -/** - * @} - */ - -/** @defgroup CAN_filter_scale - * @{ - */ - -#define CAN_FilterScale_16bit ((uint8_t)0x00) /*!< Two 16-bit filters */ -#define CAN_FilterScale_32bit ((uint8_t)0x01) /*!< One 32-bit filter */ - -#define IS_CAN_FILTER_SCALE(SCALE) (((SCALE) == CAN_FilterScale_16bit) || \ - ((SCALE) == CAN_FilterScale_32bit)) - -/** - * @} - */ - -/** @defgroup CAN_filter_FIFO - * @{ - */ - -#define CAN_FilterFIFO0 ((uint8_t)0x00) /*!< Filter FIFO 0 assignment for filter x */ -#define CAN_FilterFIFO1 ((uint8_t)0x01) /*!< Filter FIFO 1 assignment for filter x */ -#define IS_CAN_FILTER_FIFO(FIFO) (((FIFO) == CAN_FilterFIFO0) || \ - ((FIFO) == CAN_FilterFIFO1)) - -/** - * @} - */ - -/** @defgroup Start_bank_filter_for_slave_CAN - * @{ - */ -#define IS_CAN_BANKNUMBER(BANKNUMBER) (((BANKNUMBER) >= 1) && ((BANKNUMBER) <= 27)) -/** - * @} - */ - -/** @defgroup CAN_Tx - * @{ - */ - -#define IS_CAN_TRANSMITMAILBOX(TRANSMITMAILBOX) ((TRANSMITMAILBOX) <= ((uint8_t)0x02)) -#define IS_CAN_STDID(STDID) ((STDID) <= ((uint32_t)0x7FF)) -#define IS_CAN_EXTID(EXTID) ((EXTID) <= ((uint32_t)0x1FFFFFFF)) -#define IS_CAN_DLC(DLC) ((DLC) <= ((uint8_t)0x08)) - -/** - * @} - */ - -/** @defgroup CAN_identifier_type - * @{ - */ - -#define CAN_ID_STD ((uint32_t)0x00000000) /*!< Standard Id */ -#define CAN_ID_EXT ((uint32_t)0x00000004) /*!< Extended Id */ -#define IS_CAN_IDTYPE(IDTYPE) (((IDTYPE) == CAN_ID_STD) || ((IDTYPE) == CAN_ID_EXT)) - -/** - * @} - */ - -/** @defgroup CAN_remote_transmission_request - * @{ - */ - -#define CAN_RTR_DATA ((uint32_t)0x00000000) /*!< Data frame */ -#define CAN_RTR_REMOTE ((uint32_t)0x00000002) /*!< Remote frame */ -#define IS_CAN_RTR(RTR) (((RTR) == CAN_RTR_DATA) || ((RTR) == CAN_RTR_REMOTE)) - -/** - * @} - */ - -/** @defgroup CAN_transmit_constants - * @{ - */ - -#define CANTXFAILED ((uint8_t)0x00) /*!< CAN transmission failed */ -#define CANTXOK ((uint8_t)0x01) /*!< CAN transmission succeeded */ -#define CANTXPENDING ((uint8_t)0x02) /*!< CAN transmission pending */ -#define CAN_NO_MB ((uint8_t)0x04) /*!< CAN cell did not provide an empty mailbox */ - -/** - * @} - */ - -/** @defgroup CAN_receive_FIFO_number_constants - * @{ - */ - -#define CAN_FIFO0 ((uint8_t)0x00) /*!< CAN FIFO0 used to receive */ -#define CAN_FIFO1 ((uint8_t)0x01) /*!< CAN FIFO1 used to receive */ - -#define IS_CAN_FIFO(FIFO) (((FIFO) == CAN_FIFO0) || ((FIFO) == CAN_FIFO1)) - -/** - * @} - */ - -/** @defgroup CAN_sleep_constants - * @{ - */ - -#define CANSLEEPFAILED ((uint8_t)0x00) /*!< CAN did not enter the sleep mode */ -#define CANSLEEPOK ((uint8_t)0x01) /*!< CAN entered the sleep mode */ - -/** - * @} - */ - -/** @defgroup CAN_wake_up_constants - * @{ - */ - -#define CANWAKEUPFAILED ((uint8_t)0x00) /*!< CAN did not leave the sleep mode */ -#define CANWAKEUPOK ((uint8_t)0x01) /*!< CAN leaved the sleep mode */ - -/** - * @} - */ - -/** @defgroup CAN_flags - * @{ - */ - -#define CAN_FLAG_EWG ((uint32_t)0x00000001) /*!< Error Warning Flag */ -#define CAN_FLAG_EPV ((uint32_t)0x00000002) /*!< Error Passive Flag */ -#define CAN_FLAG_BOF ((uint32_t)0x00000004) /*!< Bus-Off Flag */ - -#define IS_CAN_FLAG(FLAG) (((FLAG) == CAN_FLAG_EWG) || ((FLAG) == CAN_FLAG_EPV) ||\ - ((FLAG) == CAN_FLAG_BOF)) - -/** - * @} - */ - -/** @defgroup CAN_interrupts - * @{ - */ - -#define CAN_IT_RQCP0 ((uint32_t)0x00000005) /*!< Request completed mailbox 0 */ -#define CAN_IT_RQCP1 ((uint32_t)0x00000006) /*!< Request completed mailbox 1 */ -#define CAN_IT_RQCP2 ((uint32_t)0x00000007) /*!< Request completed mailbox 2 */ -#define CAN_IT_TME ((uint32_t)0x00000001) /*!< Transmit mailbox empty */ -#define CAN_IT_FMP0 ((uint32_t)0x00000002) /*!< FIFO 0 message pending */ -#define CAN_IT_FF0 ((uint32_t)0x00000004) /*!< FIFO 0 full */ -#define CAN_IT_FOV0 ((uint32_t)0x00000008) /*!< FIFO 0 overrun */ -#define CAN_IT_FMP1 ((uint32_t)0x00000010) /*!< FIFO 1 message pending */ -#define CAN_IT_FF1 ((uint32_t)0x00000020) /*!< FIFO 1 full */ -#define CAN_IT_FOV1 ((uint32_t)0x00000040) /*!< FIFO 1 overrun */ -#define CAN_IT_EWG ((uint32_t)0x00000100) /*!< Error warning */ -#define CAN_IT_EPV ((uint32_t)0x00000200) /*!< Error passive */ -#define CAN_IT_BOF ((uint32_t)0x00000400) /*!< Bus-off */ -#define CAN_IT_LEC ((uint32_t)0x00000800) /*!< Last error code */ -#define CAN_IT_ERR ((uint32_t)0x00008000) /*!< Error */ -#define CAN_IT_WKU ((uint32_t)0x00010000) /*!< Wake-up */ -#define CAN_IT_SLK ((uint32_t)0x00020000) /*!< Sleep */ - -#define IS_CAN_ITConfig(IT) (((IT) == CAN_IT_TME) || ((IT) == CAN_IT_FMP0) ||\ - ((IT) == CAN_IT_FF0) || ((IT) == CAN_IT_FOV0) ||\ - ((IT) == CAN_IT_FMP1) || ((IT) == CAN_IT_FF1) ||\ - ((IT) == CAN_IT_FOV1) || ((IT) == CAN_IT_EWG) ||\ - ((IT) == CAN_IT_EPV) || ((IT) == CAN_IT_BOF) ||\ - ((IT) == CAN_IT_LEC) || ((IT) == CAN_IT_ERR) ||\ - ((IT) == CAN_IT_WKU) || ((IT) == CAN_IT_SLK)) - -#define IS_CAN_ITStatus(IT) (((IT) == CAN_IT_RQCP0) || ((IT) == CAN_IT_RQCP1) ||\ - ((IT) == CAN_IT_RQCP2) || ((IT) == CAN_IT_FF0) ||\ - ((IT) == CAN_IT_FOV0) || ((IT) == CAN_IT_FF1) ||\ - ((IT) == CAN_IT_FOV1) || ((IT) == CAN_IT_EWG) ||\ - ((IT) == CAN_IT_EPV) || ((IT) == CAN_IT_BOF) ||\ - ((IT) == CAN_IT_WKU) || ((IT) == CAN_IT_SLK)) -/** - * @} - */ - -/** - * @} - */ - -/** @defgroup CAN_Exported_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup CAN_Exported_Functions - * @{ - */ - -void CAN_DeInit(CAN_TypeDef* CANx); -uint8_t CAN_Init(CAN_TypeDef* CANx, CAN_InitTypeDef* CAN_InitStruct); -void CAN_FilterInit(CAN_FilterInitTypeDef* CAN_FilterInitStruct); -void CAN_StructInit(CAN_InitTypeDef* CAN_InitStruct); -void CAN_SlaveStartBank(uint8_t CAN_BankNumber); -void CAN_ITConfig(CAN_TypeDef* CANx, uint32_t CAN_IT, FunctionalState NewState); -uint8_t CAN_Transmit(CAN_TypeDef* CANx, CanTxMsg* TxMessage); -uint8_t CAN_TransmitStatus(CAN_TypeDef* CANx, uint8_t TransmitMailbox); -void CAN_CancelTransmit(CAN_TypeDef* CANx, uint8_t Mailbox); -void CAN_FIFORelease(CAN_TypeDef* CANx, uint8_t FIFONumber); -uint8_t CAN_MessagePending(CAN_TypeDef* CANx, uint8_t FIFONumber); -void CAN_Receive(CAN_TypeDef* CANx, uint8_t FIFONumber, CanRxMsg* RxMessage); -void CAN_DBGFreeze(CAN_TypeDef* CANx, FunctionalState NewState); -uint8_t CAN_Sleep(CAN_TypeDef* CANx); -uint8_t CAN_WakeUp(CAN_TypeDef* CANx); -FlagStatus CAN_GetFlagStatus(CAN_TypeDef* CANx, uint32_t CAN_FLAG); -void CAN_ClearFlag(CAN_TypeDef* CANx, uint32_t CAN_FLAG); -ITStatus CAN_GetITStatus(CAN_TypeDef* CANx, uint32_t CAN_IT); -void CAN_ClearITPendingBit(CAN_TypeDef* CANx, uint32_t CAN_IT); - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32F10x_CAN_H */ -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_cec.h b/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_cec.h deleted file mode 100644 index 8210ce55ac..0000000000 --- a/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_cec.h +++ /dev/null @@ -1,209 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f10x_cec.h - * @author MCD Application Team - * @version V3.2.0 - * @date 03/01/2010 - * @brief This file contains all the functions prototypes for the CEC firmware - * library. - ****************************************************************************** - * @copy - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2010 STMicroelectronics

- */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F10x_CEC_H -#define __STM32F10x_CEC_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x.h" - -/** @addtogroup STM32F10x_StdPeriph_Driver - * @{ - */ - -/** @addtogroup CEC - * @{ - */ - - -/** @defgroup CEC_Exported_Types - * @{ - */ - -/** - * @brief CEC Init structure definition - */ -typedef struct -{ - uint16_t CEC_BitTimingMode; /*!< Configures the CEC Bit Timing Error Mode. - This parameter can be a value of @ref CEC_BitTiming_Mode */ - uint16_t CEC_BitPeriodMode; /*!< Configures the CEC Bit Period Error Mode. - This parameter can be a value of @ref CEC_BitPeriod_Mode */ -}CEC_InitTypeDef; - -/** - * @} - */ - -/** @defgroup CEC_Exported_Constants - * @{ - */ - -/** @defgroup CEC_BitTiming_Mode - * @{ - */ -#define CEC_BitTimingStdMode ((uint16_t)0x00) /*!< Bit timing error Standard Mode */ -#define CEC_BitTimingErrFreeMode CEC_CFGR_BTEM /*!< Bit timing error Free Mode */ - -#define IS_CEC_BIT_TIMING_ERROR_MODE(MODE) (((MODE) == CEC_BitTimingStdMode) || \ - ((MODE) == CEC_BitTimingErrFreeMode)) -/** - * @} - */ - -/** @defgroup CEC_BitPeriod_Mode - * @{ - */ -#define CEC_BitPeriodStdMode ((uint16_t)0x00) /*!< Bit period error Standard Mode */ -#define CEC_BitPeriodFlexibleMode CEC_CFGR_BPEM /*!< Bit period error Flexible Mode */ - -#define IS_CEC_BIT_PERIOD_ERROR_MODE(MODE) (((MODE) == CEC_BitPeriodStdMode) || \ - ((MODE) == CEC_BitPeriodFlexibleMode)) -/** - * @} - */ - - -/** @defgroup CEC_interrupts_definition - * @{ - */ -#define CEC_IT_TERR CEC_CSR_TERR -#define CEC_IT_TBTRF CEC_CSR_TBTRF -#define CEC_IT_RERR CEC_CSR_RERR -#define CEC_IT_RBTF CEC_CSR_RBTF -#define IS_CEC_GET_IT(IT) (((IT) == CEC_IT_TERR) || ((IT) == CEC_IT_TBTRF) || \ - ((IT) == CEC_IT_RERR) || ((IT) == CEC_IT_RBTF)) -/** - * @} - */ - - -/** @defgroup CEC_Own_Addres - * @{ - */ -#define IS_CEC_ADDRESS(ADDRESS) ((ADDRESS) < 0x10) -/** - * @} - */ - -/** @defgroup CEC_Prescaler - * @{ - */ -#define IS_CEC_PRESCALER(PRESCALER) ((PRESCALER) <= 0x3FFF) - -/** - * @} - */ - -/** @defgroup CEC_flags_definition - * @{ - */ - -/** - * @brief ESR register flags - */ -#define CEC_FLAG_BTE ((uint32_t)0x10010000) -#define CEC_FLAG_BPE ((uint32_t)0x10020000) -#define CEC_FLAG_RBTFE ((uint32_t)0x10040000) -#define CEC_FLAG_SBE ((uint32_t)0x10080000) -#define CEC_FLAG_ACKE ((uint32_t)0x10100000) -#define CEC_FLAG_LINE ((uint32_t)0x10200000) -#define CEC_FLAG_TBTFE ((uint32_t)0x10400000) - -/** - * @brief CSR register flags - */ -#define CEC_FLAG_TEOM ((uint32_t)0x00000002) -#define CEC_FLAG_TERR ((uint32_t)0x00000004) -#define CEC_FLAG_TBTRF ((uint32_t)0x00000008) -#define CEC_FLAG_RSOM ((uint32_t)0x00000010) -#define CEC_FLAG_REOM ((uint32_t)0x00000020) -#define CEC_FLAG_RERR ((uint32_t)0x00000040) -#define CEC_FLAG_RBTF ((uint32_t)0x00000080) - -#define IS_CEC_CLEAR_FLAG(FLAG) ((((FLAG) & (uint32_t)0xFFFFFF03) == 0x00) && ((FLAG) != 0x00)) - -#define IS_CEC_GET_FLAG(FLAG) (((FLAG) == CEC_FLAG_BTE) || ((FLAG) == CEC_FLAG_BPE) || \ - ((FLAG) == CEC_FLAG_RBTFE) || ((FLAG)== CEC_FLAG_SBE) || \ - ((FLAG) == CEC_FLAG_ACKE) || ((FLAG) == CEC_FLAG_LINE) || \ - ((FLAG) == CEC_FLAG_TBTFE) || ((FLAG) == CEC_FLAG_TEOM) || \ - ((FLAG) == CEC_FLAG_TERR) || ((FLAG) == CEC_FLAG_TBTRF) || \ - ((FLAG) == CEC_FLAG_RSOM) || ((FLAG) == CEC_FLAG_REOM) || \ - ((FLAG) == CEC_FLAG_RERR) || ((FLAG) == CEC_FLAG_RBTF)) - -/** - * @} - */ - -/** - * @} - */ - -/** @defgroup CEC_Exported_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup CEC_Exported_Functions - * @{ - */ -void CEC_DeInit(void); -void CEC_Init(CEC_InitTypeDef* CEC_InitStruct); -void CEC_Cmd(FunctionalState NewState); -void CEC_ITConfig(FunctionalState NewState); -void CEC_OwnAddressConfig(uint8_t CEC_OwnAddress); -void CEC_SetPrescaler(uint16_t CEC_Prescaler); -void CEC_SendDataByte(uint8_t Data); -uint8_t CEC_ReceiveDataByte(void); -void CEC_StartOfMessage(void); -void CEC_EndOfMessageCmd(FunctionalState NewState); -FlagStatus CEC_GetFlagStatus(uint32_t CEC_FLAG); -void CEC_ClearFlag(uint32_t CEC_FLAG); -ITStatus CEC_GetITStatus(uint8_t CEC_IT); -void CEC_ClearITPendingBit(uint16_t CEC_IT); - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32F10x_CEC_H */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_crc.h b/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_crc.h deleted file mode 100644 index b65170ceaf..0000000000 --- a/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_crc.h +++ /dev/null @@ -1,93 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f10x_crc.h - * @author MCD Application Team - * @version V3.2.0 - * @date 03/01/2010 - * @brief This file contains all the functions prototypes for the CRC firmware - * library. - ****************************************************************************** - * @copy - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2010 STMicroelectronics

- */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F10x_CRC_H -#define __STM32F10x_CRC_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x.h" - -/** @addtogroup STM32F10x_StdPeriph_Driver - * @{ - */ - -/** @addtogroup CRC - * @{ - */ - -/** @defgroup CRC_Exported_Types - * @{ - */ - -/** - * @} - */ - -/** @defgroup CRC_Exported_Constants - * @{ - */ - -/** - * @} - */ - -/** @defgroup CRC_Exported_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup CRC_Exported_Functions - * @{ - */ - -void CRC_ResetDR(void); -uint32_t CRC_CalcCRC(uint32_t Data); -uint32_t CRC_CalcBlockCRC(uint32_t pBuffer[], uint32_t BufferLength); -uint32_t CRC_GetCRC(void); -void CRC_SetIDRegister(uint8_t IDValue); -uint8_t CRC_GetIDRegister(void); - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32F10x_CRC_H */ -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_dac.h b/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_dac.h deleted file mode 100644 index fb6b543f4b..0000000000 --- a/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_dac.h +++ /dev/null @@ -1,316 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f10x_dac.h - * @author MCD Application Team - * @version V3.2.0 - * @date 03/01/2010 - * @brief This file contains all the functions prototypes for the DAC firmware - * library. - ****************************************************************************** - * @copy - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2010 STMicroelectronics

- */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F10x_DAC_H -#define __STM32F10x_DAC_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x.h" - -/** @addtogroup STM32F10x_StdPeriph_Driver - * @{ - */ - -/** @addtogroup DAC - * @{ - */ - -/** @defgroup DAC_Exported_Types - * @{ - */ - -/** - * @brief DAC Init structure definition - */ - -typedef struct -{ - uint32_t DAC_Trigger; /*!< Specifies the external trigger for the selected DAC channel. - This parameter can be a value of @ref DAC_trigger_selection */ - - uint32_t DAC_WaveGeneration; /*!< Specifies whether DAC channel noise waves or triangle waves - are generated, or whether no wave is generated. - This parameter can be a value of @ref DAC_wave_generation */ - - uint32_t DAC_LFSRUnmask_TriangleAmplitude; /*!< Specifies the LFSR mask for noise wave generation or - the maximum amplitude triangle generation for the DAC channel. - This parameter can be a value of @ref DAC_lfsrunmask_triangleamplitude */ - - uint32_t DAC_OutputBuffer; /*!< Specifies whether the DAC channel output buffer is enabled or disabled. - This parameter can be a value of @ref DAC_output_buffer */ -}DAC_InitTypeDef; - -/** - * @} - */ - -/** @defgroup DAC_Exported_Constants - * @{ - */ - -/** @defgroup DAC_trigger_selection - * @{ - */ - -#define DAC_Trigger_None ((uint32_t)0x00000000) /*!< Conversion is automatic once the DAC1_DHRxxxx register - has been loaded, and not by external trigger */ -#define DAC_Trigger_T6_TRGO ((uint32_t)0x00000004) /*!< TIM6 TRGO selected as external conversion trigger for DAC channel */ -#define DAC_Trigger_T8_TRGO ((uint32_t)0x0000000C) /*!< TIM8 TRGO selected as external conversion trigger for DAC channel - only in High-density devices*/ -#define DAC_Trigger_T3_TRGO ((uint32_t)0x0000000C) /*!< TIM8 TRGO selected as external conversion trigger for DAC channel - only in Connectivity line, Medium-density and Low-density Value Line devices */ -#define DAC_Trigger_T7_TRGO ((uint32_t)0x00000014) /*!< TIM7 TRGO selected as external conversion trigger for DAC channel */ -#define DAC_Trigger_T5_TRGO ((uint32_t)0x0000001C) /*!< TIM5 TRGO selected as external conversion trigger for DAC channel */ -#define DAC_Trigger_T15_TRGO ((uint32_t)0x0000001C) /*!< TIM15 TRGO selected as external conversion trigger for DAC channel - only in Medium-density and Low-density Value Line devices*/ -#define DAC_Trigger_T2_TRGO ((uint32_t)0x00000024) /*!< TIM2 TRGO selected as external conversion trigger for DAC channel */ -#define DAC_Trigger_T4_TRGO ((uint32_t)0x0000002C) /*!< TIM4 TRGO selected as external conversion trigger for DAC channel */ -#define DAC_Trigger_Ext_IT9 ((uint32_t)0x00000034) /*!< EXTI Line9 event selected as external conversion trigger for DAC channel */ -#define DAC_Trigger_Software ((uint32_t)0x0000003C) /*!< Conversion started by software trigger for DAC channel */ - -#define IS_DAC_TRIGGER(TRIGGER) (((TRIGGER) == DAC_Trigger_None) || \ - ((TRIGGER) == DAC_Trigger_T6_TRGO) || \ - ((TRIGGER) == DAC_Trigger_T8_TRGO) || \ - ((TRIGGER) == DAC_Trigger_T7_TRGO) || \ - ((TRIGGER) == DAC_Trigger_T5_TRGO) || \ - ((TRIGGER) == DAC_Trigger_T2_TRGO) || \ - ((TRIGGER) == DAC_Trigger_T4_TRGO) || \ - ((TRIGGER) == DAC_Trigger_Ext_IT9) || \ - ((TRIGGER) == DAC_Trigger_Software)) - -/** - * @} - */ - -/** @defgroup DAC_wave_generation - * @{ - */ - -#define DAC_WaveGeneration_None ((uint32_t)0x00000000) -#define DAC_WaveGeneration_Noise ((uint32_t)0x00000040) -#define DAC_WaveGeneration_Triangle ((uint32_t)0x00000080) -#define IS_DAC_GENERATE_WAVE(WAVE) (((WAVE) == DAC_WaveGeneration_None) || \ - ((WAVE) == DAC_WaveGeneration_Noise) || \ - ((WAVE) == DAC_WaveGeneration_Triangle)) -/** - * @} - */ - -/** @defgroup DAC_lfsrunmask_triangleamplitude - * @{ - */ - -#define DAC_LFSRUnmask_Bit0 ((uint32_t)0x00000000) /*!< Unmask DAC channel LFSR bit0 for noise wave generation */ -#define DAC_LFSRUnmask_Bits1_0 ((uint32_t)0x00000100) /*!< Unmask DAC channel LFSR bit[1:0] for noise wave generation */ -#define DAC_LFSRUnmask_Bits2_0 ((uint32_t)0x00000200) /*!< Unmask DAC channel LFSR bit[2:0] for noise wave generation */ -#define DAC_LFSRUnmask_Bits3_0 ((uint32_t)0x00000300) /*!< Unmask DAC channel LFSR bit[3:0] for noise wave generation */ -#define DAC_LFSRUnmask_Bits4_0 ((uint32_t)0x00000400) /*!< Unmask DAC channel LFSR bit[4:0] for noise wave generation */ -#define DAC_LFSRUnmask_Bits5_0 ((uint32_t)0x00000500) /*!< Unmask DAC channel LFSR bit[5:0] for noise wave generation */ -#define DAC_LFSRUnmask_Bits6_0 ((uint32_t)0x00000600) /*!< Unmask DAC channel LFSR bit[6:0] for noise wave generation */ -#define DAC_LFSRUnmask_Bits7_0 ((uint32_t)0x00000700) /*!< Unmask DAC channel LFSR bit[7:0] for noise wave generation */ -#define DAC_LFSRUnmask_Bits8_0 ((uint32_t)0x00000800) /*!< Unmask DAC channel LFSR bit[8:0] for noise wave generation */ -#define DAC_LFSRUnmask_Bits9_0 ((uint32_t)0x00000900) /*!< Unmask DAC channel LFSR bit[9:0] for noise wave generation */ -#define DAC_LFSRUnmask_Bits10_0 ((uint32_t)0x00000A00) /*!< Unmask DAC channel LFSR bit[10:0] for noise wave generation */ -#define DAC_LFSRUnmask_Bits11_0 ((uint32_t)0x00000B00) /*!< Unmask DAC channel LFSR bit[11:0] for noise wave generation */ -#define DAC_TriangleAmplitude_1 ((uint32_t)0x00000000) /*!< Select max triangle amplitude of 1 */ -#define DAC_TriangleAmplitude_3 ((uint32_t)0x00000100) /*!< Select max triangle amplitude of 3 */ -#define DAC_TriangleAmplitude_7 ((uint32_t)0x00000200) /*!< Select max triangle amplitude of 7 */ -#define DAC_TriangleAmplitude_15 ((uint32_t)0x00000300) /*!< Select max triangle amplitude of 15 */ -#define DAC_TriangleAmplitude_31 ((uint32_t)0x00000400) /*!< Select max triangle amplitude of 31 */ -#define DAC_TriangleAmplitude_63 ((uint32_t)0x00000500) /*!< Select max triangle amplitude of 63 */ -#define DAC_TriangleAmplitude_127 ((uint32_t)0x00000600) /*!< Select max triangle amplitude of 127 */ -#define DAC_TriangleAmplitude_255 ((uint32_t)0x00000700) /*!< Select max triangle amplitude of 255 */ -#define DAC_TriangleAmplitude_511 ((uint32_t)0x00000800) /*!< Select max triangle amplitude of 511 */ -#define DAC_TriangleAmplitude_1023 ((uint32_t)0x00000900) /*!< Select max triangle amplitude of 1023 */ -#define DAC_TriangleAmplitude_2047 ((uint32_t)0x00000A00) /*!< Select max triangle amplitude of 2047 */ -#define DAC_TriangleAmplitude_4095 ((uint32_t)0x00000B00) /*!< Select max triangle amplitude of 4095 */ - -#define IS_DAC_LFSR_UNMASK_TRIANGLE_AMPLITUDE(VALUE) (((VALUE) == DAC_LFSRUnmask_Bit0) || \ - ((VALUE) == DAC_LFSRUnmask_Bits1_0) || \ - ((VALUE) == DAC_LFSRUnmask_Bits2_0) || \ - ((VALUE) == DAC_LFSRUnmask_Bits3_0) || \ - ((VALUE) == DAC_LFSRUnmask_Bits4_0) || \ - ((VALUE) == DAC_LFSRUnmask_Bits5_0) || \ - ((VALUE) == DAC_LFSRUnmask_Bits6_0) || \ - ((VALUE) == DAC_LFSRUnmask_Bits7_0) || \ - ((VALUE) == DAC_LFSRUnmask_Bits8_0) || \ - ((VALUE) == DAC_LFSRUnmask_Bits9_0) || \ - ((VALUE) == DAC_LFSRUnmask_Bits10_0) || \ - ((VALUE) == DAC_LFSRUnmask_Bits11_0) || \ - ((VALUE) == DAC_TriangleAmplitude_1) || \ - ((VALUE) == DAC_TriangleAmplitude_3) || \ - ((VALUE) == DAC_TriangleAmplitude_7) || \ - ((VALUE) == DAC_TriangleAmplitude_15) || \ - ((VALUE) == DAC_TriangleAmplitude_31) || \ - ((VALUE) == DAC_TriangleAmplitude_63) || \ - ((VALUE) == DAC_TriangleAmplitude_127) || \ - ((VALUE) == DAC_TriangleAmplitude_255) || \ - ((VALUE) == DAC_TriangleAmplitude_511) || \ - ((VALUE) == DAC_TriangleAmplitude_1023) || \ - ((VALUE) == DAC_TriangleAmplitude_2047) || \ - ((VALUE) == DAC_TriangleAmplitude_4095)) -/** - * @} - */ - -/** @defgroup DAC_output_buffer - * @{ - */ - -#define DAC_OutputBuffer_Enable ((uint32_t)0x00000000) -#define DAC_OutputBuffer_Disable ((uint32_t)0x00000002) -#define IS_DAC_OUTPUT_BUFFER_STATE(STATE) (((STATE) == DAC_OutputBuffer_Enable) || \ - ((STATE) == DAC_OutputBuffer_Disable)) -/** - * @} - */ - -/** @defgroup DAC_Channel_selection - * @{ - */ - -#define DAC_Channel_1 ((uint32_t)0x00000000) -#define DAC_Channel_2 ((uint32_t)0x00000010) -#define IS_DAC_CHANNEL(CHANNEL) (((CHANNEL) == DAC_Channel_1) || \ - ((CHANNEL) == DAC_Channel_2)) -/** - * @} - */ - -/** @defgroup DAC_data_alignement - * @{ - */ - -#define DAC_Align_12b_R ((uint32_t)0x00000000) -#define DAC_Align_12b_L ((uint32_t)0x00000004) -#define DAC_Align_8b_R ((uint32_t)0x00000008) -#define IS_DAC_ALIGN(ALIGN) (((ALIGN) == DAC_Align_12b_R) || \ - ((ALIGN) == DAC_Align_12b_L) || \ - ((ALIGN) == DAC_Align_8b_R)) -/** - * @} - */ - -/** @defgroup DAC_wave_generation - * @{ - */ - -#define DAC_Wave_Noise ((uint32_t)0x00000040) -#define DAC_Wave_Triangle ((uint32_t)0x00000080) -#define IS_DAC_WAVE(WAVE) (((WAVE) == DAC_Wave_Noise) || \ - ((WAVE) == DAC_Wave_Triangle)) -/** - * @} - */ - -/** @defgroup DAC_data - * @{ - */ - -#define IS_DAC_DATA(DATA) ((DATA) <= 0xFFF0) -/** - * @} - */ -#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) -/** @defgroup DAC_interrupts_definition - * @{ - */ - -#define DAC_IT_DMAUDR ((uint32_t)0x00002000) -#define IS_DAC_IT(IT) (((IT) == DAC_IT_DMAUDR)) - -/** - * @} - */ - -/** @defgroup DAC_flags_definition - * @{ - */ - -#define DAC_FLAG_DMAUDR ((uint32_t)0x00002000) -#define IS_DAC_FLAG(FLAG) (((FLAG) == DAC_FLAG_DMAUDR)) - -/** - * @} - */ -#endif - -/** - * @} - */ - -/** @defgroup DAC_Exported_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup DAC_Exported_Functions - * @{ - */ - -void DAC_DeInit(void); -void DAC_Init(uint32_t DAC_Channel, DAC_InitTypeDef* DAC_InitStruct); -void DAC_StructInit(DAC_InitTypeDef* DAC_InitStruct); -void DAC_Cmd(uint32_t DAC_Channel, FunctionalState NewState); -#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) -void DAC_ITConfig(uint32_t DAC_Channel, uint32_t DAC_IT, FunctionalState NewState); -#endif -void DAC_DMACmd(uint32_t DAC_Channel, FunctionalState NewState); -void DAC_SoftwareTriggerCmd(uint32_t DAC_Channel, FunctionalState NewState); -void DAC_DualSoftwareTriggerCmd(FunctionalState NewState); -void DAC_WaveGenerationCmd(uint32_t DAC_Channel, uint32_t DAC_Wave, FunctionalState NewState); -void DAC_SetChannel1Data(uint32_t DAC_Align, uint16_t Data); -void DAC_SetChannel2Data(uint32_t DAC_Align, uint16_t Data); -void DAC_SetDualChannelData(uint32_t DAC_Align, uint16_t Data2, uint16_t Data1); -uint16_t DAC_GetDataOutputValue(uint32_t DAC_Channel); -#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) -FlagStatus DAC_GetFlagStatus(uint32_t DAC_Channel, uint32_t DAC_FLAG); -void DAC_ClearFlag(uint32_t DAC_Channel, uint32_t DAC_FLAG); -ITStatus DAC_GetITStatus(uint32_t DAC_Channel, uint32_t DAC_IT); -void DAC_ClearITPendingBit(uint32_t DAC_Channel, uint32_t DAC_IT); -#endif - -#ifdef __cplusplus -} -#endif - -#endif /*__STM32F10x_DAC_H */ -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_dbgmcu.h b/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_dbgmcu.h deleted file mode 100644 index 917334b1d1..0000000000 --- a/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_dbgmcu.h +++ /dev/null @@ -1,112 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f10x_dbgmcu.h - * @author MCD Application Team - * @version V3.2.0 - * @date 03/01/2010 - * @brief This file contains all the functions prototypes for the DBGMCU - * firmware library. - ****************************************************************************** - * @copy - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2010 STMicroelectronics

- */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F10x_DBGMCU_H -#define __STM32F10x_DBGMCU_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x.h" - -/** @addtogroup STM32F10x_StdPeriph_Driver - * @{ - */ - -/** @addtogroup DBGMCU - * @{ - */ - -/** @defgroup DBGMCU_Exported_Types - * @{ - */ - -/** - * @} - */ - -/** @defgroup DBGMCU_Exported_Constants - * @{ - */ - -#define DBGMCU_SLEEP ((uint32_t)0x00000001) -#define DBGMCU_STOP ((uint32_t)0x00000002) -#define DBGMCU_STANDBY ((uint32_t)0x00000004) -#define DBGMCU_IWDG_STOP ((uint32_t)0x00000100) -#define DBGMCU_WWDG_STOP ((uint32_t)0x00000200) -#define DBGMCU_TIM1_STOP ((uint32_t)0x00000400) -#define DBGMCU_TIM2_STOP ((uint32_t)0x00000800) -#define DBGMCU_TIM3_STOP ((uint32_t)0x00001000) -#define DBGMCU_TIM4_STOP ((uint32_t)0x00002000) -#define DBGMCU_CAN1_STOP ((uint32_t)0x00004000) -#define DBGMCU_I2C1_SMBUS_TIMEOUT ((uint32_t)0x00008000) -#define DBGMCU_I2C2_SMBUS_TIMEOUT ((uint32_t)0x00010000) -#define DBGMCU_TIM8_STOP ((uint32_t)0x00020000) -#define DBGMCU_TIM5_STOP ((uint32_t)0x00040000) -#define DBGMCU_TIM6_STOP ((uint32_t)0x00080000) -#define DBGMCU_TIM7_STOP ((uint32_t)0x00100000) -#define DBGMCU_CAN2_STOP ((uint32_t)0x00200000) -#define DBGMCU_TIM15_STOP ((uint32_t)0x00400000) -#define DBGMCU_TIM16_STOP ((uint32_t)0x00800000) -#define DBGMCU_TIM17_STOP ((uint32_t)0x01000000) - -#define IS_DBGMCU_PERIPH(PERIPH) ((((PERIPH) & 0xFE0000F8) == 0x00) && ((PERIPH) != 0x00)) -/** - * @} - */ - -/** @defgroup DBGMCU_Exported_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup DBGMCU_Exported_Functions - * @{ - */ - -uint32_t DBGMCU_GetREVID(void); -uint32_t DBGMCU_GetDEVID(void); -void DBGMCU_Config(uint32_t DBGMCU_Periph, FunctionalState NewState); - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32F10x_DBGMCU_H */ -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_dma.h b/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_dma.h deleted file mode 100644 index 6240aa5b44..0000000000 --- a/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_dma.h +++ /dev/null @@ -1,437 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f10x_dma.h - * @author MCD Application Team - * @version V3.2.0 - * @date 03/01/2010 - * @brief This file contains all the functions prototypes for the DMA firmware - * library. - ****************************************************************************** - * @copy - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2010 STMicroelectronics

- */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F10x_DMA_H -#define __STM32F10x_DMA_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x.h" - -/** @addtogroup STM32F10x_StdPeriph_Driver - * @{ - */ - -/** @addtogroup DMA - * @{ - */ - -/** @defgroup DMA_Exported_Types - * @{ - */ - -/** - * @brief DMA Init structure definition - */ - -typedef struct -{ - uint32_t DMA_PeripheralBaseAddr; /*!< Specifies the peripheral base address for DMAy Channelx. */ - - uint32_t DMA_MemoryBaseAddr; /*!< Specifies the memory base address for DMAy Channelx. */ - - uint32_t DMA_DIR; /*!< Specifies if the peripheral is the source or destination. - This parameter can be a value of @ref DMA_data_transfer_direction */ - - uint32_t DMA_BufferSize; /*!< Specifies the buffer size, in data unit, of the specified Channel. - The data unit is equal to the configuration set in DMA_PeripheralDataSize - or DMA_MemoryDataSize members depending in the transfer direction. */ - - uint32_t DMA_PeripheralInc; /*!< Specifies whether the Peripheral address register is incremented or not. - This parameter can be a value of @ref DMA_peripheral_incremented_mode */ - - uint32_t DMA_MemoryInc; /*!< Specifies whether the memory address register is incremented or not. - This parameter can be a value of @ref DMA_memory_incremented_mode */ - - uint32_t DMA_PeripheralDataSize; /*!< Specifies the Peripheral data width. - This parameter can be a value of @ref DMA_peripheral_data_size */ - - uint32_t DMA_MemoryDataSize; /*!< Specifies the Memory data width. - This parameter can be a value of @ref DMA_memory_data_size */ - - uint32_t DMA_Mode; /*!< Specifies the operation mode of the DMAy Channelx. - This parameter can be a value of @ref DMA_circular_normal_mode. - @note: The circular buffer mode cannot be used if the memory-to-memory - data transfer is configured on the selected Channel */ - - uint32_t DMA_Priority; /*!< Specifies the software priority for the DMAy Channelx. - This parameter can be a value of @ref DMA_priority_level */ - - uint32_t DMA_M2M; /*!< Specifies if the DMAy Channelx will be used in memory-to-memory transfer. - This parameter can be a value of @ref DMA_memory_to_memory */ -}DMA_InitTypeDef; - -/** - * @} - */ - -/** @defgroup DMA_Exported_Constants - * @{ - */ - -#define IS_DMA_ALL_PERIPH(PERIPH) (((PERIPH) == DMA1_Channel1) || \ - ((PERIPH) == DMA1_Channel2) || \ - ((PERIPH) == DMA1_Channel3) || \ - ((PERIPH) == DMA1_Channel4) || \ - ((PERIPH) == DMA1_Channel5) || \ - ((PERIPH) == DMA1_Channel6) || \ - ((PERIPH) == DMA1_Channel7) || \ - ((PERIPH) == DMA2_Channel1) || \ - ((PERIPH) == DMA2_Channel2) || \ - ((PERIPH) == DMA2_Channel3) || \ - ((PERIPH) == DMA2_Channel4) || \ - ((PERIPH) == DMA2_Channel5)) - -/** @defgroup DMA_data_transfer_direction - * @{ - */ - -#define DMA_DIR_PeripheralDST ((uint32_t)0x00000010) -#define DMA_DIR_PeripheralSRC ((uint32_t)0x00000000) -#define IS_DMA_DIR(DIR) (((DIR) == DMA_DIR_PeripheralDST) || \ - ((DIR) == DMA_DIR_PeripheralSRC)) -/** - * @} - */ - -/** @defgroup DMA_peripheral_incremented_mode - * @{ - */ - -#define DMA_PeripheralInc_Enable ((uint32_t)0x00000040) -#define DMA_PeripheralInc_Disable ((uint32_t)0x00000000) -#define IS_DMA_PERIPHERAL_INC_STATE(STATE) (((STATE) == DMA_PeripheralInc_Enable) || \ - ((STATE) == DMA_PeripheralInc_Disable)) -/** - * @} - */ - -/** @defgroup DMA_memory_incremented_mode - * @{ - */ - -#define DMA_MemoryInc_Enable ((uint32_t)0x00000080) -#define DMA_MemoryInc_Disable ((uint32_t)0x00000000) -#define IS_DMA_MEMORY_INC_STATE(STATE) (((STATE) == DMA_MemoryInc_Enable) || \ - ((STATE) == DMA_MemoryInc_Disable)) -/** - * @} - */ - -/** @defgroup DMA_peripheral_data_size - * @{ - */ - -#define DMA_PeripheralDataSize_Byte ((uint32_t)0x00000000) -#define DMA_PeripheralDataSize_HalfWord ((uint32_t)0x00000100) -#define DMA_PeripheralDataSize_Word ((uint32_t)0x00000200) -#define IS_DMA_PERIPHERAL_DATA_SIZE(SIZE) (((SIZE) == DMA_PeripheralDataSize_Byte) || \ - ((SIZE) == DMA_PeripheralDataSize_HalfWord) || \ - ((SIZE) == DMA_PeripheralDataSize_Word)) -/** - * @} - */ - -/** @defgroup DMA_memory_data_size - * @{ - */ - -#define DMA_MemoryDataSize_Byte ((uint32_t)0x00000000) -#define DMA_MemoryDataSize_HalfWord ((uint32_t)0x00000400) -#define DMA_MemoryDataSize_Word ((uint32_t)0x00000800) -#define IS_DMA_MEMORY_DATA_SIZE(SIZE) (((SIZE) == DMA_MemoryDataSize_Byte) || \ - ((SIZE) == DMA_MemoryDataSize_HalfWord) || \ - ((SIZE) == DMA_MemoryDataSize_Word)) -/** - * @} - */ - -/** @defgroup DMA_circular_normal_mode - * @{ - */ - -#define DMA_Mode_Circular ((uint32_t)0x00000020) -#define DMA_Mode_Normal ((uint32_t)0x00000000) -#define IS_DMA_MODE(MODE) (((MODE) == DMA_Mode_Circular) || ((MODE) == DMA_Mode_Normal)) -/** - * @} - */ - -/** @defgroup DMA_priority_level - * @{ - */ - -#define DMA_Priority_VeryHigh ((uint32_t)0x00003000) -#define DMA_Priority_High ((uint32_t)0x00002000) -#define DMA_Priority_Medium ((uint32_t)0x00001000) -#define DMA_Priority_Low ((uint32_t)0x00000000) -#define IS_DMA_PRIORITY(PRIORITY) (((PRIORITY) == DMA_Priority_VeryHigh) || \ - ((PRIORITY) == DMA_Priority_High) || \ - ((PRIORITY) == DMA_Priority_Medium) || \ - ((PRIORITY) == DMA_Priority_Low)) -/** - * @} - */ - -/** @defgroup DMA_memory_to_memory - * @{ - */ - -#define DMA_M2M_Enable ((uint32_t)0x00004000) -#define DMA_M2M_Disable ((uint32_t)0x00000000) -#define IS_DMA_M2M_STATE(STATE) (((STATE) == DMA_M2M_Enable) || ((STATE) == DMA_M2M_Disable)) - -/** - * @} - */ - -/** @defgroup DMA_interrupts_definition - * @{ - */ - -#define DMA_IT_TC ((uint32_t)0x00000002) -#define DMA_IT_HT ((uint32_t)0x00000004) -#define DMA_IT_TE ((uint32_t)0x00000008) -#define IS_DMA_CONFIG_IT(IT) ((((IT) & 0xFFFFFFF1) == 0x00) && ((IT) != 0x00)) - -#define DMA1_IT_GL1 ((uint32_t)0x00000001) -#define DMA1_IT_TC1 ((uint32_t)0x00000002) -#define DMA1_IT_HT1 ((uint32_t)0x00000004) -#define DMA1_IT_TE1 ((uint32_t)0x00000008) -#define DMA1_IT_GL2 ((uint32_t)0x00000010) -#define DMA1_IT_TC2 ((uint32_t)0x00000020) -#define DMA1_IT_HT2 ((uint32_t)0x00000040) -#define DMA1_IT_TE2 ((uint32_t)0x00000080) -#define DMA1_IT_GL3 ((uint32_t)0x00000100) -#define DMA1_IT_TC3 ((uint32_t)0x00000200) -#define DMA1_IT_HT3 ((uint32_t)0x00000400) -#define DMA1_IT_TE3 ((uint32_t)0x00000800) -#define DMA1_IT_GL4 ((uint32_t)0x00001000) -#define DMA1_IT_TC4 ((uint32_t)0x00002000) -#define DMA1_IT_HT4 ((uint32_t)0x00004000) -#define DMA1_IT_TE4 ((uint32_t)0x00008000) -#define DMA1_IT_GL5 ((uint32_t)0x00010000) -#define DMA1_IT_TC5 ((uint32_t)0x00020000) -#define DMA1_IT_HT5 ((uint32_t)0x00040000) -#define DMA1_IT_TE5 ((uint32_t)0x00080000) -#define DMA1_IT_GL6 ((uint32_t)0x00100000) -#define DMA1_IT_TC6 ((uint32_t)0x00200000) -#define DMA1_IT_HT6 ((uint32_t)0x00400000) -#define DMA1_IT_TE6 ((uint32_t)0x00800000) -#define DMA1_IT_GL7 ((uint32_t)0x01000000) -#define DMA1_IT_TC7 ((uint32_t)0x02000000) -#define DMA1_IT_HT7 ((uint32_t)0x04000000) -#define DMA1_IT_TE7 ((uint32_t)0x08000000) - -#define DMA2_IT_GL1 ((uint32_t)0x10000001) -#define DMA2_IT_TC1 ((uint32_t)0x10000002) -#define DMA2_IT_HT1 ((uint32_t)0x10000004) -#define DMA2_IT_TE1 ((uint32_t)0x10000008) -#define DMA2_IT_GL2 ((uint32_t)0x10000010) -#define DMA2_IT_TC2 ((uint32_t)0x10000020) -#define DMA2_IT_HT2 ((uint32_t)0x10000040) -#define DMA2_IT_TE2 ((uint32_t)0x10000080) -#define DMA2_IT_GL3 ((uint32_t)0x10000100) -#define DMA2_IT_TC3 ((uint32_t)0x10000200) -#define DMA2_IT_HT3 ((uint32_t)0x10000400) -#define DMA2_IT_TE3 ((uint32_t)0x10000800) -#define DMA2_IT_GL4 ((uint32_t)0x10001000) -#define DMA2_IT_TC4 ((uint32_t)0x10002000) -#define DMA2_IT_HT4 ((uint32_t)0x10004000) -#define DMA2_IT_TE4 ((uint32_t)0x10008000) -#define DMA2_IT_GL5 ((uint32_t)0x10010000) -#define DMA2_IT_TC5 ((uint32_t)0x10020000) -#define DMA2_IT_HT5 ((uint32_t)0x10040000) -#define DMA2_IT_TE5 ((uint32_t)0x10080000) - -#define IS_DMA_CLEAR_IT(IT) (((((IT) & 0xF0000000) == 0x00) || (((IT) & 0xEFF00000) == 0x00)) && ((IT) != 0x00)) - -#define IS_DMA_GET_IT(IT) (((IT) == DMA1_IT_GL1) || ((IT) == DMA1_IT_TC1) || \ - ((IT) == DMA1_IT_HT1) || ((IT) == DMA1_IT_TE1) || \ - ((IT) == DMA1_IT_GL2) || ((IT) == DMA1_IT_TC2) || \ - ((IT) == DMA1_IT_HT2) || ((IT) == DMA1_IT_TE2) || \ - ((IT) == DMA1_IT_GL3) || ((IT) == DMA1_IT_TC3) || \ - ((IT) == DMA1_IT_HT3) || ((IT) == DMA1_IT_TE3) || \ - ((IT) == DMA1_IT_GL4) || ((IT) == DMA1_IT_TC4) || \ - ((IT) == DMA1_IT_HT4) || ((IT) == DMA1_IT_TE4) || \ - ((IT) == DMA1_IT_GL5) || ((IT) == DMA1_IT_TC5) || \ - ((IT) == DMA1_IT_HT5) || ((IT) == DMA1_IT_TE5) || \ - ((IT) == DMA1_IT_GL6) || ((IT) == DMA1_IT_TC6) || \ - ((IT) == DMA1_IT_HT6) || ((IT) == DMA1_IT_TE6) || \ - ((IT) == DMA1_IT_GL7) || ((IT) == DMA1_IT_TC7) || \ - ((IT) == DMA1_IT_HT7) || ((IT) == DMA1_IT_TE7) || \ - ((IT) == DMA2_IT_GL1) || ((IT) == DMA2_IT_TC1) || \ - ((IT) == DMA2_IT_HT1) || ((IT) == DMA2_IT_TE1) || \ - ((IT) == DMA2_IT_GL2) || ((IT) == DMA2_IT_TC2) || \ - ((IT) == DMA2_IT_HT2) || ((IT) == DMA2_IT_TE2) || \ - ((IT) == DMA2_IT_GL3) || ((IT) == DMA2_IT_TC3) || \ - ((IT) == DMA2_IT_HT3) || ((IT) == DMA2_IT_TE3) || \ - ((IT) == DMA2_IT_GL4) || ((IT) == DMA2_IT_TC4) || \ - ((IT) == DMA2_IT_HT4) || ((IT) == DMA2_IT_TE4) || \ - ((IT) == DMA2_IT_GL5) || ((IT) == DMA2_IT_TC5) || \ - ((IT) == DMA2_IT_HT5) || ((IT) == DMA2_IT_TE5)) - -/** - * @} - */ - -/** @defgroup DMA_flags_definition - * @{ - */ -#define DMA1_FLAG_GL1 ((uint32_t)0x00000001) -#define DMA1_FLAG_TC1 ((uint32_t)0x00000002) -#define DMA1_FLAG_HT1 ((uint32_t)0x00000004) -#define DMA1_FLAG_TE1 ((uint32_t)0x00000008) -#define DMA1_FLAG_GL2 ((uint32_t)0x00000010) -#define DMA1_FLAG_TC2 ((uint32_t)0x00000020) -#define DMA1_FLAG_HT2 ((uint32_t)0x00000040) -#define DMA1_FLAG_TE2 ((uint32_t)0x00000080) -#define DMA1_FLAG_GL3 ((uint32_t)0x00000100) -#define DMA1_FLAG_TC3 ((uint32_t)0x00000200) -#define DMA1_FLAG_HT3 ((uint32_t)0x00000400) -#define DMA1_FLAG_TE3 ((uint32_t)0x00000800) -#define DMA1_FLAG_GL4 ((uint32_t)0x00001000) -#define DMA1_FLAG_TC4 ((uint32_t)0x00002000) -#define DMA1_FLAG_HT4 ((uint32_t)0x00004000) -#define DMA1_FLAG_TE4 ((uint32_t)0x00008000) -#define DMA1_FLAG_GL5 ((uint32_t)0x00010000) -#define DMA1_FLAG_TC5 ((uint32_t)0x00020000) -#define DMA1_FLAG_HT5 ((uint32_t)0x00040000) -#define DMA1_FLAG_TE5 ((uint32_t)0x00080000) -#define DMA1_FLAG_GL6 ((uint32_t)0x00100000) -#define DMA1_FLAG_TC6 ((uint32_t)0x00200000) -#define DMA1_FLAG_HT6 ((uint32_t)0x00400000) -#define DMA1_FLAG_TE6 ((uint32_t)0x00800000) -#define DMA1_FLAG_GL7 ((uint32_t)0x01000000) -#define DMA1_FLAG_TC7 ((uint32_t)0x02000000) -#define DMA1_FLAG_HT7 ((uint32_t)0x04000000) -#define DMA1_FLAG_TE7 ((uint32_t)0x08000000) - -#define DMA2_FLAG_GL1 ((uint32_t)0x10000001) -#define DMA2_FLAG_TC1 ((uint32_t)0x10000002) -#define DMA2_FLAG_HT1 ((uint32_t)0x10000004) -#define DMA2_FLAG_TE1 ((uint32_t)0x10000008) -#define DMA2_FLAG_GL2 ((uint32_t)0x10000010) -#define DMA2_FLAG_TC2 ((uint32_t)0x10000020) -#define DMA2_FLAG_HT2 ((uint32_t)0x10000040) -#define DMA2_FLAG_TE2 ((uint32_t)0x10000080) -#define DMA2_FLAG_GL3 ((uint32_t)0x10000100) -#define DMA2_FLAG_TC3 ((uint32_t)0x10000200) -#define DMA2_FLAG_HT3 ((uint32_t)0x10000400) -#define DMA2_FLAG_TE3 ((uint32_t)0x10000800) -#define DMA2_FLAG_GL4 ((uint32_t)0x10001000) -#define DMA2_FLAG_TC4 ((uint32_t)0x10002000) -#define DMA2_FLAG_HT4 ((uint32_t)0x10004000) -#define DMA2_FLAG_TE4 ((uint32_t)0x10008000) -#define DMA2_FLAG_GL5 ((uint32_t)0x10010000) -#define DMA2_FLAG_TC5 ((uint32_t)0x10020000) -#define DMA2_FLAG_HT5 ((uint32_t)0x10040000) -#define DMA2_FLAG_TE5 ((uint32_t)0x10080000) - -#define IS_DMA_CLEAR_FLAG(FLAG) (((((FLAG) & 0xF0000000) == 0x00) || (((FLAG) & 0xEFF00000) == 0x00)) && ((FLAG) != 0x00)) - -#define IS_DMA_GET_FLAG(FLAG) (((FLAG) == DMA1_FLAG_GL1) || ((FLAG) == DMA1_FLAG_TC1) || \ - ((FLAG) == DMA1_FLAG_HT1) || ((FLAG) == DMA1_FLAG_TE1) || \ - ((FLAG) == DMA1_FLAG_GL2) || ((FLAG) == DMA1_FLAG_TC2) || \ - ((FLAG) == DMA1_FLAG_HT2) || ((FLAG) == DMA1_FLAG_TE2) || \ - ((FLAG) == DMA1_FLAG_GL3) || ((FLAG) == DMA1_FLAG_TC3) || \ - ((FLAG) == DMA1_FLAG_HT3) || ((FLAG) == DMA1_FLAG_TE3) || \ - ((FLAG) == DMA1_FLAG_GL4) || ((FLAG) == DMA1_FLAG_TC4) || \ - ((FLAG) == DMA1_FLAG_HT4) || ((FLAG) == DMA1_FLAG_TE4) || \ - ((FLAG) == DMA1_FLAG_GL5) || ((FLAG) == DMA1_FLAG_TC5) || \ - ((FLAG) == DMA1_FLAG_HT5) || ((FLAG) == DMA1_FLAG_TE5) || \ - ((FLAG) == DMA1_FLAG_GL6) || ((FLAG) == DMA1_FLAG_TC6) || \ - ((FLAG) == DMA1_FLAG_HT6) || ((FLAG) == DMA1_FLAG_TE6) || \ - ((FLAG) == DMA1_FLAG_GL7) || ((FLAG) == DMA1_FLAG_TC7) || \ - ((FLAG) == DMA1_FLAG_HT7) || ((FLAG) == DMA1_FLAG_TE7) || \ - ((FLAG) == DMA2_FLAG_GL1) || ((FLAG) == DMA2_FLAG_TC1) || \ - ((FLAG) == DMA2_FLAG_HT1) || ((FLAG) == DMA2_FLAG_TE1) || \ - ((FLAG) == DMA2_FLAG_GL2) || ((FLAG) == DMA2_FLAG_TC2) || \ - ((FLAG) == DMA2_FLAG_HT2) || ((FLAG) == DMA2_FLAG_TE2) || \ - ((FLAG) == DMA2_FLAG_GL3) || ((FLAG) == DMA2_FLAG_TC3) || \ - ((FLAG) == DMA2_FLAG_HT3) || ((FLAG) == DMA2_FLAG_TE3) || \ - ((FLAG) == DMA2_FLAG_GL4) || ((FLAG) == DMA2_FLAG_TC4) || \ - ((FLAG) == DMA2_FLAG_HT4) || ((FLAG) == DMA2_FLAG_TE4) || \ - ((FLAG) == DMA2_FLAG_GL5) || ((FLAG) == DMA2_FLAG_TC5) || \ - ((FLAG) == DMA2_FLAG_HT5) || ((FLAG) == DMA2_FLAG_TE5)) -/** - * @} - */ - -/** @defgroup DMA_Buffer_Size - * @{ - */ - -#define IS_DMA_BUFFER_SIZE(SIZE) (((SIZE) >= 0x1) && ((SIZE) < 0x10000)) - -/** - * @} - */ - -/** - * @} - */ - -/** @defgroup DMA_Exported_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup DMA_Exported_Functions - * @{ - */ - -void DMA_DeInit(DMA_Channel_TypeDef* DMAy_Channelx); -void DMA_Init(DMA_Channel_TypeDef* DMAy_Channelx, DMA_InitTypeDef* DMA_InitStruct); -void DMA_StructInit(DMA_InitTypeDef* DMA_InitStruct); -void DMA_Cmd(DMA_Channel_TypeDef* DMAy_Channelx, FunctionalState NewState); -void DMA_ITConfig(DMA_Channel_TypeDef* DMAy_Channelx, uint32_t DMA_IT, FunctionalState NewState); -uint16_t DMA_GetCurrDataCounter(DMA_Channel_TypeDef* DMAy_Channelx); -FlagStatus DMA_GetFlagStatus(uint32_t DMA_FLAG); -void DMA_ClearFlag(uint32_t DMA_FLAG); -ITStatus DMA_GetITStatus(uint32_t DMA_IT); -void DMA_ClearITPendingBit(uint32_t DMA_IT); - -#ifdef __cplusplus -} -#endif - -#endif /*__STM32F10x_DMA_H */ -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_exti.h b/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_exti.h deleted file mode 100644 index df600833a1..0000000000 --- a/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_exti.h +++ /dev/null @@ -1,183 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f10x_exti.h - * @author MCD Application Team - * @version V3.2.0 - * @date 03/01/2010 - * @brief This file contains all the functions prototypes for the EXTI firmware - * library. - ****************************************************************************** - * @copy - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2010 STMicroelectronics

- */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F10x_EXTI_H -#define __STM32F10x_EXTI_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x.h" - -/** @addtogroup STM32F10x_StdPeriph_Driver - * @{ - */ - -/** @addtogroup EXTI - * @{ - */ - -/** @defgroup EXTI_Exported_Types - * @{ - */ - -/** - * @brief EXTI mode enumeration - */ - -typedef enum -{ - EXTI_Mode_Interrupt = 0x00, - EXTI_Mode_Event = 0x04 -}EXTIMode_TypeDef; - -#define IS_EXTI_MODE(MODE) (((MODE) == EXTI_Mode_Interrupt) || ((MODE) == EXTI_Mode_Event)) - -/** - * @brief EXTI Trigger enumeration - */ - -typedef enum -{ - EXTI_Trigger_Rising = 0x08, - EXTI_Trigger_Falling = 0x0C, - EXTI_Trigger_Rising_Falling = 0x10 -}EXTITrigger_TypeDef; - -#define IS_EXTI_TRIGGER(TRIGGER) (((TRIGGER) == EXTI_Trigger_Rising) || \ - ((TRIGGER) == EXTI_Trigger_Falling) || \ - ((TRIGGER) == EXTI_Trigger_Rising_Falling)) -/** - * @brief EXTI Init Structure definition - */ - -typedef struct -{ - uint32_t EXTI_Line; /*!< Specifies the EXTI lines to be enabled or disabled. - This parameter can be any combination of @ref EXTI_Lines */ - - EXTIMode_TypeDef EXTI_Mode; /*!< Specifies the mode for the EXTI lines. - This parameter can be a value of @ref EXTIMode_TypeDef */ - - EXTITrigger_TypeDef EXTI_Trigger; /*!< Specifies the trigger signal active edge for the EXTI lines. - This parameter can be a value of @ref EXTIMode_TypeDef */ - - FunctionalState EXTI_LineCmd; /*!< Specifies the new state of the selected EXTI lines. - This parameter can be set either to ENABLE or DISABLE */ -}EXTI_InitTypeDef; - -/** - * @} - */ - -/** @defgroup EXTI_Exported_Constants - * @{ - */ - -/** @defgroup EXTI_Lines - * @{ - */ - -#define EXTI_Line0 ((uint32_t)0x00001) /*!< External interrupt line 0 */ -#define EXTI_Line1 ((uint32_t)0x00002) /*!< External interrupt line 1 */ -#define EXTI_Line2 ((uint32_t)0x00004) /*!< External interrupt line 2 */ -#define EXTI_Line3 ((uint32_t)0x00008) /*!< External interrupt line 3 */ -#define EXTI_Line4 ((uint32_t)0x00010) /*!< External interrupt line 4 */ -#define EXTI_Line5 ((uint32_t)0x00020) /*!< External interrupt line 5 */ -#define EXTI_Line6 ((uint32_t)0x00040) /*!< External interrupt line 6 */ -#define EXTI_Line7 ((uint32_t)0x00080) /*!< External interrupt line 7 */ -#define EXTI_Line8 ((uint32_t)0x00100) /*!< External interrupt line 8 */ -#define EXTI_Line9 ((uint32_t)0x00200) /*!< External interrupt line 9 */ -#define EXTI_Line10 ((uint32_t)0x00400) /*!< External interrupt line 10 */ -#define EXTI_Line11 ((uint32_t)0x00800) /*!< External interrupt line 11 */ -#define EXTI_Line12 ((uint32_t)0x01000) /*!< External interrupt line 12 */ -#define EXTI_Line13 ((uint32_t)0x02000) /*!< External interrupt line 13 */ -#define EXTI_Line14 ((uint32_t)0x04000) /*!< External interrupt line 14 */ -#define EXTI_Line15 ((uint32_t)0x08000) /*!< External interrupt line 15 */ -#define EXTI_Line16 ((uint32_t)0x10000) /*!< External interrupt line 16 Connected to the PVD Output */ -#define EXTI_Line17 ((uint32_t)0x20000) /*!< External interrupt line 17 Connected to the RTC Alarm event */ -#define EXTI_Line18 ((uint32_t)0x40000) /*!< External interrupt line 18 Connected to the USB Device/USB OTG FS - Wakeup from suspend event */ -#define EXTI_Line19 ((uint32_t)0x80000) /*!< External interrupt line 19 Connected to the Ethernet Wakeup event */ - -#define IS_EXTI_LINE(LINE) ((((LINE) & (uint32_t)0xFFF00000) == 0x00) && ((LINE) != (uint16_t)0x00)) -#define IS_GET_EXTI_LINE(LINE) (((LINE) == EXTI_Line0) || ((LINE) == EXTI_Line1) || \ - ((LINE) == EXTI_Line2) || ((LINE) == EXTI_Line3) || \ - ((LINE) == EXTI_Line4) || ((LINE) == EXTI_Line5) || \ - ((LINE) == EXTI_Line6) || ((LINE) == EXTI_Line7) || \ - ((LINE) == EXTI_Line8) || ((LINE) == EXTI_Line9) || \ - ((LINE) == EXTI_Line10) || ((LINE) == EXTI_Line11) || \ - ((LINE) == EXTI_Line12) || ((LINE) == EXTI_Line13) || \ - ((LINE) == EXTI_Line14) || ((LINE) == EXTI_Line15) || \ - ((LINE) == EXTI_Line16) || ((LINE) == EXTI_Line17) || \ - ((LINE) == EXTI_Line18) || ((LINE) == EXTI_Line19)) - - -/** - * @} - */ - -/** - * @} - */ - -/** @defgroup EXTI_Exported_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup EXTI_Exported_Functions - * @{ - */ - -void EXTI_DeInit(void); -void EXTI_Init(EXTI_InitTypeDef* EXTI_InitStruct); -void EXTI_StructInit(EXTI_InitTypeDef* EXTI_InitStruct); -void EXTI_GenerateSWInterrupt(uint32_t EXTI_Line); -FlagStatus EXTI_GetFlagStatus(uint32_t EXTI_Line); -void EXTI_ClearFlag(uint32_t EXTI_Line); -ITStatus EXTI_GetITStatus(uint32_t EXTI_Line); -void EXTI_ClearITPendingBit(uint32_t EXTI_Line); - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32F10x_EXTI_H */ -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_flash.h b/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_flash.h deleted file mode 100644 index 54cf3c85a5..0000000000 --- a/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_flash.h +++ /dev/null @@ -1,346 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f10x_flash.h - * @author MCD Application Team - * @version V3.2.0 - * @date 03/01/2010 - * @brief This file contains all the functions prototypes for the FLASH - * firmware library. - ****************************************************************************** - * @copy - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2010 STMicroelectronics

- */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F10x_FLASH_H -#define __STM32F10x_FLASH_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x.h" - -/** @addtogroup STM32F10x_StdPeriph_Driver - * @{ - */ - -/** @addtogroup FLASH - * @{ - */ - -/** @defgroup FLASH_Exported_Types - * @{ - */ - -/** - * @brief FLASH Status - */ - -typedef enum -{ - FLASH_BUSY = 1, - FLASH_ERROR_PG, - FLASH_ERROR_WRP, - FLASH_COMPLETE, - FLASH_TIMEOUT -}FLASH_Status; - -/** - * @} - */ - -/** @defgroup FLASH_Exported_Constants - * @{ - */ - -/** @defgroup Flash_Latency - * @{ - */ - -#define FLASH_Latency_0 ((uint32_t)0x00000000) /*!< FLASH Zero Latency cycle */ -#define FLASH_Latency_1 ((uint32_t)0x00000001) /*!< FLASH One Latency cycle */ -#define FLASH_Latency_2 ((uint32_t)0x00000002) /*!< FLASH Two Latency cycles */ -#define IS_FLASH_LATENCY(LATENCY) (((LATENCY) == FLASH_Latency_0) || \ - ((LATENCY) == FLASH_Latency_1) || \ - ((LATENCY) == FLASH_Latency_2)) -/** - * @} - */ - -/** @defgroup Half_Cycle_Enable_Disable - * @{ - */ - -#define FLASH_HalfCycleAccess_Enable ((uint32_t)0x00000008) /*!< FLASH Half Cycle Enable */ -#define FLASH_HalfCycleAccess_Disable ((uint32_t)0x00000000) /*!< FLASH Half Cycle Disable */ -#define IS_FLASH_HALFCYCLEACCESS_STATE(STATE) (((STATE) == FLASH_HalfCycleAccess_Enable) || \ - ((STATE) == FLASH_HalfCycleAccess_Disable)) -/** - * @} - */ - -/** @defgroup Prefetch_Buffer_Enable_Disable - * @{ - */ - -#define FLASH_PrefetchBuffer_Enable ((uint32_t)0x00000010) /*!< FLASH Prefetch Buffer Enable */ -#define FLASH_PrefetchBuffer_Disable ((uint32_t)0x00000000) /*!< FLASH Prefetch Buffer Disable */ -#define IS_FLASH_PREFETCHBUFFER_STATE(STATE) (((STATE) == FLASH_PrefetchBuffer_Enable) || \ - ((STATE) == FLASH_PrefetchBuffer_Disable)) -/** - * @} - */ - -/** @defgroup Option_Bytes_Write_Protection - * @{ - */ - -/* Values to be used with STM32 Low and Medium density devices */ -#define FLASH_WRProt_Pages0to3 ((uint32_t)0x00000001) /*!< STM32 Low and Medium density devices: Write protection of page 0 to 3 */ -#define FLASH_WRProt_Pages4to7 ((uint32_t)0x00000002) /*!< STM32 Low and Medium density devices: Write protection of page 4 to 7 */ -#define FLASH_WRProt_Pages8to11 ((uint32_t)0x00000004) /*!< STM32 Low and Medium density devices: Write protection of page 8 to 11 */ -#define FLASH_WRProt_Pages12to15 ((uint32_t)0x00000008) /*!< STM32 Low and Medium density devices: Write protection of page 12 to 15 */ -#define FLASH_WRProt_Pages16to19 ((uint32_t)0x00000010) /*!< STM32 Low and Medium density devices: Write protection of page 16 to 19 */ -#define FLASH_WRProt_Pages20to23 ((uint32_t)0x00000020) /*!< STM32 Low and Medium density devices: Write protection of page 20 to 23 */ -#define FLASH_WRProt_Pages24to27 ((uint32_t)0x00000040) /*!< STM32 Low and Medium density devices: Write protection of page 24 to 27 */ -#define FLASH_WRProt_Pages28to31 ((uint32_t)0x00000080) /*!< STM32 Low and Medium density devices: Write protection of page 28 to 31 */ - -/* Values to be used with STM32 Medium-density devices */ -#define FLASH_WRProt_Pages32to35 ((uint32_t)0x00000100) /*!< STM32 Medium-density devices: Write protection of page 32 to 35 */ -#define FLASH_WRProt_Pages36to39 ((uint32_t)0x00000200) /*!< STM32 Medium-density devices: Write protection of page 36 to 39 */ -#define FLASH_WRProt_Pages40to43 ((uint32_t)0x00000400) /*!< STM32 Medium-density devices: Write protection of page 40 to 43 */ -#define FLASH_WRProt_Pages44to47 ((uint32_t)0x00000800) /*!< STM32 Medium-density devices: Write protection of page 44 to 47 */ -#define FLASH_WRProt_Pages48to51 ((uint32_t)0x00001000) /*!< STM32 Medium-density devices: Write protection of page 48 to 51 */ -#define FLASH_WRProt_Pages52to55 ((uint32_t)0x00002000) /*!< STM32 Medium-density devices: Write protection of page 52 to 55 */ -#define FLASH_WRProt_Pages56to59 ((uint32_t)0x00004000) /*!< STM32 Medium-density devices: Write protection of page 56 to 59 */ -#define FLASH_WRProt_Pages60to63 ((uint32_t)0x00008000) /*!< STM32 Medium-density devices: Write protection of page 60 to 63 */ -#define FLASH_WRProt_Pages64to67 ((uint32_t)0x00010000) /*!< STM32 Medium-density devices: Write protection of page 64 to 67 */ -#define FLASH_WRProt_Pages68to71 ((uint32_t)0x00020000) /*!< STM32 Medium-density devices: Write protection of page 68 to 71 */ -#define FLASH_WRProt_Pages72to75 ((uint32_t)0x00040000) /*!< STM32 Medium-density devices: Write protection of page 72 to 75 */ -#define FLASH_WRProt_Pages76to79 ((uint32_t)0x00080000) /*!< STM32 Medium-density devices: Write protection of page 76 to 79 */ -#define FLASH_WRProt_Pages80to83 ((uint32_t)0x00100000) /*!< STM32 Medium-density devices: Write protection of page 80 to 83 */ -#define FLASH_WRProt_Pages84to87 ((uint32_t)0x00200000) /*!< STM32 Medium-density devices: Write protection of page 84 to 87 */ -#define FLASH_WRProt_Pages88to91 ((uint32_t)0x00400000) /*!< STM32 Medium-density devices: Write protection of page 88 to 91 */ -#define FLASH_WRProt_Pages92to95 ((uint32_t)0x00800000) /*!< STM32 Medium-density devices: Write protection of page 92 to 95 */ -#define FLASH_WRProt_Pages96to99 ((uint32_t)0x01000000) /*!< STM32 Medium-density devices: Write protection of page 96 to 99 */ -#define FLASH_WRProt_Pages100to103 ((uint32_t)0x02000000) /*!< STM32 Medium-density devices: Write protection of page 100 to 103 */ -#define FLASH_WRProt_Pages104to107 ((uint32_t)0x04000000) /*!< STM32 Medium-density devices: Write protection of page 104 to 107 */ -#define FLASH_WRProt_Pages108to111 ((uint32_t)0x08000000) /*!< STM32 Medium-density devices: Write protection of page 108 to 111 */ -#define FLASH_WRProt_Pages112to115 ((uint32_t)0x10000000) /*!< STM32 Medium-density devices: Write protection of page 112 to 115 */ -#define FLASH_WRProt_Pages116to119 ((uint32_t)0x20000000) /*!< STM32 Medium-density devices: Write protection of page 115 to 119 */ -#define FLASH_WRProt_Pages120to123 ((uint32_t)0x40000000) /*!< STM32 Medium-density devices: Write protection of page 120 to 123 */ -#define FLASH_WRProt_Pages124to127 ((uint32_t)0x80000000) /*!< STM32 Medium-density devices: Write protection of page 124 to 127 */ - -/* Values to be used with STM32 High-density and STM32F10X Connectivity line devices */ -#define FLASH_WRProt_Pages0to1 ((uint32_t)0x00000001) /*!< STM32 Medium-density and Connectivity line devices: - Write protection of page 0 to 1 */ -#define FLASH_WRProt_Pages2to3 ((uint32_t)0x00000002) /*!< STM32 Medium-density and Connectivity line devices: - Write protection of page 2 to 3 */ -#define FLASH_WRProt_Pages4to5 ((uint32_t)0x00000004) /*!< STM32 Medium-density and Connectivity line devices: - Write protection of page 4 to 5 */ -#define FLASH_WRProt_Pages6to7 ((uint32_t)0x00000008) /*!< STM32 Medium-density and Connectivity line devices: - Write protection of page 6 to 7 */ -#define FLASH_WRProt_Pages8to9 ((uint32_t)0x00000010) /*!< STM32 Medium-density and Connectivity line devices: - Write protection of page 8 to 9 */ -#define FLASH_WRProt_Pages10to11 ((uint32_t)0x00000020) /*!< STM32 Medium-density and Connectivity line devices: - Write protection of page 10 to 11 */ -#define FLASH_WRProt_Pages12to13 ((uint32_t)0x00000040) /*!< STM32 Medium-density and Connectivity line devices: - Write protection of page 12 to 13 */ -#define FLASH_WRProt_Pages14to15 ((uint32_t)0x00000080) /*!< STM32 Medium-density and Connectivity line devices: - Write protection of page 14 to 15 */ -#define FLASH_WRProt_Pages16to17 ((uint32_t)0x00000100) /*!< STM32 Medium-density and Connectivity line devices: - Write protection of page 16 to 17 */ -#define FLASH_WRProt_Pages18to19 ((uint32_t)0x00000200) /*!< STM32 Medium-density and Connectivity line devices: - Write protection of page 18 to 19 */ -#define FLASH_WRProt_Pages20to21 ((uint32_t)0x00000400) /*!< STM32 Medium-density and Connectivity line devices: - Write protection of page 20 to 21 */ -#define FLASH_WRProt_Pages22to23 ((uint32_t)0x00000800) /*!< STM32 Medium-density and Connectivity line devices: - Write protection of page 22 to 23 */ -#define FLASH_WRProt_Pages24to25 ((uint32_t)0x00001000) /*!< STM32 Medium-density and Connectivity line devices: - Write protection of page 24 to 25 */ -#define FLASH_WRProt_Pages26to27 ((uint32_t)0x00002000) /*!< STM32 Medium-density and Connectivity line devices: - Write protection of page 26 to 27 */ -#define FLASH_WRProt_Pages28to29 ((uint32_t)0x00004000) /*!< STM32 Medium-density and Connectivity line devices: - Write protection of page 28 to 29 */ -#define FLASH_WRProt_Pages30to31 ((uint32_t)0x00008000) /*!< STM32 Medium-density and Connectivity line devices: - Write protection of page 30 to 31 */ -#define FLASH_WRProt_Pages32to33 ((uint32_t)0x00010000) /*!< STM32 Medium-density and Connectivity line devices: - Write protection of page 32 to 33 */ -#define FLASH_WRProt_Pages34to35 ((uint32_t)0x00020000) /*!< STM32 Medium-density and Connectivity line devices: - Write protection of page 34 to 35 */ -#define FLASH_WRProt_Pages36to37 ((uint32_t)0x00040000) /*!< STM32 Medium-density and Connectivity line devices: - Write protection of page 36 to 37 */ -#define FLASH_WRProt_Pages38to39 ((uint32_t)0x00080000) /*!< STM32 Medium-density and Connectivity line devices: - Write protection of page 38 to 39 */ -#define FLASH_WRProt_Pages40to41 ((uint32_t)0x00100000) /*!< STM32 Medium-density and Connectivity line devices: - Write protection of page 40 to 41 */ -#define FLASH_WRProt_Pages42to43 ((uint32_t)0x00200000) /*!< STM32 Medium-density and Connectivity line devices: - Write protection of page 42 to 43 */ -#define FLASH_WRProt_Pages44to45 ((uint32_t)0x00400000) /*!< STM32 Medium-density and Connectivity line devices: - Write protection of page 44 to 45 */ -#define FLASH_WRProt_Pages46to47 ((uint32_t)0x00800000) /*!< STM32 Medium-density and Connectivity line devices: - Write protection of page 46 to 47 */ -#define FLASH_WRProt_Pages48to49 ((uint32_t)0x01000000) /*!< STM32 Medium-density and Connectivity line devices: - Write protection of page 48 to 49 */ -#define FLASH_WRProt_Pages50to51 ((uint32_t)0x02000000) /*!< STM32 Medium-density and Connectivity line devices: - Write protection of page 50 to 51 */ -#define FLASH_WRProt_Pages52to53 ((uint32_t)0x04000000) /*!< STM32 Medium-density and Connectivity line devices: - Write protection of page 52 to 53 */ -#define FLASH_WRProt_Pages54to55 ((uint32_t)0x08000000) /*!< STM32 Medium-density and Connectivity line devices: - Write protection of page 54 to 55 */ -#define FLASH_WRProt_Pages56to57 ((uint32_t)0x10000000) /*!< STM32 Medium-density and Connectivity line devices: - Write protection of page 56 to 57 */ -#define FLASH_WRProt_Pages58to59 ((uint32_t)0x20000000) /*!< STM32 Medium-density and Connectivity line devices: - Write protection of page 58 to 59 */ -#define FLASH_WRProt_Pages60to61 ((uint32_t)0x40000000) /*!< STM32 Medium-density and Connectivity line devices: - Write protection of page 60 to 61 */ -#define FLASH_WRProt_Pages62to127 ((uint32_t)0x80000000) /*!< STM32 Connectivity line devices: Write protection of page 62 to 127 */ -#define FLASH_WRProt_Pages62to255 ((uint32_t)0x80000000) /*!< STM32 Medium-density devices: Write protection of page 62 to 255 */ - -#define FLASH_WRProt_AllPages ((uint32_t)0xFFFFFFFF) /*!< Write protection of all Pages */ - -#define IS_FLASH_WRPROT_PAGE(PAGE) (((PAGE) != 0x00000000)) - -#define IS_FLASH_ADDRESS(ADDRESS) (((ADDRESS) >= 0x08000000) && ((ADDRESS) < 0x0807FFFF)) - -#define IS_OB_DATA_ADDRESS(ADDRESS) (((ADDRESS) == 0x1FFFF804) || ((ADDRESS) == 0x1FFFF806)) - -/** - * @} - */ - -/** @defgroup Option_Bytes_IWatchdog - * @{ - */ - -#define OB_IWDG_SW ((uint16_t)0x0001) /*!< Software IWDG selected */ -#define OB_IWDG_HW ((uint16_t)0x0000) /*!< Hardware IWDG selected */ -#define IS_OB_IWDG_SOURCE(SOURCE) (((SOURCE) == OB_IWDG_SW) || ((SOURCE) == OB_IWDG_HW)) - -/** - * @} - */ - -/** @defgroup Option_Bytes_nRST_STOP - * @{ - */ - -#define OB_STOP_NoRST ((uint16_t)0x0002) /*!< No reset generated when entering in STOP */ -#define OB_STOP_RST ((uint16_t)0x0000) /*!< Reset generated when entering in STOP */ -#define IS_OB_STOP_SOURCE(SOURCE) (((SOURCE) == OB_STOP_NoRST) || ((SOURCE) == OB_STOP_RST)) - -/** - * @} - */ - -/** @defgroup Option_Bytes_nRST_STDBY - * @{ - */ - -#define OB_STDBY_NoRST ((uint16_t)0x0004) /*!< No reset generated when entering in STANDBY */ -#define OB_STDBY_RST ((uint16_t)0x0000) /*!< Reset generated when entering in STANDBY */ -#define IS_OB_STDBY_SOURCE(SOURCE) (((SOURCE) == OB_STDBY_NoRST) || ((SOURCE) == OB_STDBY_RST)) - -/** - * @} - */ - -/** @defgroup FLASH_Interrupts - * @{ - */ - -#define FLASH_IT_ERROR ((uint32_t)0x00000400) /*!< FPEC error interrupt source */ -#define FLASH_IT_EOP ((uint32_t)0x00001000) /*!< End of FLASH Operation Interrupt source */ -#define IS_FLASH_IT(IT) ((((IT) & (uint32_t)0xFFFFEBFF) == 0x00000000) && (((IT) != 0x00000000))) - -/** - * @} - */ - -/** @defgroup FLASH_Flags - * @{ - */ - -#define FLASH_FLAG_BSY ((uint32_t)0x00000001) /*!< FLASH Busy flag */ -#define FLASH_FLAG_EOP ((uint32_t)0x00000020) /*!< FLASH End of Operation flag */ -#define FLASH_FLAG_PGERR ((uint32_t)0x00000004) /*!< FLASH Program error flag */ -#define FLASH_FLAG_WRPRTERR ((uint32_t)0x00000010) /*!< FLASH Write protected error flag */ -#define FLASH_FLAG_OPTERR ((uint32_t)0x00000001) /*!< FLASH Option Byte error flag */ - -#define IS_FLASH_CLEAR_FLAG(FLAG) ((((FLAG) & (uint32_t)0xFFFFFFCA) == 0x00000000) && ((FLAG) != 0x00000000)) -#define IS_FLASH_GET_FLAG(FLAG) (((FLAG) == FLASH_FLAG_BSY) || ((FLAG) == FLASH_FLAG_EOP) || \ - ((FLAG) == FLASH_FLAG_PGERR) || ((FLAG) == FLASH_FLAG_WRPRTERR) || \ - ((FLAG) == FLASH_FLAG_OPTERR)) - -/** - * @} - */ - -/** - * @} - */ - -/** @defgroup FLASH_Exported_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup FLASH_Exported_Functions - * @{ - */ - -void FLASH_SetLatency(uint32_t FLASH_Latency); -void FLASH_HalfCycleAccessCmd(uint32_t FLASH_HalfCycleAccess); -void FLASH_PrefetchBufferCmd(uint32_t FLASH_PrefetchBuffer); -void FLASH_Unlock(void); -void FLASH_Lock(void); -FLASH_Status FLASH_ErasePage(uint32_t Page_Address); -FLASH_Status FLASH_EraseAllPages(void); -FLASH_Status FLASH_EraseOptionBytes(void); -FLASH_Status FLASH_ProgramWord(uint32_t Address, uint32_t Data); -FLASH_Status FLASH_ProgramHalfWord(uint32_t Address, uint16_t Data); -FLASH_Status FLASH_ProgramOptionByteData(uint32_t Address, uint8_t Data); -FLASH_Status FLASH_EnableWriteProtection(uint32_t FLASH_Pages); -FLASH_Status FLASH_ReadOutProtection(FunctionalState NewState); -FLASH_Status FLASH_UserOptionByteConfig(uint16_t OB_IWDG, uint16_t OB_STOP, uint16_t OB_STDBY); -uint32_t FLASH_GetUserOptionByte(void); -uint32_t FLASH_GetWriteProtectionOptionByte(void); -FlagStatus FLASH_GetReadOutProtectionStatus(void); -FlagStatus FLASH_GetPrefetchBufferStatus(void); -void FLASH_ITConfig(uint16_t FLASH_IT, FunctionalState NewState); -FlagStatus FLASH_GetFlagStatus(uint16_t FLASH_FLAG); -void FLASH_ClearFlag(uint16_t FLASH_FLAG); -FLASH_Status FLASH_GetStatus(void); -FLASH_Status FLASH_WaitForLastOperation(uint32_t Timeout); - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32F10x_FLASH_H */ -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_fsmc.h b/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_fsmc.h deleted file mode 100644 index a74a2926bb..0000000000 --- a/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_fsmc.h +++ /dev/null @@ -1,716 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f10x_fsmc.h - * @author MCD Application Team - * @version V3.2.0 - * @date 03/01/2010 - * @brief This file contains all the functions prototypes for the FSMC firmware - * library. - ****************************************************************************** - * @copy - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2010 STMicroelectronics

- */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F10x_FSMC_H -#define __STM32F10x_FSMC_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x.h" - -/** @addtogroup STM32F10x_StdPeriph_Driver - * @{ - */ - -/** @addtogroup FSMC - * @{ - */ - -/** @defgroup FSMC_Exported_Types - * @{ - */ - -/** - * @brief Timing parameters For NOR/SRAM Banks - */ - -typedef struct -{ - uint32_t FSMC_AddressSetupTime; /*!< Defines the number of HCLK cycles to configure - the duration of the address setup time. - This parameter can be a value between 0 and 0xF. - @note: It is not used with synchronous NOR Flash memories. */ - - uint32_t FSMC_AddressHoldTime; /*!< Defines the number of HCLK cycles to configure - the duration of the address hold time. - This parameter can be a value between 0 and 0xF. - @note: It is not used with synchronous NOR Flash memories.*/ - - uint32_t FSMC_DataSetupTime; /*!< Defines the number of HCLK cycles to configure - the duration of the data setup time. - This parameter can be a value between 0 and 0xFF. - @note: It is used for SRAMs, ROMs and asynchronous multiplexed NOR Flash memories. */ - - uint32_t FSMC_BusTurnAroundDuration; /*!< Defines the number of HCLK cycles to configure - the duration of the bus turnaround. - This parameter can be a value between 0 and 0xF. - @note: It is only used for multiplexed NOR Flash memories. */ - - uint32_t FSMC_CLKDivision; /*!< Defines the period of CLK clock output signal, expressed in number of HCLK cycles. - This parameter can be a value between 1 and 0xF. - @note: This parameter is not used for asynchronous NOR Flash, SRAM or ROM accesses. */ - - uint32_t FSMC_DataLatency; /*!< Defines the number of memory clock cycles to issue - to the memory before getting the first data. - The value of this parameter depends on the memory type as shown below: - - It must be set to 0 in case of a CRAM - - It is don’t care in asynchronous NOR, SRAM or ROM accesses - - It may assume a value between 0 and 0xF in NOR Flash memories - with synchronous burst mode enable */ - - uint32_t FSMC_AccessMode; /*!< Specifies the asynchronous access mode. - This parameter can be a value of @ref FSMC_Access_Mode */ -}FSMC_NORSRAMTimingInitTypeDef; - -/** - * @brief FSMC NOR/SRAM Init structure definition - */ - -typedef struct -{ - uint32_t FSMC_Bank; /*!< Specifies the NOR/SRAM memory bank that will be used. - This parameter can be a value of @ref FSMC_NORSRAM_Bank */ - - uint32_t FSMC_DataAddressMux; /*!< Specifies whether the address and data values are - multiplexed on the databus or not. - This parameter can be a value of @ref FSMC_Data_Address_Bus_Multiplexing */ - - uint32_t FSMC_MemoryType; /*!< Specifies the type of external memory attached to - the corresponding memory bank. - This parameter can be a value of @ref FSMC_Memory_Type */ - - uint32_t FSMC_MemoryDataWidth; /*!< Specifies the external memory device width. - This parameter can be a value of @ref FSMC_Data_Width */ - - uint32_t FSMC_BurstAccessMode; /*!< Enables or disables the burst access mode for Flash memory, - valid only with synchronous burst Flash memories. - This parameter can be a value of @ref FSMC_Burst_Access_Mode */ - - uint32_t FSMC_WaitSignalPolarity; /*!< Specifies the wait signal polarity, valid only when accessing - the Flash memory in burst mode. - This parameter can be a value of @ref FSMC_Wait_Signal_Polarity */ - - uint32_t FSMC_WrapMode; /*!< Enables or disables the Wrapped burst access mode for Flash - memory, valid only when accessing Flash memories in burst mode. - This parameter can be a value of @ref FSMC_Wrap_Mode */ - - uint32_t FSMC_WaitSignalActive; /*!< Specifies if the wait signal is asserted by the memory one - clock cycle before the wait state or during the wait state, - valid only when accessing memories in burst mode. - This parameter can be a value of @ref FSMC_Wait_Timing */ - - uint32_t FSMC_WriteOperation; /*!< Enables or disables the write operation in the selected bank by the FSMC. - This parameter can be a value of @ref FSMC_Write_Operation */ - - uint32_t FSMC_WaitSignal; /*!< Enables or disables the wait-state insertion via wait - signal, valid for Flash memory access in burst mode. - This parameter can be a value of @ref FSMC_Wait_Signal */ - - uint32_t FSMC_ExtendedMode; /*!< Enables or disables the extended mode. - This parameter can be a value of @ref FSMC_Extended_Mode */ - - uint32_t FSMC_WriteBurst; /*!< Enables or disables the write burst operation. - This parameter can be a value of @ref FSMC_Write_Burst */ - - FSMC_NORSRAMTimingInitTypeDef* FSMC_ReadWriteTimingStruct; /*!< Timing Parameters for write and read access if the ExtendedMode is not used*/ - - FSMC_NORSRAMTimingInitTypeDef* FSMC_WriteTimingStruct; /*!< Timing Parameters for write access if the ExtendedMode is used*/ -}FSMC_NORSRAMInitTypeDef; - -/** - * @brief Timing parameters For FSMC NAND and PCCARD Banks - */ - -typedef struct -{ - uint32_t FSMC_SetupTime; /*!< Defines the number of HCLK cycles to setup address before - the command assertion for NAND-Flash read or write access - to common/Attribute or I/O memory space (depending on - the memory space timing to be configured). - This parameter can be a value between 0 and 0xFF.*/ - - uint32_t FSMC_WaitSetupTime; /*!< Defines the minimum number of HCLK cycles to assert the - command for NAND-Flash read or write access to - common/Attribute or I/O memory space (depending on the - memory space timing to be configured). - This parameter can be a number between 0x00 and 0xFF */ - - uint32_t FSMC_HoldSetupTime; /*!< Defines the number of HCLK clock cycles to hold address - (and data for write access) after the command deassertion - for NAND-Flash read or write access to common/Attribute - or I/O memory space (depending on the memory space timing - to be configured). - This parameter can be a number between 0x00 and 0xFF */ - - uint32_t FSMC_HiZSetupTime; /*!< Defines the number of HCLK clock cycles during which the - databus is kept in HiZ after the start of a NAND-Flash - write access to common/Attribute or I/O memory space (depending - on the memory space timing to be configured). - This parameter can be a number between 0x00 and 0xFF */ -}FSMC_NAND_PCCARDTimingInitTypeDef; - -/** - * @brief FSMC NAND Init structure definition - */ - -typedef struct -{ - uint32_t FSMC_Bank; /*!< Specifies the NAND memory bank that will be used. - This parameter can be a value of @ref FSMC_NAND_Bank */ - - uint32_t FSMC_Waitfeature; /*!< Enables or disables the Wait feature for the NAND Memory Bank. - This parameter can be any value of @ref FSMC_Wait_feature */ - - uint32_t FSMC_MemoryDataWidth; /*!< Specifies the external memory device width. - This parameter can be any value of @ref FSMC_Data_Width */ - - uint32_t FSMC_ECC; /*!< Enables or disables the ECC computation. - This parameter can be any value of @ref FSMC_ECC */ - - uint32_t FSMC_ECCPageSize; /*!< Defines the page size for the extended ECC. - This parameter can be any value of @ref FSMC_ECC_Page_Size */ - - uint32_t FSMC_TCLRSetupTime; /*!< Defines the number of HCLK cycles to configure the - delay between CLE low and RE low. - This parameter can be a value between 0 and 0xFF. */ - - uint32_t FSMC_TARSetupTime; /*!< Defines the number of HCLK cycles to configure the - delay between ALE low and RE low. - This parameter can be a number between 0x0 and 0xFF */ - - FSMC_NAND_PCCARDTimingInitTypeDef* FSMC_CommonSpaceTimingStruct; /*!< FSMC Common Space Timing */ - - FSMC_NAND_PCCARDTimingInitTypeDef* FSMC_AttributeSpaceTimingStruct; /*!< FSMC Attribute Space Timing */ -}FSMC_NANDInitTypeDef; - -/** - * @brief FSMC PCCARD Init structure definition - */ - -typedef struct -{ - uint32_t FSMC_Waitfeature; /*!< Enables or disables the Wait feature for the Memory Bank. - This parameter can be any value of @ref FSMC_Wait_feature */ - - uint32_t FSMC_TCLRSetupTime; /*!< Defines the number of HCLK cycles to configure the - delay between CLE low and RE low. - This parameter can be a value between 0 and 0xFF. */ - - uint32_t FSMC_TARSetupTime; /*!< Defines the number of HCLK cycles to configure the - delay between ALE low and RE low. - This parameter can be a number between 0x0 and 0xFF */ - - - FSMC_NAND_PCCARDTimingInitTypeDef* FSMC_CommonSpaceTimingStruct; /*!< FSMC Common Space Timing */ - - FSMC_NAND_PCCARDTimingInitTypeDef* FSMC_AttributeSpaceTimingStruct; /*!< FSMC Attribute Space Timing */ - - FSMC_NAND_PCCARDTimingInitTypeDef* FSMC_IOSpaceTimingStruct; /*!< FSMC IO Space Timing */ -}FSMC_PCCARDInitTypeDef; - -/** - * @} - */ - -/** @defgroup FSMC_Exported_Constants - * @{ - */ - -/** @defgroup FSMC_NORSRAM_Bank - * @{ - */ -#define FSMC_Bank1_NORSRAM1 ((uint32_t)0x00000000) -#define FSMC_Bank1_NORSRAM2 ((uint32_t)0x00000002) -#define FSMC_Bank1_NORSRAM3 ((uint32_t)0x00000004) -#define FSMC_Bank1_NORSRAM4 ((uint32_t)0x00000006) -/** - * @} - */ - -/** @defgroup FSMC_NAND_Bank - * @{ - */ -#define FSMC_Bank2_NAND ((uint32_t)0x00000010) -#define FSMC_Bank3_NAND ((uint32_t)0x00000100) -/** - * @} - */ - -/** @defgroup FSMC_PCCARD_Bank - * @{ - */ -#define FSMC_Bank4_PCCARD ((uint32_t)0x00001000) -/** - * @} - */ - -#define IS_FSMC_NORSRAM_BANK(BANK) (((BANK) == FSMC_Bank1_NORSRAM1) || \ - ((BANK) == FSMC_Bank1_NORSRAM2) || \ - ((BANK) == FSMC_Bank1_NORSRAM3) || \ - ((BANK) == FSMC_Bank1_NORSRAM4)) - -#define IS_FSMC_NAND_BANK(BANK) (((BANK) == FSMC_Bank2_NAND) || \ - ((BANK) == FSMC_Bank3_NAND)) - -#define IS_FSMC_GETFLAG_BANK(BANK) (((BANK) == FSMC_Bank2_NAND) || \ - ((BANK) == FSMC_Bank3_NAND) || \ - ((BANK) == FSMC_Bank4_PCCARD)) - -#define IS_FSMC_IT_BANK(BANK) (((BANK) == FSMC_Bank2_NAND) || \ - ((BANK) == FSMC_Bank3_NAND) || \ - ((BANK) == FSMC_Bank4_PCCARD)) - -/** @defgroup NOR_SRAM_Controller - * @{ - */ - -/** @defgroup FSMC_Data_Address_Bus_Multiplexing - * @{ - */ - -#define FSMC_DataAddressMux_Disable ((uint32_t)0x00000000) -#define FSMC_DataAddressMux_Enable ((uint32_t)0x00000002) -#define IS_FSMC_MUX(MUX) (((MUX) == FSMC_DataAddressMux_Disable) || \ - ((MUX) == FSMC_DataAddressMux_Enable)) - -/** - * @} - */ - -/** @defgroup FSMC_Memory_Type - * @{ - */ - -#define FSMC_MemoryType_SRAM ((uint32_t)0x00000000) -#define FSMC_MemoryType_PSRAM ((uint32_t)0x00000004) -#define FSMC_MemoryType_NOR ((uint32_t)0x00000008) -#define IS_FSMC_MEMORY(MEMORY) (((MEMORY) == FSMC_MemoryType_SRAM) || \ - ((MEMORY) == FSMC_MemoryType_PSRAM)|| \ - ((MEMORY) == FSMC_MemoryType_NOR)) - -/** - * @} - */ - -/** @defgroup FSMC_Data_Width - * @{ - */ - -#define FSMC_MemoryDataWidth_8b ((uint32_t)0x00000000) -#define FSMC_MemoryDataWidth_16b ((uint32_t)0x00000010) -#define IS_FSMC_MEMORY_WIDTH(WIDTH) (((WIDTH) == FSMC_MemoryDataWidth_8b) || \ - ((WIDTH) == FSMC_MemoryDataWidth_16b)) - -/** - * @} - */ - -/** @defgroup FSMC_Burst_Access_Mode - * @{ - */ - -#define FSMC_BurstAccessMode_Disable ((uint32_t)0x00000000) -#define FSMC_BurstAccessMode_Enable ((uint32_t)0x00000100) -#define IS_FSMC_BURSTMODE(STATE) (((STATE) == FSMC_BurstAccessMode_Disable) || \ - ((STATE) == FSMC_BurstAccessMode_Enable)) -/** - * @} - */ - -/** @defgroup FSMC_Wait_Signal_Polarity - * @{ - */ - -#define FSMC_WaitSignalPolarity_Low ((uint32_t)0x00000000) -#define FSMC_WaitSignalPolarity_High ((uint32_t)0x00000200) -#define IS_FSMC_WAIT_POLARITY(POLARITY) (((POLARITY) == FSMC_WaitSignalPolarity_Low) || \ - ((POLARITY) == FSMC_WaitSignalPolarity_High)) - -/** - * @} - */ - -/** @defgroup FSMC_Wrap_Mode - * @{ - */ - -#define FSMC_WrapMode_Disable ((uint32_t)0x00000000) -#define FSMC_WrapMode_Enable ((uint32_t)0x00000400) -#define IS_FSMC_WRAP_MODE(MODE) (((MODE) == FSMC_WrapMode_Disable) || \ - ((MODE) == FSMC_WrapMode_Enable)) - -/** - * @} - */ - -/** @defgroup FSMC_Wait_Timing - * @{ - */ - -#define FSMC_WaitSignalActive_BeforeWaitState ((uint32_t)0x00000000) -#define FSMC_WaitSignalActive_DuringWaitState ((uint32_t)0x00000800) -#define IS_FSMC_WAIT_SIGNAL_ACTIVE(ACTIVE) (((ACTIVE) == FSMC_WaitSignalActive_BeforeWaitState) || \ - ((ACTIVE) == FSMC_WaitSignalActive_DuringWaitState)) - -/** - * @} - */ - -/** @defgroup FSMC_Write_Operation - * @{ - */ - -#define FSMC_WriteOperation_Disable ((uint32_t)0x00000000) -#define FSMC_WriteOperation_Enable ((uint32_t)0x00001000) -#define IS_FSMC_WRITE_OPERATION(OPERATION) (((OPERATION) == FSMC_WriteOperation_Disable) || \ - ((OPERATION) == FSMC_WriteOperation_Enable)) - -/** - * @} - */ - -/** @defgroup FSMC_Wait_Signal - * @{ - */ - -#define FSMC_WaitSignal_Disable ((uint32_t)0x00000000) -#define FSMC_WaitSignal_Enable ((uint32_t)0x00002000) -#define IS_FSMC_WAITE_SIGNAL(SIGNAL) (((SIGNAL) == FSMC_WaitSignal_Disable) || \ - ((SIGNAL) == FSMC_WaitSignal_Enable)) -/** - * @} - */ - -/** @defgroup FSMC_Extended_Mode - * @{ - */ - -#define FSMC_ExtendedMode_Disable ((uint32_t)0x00000000) -#define FSMC_ExtendedMode_Enable ((uint32_t)0x00004000) - -#define IS_FSMC_EXTENDED_MODE(MODE) (((MODE) == FSMC_ExtendedMode_Disable) || \ - ((MODE) == FSMC_ExtendedMode_Enable)) - -/** - * @} - */ - -/** @defgroup FSMC_Write_Burst - * @{ - */ - -#define FSMC_WriteBurst_Disable ((uint32_t)0x00000000) -#define FSMC_WriteBurst_Enable ((uint32_t)0x00080000) -#define IS_FSMC_WRITE_BURST(BURST) (((BURST) == FSMC_WriteBurst_Disable) || \ - ((BURST) == FSMC_WriteBurst_Enable)) -/** - * @} - */ - -/** @defgroup FSMC_Address_Setup_Time - * @{ - */ - -#define IS_FSMC_ADDRESS_SETUP_TIME(TIME) ((TIME) <= 0xF) - -/** - * @} - */ - -/** @defgroup FSMC_Address_Hold_Time - * @{ - */ - -#define IS_FSMC_ADDRESS_HOLD_TIME(TIME) ((TIME) <= 0xF) - -/** - * @} - */ - -/** @defgroup FSMC_Data_Setup_Time - * @{ - */ - -#define IS_FSMC_DATASETUP_TIME(TIME) (((TIME) > 0) && ((TIME) <= 0xFF)) - -/** - * @} - */ - -/** @defgroup FSMC_Bus_Turn_around_Duration - * @{ - */ - -#define IS_FSMC_TURNAROUND_TIME(TIME) ((TIME) <= 0xF) - -/** - * @} - */ - -/** @defgroup FSMC_CLK_Division - * @{ - */ - -#define IS_FSMC_CLK_DIV(DIV) ((DIV) <= 0xF) - -/** - * @} - */ - -/** @defgroup FSMC_Data_Latency - * @{ - */ - -#define IS_FSMC_DATA_LATENCY(LATENCY) ((LATENCY) <= 0xF) - -/** - * @} - */ - -/** @defgroup FSMC_Access_Mode - * @{ - */ - -#define FSMC_AccessMode_A ((uint32_t)0x00000000) -#define FSMC_AccessMode_B ((uint32_t)0x10000000) -#define FSMC_AccessMode_C ((uint32_t)0x20000000) -#define FSMC_AccessMode_D ((uint32_t)0x30000000) -#define IS_FSMC_ACCESS_MODE(MODE) (((MODE) == FSMC_AccessMode_A) || \ - ((MODE) == FSMC_AccessMode_B) || \ - ((MODE) == FSMC_AccessMode_C) || \ - ((MODE) == FSMC_AccessMode_D)) - -/** - * @} - */ - -/** - * @} - */ - -/** @defgroup NAND_PCCARD_Controller - * @{ - */ - -/** @defgroup FSMC_Wait_feature - * @{ - */ - -#define FSMC_Waitfeature_Disable ((uint32_t)0x00000000) -#define FSMC_Waitfeature_Enable ((uint32_t)0x00000002) -#define IS_FSMC_WAIT_FEATURE(FEATURE) (((FEATURE) == FSMC_Waitfeature_Disable) || \ - ((FEATURE) == FSMC_Waitfeature_Enable)) - -/** - * @} - */ - - -/** @defgroup FSMC_ECC - * @{ - */ - -#define FSMC_ECC_Disable ((uint32_t)0x00000000) -#define FSMC_ECC_Enable ((uint32_t)0x00000040) -#define IS_FSMC_ECC_STATE(STATE) (((STATE) == FSMC_ECC_Disable) || \ - ((STATE) == FSMC_ECC_Enable)) - -/** - * @} - */ - -/** @defgroup FSMC_ECC_Page_Size - * @{ - */ - -#define FSMC_ECCPageSize_256Bytes ((uint32_t)0x00000000) -#define FSMC_ECCPageSize_512Bytes ((uint32_t)0x00020000) -#define FSMC_ECCPageSize_1024Bytes ((uint32_t)0x00040000) -#define FSMC_ECCPageSize_2048Bytes ((uint32_t)0x00060000) -#define FSMC_ECCPageSize_4096Bytes ((uint32_t)0x00080000) -#define FSMC_ECCPageSize_8192Bytes ((uint32_t)0x000A0000) -#define IS_FSMC_ECCPAGE_SIZE(SIZE) (((SIZE) == FSMC_ECCPageSize_256Bytes) || \ - ((SIZE) == FSMC_ECCPageSize_512Bytes) || \ - ((SIZE) == FSMC_ECCPageSize_1024Bytes) || \ - ((SIZE) == FSMC_ECCPageSize_2048Bytes) || \ - ((SIZE) == FSMC_ECCPageSize_4096Bytes) || \ - ((SIZE) == FSMC_ECCPageSize_8192Bytes)) - -/** - * @} - */ - -/** @defgroup FSMC_TCLR_Setup_Time - * @{ - */ - -#define IS_FSMC_TCLR_TIME(TIME) ((TIME) <= 0xFF) - -/** - * @} - */ - -/** @defgroup FSMC_TAR_Setup_Time - * @{ - */ - -#define IS_FSMC_TAR_TIME(TIME) ((TIME) <= 0xFF) - -/** - * @} - */ - -/** @defgroup FSMC_Setup_Time - * @{ - */ - -#define IS_FSMC_SETUP_TIME(TIME) ((TIME) <= 0xFF) - -/** - * @} - */ - -/** @defgroup FSMC_Wait_Setup_Time - * @{ - */ - -#define IS_FSMC_WAIT_TIME(TIME) ((TIME) <= 0xFF) - -/** - * @} - */ - -/** @defgroup FSMC_Hold_Setup_Time - * @{ - */ - -#define IS_FSMC_HOLD_TIME(TIME) ((TIME) <= 0xFF) - -/** - * @} - */ - -/** @defgroup FSMC_HiZ_Setup_Time - * @{ - */ - -#define IS_FSMC_HIZ_TIME(TIME) ((TIME) <= 0xFF) - -/** - * @} - */ - -/** @defgroup FSMC_Interrupt_sources - * @{ - */ - -#define FSMC_IT_RisingEdge ((uint32_t)0x00000008) -#define FSMC_IT_Level ((uint32_t)0x00000010) -#define FSMC_IT_FallingEdge ((uint32_t)0x00000020) -#define IS_FSMC_IT(IT) ((((IT) & (uint32_t)0xFFFFFFC7) == 0x00000000) && ((IT) != 0x00000000)) -#define IS_FSMC_GET_IT(IT) (((IT) == FSMC_IT_RisingEdge) || \ - ((IT) == FSMC_IT_Level) || \ - ((IT) == FSMC_IT_FallingEdge)) -/** - * @} - */ - -/** @defgroup FSMC_Flags - * @{ - */ - -#define FSMC_FLAG_RisingEdge ((uint32_t)0x00000001) -#define FSMC_FLAG_Level ((uint32_t)0x00000002) -#define FSMC_FLAG_FallingEdge ((uint32_t)0x00000004) -#define FSMC_FLAG_FEMPT ((uint32_t)0x00000040) -#define IS_FSMC_GET_FLAG(FLAG) (((FLAG) == FSMC_FLAG_RisingEdge) || \ - ((FLAG) == FSMC_FLAG_Level) || \ - ((FLAG) == FSMC_FLAG_FallingEdge) || \ - ((FLAG) == FSMC_FLAG_FEMPT)) - -#define IS_FSMC_CLEAR_FLAG(FLAG) ((((FLAG) & (uint32_t)0xFFFFFFF8) == 0x00000000) && ((FLAG) != 0x00000000)) - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/** @defgroup FSMC_Exported_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup FSMC_Exported_Functions - * @{ - */ - -void FSMC_NORSRAMDeInit(uint32_t FSMC_Bank); -void FSMC_NANDDeInit(uint32_t FSMC_Bank); -void FSMC_PCCARDDeInit(void); -void FSMC_NORSRAMInit(FSMC_NORSRAMInitTypeDef* FSMC_NORSRAMInitStruct); -void FSMC_NANDInit(FSMC_NANDInitTypeDef* FSMC_NANDInitStruct); -void FSMC_PCCARDInit(FSMC_PCCARDInitTypeDef* FSMC_PCCARDInitStruct); -void FSMC_NORSRAMStructInit(FSMC_NORSRAMInitTypeDef* FSMC_NORSRAMInitStruct); -void FSMC_NANDStructInit(FSMC_NANDInitTypeDef* FSMC_NANDInitStruct); -void FSMC_PCCARDStructInit(FSMC_PCCARDInitTypeDef* FSMC_PCCARDInitStruct); -void FSMC_NORSRAMCmd(uint32_t FSMC_Bank, FunctionalState NewState); -void FSMC_NANDCmd(uint32_t FSMC_Bank, FunctionalState NewState); -void FSMC_PCCARDCmd(FunctionalState NewState); -void FSMC_NANDECCCmd(uint32_t FSMC_Bank, FunctionalState NewState); -uint32_t FSMC_GetECC(uint32_t FSMC_Bank); -void FSMC_ITConfig(uint32_t FSMC_Bank, uint32_t FSMC_IT, FunctionalState NewState); -FlagStatus FSMC_GetFlagStatus(uint32_t FSMC_Bank, uint32_t FSMC_FLAG); -void FSMC_ClearFlag(uint32_t FSMC_Bank, uint32_t FSMC_FLAG); -ITStatus FSMC_GetITStatus(uint32_t FSMC_Bank, uint32_t FSMC_IT); -void FSMC_ClearITPendingBit(uint32_t FSMC_Bank, uint32_t FSMC_IT); - -#ifdef __cplusplus -} -#endif - -#endif /*__STM32F10x_FSMC_H */ -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_gpio.h b/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_gpio.h deleted file mode 100644 index e1bbe2e375..0000000000 --- a/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_gpio.h +++ /dev/null @@ -1,369 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f10x_gpio.h - * @author MCD Application Team - * @version V3.2.0 - * @date 03/01/2010 - * @brief This file contains all the functions prototypes for the GPIO - * firmware library. - ****************************************************************************** - * @copy - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2010 STMicroelectronics

- */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F10x_GPIO_H -#define __STM32F10x_GPIO_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x.h" - -/** @addtogroup STM32F10x_StdPeriph_Driver - * @{ - */ - -/** @addtogroup GPIO - * @{ - */ - -/** @defgroup GPIO_Exported_Types - * @{ - */ - -#define IS_GPIO_ALL_PERIPH(PERIPH) (((PERIPH) == GPIOA) || \ - ((PERIPH) == GPIOB) || \ - ((PERIPH) == GPIOC) || \ - ((PERIPH) == GPIOD) || \ - ((PERIPH) == GPIOE) || \ - ((PERIPH) == GPIOF) || \ - ((PERIPH) == GPIOG)) - -/** - * @brief Output Maximum frequency selection - */ - -typedef enum -{ - GPIO_Speed_10MHz = 1, - GPIO_Speed_2MHz, - GPIO_Speed_50MHz -}GPIOSpeed_TypeDef; -#define IS_GPIO_SPEED(SPEED) (((SPEED) == GPIO_Speed_10MHz) || ((SPEED) == GPIO_Speed_2MHz) || \ - ((SPEED) == GPIO_Speed_50MHz)) - -/** - * @brief Configuration Mode enumeration - */ - -typedef enum -{ GPIO_Mode_AIN = 0x0, - GPIO_Mode_IN_FLOATING = 0x04, - GPIO_Mode_IPD = 0x28, - GPIO_Mode_IPU = 0x48, - GPIO_Mode_Out_OD = 0x14, - GPIO_Mode_Out_PP = 0x10, - GPIO_Mode_AF_OD = 0x1C, - GPIO_Mode_AF_PP = 0x18 -}GPIOMode_TypeDef; - -#define IS_GPIO_MODE(MODE) (((MODE) == GPIO_Mode_AIN) || ((MODE) == GPIO_Mode_IN_FLOATING) || \ - ((MODE) == GPIO_Mode_IPD) || ((MODE) == GPIO_Mode_IPU) || \ - ((MODE) == GPIO_Mode_Out_OD) || ((MODE) == GPIO_Mode_Out_PP) || \ - ((MODE) == GPIO_Mode_AF_OD) || ((MODE) == GPIO_Mode_AF_PP)) - -/** - * @brief GPIO Init structure definition - */ - -typedef struct -{ - uint16_t GPIO_Pin; /*!< Specifies the GPIO pins to be configured. - This parameter can be any value of @ref GPIO_pins_define */ - - GPIOSpeed_TypeDef GPIO_Speed; /*!< Specifies the speed for the selected pins. - This parameter can be a value of @ref GPIOSpeed_TypeDef */ - - GPIOMode_TypeDef GPIO_Mode; /*!< Specifies the operating mode for the selected pins. - This parameter can be a value of @ref GPIOMode_TypeDef */ -}GPIO_InitTypeDef; - - -/** - * @brief Bit_SET and Bit_RESET enumeration - */ - -typedef enum -{ Bit_RESET = 0, - Bit_SET -}BitAction; - -#define IS_GPIO_BIT_ACTION(ACTION) (((ACTION) == Bit_RESET) || ((ACTION) == Bit_SET)) - -/** - * @} - */ - -/** @defgroup GPIO_Exported_Constants - * @{ - */ - -/** @defgroup GPIO_pins_define - * @{ - */ - -#define GPIO_Pin_0 ((uint16_t)0x0001) /*!< Pin 0 selected */ -#define GPIO_Pin_1 ((uint16_t)0x0002) /*!< Pin 1 selected */ -#define GPIO_Pin_2 ((uint16_t)0x0004) /*!< Pin 2 selected */ -#define GPIO_Pin_3 ((uint16_t)0x0008) /*!< Pin 3 selected */ -#define GPIO_Pin_4 ((uint16_t)0x0010) /*!< Pin 4 selected */ -#define GPIO_Pin_5 ((uint16_t)0x0020) /*!< Pin 5 selected */ -#define GPIO_Pin_6 ((uint16_t)0x0040) /*!< Pin 6 selected */ -#define GPIO_Pin_7 ((uint16_t)0x0080) /*!< Pin 7 selected */ -#define GPIO_Pin_8 ((uint16_t)0x0100) /*!< Pin 8 selected */ -#define GPIO_Pin_9 ((uint16_t)0x0200) /*!< Pin 9 selected */ -#define GPIO_Pin_10 ((uint16_t)0x0400) /*!< Pin 10 selected */ -#define GPIO_Pin_11 ((uint16_t)0x0800) /*!< Pin 11 selected */ -#define GPIO_Pin_12 ((uint16_t)0x1000) /*!< Pin 12 selected */ -#define GPIO_Pin_13 ((uint16_t)0x2000) /*!< Pin 13 selected */ -#define GPIO_Pin_14 ((uint16_t)0x4000) /*!< Pin 14 selected */ -#define GPIO_Pin_15 ((uint16_t)0x8000) /*!< Pin 15 selected */ -#define GPIO_Pin_All ((uint16_t)0xFFFF) /*!< All pins selected */ - -#define IS_GPIO_PIN(PIN) ((((PIN) & (uint16_t)0x00) == 0x00) && ((PIN) != (uint16_t)0x00)) - -#define IS_GET_GPIO_PIN(PIN) (((PIN) == GPIO_Pin_0) || \ - ((PIN) == GPIO_Pin_1) || \ - ((PIN) == GPIO_Pin_2) || \ - ((PIN) == GPIO_Pin_3) || \ - ((PIN) == GPIO_Pin_4) || \ - ((PIN) == GPIO_Pin_5) || \ - ((PIN) == GPIO_Pin_6) || \ - ((PIN) == GPIO_Pin_7) || \ - ((PIN) == GPIO_Pin_8) || \ - ((PIN) == GPIO_Pin_9) || \ - ((PIN) == GPIO_Pin_10) || \ - ((PIN) == GPIO_Pin_11) || \ - ((PIN) == GPIO_Pin_12) || \ - ((PIN) == GPIO_Pin_13) || \ - ((PIN) == GPIO_Pin_14) || \ - ((PIN) == GPIO_Pin_15)) - -/** - * @} - */ - -/** @defgroup GPIO_Remap_define - * @{ - */ - -#define GPIO_Remap_SPI1 ((uint32_t)0x00000001) /*!< SPI1 Alternate Function mapping */ -#define GPIO_Remap_I2C1 ((uint32_t)0x00000002) /*!< I2C1 Alternate Function mapping */ -#define GPIO_Remap_USART1 ((uint32_t)0x00000004) /*!< USART1 Alternate Function mapping */ -#define GPIO_Remap_USART2 ((uint32_t)0x00000008) /*!< USART2 Alternate Function mapping */ -#define GPIO_PartialRemap_USART3 ((uint32_t)0x00140010) /*!< USART3 Partial Alternate Function mapping */ -#define GPIO_FullRemap_USART3 ((uint32_t)0x00140030) /*!< USART3 Full Alternate Function mapping */ -#define GPIO_PartialRemap_TIM1 ((uint32_t)0x00160040) /*!< TIM1 Partial Alternate Function mapping */ -#define GPIO_FullRemap_TIM1 ((uint32_t)0x001600C0) /*!< TIM1 Full Alternate Function mapping */ -#define GPIO_PartialRemap1_TIM2 ((uint32_t)0x00180100) /*!< TIM2 Partial1 Alternate Function mapping */ -#define GPIO_PartialRemap2_TIM2 ((uint32_t)0x00180200) /*!< TIM2 Partial2 Alternate Function mapping */ -#define GPIO_FullRemap_TIM2 ((uint32_t)0x00180300) /*!< TIM2 Full Alternate Function mapping */ -#define GPIO_PartialRemap_TIM3 ((uint32_t)0x001A0800) /*!< TIM3 Partial Alternate Function mapping */ -#define GPIO_FullRemap_TIM3 ((uint32_t)0x001A0C00) /*!< TIM3 Full Alternate Function mapping */ -#define GPIO_Remap_TIM4 ((uint32_t)0x00001000) /*!< TIM4 Alternate Function mapping */ -#define GPIO_Remap1_CAN1 ((uint32_t)0x001D4000) /*!< CAN1 Alternate Function mapping */ -#define GPIO_Remap2_CAN1 ((uint32_t)0x001D6000) /*!< CAN1 Alternate Function mapping */ -#define GPIO_Remap_PD01 ((uint32_t)0x00008000) /*!< PD01 Alternate Function mapping */ -#define GPIO_Remap_TIM5CH4_LSI ((uint32_t)0x00200001) /*!< LSI connected to TIM5 Channel4 input capture for calibration */ -#define GPIO_Remap_ADC1_ETRGINJ ((uint32_t)0x00200002) /*!< ADC1 External Trigger Injected Conversion remapping */ -#define GPIO_Remap_ADC1_ETRGREG ((uint32_t)0x00200004) /*!< ADC1 External Trigger Regular Conversion remapping */ -#define GPIO_Remap_ADC2_ETRGINJ ((uint32_t)0x00200008) /*!< ADC2 External Trigger Injected Conversion remapping */ -#define GPIO_Remap_ADC2_ETRGREG ((uint32_t)0x00200010) /*!< ADC2 External Trigger Regular Conversion remapping */ -#define GPIO_Remap_ETH ((uint32_t)0x00200020) /*!< Ethernet remapping (only for Connectivity line devices) */ -#define GPIO_Remap_CAN2 ((uint32_t)0x00200040) /*!< CAN2 remapping (only for Connectivity line devices) */ -#define GPIO_Remap_SWJ_NoJTRST ((uint32_t)0x00300100) /*!< Full SWJ Enabled (JTAG-DP + SW-DP) but without JTRST */ -#define GPIO_Remap_SWJ_JTAGDisable ((uint32_t)0x00300200) /*!< JTAG-DP Disabled and SW-DP Enabled */ -#define GPIO_Remap_SWJ_Disable ((uint32_t)0x00300400) /*!< Full SWJ Disabled (JTAG-DP + SW-DP) */ -#define GPIO_Remap_SPI3 ((uint32_t)0x00201000) /*!< SPI3/I2S3 Alternate Function mapping (only for Connectivity line devices) */ -#define GPIO_Remap_TIM2ITR1_PTP_SOF ((uint32_t)0x00202000) /*!< Ethernet PTP output or USB OTG SOF (Start of Frame) connected - to TIM2 Internal Trigger 1 for calibration - (only for Connectivity line devices) */ -#define GPIO_Remap_PTP_PPS ((uint32_t)0x00204000) /*!< Ethernet MAC PPS_PTS output on PB05 (only for Connectivity line devices) */ - -#define GPIO_Remap_TIM15 ((uint32_t)0x80000001) /*!< TIM15 Alternate Function mapping (only for Value line devices) */ -#define GPIO_Remap_TIM16 ((uint32_t)0x80000002) /*!< TIM16 Alternate Function mapping (only for Value line devices) */ -#define GPIO_Remap_TIM17 ((uint32_t)0x80000004) /*!< TIM17 Alternate Function mapping (only for Value line devices) */ -#define GPIO_Remap_CEC ((uint32_t)0x80000008) /*!< CEC Alternate Function mapping (only for Value line devices) */ -#define GPIO_Remap_TIM1_DMA ((uint32_t)0x80000010) /*!< TIM1 DMA requests mapping (only for Value line devices) */ - - -#define IS_GPIO_REMAP(REMAP) (((REMAP) == GPIO_Remap_SPI1) || ((REMAP) == GPIO_Remap_I2C1) || \ - ((REMAP) == GPIO_Remap_USART1) || ((REMAP) == GPIO_Remap_USART2) || \ - ((REMAP) == GPIO_PartialRemap_USART3) || ((REMAP) == GPIO_FullRemap_USART3) || \ - ((REMAP) == GPIO_PartialRemap_TIM1) || ((REMAP) == GPIO_FullRemap_TIM1) || \ - ((REMAP) == GPIO_PartialRemap1_TIM2) || ((REMAP) == GPIO_PartialRemap2_TIM2) || \ - ((REMAP) == GPIO_FullRemap_TIM2) || ((REMAP) == GPIO_PartialRemap_TIM3) || \ - ((REMAP) == GPIO_FullRemap_TIM3) || ((REMAP) == GPIO_Remap_TIM4) || \ - ((REMAP) == GPIO_Remap1_CAN1) || ((REMAP) == GPIO_Remap2_CAN1) || \ - ((REMAP) == GPIO_Remap_PD01) || ((REMAP) == GPIO_Remap_TIM5CH4_LSI) || \ - ((REMAP) == GPIO_Remap_ADC1_ETRGINJ) ||((REMAP) == GPIO_Remap_ADC1_ETRGREG) || \ - ((REMAP) == GPIO_Remap_ADC2_ETRGINJ) ||((REMAP) == GPIO_Remap_ADC2_ETRGREG) || \ - ((REMAP) == GPIO_Remap_ETH) ||((REMAP) == GPIO_Remap_CAN2) || \ - ((REMAP) == GPIO_Remap_SWJ_NoJTRST) || ((REMAP) == GPIO_Remap_SWJ_JTAGDisable) || \ - ((REMAP) == GPIO_Remap_SWJ_Disable)|| ((REMAP) == GPIO_Remap_SPI3) || \ - ((REMAP) == GPIO_Remap_TIM2ITR1_PTP_SOF) || ((REMAP) == GPIO_Remap_PTP_PPS) || \ - ((REMAP) == GPIO_Remap_TIM15) || ((REMAP) == GPIO_Remap_TIM16) || \ - ((REMAP) == GPIO_Remap_TIM17) || ((REMAP) == GPIO_Remap_CEC) || \ - ((REMAP) == GPIO_Remap_TIM1_DMA)) - -/** - * @} - */ - -/** @defgroup GPIO_Port_Sources - * @{ - */ - -#define GPIO_PortSourceGPIOA ((uint8_t)0x00) -#define GPIO_PortSourceGPIOB ((uint8_t)0x01) -#define GPIO_PortSourceGPIOC ((uint8_t)0x02) -#define GPIO_PortSourceGPIOD ((uint8_t)0x03) -#define GPIO_PortSourceGPIOE ((uint8_t)0x04) -#define GPIO_PortSourceGPIOF ((uint8_t)0x05) -#define GPIO_PortSourceGPIOG ((uint8_t)0x06) -#define IS_GPIO_EVENTOUT_PORT_SOURCE(PORTSOURCE) (((PORTSOURCE) == GPIO_PortSourceGPIOA) || \ - ((PORTSOURCE) == GPIO_PortSourceGPIOB) || \ - ((PORTSOURCE) == GPIO_PortSourceGPIOC) || \ - ((PORTSOURCE) == GPIO_PortSourceGPIOD) || \ - ((PORTSOURCE) == GPIO_PortSourceGPIOE)) - -#define IS_GPIO_EXTI_PORT_SOURCE(PORTSOURCE) (((PORTSOURCE) == GPIO_PortSourceGPIOA) || \ - ((PORTSOURCE) == GPIO_PortSourceGPIOB) || \ - ((PORTSOURCE) == GPIO_PortSourceGPIOC) || \ - ((PORTSOURCE) == GPIO_PortSourceGPIOD) || \ - ((PORTSOURCE) == GPIO_PortSourceGPIOE) || \ - ((PORTSOURCE) == GPIO_PortSourceGPIOF) || \ - ((PORTSOURCE) == GPIO_PortSourceGPIOG)) - -/** - * @} - */ - -/** @defgroup GPIO_Pin_sources - * @{ - */ - -#define GPIO_PinSource0 ((uint8_t)0x00) -#define GPIO_PinSource1 ((uint8_t)0x01) -#define GPIO_PinSource2 ((uint8_t)0x02) -#define GPIO_PinSource3 ((uint8_t)0x03) -#define GPIO_PinSource4 ((uint8_t)0x04) -#define GPIO_PinSource5 ((uint8_t)0x05) -#define GPIO_PinSource6 ((uint8_t)0x06) -#define GPIO_PinSource7 ((uint8_t)0x07) -#define GPIO_PinSource8 ((uint8_t)0x08) -#define GPIO_PinSource9 ((uint8_t)0x09) -#define GPIO_PinSource10 ((uint8_t)0x0A) -#define GPIO_PinSource11 ((uint8_t)0x0B) -#define GPIO_PinSource12 ((uint8_t)0x0C) -#define GPIO_PinSource13 ((uint8_t)0x0D) -#define GPIO_PinSource14 ((uint8_t)0x0E) -#define GPIO_PinSource15 ((uint8_t)0x0F) - -#define IS_GPIO_PIN_SOURCE(PINSOURCE) (((PINSOURCE) == GPIO_PinSource0) || \ - ((PINSOURCE) == GPIO_PinSource1) || \ - ((PINSOURCE) == GPIO_PinSource2) || \ - ((PINSOURCE) == GPIO_PinSource3) || \ - ((PINSOURCE) == GPIO_PinSource4) || \ - ((PINSOURCE) == GPIO_PinSource5) || \ - ((PINSOURCE) == GPIO_PinSource6) || \ - ((PINSOURCE) == GPIO_PinSource7) || \ - ((PINSOURCE) == GPIO_PinSource8) || \ - ((PINSOURCE) == GPIO_PinSource9) || \ - ((PINSOURCE) == GPIO_PinSource10) || \ - ((PINSOURCE) == GPIO_PinSource11) || \ - ((PINSOURCE) == GPIO_PinSource12) || \ - ((PINSOURCE) == GPIO_PinSource13) || \ - ((PINSOURCE) == GPIO_PinSource14) || \ - ((PINSOURCE) == GPIO_PinSource15)) - -/** - * @} - */ - -/** @defgroup Ethernet_Media_Interface - * @{ - */ -#define GPIO_ETH_MediaInterface_MII ((u32)0x00000000) -#define GPIO_ETH_MediaInterface_RMII ((u32)0x00000001) - -#define IS_GPIO_ETH_MEDIA_INTERFACE(INTERFACE) (((INTERFACE) == GPIO_ETH_MediaInterface_MII) || \ - ((INTERFACE) == GPIO_ETH_MediaInterface_RMII)) - -/** - * @} - */ -/** - * @} - */ - -/** @defgroup GPIO_Exported_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup GPIO_Exported_Functions - * @{ - */ - -void GPIO_DeInit(GPIO_TypeDef* GPIOx); -void GPIO_AFIODeInit(void); -void GPIO_Init(GPIO_TypeDef* GPIOx, GPIO_InitTypeDef* GPIO_InitStruct); -void GPIO_StructInit(GPIO_InitTypeDef* GPIO_InitStruct); -uint8_t GPIO_ReadInputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin); -uint16_t GPIO_ReadInputData(GPIO_TypeDef* GPIOx); -uint8_t GPIO_ReadOutputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin); -uint16_t GPIO_ReadOutputData(GPIO_TypeDef* GPIOx); -void GPIO_SetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin); -void GPIO_ResetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin); -void GPIO_WriteBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, BitAction BitVal); -void GPIO_Write(GPIO_TypeDef* GPIOx, uint16_t PortVal); -void GPIO_PinLockConfig(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin); -void GPIO_EventOutputConfig(uint8_t GPIO_PortSource, uint8_t GPIO_PinSource); -void GPIO_EventOutputCmd(FunctionalState NewState); -void GPIO_PinRemapConfig(uint32_t GPIO_Remap, FunctionalState NewState); -void GPIO_EXTILineConfig(uint8_t GPIO_PortSource, uint8_t GPIO_PinSource); -void GPIO_ETH_MediaInterfaceConfig(uint32_t GPIO_ETH_MediaInterface); - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32F10x_GPIO_H */ -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_i2c.h b/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_i2c.h deleted file mode 100644 index f58754cc5e..0000000000 --- a/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_i2c.h +++ /dev/null @@ -1,472 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f10x_i2c.h - * @author MCD Application Team - * @version V3.2.0 - * @date 03/01/2010 - * @brief This file contains all the functions prototypes for the I2C firmware - * library. - ****************************************************************************** - * @copy - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2010 STMicroelectronics

- */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F10x_I2C_H -#define __STM32F10x_I2C_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x.h" - -/** @addtogroup STM32F10x_StdPeriph_Driver - * @{ - */ - -/** @addtogroup I2C - * @{ - */ - -/** @defgroup I2C_Exported_Types - * @{ - */ - -/** - * @brief I2C Init structure definition - */ - -typedef struct -{ - uint32_t I2C_ClockSpeed; /*!< Specifies the clock frequency. - This parameter must be set to a value lower than 400kHz */ - - uint16_t I2C_Mode; /*!< Specifies the I2C mode. - This parameter can be a value of @ref I2C_mode */ - - uint16_t I2C_DutyCycle; /*!< Specifies the I2C fast mode duty cycle. - This parameter can be a value of @ref I2C_duty_cycle_in_fast_mode */ - - uint16_t I2C_OwnAddress1; /*!< Specifies the first device own address. - This parameter can be a 7-bit or 10-bit address. */ - - uint16_t I2C_Ack; /*!< Enables or disables the acknowledgement. - This parameter can be a value of @ref I2C_acknowledgement */ - - uint16_t I2C_AcknowledgedAddress; /*!< Specifies if 7-bit or 10-bit address is acknowledged. - This parameter can be a value of @ref I2C_acknowledged_address */ -}I2C_InitTypeDef; - -/** - * @} - */ - - -/** @defgroup I2C_Exported_Constants - * @{ - */ - -#define IS_I2C_ALL_PERIPH(PERIPH) (((PERIPH) == I2C1) || \ - ((PERIPH) == I2C2)) -/** @defgroup I2C_mode - * @{ - */ - -#define I2C_Mode_I2C ((uint16_t)0x0000) -#define I2C_Mode_SMBusDevice ((uint16_t)0x0002) -#define I2C_Mode_SMBusHost ((uint16_t)0x000A) -#define IS_I2C_MODE(MODE) (((MODE) == I2C_Mode_I2C) || \ - ((MODE) == I2C_Mode_SMBusDevice) || \ - ((MODE) == I2C_Mode_SMBusHost)) -/** - * @} - */ - -/** @defgroup I2C_duty_cycle_in_fast_mode - * @{ - */ - -#define I2C_DutyCycle_16_9 ((uint16_t)0x4000) /*!< I2C fast mode Tlow/Thigh = 16/9 */ -#define I2C_DutyCycle_2 ((uint16_t)0xBFFF) /*!< I2C fast mode Tlow/Thigh = 2 */ -#define IS_I2C_DUTY_CYCLE(CYCLE) (((CYCLE) == I2C_DutyCycle_16_9) || \ - ((CYCLE) == I2C_DutyCycle_2)) -/** - * @} - */ - -/** @defgroup I2C_acknowledgement - * @{ - */ - -#define I2C_Ack_Enable ((uint16_t)0x0400) -#define I2C_Ack_Disable ((uint16_t)0x0000) -#define IS_I2C_ACK_STATE(STATE) (((STATE) == I2C_Ack_Enable) || \ - ((STATE) == I2C_Ack_Disable)) -/** - * @} - */ - -/** @defgroup I2C_transfer_direction - * @{ - */ - -#define I2C_Direction_Transmitter ((uint8_t)0x00) -#define I2C_Direction_Receiver ((uint8_t)0x01) -#define IS_I2C_DIRECTION(DIRECTION) (((DIRECTION) == I2C_Direction_Transmitter) || \ - ((DIRECTION) == I2C_Direction_Receiver)) -/** - * @} - */ - -/** @defgroup I2C_acknowledged_address - * @{ - */ - -#define I2C_AcknowledgedAddress_7bit ((uint16_t)0x4000) -#define I2C_AcknowledgedAddress_10bit ((uint16_t)0xC000) -#define IS_I2C_ACKNOWLEDGE_ADDRESS(ADDRESS) (((ADDRESS) == I2C_AcknowledgedAddress_7bit) || \ - ((ADDRESS) == I2C_AcknowledgedAddress_10bit)) -/** - * @} - */ - -/** @defgroup I2C_registers - * @{ - */ - -#define I2C_Register_CR1 ((uint8_t)0x00) -#define I2C_Register_CR2 ((uint8_t)0x04) -#define I2C_Register_OAR1 ((uint8_t)0x08) -#define I2C_Register_OAR2 ((uint8_t)0x0C) -#define I2C_Register_DR ((uint8_t)0x10) -#define I2C_Register_SR1 ((uint8_t)0x14) -#define I2C_Register_SR2 ((uint8_t)0x18) -#define I2C_Register_CCR ((uint8_t)0x1C) -#define I2C_Register_TRISE ((uint8_t)0x20) -#define IS_I2C_REGISTER(REGISTER) (((REGISTER) == I2C_Register_CR1) || \ - ((REGISTER) == I2C_Register_CR2) || \ - ((REGISTER) == I2C_Register_OAR1) || \ - ((REGISTER) == I2C_Register_OAR2) || \ - ((REGISTER) == I2C_Register_DR) || \ - ((REGISTER) == I2C_Register_SR1) || \ - ((REGISTER) == I2C_Register_SR2) || \ - ((REGISTER) == I2C_Register_CCR) || \ - ((REGISTER) == I2C_Register_TRISE)) -/** - * @} - */ - -/** @defgroup I2C_SMBus_alert_pin_level - * @{ - */ - -#define I2C_SMBusAlert_Low ((uint16_t)0x2000) -#define I2C_SMBusAlert_High ((uint16_t)0xDFFF) -#define IS_I2C_SMBUS_ALERT(ALERT) (((ALERT) == I2C_SMBusAlert_Low) || \ - ((ALERT) == I2C_SMBusAlert_High)) -/** - * @} - */ - -/** @defgroup I2C_PEC_position - * @{ - */ - -#define I2C_PECPosition_Next ((uint16_t)0x0800) -#define I2C_PECPosition_Current ((uint16_t)0xF7FF) -#define IS_I2C_PEC_POSITION(POSITION) (((POSITION) == I2C_PECPosition_Next) || \ - ((POSITION) == I2C_PECPosition_Current)) -/** - * @} - */ - -/** @defgroup I2C_interrupts_definition - * @{ - */ - -#define I2C_IT_BUF ((uint16_t)0x0400) -#define I2C_IT_EVT ((uint16_t)0x0200) -#define I2C_IT_ERR ((uint16_t)0x0100) -#define IS_I2C_CONFIG_IT(IT) ((((IT) & (uint16_t)0xF8FF) == 0x00) && ((IT) != 0x00)) -/** - * @} - */ - -/** @defgroup I2C_interrupts_definition - * @{ - */ - -#define I2C_IT_SMBALERT ((uint32_t)0x01008000) -#define I2C_IT_TIMEOUT ((uint32_t)0x01004000) -#define I2C_IT_PECERR ((uint32_t)0x01001000) -#define I2C_IT_OVR ((uint32_t)0x01000800) -#define I2C_IT_AF ((uint32_t)0x01000400) -#define I2C_IT_ARLO ((uint32_t)0x01000200) -#define I2C_IT_BERR ((uint32_t)0x01000100) -#define I2C_IT_TXE ((uint32_t)0x06000080) -#define I2C_IT_RXNE ((uint32_t)0x06000040) -#define I2C_IT_STOPF ((uint32_t)0x02000010) -#define I2C_IT_ADD10 ((uint32_t)0x02000008) -#define I2C_IT_BTF ((uint32_t)0x02000004) -#define I2C_IT_ADDR ((uint32_t)0x02000002) -#define I2C_IT_SB ((uint32_t)0x02000001) - -#define IS_I2C_CLEAR_IT(IT) ((((IT) & (uint16_t)0x20FF) == 0x00) && ((IT) != (uint16_t)0x00)) - -#define IS_I2C_GET_IT(IT) (((IT) == I2C_IT_SMBALERT) || ((IT) == I2C_IT_TIMEOUT) || \ - ((IT) == I2C_IT_PECERR) || ((IT) == I2C_IT_OVR) || \ - ((IT) == I2C_IT_AF) || ((IT) == I2C_IT_ARLO) || \ - ((IT) == I2C_IT_BERR) || ((IT) == I2C_IT_TXE) || \ - ((IT) == I2C_IT_RXNE) || ((IT) == I2C_IT_STOPF) || \ - ((IT) == I2C_IT_ADD10) || ((IT) == I2C_IT_BTF) || \ - ((IT) == I2C_IT_ADDR) || ((IT) == I2C_IT_SB)) -/** - * @} - */ - -/** @defgroup I2C_flags_definition - * @{ - */ - -/** - * @brief SR2 register flags - */ - -#define I2C_FLAG_DUALF ((uint32_t)0x00800000) -#define I2C_FLAG_SMBHOST ((uint32_t)0x00400000) -#define I2C_FLAG_SMBDEFAULT ((uint32_t)0x00200000) -#define I2C_FLAG_GENCALL ((uint32_t)0x00100000) -#define I2C_FLAG_TRA ((uint32_t)0x00040000) -#define I2C_FLAG_BUSY ((uint32_t)0x00020000) -#define I2C_FLAG_MSL ((uint32_t)0x00010000) - -/** - * @brief SR1 register flags - */ - -#define I2C_FLAG_SMBALERT ((uint32_t)0x10008000) -#define I2C_FLAG_TIMEOUT ((uint32_t)0x10004000) -#define I2C_FLAG_PECERR ((uint32_t)0x10001000) -#define I2C_FLAG_OVR ((uint32_t)0x10000800) -#define I2C_FLAG_AF ((uint32_t)0x10000400) -#define I2C_FLAG_ARLO ((uint32_t)0x10000200) -#define I2C_FLAG_BERR ((uint32_t)0x10000100) -#define I2C_FLAG_TXE ((uint32_t)0x10000080) -#define I2C_FLAG_RXNE ((uint32_t)0x10000040) -#define I2C_FLAG_STOPF ((uint32_t)0x10000010) -#define I2C_FLAG_ADD10 ((uint32_t)0x10000008) -#define I2C_FLAG_BTF ((uint32_t)0x10000004) -#define I2C_FLAG_ADDR ((uint32_t)0x10000002) -#define I2C_FLAG_SB ((uint32_t)0x10000001) - -#define IS_I2C_CLEAR_FLAG(FLAG) ((((FLAG) & (uint16_t)0x20FF) == 0x00) && ((FLAG) != (uint16_t)0x00)) - -#define IS_I2C_GET_FLAG(FLAG) (((FLAG) == I2C_FLAG_DUALF) || ((FLAG) == I2C_FLAG_SMBHOST) || \ - ((FLAG) == I2C_FLAG_SMBDEFAULT) || ((FLAG) == I2C_FLAG_GENCALL) || \ - ((FLAG) == I2C_FLAG_TRA) || ((FLAG) == I2C_FLAG_BUSY) || \ - ((FLAG) == I2C_FLAG_MSL) || ((FLAG) == I2C_FLAG_SMBALERT) || \ - ((FLAG) == I2C_FLAG_TIMEOUT) || ((FLAG) == I2C_FLAG_PECERR) || \ - ((FLAG) == I2C_FLAG_OVR) || ((FLAG) == I2C_FLAG_AF) || \ - ((FLAG) == I2C_FLAG_ARLO) || ((FLAG) == I2C_FLAG_BERR) || \ - ((FLAG) == I2C_FLAG_TXE) || ((FLAG) == I2C_FLAG_RXNE) || \ - ((FLAG) == I2C_FLAG_STOPF) || ((FLAG) == I2C_FLAG_ADD10) || \ - ((FLAG) == I2C_FLAG_BTF) || ((FLAG) == I2C_FLAG_ADDR) || \ - ((FLAG) == I2C_FLAG_SB)) -/** - * @} - */ - -/** @defgroup I2C_Events - * @{ - */ - -/** - * @brief EV1 - */ - -#define I2C_EVENT_SLAVE_TRANSMITTER_ADDRESS_MATCHED ((uint32_t)0x00060082) /* TRA, BUSY, TXE and ADDR flags */ -#define I2C_EVENT_SLAVE_RECEIVER_ADDRESS_MATCHED ((uint32_t)0x00020002) /* BUSY and ADDR flags */ -#define I2C_EVENT_SLAVE_TRANSMITTER_SECONDADDRESS_MATCHED ((uint32_t)0x00860080) /* DUALF, TRA, BUSY and TXE flags */ -#define I2C_EVENT_SLAVE_RECEIVER_SECONDADDRESS_MATCHED ((uint32_t)0x00820000) /* DUALF and BUSY flags */ -#define I2C_EVENT_SLAVE_GENERALCALLADDRESS_MATCHED ((uint32_t)0x00120000) /* GENCALL and BUSY flags */ - -/** - * @brief EV2 - */ - -#define I2C_EVENT_SLAVE_BYTE_RECEIVED ((uint32_t)0x00020040) /* BUSY and RXNE flags */ - -/** - * @brief EV3 - */ - -#define I2C_EVENT_SLAVE_BYTE_TRANSMITTED ((uint32_t)0x00060084) /* TRA, BUSY, TXE and BTF flags */ - -/** - * @brief EV4 - */ - -#define I2C_EVENT_SLAVE_STOP_DETECTED ((uint32_t)0x00000010) /* STOPF flag */ - -/** - * @brief EV5 - */ - -#define I2C_EVENT_MASTER_MODE_SELECT ((uint32_t)0x00030001) /* BUSY, MSL and SB flag */ - -/** - * @brief EV6 - */ - -#define I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED ((uint32_t)0x00070082) /* BUSY, MSL, ADDR, TXE and TRA flags */ -#define I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED ((uint32_t)0x00030002) /* BUSY, MSL and ADDR flags */ - -/** - * @brief EV7 - */ - -#define I2C_EVENT_MASTER_BYTE_RECEIVED ((uint32_t)0x00030040) /* BUSY, MSL and RXNE flags */ - -/** - * @brief EV8 - */ - -#define I2C_EVENT_MASTER_BYTE_TRANSMITTING ((uint32_t)0x00070080) /* TRA, BUSY, MSL, TXE flags */ - -/** - * @brief EV8_2 - */ - -#define I2C_EVENT_MASTER_BYTE_TRANSMITTED ((uint32_t)0x00070084) /* TRA, BUSY, MSL, TXE and BTF flags */ - -/** - * @brief EV9 - */ - -#define I2C_EVENT_MASTER_MODE_ADDRESS10 ((uint32_t)0x00030008) /* BUSY, MSL and ADD10 flags */ - -/** - * @brief EV3_2 - */ - -#define I2C_EVENT_SLAVE_ACK_FAILURE ((uint32_t)0x00000400) /* AF flag */ - -#define IS_I2C_EVENT(EVENT) (((EVENT) == I2C_EVENT_SLAVE_TRANSMITTER_ADDRESS_MATCHED) || \ - ((EVENT) == I2C_EVENT_SLAVE_RECEIVER_ADDRESS_MATCHED) || \ - ((EVENT) == I2C_EVENT_SLAVE_TRANSMITTER_SECONDADDRESS_MATCHED) || \ - ((EVENT) == I2C_EVENT_SLAVE_RECEIVER_SECONDADDRESS_MATCHED) || \ - ((EVENT) == I2C_EVENT_SLAVE_GENERALCALLADDRESS_MATCHED) || \ - ((EVENT) == I2C_EVENT_SLAVE_BYTE_RECEIVED) || \ - ((EVENT) == (I2C_EVENT_SLAVE_BYTE_RECEIVED | I2C_FLAG_DUALF)) || \ - ((EVENT) == (I2C_EVENT_SLAVE_BYTE_RECEIVED | I2C_FLAG_GENCALL)) || \ - ((EVENT) == I2C_EVENT_SLAVE_BYTE_TRANSMITTED) || \ - ((EVENT) == (I2C_EVENT_SLAVE_BYTE_TRANSMITTED | I2C_FLAG_DUALF)) || \ - ((EVENT) == (I2C_EVENT_SLAVE_BYTE_TRANSMITTED | I2C_FLAG_GENCALL)) || \ - ((EVENT) == I2C_EVENT_SLAVE_STOP_DETECTED) || \ - ((EVENT) == I2C_EVENT_MASTER_MODE_SELECT) || \ - ((EVENT) == I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED) || \ - ((EVENT) == I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED) || \ - ((EVENT) == I2C_EVENT_MASTER_BYTE_RECEIVED) || \ - ((EVENT) == I2C_EVENT_MASTER_BYTE_TRANSMITTED) || \ - ((EVENT) == I2C_EVENT_MASTER_BYTE_TRANSMITTING) || \ - ((EVENT) == I2C_EVENT_MASTER_MODE_ADDRESS10) || \ - ((EVENT) == I2C_EVENT_SLAVE_ACK_FAILURE)) -/** - * @} - */ - -/** @defgroup I2C_own_address1 - * @{ - */ - -#define IS_I2C_OWN_ADDRESS1(ADDRESS1) ((ADDRESS1) <= 0x3FF) -/** - * @} - */ - -/** @defgroup I2C_clock_speed - * @{ - */ - -#define IS_I2C_CLOCK_SPEED(SPEED) (((SPEED) >= 0x1) && ((SPEED) <= 400000)) -/** - * @} - */ - -/** - * @} - */ - -/** @defgroup I2C_Exported_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup I2C_Exported_Functions - * @{ - */ - -void I2C_DeInit(I2C_TypeDef* I2Cx); -void I2C_Init(I2C_TypeDef* I2Cx, I2C_InitTypeDef* I2C_InitStruct); -void I2C_StructInit(I2C_InitTypeDef* I2C_InitStruct); -void I2C_Cmd(I2C_TypeDef* I2Cx, FunctionalState NewState); -void I2C_DMACmd(I2C_TypeDef* I2Cx, FunctionalState NewState); -void I2C_DMALastTransferCmd(I2C_TypeDef* I2Cx, FunctionalState NewState); -void I2C_GenerateSTART(I2C_TypeDef* I2Cx, FunctionalState NewState); -void I2C_GenerateSTOP(I2C_TypeDef* I2Cx, FunctionalState NewState); -void I2C_AcknowledgeConfig(I2C_TypeDef* I2Cx, FunctionalState NewState); -void I2C_OwnAddress2Config(I2C_TypeDef* I2Cx, uint8_t Address); -void I2C_DualAddressCmd(I2C_TypeDef* I2Cx, FunctionalState NewState); -void I2C_GeneralCallCmd(I2C_TypeDef* I2Cx, FunctionalState NewState); -void I2C_ITConfig(I2C_TypeDef* I2Cx, uint16_t I2C_IT, FunctionalState NewState); -void I2C_SendData(I2C_TypeDef* I2Cx, uint8_t Data); -uint8_t I2C_ReceiveData(I2C_TypeDef* I2Cx); -void I2C_Send7bitAddress(I2C_TypeDef* I2Cx, uint8_t Address, uint8_t I2C_Direction); -uint16_t I2C_ReadRegister(I2C_TypeDef* I2Cx, uint8_t I2C_Register); -void I2C_SoftwareResetCmd(I2C_TypeDef* I2Cx, FunctionalState NewState); -void I2C_SMBusAlertConfig(I2C_TypeDef* I2Cx, uint16_t I2C_SMBusAlert); -void I2C_TransmitPEC(I2C_TypeDef* I2Cx, FunctionalState NewState); -void I2C_PECPositionConfig(I2C_TypeDef* I2Cx, uint16_t I2C_PECPosition); -void I2C_CalculatePEC(I2C_TypeDef* I2Cx, FunctionalState NewState); -uint8_t I2C_GetPEC(I2C_TypeDef* I2Cx); -void I2C_ARPCmd(I2C_TypeDef* I2Cx, FunctionalState NewState); -void I2C_StretchClockCmd(I2C_TypeDef* I2Cx, FunctionalState NewState); -void I2C_FastModeDutyCycleConfig(I2C_TypeDef* I2Cx, uint16_t I2C_DutyCycle); -uint32_t I2C_GetLastEvent(I2C_TypeDef* I2Cx); -ErrorStatus I2C_CheckEvent(I2C_TypeDef* I2Cx, uint32_t I2C_EVENT); -FlagStatus I2C_GetFlagStatus(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG); -void I2C_ClearFlag(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG); -ITStatus I2C_GetITStatus(I2C_TypeDef* I2Cx, uint32_t I2C_IT); -void I2C_ClearITPendingBit(I2C_TypeDef* I2Cx, uint32_t I2C_IT); - -#ifdef __cplusplus -} -#endif - -#endif /*__STM32F10x_I2C_H */ -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_iwdg.h b/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_iwdg.h deleted file mode 100644 index af652df66f..0000000000 --- a/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_iwdg.h +++ /dev/null @@ -1,139 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f10x_iwdg.h - * @author MCD Application Team - * @version V3.2.0 - * @date 03/01/2010 - * @brief This file contains all the functions prototypes for the IWDG - * firmware library. - ****************************************************************************** - * @copy - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2010 STMicroelectronics

- */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F10x_IWDG_H -#define __STM32F10x_IWDG_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x.h" - -/** @addtogroup STM32F10x_StdPeriph_Driver - * @{ - */ - -/** @addtogroup IWDG - * @{ - */ - -/** @defgroup IWDG_Exported_Types - * @{ - */ - -/** - * @} - */ - -/** @defgroup IWDG_Exported_Constants - * @{ - */ - -/** @defgroup IWDG_WriteAccess - * @{ - */ - -#define IWDG_WriteAccess_Enable ((uint16_t)0x5555) -#define IWDG_WriteAccess_Disable ((uint16_t)0x0000) -#define IS_IWDG_WRITE_ACCESS(ACCESS) (((ACCESS) == IWDG_WriteAccess_Enable) || \ - ((ACCESS) == IWDG_WriteAccess_Disable)) -/** - * @} - */ - -/** @defgroup IWDG_prescaler - * @{ - */ - -#define IWDG_Prescaler_4 ((uint8_t)0x00) -#define IWDG_Prescaler_8 ((uint8_t)0x01) -#define IWDG_Prescaler_16 ((uint8_t)0x02) -#define IWDG_Prescaler_32 ((uint8_t)0x03) -#define IWDG_Prescaler_64 ((uint8_t)0x04) -#define IWDG_Prescaler_128 ((uint8_t)0x05) -#define IWDG_Prescaler_256 ((uint8_t)0x06) -#define IS_IWDG_PRESCALER(PRESCALER) (((PRESCALER) == IWDG_Prescaler_4) || \ - ((PRESCALER) == IWDG_Prescaler_8) || \ - ((PRESCALER) == IWDG_Prescaler_16) || \ - ((PRESCALER) == IWDG_Prescaler_32) || \ - ((PRESCALER) == IWDG_Prescaler_64) || \ - ((PRESCALER) == IWDG_Prescaler_128)|| \ - ((PRESCALER) == IWDG_Prescaler_256)) -/** - * @} - */ - -/** @defgroup IWDG_Flag - * @{ - */ - -#define IWDG_FLAG_PVU ((uint16_t)0x0001) -#define IWDG_FLAG_RVU ((uint16_t)0x0002) -#define IS_IWDG_FLAG(FLAG) (((FLAG) == IWDG_FLAG_PVU) || ((FLAG) == IWDG_FLAG_RVU)) -#define IS_IWDG_RELOAD(RELOAD) ((RELOAD) <= 0xFFF) -/** - * @} - */ - -/** - * @} - */ - -/** @defgroup IWDG_Exported_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup IWDG_Exported_Functions - * @{ - */ - -void IWDG_WriteAccessCmd(uint16_t IWDG_WriteAccess); -void IWDG_SetPrescaler(uint8_t IWDG_Prescaler); -void IWDG_SetReload(uint16_t Reload); -void IWDG_ReloadCounter(void); -void IWDG_Enable(void); -FlagStatus IWDG_GetFlagStatus(uint16_t IWDG_FLAG); - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32F10x_IWDG_H */ -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_pwr.h b/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_pwr.h deleted file mode 100644 index b223b16a57..0000000000 --- a/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_pwr.h +++ /dev/null @@ -1,155 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f10x_pwr.h - * @author MCD Application Team - * @version V3.2.0 - * @date 03/01/2010 - * @brief This file contains all the functions prototypes for the PWR firmware - * library. - ****************************************************************************** - * @copy - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2010 STMicroelectronics

- */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F10x_PWR_H -#define __STM32F10x_PWR_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x.h" - -/** @addtogroup STM32F10x_StdPeriph_Driver - * @{ - */ - -/** @addtogroup PWR - * @{ - */ - -/** @defgroup PWR_Exported_Types - * @{ - */ - -/** - * @} - */ - -/** @defgroup PWR_Exported_Constants - * @{ - */ - -/** @defgroup PVD_detection_level - * @{ - */ - -#define PWR_PVDLevel_2V2 ((uint32_t)0x00000000) -#define PWR_PVDLevel_2V3 ((uint32_t)0x00000020) -#define PWR_PVDLevel_2V4 ((uint32_t)0x00000040) -#define PWR_PVDLevel_2V5 ((uint32_t)0x00000060) -#define PWR_PVDLevel_2V6 ((uint32_t)0x00000080) -#define PWR_PVDLevel_2V7 ((uint32_t)0x000000A0) -#define PWR_PVDLevel_2V8 ((uint32_t)0x000000C0) -#define PWR_PVDLevel_2V9 ((uint32_t)0x000000E0) -#define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLevel_2V2) || ((LEVEL) == PWR_PVDLevel_2V3)|| \ - ((LEVEL) == PWR_PVDLevel_2V4) || ((LEVEL) == PWR_PVDLevel_2V5)|| \ - ((LEVEL) == PWR_PVDLevel_2V6) || ((LEVEL) == PWR_PVDLevel_2V7)|| \ - ((LEVEL) == PWR_PVDLevel_2V8) || ((LEVEL) == PWR_PVDLevel_2V9)) -/** - * @} - */ - -/** @defgroup Regulator_state_is_STOP_mode - * @{ - */ - -#define PWR_Regulator_ON ((uint32_t)0x00000000) -#define PWR_Regulator_LowPower ((uint32_t)0x00000001) -#define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_Regulator_ON) || \ - ((REGULATOR) == PWR_Regulator_LowPower)) -/** - * @} - */ - -/** @defgroup STOP_mode_entry - * @{ - */ - -#define PWR_STOPEntry_WFI ((uint8_t)0x01) -#define PWR_STOPEntry_WFE ((uint8_t)0x02) -#define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPEntry_WFI) || ((ENTRY) == PWR_STOPEntry_WFE)) - -/** - * @} - */ - -/** @defgroup PWR_Flag - * @{ - */ - -#define PWR_FLAG_WU ((uint32_t)0x00000001) -#define PWR_FLAG_SB ((uint32_t)0x00000002) -#define PWR_FLAG_PVDO ((uint32_t)0x00000004) -#define IS_PWR_GET_FLAG(FLAG) (((FLAG) == PWR_FLAG_WU) || ((FLAG) == PWR_FLAG_SB) || \ - ((FLAG) == PWR_FLAG_PVDO)) - -#define IS_PWR_CLEAR_FLAG(FLAG) (((FLAG) == PWR_FLAG_WU) || ((FLAG) == PWR_FLAG_SB)) -/** - * @} - */ - -/** - * @} - */ - -/** @defgroup PWR_Exported_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup PWR_Exported_Functions - * @{ - */ - -void PWR_DeInit(void); -void PWR_BackupAccessCmd(FunctionalState NewState); -void PWR_PVDCmd(FunctionalState NewState); -void PWR_PVDLevelConfig(uint32_t PWR_PVDLevel); -void PWR_WakeUpPinCmd(FunctionalState NewState); -void PWR_EnterSTOPMode(uint32_t PWR_Regulator, uint8_t PWR_STOPEntry); -void PWR_EnterSTANDBYMode(void); -FlagStatus PWR_GetFlagStatus(uint32_t PWR_FLAG); -void PWR_ClearFlag(uint32_t PWR_FLAG); - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32F10x_PWR_H */ -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_rcc.h b/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_rcc.h deleted file mode 100644 index 496cbd9778..0000000000 --- a/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_rcc.h +++ /dev/null @@ -1,720 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f10x_rcc.h - * @author MCD Application Team - * @version V3.2.0 - * @date 03/01/2010 - * @brief This file contains all the functions prototypes for the RCC firmware - * library. - ****************************************************************************** - * @copy - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2010 STMicroelectronics

- */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F10x_RCC_H -#define __STM32F10x_RCC_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x.h" - -/** @addtogroup STM32F10x_StdPeriph_Driver - * @{ - */ - -/** @addtogroup RCC - * @{ - */ - -/** @defgroup RCC_Exported_Types - * @{ - */ - -typedef struct -{ - uint32_t SYSCLK_Frequency; /*!< returns SYSCLK clock frequency expressed in Hz */ - uint32_t HCLK_Frequency; /*!< returns HCLK clock frequency expressed in Hz */ - uint32_t PCLK1_Frequency; /*!< returns PCLK1 clock frequency expressed in Hz */ - uint32_t PCLK2_Frequency; /*!< returns PCLK2 clock frequency expressed in Hz */ - uint32_t ADCCLK_Frequency; /*!< returns ADCCLK clock frequency expressed in Hz */ -}RCC_ClocksTypeDef; - -/** - * @} - */ - -/** @defgroup RCC_Exported_Constants - * @{ - */ - -/** @defgroup HSE_configuration - * @{ - */ - -#define RCC_HSE_OFF ((uint32_t)0x00000000) -#define RCC_HSE_ON ((uint32_t)0x00010000) -#define RCC_HSE_Bypass ((uint32_t)0x00040000) -#define IS_RCC_HSE(HSE) (((HSE) == RCC_HSE_OFF) || ((HSE) == RCC_HSE_ON) || \ - ((HSE) == RCC_HSE_Bypass)) - -/** - * @} - */ - -/** @defgroup PLL_entry_clock_source - * @{ - */ - -#define RCC_PLLSource_HSI_Div2 ((uint32_t)0x00000000) - -#if !defined (STM32F10X_LD_VL) && !defined (STM32F10X_MD_VL) && !defined (STM32F10X_CL) - #define RCC_PLLSource_HSE_Div1 ((uint32_t)0x00010000) - #define RCC_PLLSource_HSE_Div2 ((uint32_t)0x00030000) - #define IS_RCC_PLL_SOURCE(SOURCE) (((SOURCE) == RCC_PLLSource_HSI_Div2) || \ - ((SOURCE) == RCC_PLLSource_HSE_Div1) || \ - ((SOURCE) == RCC_PLLSource_HSE_Div2)) -#else - #define RCC_PLLSource_PREDIV1 ((uint32_t)0x00010000) - #define IS_RCC_PLL_SOURCE(SOURCE) (((SOURCE) == RCC_PLLSource_HSI_Div2) || \ - ((SOURCE) == RCC_PLLSource_PREDIV1)) -#endif /* STM32F10X_CL */ - -/** - * @} - */ - -/** @defgroup PLL_multiplication_factor - * @{ - */ -#ifndef STM32F10X_CL - #define RCC_PLLMul_2 ((uint32_t)0x00000000) - #define RCC_PLLMul_3 ((uint32_t)0x00040000) - #define RCC_PLLMul_4 ((uint32_t)0x00080000) - #define RCC_PLLMul_5 ((uint32_t)0x000C0000) - #define RCC_PLLMul_6 ((uint32_t)0x00100000) - #define RCC_PLLMul_7 ((uint32_t)0x00140000) - #define RCC_PLLMul_8 ((uint32_t)0x00180000) - #define RCC_PLLMul_9 ((uint32_t)0x001C0000) - #define RCC_PLLMul_10 ((uint32_t)0x00200000) - #define RCC_PLLMul_11 ((uint32_t)0x00240000) - #define RCC_PLLMul_12 ((uint32_t)0x00280000) - #define RCC_PLLMul_13 ((uint32_t)0x002C0000) - #define RCC_PLLMul_14 ((uint32_t)0x00300000) - #define RCC_PLLMul_15 ((uint32_t)0x00340000) - #define RCC_PLLMul_16 ((uint32_t)0x00380000) - #define IS_RCC_PLL_MUL(MUL) (((MUL) == RCC_PLLMul_2) || ((MUL) == RCC_PLLMul_3) || \ - ((MUL) == RCC_PLLMul_4) || ((MUL) == RCC_PLLMul_5) || \ - ((MUL) == RCC_PLLMul_6) || ((MUL) == RCC_PLLMul_7) || \ - ((MUL) == RCC_PLLMul_8) || ((MUL) == RCC_PLLMul_9) || \ - ((MUL) == RCC_PLLMul_10) || ((MUL) == RCC_PLLMul_11) || \ - ((MUL) == RCC_PLLMul_12) || ((MUL) == RCC_PLLMul_13) || \ - ((MUL) == RCC_PLLMul_14) || ((MUL) == RCC_PLLMul_15) || \ - ((MUL) == RCC_PLLMul_16)) - -#else - #define RCC_PLLMul_4 ((uint32_t)0x00080000) - #define RCC_PLLMul_5 ((uint32_t)0x000C0000) - #define RCC_PLLMul_6 ((uint32_t)0x00100000) - #define RCC_PLLMul_7 ((uint32_t)0x00140000) - #define RCC_PLLMul_8 ((uint32_t)0x00180000) - #define RCC_PLLMul_9 ((uint32_t)0x001C0000) - #define RCC_PLLMul_6_5 ((uint32_t)0x00340000) - - #define IS_RCC_PLL_MUL(MUL) (((MUL) == RCC_PLLMul_4) || ((MUL) == RCC_PLLMul_5) || \ - ((MUL) == RCC_PLLMul_6) || ((MUL) == RCC_PLLMul_7) || \ - ((MUL) == RCC_PLLMul_8) || ((MUL) == RCC_PLLMul_9) || \ - ((MUL) == RCC_PLLMul_6_5)) -#endif /* STM32F10X_CL */ -/** - * @} - */ - -/** @defgroup PREDIV1_division_factor - * @{ - */ -#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_CL) - #define RCC_PREDIV1_Div1 ((uint32_t)0x00000000) - #define RCC_PREDIV1_Div2 ((uint32_t)0x00000001) - #define RCC_PREDIV1_Div3 ((uint32_t)0x00000002) - #define RCC_PREDIV1_Div4 ((uint32_t)0x00000003) - #define RCC_PREDIV1_Div5 ((uint32_t)0x00000004) - #define RCC_PREDIV1_Div6 ((uint32_t)0x00000005) - #define RCC_PREDIV1_Div7 ((uint32_t)0x00000006) - #define RCC_PREDIV1_Div8 ((uint32_t)0x00000007) - #define RCC_PREDIV1_Div9 ((uint32_t)0x00000008) - #define RCC_PREDIV1_Div10 ((uint32_t)0x00000009) - #define RCC_PREDIV1_Div11 ((uint32_t)0x0000000A) - #define RCC_PREDIV1_Div12 ((uint32_t)0x0000000B) - #define RCC_PREDIV1_Div13 ((uint32_t)0x0000000C) - #define RCC_PREDIV1_Div14 ((uint32_t)0x0000000D) - #define RCC_PREDIV1_Div15 ((uint32_t)0x0000000E) - #define RCC_PREDIV1_Div16 ((uint32_t)0x0000000F) - - #define IS_RCC_PREDIV1(PREDIV1) (((PREDIV1) == RCC_PREDIV1_Div1) || ((PREDIV1) == RCC_PREDIV1_Div2) || \ - ((PREDIV1) == RCC_PREDIV1_Div3) || ((PREDIV1) == RCC_PREDIV1_Div4) || \ - ((PREDIV1) == RCC_PREDIV1_Div5) || ((PREDIV1) == RCC_PREDIV1_Div6) || \ - ((PREDIV1) == RCC_PREDIV1_Div7) || ((PREDIV1) == RCC_PREDIV1_Div8) || \ - ((PREDIV1) == RCC_PREDIV1_Div9) || ((PREDIV1) == RCC_PREDIV1_Div10) || \ - ((PREDIV1) == RCC_PREDIV1_Div11) || ((PREDIV1) == RCC_PREDIV1_Div12) || \ - ((PREDIV1) == RCC_PREDIV1_Div13) || ((PREDIV1) == RCC_PREDIV1_Div14) || \ - ((PREDIV1) == RCC_PREDIV1_Div15) || ((PREDIV1) == RCC_PREDIV1_Div16)) -#endif -/** - * @} - */ - - -/** @defgroup PREDIV1_clock_source - * @{ - */ -#ifdef STM32F10X_CL -/* PREDIV1 clock source (for STM32 connectivity line devices) */ - #define RCC_PREDIV1_Source_HSE ((uint32_t)0x00000000) - #define RCC_PREDIV1_Source_PLL2 ((uint32_t)0x00010000) - - #define IS_RCC_PREDIV1_SOURCE(SOURCE) (((SOURCE) == RCC_PREDIV1_Source_HSE) || \ - ((SOURCE) == RCC_PREDIV1_Source_PLL2)) -#elif defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) -/* PREDIV1 clock source (for STM32 Value line devices) */ - #define RCC_PREDIV1_Source_HSE ((uint32_t)0x00000000) - - #define IS_RCC_PREDIV1_SOURCE(SOURCE) (((SOURCE) == RCC_PREDIV1_Source_HSE)) -#endif -/** - * @} - */ - -#ifdef STM32F10X_CL -/** @defgroup PREDIV2_division_factor - * @{ - */ - - #define RCC_PREDIV2_Div1 ((uint32_t)0x00000000) - #define RCC_PREDIV2_Div2 ((uint32_t)0x00000010) - #define RCC_PREDIV2_Div3 ((uint32_t)0x00000020) - #define RCC_PREDIV2_Div4 ((uint32_t)0x00000030) - #define RCC_PREDIV2_Div5 ((uint32_t)0x00000040) - #define RCC_PREDIV2_Div6 ((uint32_t)0x00000050) - #define RCC_PREDIV2_Div7 ((uint32_t)0x00000060) - #define RCC_PREDIV2_Div8 ((uint32_t)0x00000070) - #define RCC_PREDIV2_Div9 ((uint32_t)0x00000080) - #define RCC_PREDIV2_Div10 ((uint32_t)0x00000090) - #define RCC_PREDIV2_Div11 ((uint32_t)0x000000A0) - #define RCC_PREDIV2_Div12 ((uint32_t)0x000000B0) - #define RCC_PREDIV2_Div13 ((uint32_t)0x000000C0) - #define RCC_PREDIV2_Div14 ((uint32_t)0x000000D0) - #define RCC_PREDIV2_Div15 ((uint32_t)0x000000E0) - #define RCC_PREDIV2_Div16 ((uint32_t)0x000000F0) - - #define IS_RCC_PREDIV2(PREDIV2) (((PREDIV2) == RCC_PREDIV2_Div1) || ((PREDIV2) == RCC_PREDIV2_Div2) || \ - ((PREDIV2) == RCC_PREDIV2_Div3) || ((PREDIV2) == RCC_PREDIV2_Div4) || \ - ((PREDIV2) == RCC_PREDIV2_Div5) || ((PREDIV2) == RCC_PREDIV2_Div6) || \ - ((PREDIV2) == RCC_PREDIV2_Div7) || ((PREDIV2) == RCC_PREDIV2_Div8) || \ - ((PREDIV2) == RCC_PREDIV2_Div9) || ((PREDIV2) == RCC_PREDIV2_Div10) || \ - ((PREDIV2) == RCC_PREDIV2_Div11) || ((PREDIV2) == RCC_PREDIV2_Div12) || \ - ((PREDIV2) == RCC_PREDIV2_Div13) || ((PREDIV2) == RCC_PREDIV2_Div14) || \ - ((PREDIV2) == RCC_PREDIV2_Div15) || ((PREDIV2) == RCC_PREDIV2_Div16)) -/** - * @} - */ - - -/** @defgroup PLL2_multiplication_factor - * @{ - */ - - #define RCC_PLL2Mul_8 ((uint32_t)0x00000600) - #define RCC_PLL2Mul_9 ((uint32_t)0x00000700) - #define RCC_PLL2Mul_10 ((uint32_t)0x00000800) - #define RCC_PLL2Mul_11 ((uint32_t)0x00000900) - #define RCC_PLL2Mul_12 ((uint32_t)0x00000A00) - #define RCC_PLL2Mul_13 ((uint32_t)0x00000B00) - #define RCC_PLL2Mul_14 ((uint32_t)0x00000C00) - #define RCC_PLL2Mul_16 ((uint32_t)0x00000E00) - #define RCC_PLL2Mul_20 ((uint32_t)0x00000F00) - - #define IS_RCC_PLL2_MUL(MUL) (((MUL) == RCC_PLL2Mul_8) || ((MUL) == RCC_PLL2Mul_9) || \ - ((MUL) == RCC_PLL2Mul_10) || ((MUL) == RCC_PLL2Mul_11) || \ - ((MUL) == RCC_PLL2Mul_12) || ((MUL) == RCC_PLL2Mul_13) || \ - ((MUL) == RCC_PLL2Mul_14) || ((MUL) == RCC_PLL2Mul_16) || \ - ((MUL) == RCC_PLL2Mul_20)) -/** - * @} - */ - - -/** @defgroup PLL3_multiplication_factor - * @{ - */ - - #define RCC_PLL3Mul_8 ((uint32_t)0x00006000) - #define RCC_PLL3Mul_9 ((uint32_t)0x00007000) - #define RCC_PLL3Mul_10 ((uint32_t)0x00008000) - #define RCC_PLL3Mul_11 ((uint32_t)0x00009000) - #define RCC_PLL3Mul_12 ((uint32_t)0x0000A000) - #define RCC_PLL3Mul_13 ((uint32_t)0x0000B000) - #define RCC_PLL3Mul_14 ((uint32_t)0x0000C000) - #define RCC_PLL3Mul_16 ((uint32_t)0x0000E000) - #define RCC_PLL3Mul_20 ((uint32_t)0x0000F000) - - #define IS_RCC_PLL3_MUL(MUL) (((MUL) == RCC_PLL3Mul_8) || ((MUL) == RCC_PLL3Mul_9) || \ - ((MUL) == RCC_PLL3Mul_10) || ((MUL) == RCC_PLL3Mul_11) || \ - ((MUL) == RCC_PLL3Mul_12) || ((MUL) == RCC_PLL3Mul_13) || \ - ((MUL) == RCC_PLL3Mul_14) || ((MUL) == RCC_PLL3Mul_16) || \ - ((MUL) == RCC_PLL3Mul_20)) -/** - * @} - */ - -#endif /* STM32F10X_CL */ - - -/** @defgroup System_clock_source - * @{ - */ - -#define RCC_SYSCLKSource_HSI ((uint32_t)0x00000000) -#define RCC_SYSCLKSource_HSE ((uint32_t)0x00000001) -#define RCC_SYSCLKSource_PLLCLK ((uint32_t)0x00000002) -#define IS_RCC_SYSCLK_SOURCE(SOURCE) (((SOURCE) == RCC_SYSCLKSource_HSI) || \ - ((SOURCE) == RCC_SYSCLKSource_HSE) || \ - ((SOURCE) == RCC_SYSCLKSource_PLLCLK)) -/** - * @} - */ - -/** @defgroup AHB_clock_source - * @{ - */ - -#define RCC_SYSCLK_Div1 ((uint32_t)0x00000000) -#define RCC_SYSCLK_Div2 ((uint32_t)0x00000080) -#define RCC_SYSCLK_Div4 ((uint32_t)0x00000090) -#define RCC_SYSCLK_Div8 ((uint32_t)0x000000A0) -#define RCC_SYSCLK_Div16 ((uint32_t)0x000000B0) -#define RCC_SYSCLK_Div64 ((uint32_t)0x000000C0) -#define RCC_SYSCLK_Div128 ((uint32_t)0x000000D0) -#define RCC_SYSCLK_Div256 ((uint32_t)0x000000E0) -#define RCC_SYSCLK_Div512 ((uint32_t)0x000000F0) -#define IS_RCC_HCLK(HCLK) (((HCLK) == RCC_SYSCLK_Div1) || ((HCLK) == RCC_SYSCLK_Div2) || \ - ((HCLK) == RCC_SYSCLK_Div4) || ((HCLK) == RCC_SYSCLK_Div8) || \ - ((HCLK) == RCC_SYSCLK_Div16) || ((HCLK) == RCC_SYSCLK_Div64) || \ - ((HCLK) == RCC_SYSCLK_Div128) || ((HCLK) == RCC_SYSCLK_Div256) || \ - ((HCLK) == RCC_SYSCLK_Div512)) -/** - * @} - */ - -/** @defgroup APB1_APB2_clock_source - * @{ - */ - -#define RCC_HCLK_Div1 ((uint32_t)0x00000000) -#define RCC_HCLK_Div2 ((uint32_t)0x00000400) -#define RCC_HCLK_Div4 ((uint32_t)0x00000500) -#define RCC_HCLK_Div8 ((uint32_t)0x00000600) -#define RCC_HCLK_Div16 ((uint32_t)0x00000700) -#define IS_RCC_PCLK(PCLK) (((PCLK) == RCC_HCLK_Div1) || ((PCLK) == RCC_HCLK_Div2) || \ - ((PCLK) == RCC_HCLK_Div4) || ((PCLK) == RCC_HCLK_Div8) || \ - ((PCLK) == RCC_HCLK_Div16)) -/** - * @} - */ - -/** @defgroup RCC_Interrupt_source - * @{ - */ - -#define RCC_IT_LSIRDY ((uint8_t)0x01) -#define RCC_IT_LSERDY ((uint8_t)0x02) -#define RCC_IT_HSIRDY ((uint8_t)0x04) -#define RCC_IT_HSERDY ((uint8_t)0x08) -#define RCC_IT_PLLRDY ((uint8_t)0x10) -#define RCC_IT_CSS ((uint8_t)0x80) - -#ifndef STM32F10X_CL - #define IS_RCC_IT(IT) ((((IT) & (uint8_t)0xE0) == 0x00) && ((IT) != 0x00)) - #define IS_RCC_GET_IT(IT) (((IT) == RCC_IT_LSIRDY) || ((IT) == RCC_IT_LSERDY) || \ - ((IT) == RCC_IT_HSIRDY) || ((IT) == RCC_IT_HSERDY) || \ - ((IT) == RCC_IT_PLLRDY) || ((IT) == RCC_IT_CSS)) - #define IS_RCC_CLEAR_IT(IT) ((((IT) & (uint8_t)0x60) == 0x00) && ((IT) != 0x00)) -#else - #define RCC_IT_PLL2RDY ((uint8_t)0x20) - #define RCC_IT_PLL3RDY ((uint8_t)0x40) - #define IS_RCC_IT(IT) ((((IT) & (uint8_t)0x80) == 0x00) && ((IT) != 0x00)) - #define IS_RCC_GET_IT(IT) (((IT) == RCC_IT_LSIRDY) || ((IT) == RCC_IT_LSERDY) || \ - ((IT) == RCC_IT_HSIRDY) || ((IT) == RCC_IT_HSERDY) || \ - ((IT) == RCC_IT_PLLRDY) || ((IT) == RCC_IT_CSS) || \ - ((IT) == RCC_IT_PLL2RDY) || ((IT) == RCC_IT_PLL3RDY)) - #define IS_RCC_CLEAR_IT(IT) ((IT) != 0x00) -#endif /* STM32F10X_CL */ - - -/** - * @} - */ - -#ifndef STM32F10X_CL -/** @defgroup USB_Device_clock_source - * @{ - */ - - #define RCC_USBCLKSource_PLLCLK_1Div5 ((uint8_t)0x00) - #define RCC_USBCLKSource_PLLCLK_Div1 ((uint8_t)0x01) - - #define IS_RCC_USBCLK_SOURCE(SOURCE) (((SOURCE) == RCC_USBCLKSource_PLLCLK_1Div5) || \ - ((SOURCE) == RCC_USBCLKSource_PLLCLK_Div1)) -/** - * @} - */ -#else -/** @defgroup USB_OTG_FS_clock_source - * @{ - */ - #define RCC_OTGFSCLKSource_PLLVCO_Div3 ((uint8_t)0x00) - #define RCC_OTGFSCLKSource_PLLVCO_Div2 ((uint8_t)0x01) - - #define IS_RCC_OTGFSCLK_SOURCE(SOURCE) (((SOURCE) == RCC_OTGFSCLKSource_PLLVCO_Div3) || \ - ((SOURCE) == RCC_OTGFSCLKSource_PLLVCO_Div2)) -/** - * @} - */ -#endif /* STM32F10X_CL */ - - -#ifdef STM32F10X_CL -/** @defgroup I2S2_clock_source - * @{ - */ - #define RCC_I2S2CLKSource_SYSCLK ((uint8_t)0x00) - #define RCC_I2S2CLKSource_PLL3_VCO ((uint8_t)0x01) - - #define IS_RCC_I2S2CLK_SOURCE(SOURCE) (((SOURCE) == RCC_I2S2CLKSource_SYSCLK) || \ - ((SOURCE) == RCC_I2S2CLKSource_PLL3_VCO)) -/** - * @} - */ - -/** @defgroup I2S3_clock_source - * @{ - */ - #define RCC_I2S3CLKSource_SYSCLK ((uint8_t)0x00) - #define RCC_I2S3CLKSource_PLL3_VCO ((uint8_t)0x01) - - #define IS_RCC_I2S3CLK_SOURCE(SOURCE) (((SOURCE) == RCC_I2S3CLKSource_SYSCLK) || \ - ((SOURCE) == RCC_I2S3CLKSource_PLL3_VCO)) -/** - * @} - */ -#endif /* STM32F10X_CL */ - - -/** @defgroup ADC_clock_source - * @{ - */ - -#define RCC_PCLK2_Div2 ((uint32_t)0x00000000) -#define RCC_PCLK2_Div4 ((uint32_t)0x00004000) -#define RCC_PCLK2_Div6 ((uint32_t)0x00008000) -#define RCC_PCLK2_Div8 ((uint32_t)0x0000C000) -#define IS_RCC_ADCCLK(ADCCLK) (((ADCCLK) == RCC_PCLK2_Div2) || ((ADCCLK) == RCC_PCLK2_Div4) || \ - ((ADCCLK) == RCC_PCLK2_Div6) || ((ADCCLK) == RCC_PCLK2_Div8)) -/** - * @} - */ - -/** @defgroup LSE_configuration - * @{ - */ - -#define RCC_LSE_OFF ((uint8_t)0x00) -#define RCC_LSE_ON ((uint8_t)0x01) -#define RCC_LSE_Bypass ((uint8_t)0x04) -#define IS_RCC_LSE(LSE) (((LSE) == RCC_LSE_OFF) || ((LSE) == RCC_LSE_ON) || \ - ((LSE) == RCC_LSE_Bypass)) -/** - * @} - */ - -/** @defgroup RTC_clock_source - * @{ - */ - -#define RCC_RTCCLKSource_LSE ((uint32_t)0x00000100) -#define RCC_RTCCLKSource_LSI ((uint32_t)0x00000200) -#define RCC_RTCCLKSource_HSE_Div128 ((uint32_t)0x00000300) -#define IS_RCC_RTCCLK_SOURCE(SOURCE) (((SOURCE) == RCC_RTCCLKSource_LSE) || \ - ((SOURCE) == RCC_RTCCLKSource_LSI) || \ - ((SOURCE) == RCC_RTCCLKSource_HSE_Div128)) -/** - * @} - */ - -/** @defgroup AHB_peripheral - * @{ - */ - -#define RCC_AHBPeriph_DMA1 ((uint32_t)0x00000001) -#define RCC_AHBPeriph_DMA2 ((uint32_t)0x00000002) -#define RCC_AHBPeriph_SRAM ((uint32_t)0x00000004) -#define RCC_AHBPeriph_FLITF ((uint32_t)0x00000010) -#define RCC_AHBPeriph_CRC ((uint32_t)0x00000040) - -#ifndef STM32F10X_CL - #define RCC_AHBPeriph_FSMC ((uint32_t)0x00000100) - #define RCC_AHBPeriph_SDIO ((uint32_t)0x00000400) - #define IS_RCC_AHB_PERIPH(PERIPH) ((((PERIPH) & 0xFFFFFAA8) == 0x00) && ((PERIPH) != 0x00)) -#else - #define RCC_AHBPeriph_OTG_FS ((uint32_t)0x00001000) - #define RCC_AHBPeriph_ETH_MAC ((uint32_t)0x00004000) - #define RCC_AHBPeriph_ETH_MAC_Tx ((uint32_t)0x00008000) - #define RCC_AHBPeriph_ETH_MAC_Rx ((uint32_t)0x00010000) - - #define IS_RCC_AHB_PERIPH(PERIPH) ((((PERIPH) & 0xFFFE2FA8) == 0x00) && ((PERIPH) != 0x00)) - #define IS_RCC_AHB_PERIPH_RESET(PERIPH) ((((PERIPH) & 0xFFFFAFFF) == 0x00) && ((PERIPH) != 0x00)) -#endif /* STM32F10X_CL */ -/** - * @} - */ - -/** @defgroup APB2_peripheral - * @{ - */ - -#define RCC_APB2Periph_AFIO ((uint32_t)0x00000001) -#define RCC_APB2Periph_GPIOA ((uint32_t)0x00000004) -#define RCC_APB2Periph_GPIOB ((uint32_t)0x00000008) -#define RCC_APB2Periph_GPIOC ((uint32_t)0x00000010) -#define RCC_APB2Periph_GPIOD ((uint32_t)0x00000020) -#define RCC_APB2Periph_GPIOE ((uint32_t)0x00000040) -#define RCC_APB2Periph_GPIOF ((uint32_t)0x00000080) -#define RCC_APB2Periph_GPIOG ((uint32_t)0x00000100) -#define RCC_APB2Periph_ADC1 ((uint32_t)0x00000200) -#define RCC_APB2Periph_ADC2 ((uint32_t)0x00000400) -#define RCC_APB2Periph_TIM1 ((uint32_t)0x00000800) -#define RCC_APB2Periph_SPI1 ((uint32_t)0x00001000) -#define RCC_APB2Periph_TIM8 ((uint32_t)0x00002000) -#define RCC_APB2Periph_USART1 ((uint32_t)0x00004000) -#define RCC_APB2Periph_ADC3 ((uint32_t)0x00008000) -#define RCC_APB2Periph_TIM15 ((uint32_t)0x00010000) -#define RCC_APB2Periph_TIM16 ((uint32_t)0x00020000) -#define RCC_APB2Periph_TIM17 ((uint32_t)0x00040000) - -#define IS_RCC_APB2_PERIPH(PERIPH) ((((PERIPH) & 0xFFF80002) == 0x00) && ((PERIPH) != 0x00)) -/** - * @} - */ - -/** @defgroup APB1_peripheral - * @{ - */ - -#define RCC_APB1Periph_TIM2 ((uint32_t)0x00000001) -#define RCC_APB1Periph_TIM3 ((uint32_t)0x00000002) -#define RCC_APB1Periph_TIM4 ((uint32_t)0x00000004) -#define RCC_APB1Periph_TIM5 ((uint32_t)0x00000008) -#define RCC_APB1Periph_TIM6 ((uint32_t)0x00000010) -#define RCC_APB1Periph_TIM7 ((uint32_t)0x00000020) -#define RCC_APB1Periph_WWDG ((uint32_t)0x00000800) -#define RCC_APB1Periph_SPI2 ((uint32_t)0x00004000) -#define RCC_APB1Periph_SPI3 ((uint32_t)0x00008000) -#define RCC_APB1Periph_USART2 ((uint32_t)0x00020000) -#define RCC_APB1Periph_USART3 ((uint32_t)0x00040000) -#define RCC_APB1Periph_UART4 ((uint32_t)0x00080000) -#define RCC_APB1Periph_UART5 ((uint32_t)0x00100000) -#define RCC_APB1Periph_I2C1 ((uint32_t)0x00200000) -#define RCC_APB1Periph_I2C2 ((uint32_t)0x00400000) -#define RCC_APB1Periph_USB ((uint32_t)0x00800000) -#define RCC_APB1Periph_CAN1 ((uint32_t)0x02000000) -#define RCC_APB1Periph_CAN2 ((uint32_t)0x04000000) -#define RCC_APB1Periph_BKP ((uint32_t)0x08000000) -#define RCC_APB1Periph_PWR ((uint32_t)0x10000000) -#define RCC_APB1Periph_DAC ((uint32_t)0x20000000) -#define RCC_APB1Periph_CEC ((uint32_t)0x40000000) - -#define IS_RCC_APB1_PERIPH(PERIPH) ((((PERIPH) & 0x810137C0) == 0x00) && ((PERIPH) != 0x00)) - -/** - * @} - */ - -/** @defgroup Clock_source_to_output_on_MCO_pin - * @{ - */ - -#define RCC_MCO_NoClock ((uint8_t)0x00) -#define RCC_MCO_SYSCLK ((uint8_t)0x04) -#define RCC_MCO_HSI ((uint8_t)0x05) -#define RCC_MCO_HSE ((uint8_t)0x06) -#define RCC_MCO_PLLCLK_Div2 ((uint8_t)0x07) - -#ifndef STM32F10X_CL - #define IS_RCC_MCO(MCO) (((MCO) == RCC_MCO_NoClock) || ((MCO) == RCC_MCO_HSI) || \ - ((MCO) == RCC_MCO_SYSCLK) || ((MCO) == RCC_MCO_HSE) || \ - ((MCO) == RCC_MCO_PLLCLK_Div2)) -#else - #define RCC_MCO_PLL2CLK ((uint8_t)0x08) - #define RCC_MCO_PLL3CLK_Div2 ((uint8_t)0x09) - #define RCC_MCO_XT1 ((uint8_t)0x0A) - #define RCC_MCO_PLL3CLK ((uint8_t)0x0B) - - #define IS_RCC_MCO(MCO) (((MCO) == RCC_MCO_NoClock) || ((MCO) == RCC_MCO_HSI) || \ - ((MCO) == RCC_MCO_SYSCLK) || ((MCO) == RCC_MCO_HSE) || \ - ((MCO) == RCC_MCO_PLLCLK_Div2) || ((MCO) == RCC_MCO_PLL2CLK) || \ - ((MCO) == RCC_MCO_PLL3CLK_Div2) || ((MCO) == RCC_MCO_XT1) || \ - ((MCO) == RCC_MCO_PLL3CLK)) -#endif /* STM32F10X_CL */ - -/** - * @} - */ - -/** @defgroup RCC_Flag - * @{ - */ - -#define RCC_FLAG_HSIRDY ((uint8_t)0x21) -#define RCC_FLAG_HSERDY ((uint8_t)0x31) -#define RCC_FLAG_PLLRDY ((uint8_t)0x39) -#define RCC_FLAG_LSERDY ((uint8_t)0x41) -#define RCC_FLAG_LSIRDY ((uint8_t)0x61) -#define RCC_FLAG_PINRST ((uint8_t)0x7A) -#define RCC_FLAG_PORRST ((uint8_t)0x7B) -#define RCC_FLAG_SFTRST ((uint8_t)0x7C) -#define RCC_FLAG_IWDGRST ((uint8_t)0x7D) -#define RCC_FLAG_WWDGRST ((uint8_t)0x7E) -#define RCC_FLAG_LPWRRST ((uint8_t)0x7F) - -#ifndef STM32F10X_CL - #define IS_RCC_FLAG(FLAG) (((FLAG) == RCC_FLAG_HSIRDY) || ((FLAG) == RCC_FLAG_HSERDY) || \ - ((FLAG) == RCC_FLAG_PLLRDY) || ((FLAG) == RCC_FLAG_LSERDY) || \ - ((FLAG) == RCC_FLAG_LSIRDY) || ((FLAG) == RCC_FLAG_PINRST) || \ - ((FLAG) == RCC_FLAG_PORRST) || ((FLAG) == RCC_FLAG_SFTRST) || \ - ((FLAG) == RCC_FLAG_IWDGRST)|| ((FLAG) == RCC_FLAG_WWDGRST)|| \ - ((FLAG) == RCC_FLAG_LPWRRST)) -#else - #define RCC_FLAG_PLL2RDY ((uint8_t)0x3B) - #define RCC_FLAG_PLL3RDY ((uint8_t)0x3D) - #define IS_RCC_FLAG(FLAG) (((FLAG) == RCC_FLAG_HSIRDY) || ((FLAG) == RCC_FLAG_HSERDY) || \ - ((FLAG) == RCC_FLAG_PLLRDY) || ((FLAG) == RCC_FLAG_LSERDY) || \ - ((FLAG) == RCC_FLAG_PLL2RDY) || ((FLAG) == RCC_FLAG_PLL3RDY) || \ - ((FLAG) == RCC_FLAG_LSIRDY) || ((FLAG) == RCC_FLAG_PINRST) || \ - ((FLAG) == RCC_FLAG_PORRST) || ((FLAG) == RCC_FLAG_SFTRST) || \ - ((FLAG) == RCC_FLAG_IWDGRST)|| ((FLAG) == RCC_FLAG_WWDGRST)|| \ - ((FLAG) == RCC_FLAG_LPWRRST)) -#endif /* STM32F10X_CL */ - -#define IS_RCC_CALIBRATION_VALUE(VALUE) ((VALUE) <= 0x1F) -/** - * @} - */ - -/** - * @} - */ - -/** @defgroup RCC_Exported_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup RCC_Exported_Functions - * @{ - */ - -void RCC_DeInit(void); -void RCC_HSEConfig(uint32_t RCC_HSE); -ErrorStatus RCC_WaitForHSEStartUp(void); -void RCC_AdjustHSICalibrationValue(uint8_t HSICalibrationValue); -void RCC_HSICmd(FunctionalState NewState); -void RCC_PLLConfig(uint32_t RCC_PLLSource, uint32_t RCC_PLLMul); -void RCC_PLLCmd(FunctionalState NewState); - -#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_CL) - void RCC_PREDIV1Config(uint32_t RCC_PREDIV1_Source, uint32_t RCC_PREDIV1_Div); -#endif - -#ifdef STM32F10X_CL - void RCC_PREDIV2Config(uint32_t RCC_PREDIV2_Div); - void RCC_PLL2Config(uint32_t RCC_PLL2Mul); - void RCC_PLL2Cmd(FunctionalState NewState); - void RCC_PLL3Config(uint32_t RCC_PLL3Mul); - void RCC_PLL3Cmd(FunctionalState NewState); -#endif /* STM32F10X_CL */ - -void RCC_SYSCLKConfig(uint32_t RCC_SYSCLKSource); -uint8_t RCC_GetSYSCLKSource(void); -void RCC_HCLKConfig(uint32_t RCC_SYSCLK); -void RCC_PCLK1Config(uint32_t RCC_HCLK); -void RCC_PCLK2Config(uint32_t RCC_HCLK); -void RCC_ITConfig(uint8_t RCC_IT, FunctionalState NewState); - -#ifndef STM32F10X_CL - void RCC_USBCLKConfig(uint32_t RCC_USBCLKSource); -#else - void RCC_OTGFSCLKConfig(uint32_t RCC_OTGFSCLKSource); -#endif /* STM32F10X_CL */ - -void RCC_ADCCLKConfig(uint32_t RCC_PCLK2); - -#ifdef STM32F10X_CL - void RCC_I2S2CLKConfig(uint32_t RCC_I2S2CLKSource); - void RCC_I2S3CLKConfig(uint32_t RCC_I2S3CLKSource); -#endif /* STM32F10X_CL */ - -void RCC_LSEConfig(uint8_t RCC_LSE); -void RCC_LSICmd(FunctionalState NewState); -void RCC_RTCCLKConfig(uint32_t RCC_RTCCLKSource); -void RCC_RTCCLKCmd(FunctionalState NewState); -void RCC_GetClocksFreq(RCC_ClocksTypeDef* RCC_Clocks); -void RCC_AHBPeriphClockCmd(uint32_t RCC_AHBPeriph, FunctionalState NewState); -void RCC_APB2PeriphClockCmd(uint32_t RCC_APB2Periph, FunctionalState NewState); -void RCC_APB1PeriphClockCmd(uint32_t RCC_APB1Periph, FunctionalState NewState); - -#ifdef STM32F10X_CL -void RCC_AHBPeriphResetCmd(uint32_t RCC_AHBPeriph, FunctionalState NewState); -#endif /* STM32F10X_CL */ - -void RCC_APB2PeriphResetCmd(uint32_t RCC_APB2Periph, FunctionalState NewState); -void RCC_APB1PeriphResetCmd(uint32_t RCC_APB1Periph, FunctionalState NewState); -void RCC_BackupResetCmd(FunctionalState NewState); -void RCC_ClockSecuritySystemCmd(FunctionalState NewState); -void RCC_MCOConfig(uint8_t RCC_MCO); -FlagStatus RCC_GetFlagStatus(uint8_t RCC_FLAG); -void RCC_ClearFlag(void); -ITStatus RCC_GetITStatus(uint8_t RCC_IT); -void RCC_ClearITPendingBit(uint8_t RCC_IT); - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32F10x_RCC_H */ -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_rtc.h b/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_rtc.h deleted file mode 100644 index d0b1e5495f..0000000000 --- a/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_rtc.h +++ /dev/null @@ -1,134 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f10x_rtc.h - * @author MCD Application Team - * @version V3.2.0 - * @date 03/01/2010 - * @brief This file contains all the functions prototypes for the RTC firmware - * library. - ****************************************************************************** - * @copy - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2010 STMicroelectronics

- */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F10x_RTC_H -#define __STM32F10x_RTC_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x.h" - -/** @addtogroup STM32F10x_StdPeriph_Driver - * @{ - */ - -/** @addtogroup RTC - * @{ - */ - -/** @defgroup RTC_Exported_Types - * @{ - */ - -/** - * @} - */ - -/** @defgroup RTC_Exported_Constants - * @{ - */ - -/** @defgroup RTC_interrupts_define - * @{ - */ - -#define RTC_IT_OW ((uint16_t)0x0004) /*!< Overflow interrupt */ -#define RTC_IT_ALR ((uint16_t)0x0002) /*!< Alarm interrupt */ -#define RTC_IT_SEC ((uint16_t)0x0001) /*!< Second interrupt */ -#define IS_RTC_IT(IT) ((((IT) & (uint16_t)0xFFF8) == 0x00) && ((IT) != 0x00)) -#define IS_RTC_GET_IT(IT) (((IT) == RTC_IT_OW) || ((IT) == RTC_IT_ALR) || \ - ((IT) == RTC_IT_SEC)) -/** - * @} - */ - -/** @defgroup RTC_interrupts_flags - * @{ - */ - -#define RTC_FLAG_RTOFF ((uint16_t)0x0020) /*!< RTC Operation OFF flag */ -#define RTC_FLAG_RSF ((uint16_t)0x0008) /*!< Registers Synchronized flag */ -#define RTC_FLAG_OW ((uint16_t)0x0004) /*!< Overflow flag */ -#define RTC_FLAG_ALR ((uint16_t)0x0002) /*!< Alarm flag */ -#define RTC_FLAG_SEC ((uint16_t)0x0001) /*!< Second flag */ -#define IS_RTC_CLEAR_FLAG(FLAG) ((((FLAG) & (uint16_t)0xFFF0) == 0x00) && ((FLAG) != 0x00)) -#define IS_RTC_GET_FLAG(FLAG) (((FLAG) == RTC_FLAG_RTOFF) || ((FLAG) == RTC_FLAG_RSF) || \ - ((FLAG) == RTC_FLAG_OW) || ((FLAG) == RTC_FLAG_ALR) || \ - ((FLAG) == RTC_FLAG_SEC)) -#define IS_RTC_PRESCALER(PRESCALER) ((PRESCALER) <= 0xFFFFF) - -/** - * @} - */ - -/** - * @} - */ - -/** @defgroup RTC_Exported_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup RTC_Exported_Functions - * @{ - */ - -void RTC_ITConfig(uint16_t RTC_IT, FunctionalState NewState); -void RTC_EnterConfigMode(void); -void RTC_ExitConfigMode(void); -uint32_t RTC_GetCounter(void); -void RTC_SetCounter(uint32_t CounterValue); -void RTC_SetPrescaler(uint32_t PrescalerValue); -void RTC_SetAlarm(uint32_t AlarmValue); -uint32_t RTC_GetDivider(void); -void RTC_WaitForLastTask(void); -void RTC_WaitForSynchro(void); -FlagStatus RTC_GetFlagStatus(uint16_t RTC_FLAG); -void RTC_ClearFlag(uint16_t RTC_FLAG); -ITStatus RTC_GetITStatus(uint16_t RTC_IT); -void RTC_ClearITPendingBit(uint16_t RTC_IT); - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32F10x_RTC_H */ -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_sdio.h b/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_sdio.h deleted file mode 100644 index 72bf65389e..0000000000 --- a/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_sdio.h +++ /dev/null @@ -1,530 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f10x_sdio.h - * @author MCD Application Team - * @version V3.2.0 - * @date 03/01/2010 - * @brief This file contains all the functions prototypes for the SDIO firmware - * library. - ****************************************************************************** - * @copy - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2010 STMicroelectronics

- */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F10x_SDIO_H -#define __STM32F10x_SDIO_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x.h" - -/** @addtogroup STM32F10x_StdPeriph_Driver - * @{ - */ - -/** @addtogroup SDIO - * @{ - */ - -/** @defgroup SDIO_Exported_Types - * @{ - */ - -typedef struct -{ - uint32_t SDIO_ClockEdge; /*!< Specifies the clock transition on which the bit capture is made. - This parameter can be a value of @ref SDIO_Clock_Edge */ - - uint32_t SDIO_ClockBypass; /*!< Specifies whether the SDIO Clock divider bypass is - enabled or disabled. - This parameter can be a value of @ref SDIO_Clock_Bypass */ - - uint32_t SDIO_ClockPowerSave; /*!< Specifies whether SDIO Clock output is enabled or - disabled when the bus is idle. - This parameter can be a value of @ref SDIO_Clock_Power_Save */ - - uint32_t SDIO_BusWide; /*!< Specifies the SDIO bus width. - This parameter can be a value of @ref SDIO_Bus_Wide */ - - uint32_t SDIO_HardwareFlowControl; /*!< Specifies whether the SDIO hardware flow control is enabled or disabled. - This parameter can be a value of @ref SDIO_Hardware_Flow_Control */ - - uint8_t SDIO_ClockDiv; /*!< Specifies the clock frequency of the SDIO controller. - This parameter can be a value between 0x00 and 0xFF. */ - -} SDIO_InitTypeDef; - -typedef struct -{ - uint32_t SDIO_Argument; /*!< Specifies the SDIO command argument which is sent - to a card as part of a command message. If a command - contains an argument, it must be loaded into this register - before writing the command to the command register */ - - uint32_t SDIO_CmdIndex; /*!< Specifies the SDIO command index. It must be lower than 0x40. */ - - uint32_t SDIO_Response; /*!< Specifies the SDIO response type. - This parameter can be a value of @ref SDIO_Response_Type */ - - uint32_t SDIO_Wait; /*!< Specifies whether SDIO wait-for-interrupt request is enabled or disabled. - This parameter can be a value of @ref SDIO_Wait_Interrupt_State */ - - uint32_t SDIO_CPSM; /*!< Specifies whether SDIO Command path state machine (CPSM) - is enabled or disabled. - This parameter can be a value of @ref SDIO_CPSM_State */ -} SDIO_CmdInitTypeDef; - -typedef struct -{ - uint32_t SDIO_DataTimeOut; /*!< Specifies the data timeout period in card bus clock periods. */ - - uint32_t SDIO_DataLength; /*!< Specifies the number of data bytes to be transferred. */ - - uint32_t SDIO_DataBlockSize; /*!< Specifies the data block size for block transfer. - This parameter can be a value of @ref SDIO_Data_Block_Size */ - - uint32_t SDIO_TransferDir; /*!< Specifies the data transfer direction, whether the transfer - is a read or write. - This parameter can be a value of @ref SDIO_Transfer_Direction */ - - uint32_t SDIO_TransferMode; /*!< Specifies whether data transfer is in stream or block mode. - This parameter can be a value of @ref SDIO_Transfer_Type */ - - uint32_t SDIO_DPSM; /*!< Specifies whether SDIO Data path state machine (DPSM) - is enabled or disabled. - This parameter can be a value of @ref SDIO_DPSM_State */ -} SDIO_DataInitTypeDef; - -/** - * @} - */ - -/** @defgroup SDIO_Exported_Constants - * @{ - */ - -/** @defgroup SDIO_Clock_Edge - * @{ - */ - -#define SDIO_ClockEdge_Rising ((uint32_t)0x00000000) -#define SDIO_ClockEdge_Falling ((uint32_t)0x00002000) -#define IS_SDIO_CLOCK_EDGE(EDGE) (((EDGE) == SDIO_ClockEdge_Rising) || \ - ((EDGE) == SDIO_ClockEdge_Falling)) -/** - * @} - */ - -/** @defgroup SDIO_Clock_Bypass - * @{ - */ - -#define SDIO_ClockBypass_Disable ((uint32_t)0x00000000) -#define SDIO_ClockBypass_Enable ((uint32_t)0x00000400) -#define IS_SDIO_CLOCK_BYPASS(BYPASS) (((BYPASS) == SDIO_ClockBypass_Disable) || \ - ((BYPASS) == SDIO_ClockBypass_Enable)) -/** - * @} - */ - -/** @defgroup SDIO_Clock_Power_Save - * @{ - */ - -#define SDIO_ClockPowerSave_Disable ((uint32_t)0x00000000) -#define SDIO_ClockPowerSave_Enable ((uint32_t)0x00000200) -#define IS_SDIO_CLOCK_POWER_SAVE(SAVE) (((SAVE) == SDIO_ClockPowerSave_Disable) || \ - ((SAVE) == SDIO_ClockPowerSave_Enable)) -/** - * @} - */ - -/** @defgroup SDIO_Bus_Wide - * @{ - */ - -#define SDIO_BusWide_1b ((uint32_t)0x00000000) -#define SDIO_BusWide_4b ((uint32_t)0x00000800) -#define SDIO_BusWide_8b ((uint32_t)0x00001000) -#define IS_SDIO_BUS_WIDE(WIDE) (((WIDE) == SDIO_BusWide_1b) || ((WIDE) == SDIO_BusWide_4b) || \ - ((WIDE) == SDIO_BusWide_8b)) - -/** - * @} - */ - -/** @defgroup SDIO_Hardware_Flow_Control - * @{ - */ - -#define SDIO_HardwareFlowControl_Disable ((uint32_t)0x00000000) -#define SDIO_HardwareFlowControl_Enable ((uint32_t)0x00004000) -#define IS_SDIO_HARDWARE_FLOW_CONTROL(CONTROL) (((CONTROL) == SDIO_HardwareFlowControl_Disable) || \ - ((CONTROL) == SDIO_HardwareFlowControl_Enable)) -/** - * @} - */ - -/** @defgroup SDIO_Power_State - * @{ - */ - -#define SDIO_PowerState_OFF ((uint32_t)0x00000000) -#define SDIO_PowerState_ON ((uint32_t)0x00000003) -#define IS_SDIO_POWER_STATE(STATE) (((STATE) == SDIO_PowerState_OFF) || ((STATE) == SDIO_PowerState_ON)) -/** - * @} - */ - - -/** @defgroup SDIO_Interrupt_soucres - * @{ - */ - -#define SDIO_IT_CCRCFAIL ((uint32_t)0x00000001) -#define SDIO_IT_DCRCFAIL ((uint32_t)0x00000002) -#define SDIO_IT_CTIMEOUT ((uint32_t)0x00000004) -#define SDIO_IT_DTIMEOUT ((uint32_t)0x00000008) -#define SDIO_IT_TXUNDERR ((uint32_t)0x00000010) -#define SDIO_IT_RXOVERR ((uint32_t)0x00000020) -#define SDIO_IT_CMDREND ((uint32_t)0x00000040) -#define SDIO_IT_CMDSENT ((uint32_t)0x00000080) -#define SDIO_IT_DATAEND ((uint32_t)0x00000100) -#define SDIO_IT_STBITERR ((uint32_t)0x00000200) -#define SDIO_IT_DBCKEND ((uint32_t)0x00000400) -#define SDIO_IT_CMDACT ((uint32_t)0x00000800) -#define SDIO_IT_TXACT ((uint32_t)0x00001000) -#define SDIO_IT_RXACT ((uint32_t)0x00002000) -#define SDIO_IT_TXFIFOHE ((uint32_t)0x00004000) -#define SDIO_IT_RXFIFOHF ((uint32_t)0x00008000) -#define SDIO_IT_TXFIFOF ((uint32_t)0x00010000) -#define SDIO_IT_RXFIFOF ((uint32_t)0x00020000) -#define SDIO_IT_TXFIFOE ((uint32_t)0x00040000) -#define SDIO_IT_RXFIFOE ((uint32_t)0x00080000) -#define SDIO_IT_TXDAVL ((uint32_t)0x00100000) -#define SDIO_IT_RXDAVL ((uint32_t)0x00200000) -#define SDIO_IT_SDIOIT ((uint32_t)0x00400000) -#define SDIO_IT_CEATAEND ((uint32_t)0x00800000) -#define IS_SDIO_IT(IT) ((((IT) & (uint32_t)0xFF000000) == 0x00) && ((IT) != (uint32_t)0x00)) -/** - * @} - */ - -/** @defgroup SDIO_Command_Index - * @{ - */ - -#define IS_SDIO_CMD_INDEX(INDEX) ((INDEX) < 0x40) -/** - * @} - */ - -/** @defgroup SDIO_Response_Type - * @{ - */ - -#define SDIO_Response_No ((uint32_t)0x00000000) -#define SDIO_Response_Short ((uint32_t)0x00000040) -#define SDIO_Response_Long ((uint32_t)0x000000C0) -#define IS_SDIO_RESPONSE(RESPONSE) (((RESPONSE) == SDIO_Response_No) || \ - ((RESPONSE) == SDIO_Response_Short) || \ - ((RESPONSE) == SDIO_Response_Long)) -/** - * @} - */ - -/** @defgroup SDIO_Wait_Interrupt_State - * @{ - */ - -#define SDIO_Wait_No ((uint32_t)0x00000000) /*!< SDIO No Wait, TimeOut is enabled */ -#define SDIO_Wait_IT ((uint32_t)0x00000100) /*!< SDIO Wait Interrupt Request */ -#define SDIO_Wait_Pend ((uint32_t)0x00000200) /*!< SDIO Wait End of transfer */ -#define IS_SDIO_WAIT(WAIT) (((WAIT) == SDIO_Wait_No) || ((WAIT) == SDIO_Wait_IT) || \ - ((WAIT) == SDIO_Wait_Pend)) -/** - * @} - */ - -/** @defgroup SDIO_CPSM_State - * @{ - */ - -#define SDIO_CPSM_Disable ((uint32_t)0x00000000) -#define SDIO_CPSM_Enable ((uint32_t)0x00000400) -#define IS_SDIO_CPSM(CPSM) (((CPSM) == SDIO_CPSM_Enable) || ((CPSM) == SDIO_CPSM_Disable)) -/** - * @} - */ - -/** @defgroup SDIO_Response_Registers - * @{ - */ - -#define SDIO_RESP1 ((uint32_t)0x00000000) -#define SDIO_RESP2 ((uint32_t)0x00000004) -#define SDIO_RESP3 ((uint32_t)0x00000008) -#define SDIO_RESP4 ((uint32_t)0x0000000C) -#define IS_SDIO_RESP(RESP) (((RESP) == SDIO_RESP1) || ((RESP) == SDIO_RESP2) || \ - ((RESP) == SDIO_RESP3) || ((RESP) == SDIO_RESP4)) -/** - * @} - */ - -/** @defgroup SDIO_Data_Length - * @{ - */ - -#define IS_SDIO_DATA_LENGTH(LENGTH) ((LENGTH) <= 0x01FFFFFF) -/** - * @} - */ - -/** @defgroup SDIO_Data_Block_Size - * @{ - */ - -#define SDIO_DataBlockSize_1b ((uint32_t)0x00000000) -#define SDIO_DataBlockSize_2b ((uint32_t)0x00000010) -#define SDIO_DataBlockSize_4b ((uint32_t)0x00000020) -#define SDIO_DataBlockSize_8b ((uint32_t)0x00000030) -#define SDIO_DataBlockSize_16b ((uint32_t)0x00000040) -#define SDIO_DataBlockSize_32b ((uint32_t)0x00000050) -#define SDIO_DataBlockSize_64b ((uint32_t)0x00000060) -#define SDIO_DataBlockSize_128b ((uint32_t)0x00000070) -#define SDIO_DataBlockSize_256b ((uint32_t)0x00000080) -#define SDIO_DataBlockSize_512b ((uint32_t)0x00000090) -#define SDIO_DataBlockSize_1024b ((uint32_t)0x000000A0) -#define SDIO_DataBlockSize_2048b ((uint32_t)0x000000B0) -#define SDIO_DataBlockSize_4096b ((uint32_t)0x000000C0) -#define SDIO_DataBlockSize_8192b ((uint32_t)0x000000D0) -#define SDIO_DataBlockSize_16384b ((uint32_t)0x000000E0) -#define IS_SDIO_BLOCK_SIZE(SIZE) (((SIZE) == SDIO_DataBlockSize_1b) || \ - ((SIZE) == SDIO_DataBlockSize_2b) || \ - ((SIZE) == SDIO_DataBlockSize_4b) || \ - ((SIZE) == SDIO_DataBlockSize_8b) || \ - ((SIZE) == SDIO_DataBlockSize_16b) || \ - ((SIZE) == SDIO_DataBlockSize_32b) || \ - ((SIZE) == SDIO_DataBlockSize_64b) || \ - ((SIZE) == SDIO_DataBlockSize_128b) || \ - ((SIZE) == SDIO_DataBlockSize_256b) || \ - ((SIZE) == SDIO_DataBlockSize_512b) || \ - ((SIZE) == SDIO_DataBlockSize_1024b) || \ - ((SIZE) == SDIO_DataBlockSize_2048b) || \ - ((SIZE) == SDIO_DataBlockSize_4096b) || \ - ((SIZE) == SDIO_DataBlockSize_8192b) || \ - ((SIZE) == SDIO_DataBlockSize_16384b)) -/** - * @} - */ - -/** @defgroup SDIO_Transfer_Direction - * @{ - */ - -#define SDIO_TransferDir_ToCard ((uint32_t)0x00000000) -#define SDIO_TransferDir_ToSDIO ((uint32_t)0x00000002) -#define IS_SDIO_TRANSFER_DIR(DIR) (((DIR) == SDIO_TransferDir_ToCard) || \ - ((DIR) == SDIO_TransferDir_ToSDIO)) -/** - * @} - */ - -/** @defgroup SDIO_Transfer_Type - * @{ - */ - -#define SDIO_TransferMode_Block ((uint32_t)0x00000000) -#define SDIO_TransferMode_Stream ((uint32_t)0x00000004) -#define IS_SDIO_TRANSFER_MODE(MODE) (((MODE) == SDIO_TransferMode_Stream) || \ - ((MODE) == SDIO_TransferMode_Block)) -/** - * @} - */ - -/** @defgroup SDIO_DPSM_State - * @{ - */ - -#define SDIO_DPSM_Disable ((uint32_t)0x00000000) -#define SDIO_DPSM_Enable ((uint32_t)0x00000001) -#define IS_SDIO_DPSM(DPSM) (((DPSM) == SDIO_DPSM_Enable) || ((DPSM) == SDIO_DPSM_Disable)) -/** - * @} - */ - -/** @defgroup SDIO_Flags - * @{ - */ - -#define SDIO_FLAG_CCRCFAIL ((uint32_t)0x00000001) -#define SDIO_FLAG_DCRCFAIL ((uint32_t)0x00000002) -#define SDIO_FLAG_CTIMEOUT ((uint32_t)0x00000004) -#define SDIO_FLAG_DTIMEOUT ((uint32_t)0x00000008) -#define SDIO_FLAG_TXUNDERR ((uint32_t)0x00000010) -#define SDIO_FLAG_RXOVERR ((uint32_t)0x00000020) -#define SDIO_FLAG_CMDREND ((uint32_t)0x00000040) -#define SDIO_FLAG_CMDSENT ((uint32_t)0x00000080) -#define SDIO_FLAG_DATAEND ((uint32_t)0x00000100) -#define SDIO_FLAG_STBITERR ((uint32_t)0x00000200) -#define SDIO_FLAG_DBCKEND ((uint32_t)0x00000400) -#define SDIO_FLAG_CMDACT ((uint32_t)0x00000800) -#define SDIO_FLAG_TXACT ((uint32_t)0x00001000) -#define SDIO_FLAG_RXACT ((uint32_t)0x00002000) -#define SDIO_FLAG_TXFIFOHE ((uint32_t)0x00004000) -#define SDIO_FLAG_RXFIFOHF ((uint32_t)0x00008000) -#define SDIO_FLAG_TXFIFOF ((uint32_t)0x00010000) -#define SDIO_FLAG_RXFIFOF ((uint32_t)0x00020000) -#define SDIO_FLAG_TXFIFOE ((uint32_t)0x00040000) -#define SDIO_FLAG_RXFIFOE ((uint32_t)0x00080000) -#define SDIO_FLAG_TXDAVL ((uint32_t)0x00100000) -#define SDIO_FLAG_RXDAVL ((uint32_t)0x00200000) -#define SDIO_FLAG_SDIOIT ((uint32_t)0x00400000) -#define SDIO_FLAG_CEATAEND ((uint32_t)0x00800000) -#define IS_SDIO_FLAG(FLAG) (((FLAG) == SDIO_FLAG_CCRCFAIL) || \ - ((FLAG) == SDIO_FLAG_DCRCFAIL) || \ - ((FLAG) == SDIO_FLAG_CTIMEOUT) || \ - ((FLAG) == SDIO_FLAG_DTIMEOUT) || \ - ((FLAG) == SDIO_FLAG_TXUNDERR) || \ - ((FLAG) == SDIO_FLAG_RXOVERR) || \ - ((FLAG) == SDIO_FLAG_CMDREND) || \ - ((FLAG) == SDIO_FLAG_CMDSENT) || \ - ((FLAG) == SDIO_FLAG_DATAEND) || \ - ((FLAG) == SDIO_FLAG_STBITERR) || \ - ((FLAG) == SDIO_FLAG_DBCKEND) || \ - ((FLAG) == SDIO_FLAG_CMDACT) || \ - ((FLAG) == SDIO_FLAG_TXACT) || \ - ((FLAG) == SDIO_FLAG_RXACT) || \ - ((FLAG) == SDIO_FLAG_TXFIFOHE) || \ - ((FLAG) == SDIO_FLAG_RXFIFOHF) || \ - ((FLAG) == SDIO_FLAG_TXFIFOF) || \ - ((FLAG) == SDIO_FLAG_RXFIFOF) || \ - ((FLAG) == SDIO_FLAG_TXFIFOE) || \ - ((FLAG) == SDIO_FLAG_RXFIFOE) || \ - ((FLAG) == SDIO_FLAG_TXDAVL) || \ - ((FLAG) == SDIO_FLAG_RXDAVL) || \ - ((FLAG) == SDIO_FLAG_SDIOIT) || \ - ((FLAG) == SDIO_FLAG_CEATAEND)) - -#define IS_SDIO_CLEAR_FLAG(FLAG) ((((FLAG) & (uint32_t)0xFF3FF800) == 0x00) && ((FLAG) != (uint32_t)0x00)) - -#define IS_SDIO_GET_IT(IT) (((IT) == SDIO_IT_CCRCFAIL) || \ - ((IT) == SDIO_IT_DCRCFAIL) || \ - ((IT) == SDIO_IT_CTIMEOUT) || \ - ((IT) == SDIO_IT_DTIMEOUT) || \ - ((IT) == SDIO_IT_TXUNDERR) || \ - ((IT) == SDIO_IT_RXOVERR) || \ - ((IT) == SDIO_IT_CMDREND) || \ - ((IT) == SDIO_IT_CMDSENT) || \ - ((IT) == SDIO_IT_DATAEND) || \ - ((IT) == SDIO_IT_STBITERR) || \ - ((IT) == SDIO_IT_DBCKEND) || \ - ((IT) == SDIO_IT_CMDACT) || \ - ((IT) == SDIO_IT_TXACT) || \ - ((IT) == SDIO_IT_RXACT) || \ - ((IT) == SDIO_IT_TXFIFOHE) || \ - ((IT) == SDIO_IT_RXFIFOHF) || \ - ((IT) == SDIO_IT_TXFIFOF) || \ - ((IT) == SDIO_IT_RXFIFOF) || \ - ((IT) == SDIO_IT_TXFIFOE) || \ - ((IT) == SDIO_IT_RXFIFOE) || \ - ((IT) == SDIO_IT_TXDAVL) || \ - ((IT) == SDIO_IT_RXDAVL) || \ - ((IT) == SDIO_IT_SDIOIT) || \ - ((IT) == SDIO_IT_CEATAEND)) - -#define IS_SDIO_CLEAR_IT(IT) ((((IT) & (uint32_t)0xFF3FF800) == 0x00) && ((IT) != (uint32_t)0x00)) - -/** - * @} - */ - -/** @defgroup SDIO_Read_Wait_Mode - * @{ - */ - -#define SDIO_ReadWaitMode_CLK ((uint32_t)0x00000000) -#define SDIO_ReadWaitMode_DATA2 ((uint32_t)0x00000001) -#define IS_SDIO_READWAIT_MODE(MODE) (((MODE) == SDIO_ReadWaitMode_CLK) || \ - ((MODE) == SDIO_ReadWaitMode_DATA2)) -/** - * @} - */ - -/** - * @} - */ - -/** @defgroup SDIO_Exported_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup SDIO_Exported_Functions - * @{ - */ - -void SDIO_DeInit(void); -void SDIO_Init(SDIO_InitTypeDef* SDIO_InitStruct); -void SDIO_StructInit(SDIO_InitTypeDef* SDIO_InitStruct); -void SDIO_ClockCmd(FunctionalState NewState); -void SDIO_SetPowerState(uint32_t SDIO_PowerState); -uint32_t SDIO_GetPowerState(void); -void SDIO_ITConfig(uint32_t SDIO_IT, FunctionalState NewState); -void SDIO_DMACmd(FunctionalState NewState); -void SDIO_SendCommand(SDIO_CmdInitTypeDef *SDIO_CmdInitStruct); -void SDIO_CmdStructInit(SDIO_CmdInitTypeDef* SDIO_CmdInitStruct); -uint8_t SDIO_GetCommandResponse(void); -uint32_t SDIO_GetResponse(uint32_t SDIO_RESP); -void SDIO_DataConfig(SDIO_DataInitTypeDef* SDIO_DataInitStruct); -void SDIO_DataStructInit(SDIO_DataInitTypeDef* SDIO_DataInitStruct); -uint32_t SDIO_GetDataCounter(void); -uint32_t SDIO_ReadData(void); -void SDIO_WriteData(uint32_t Data); -uint32_t SDIO_GetFIFOCount(void); -void SDIO_StartSDIOReadWait(FunctionalState NewState); -void SDIO_StopSDIOReadWait(FunctionalState NewState); -void SDIO_SetSDIOReadWaitMode(uint32_t SDIO_ReadWaitMode); -void SDIO_SetSDIOOperation(FunctionalState NewState); -void SDIO_SendSDIOSuspendCmd(FunctionalState NewState); -void SDIO_CommandCompletionCmd(FunctionalState NewState); -void SDIO_CEATAITCmd(FunctionalState NewState); -void SDIO_SendCEATACmd(FunctionalState NewState); -FlagStatus SDIO_GetFlagStatus(uint32_t SDIO_FLAG); -void SDIO_ClearFlag(uint32_t SDIO_FLAG); -ITStatus SDIO_GetITStatus(uint32_t SDIO_IT); -void SDIO_ClearITPendingBit(uint32_t SDIO_IT); - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32F10x_SDIO_H */ -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_spi.h b/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_spi.h deleted file mode 100644 index 22e978145b..0000000000 --- a/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_spi.h +++ /dev/null @@ -1,490 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f10x_spi.h - * @author MCD Application Team - * @version V3.2.0 - * @date 03/01/2010 - * @brief This file contains all the functions prototypes for the SPI firmware - * library. - ****************************************************************************** - * @copy - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2010 STMicroelectronics

- */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F10x_SPI_H -#define __STM32F10x_SPI_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x.h" - -/** @addtogroup STM32F10x_StdPeriph_Driver - * @{ - */ - -/** @addtogroup SPI - * @{ - */ - -/** @defgroup SPI_Exported_Types - * @{ - */ - -/** - * @brief SPI Init structure definition - */ - -typedef struct -{ - uint16_t SPI_Direction; /*!< Specifies the SPI unidirectional or bidirectional data mode. - This parameter can be a value of @ref SPI_data_direction */ - - uint16_t SPI_Mode; /*!< Specifies the SPI operating mode. - This parameter can be a value of @ref SPI_mode */ - - uint16_t SPI_DataSize; /*!< Specifies the SPI data size. - This parameter can be a value of @ref SPI_data_size */ - - uint16_t SPI_CPOL; /*!< Specifies the serial clock steady state. - This parameter can be a value of @ref SPI_Clock_Polarity */ - - uint16_t SPI_CPHA; /*!< Specifies the clock active edge for the bit capture. - This parameter can be a value of @ref SPI_Clock_Phase */ - - uint16_t SPI_NSS; /*!< Specifies whether the NSS signal is managed by - hardware (NSS pin) or by software using the SSI bit. - This parameter can be a value of @ref SPI_Slave_Select_management */ - - uint16_t SPI_BaudRatePrescaler; /*!< Specifies the Baud Rate prescaler value which will be - used to configure the transmit and receive SCK clock. - This parameter can be a value of @ref SPI_BaudRate_Prescaler. - @note The communication clock is derived from the master - clock. The slave clock does not need to be set. */ - - uint16_t SPI_FirstBit; /*!< Specifies whether data transfers start from MSB or LSB bit. - This parameter can be a value of @ref SPI_MSB_LSB_transmission */ - - uint16_t SPI_CRCPolynomial; /*!< Specifies the polynomial used for the CRC calculation. */ -}SPI_InitTypeDef; - -/** - * @brief I2S Init structure definition - */ - -typedef struct -{ - - uint16_t I2S_Mode; /*!< Specifies the I2S operating mode. - This parameter can be a value of @ref I2S_Mode */ - - uint16_t I2S_Standard; /*!< Specifies the standard used for the I2S communication. - This parameter can be a value of @ref I2S_Standard */ - - uint16_t I2S_DataFormat; /*!< Specifies the data format for the I2S communication. - This parameter can be a value of @ref I2S_Data_Format */ - - uint16_t I2S_MCLKOutput; /*!< Specifies whether the I2S MCLK output is enabled or not. - This parameter can be a value of @ref I2S_MCLK_Output */ - - uint32_t I2S_AudioFreq; /*!< Specifies the frequency selected for the I2S communication. - This parameter can be a value of @ref I2S_Audio_Frequency */ - - uint16_t I2S_CPOL; /*!< Specifies the idle state of the I2S clock. - This parameter can be a value of @ref I2S_Clock_Polarity */ -}I2S_InitTypeDef; - -/** - * @} - */ - -/** @defgroup SPI_Exported_Constants - * @{ - */ - -#define IS_SPI_ALL_PERIPH(PERIPH) (((PERIPH) == SPI1) || \ - ((PERIPH) == SPI2) || \ - ((PERIPH) == SPI3)) - -#define IS_SPI_23_PERIPH(PERIPH) (((PERIPH) == SPI2) || \ - ((PERIPH) == SPI3)) - -/** @defgroup SPI_data_direction - * @{ - */ - -#define SPI_Direction_2Lines_FullDuplex ((uint16_t)0x0000) -#define SPI_Direction_2Lines_RxOnly ((uint16_t)0x0400) -#define SPI_Direction_1Line_Rx ((uint16_t)0x8000) -#define SPI_Direction_1Line_Tx ((uint16_t)0xC000) -#define IS_SPI_DIRECTION_MODE(MODE) (((MODE) == SPI_Direction_2Lines_FullDuplex) || \ - ((MODE) == SPI_Direction_2Lines_RxOnly) || \ - ((MODE) == SPI_Direction_1Line_Rx) || \ - ((MODE) == SPI_Direction_1Line_Tx)) -/** - * @} - */ - -/** @defgroup SPI_mode - * @{ - */ - -#define SPI_Mode_Master ((uint16_t)0x0104) -#define SPI_Mode_Slave ((uint16_t)0x0000) -#define IS_SPI_MODE(MODE) (((MODE) == SPI_Mode_Master) || \ - ((MODE) == SPI_Mode_Slave)) -/** - * @} - */ - -/** @defgroup SPI_data_size - * @{ - */ - -#define SPI_DataSize_16b ((uint16_t)0x0800) -#define SPI_DataSize_8b ((uint16_t)0x0000) -#define IS_SPI_DATASIZE(DATASIZE) (((DATASIZE) == SPI_DataSize_16b) || \ - ((DATASIZE) == SPI_DataSize_8b)) -/** - * @} - */ - -/** @defgroup SPI_Clock_Polarity - * @{ - */ - -#define SPI_CPOL_Low ((uint16_t)0x0000) -#define SPI_CPOL_High ((uint16_t)0x0002) -#define IS_SPI_CPOL(CPOL) (((CPOL) == SPI_CPOL_Low) || \ - ((CPOL) == SPI_CPOL_High)) -/** - * @} - */ - -/** @defgroup SPI_Clock_Phase - * @{ - */ - -#define SPI_CPHA_1Edge ((uint16_t)0x0000) -#define SPI_CPHA_2Edge ((uint16_t)0x0001) -#define IS_SPI_CPHA(CPHA) (((CPHA) == SPI_CPHA_1Edge) || \ - ((CPHA) == SPI_CPHA_2Edge)) -/** - * @} - */ - -/** @defgroup SPI_Slave_Select_management - * @{ - */ - -#define SPI_NSS_Soft ((uint16_t)0x0200) -#define SPI_NSS_Hard ((uint16_t)0x0000) -#define IS_SPI_NSS(NSS) (((NSS) == SPI_NSS_Soft) || \ - ((NSS) == SPI_NSS_Hard)) -/** - * @} - */ - -/** @defgroup SPI_BaudRate_Prescaler - * @{ - */ - -#define SPI_BaudRatePrescaler_2 ((uint16_t)0x0000) -#define SPI_BaudRatePrescaler_4 ((uint16_t)0x0008) -#define SPI_BaudRatePrescaler_8 ((uint16_t)0x0010) -#define SPI_BaudRatePrescaler_16 ((uint16_t)0x0018) -#define SPI_BaudRatePrescaler_32 ((uint16_t)0x0020) -#define SPI_BaudRatePrescaler_64 ((uint16_t)0x0028) -#define SPI_BaudRatePrescaler_128 ((uint16_t)0x0030) -#define SPI_BaudRatePrescaler_256 ((uint16_t)0x0038) -#define IS_SPI_BAUDRATE_PRESCALER(PRESCALER) (((PRESCALER) == SPI_BaudRatePrescaler_2) || \ - ((PRESCALER) == SPI_BaudRatePrescaler_4) || \ - ((PRESCALER) == SPI_BaudRatePrescaler_8) || \ - ((PRESCALER) == SPI_BaudRatePrescaler_16) || \ - ((PRESCALER) == SPI_BaudRatePrescaler_32) || \ - ((PRESCALER) == SPI_BaudRatePrescaler_64) || \ - ((PRESCALER) == SPI_BaudRatePrescaler_128) || \ - ((PRESCALER) == SPI_BaudRatePrescaler_256)) -/** - * @} - */ - -/** @defgroup SPI_MSB_LSB_transmission - * @{ - */ - -#define SPI_FirstBit_MSB ((uint16_t)0x0000) -#define SPI_FirstBit_LSB ((uint16_t)0x0080) -#define IS_SPI_FIRST_BIT(BIT) (((BIT) == SPI_FirstBit_MSB) || \ - ((BIT) == SPI_FirstBit_LSB)) -/** - * @} - */ - -/** @defgroup I2S_Mode - * @{ - */ - -#define I2S_Mode_SlaveTx ((uint16_t)0x0000) -#define I2S_Mode_SlaveRx ((uint16_t)0x0100) -#define I2S_Mode_MasterTx ((uint16_t)0x0200) -#define I2S_Mode_MasterRx ((uint16_t)0x0300) -#define IS_I2S_MODE(MODE) (((MODE) == I2S_Mode_SlaveTx) || \ - ((MODE) == I2S_Mode_SlaveRx) || \ - ((MODE) == I2S_Mode_MasterTx) || \ - ((MODE) == I2S_Mode_MasterRx) ) -/** - * @} - */ - -/** @defgroup I2S_Standard - * @{ - */ - -#define I2S_Standard_Phillips ((uint16_t)0x0000) -#define I2S_Standard_MSB ((uint16_t)0x0010) -#define I2S_Standard_LSB ((uint16_t)0x0020) -#define I2S_Standard_PCMShort ((uint16_t)0x0030) -#define I2S_Standard_PCMLong ((uint16_t)0x00B0) -#define IS_I2S_STANDARD(STANDARD) (((STANDARD) == I2S_Standard_Phillips) || \ - ((STANDARD) == I2S_Standard_MSB) || \ - ((STANDARD) == I2S_Standard_LSB) || \ - ((STANDARD) == I2S_Standard_PCMShort) || \ - ((STANDARD) == I2S_Standard_PCMLong)) -/** - * @} - */ - -/** @defgroup I2S_Data_Format - * @{ - */ - -#define I2S_DataFormat_16b ((uint16_t)0x0000) -#define I2S_DataFormat_16bextended ((uint16_t)0x0001) -#define I2S_DataFormat_24b ((uint16_t)0x0003) -#define I2S_DataFormat_32b ((uint16_t)0x0005) -#define IS_I2S_DATA_FORMAT(FORMAT) (((FORMAT) == I2S_DataFormat_16b) || \ - ((FORMAT) == I2S_DataFormat_16bextended) || \ - ((FORMAT) == I2S_DataFormat_24b) || \ - ((FORMAT) == I2S_DataFormat_32b)) -/** - * @} - */ - -/** @defgroup I2S_MCLK_Output - * @{ - */ - -#define I2S_MCLKOutput_Enable ((uint16_t)0x0200) -#define I2S_MCLKOutput_Disable ((uint16_t)0x0000) -#define IS_I2S_MCLK_OUTPUT(OUTPUT) (((OUTPUT) == I2S_MCLKOutput_Enable) || \ - ((OUTPUT) == I2S_MCLKOutput_Disable)) -/** - * @} - */ - -/** @defgroup I2S_Audio_Frequency - * @{ - */ - -#define I2S_AudioFreq_96k ((uint32_t)96000) -#define I2S_AudioFreq_48k ((uint32_t)48000) -#define I2S_AudioFreq_44k ((uint32_t)44100) -#define I2S_AudioFreq_32k ((uint32_t)32000) -#define I2S_AudioFreq_22k ((uint32_t)22050) -#define I2S_AudioFreq_16k ((uint32_t)16000) -#define I2S_AudioFreq_11k ((uint32_t)11025) -#define I2S_AudioFreq_8k ((uint32_t)8000) -#define I2S_AudioFreq_Default ((uint32_t)2) -#define IS_I2S_AUDIO_FREQ(FREQ) (((FREQ) == I2S_AudioFreq_96k) || \ - ((FREQ) == I2S_AudioFreq_48k) || \ - ((FREQ) == I2S_AudioFreq_44k) || \ - ((FREQ) == I2S_AudioFreq_32k) || \ - ((FREQ) == I2S_AudioFreq_22k) || \ - ((FREQ) == I2S_AudioFreq_16k) || \ - ((FREQ) == I2S_AudioFreq_11k) || \ - ((FREQ) == I2S_AudioFreq_8k) || \ - ((FREQ) == I2S_AudioFreq_Default)) -/** - * @} - */ - -/** @defgroup I2S_Clock_Polarity - * @{ - */ - -#define I2S_CPOL_Low ((uint16_t)0x0000) -#define I2S_CPOL_High ((uint16_t)0x0008) -#define IS_I2S_CPOL(CPOL) (((CPOL) == I2S_CPOL_Low) || \ - ((CPOL) == I2S_CPOL_High)) -/** - * @} - */ - -/** @defgroup SPI_I2S_DMA_transfer_requests - * @{ - */ - -#define SPI_I2S_DMAReq_Tx ((uint16_t)0x0002) -#define SPI_I2S_DMAReq_Rx ((uint16_t)0x0001) -#define IS_SPI_I2S_DMAREQ(DMAREQ) ((((DMAREQ) & (uint16_t)0xFFFC) == 0x00) && ((DMAREQ) != 0x00)) -/** - * @} - */ - -/** @defgroup SPI_NSS_internal_software_mangement - * @{ - */ - -#define SPI_NSSInternalSoft_Set ((uint16_t)0x0100) -#define SPI_NSSInternalSoft_Reset ((uint16_t)0xFEFF) -#define IS_SPI_NSS_INTERNAL(INTERNAL) (((INTERNAL) == SPI_NSSInternalSoft_Set) || \ - ((INTERNAL) == SPI_NSSInternalSoft_Reset)) -/** - * @} - */ - -/** @defgroup SPI_CRC_Transmit_Receive - * @{ - */ - -#define SPI_CRC_Tx ((uint8_t)0x00) -#define SPI_CRC_Rx ((uint8_t)0x01) -#define IS_SPI_CRC(CRC) (((CRC) == SPI_CRC_Tx) || ((CRC) == SPI_CRC_Rx)) -/** - * @} - */ - -/** @defgroup SPI_direction_transmit_receive - * @{ - */ - -#define SPI_Direction_Rx ((uint16_t)0xBFFF) -#define SPI_Direction_Tx ((uint16_t)0x4000) -#define IS_SPI_DIRECTION(DIRECTION) (((DIRECTION) == SPI_Direction_Rx) || \ - ((DIRECTION) == SPI_Direction_Tx)) -/** - * @} - */ - -/** @defgroup SPI_I2S_interrupts_definition - * @{ - */ - -#define SPI_I2S_IT_TXE ((uint8_t)0x71) -#define SPI_I2S_IT_RXNE ((uint8_t)0x60) -#define SPI_I2S_IT_ERR ((uint8_t)0x50) -#define IS_SPI_I2S_CONFIG_IT(IT) (((IT) == SPI_I2S_IT_TXE) || \ - ((IT) == SPI_I2S_IT_RXNE) || \ - ((IT) == SPI_I2S_IT_ERR)) -#define SPI_I2S_IT_OVR ((uint8_t)0x56) -#define SPI_IT_MODF ((uint8_t)0x55) -#define SPI_IT_CRCERR ((uint8_t)0x54) -#define I2S_IT_UDR ((uint8_t)0x53) -#define IS_SPI_I2S_CLEAR_IT(IT) (((IT) == SPI_IT_CRCERR)) -#define IS_SPI_I2S_GET_IT(IT) (((IT) == SPI_I2S_IT_RXNE) || ((IT) == SPI_I2S_IT_TXE) || \ - ((IT) == I2S_IT_UDR) || ((IT) == SPI_IT_CRCERR) || \ - ((IT) == SPI_IT_MODF) || ((IT) == SPI_I2S_IT_OVR)) -/** - * @} - */ - -/** @defgroup SPI_I2S_flags_definition - * @{ - */ - -#define SPI_I2S_FLAG_RXNE ((uint16_t)0x0001) -#define SPI_I2S_FLAG_TXE ((uint16_t)0x0002) -#define I2S_FLAG_CHSIDE ((uint16_t)0x0004) -#define I2S_FLAG_UDR ((uint16_t)0x0008) -#define SPI_FLAG_CRCERR ((uint16_t)0x0010) -#define SPI_FLAG_MODF ((uint16_t)0x0020) -#define SPI_I2S_FLAG_OVR ((uint16_t)0x0040) -#define SPI_I2S_FLAG_BSY ((uint16_t)0x0080) -#define IS_SPI_I2S_CLEAR_FLAG(FLAG) (((FLAG) == SPI_FLAG_CRCERR)) -#define IS_SPI_I2S_GET_FLAG(FLAG) (((FLAG) == SPI_I2S_FLAG_BSY) || ((FLAG) == SPI_I2S_FLAG_OVR) || \ - ((FLAG) == SPI_FLAG_MODF) || ((FLAG) == SPI_FLAG_CRCERR) || \ - ((FLAG) == I2S_FLAG_UDR) || ((FLAG) == I2S_FLAG_CHSIDE) || \ - ((FLAG) == SPI_I2S_FLAG_TXE) || ((FLAG) == SPI_I2S_FLAG_RXNE)) -/** - * @} - */ - -/** @defgroup SPI_CRC_polynomial - * @{ - */ - -#define IS_SPI_CRC_POLYNOMIAL(POLYNOMIAL) ((POLYNOMIAL) >= 0x1) -/** - * @} - */ - -/** - * @} - */ - -/** @defgroup SPI_Exported_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup SPI_Exported_Functions - * @{ - */ - -void SPI_I2S_DeInit(SPI_TypeDef* SPIx); -void SPI_Init(SPI_TypeDef* SPIx, SPI_InitTypeDef* SPI_InitStruct); -void I2S_Init(SPI_TypeDef* SPIx, I2S_InitTypeDef* I2S_InitStruct); -void SPI_StructInit(SPI_InitTypeDef* SPI_InitStruct); -void I2S_StructInit(I2S_InitTypeDef* I2S_InitStruct); -void SPI_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState); -void I2S_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState); -void SPI_I2S_ITConfig(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT, FunctionalState NewState); -void SPI_I2S_DMACmd(SPI_TypeDef* SPIx, uint16_t SPI_I2S_DMAReq, FunctionalState NewState); -void SPI_I2S_SendData(SPI_TypeDef* SPIx, uint16_t Data); -uint16_t SPI_I2S_ReceiveData(SPI_TypeDef* SPIx); -void SPI_NSSInternalSoftwareConfig(SPI_TypeDef* SPIx, uint16_t SPI_NSSInternalSoft); -void SPI_SSOutputCmd(SPI_TypeDef* SPIx, FunctionalState NewState); -void SPI_DataSizeConfig(SPI_TypeDef* SPIx, uint16_t SPI_DataSize); -void SPI_TransmitCRC(SPI_TypeDef* SPIx); -void SPI_CalculateCRC(SPI_TypeDef* SPIx, FunctionalState NewState); -uint16_t SPI_GetCRC(SPI_TypeDef* SPIx, uint8_t SPI_CRC); -uint16_t SPI_GetCRCPolynomial(SPI_TypeDef* SPIx); -void SPI_BiDirectionalLineConfig(SPI_TypeDef* SPIx, uint16_t SPI_Direction); -FlagStatus SPI_I2S_GetFlagStatus(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG); -void SPI_I2S_ClearFlag(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG); -ITStatus SPI_I2S_GetITStatus(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT); -void SPI_I2S_ClearITPendingBit(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT); - -#ifdef __cplusplus -} -#endif - -#endif /*__STM32F10x_SPI_H */ -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_tim.h b/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_tim.h deleted file mode 100644 index de89ea64dd..0000000000 --- a/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_tim.h +++ /dev/null @@ -1,1067 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f10x_tim.h - * @author MCD Application Team - * @version V3.2.0 - * @date 03/01/2010 - * @brief This file contains all the functions prototypes for the TIM firmware - * library. - ****************************************************************************** - * @copy - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2010 STMicroelectronics

- */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F10x_TIM_H -#define __STM32F10x_TIM_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x.h" - -/** @addtogroup STM32F10x_StdPeriph_Driver - * @{ - */ - -/** @addtogroup TIM - * @{ - */ - -/** @defgroup TIM_Exported_Types - * @{ - */ - -/** - * @brief TIM Time Base Init structure definition - * @note This sturcture is used with all TIMx except for TIM6 and TIM7. - */ - -typedef struct -{ - uint16_t TIM_Prescaler; /*!< Specifies the prescaler value used to divide the TIM clock. - This parameter can be a number between 0x0000 and 0xFFFF */ - - uint16_t TIM_CounterMode; /*!< Specifies the counter mode. - This parameter can be a value of @ref TIM_Counter_Mode */ - - uint16_t TIM_Period; /*!< Specifies the period value to be loaded into the active - Auto-Reload Register at the next update event. - This parameter must be a number between 0x0000 and 0xFFFF. */ - - uint16_t TIM_ClockDivision; /*!< Specifies the clock division. - This parameter can be a value of @ref TIM_Clock_Division_CKD */ - - uint8_t TIM_RepetitionCounter; /*!< Specifies the repetition counter value. Each time the RCR downcounter - reaches zero, an update event is generated and counting restarts - from the RCR value (N). - This means in PWM mode that (N+1) corresponds to: - - the number of PWM periods in edge-aligned mode - - the number of half PWM period in center-aligned mode - This parameter must be a number between 0x00 and 0xFF. - @note This parameter is valid only for TIM1 and TIM8. */ -} TIM_TimeBaseInitTypeDef; - -/** - * @brief TIM Output Compare Init structure definition - */ - -typedef struct -{ - uint16_t TIM_OCMode; /*!< Specifies the TIM mode. - This parameter can be a value of @ref TIM_Output_Compare_and_PWM_modes */ - - uint16_t TIM_OutputState; /*!< Specifies the TIM Output Compare state. - This parameter can be a value of @ref TIM_Output_Compare_state */ - - uint16_t TIM_OutputNState; /*!< Specifies the TIM complementary Output Compare state. - This parameter can be a value of @ref TIM_Output_Compare_N_state - @note This parameter is valid only for TIM1 and TIM8. */ - - uint16_t TIM_Pulse; /*!< Specifies the pulse value to be loaded into the Capture Compare Register. - This parameter can be a number between 0x0000 and 0xFFFF */ - - uint16_t TIM_OCPolarity; /*!< Specifies the output polarity. - This parameter can be a value of @ref TIM_Output_Compare_Polarity */ - - uint16_t TIM_OCNPolarity; /*!< Specifies the complementary output polarity. - This parameter can be a value of @ref TIM_Output_Compare_N_Polarity - @note This parameter is valid only for TIM1 and TIM8. */ - - uint16_t TIM_OCIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state. - This parameter can be a value of @ref TIM_Output_Compare_Idle_State - @note This parameter is valid only for TIM1 and TIM8. */ - - uint16_t TIM_OCNIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state. - This parameter can be a value of @ref TIM_Output_Compare_N_Idle_State - @note This parameter is valid only for TIM1 and TIM8. */ -} TIM_OCInitTypeDef; - -/** - * @brief TIM Input Capture Init structure definition - */ - -typedef struct -{ - - uint16_t TIM_Channel; /*!< Specifies the TIM channel. - This parameter can be a value of @ref TIM_Channel */ - - uint16_t TIM_ICPolarity; /*!< Specifies the active edge of the input signal. - This parameter can be a value of @ref TIM_Input_Capture_Polarity */ - - uint16_t TIM_ICSelection; /*!< Specifies the input. - This parameter can be a value of @ref TIM_Input_Capture_Selection */ - - uint16_t TIM_ICPrescaler; /*!< Specifies the Input Capture Prescaler. - This parameter can be a value of @ref TIM_Input_Capture_Prescaler */ - - uint16_t TIM_ICFilter; /*!< Specifies the input capture filter. - This parameter can be a number between 0x0 and 0xF */ -} TIM_ICInitTypeDef; - -/** - * @brief BDTR structure definition - * @note This sturcture is used only with TIM1 and TIM8. - */ - -typedef struct -{ - - uint16_t TIM_OSSRState; /*!< Specifies the Off-State selection used in Run mode. - This parameter can be a value of @ref OSSR_Off_State_Selection_for_Run_mode_state */ - - uint16_t TIM_OSSIState; /*!< Specifies the Off-State used in Idle state. - This parameter can be a value of @ref OSSI_Off_State_Selection_for_Idle_mode_state */ - - uint16_t TIM_LOCKLevel; /*!< Specifies the LOCK level parameters. - This parameter can be a value of @ref Lock_level */ - - uint16_t TIM_DeadTime; /*!< Specifies the delay time between the switching-off and the - switching-on of the outputs. - This parameter can be a number between 0x00 and 0xFF */ - - uint16_t TIM_Break; /*!< Specifies whether the TIM Break input is enabled or not. - This parameter can be a value of @ref Break_Input_enable_disable */ - - uint16_t TIM_BreakPolarity; /*!< Specifies the TIM Break Input pin polarity. - This parameter can be a value of @ref Break_Polarity */ - - uint16_t TIM_AutomaticOutput; /*!< Specifies whether the TIM Automatic Output feature is enabled or not. - This parameter can be a value of @ref TIM_AOE_Bit_Set_Reset */ -} TIM_BDTRInitTypeDef; - -/** @defgroup TIM_Exported_constants - * @{ - */ - -#define IS_TIM_ALL_PERIPH(PERIPH) (((PERIPH) == TIM1) || \ - ((PERIPH) == TIM2) || \ - ((PERIPH) == TIM3) || \ - ((PERIPH) == TIM4) || \ - ((PERIPH) == TIM5) || \ - ((PERIPH) == TIM6) || \ - ((PERIPH) == TIM7) || \ - ((PERIPH) == TIM8) || \ - ((PERIPH) == TIM15) || \ - ((PERIPH) == TIM16) || \ - ((PERIPH) == TIM17)) - -#define IS_TIM_18_PERIPH(PERIPH) (((PERIPH) == TIM1) || \ - ((PERIPH) == TIM8)) - -#define IS_TIM_18151617_PERIPH(PERIPH) (((PERIPH) == TIM1) || \ - ((PERIPH) == TIM8) || \ - ((PERIPH) == TIM15) || \ - ((PERIPH) == TIM16) || \ - ((PERIPH) == TIM17)) - -#define IS_TIM_123458_PERIPH(PERIPH) (((PERIPH) == TIM1) || \ - ((PERIPH) == TIM2) || \ - ((PERIPH) == TIM3) || \ - ((PERIPH) == TIM4) || \ - ((PERIPH) == TIM5) || \ - ((PERIPH) == TIM8)) - -#define IS_TIM_123458151617_PERIPH(PERIPH) (((PERIPH) == TIM1) || \ - ((PERIPH) == TIM2) || \ - ((PERIPH) == TIM3) || \ - ((PERIPH) == TIM4) || \ - ((PERIPH) == TIM5) || \ - ((PERIPH) == TIM8) || \ - ((PERIPH) == TIM15) || \ - ((PERIPH) == TIM16) || \ - ((PERIPH) == TIM17)) - -#define IS_TIM_12345815_PERIPH(PERIPH) (((PERIPH) == TIM1) || \ - ((PERIPH) == TIM2) || \ - ((PERIPH) == TIM3) || \ - ((PERIPH) == TIM4) || \ - ((PERIPH) == TIM5) || \ - ((PERIPH) == TIM8) || \ - ((PERIPH) == TIM15)) -/** - * @} - */ - -/** @defgroup TIM_Output_Compare_and_PWM_modes - * @{ - */ - -#define TIM_OCMode_Timing ((uint16_t)0x0000) -#define TIM_OCMode_Active ((uint16_t)0x0010) -#define TIM_OCMode_Inactive ((uint16_t)0x0020) -#define TIM_OCMode_Toggle ((uint16_t)0x0030) -#define TIM_OCMode_PWM1 ((uint16_t)0x0060) -#define TIM_OCMode_PWM2 ((uint16_t)0x0070) -#define IS_TIM_OC_MODE(MODE) (((MODE) == TIM_OCMode_Timing) || \ - ((MODE) == TIM_OCMode_Active) || \ - ((MODE) == TIM_OCMode_Inactive) || \ - ((MODE) == TIM_OCMode_Toggle)|| \ - ((MODE) == TIM_OCMode_PWM1) || \ - ((MODE) == TIM_OCMode_PWM2)) -#define IS_TIM_OCM(MODE) (((MODE) == TIM_OCMode_Timing) || \ - ((MODE) == TIM_OCMode_Active) || \ - ((MODE) == TIM_OCMode_Inactive) || \ - ((MODE) == TIM_OCMode_Toggle)|| \ - ((MODE) == TIM_OCMode_PWM1) || \ - ((MODE) == TIM_OCMode_PWM2) || \ - ((MODE) == TIM_ForcedAction_Active) || \ - ((MODE) == TIM_ForcedAction_InActive)) -/** - * @} - */ - -/** @defgroup TIM_One_Pulse_Mode - * @{ - */ - -#define TIM_OPMode_Single ((uint16_t)0x0008) -#define TIM_OPMode_Repetitive ((uint16_t)0x0000) -#define IS_TIM_OPM_MODE(MODE) (((MODE) == TIM_OPMode_Single) || \ - ((MODE) == TIM_OPMode_Repetitive)) -/** - * @} - */ - -/** @defgroup TIM_Channel - * @{ - */ - -#define TIM_Channel_1 ((uint16_t)0x0000) -#define TIM_Channel_2 ((uint16_t)0x0004) -#define TIM_Channel_3 ((uint16_t)0x0008) -#define TIM_Channel_4 ((uint16_t)0x000C) -#define IS_TIM_CHANNEL(CHANNEL) (((CHANNEL) == TIM_Channel_1) || \ - ((CHANNEL) == TIM_Channel_2) || \ - ((CHANNEL) == TIM_Channel_3) || \ - ((CHANNEL) == TIM_Channel_4)) -#define IS_TIM_PWMI_CHANNEL(CHANNEL) (((CHANNEL) == TIM_Channel_1) || \ - ((CHANNEL) == TIM_Channel_2)) -#define IS_TIM_COMPLEMENTARY_CHANNEL(CHANNEL) (((CHANNEL) == TIM_Channel_1) || \ - ((CHANNEL) == TIM_Channel_2) || \ - ((CHANNEL) == TIM_Channel_3)) -/** - * @} - */ - -/** @defgroup TIM_Clock_Division_CKD - * @{ - */ - -#define TIM_CKD_DIV1 ((uint16_t)0x0000) -#define TIM_CKD_DIV2 ((uint16_t)0x0100) -#define TIM_CKD_DIV4 ((uint16_t)0x0200) -#define IS_TIM_CKD_DIV(DIV) (((DIV) == TIM_CKD_DIV1) || \ - ((DIV) == TIM_CKD_DIV2) || \ - ((DIV) == TIM_CKD_DIV4)) -/** - * @} - */ - -/** @defgroup TIM_Counter_Mode - * @{ - */ - -#define TIM_CounterMode_Up ((uint16_t)0x0000) -#define TIM_CounterMode_Down ((uint16_t)0x0010) -#define TIM_CounterMode_CenterAligned1 ((uint16_t)0x0020) -#define TIM_CounterMode_CenterAligned2 ((uint16_t)0x0040) -#define TIM_CounterMode_CenterAligned3 ((uint16_t)0x0060) -#define IS_TIM_COUNTER_MODE(MODE) (((MODE) == TIM_CounterMode_Up) || \ - ((MODE) == TIM_CounterMode_Down) || \ - ((MODE) == TIM_CounterMode_CenterAligned1) || \ - ((MODE) == TIM_CounterMode_CenterAligned2) || \ - ((MODE) == TIM_CounterMode_CenterAligned3)) -/** - * @} - */ - -/** @defgroup TIM_Output_Compare_Polarity - * @{ - */ - -#define TIM_OCPolarity_High ((uint16_t)0x0000) -#define TIM_OCPolarity_Low ((uint16_t)0x0002) -#define IS_TIM_OC_POLARITY(POLARITY) (((POLARITY) == TIM_OCPolarity_High) || \ - ((POLARITY) == TIM_OCPolarity_Low)) -/** - * @} - */ - -/** @defgroup TIM_Output_Compare_N_Polarity - * @{ - */ - -#define TIM_OCNPolarity_High ((uint16_t)0x0000) -#define TIM_OCNPolarity_Low ((uint16_t)0x0008) -#define IS_TIM_OCN_POLARITY(POLARITY) (((POLARITY) == TIM_OCNPolarity_High) || \ - ((POLARITY) == TIM_OCNPolarity_Low)) -/** - * @} - */ - -/** @defgroup TIM_Output_Compare_state - * @{ - */ - -#define TIM_OutputState_Disable ((uint16_t)0x0000) -#define TIM_OutputState_Enable ((uint16_t)0x0001) -#define IS_TIM_OUTPUT_STATE(STATE) (((STATE) == TIM_OutputState_Disable) || \ - ((STATE) == TIM_OutputState_Enable)) -/** - * @} - */ - -/** @defgroup TIM_Output_Compare_N_state - * @{ - */ - -#define TIM_OutputNState_Disable ((uint16_t)0x0000) -#define TIM_OutputNState_Enable ((uint16_t)0x0004) -#define IS_TIM_OUTPUTN_STATE(STATE) (((STATE) == TIM_OutputNState_Disable) || \ - ((STATE) == TIM_OutputNState_Enable)) -/** - * @} - */ - -/** @defgroup TIM_Capture_Compare_state - * @{ - */ - -#define TIM_CCx_Enable ((uint16_t)0x0001) -#define TIM_CCx_Disable ((uint16_t)0x0000) -#define IS_TIM_CCX(CCX) (((CCX) == TIM_CCx_Enable) || \ - ((CCX) == TIM_CCx_Disable)) -/** - * @} - */ - -/** @defgroup TIM_Capture_Compare_N_state - * @{ - */ - -#define TIM_CCxN_Enable ((uint16_t)0x0004) -#define TIM_CCxN_Disable ((uint16_t)0x0000) -#define IS_TIM_CCXN(CCXN) (((CCXN) == TIM_CCxN_Enable) || \ - ((CCXN) == TIM_CCxN_Disable)) -/** - * @} - */ - -/** @defgroup Break_Input_enable_disable - * @{ - */ - -#define TIM_Break_Enable ((uint16_t)0x1000) -#define TIM_Break_Disable ((uint16_t)0x0000) -#define IS_TIM_BREAK_STATE(STATE) (((STATE) == TIM_Break_Enable) || \ - ((STATE) == TIM_Break_Disable)) -/** - * @} - */ - -/** @defgroup Break_Polarity - * @{ - */ - -#define TIM_BreakPolarity_Low ((uint16_t)0x0000) -#define TIM_BreakPolarity_High ((uint16_t)0x2000) -#define IS_TIM_BREAK_POLARITY(POLARITY) (((POLARITY) == TIM_BreakPolarity_Low) || \ - ((POLARITY) == TIM_BreakPolarity_High)) -/** - * @} - */ - -/** @defgroup TIM_AOE_Bit_Set_Reset - * @{ - */ - -#define TIM_AutomaticOutput_Enable ((uint16_t)0x4000) -#define TIM_AutomaticOutput_Disable ((uint16_t)0x0000) -#define IS_TIM_AUTOMATIC_OUTPUT_STATE(STATE) (((STATE) == TIM_AutomaticOutput_Enable) || \ - ((STATE) == TIM_AutomaticOutput_Disable)) -/** - * @} - */ - -/** @defgroup Lock_level - * @{ - */ - -#define TIM_LOCKLevel_OFF ((uint16_t)0x0000) -#define TIM_LOCKLevel_1 ((uint16_t)0x0100) -#define TIM_LOCKLevel_2 ((uint16_t)0x0200) -#define TIM_LOCKLevel_3 ((uint16_t)0x0300) -#define IS_TIM_LOCK_LEVEL(LEVEL) (((LEVEL) == TIM_LOCKLevel_OFF) || \ - ((LEVEL) == TIM_LOCKLevel_1) || \ - ((LEVEL) == TIM_LOCKLevel_2) || \ - ((LEVEL) == TIM_LOCKLevel_3)) -/** - * @} - */ - -/** @defgroup OSSI_Off_State_Selection_for_Idle_mode_state - * @{ - */ - -#define TIM_OSSIState_Enable ((uint16_t)0x0400) -#define TIM_OSSIState_Disable ((uint16_t)0x0000) -#define IS_TIM_OSSI_STATE(STATE) (((STATE) == TIM_OSSIState_Enable) || \ - ((STATE) == TIM_OSSIState_Disable)) -/** - * @} - */ - -/** @defgroup OSSR_Off_State_Selection_for_Run_mode_state - * @{ - */ - -#define TIM_OSSRState_Enable ((uint16_t)0x0800) -#define TIM_OSSRState_Disable ((uint16_t)0x0000) -#define IS_TIM_OSSR_STATE(STATE) (((STATE) == TIM_OSSRState_Enable) || \ - ((STATE) == TIM_OSSRState_Disable)) -/** - * @} - */ - -/** @defgroup TIM_Output_Compare_Idle_State - * @{ - */ - -#define TIM_OCIdleState_Set ((uint16_t)0x0100) -#define TIM_OCIdleState_Reset ((uint16_t)0x0000) -#define IS_TIM_OCIDLE_STATE(STATE) (((STATE) == TIM_OCIdleState_Set) || \ - ((STATE) == TIM_OCIdleState_Reset)) -/** - * @} - */ - -/** @defgroup TIM_Output_Compare_N_Idle_State - * @{ - */ - -#define TIM_OCNIdleState_Set ((uint16_t)0x0200) -#define TIM_OCNIdleState_Reset ((uint16_t)0x0000) -#define IS_TIM_OCNIDLE_STATE(STATE) (((STATE) == TIM_OCNIdleState_Set) || \ - ((STATE) == TIM_OCNIdleState_Reset)) -/** - * @} - */ - -/** @defgroup TIM_Input_Capture_Polarity - * @{ - */ - -#define TIM_ICPolarity_Rising ((uint16_t)0x0000) -#define TIM_ICPolarity_Falling ((uint16_t)0x0002) -#define IS_TIM_IC_POLARITY(POLARITY) (((POLARITY) == TIM_ICPolarity_Rising) || \ - ((POLARITY) == TIM_ICPolarity_Falling)) -/** - * @} - */ - -/** @defgroup TIM_Input_Capture_Selection - * @{ - */ - -#define TIM_ICSelection_DirectTI ((uint16_t)0x0001) /*!< TIM Input 1, 2, 3 or 4 is selected to be - connected to IC1, IC2, IC3 or IC4, respectively */ -#define TIM_ICSelection_IndirectTI ((uint16_t)0x0002) /*!< TIM Input 1, 2, 3 or 4 is selected to be - connected to IC2, IC1, IC4 or IC3, respectively. */ -#define TIM_ICSelection_TRC ((uint16_t)0x0003) /*!< TIM Input 1, 2, 3 or 4 is selected to be connected to TRC. */ -#define IS_TIM_IC_SELECTION(SELECTION) (((SELECTION) == TIM_ICSelection_DirectTI) || \ - ((SELECTION) == TIM_ICSelection_IndirectTI) || \ - ((SELECTION) == TIM_ICSelection_TRC)) -/** - * @} - */ - -/** @defgroup TIM_Input_Capture_Prescaler - * @{ - */ - -#define TIM_ICPSC_DIV1 ((uint16_t)0x0000) /*!< Capture performed each time an edge is detected on the capture input. */ -#define TIM_ICPSC_DIV2 ((uint16_t)0x0004) /*!< Capture performed once every 2 events. */ -#define TIM_ICPSC_DIV4 ((uint16_t)0x0008) /*!< Capture performed once every 4 events. */ -#define TIM_ICPSC_DIV8 ((uint16_t)0x000C) /*!< Capture performed once every 8 events. */ -#define IS_TIM_IC_PRESCALER(PRESCALER) (((PRESCALER) == TIM_ICPSC_DIV1) || \ - ((PRESCALER) == TIM_ICPSC_DIV2) || \ - ((PRESCALER) == TIM_ICPSC_DIV4) || \ - ((PRESCALER) == TIM_ICPSC_DIV8)) -/** - * @} - */ - -/** @defgroup TIM_interrupt_sources - * @{ - */ - -#define TIM_IT_Update ((uint16_t)0x0001) -#define TIM_IT_CC1 ((uint16_t)0x0002) -#define TIM_IT_CC2 ((uint16_t)0x0004) -#define TIM_IT_CC3 ((uint16_t)0x0008) -#define TIM_IT_CC4 ((uint16_t)0x0010) -#define TIM_IT_COM ((uint16_t)0x0020) -#define TIM_IT_Trigger ((uint16_t)0x0040) -#define TIM_IT_Break ((uint16_t)0x0080) -#define IS_TIM_IT(IT) ((((IT) & (uint16_t)0xFF00) == 0x0000) && ((IT) != 0x0000)) - -#define IS_TIM_GET_IT(IT) (((IT) == TIM_IT_Update) || \ - ((IT) == TIM_IT_CC1) || \ - ((IT) == TIM_IT_CC2) || \ - ((IT) == TIM_IT_CC3) || \ - ((IT) == TIM_IT_CC4) || \ - ((IT) == TIM_IT_COM) || \ - ((IT) == TIM_IT_Trigger) || \ - ((IT) == TIM_IT_Break)) -/** - * @} - */ - -/** @defgroup TIM_DMA_Base_address - * @{ - */ - -#define TIM_DMABase_CR1 ((uint16_t)0x0000) -#define TIM_DMABase_CR2 ((uint16_t)0x0001) -#define TIM_DMABase_SMCR ((uint16_t)0x0002) -#define TIM_DMABase_DIER ((uint16_t)0x0003) -#define TIM_DMABase_SR ((uint16_t)0x0004) -#define TIM_DMABase_EGR ((uint16_t)0x0005) -#define TIM_DMABase_CCMR1 ((uint16_t)0x0006) -#define TIM_DMABase_CCMR2 ((uint16_t)0x0007) -#define TIM_DMABase_CCER ((uint16_t)0x0008) -#define TIM_DMABase_CNT ((uint16_t)0x0009) -#define TIM_DMABase_PSC ((uint16_t)0x000A) -#define TIM_DMABase_ARR ((uint16_t)0x000B) -#define TIM_DMABase_RCR ((uint16_t)0x000C) -#define TIM_DMABase_CCR1 ((uint16_t)0x000D) -#define TIM_DMABase_CCR2 ((uint16_t)0x000E) -#define TIM_DMABase_CCR3 ((uint16_t)0x000F) -#define TIM_DMABase_CCR4 ((uint16_t)0x0010) -#define TIM_DMABase_BDTR ((uint16_t)0x0011) -#define TIM_DMABase_DCR ((uint16_t)0x0012) -#define IS_TIM_DMA_BASE(BASE) (((BASE) == TIM_DMABase_CR1) || \ - ((BASE) == TIM_DMABase_CR2) || \ - ((BASE) == TIM_DMABase_SMCR) || \ - ((BASE) == TIM_DMABase_DIER) || \ - ((BASE) == TIM_DMABase_SR) || \ - ((BASE) == TIM_DMABase_EGR) || \ - ((BASE) == TIM_DMABase_CCMR1) || \ - ((BASE) == TIM_DMABase_CCMR2) || \ - ((BASE) == TIM_DMABase_CCER) || \ - ((BASE) == TIM_DMABase_CNT) || \ - ((BASE) == TIM_DMABase_PSC) || \ - ((BASE) == TIM_DMABase_ARR) || \ - ((BASE) == TIM_DMABase_RCR) || \ - ((BASE) == TIM_DMABase_CCR1) || \ - ((BASE) == TIM_DMABase_CCR2) || \ - ((BASE) == TIM_DMABase_CCR3) || \ - ((BASE) == TIM_DMABase_CCR4) || \ - ((BASE) == TIM_DMABase_BDTR) || \ - ((BASE) == TIM_DMABase_DCR)) -/** - * @} - */ - -/** @defgroup TIM_DMA_Burst_Length - * @{ - */ - -#define TIM_DMABurstLength_1Byte ((uint16_t)0x0000) -#define TIM_DMABurstLength_2Bytes ((uint16_t)0x0100) -#define TIM_DMABurstLength_3Bytes ((uint16_t)0x0200) -#define TIM_DMABurstLength_4Bytes ((uint16_t)0x0300) -#define TIM_DMABurstLength_5Bytes ((uint16_t)0x0400) -#define TIM_DMABurstLength_6Bytes ((uint16_t)0x0500) -#define TIM_DMABurstLength_7Bytes ((uint16_t)0x0600) -#define TIM_DMABurstLength_8Bytes ((uint16_t)0x0700) -#define TIM_DMABurstLength_9Bytes ((uint16_t)0x0800) -#define TIM_DMABurstLength_10Bytes ((uint16_t)0x0900) -#define TIM_DMABurstLength_11Bytes ((uint16_t)0x0A00) -#define TIM_DMABurstLength_12Bytes ((uint16_t)0x0B00) -#define TIM_DMABurstLength_13Bytes ((uint16_t)0x0C00) -#define TIM_DMABurstLength_14Bytes ((uint16_t)0x0D00) -#define TIM_DMABurstLength_15Bytes ((uint16_t)0x0E00) -#define TIM_DMABurstLength_16Bytes ((uint16_t)0x0F00) -#define TIM_DMABurstLength_17Bytes ((uint16_t)0x1000) -#define TIM_DMABurstLength_18Bytes ((uint16_t)0x1100) -#define IS_TIM_DMA_LENGTH(LENGTH) (((LENGTH) == TIM_DMABurstLength_1Byte) || \ - ((LENGTH) == TIM_DMABurstLength_2Bytes) || \ - ((LENGTH) == TIM_DMABurstLength_3Bytes) || \ - ((LENGTH) == TIM_DMABurstLength_4Bytes) || \ - ((LENGTH) == TIM_DMABurstLength_5Bytes) || \ - ((LENGTH) == TIM_DMABurstLength_6Bytes) || \ - ((LENGTH) == TIM_DMABurstLength_7Bytes) || \ - ((LENGTH) == TIM_DMABurstLength_8Bytes) || \ - ((LENGTH) == TIM_DMABurstLength_9Bytes) || \ - ((LENGTH) == TIM_DMABurstLength_10Bytes) || \ - ((LENGTH) == TIM_DMABurstLength_11Bytes) || \ - ((LENGTH) == TIM_DMABurstLength_12Bytes) || \ - ((LENGTH) == TIM_DMABurstLength_13Bytes) || \ - ((LENGTH) == TIM_DMABurstLength_14Bytes) || \ - ((LENGTH) == TIM_DMABurstLength_15Bytes) || \ - ((LENGTH) == TIM_DMABurstLength_16Bytes) || \ - ((LENGTH) == TIM_DMABurstLength_17Bytes) || \ - ((LENGTH) == TIM_DMABurstLength_18Bytes)) -/** - * @} - */ - -/** @defgroup TIM_DMA_sources - * @{ - */ - -#define TIM_DMA_Update ((uint16_t)0x0100) -#define TIM_DMA_CC1 ((uint16_t)0x0200) -#define TIM_DMA_CC2 ((uint16_t)0x0400) -#define TIM_DMA_CC3 ((uint16_t)0x0800) -#define TIM_DMA_CC4 ((uint16_t)0x1000) -#define TIM_DMA_COM ((uint16_t)0x2000) -#define TIM_DMA_Trigger ((uint16_t)0x4000) -#define IS_TIM_DMA_SOURCE(SOURCE) ((((SOURCE) & (uint16_t)0x80FF) == 0x0000) && ((SOURCE) != 0x0000)) - -/** - * @} - */ - -/** @defgroup TIM_External_Trigger_Prescaler - * @{ - */ - -#define TIM_ExtTRGPSC_OFF ((uint16_t)0x0000) -#define TIM_ExtTRGPSC_DIV2 ((uint16_t)0x1000) -#define TIM_ExtTRGPSC_DIV4 ((uint16_t)0x2000) -#define TIM_ExtTRGPSC_DIV8 ((uint16_t)0x3000) -#define IS_TIM_EXT_PRESCALER(PRESCALER) (((PRESCALER) == TIM_ExtTRGPSC_OFF) || \ - ((PRESCALER) == TIM_ExtTRGPSC_DIV2) || \ - ((PRESCALER) == TIM_ExtTRGPSC_DIV4) || \ - ((PRESCALER) == TIM_ExtTRGPSC_DIV8)) -/** - * @} - */ - -/** @defgroup TIM_Internal_Trigger_Selection - * @{ - */ - -#define TIM_TS_ITR0 ((uint16_t)0x0000) -#define TIM_TS_ITR1 ((uint16_t)0x0010) -#define TIM_TS_ITR2 ((uint16_t)0x0020) -#define TIM_TS_ITR3 ((uint16_t)0x0030) -#define TIM_TS_TI1F_ED ((uint16_t)0x0040) -#define TIM_TS_TI1FP1 ((uint16_t)0x0050) -#define TIM_TS_TI2FP2 ((uint16_t)0x0060) -#define TIM_TS_ETRF ((uint16_t)0x0070) -#define IS_TIM_TRIGGER_SELECTION(SELECTION) (((SELECTION) == TIM_TS_ITR0) || \ - ((SELECTION) == TIM_TS_ITR1) || \ - ((SELECTION) == TIM_TS_ITR2) || \ - ((SELECTION) == TIM_TS_ITR3) || \ - ((SELECTION) == TIM_TS_TI1F_ED) || \ - ((SELECTION) == TIM_TS_TI1FP1) || \ - ((SELECTION) == TIM_TS_TI2FP2) || \ - ((SELECTION) == TIM_TS_ETRF)) -#define IS_TIM_INTERNAL_TRIGGER_SELECTION(SELECTION) (((SELECTION) == TIM_TS_ITR0) || \ - ((SELECTION) == TIM_TS_ITR1) || \ - ((SELECTION) == TIM_TS_ITR2) || \ - ((SELECTION) == TIM_TS_ITR3)) -/** - * @} - */ - -/** @defgroup TIM_TIx_External_Clock_Source - * @{ - */ - -#define TIM_TIxExternalCLK1Source_TI1 ((uint16_t)0x0050) -#define TIM_TIxExternalCLK1Source_TI2 ((uint16_t)0x0060) -#define TIM_TIxExternalCLK1Source_TI1ED ((uint16_t)0x0040) -#define IS_TIM_TIXCLK_SOURCE(SOURCE) (((SOURCE) == TIM_TIxExternalCLK1Source_TI1) || \ - ((SOURCE) == TIM_TIxExternalCLK1Source_TI2) || \ - ((SOURCE) == TIM_TIxExternalCLK1Source_TI1ED)) -/** - * @} - */ - -/** @defgroup TIM_External_Trigger_Polarity - * @{ - */ -#define TIM_ExtTRGPolarity_Inverted ((uint16_t)0x8000) -#define TIM_ExtTRGPolarity_NonInverted ((uint16_t)0x0000) -#define IS_TIM_EXT_POLARITY(POLARITY) (((POLARITY) == TIM_ExtTRGPolarity_Inverted) || \ - ((POLARITY) == TIM_ExtTRGPolarity_NonInverted)) -/** - * @} - */ - -/** @defgroup TIM_Prescaler_Reload_Mode - * @{ - */ - -#define TIM_PSCReloadMode_Update ((uint16_t)0x0000) -#define TIM_PSCReloadMode_Immediate ((uint16_t)0x0001) -#define IS_TIM_PRESCALER_RELOAD(RELOAD) (((RELOAD) == TIM_PSCReloadMode_Update) || \ - ((RELOAD) == TIM_PSCReloadMode_Immediate)) -/** - * @} - */ - -/** @defgroup TIM_Forced_Action - * @{ - */ - -#define TIM_ForcedAction_Active ((uint16_t)0x0050) -#define TIM_ForcedAction_InActive ((uint16_t)0x0040) -#define IS_TIM_FORCED_ACTION(ACTION) (((ACTION) == TIM_ForcedAction_Active) || \ - ((ACTION) == TIM_ForcedAction_InActive)) -/** - * @} - */ - -/** @defgroup TIM_Encoder_Mode - * @{ - */ - -#define TIM_EncoderMode_TI1 ((uint16_t)0x0001) -#define TIM_EncoderMode_TI2 ((uint16_t)0x0002) -#define TIM_EncoderMode_TI12 ((uint16_t)0x0003) -#define IS_TIM_ENCODER_MODE(MODE) (((MODE) == TIM_EncoderMode_TI1) || \ - ((MODE) == TIM_EncoderMode_TI2) || \ - ((MODE) == TIM_EncoderMode_TI12)) -/** - * @} - */ - - -/** @defgroup TIM_Event_Source - * @{ - */ - -#define TIM_EventSource_Update ((uint16_t)0x0001) -#define TIM_EventSource_CC1 ((uint16_t)0x0002) -#define TIM_EventSource_CC2 ((uint16_t)0x0004) -#define TIM_EventSource_CC3 ((uint16_t)0x0008) -#define TIM_EventSource_CC4 ((uint16_t)0x0010) -#define TIM_EventSource_COM ((uint16_t)0x0020) -#define TIM_EventSource_Trigger ((uint16_t)0x0040) -#define TIM_EventSource_Break ((uint16_t)0x0080) -#define IS_TIM_EVENT_SOURCE(SOURCE) ((((SOURCE) & (uint16_t)0xFF00) == 0x0000) && ((SOURCE) != 0x0000)) - -/** - * @} - */ - -/** @defgroup TIM_Update_Source - * @{ - */ - -#define TIM_UpdateSource_Global ((uint16_t)0x0000) /*!< Source of update is the counter overflow/underflow - or the setting of UG bit, or an update generation - through the slave mode controller. */ -#define TIM_UpdateSource_Regular ((uint16_t)0x0001) /*!< Source of update is counter overflow/underflow. */ -#define IS_TIM_UPDATE_SOURCE(SOURCE) (((SOURCE) == TIM_UpdateSource_Global) || \ - ((SOURCE) == TIM_UpdateSource_Regular)) -/** - * @} - */ - -/** @defgroup TIM_Ouput_Compare_Preload_State - * @{ - */ - -#define TIM_OCPreload_Enable ((uint16_t)0x0008) -#define TIM_OCPreload_Disable ((uint16_t)0x0000) -#define IS_TIM_OCPRELOAD_STATE(STATE) (((STATE) == TIM_OCPreload_Enable) || \ - ((STATE) == TIM_OCPreload_Disable)) -/** - * @} - */ - -/** @defgroup TIM_Ouput_Compare_Fast_State - * @{ - */ - -#define TIM_OCFast_Enable ((uint16_t)0x0004) -#define TIM_OCFast_Disable ((uint16_t)0x0000) -#define IS_TIM_OCFAST_STATE(STATE) (((STATE) == TIM_OCFast_Enable) || \ - ((STATE) == TIM_OCFast_Disable)) - -/** - * @} - */ - -/** @defgroup TIM_Ouput_Compare_Clear_State - * @{ - */ - -#define TIM_OCClear_Enable ((uint16_t)0x0080) -#define TIM_OCClear_Disable ((uint16_t)0x0000) -#define IS_TIM_OCCLEAR_STATE(STATE) (((STATE) == TIM_OCClear_Enable) || \ - ((STATE) == TIM_OCClear_Disable)) -/** - * @} - */ - -/** @defgroup TIM_Trigger_Output_Source - * @{ - */ - -#define TIM_TRGOSource_Reset ((uint16_t)0x0000) -#define TIM_TRGOSource_Enable ((uint16_t)0x0010) -#define TIM_TRGOSource_Update ((uint16_t)0x0020) -#define TIM_TRGOSource_OC1 ((uint16_t)0x0030) -#define TIM_TRGOSource_OC1Ref ((uint16_t)0x0040) -#define TIM_TRGOSource_OC2Ref ((uint16_t)0x0050) -#define TIM_TRGOSource_OC3Ref ((uint16_t)0x0060) -#define TIM_TRGOSource_OC4Ref ((uint16_t)0x0070) -#define IS_TIM_TRGO_SOURCE(SOURCE) (((SOURCE) == TIM_TRGOSource_Reset) || \ - ((SOURCE) == TIM_TRGOSource_Enable) || \ - ((SOURCE) == TIM_TRGOSource_Update) || \ - ((SOURCE) == TIM_TRGOSource_OC1) || \ - ((SOURCE) == TIM_TRGOSource_OC1Ref) || \ - ((SOURCE) == TIM_TRGOSource_OC2Ref) || \ - ((SOURCE) == TIM_TRGOSource_OC3Ref) || \ - ((SOURCE) == TIM_TRGOSource_OC4Ref)) -/** - * @} - */ - -/** @defgroup TIM_Slave_Mode - * @{ - */ - -#define TIM_SlaveMode_Reset ((uint16_t)0x0004) -#define TIM_SlaveMode_Gated ((uint16_t)0x0005) -#define TIM_SlaveMode_Trigger ((uint16_t)0x0006) -#define TIM_SlaveMode_External1 ((uint16_t)0x0007) -#define IS_TIM_SLAVE_MODE(MODE) (((MODE) == TIM_SlaveMode_Reset) || \ - ((MODE) == TIM_SlaveMode_Gated) || \ - ((MODE) == TIM_SlaveMode_Trigger) || \ - ((MODE) == TIM_SlaveMode_External1)) -/** - * @} - */ - -/** @defgroup TIM_Master_Slave_Mode - * @{ - */ - -#define TIM_MasterSlaveMode_Enable ((uint16_t)0x0080) -#define TIM_MasterSlaveMode_Disable ((uint16_t)0x0000) -#define IS_TIM_MSM_STATE(STATE) (((STATE) == TIM_MasterSlaveMode_Enable) || \ - ((STATE) == TIM_MasterSlaveMode_Disable)) -/** - * @} - */ - -/** @defgroup TIM_Flags - * @{ - */ - -#define TIM_FLAG_Update ((uint16_t)0x0001) -#define TIM_FLAG_CC1 ((uint16_t)0x0002) -#define TIM_FLAG_CC2 ((uint16_t)0x0004) -#define TIM_FLAG_CC3 ((uint16_t)0x0008) -#define TIM_FLAG_CC4 ((uint16_t)0x0010) -#define TIM_FLAG_COM ((uint16_t)0x0020) -#define TIM_FLAG_Trigger ((uint16_t)0x0040) -#define TIM_FLAG_Break ((uint16_t)0x0080) -#define TIM_FLAG_CC1OF ((uint16_t)0x0200) -#define TIM_FLAG_CC2OF ((uint16_t)0x0400) -#define TIM_FLAG_CC3OF ((uint16_t)0x0800) -#define TIM_FLAG_CC4OF ((uint16_t)0x1000) -#define IS_TIM_GET_FLAG(FLAG) (((FLAG) == TIM_FLAG_Update) || \ - ((FLAG) == TIM_FLAG_CC1) || \ - ((FLAG) == TIM_FLAG_CC2) || \ - ((FLAG) == TIM_FLAG_CC3) || \ - ((FLAG) == TIM_FLAG_CC4) || \ - ((FLAG) == TIM_FLAG_COM) || \ - ((FLAG) == TIM_FLAG_Trigger) || \ - ((FLAG) == TIM_FLAG_Break) || \ - ((FLAG) == TIM_FLAG_CC1OF) || \ - ((FLAG) == TIM_FLAG_CC2OF) || \ - ((FLAG) == TIM_FLAG_CC3OF) || \ - ((FLAG) == TIM_FLAG_CC4OF)) - - -#define IS_TIM_CLEAR_FLAG(TIM_FLAG) ((((TIM_FLAG) & (uint16_t)0xE100) == 0x0000) && ((TIM_FLAG) != 0x0000)) -/** - * @} - */ - -/** @defgroup TIM_Input_Capture_Filer_Value - * @{ - */ - -#define IS_TIM_IC_FILTER(ICFILTER) ((ICFILTER) <= 0xF) -/** - * @} - */ - -/** @defgroup TIM_External_Trigger_Filter - * @{ - */ - -#define IS_TIM_EXT_FILTER(EXTFILTER) ((EXTFILTER) <= 0xF) -/** - * @} - */ - -/** - * @} - */ - -/** @defgroup TIM_Exported_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup TIM_Exported_Functions - * @{ - */ - -void TIM_DeInit(TIM_TypeDef* TIMx); -void TIM_TimeBaseInit(TIM_TypeDef* TIMx, TIM_TimeBaseInitTypeDef* TIM_TimeBaseInitStruct); -void TIM_OC1Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct); -void TIM_OC2Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct); -void TIM_OC3Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct); -void TIM_OC4Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct); -void TIM_ICInit(TIM_TypeDef* TIMx, TIM_ICInitTypeDef* TIM_ICInitStruct); -void TIM_PWMIConfig(TIM_TypeDef* TIMx, TIM_ICInitTypeDef* TIM_ICInitStruct); -void TIM_BDTRConfig(TIM_TypeDef* TIMx, TIM_BDTRInitTypeDef *TIM_BDTRInitStruct); -void TIM_TimeBaseStructInit(TIM_TimeBaseInitTypeDef* TIM_TimeBaseInitStruct); -void TIM_OCStructInit(TIM_OCInitTypeDef* TIM_OCInitStruct); -void TIM_ICStructInit(TIM_ICInitTypeDef* TIM_ICInitStruct); -void TIM_BDTRStructInit(TIM_BDTRInitTypeDef* TIM_BDTRInitStruct); -void TIM_Cmd(TIM_TypeDef* TIMx, FunctionalState NewState); -void TIM_CtrlPWMOutputs(TIM_TypeDef* TIMx, FunctionalState NewState); -void TIM_ITConfig(TIM_TypeDef* TIMx, uint16_t TIM_IT, FunctionalState NewState); -void TIM_GenerateEvent(TIM_TypeDef* TIMx, uint16_t TIM_EventSource); -void TIM_DMAConfig(TIM_TypeDef* TIMx, uint16_t TIM_DMABase, uint16_t TIM_DMABurstLength); -void TIM_DMACmd(TIM_TypeDef* TIMx, uint16_t TIM_DMASource, FunctionalState NewState); -void TIM_InternalClockConfig(TIM_TypeDef* TIMx); -void TIM_ITRxExternalClockConfig(TIM_TypeDef* TIMx, uint16_t TIM_InputTriggerSource); -void TIM_TIxExternalClockConfig(TIM_TypeDef* TIMx, uint16_t TIM_TIxExternalCLKSource, - uint16_t TIM_ICPolarity, uint16_t ICFilter); -void TIM_ETRClockMode1Config(TIM_TypeDef* TIMx, uint16_t TIM_ExtTRGPrescaler, uint16_t TIM_ExtTRGPolarity, - uint16_t ExtTRGFilter); -void TIM_ETRClockMode2Config(TIM_TypeDef* TIMx, uint16_t TIM_ExtTRGPrescaler, - uint16_t TIM_ExtTRGPolarity, uint16_t ExtTRGFilter); -void TIM_ETRConfig(TIM_TypeDef* TIMx, uint16_t TIM_ExtTRGPrescaler, uint16_t TIM_ExtTRGPolarity, - uint16_t ExtTRGFilter); -void TIM_PrescalerConfig(TIM_TypeDef* TIMx, uint16_t Prescaler, uint16_t TIM_PSCReloadMode); -void TIM_CounterModeConfig(TIM_TypeDef* TIMx, uint16_t TIM_CounterMode); -void TIM_SelectInputTrigger(TIM_TypeDef* TIMx, uint16_t TIM_InputTriggerSource); -void TIM_EncoderInterfaceConfig(TIM_TypeDef* TIMx, uint16_t TIM_EncoderMode, - uint16_t TIM_IC1Polarity, uint16_t TIM_IC2Polarity); -void TIM_ForcedOC1Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction); -void TIM_ForcedOC2Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction); -void TIM_ForcedOC3Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction); -void TIM_ForcedOC4Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction); -void TIM_ARRPreloadConfig(TIM_TypeDef* TIMx, FunctionalState NewState); -void TIM_SelectCOM(TIM_TypeDef* TIMx, FunctionalState NewState); -void TIM_SelectCCDMA(TIM_TypeDef* TIMx, FunctionalState NewState); -void TIM_CCPreloadControl(TIM_TypeDef* TIMx, FunctionalState NewState); -void TIM_OC1PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload); -void TIM_OC2PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload); -void TIM_OC3PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload); -void TIM_OC4PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload); -void TIM_OC1FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast); -void TIM_OC2FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast); -void TIM_OC3FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast); -void TIM_OC4FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast); -void TIM_ClearOC1Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear); -void TIM_ClearOC2Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear); -void TIM_ClearOC3Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear); -void TIM_ClearOC4Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear); -void TIM_OC1PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity); -void TIM_OC1NPolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCNPolarity); -void TIM_OC2PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity); -void TIM_OC2NPolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCNPolarity); -void TIM_OC3PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity); -void TIM_OC3NPolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCNPolarity); -void TIM_OC4PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity); -void TIM_CCxCmd(TIM_TypeDef* TIMx, uint16_t TIM_Channel, uint16_t TIM_CCx); -void TIM_CCxNCmd(TIM_TypeDef* TIMx, uint16_t TIM_Channel, uint16_t TIM_CCxN); -void TIM_SelectOCxM(TIM_TypeDef* TIMx, uint16_t TIM_Channel, uint16_t TIM_OCMode); -void TIM_UpdateDisableConfig(TIM_TypeDef* TIMx, FunctionalState NewState); -void TIM_UpdateRequestConfig(TIM_TypeDef* TIMx, uint16_t TIM_UpdateSource); -void TIM_SelectHallSensor(TIM_TypeDef* TIMx, FunctionalState NewState); -void TIM_SelectOnePulseMode(TIM_TypeDef* TIMx, uint16_t TIM_OPMode); -void TIM_SelectOutputTrigger(TIM_TypeDef* TIMx, uint16_t TIM_TRGOSource); -void TIM_SelectSlaveMode(TIM_TypeDef* TIMx, uint16_t TIM_SlaveMode); -void TIM_SelectMasterSlaveMode(TIM_TypeDef* TIMx, uint16_t TIM_MasterSlaveMode); -void TIM_SetCounter(TIM_TypeDef* TIMx, uint16_t Counter); -void TIM_SetAutoreload(TIM_TypeDef* TIMx, uint16_t Autoreload); -void TIM_SetCompare1(TIM_TypeDef* TIMx, uint16_t Compare1); -void TIM_SetCompare2(TIM_TypeDef* TIMx, uint16_t Compare2); -void TIM_SetCompare3(TIM_TypeDef* TIMx, uint16_t Compare3); -void TIM_SetCompare4(TIM_TypeDef* TIMx, uint16_t Compare4); -void TIM_SetIC1Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC); -void TIM_SetIC2Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC); -void TIM_SetIC3Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC); -void TIM_SetIC4Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC); -void TIM_SetClockDivision(TIM_TypeDef* TIMx, uint16_t TIM_CKD); -uint16_t TIM_GetCapture1(TIM_TypeDef* TIMx); -uint16_t TIM_GetCapture2(TIM_TypeDef* TIMx); -uint16_t TIM_GetCapture3(TIM_TypeDef* TIMx); -uint16_t TIM_GetCapture4(TIM_TypeDef* TIMx); -uint16_t TIM_GetCounter(TIM_TypeDef* TIMx); -uint16_t TIM_GetPrescaler(TIM_TypeDef* TIMx); -FlagStatus TIM_GetFlagStatus(TIM_TypeDef* TIMx, uint16_t TIM_FLAG); -void TIM_ClearFlag(TIM_TypeDef* TIMx, uint16_t TIM_FLAG); -ITStatus TIM_GetITStatus(TIM_TypeDef* TIMx, uint16_t TIM_IT); -void TIM_ClearITPendingBit(TIM_TypeDef* TIMx, uint16_t TIM_IT); - -#ifdef __cplusplus -} -#endif - -#endif /*__STM32F10x_TIM_H */ -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_usart.h b/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_usart.h deleted file mode 100644 index bbf39eea26..0000000000 --- a/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_usart.h +++ /dev/null @@ -1,411 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f10x_usart.h - * @author MCD Application Team - * @version V3.2.0 - * @date 03/01/2010 - * @brief This file contains all the functions prototypes for the USART - * firmware library. - ****************************************************************************** - * @copy - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2010 STMicroelectronics

- */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F10x_USART_H -#define __STM32F10x_USART_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x.h" - -/** @addtogroup STM32F10x_StdPeriph_Driver - * @{ - */ - -/** @addtogroup USART - * @{ - */ - -/** @defgroup USART_Exported_Types - * @{ - */ - -/** - * @brief USART Init Structure definition - */ - -typedef struct -{ - uint32_t USART_BaudRate; /*!< This member configures the USART communication baud rate. - The baud rate is computed using the following formula: - - IntegerDivider = ((PCLKx) / (16 * (USART_InitStruct->USART_BaudRate))) - - FractionalDivider = ((IntegerDivider - ((u32) IntegerDivider)) * 16) + 0.5 */ - - uint16_t USART_WordLength; /*!< Specifies the number of data bits transmitted or received in a frame. - This parameter can be a value of @ref USART_Word_Length */ - - uint16_t USART_StopBits; /*!< Specifies the number of stop bits transmitted. - This parameter can be a value of @ref USART_Stop_Bits */ - - uint16_t USART_Parity; /*!< Specifies the parity mode. - This parameter can be a value of @ref USART_Parity - @note When parity is enabled, the computed parity is inserted - at the MSB position of the transmitted data (9th bit when - the word length is set to 9 data bits; 8th bit when the - word length is set to 8 data bits). */ - - uint16_t USART_Mode; /*!< Specifies wether the Receive or Transmit mode is enabled or disabled. - This parameter can be a value of @ref USART_Mode */ - - uint16_t USART_HardwareFlowControl; /*!< Specifies wether the hardware flow control mode is enabled - or disabled. - This parameter can be a value of @ref USART_Hardware_Flow_Control */ -} USART_InitTypeDef; - -/** - * @brief USART Clock Init Structure definition - */ - -typedef struct -{ - - uint16_t USART_Clock; /*!< Specifies whether the USART clock is enabled or disabled. - This parameter can be a value of @ref USART_Clock */ - - uint16_t USART_CPOL; /*!< Specifies the steady state value of the serial clock. - This parameter can be a value of @ref USART_Clock_Polarity */ - - uint16_t USART_CPHA; /*!< Specifies the clock transition on which the bit capture is made. - This parameter can be a value of @ref USART_Clock_Phase */ - - uint16_t USART_LastBit; /*!< Specifies whether the clock pulse corresponding to the last transmitted - data bit (MSB) has to be output on the SCLK pin in synchronous mode. - This parameter can be a value of @ref USART_Last_Bit */ -} USART_ClockInitTypeDef; - -/** - * @} - */ - -/** @defgroup USART_Exported_Constants - * @{ - */ - -#define IS_USART_ALL_PERIPH(PERIPH) (((PERIPH) == USART1) || \ - ((PERIPH) == USART2) || \ - ((PERIPH) == USART3) || \ - ((PERIPH) == UART4) || \ - ((PERIPH) == UART5)) - -#define IS_USART_123_PERIPH(PERIPH) (((PERIPH) == USART1) || \ - ((PERIPH) == USART2) || \ - ((PERIPH) == USART3)) - -#define IS_USART_1234_PERIPH(PERIPH) (((PERIPH) == USART1) || \ - ((PERIPH) == USART2) || \ - ((PERIPH) == USART3) || \ - ((PERIPH) == UART4)) -/** @defgroup USART_Word_Length - * @{ - */ - -#define USART_WordLength_8b ((uint16_t)0x0000) -#define USART_WordLength_9b ((uint16_t)0x1000) - -#define IS_USART_WORD_LENGTH(LENGTH) (((LENGTH) == USART_WordLength_8b) || \ - ((LENGTH) == USART_WordLength_9b)) -/** - * @} - */ - -/** @defgroup USART_Stop_Bits - * @{ - */ - -#define USART_StopBits_1 ((uint16_t)0x0000) -#define USART_StopBits_0_5 ((uint16_t)0x1000) -#define USART_StopBits_2 ((uint16_t)0x2000) -#define USART_StopBits_1_5 ((uint16_t)0x3000) -#define IS_USART_STOPBITS(STOPBITS) (((STOPBITS) == USART_StopBits_1) || \ - ((STOPBITS) == USART_StopBits_0_5) || \ - ((STOPBITS) == USART_StopBits_2) || \ - ((STOPBITS) == USART_StopBits_1_5)) -/** - * @} - */ - -/** @defgroup USART_Parity - * @{ - */ - -#define USART_Parity_No ((uint16_t)0x0000) -#define USART_Parity_Even ((uint16_t)0x0400) -#define USART_Parity_Odd ((uint16_t)0x0600) -#define IS_USART_PARITY(PARITY) (((PARITY) == USART_Parity_No) || \ - ((PARITY) == USART_Parity_Even) || \ - ((PARITY) == USART_Parity_Odd)) -/** - * @} - */ - -/** @defgroup USART_Mode - * @{ - */ - -#define USART_Mode_Rx ((uint16_t)0x0004) -#define USART_Mode_Tx ((uint16_t)0x0008) -#define IS_USART_MODE(MODE) ((((MODE) & (uint16_t)0xFFF3) == 0x00) && ((MODE) != (uint16_t)0x00)) -/** - * @} - */ - -/** @defgroup USART_Hardware_Flow_Control - * @{ - */ -#define USART_HardwareFlowControl_None ((uint16_t)0x0000) -#define USART_HardwareFlowControl_RTS ((uint16_t)0x0100) -#define USART_HardwareFlowControl_CTS ((uint16_t)0x0200) -#define USART_HardwareFlowControl_RTS_CTS ((uint16_t)0x0300) -#define IS_USART_HARDWARE_FLOW_CONTROL(CONTROL)\ - (((CONTROL) == USART_HardwareFlowControl_None) || \ - ((CONTROL) == USART_HardwareFlowControl_RTS) || \ - ((CONTROL) == USART_HardwareFlowControl_CTS) || \ - ((CONTROL) == USART_HardwareFlowControl_RTS_CTS)) -/** - * @} - */ - -/** @defgroup USART_Clock - * @{ - */ -#define USART_Clock_Disable ((uint16_t)0x0000) -#define USART_Clock_Enable ((uint16_t)0x0800) -#define IS_USART_CLOCK(CLOCK) (((CLOCK) == USART_Clock_Disable) || \ - ((CLOCK) == USART_Clock_Enable)) -/** - * @} - */ - -/** @defgroup USART_Clock_Polarity - * @{ - */ - -#define USART_CPOL_Low ((uint16_t)0x0000) -#define USART_CPOL_High ((uint16_t)0x0400) -#define IS_USART_CPOL(CPOL) (((CPOL) == USART_CPOL_Low) || ((CPOL) == USART_CPOL_High)) - -/** - * @} - */ - -/** @defgroup USART_Clock_Phase - * @{ - */ - -#define USART_CPHA_1Edge ((uint16_t)0x0000) -#define USART_CPHA_2Edge ((uint16_t)0x0200) -#define IS_USART_CPHA(CPHA) (((CPHA) == USART_CPHA_1Edge) || ((CPHA) == USART_CPHA_2Edge)) - -/** - * @} - */ - -/** @defgroup USART_Last_Bit - * @{ - */ - -#define USART_LastBit_Disable ((uint16_t)0x0000) -#define USART_LastBit_Enable ((uint16_t)0x0100) -#define IS_USART_LASTBIT(LASTBIT) (((LASTBIT) == USART_LastBit_Disable) || \ - ((LASTBIT) == USART_LastBit_Enable)) -/** - * @} - */ - -/** @defgroup USART_Interrupt_definition - * @{ - */ - -#define USART_IT_PE ((uint16_t)0x0028) -#define USART_IT_TXE ((uint16_t)0x0727) -#define USART_IT_TC ((uint16_t)0x0626) -#define USART_IT_RXNE ((uint16_t)0x0525) -#define USART_IT_IDLE ((uint16_t)0x0424) -#define USART_IT_LBD ((uint16_t)0x0846) -#define USART_IT_CTS ((uint16_t)0x096A) -#define USART_IT_ERR ((uint16_t)0x0060) -#define USART_IT_ORE ((uint16_t)0x0360) -#define USART_IT_NE ((uint16_t)0x0260) -#define USART_IT_FE ((uint16_t)0x0160) -#define IS_USART_CONFIG_IT(IT) (((IT) == USART_IT_PE) || ((IT) == USART_IT_TXE) || \ - ((IT) == USART_IT_TC) || ((IT) == USART_IT_RXNE) || \ - ((IT) == USART_IT_IDLE) || ((IT) == USART_IT_LBD) || \ - ((IT) == USART_IT_CTS) || ((IT) == USART_IT_ERR)) -#define IS_USART_GET_IT(IT) (((IT) == USART_IT_PE) || ((IT) == USART_IT_TXE) || \ - ((IT) == USART_IT_TC) || ((IT) == USART_IT_RXNE) || \ - ((IT) == USART_IT_IDLE) || ((IT) == USART_IT_LBD) || \ - ((IT) == USART_IT_CTS) || ((IT) == USART_IT_ORE) || \ - ((IT) == USART_IT_NE) || ((IT) == USART_IT_FE)) -#define IS_USART_CLEAR_IT(IT) (((IT) == USART_IT_TC) || ((IT) == USART_IT_RXNE) || \ - ((IT) == USART_IT_LBD) || ((IT) == USART_IT_CTS)) -/** - * @} - */ - -/** @defgroup USART_DMA_Requests - * @{ - */ - -#define USART_DMAReq_Tx ((uint16_t)0x0080) -#define USART_DMAReq_Rx ((uint16_t)0x0040) -#define IS_USART_DMAREQ(DMAREQ) ((((DMAREQ) & (uint16_t)0xFF3F) == 0x00) && ((DMAREQ) != (uint16_t)0x00)) - -/** - * @} - */ - -/** @defgroup USART_WakeUp_methods - * @{ - */ - -#define USART_WakeUp_IdleLine ((uint16_t)0x0000) -#define USART_WakeUp_AddressMark ((uint16_t)0x0800) -#define IS_USART_WAKEUP(WAKEUP) (((WAKEUP) == USART_WakeUp_IdleLine) || \ - ((WAKEUP) == USART_WakeUp_AddressMark)) -/** - * @} - */ - -/** @defgroup USART_LIN_Break_Detection_Length - * @{ - */ - -#define USART_LINBreakDetectLength_10b ((uint16_t)0x0000) -#define USART_LINBreakDetectLength_11b ((uint16_t)0x0020) -#define IS_USART_LIN_BREAK_DETECT_LENGTH(LENGTH) \ - (((LENGTH) == USART_LINBreakDetectLength_10b) || \ - ((LENGTH) == USART_LINBreakDetectLength_11b)) -/** - * @} - */ - -/** @defgroup USART_IrDA_Low_Power - * @{ - */ - -#define USART_IrDAMode_LowPower ((uint16_t)0x0004) -#define USART_IrDAMode_Normal ((uint16_t)0x0000) -#define IS_USART_IRDA_MODE(MODE) (((MODE) == USART_IrDAMode_LowPower) || \ - ((MODE) == USART_IrDAMode_Normal)) -/** - * @} - */ - -/** @defgroup USART_Flags - * @{ - */ - -#define USART_FLAG_CTS ((uint16_t)0x0200) -#define USART_FLAG_LBD ((uint16_t)0x0100) -#define USART_FLAG_TXE ((uint16_t)0x0080) -#define USART_FLAG_TC ((uint16_t)0x0040) -#define USART_FLAG_RXNE ((uint16_t)0x0020) -#define USART_FLAG_IDLE ((uint16_t)0x0010) -#define USART_FLAG_ORE ((uint16_t)0x0008) -#define USART_FLAG_NE ((uint16_t)0x0004) -#define USART_FLAG_FE ((uint16_t)0x0002) -#define USART_FLAG_PE ((uint16_t)0x0001) -#define IS_USART_FLAG(FLAG) (((FLAG) == USART_FLAG_PE) || ((FLAG) == USART_FLAG_TXE) || \ - ((FLAG) == USART_FLAG_TC) || ((FLAG) == USART_FLAG_RXNE) || \ - ((FLAG) == USART_FLAG_IDLE) || ((FLAG) == USART_FLAG_LBD) || \ - ((FLAG) == USART_FLAG_CTS) || ((FLAG) == USART_FLAG_ORE) || \ - ((FLAG) == USART_FLAG_NE) || ((FLAG) == USART_FLAG_FE)) - -#define IS_USART_CLEAR_FLAG(FLAG) ((((FLAG) & (uint16_t)0xFC9F) == 0x00) && ((FLAG) != (uint16_t)0x00)) -#define IS_USART_PERIPH_FLAG(PERIPH, USART_FLAG) ((((*(uint32_t*)&(PERIPH)) != UART4_BASE) &&\ - ((*(uint32_t*)&(PERIPH)) != UART5_BASE)) \ - || ((USART_FLAG) != USART_FLAG_CTS)) -#define IS_USART_BAUDRATE(BAUDRATE) (((BAUDRATE) > 0) && ((BAUDRATE) < 0x0044AA21)) -#define IS_USART_ADDRESS(ADDRESS) ((ADDRESS) <= 0xF) -#define IS_USART_DATA(DATA) ((DATA) <= 0x1FF) - -/** - * @} - */ - -/** - * @} - */ - -/** @defgroup USART_Exported_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup USART_Exported_Functions - * @{ - */ - -void USART_DeInit(USART_TypeDef* USARTx); -void USART_Init(USART_TypeDef* USARTx, USART_InitTypeDef* USART_InitStruct); -void USART_StructInit(USART_InitTypeDef* USART_InitStruct); -void USART_ClockInit(USART_TypeDef* USARTx, USART_ClockInitTypeDef* USART_ClockInitStruct); -void USART_ClockStructInit(USART_ClockInitTypeDef* USART_ClockInitStruct); -void USART_Cmd(USART_TypeDef* USARTx, FunctionalState NewState); -void USART_ITConfig(USART_TypeDef* USARTx, uint16_t USART_IT, FunctionalState NewState); -void USART_DMACmd(USART_TypeDef* USARTx, uint16_t USART_DMAReq, FunctionalState NewState); -void USART_SetAddress(USART_TypeDef* USARTx, uint8_t USART_Address); -void USART_WakeUpConfig(USART_TypeDef* USARTx, uint16_t USART_WakeUp); -void USART_ReceiverWakeUpCmd(USART_TypeDef* USARTx, FunctionalState NewState); -void USART_LINBreakDetectLengthConfig(USART_TypeDef* USARTx, uint16_t USART_LINBreakDetectLength); -void USART_LINCmd(USART_TypeDef* USARTx, FunctionalState NewState); -void USART_SendData(USART_TypeDef* USARTx, uint16_t Data); -uint16_t USART_ReceiveData(USART_TypeDef* USARTx); -void USART_SendBreak(USART_TypeDef* USARTx); -void USART_SetGuardTime(USART_TypeDef* USARTx, uint8_t USART_GuardTime); -void USART_SetPrescaler(USART_TypeDef* USARTx, uint8_t USART_Prescaler); -void USART_SmartCardCmd(USART_TypeDef* USARTx, FunctionalState NewState); -void USART_SmartCardNACKCmd(USART_TypeDef* USARTx, FunctionalState NewState); -void USART_HalfDuplexCmd(USART_TypeDef* USARTx, FunctionalState NewState); -void USART_OverSampling8Cmd(USART_TypeDef* USARTx, FunctionalState NewState); -void USART_OneBitMethodCmd(USART_TypeDef* USARTx, FunctionalState NewState); -void USART_IrDAConfig(USART_TypeDef* USARTx, uint16_t USART_IrDAMode); -void USART_IrDACmd(USART_TypeDef* USARTx, FunctionalState NewState); -FlagStatus USART_GetFlagStatus(USART_TypeDef* USARTx, uint16_t USART_FLAG); -void USART_ClearFlag(USART_TypeDef* USARTx, uint16_t USART_FLAG); -ITStatus USART_GetITStatus(USART_TypeDef* USARTx, uint16_t USART_IT); -void USART_ClearITPendingBit(USART_TypeDef* USARTx, uint16_t USART_IT); - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32F10x_USART_H */ -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_wwdg.h b/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_wwdg.h deleted file mode 100644 index 9828e1e3af..0000000000 --- a/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_wwdg.h +++ /dev/null @@ -1,114 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f10x_wwdg.h - * @author MCD Application Team - * @version V3.2.0 - * @date 03/01/2010 - * @brief This file contains all the functions prototypes for the WWDG firmware - * library. - ****************************************************************************** - * @copy - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2010 STMicroelectronics

- */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F10x_WWDG_H -#define __STM32F10x_WWDG_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x.h" - -/** @addtogroup STM32F10x_StdPeriph_Driver - * @{ - */ - -/** @addtogroup WWDG - * @{ - */ - -/** @defgroup WWDG_Exported_Types - * @{ - */ - -/** - * @} - */ - -/** @defgroup WWDG_Exported_Constants - * @{ - */ - -/** @defgroup WWDG_Prescaler - * @{ - */ - -#define WWDG_Prescaler_1 ((uint32_t)0x00000000) -#define WWDG_Prescaler_2 ((uint32_t)0x00000080) -#define WWDG_Prescaler_4 ((uint32_t)0x00000100) -#define WWDG_Prescaler_8 ((uint32_t)0x00000180) -#define IS_WWDG_PRESCALER(PRESCALER) (((PRESCALER) == WWDG_Prescaler_1) || \ - ((PRESCALER) == WWDG_Prescaler_2) || \ - ((PRESCALER) == WWDG_Prescaler_4) || \ - ((PRESCALER) == WWDG_Prescaler_8)) -#define IS_WWDG_WINDOW_VALUE(VALUE) ((VALUE) <= 0x7F) -#define IS_WWDG_COUNTER(COUNTER) (((COUNTER) >= 0x40) && ((COUNTER) <= 0x7F)) - -/** - * @} - */ - -/** - * @} - */ - -/** @defgroup WWDG_Exported_Macros - * @{ - */ -/** - * @} - */ - -/** @defgroup WWDG_Exported_Functions - * @{ - */ - -void WWDG_DeInit(void); -void WWDG_SetPrescaler(uint32_t WWDG_Prescaler); -void WWDG_SetWindowValue(uint8_t WindowValue); -void WWDG_EnableIT(void); -void WWDG_SetCounter(uint8_t Counter); -void WWDG_Enable(uint8_t Counter); -FlagStatus WWDG_GetFlagStatus(void); -void WWDG_ClearFlag(void); - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32F10x_WWDG_H */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/src/misc.c b/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/src/misc.c deleted file mode 100644 index 5ccce16e24..0000000000 --- a/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/src/misc.c +++ /dev/null @@ -1,223 +0,0 @@ -/** - ****************************************************************************** - * @file misc.c - * @author MCD Application Team - * @version V3.2.0 - * @date 03/01/2010 - * @brief This file provides all the miscellaneous firmware functions (add-on - * to CMSIS functions). - ****************************************************************************** - * @copy - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2010 STMicroelectronics

- */ - -/* Includes ------------------------------------------------------------------*/ -#include "misc.h" - -/** @addtogroup STM32F10x_StdPeriph_Driver - * @{ - */ - -/** @defgroup MISC - * @brief MISC driver modules - * @{ - */ - -/** @defgroup MISC_Private_TypesDefinitions - * @{ - */ - -/** - * @} - */ - -/** @defgroup MISC_Private_Defines - * @{ - */ - -#define AIRCR_VECTKEY_MASK ((uint32_t)0x05FA0000) -/** - * @} - */ - -/** @defgroup MISC_Private_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup MISC_Private_Variables - * @{ - */ - -/** - * @} - */ - -/** @defgroup MISC_Private_FunctionPrototypes - * @{ - */ - -/** - * @} - */ - -/** @defgroup MISC_Private_Functions - * @{ - */ - -/** - * @brief Configures the priority grouping: pre-emption priority and subpriority. - * @param NVIC_PriorityGroup: specifies the priority grouping bits length. - * This parameter can be one of the following values: - * @arg NVIC_PriorityGroup_0: 0 bits for pre-emption priority - * 4 bits for subpriority - * @arg NVIC_PriorityGroup_1: 1 bits for pre-emption priority - * 3 bits for subpriority - * @arg NVIC_PriorityGroup_2: 2 bits for pre-emption priority - * 2 bits for subpriority - * @arg NVIC_PriorityGroup_3: 3 bits for pre-emption priority - * 1 bits for subpriority - * @arg NVIC_PriorityGroup_4: 4 bits for pre-emption priority - * 0 bits for subpriority - * @retval None - */ -void NVIC_PriorityGroupConfig(uint32_t NVIC_PriorityGroup) -{ - /* Check the parameters */ - assert_param(IS_NVIC_PRIORITY_GROUP(NVIC_PriorityGroup)); - - /* Set the PRIGROUP[10:8] bits according to NVIC_PriorityGroup value */ - SCB->AIRCR = AIRCR_VECTKEY_MASK | NVIC_PriorityGroup; -} - -/** - * @brief Initializes the NVIC peripheral according to the specified - * parameters in the NVIC_InitStruct. - * @param NVIC_InitStruct: pointer to a NVIC_InitTypeDef structure that contains - * the configuration information for the specified NVIC peripheral. - * @retval None - */ -void NVIC_Init(NVIC_InitTypeDef* NVIC_InitStruct) -{ - uint32_t tmppriority = 0x00, tmppre = 0x00, tmpsub = 0x0F; - - /* Check the parameters */ - assert_param(IS_FUNCTIONAL_STATE(NVIC_InitStruct->NVIC_IRQChannelCmd)); - assert_param(IS_NVIC_PREEMPTION_PRIORITY(NVIC_InitStruct->NVIC_IRQChannelPreemptionPriority)); - assert_param(IS_NVIC_SUB_PRIORITY(NVIC_InitStruct->NVIC_IRQChannelSubPriority)); - - if (NVIC_InitStruct->NVIC_IRQChannelCmd != DISABLE) - { - /* Compute the Corresponding IRQ Priority --------------------------------*/ - tmppriority = (0x700 - ((SCB->AIRCR) & (uint32_t)0x700))>> 0x08; - tmppre = (0x4 - tmppriority); - tmpsub = tmpsub >> tmppriority; - - tmppriority = (uint32_t)NVIC_InitStruct->NVIC_IRQChannelPreemptionPriority << tmppre; - tmppriority |= NVIC_InitStruct->NVIC_IRQChannelSubPriority & tmpsub; - tmppriority = tmppriority << 0x04; - - NVIC->IP[NVIC_InitStruct->NVIC_IRQChannel] = tmppriority; - - /* Enable the Selected IRQ Channels --------------------------------------*/ - NVIC->ISER[NVIC_InitStruct->NVIC_IRQChannel >> 0x05] = - (uint32_t)0x01 << (NVIC_InitStruct->NVIC_IRQChannel & (uint8_t)0x1F); - } - else - { - /* Disable the Selected IRQ Channels -------------------------------------*/ - NVIC->ICER[NVIC_InitStruct->NVIC_IRQChannel >> 0x05] = - (uint32_t)0x01 << (NVIC_InitStruct->NVIC_IRQChannel & (uint8_t)0x1F); - } -} - -/** - * @brief Sets the vector table location and Offset. - * @param NVIC_VectTab: specifies if the vector table is in RAM or FLASH memory. - * This parameter can be one of the following values: - * @arg NVIC_VectTab_RAM - * @arg NVIC_VectTab_FLASH - * @param Offset: Vector Table base offset field. This value must be a multiple of 0x100. - * @retval None - */ -void NVIC_SetVectorTable(uint32_t NVIC_VectTab, uint32_t Offset) -{ - /* Check the parameters */ - assert_param(IS_NVIC_VECTTAB(NVIC_VectTab)); - assert_param(IS_NVIC_OFFSET(Offset)); - - SCB->VTOR = NVIC_VectTab | (Offset & (uint32_t)0x1FFFFF80); -} - -/** - * @brief Selects the condition for the system to enter low power mode. - * @param LowPowerMode: Specifies the new mode for the system to enter low power mode. - * This parameter can be one of the following values: - * @arg NVIC_LP_SEVONPEND - * @arg NVIC_LP_SLEEPDEEP - * @arg NVIC_LP_SLEEPONEXIT - * @param NewState: new state of LP condition. This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void NVIC_SystemLPConfig(uint8_t LowPowerMode, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_NVIC_LP(LowPowerMode)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - - if (NewState != DISABLE) - { - SCB->SCR |= LowPowerMode; - } - else - { - SCB->SCR &= (uint32_t)(~(uint32_t)LowPowerMode); - } -} - -/** - * @brief Configures the SysTick clock source. - * @param SysTick_CLKSource: specifies the SysTick clock source. - * This parameter can be one of the following values: - * @arg SysTick_CLKSource_HCLK_Div8: AHB clock divided by 8 selected as SysTick clock source. - * @arg SysTick_CLKSource_HCLK: AHB clock selected as SysTick clock source. - * @retval None - */ -void SysTick_CLKSourceConfig(uint32_t SysTick_CLKSource) -{ - /* Check the parameters */ - assert_param(IS_SYSTICK_CLK_SOURCE(SysTick_CLKSource)); - if (SysTick_CLKSource == SysTick_CLKSource_HCLK) - { - SysTick->CTRL |= SysTick_CLKSource_HCLK; - } - else - { - SysTick->CTRL &= SysTick_CLKSource_HCLK_Div8; - } -} - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_adc.c b/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_adc.c deleted file mode 100644 index 4528da7188..0000000000 --- a/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_adc.c +++ /dev/null @@ -1,1306 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f10x_adc.c - * @author MCD Application Team - * @version V3.2.0 - * @date 03/01/2010 - * @brief This file provides all the ADC firmware functions. - ****************************************************************************** - * @copy - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2010 STMicroelectronics

- */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x_adc.h" -#include "stm32f10x_rcc.h" - -/** @addtogroup STM32F10x_StdPeriph_Driver - * @{ - */ - -/** @defgroup ADC - * @brief ADC driver modules - * @{ - */ - -/** @defgroup ADC_Private_TypesDefinitions - * @{ - */ - -/** - * @} - */ - -/** @defgroup ADC_Private_Defines - * @{ - */ - -/* ADC DISCNUM mask */ -#define CR1_DISCNUM_Reset ((uint32_t)0xFFFF1FFF) - -/* ADC DISCEN mask */ -#define CR1_DISCEN_Set ((uint32_t)0x00000800) -#define CR1_DISCEN_Reset ((uint32_t)0xFFFFF7FF) - -/* ADC JAUTO mask */ -#define CR1_JAUTO_Set ((uint32_t)0x00000400) -#define CR1_JAUTO_Reset ((uint32_t)0xFFFFFBFF) - -/* ADC JDISCEN mask */ -#define CR1_JDISCEN_Set ((uint32_t)0x00001000) -#define CR1_JDISCEN_Reset ((uint32_t)0xFFFFEFFF) - -/* ADC AWDCH mask */ -#define CR1_AWDCH_Reset ((uint32_t)0xFFFFFFE0) - -/* ADC Analog watchdog enable mode mask */ -#define CR1_AWDMode_Reset ((uint32_t)0xFF3FFDFF) - -/* CR1 register Mask */ -#define CR1_CLEAR_Mask ((uint32_t)0xFFF0FEFF) - -/* ADC ADON mask */ -#define CR2_ADON_Set ((uint32_t)0x00000001) -#define CR2_ADON_Reset ((uint32_t)0xFFFFFFFE) - -/* ADC DMA mask */ -#define CR2_DMA_Set ((uint32_t)0x00000100) -#define CR2_DMA_Reset ((uint32_t)0xFFFFFEFF) - -/* ADC RSTCAL mask */ -#define CR2_RSTCAL_Set ((uint32_t)0x00000008) - -/* ADC CAL mask */ -#define CR2_CAL_Set ((uint32_t)0x00000004) - -/* ADC SWSTART mask */ -#define CR2_SWSTART_Set ((uint32_t)0x00400000) - -/* ADC EXTTRIG mask */ -#define CR2_EXTTRIG_Set ((uint32_t)0x00100000) -#define CR2_EXTTRIG_Reset ((uint32_t)0xFFEFFFFF) - -/* ADC Software start mask */ -#define CR2_EXTTRIG_SWSTART_Set ((uint32_t)0x00500000) -#define CR2_EXTTRIG_SWSTART_Reset ((uint32_t)0xFFAFFFFF) - -/* ADC JEXTSEL mask */ -#define CR2_JEXTSEL_Reset ((uint32_t)0xFFFF8FFF) - -/* ADC JEXTTRIG mask */ -#define CR2_JEXTTRIG_Set ((uint32_t)0x00008000) -#define CR2_JEXTTRIG_Reset ((uint32_t)0xFFFF7FFF) - -/* ADC JSWSTART mask */ -#define CR2_JSWSTART_Set ((uint32_t)0x00200000) - -/* ADC injected software start mask */ -#define CR2_JEXTTRIG_JSWSTART_Set ((uint32_t)0x00208000) -#define CR2_JEXTTRIG_JSWSTART_Reset ((uint32_t)0xFFDF7FFF) - -/* ADC TSPD mask */ -#define CR2_TSVREFE_Set ((uint32_t)0x00800000) -#define CR2_TSVREFE_Reset ((uint32_t)0xFF7FFFFF) - -/* CR2 register Mask */ -#define CR2_CLEAR_Mask ((uint32_t)0xFFF1F7FD) - -/* ADC SQx mask */ -#define SQR3_SQ_Set ((uint32_t)0x0000001F) -#define SQR2_SQ_Set ((uint32_t)0x0000001F) -#define SQR1_SQ_Set ((uint32_t)0x0000001F) - -/* SQR1 register Mask */ -#define SQR1_CLEAR_Mask ((uint32_t)0xFF0FFFFF) - -/* ADC JSQx mask */ -#define JSQR_JSQ_Set ((uint32_t)0x0000001F) - -/* ADC JL mask */ -#define JSQR_JL_Set ((uint32_t)0x00300000) -#define JSQR_JL_Reset ((uint32_t)0xFFCFFFFF) - -/* ADC SMPx mask */ -#define SMPR1_SMP_Set ((uint32_t)0x00000007) -#define SMPR2_SMP_Set ((uint32_t)0x00000007) - -/* ADC JDRx registers offset */ -#define JDR_Offset ((uint8_t)0x28) - -/* ADC1 DR register base address */ -#define DR_ADDRESS ((uint32_t)0x4001244C) - -/** - * @} - */ - -/** @defgroup ADC_Private_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup ADC_Private_Variables - * @{ - */ - -/** - * @} - */ - -/** @defgroup ADC_Private_FunctionPrototypes - * @{ - */ - -/** - * @} - */ - -/** @defgroup ADC_Private_Functions - * @{ - */ - -/** - * @brief Deinitializes the ADCx peripheral registers to their default reset values. - * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. - * @retval None - */ -void ADC_DeInit(ADC_TypeDef* ADCx) -{ - /* Check the parameters */ - assert_param(IS_ADC_ALL_PERIPH(ADCx)); - - if (ADCx == ADC1) - { - /* Enable ADC1 reset state */ - RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC1, ENABLE); - /* Release ADC1 from reset state */ - RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC1, DISABLE); - } - else if (ADCx == ADC2) - { - /* Enable ADC2 reset state */ - RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC2, ENABLE); - /* Release ADC2 from reset state */ - RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC2, DISABLE); - } - else - { - if (ADCx == ADC3) - { - /* Enable ADC3 reset state */ - RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC3, ENABLE); - /* Release ADC3 from reset state */ - RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC3, DISABLE); - } - } -} - -/** - * @brief Initializes the ADCx peripheral according to the specified parameters - * in the ADC_InitStruct. - * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. - * @param ADC_InitStruct: pointer to an ADC_InitTypeDef structure that contains - * the configuration information for the specified ADC peripheral. - * @retval None - */ -void ADC_Init(ADC_TypeDef* ADCx, ADC_InitTypeDef* ADC_InitStruct) -{ - uint32_t tmpreg1 = 0; - uint8_t tmpreg2 = 0; - /* Check the parameters */ - assert_param(IS_ADC_ALL_PERIPH(ADCx)); - assert_param(IS_ADC_MODE(ADC_InitStruct->ADC_Mode)); - assert_param(IS_FUNCTIONAL_STATE(ADC_InitStruct->ADC_ScanConvMode)); - assert_param(IS_FUNCTIONAL_STATE(ADC_InitStruct->ADC_ContinuousConvMode)); - assert_param(IS_ADC_EXT_TRIG(ADC_InitStruct->ADC_ExternalTrigConv)); - assert_param(IS_ADC_DATA_ALIGN(ADC_InitStruct->ADC_DataAlign)); - assert_param(IS_ADC_REGULAR_LENGTH(ADC_InitStruct->ADC_NbrOfChannel)); - - /*---------------------------- ADCx CR1 Configuration -----------------*/ - /* Get the ADCx CR1 value */ - tmpreg1 = ADCx->CR1; - /* Clear DUALMOD and SCAN bits */ - tmpreg1 &= CR1_CLEAR_Mask; - /* Configure ADCx: Dual mode and scan conversion mode */ - /* Set DUALMOD bits according to ADC_Mode value */ - /* Set SCAN bit according to ADC_ScanConvMode value */ - tmpreg1 |= (uint32_t)(ADC_InitStruct->ADC_Mode | ((uint32_t)ADC_InitStruct->ADC_ScanConvMode << 8)); - /* Write to ADCx CR1 */ - ADCx->CR1 = tmpreg1; - - /*---------------------------- ADCx CR2 Configuration -----------------*/ - /* Get the ADCx CR2 value */ - tmpreg1 = ADCx->CR2; - /* Clear CONT, ALIGN and EXTSEL bits */ - tmpreg1 &= CR2_CLEAR_Mask; - /* Configure ADCx: external trigger event and continuous conversion mode */ - /* Set ALIGN bit according to ADC_DataAlign value */ - /* Set EXTSEL bits according to ADC_ExternalTrigConv value */ - /* Set CONT bit according to ADC_ContinuousConvMode value */ - tmpreg1 |= (uint32_t)(ADC_InitStruct->ADC_DataAlign | ADC_InitStruct->ADC_ExternalTrigConv | - ((uint32_t)ADC_InitStruct->ADC_ContinuousConvMode << 1)); - /* Write to ADCx CR2 */ - ADCx->CR2 = tmpreg1; - - /*---------------------------- ADCx SQR1 Configuration -----------------*/ - /* Get the ADCx SQR1 value */ - tmpreg1 = ADCx->SQR1; - /* Clear L bits */ - tmpreg1 &= SQR1_CLEAR_Mask; - /* Configure ADCx: regular channel sequence length */ - /* Set L bits according to ADC_NbrOfChannel value */ - tmpreg2 |= (uint8_t) (ADC_InitStruct->ADC_NbrOfChannel - (uint8_t)1); - tmpreg1 |= (uint32_t)tmpreg2 << 20; - /* Write to ADCx SQR1 */ - ADCx->SQR1 = tmpreg1; -} - -/** - * @brief Fills each ADC_InitStruct member with its default value. - * @param ADC_InitStruct : pointer to an ADC_InitTypeDef structure which will be initialized. - * @retval None - */ -void ADC_StructInit(ADC_InitTypeDef* ADC_InitStruct) -{ - /* Reset ADC init structure parameters values */ - /* Initialize the ADC_Mode member */ - ADC_InitStruct->ADC_Mode = ADC_Mode_Independent; - /* initialize the ADC_ScanConvMode member */ - ADC_InitStruct->ADC_ScanConvMode = DISABLE; - /* Initialize the ADC_ContinuousConvMode member */ - ADC_InitStruct->ADC_ContinuousConvMode = DISABLE; - /* Initialize the ADC_ExternalTrigConv member */ - ADC_InitStruct->ADC_ExternalTrigConv = ADC_ExternalTrigConv_T1_CC1; - /* Initialize the ADC_DataAlign member */ - ADC_InitStruct->ADC_DataAlign = ADC_DataAlign_Right; - /* Initialize the ADC_NbrOfChannel member */ - ADC_InitStruct->ADC_NbrOfChannel = 1; -} - -/** - * @brief Enables or disables the specified ADC peripheral. - * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. - * @param NewState: new state of the ADCx peripheral. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void ADC_Cmd(ADC_TypeDef* ADCx, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_ADC_ALL_PERIPH(ADCx)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - if (NewState != DISABLE) - { - /* Set the ADON bit to wake up the ADC from power down mode */ - ADCx->CR2 |= CR2_ADON_Set; - } - else - { - /* Disable the selected ADC peripheral */ - ADCx->CR2 &= CR2_ADON_Reset; - } -} - -/** - * @brief Enables or disables the specified ADC DMA request. - * @param ADCx: where x can be 1 or 3 to select the ADC peripheral. - * Note: ADC2 hasn't a DMA capability. - * @param NewState: new state of the selected ADC DMA transfer. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void ADC_DMACmd(ADC_TypeDef* ADCx, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_ADC_DMA_PERIPH(ADCx)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - if (NewState != DISABLE) - { - /* Enable the selected ADC DMA request */ - ADCx->CR2 |= CR2_DMA_Set; - } - else - { - /* Disable the selected ADC DMA request */ - ADCx->CR2 &= CR2_DMA_Reset; - } -} - -/** - * @brief Enables or disables the specified ADC interrupts. - * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. - * @param ADC_IT: specifies the ADC interrupt sources to be enabled or disabled. - * This parameter can be any combination of the following values: - * @arg ADC_IT_EOC: End of conversion interrupt mask - * @arg ADC_IT_AWD: Analog watchdog interrupt mask - * @arg ADC_IT_JEOC: End of injected conversion interrupt mask - * @param NewState: new state of the specified ADC interrupts. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void ADC_ITConfig(ADC_TypeDef* ADCx, uint16_t ADC_IT, FunctionalState NewState) -{ - uint8_t itmask = 0; - /* Check the parameters */ - assert_param(IS_ADC_ALL_PERIPH(ADCx)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - assert_param(IS_ADC_IT(ADC_IT)); - /* Get the ADC IT index */ - itmask = (uint8_t)ADC_IT; - if (NewState != DISABLE) - { - /* Enable the selected ADC interrupts */ - ADCx->CR1 |= itmask; - } - else - { - /* Disable the selected ADC interrupts */ - ADCx->CR1 &= (~(uint32_t)itmask); - } -} - -/** - * @brief Resets the selected ADC calibration registers. - * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. - * @retval None - */ -void ADC_ResetCalibration(ADC_TypeDef* ADCx) -{ - /* Check the parameters */ - assert_param(IS_ADC_ALL_PERIPH(ADCx)); - /* Resets the selected ADC calibartion registers */ - ADCx->CR2 |= CR2_RSTCAL_Set; -} - -/** - * @brief Gets the selected ADC reset calibration registers status. - * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. - * @retval The new state of ADC reset calibration registers (SET or RESET). - */ -FlagStatus ADC_GetResetCalibrationStatus(ADC_TypeDef* ADCx) -{ - FlagStatus bitstatus = RESET; - /* Check the parameters */ - assert_param(IS_ADC_ALL_PERIPH(ADCx)); - /* Check the status of RSTCAL bit */ - if ((ADCx->CR2 & CR2_RSTCAL_Set) != (uint32_t)RESET) - { - /* RSTCAL bit is set */ - bitstatus = SET; - } - else - { - /* RSTCAL bit is reset */ - bitstatus = RESET; - } - /* Return the RSTCAL bit status */ - return bitstatus; -} - -/** - * @brief Starts the selected ADC calibration process. - * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. - * @retval None - */ -void ADC_StartCalibration(ADC_TypeDef* ADCx) -{ - /* Check the parameters */ - assert_param(IS_ADC_ALL_PERIPH(ADCx)); - /* Enable the selected ADC calibration process */ - ADCx->CR2 |= CR2_CAL_Set; -} - -/** - * @brief Gets the selected ADC calibration status. - * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. - * @retval The new state of ADC calibration (SET or RESET). - */ -FlagStatus ADC_GetCalibrationStatus(ADC_TypeDef* ADCx) -{ - FlagStatus bitstatus = RESET; - /* Check the parameters */ - assert_param(IS_ADC_ALL_PERIPH(ADCx)); - /* Check the status of CAL bit */ - if ((ADCx->CR2 & CR2_CAL_Set) != (uint32_t)RESET) - { - /* CAL bit is set: calibration on going */ - bitstatus = SET; - } - else - { - /* CAL bit is reset: end of calibration */ - bitstatus = RESET; - } - /* Return the CAL bit status */ - return bitstatus; -} - -/** - * @brief Enables or disables the selected ADC software start conversion . - * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. - * @param NewState: new state of the selected ADC software start conversion. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void ADC_SoftwareStartConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_ADC_ALL_PERIPH(ADCx)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - if (NewState != DISABLE) - { - /* Enable the selected ADC conversion on external event and start the selected - ADC conversion */ - ADCx->CR2 |= CR2_EXTTRIG_SWSTART_Set; - } - else - { - /* Disable the selected ADC conversion on external event and stop the selected - ADC conversion */ - ADCx->CR2 &= CR2_EXTTRIG_SWSTART_Reset; - } -} - -/** - * @brief Gets the selected ADC Software start conversion Status. - * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. - * @retval The new state of ADC software start conversion (SET or RESET). - */ -FlagStatus ADC_GetSoftwareStartConvStatus(ADC_TypeDef* ADCx) -{ - FlagStatus bitstatus = RESET; - /* Check the parameters */ - assert_param(IS_ADC_ALL_PERIPH(ADCx)); - /* Check the status of SWSTART bit */ - if ((ADCx->CR2 & CR2_SWSTART_Set) != (uint32_t)RESET) - { - /* SWSTART bit is set */ - bitstatus = SET; - } - else - { - /* SWSTART bit is reset */ - bitstatus = RESET; - } - /* Return the SWSTART bit status */ - return bitstatus; -} - -/** - * @brief Configures the discontinuous mode for the selected ADC regular - * group channel. - * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. - * @param Number: specifies the discontinuous mode regular channel - * count value. This number must be between 1 and 8. - * @retval None - */ -void ADC_DiscModeChannelCountConfig(ADC_TypeDef* ADCx, uint8_t Number) -{ - uint32_t tmpreg1 = 0; - uint32_t tmpreg2 = 0; - /* Check the parameters */ - assert_param(IS_ADC_ALL_PERIPH(ADCx)); - assert_param(IS_ADC_REGULAR_DISC_NUMBER(Number)); - /* Get the old register value */ - tmpreg1 = ADCx->CR1; - /* Clear the old discontinuous mode channel count */ - tmpreg1 &= CR1_DISCNUM_Reset; - /* Set the discontinuous mode channel count */ - tmpreg2 = Number - 1; - tmpreg1 |= tmpreg2 << 13; - /* Store the new register value */ - ADCx->CR1 = tmpreg1; -} - -/** - * @brief Enables or disables the discontinuous mode on regular group - * channel for the specified ADC - * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. - * @param NewState: new state of the selected ADC discontinuous mode - * on regular group channel. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void ADC_DiscModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_ADC_ALL_PERIPH(ADCx)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - if (NewState != DISABLE) - { - /* Enable the selected ADC regular discontinuous mode */ - ADCx->CR1 |= CR1_DISCEN_Set; - } - else - { - /* Disable the selected ADC regular discontinuous mode */ - ADCx->CR1 &= CR1_DISCEN_Reset; - } -} - -/** - * @brief Configures for the selected ADC regular channel its corresponding - * rank in the sequencer and its sample time. - * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. - * @param ADC_Channel: the ADC channel to configure. - * This parameter can be one of the following values: - * @arg ADC_Channel_0: ADC Channel0 selected - * @arg ADC_Channel_1: ADC Channel1 selected - * @arg ADC_Channel_2: ADC Channel2 selected - * @arg ADC_Channel_3: ADC Channel3 selected - * @arg ADC_Channel_4: ADC Channel4 selected - * @arg ADC_Channel_5: ADC Channel5 selected - * @arg ADC_Channel_6: ADC Channel6 selected - * @arg ADC_Channel_7: ADC Channel7 selected - * @arg ADC_Channel_8: ADC Channel8 selected - * @arg ADC_Channel_9: ADC Channel9 selected - * @arg ADC_Channel_10: ADC Channel10 selected - * @arg ADC_Channel_11: ADC Channel11 selected - * @arg ADC_Channel_12: ADC Channel12 selected - * @arg ADC_Channel_13: ADC Channel13 selected - * @arg ADC_Channel_14: ADC Channel14 selected - * @arg ADC_Channel_15: ADC Channel15 selected - * @arg ADC_Channel_16: ADC Channel16 selected - * @arg ADC_Channel_17: ADC Channel17 selected - * @param Rank: The rank in the regular group sequencer. This parameter must be between 1 to 16. - * @param ADC_SampleTime: The sample time value to be set for the selected channel. - * This parameter can be one of the following values: - * @arg ADC_SampleTime_1Cycles5: Sample time equal to 1.5 cycles - * @arg ADC_SampleTime_7Cycles5: Sample time equal to 7.5 cycles - * @arg ADC_SampleTime_13Cycles5: Sample time equal to 13.5 cycles - * @arg ADC_SampleTime_28Cycles5: Sample time equal to 28.5 cycles - * @arg ADC_SampleTime_41Cycles5: Sample time equal to 41.5 cycles - * @arg ADC_SampleTime_55Cycles5: Sample time equal to 55.5 cycles - * @arg ADC_SampleTime_71Cycles5: Sample time equal to 71.5 cycles - * @arg ADC_SampleTime_239Cycles5: Sample time equal to 239.5 cycles - * @retval None - */ -void ADC_RegularChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel, uint8_t Rank, uint8_t ADC_SampleTime) -{ - uint32_t tmpreg1 = 0, tmpreg2 = 0; - /* Check the parameters */ - assert_param(IS_ADC_ALL_PERIPH(ADCx)); - assert_param(IS_ADC_CHANNEL(ADC_Channel)); - assert_param(IS_ADC_REGULAR_RANK(Rank)); - assert_param(IS_ADC_SAMPLE_TIME(ADC_SampleTime)); - /* if ADC_Channel_10 ... ADC_Channel_17 is selected */ - if (ADC_Channel > ADC_Channel_9) - { - /* Get the old register value */ - tmpreg1 = ADCx->SMPR1; - /* Calculate the mask to clear */ - tmpreg2 = SMPR1_SMP_Set << (3 * (ADC_Channel - 10)); - /* Clear the old channel sample time */ - tmpreg1 &= ~tmpreg2; - /* Calculate the mask to set */ - tmpreg2 = (uint32_t)ADC_SampleTime << (3 * (ADC_Channel - 10)); - /* Set the new channel sample time */ - tmpreg1 |= tmpreg2; - /* Store the new register value */ - ADCx->SMPR1 = tmpreg1; - } - else /* ADC_Channel include in ADC_Channel_[0..9] */ - { - /* Get the old register value */ - tmpreg1 = ADCx->SMPR2; - /* Calculate the mask to clear */ - tmpreg2 = SMPR2_SMP_Set << (3 * ADC_Channel); - /* Clear the old channel sample time */ - tmpreg1 &= ~tmpreg2; - /* Calculate the mask to set */ - tmpreg2 = (uint32_t)ADC_SampleTime << (3 * ADC_Channel); - /* Set the new channel sample time */ - tmpreg1 |= tmpreg2; - /* Store the new register value */ - ADCx->SMPR2 = tmpreg1; - } - /* For Rank 1 to 6 */ - if (Rank < 7) - { - /* Get the old register value */ - tmpreg1 = ADCx->SQR3; - /* Calculate the mask to clear */ - tmpreg2 = SQR3_SQ_Set << (5 * (Rank - 1)); - /* Clear the old SQx bits for the selected rank */ - tmpreg1 &= ~tmpreg2; - /* Calculate the mask to set */ - tmpreg2 = (uint32_t)ADC_Channel << (5 * (Rank - 1)); - /* Set the SQx bits for the selected rank */ - tmpreg1 |= tmpreg2; - /* Store the new register value */ - ADCx->SQR3 = tmpreg1; - } - /* For Rank 7 to 12 */ - else if (Rank < 13) - { - /* Get the old register value */ - tmpreg1 = ADCx->SQR2; - /* Calculate the mask to clear */ - tmpreg2 = SQR2_SQ_Set << (5 * (Rank - 7)); - /* Clear the old SQx bits for the selected rank */ - tmpreg1 &= ~tmpreg2; - /* Calculate the mask to set */ - tmpreg2 = (uint32_t)ADC_Channel << (5 * (Rank - 7)); - /* Set the SQx bits for the selected rank */ - tmpreg1 |= tmpreg2; - /* Store the new register value */ - ADCx->SQR2 = tmpreg1; - } - /* For Rank 13 to 16 */ - else - { - /* Get the old register value */ - tmpreg1 = ADCx->SQR1; - /* Calculate the mask to clear */ - tmpreg2 = SQR1_SQ_Set << (5 * (Rank - 13)); - /* Clear the old SQx bits for the selected rank */ - tmpreg1 &= ~tmpreg2; - /* Calculate the mask to set */ - tmpreg2 = (uint32_t)ADC_Channel << (5 * (Rank - 13)); - /* Set the SQx bits for the selected rank */ - tmpreg1 |= tmpreg2; - /* Store the new register value */ - ADCx->SQR1 = tmpreg1; - } -} - -/** - * @brief Enables or disables the ADCx conversion through external trigger. - * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. - * @param NewState: new state of the selected ADC external trigger start of conversion. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void ADC_ExternalTrigConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_ADC_ALL_PERIPH(ADCx)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - if (NewState != DISABLE) - { - /* Enable the selected ADC conversion on external event */ - ADCx->CR2 |= CR2_EXTTRIG_Set; - } - else - { - /* Disable the selected ADC conversion on external event */ - ADCx->CR2 &= CR2_EXTTRIG_Reset; - } -} - -/** - * @brief Returns the last ADCx conversion result data for regular channel. - * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. - * @retval The Data conversion value. - */ -uint16_t ADC_GetConversionValue(ADC_TypeDef* ADCx) -{ - /* Check the parameters */ - assert_param(IS_ADC_ALL_PERIPH(ADCx)); - /* Return the selected ADC conversion value */ - return (uint16_t) ADCx->DR; -} - -/** - * @brief Returns the last ADC1 and ADC2 conversion result data in dual mode. - * @retval The Data conversion value. - */ -uint32_t ADC_GetDualModeConversionValue(void) -{ - /* Return the dual mode conversion value */ - return (*(__IO uint32_t *) DR_ADDRESS); -} - -/** - * @brief Enables or disables the selected ADC automatic injected group - * conversion after regular one. - * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. - * @param NewState: new state of the selected ADC auto injected conversion - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void ADC_AutoInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_ADC_ALL_PERIPH(ADCx)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - if (NewState != DISABLE) - { - /* Enable the selected ADC automatic injected group conversion */ - ADCx->CR1 |= CR1_JAUTO_Set; - } - else - { - /* Disable the selected ADC automatic injected group conversion */ - ADCx->CR1 &= CR1_JAUTO_Reset; - } -} - -/** - * @brief Enables or disables the discontinuous mode for injected group - * channel for the specified ADC - * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. - * @param NewState: new state of the selected ADC discontinuous mode - * on injected group channel. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void ADC_InjectedDiscModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_ADC_ALL_PERIPH(ADCx)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - if (NewState != DISABLE) - { - /* Enable the selected ADC injected discontinuous mode */ - ADCx->CR1 |= CR1_JDISCEN_Set; - } - else - { - /* Disable the selected ADC injected discontinuous mode */ - ADCx->CR1 &= CR1_JDISCEN_Reset; - } -} - -/** - * @brief Configures the ADCx external trigger for injected channels conversion. - * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. - * @param ADC_ExternalTrigInjecConv: specifies the ADC trigger to start injected conversion. - * This parameter can be one of the following values: - * @arg ADC_ExternalTrigInjecConv_T1_TRGO: Timer1 TRGO event selected (for ADC1, ADC2 and ADC3) - * @arg ADC_ExternalTrigInjecConv_T1_CC4: Timer1 capture compare4 selected (for ADC1, ADC2 and ADC3) - * @arg ADC_ExternalTrigInjecConv_T2_TRGO: Timer2 TRGO event selected (for ADC1 and ADC2) - * @arg ADC_ExternalTrigInjecConv_T2_CC1: Timer2 capture compare1 selected (for ADC1 and ADC2) - * @arg ADC_ExternalTrigInjecConv_T3_CC4: Timer3 capture compare4 selected (for ADC1 and ADC2) - * @arg ADC_ExternalTrigInjecConv_T4_TRGO: Timer4 TRGO event selected (for ADC1 and ADC2) - * @arg ADC_ExternalTrigInjecConv_Ext_IT15_TIM8_CC4: External interrupt line 15 or Timer8 - * capture compare4 event selected (for ADC1 and ADC2) - * @arg ADC_ExternalTrigInjecConv_T4_CC3: Timer4 capture compare3 selected (for ADC3 only) - * @arg ADC_ExternalTrigInjecConv_T8_CC2: Timer8 capture compare2 selected (for ADC3 only) - * @arg ADC_ExternalTrigInjecConv_T8_CC4: Timer8 capture compare4 selected (for ADC3 only) - * @arg ADC_ExternalTrigInjecConv_T5_TRGO: Timer5 TRGO event selected (for ADC3 only) - * @arg ADC_ExternalTrigInjecConv_T5_CC4: Timer5 capture compare4 selected (for ADC3 only) - * @arg ADC_ExternalTrigInjecConv_None: Injected conversion started by software and not - * by external trigger (for ADC1, ADC2 and ADC3) - * @retval None - */ -void ADC_ExternalTrigInjectedConvConfig(ADC_TypeDef* ADCx, uint32_t ADC_ExternalTrigInjecConv) -{ - uint32_t tmpreg = 0; - /* Check the parameters */ - assert_param(IS_ADC_ALL_PERIPH(ADCx)); - assert_param(IS_ADC_EXT_INJEC_TRIG(ADC_ExternalTrigInjecConv)); - /* Get the old register value */ - tmpreg = ADCx->CR2; - /* Clear the old external event selection for injected group */ - tmpreg &= CR2_JEXTSEL_Reset; - /* Set the external event selection for injected group */ - tmpreg |= ADC_ExternalTrigInjecConv; - /* Store the new register value */ - ADCx->CR2 = tmpreg; -} - -/** - * @brief Enables or disables the ADCx injected channels conversion through - * external trigger - * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. - * @param NewState: new state of the selected ADC external trigger start of - * injected conversion. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void ADC_ExternalTrigInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_ADC_ALL_PERIPH(ADCx)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - if (NewState != DISABLE) - { - /* Enable the selected ADC external event selection for injected group */ - ADCx->CR2 |= CR2_JEXTTRIG_Set; - } - else - { - /* Disable the selected ADC external event selection for injected group */ - ADCx->CR2 &= CR2_JEXTTRIG_Reset; - } -} - -/** - * @brief Enables or disables the selected ADC start of the injected - * channels conversion. - * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. - * @param NewState: new state of the selected ADC software start injected conversion. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void ADC_SoftwareStartInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_ADC_ALL_PERIPH(ADCx)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - if (NewState != DISABLE) - { - /* Enable the selected ADC conversion for injected group on external event and start the selected - ADC injected conversion */ - ADCx->CR2 |= CR2_JEXTTRIG_JSWSTART_Set; - } - else - { - /* Disable the selected ADC conversion on external event for injected group and stop the selected - ADC injected conversion */ - ADCx->CR2 &= CR2_JEXTTRIG_JSWSTART_Reset; - } -} - -/** - * @brief Gets the selected ADC Software start injected conversion Status. - * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. - * @retval The new state of ADC software start injected conversion (SET or RESET). - */ -FlagStatus ADC_GetSoftwareStartInjectedConvCmdStatus(ADC_TypeDef* ADCx) -{ - FlagStatus bitstatus = RESET; - /* Check the parameters */ - assert_param(IS_ADC_ALL_PERIPH(ADCx)); - /* Check the status of JSWSTART bit */ - if ((ADCx->CR2 & CR2_JSWSTART_Set) != (uint32_t)RESET) - { - /* JSWSTART bit is set */ - bitstatus = SET; - } - else - { - /* JSWSTART bit is reset */ - bitstatus = RESET; - } - /* Return the JSWSTART bit status */ - return bitstatus; -} - -/** - * @brief Configures for the selected ADC injected channel its corresponding - * rank in the sequencer and its sample time. - * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. - * @param ADC_Channel: the ADC channel to configure. - * This parameter can be one of the following values: - * @arg ADC_Channel_0: ADC Channel0 selected - * @arg ADC_Channel_1: ADC Channel1 selected - * @arg ADC_Channel_2: ADC Channel2 selected - * @arg ADC_Channel_3: ADC Channel3 selected - * @arg ADC_Channel_4: ADC Channel4 selected - * @arg ADC_Channel_5: ADC Channel5 selected - * @arg ADC_Channel_6: ADC Channel6 selected - * @arg ADC_Channel_7: ADC Channel7 selected - * @arg ADC_Channel_8: ADC Channel8 selected - * @arg ADC_Channel_9: ADC Channel9 selected - * @arg ADC_Channel_10: ADC Channel10 selected - * @arg ADC_Channel_11: ADC Channel11 selected - * @arg ADC_Channel_12: ADC Channel12 selected - * @arg ADC_Channel_13: ADC Channel13 selected - * @arg ADC_Channel_14: ADC Channel14 selected - * @arg ADC_Channel_15: ADC Channel15 selected - * @arg ADC_Channel_16: ADC Channel16 selected - * @arg ADC_Channel_17: ADC Channel17 selected - * @param Rank: The rank in the injected group sequencer. This parameter must be between 1 and 4. - * @param ADC_SampleTime: The sample time value to be set for the selected channel. - * This parameter can be one of the following values: - * @arg ADC_SampleTime_1Cycles5: Sample time equal to 1.5 cycles - * @arg ADC_SampleTime_7Cycles5: Sample time equal to 7.5 cycles - * @arg ADC_SampleTime_13Cycles5: Sample time equal to 13.5 cycles - * @arg ADC_SampleTime_28Cycles5: Sample time equal to 28.5 cycles - * @arg ADC_SampleTime_41Cycles5: Sample time equal to 41.5 cycles - * @arg ADC_SampleTime_55Cycles5: Sample time equal to 55.5 cycles - * @arg ADC_SampleTime_71Cycles5: Sample time equal to 71.5 cycles - * @arg ADC_SampleTime_239Cycles5: Sample time equal to 239.5 cycles - * @retval None - */ -void ADC_InjectedChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel, uint8_t Rank, uint8_t ADC_SampleTime) -{ - uint32_t tmpreg1 = 0, tmpreg2 = 0, tmpreg3 = 0; - /* Check the parameters */ - assert_param(IS_ADC_ALL_PERIPH(ADCx)); - assert_param(IS_ADC_CHANNEL(ADC_Channel)); - assert_param(IS_ADC_INJECTED_RANK(Rank)); - assert_param(IS_ADC_SAMPLE_TIME(ADC_SampleTime)); - /* if ADC_Channel_10 ... ADC_Channel_17 is selected */ - if (ADC_Channel > ADC_Channel_9) - { - /* Get the old register value */ - tmpreg1 = ADCx->SMPR1; - /* Calculate the mask to clear */ - tmpreg2 = SMPR1_SMP_Set << (3*(ADC_Channel - 10)); - /* Clear the old channel sample time */ - tmpreg1 &= ~tmpreg2; - /* Calculate the mask to set */ - tmpreg2 = (uint32_t)ADC_SampleTime << (3*(ADC_Channel - 10)); - /* Set the new channel sample time */ - tmpreg1 |= tmpreg2; - /* Store the new register value */ - ADCx->SMPR1 = tmpreg1; - } - else /* ADC_Channel include in ADC_Channel_[0..9] */ - { - /* Get the old register value */ - tmpreg1 = ADCx->SMPR2; - /* Calculate the mask to clear */ - tmpreg2 = SMPR2_SMP_Set << (3 * ADC_Channel); - /* Clear the old channel sample time */ - tmpreg1 &= ~tmpreg2; - /* Calculate the mask to set */ - tmpreg2 = (uint32_t)ADC_SampleTime << (3 * ADC_Channel); - /* Set the new channel sample time */ - tmpreg1 |= tmpreg2; - /* Store the new register value */ - ADCx->SMPR2 = tmpreg1; - } - /* Rank configuration */ - /* Get the old register value */ - tmpreg1 = ADCx->JSQR; - /* Get JL value: Number = JL+1 */ - tmpreg3 = (tmpreg1 & JSQR_JL_Set)>> 20; - /* Calculate the mask to clear: ((Rank-1)+(4-JL-1)) */ - tmpreg2 = JSQR_JSQ_Set << (5 * (uint8_t)((Rank + 3) - (tmpreg3 + 1))); - /* Clear the old JSQx bits for the selected rank */ - tmpreg1 &= ~tmpreg2; - /* Calculate the mask to set: ((Rank-1)+(4-JL-1)) */ - tmpreg2 = (uint32_t)ADC_Channel << (5 * (uint8_t)((Rank + 3) - (tmpreg3 + 1))); - /* Set the JSQx bits for the selected rank */ - tmpreg1 |= tmpreg2; - /* Store the new register value */ - ADCx->JSQR = tmpreg1; -} - -/** - * @brief Configures the sequencer length for injected channels - * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. - * @param Length: The sequencer length. - * This parameter must be a number between 1 to 4. - * @retval None - */ -void ADC_InjectedSequencerLengthConfig(ADC_TypeDef* ADCx, uint8_t Length) -{ - uint32_t tmpreg1 = 0; - uint32_t tmpreg2 = 0; - /* Check the parameters */ - assert_param(IS_ADC_ALL_PERIPH(ADCx)); - assert_param(IS_ADC_INJECTED_LENGTH(Length)); - - /* Get the old register value */ - tmpreg1 = ADCx->JSQR; - /* Clear the old injected sequnence lenght JL bits */ - tmpreg1 &= JSQR_JL_Reset; - /* Set the injected sequnence lenght JL bits */ - tmpreg2 = Length - 1; - tmpreg1 |= tmpreg2 << 20; - /* Store the new register value */ - ADCx->JSQR = tmpreg1; -} - -/** - * @brief Set the injected channels conversion value offset - * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. - * @param ADC_InjectedChannel: the ADC injected channel to set its offset. - * This parameter can be one of the following values: - * @arg ADC_InjectedChannel_1: Injected Channel1 selected - * @arg ADC_InjectedChannel_2: Injected Channel2 selected - * @arg ADC_InjectedChannel_3: Injected Channel3 selected - * @arg ADC_InjectedChannel_4: Injected Channel4 selected - * @param Offset: the offset value for the selected ADC injected channel - * This parameter must be a 12bit value. - * @retval None - */ -void ADC_SetInjectedOffset(ADC_TypeDef* ADCx, uint8_t ADC_InjectedChannel, uint16_t Offset) -{ - __IO uint32_t tmp = 0; - - /* Check the parameters */ - assert_param(IS_ADC_ALL_PERIPH(ADCx)); - assert_param(IS_ADC_INJECTED_CHANNEL(ADC_InjectedChannel)); - assert_param(IS_ADC_OFFSET(Offset)); - - tmp = (uint32_t)ADCx; - tmp += ADC_InjectedChannel; - - /* Set the selected injected channel data offset */ - *(__IO uint32_t *) tmp = (uint32_t)Offset; -} - -/** - * @brief Returns the ADC injected channel conversion result - * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. - * @param ADC_InjectedChannel: the converted ADC injected channel. - * This parameter can be one of the following values: - * @arg ADC_InjectedChannel_1: Injected Channel1 selected - * @arg ADC_InjectedChannel_2: Injected Channel2 selected - * @arg ADC_InjectedChannel_3: Injected Channel3 selected - * @arg ADC_InjectedChannel_4: Injected Channel4 selected - * @retval The Data conversion value. - */ -uint16_t ADC_GetInjectedConversionValue(ADC_TypeDef* ADCx, uint8_t ADC_InjectedChannel) -{ - __IO uint32_t tmp = 0; - - /* Check the parameters */ - assert_param(IS_ADC_ALL_PERIPH(ADCx)); - assert_param(IS_ADC_INJECTED_CHANNEL(ADC_InjectedChannel)); - - tmp = (uint32_t)ADCx; - tmp += ADC_InjectedChannel + JDR_Offset; - - /* Returns the selected injected channel conversion data value */ - return (uint16_t) (*(__IO uint32_t*) tmp); -} - -/** - * @brief Enables or disables the analog watchdog on single/all regular - * or injected channels - * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. - * @param ADC_AnalogWatchdog: the ADC analog watchdog configuration. - * This parameter can be one of the following values: - * @arg ADC_AnalogWatchdog_SingleRegEnable: Analog watchdog on a single regular channel - * @arg ADC_AnalogWatchdog_SingleInjecEnable: Analog watchdog on a single injected channel - * @arg ADC_AnalogWatchdog_SingleRegOrInjecEnable: Analog watchdog on a single regular or injected channel - * @arg ADC_AnalogWatchdog_AllRegEnable: Analog watchdog on all regular channel - * @arg ADC_AnalogWatchdog_AllInjecEnable: Analog watchdog on all injected channel - * @arg ADC_AnalogWatchdog_AllRegAllInjecEnable: Analog watchdog on all regular and injected channels - * @arg ADC_AnalogWatchdog_None: No channel guarded by the analog watchdog - * @retval None - */ -void ADC_AnalogWatchdogCmd(ADC_TypeDef* ADCx, uint32_t ADC_AnalogWatchdog) -{ - uint32_t tmpreg = 0; - /* Check the parameters */ - assert_param(IS_ADC_ALL_PERIPH(ADCx)); - assert_param(IS_ADC_ANALOG_WATCHDOG(ADC_AnalogWatchdog)); - /* Get the old register value */ - tmpreg = ADCx->CR1; - /* Clear AWDEN, AWDENJ and AWDSGL bits */ - tmpreg &= CR1_AWDMode_Reset; - /* Set the analog watchdog enable mode */ - tmpreg |= ADC_AnalogWatchdog; - /* Store the new register value */ - ADCx->CR1 = tmpreg; -} - -/** - * @brief Configures the high and low thresholds of the analog watchdog. - * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. - * @param HighThreshold: the ADC analog watchdog High threshold value. - * This parameter must be a 12bit value. - * @param LowThreshold: the ADC analog watchdog Low threshold value. - * This parameter must be a 12bit value. - * @retval None - */ -void ADC_AnalogWatchdogThresholdsConfig(ADC_TypeDef* ADCx, uint16_t HighThreshold, - uint16_t LowThreshold) -{ - /* Check the parameters */ - assert_param(IS_ADC_ALL_PERIPH(ADCx)); - assert_param(IS_ADC_THRESHOLD(HighThreshold)); - assert_param(IS_ADC_THRESHOLD(LowThreshold)); - /* Set the ADCx high threshold */ - ADCx->HTR = HighThreshold; - /* Set the ADCx low threshold */ - ADCx->LTR = LowThreshold; -} - -/** - * @brief Configures the analog watchdog guarded single channel - * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. - * @param ADC_Channel: the ADC channel to configure for the analog watchdog. - * This parameter can be one of the following values: - * @arg ADC_Channel_0: ADC Channel0 selected - * @arg ADC_Channel_1: ADC Channel1 selected - * @arg ADC_Channel_2: ADC Channel2 selected - * @arg ADC_Channel_3: ADC Channel3 selected - * @arg ADC_Channel_4: ADC Channel4 selected - * @arg ADC_Channel_5: ADC Channel5 selected - * @arg ADC_Channel_6: ADC Channel6 selected - * @arg ADC_Channel_7: ADC Channel7 selected - * @arg ADC_Channel_8: ADC Channel8 selected - * @arg ADC_Channel_9: ADC Channel9 selected - * @arg ADC_Channel_10: ADC Channel10 selected - * @arg ADC_Channel_11: ADC Channel11 selected - * @arg ADC_Channel_12: ADC Channel12 selected - * @arg ADC_Channel_13: ADC Channel13 selected - * @arg ADC_Channel_14: ADC Channel14 selected - * @arg ADC_Channel_15: ADC Channel15 selected - * @arg ADC_Channel_16: ADC Channel16 selected - * @arg ADC_Channel_17: ADC Channel17 selected - * @retval None - */ -void ADC_AnalogWatchdogSingleChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel) -{ - uint32_t tmpreg = 0; - /* Check the parameters */ - assert_param(IS_ADC_ALL_PERIPH(ADCx)); - assert_param(IS_ADC_CHANNEL(ADC_Channel)); - /* Get the old register value */ - tmpreg = ADCx->CR1; - /* Clear the Analog watchdog channel select bits */ - tmpreg &= CR1_AWDCH_Reset; - /* Set the Analog watchdog channel */ - tmpreg |= ADC_Channel; - /* Store the new register value */ - ADCx->CR1 = tmpreg; -} - -/** - * @brief Enables or disables the temperature sensor and Vrefint channel. - * @param NewState: new state of the temperature sensor. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void ADC_TempSensorVrefintCmd(FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_FUNCTIONAL_STATE(NewState)); - if (NewState != DISABLE) - { - /* Enable the temperature sensor and Vrefint channel*/ - ADC1->CR2 |= CR2_TSVREFE_Set; - } - else - { - /* Disable the temperature sensor and Vrefint channel*/ - ADC1->CR2 &= CR2_TSVREFE_Reset; - } -} - -/** - * @brief Checks whether the specified ADC flag is set or not. - * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. - * @param ADC_FLAG: specifies the flag to check. - * This parameter can be one of the following values: - * @arg ADC_FLAG_AWD: Analog watchdog flag - * @arg ADC_FLAG_EOC: End of conversion flag - * @arg ADC_FLAG_JEOC: End of injected group conversion flag - * @arg ADC_FLAG_JSTRT: Start of injected group conversion flag - * @arg ADC_FLAG_STRT: Start of regular group conversion flag - * @retval The new state of ADC_FLAG (SET or RESET). - */ -FlagStatus ADC_GetFlagStatus(ADC_TypeDef* ADCx, uint8_t ADC_FLAG) -{ - FlagStatus bitstatus = RESET; - /* Check the parameters */ - assert_param(IS_ADC_ALL_PERIPH(ADCx)); - assert_param(IS_ADC_GET_FLAG(ADC_FLAG)); - /* Check the status of the specified ADC flag */ - if ((ADCx->SR & ADC_FLAG) != (uint8_t)RESET) - { - /* ADC_FLAG is set */ - bitstatus = SET; - } - else - { - /* ADC_FLAG is reset */ - bitstatus = RESET; - } - /* Return the ADC_FLAG status */ - return bitstatus; -} - -/** - * @brief Clears the ADCx's pending flags. - * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. - * @param ADC_FLAG: specifies the flag to clear. - * This parameter can be any combination of the following values: - * @arg ADC_FLAG_AWD: Analog watchdog flag - * @arg ADC_FLAG_EOC: End of conversion flag - * @arg ADC_FLAG_JEOC: End of injected group conversion flag - * @arg ADC_FLAG_JSTRT: Start of injected group conversion flag - * @arg ADC_FLAG_STRT: Start of regular group conversion flag - * @retval None - */ -void ADC_ClearFlag(ADC_TypeDef* ADCx, uint8_t ADC_FLAG) -{ - /* Check the parameters */ - assert_param(IS_ADC_ALL_PERIPH(ADCx)); - assert_param(IS_ADC_CLEAR_FLAG(ADC_FLAG)); - /* Clear the selected ADC flags */ - ADCx->SR = ~(uint32_t)ADC_FLAG; -} - -/** - * @brief Checks whether the specified ADC interrupt has occurred or not. - * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. - * @param ADC_IT: specifies the ADC interrupt source to check. - * This parameter can be one of the following values: - * @arg ADC_IT_EOC: End of conversion interrupt mask - * @arg ADC_IT_AWD: Analog watchdog interrupt mask - * @arg ADC_IT_JEOC: End of injected conversion interrupt mask - * @retval The new state of ADC_IT (SET or RESET). - */ -ITStatus ADC_GetITStatus(ADC_TypeDef* ADCx, uint16_t ADC_IT) -{ - ITStatus bitstatus = RESET; - uint32_t itmask = 0, enablestatus = 0; - /* Check the parameters */ - assert_param(IS_ADC_ALL_PERIPH(ADCx)); - assert_param(IS_ADC_GET_IT(ADC_IT)); - /* Get the ADC IT index */ - itmask = ADC_IT >> 8; - /* Get the ADC_IT enable bit status */ - enablestatus = (ADCx->CR1 & (uint8_t)ADC_IT) ; - /* Check the status of the specified ADC interrupt */ - if (((ADCx->SR & itmask) != (uint32_t)RESET) && enablestatus) - { - /* ADC_IT is set */ - bitstatus = SET; - } - else - { - /* ADC_IT is reset */ - bitstatus = RESET; - } - /* Return the ADC_IT status */ - return bitstatus; -} - -/** - * @brief Clears the ADCx’s interrupt pending bits. - * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. - * @param ADC_IT: specifies the ADC interrupt pending bit to clear. - * This parameter can be any combination of the following values: - * @arg ADC_IT_EOC: End of conversion interrupt mask - * @arg ADC_IT_AWD: Analog watchdog interrupt mask - * @arg ADC_IT_JEOC: End of injected conversion interrupt mask - * @retval None - */ -void ADC_ClearITPendingBit(ADC_TypeDef* ADCx, uint16_t ADC_IT) -{ - uint8_t itmask = 0; - /* Check the parameters */ - assert_param(IS_ADC_ALL_PERIPH(ADCx)); - assert_param(IS_ADC_IT(ADC_IT)); - /* Get the ADC IT index */ - itmask = (uint8_t)(ADC_IT >> 8); - /* Clear the selected ADC interrupt pending bits */ - ADCx->SR = ~(uint32_t)itmask; -} - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_bkp.c b/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_bkp.c deleted file mode 100644 index a640868bae..0000000000 --- a/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_bkp.c +++ /dev/null @@ -1,311 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f10x_bkp.c - * @author MCD Application Team - * @version V3.2.0 - * @date 03/01/2010 - * @brief This file provides all the BKP firmware functions. - ****************************************************************************** - * @copy - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2010 STMicroelectronics

- */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x_bkp.h" -#include "stm32f10x_rcc.h" - -/** @addtogroup STM32F10x_StdPeriph_Driver - * @{ - */ - -/** @defgroup BKP - * @brief BKP driver modules - * @{ - */ - -/** @defgroup BKP_Private_TypesDefinitions - * @{ - */ - -/** - * @} - */ - -/** @defgroup BKP_Private_Defines - * @{ - */ - -/* ------------ BKP registers bit address in the alias region --------------- */ -#define BKP_OFFSET (BKP_BASE - PERIPH_BASE) - -/* --- CR Register ----*/ - -/* Alias word address of TPAL bit */ -#define CR_OFFSET (BKP_OFFSET + 0x30) -#define TPAL_BitNumber 0x01 -#define CR_TPAL_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (TPAL_BitNumber * 4)) - -/* Alias word address of TPE bit */ -#define TPE_BitNumber 0x00 -#define CR_TPE_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (TPE_BitNumber * 4)) - -/* --- CSR Register ---*/ - -/* Alias word address of TPIE bit */ -#define CSR_OFFSET (BKP_OFFSET + 0x34) -#define TPIE_BitNumber 0x02 -#define CSR_TPIE_BB (PERIPH_BB_BASE + (CSR_OFFSET * 32) + (TPIE_BitNumber * 4)) - -/* Alias word address of TIF bit */ -#define TIF_BitNumber 0x09 -#define CSR_TIF_BB (PERIPH_BB_BASE + (CSR_OFFSET * 32) + (TIF_BitNumber * 4)) - -/* Alias word address of TEF bit */ -#define TEF_BitNumber 0x08 -#define CSR_TEF_BB (PERIPH_BB_BASE + (CSR_OFFSET * 32) + (TEF_BitNumber * 4)) - -/* ---------------------- BKP registers bit mask ------------------------ */ - -/* RTCCR register bit mask */ -#define RTCCR_CAL_Mask ((uint16_t)0xFF80) -#define RTCCR_Mask ((uint16_t)0xFC7F) - -/* CSR register bit mask */ -#define CSR_CTE_Set ((uint16_t)0x0001) -#define CSR_CTI_Set ((uint16_t)0x0002) - -/** - * @} - */ - - -/** @defgroup BKP_Private_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup BKP_Private_Variables - * @{ - */ - -/** - * @} - */ - -/** @defgroup BKP_Private_FunctionPrototypes - * @{ - */ - -/** - * @} - */ - -/** @defgroup BKP_Private_Functions - * @{ - */ - -/** - * @brief Deinitializes the BKP peripheral registers to their default reset values. - * @param None - * @retval None - */ -void BKP_DeInit(void) -{ - RCC_BackupResetCmd(ENABLE); - RCC_BackupResetCmd(DISABLE); -} - -/** - * @brief Configures the Tamper Pin active level. - * @param BKP_TamperPinLevel: specifies the Tamper Pin active level. - * This parameter can be one of the following values: - * @arg BKP_TamperPinLevel_High: Tamper pin active on high level - * @arg BKP_TamperPinLevel_Low: Tamper pin active on low level - * @retval None - */ -void BKP_TamperPinLevelConfig(uint16_t BKP_TamperPinLevel) -{ - /* Check the parameters */ - assert_param(IS_BKP_TAMPER_PIN_LEVEL(BKP_TamperPinLevel)); - *(__IO uint32_t *) CR_TPAL_BB = BKP_TamperPinLevel; -} - -/** - * @brief Enables or disables the Tamper Pin activation. - * @param NewState: new state of the Tamper Pin activation. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void BKP_TamperPinCmd(FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_FUNCTIONAL_STATE(NewState)); - *(__IO uint32_t *) CR_TPE_BB = (uint32_t)NewState; -} - -/** - * @brief Enables or disables the Tamper Pin Interrupt. - * @param NewState: new state of the Tamper Pin Interrupt. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void BKP_ITConfig(FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_FUNCTIONAL_STATE(NewState)); - *(__IO uint32_t *) CSR_TPIE_BB = (uint32_t)NewState; -} - -/** - * @brief Select the RTC output source to output on the Tamper pin. - * @param BKP_RTCOutputSource: specifies the RTC output source. - * This parameter can be one of the following values: - * @arg BKP_RTCOutputSource_None: no RTC output on the Tamper pin. - * @arg BKP_RTCOutputSource_CalibClock: output the RTC clock with frequency - * divided by 64 on the Tamper pin. - * @arg BKP_RTCOutputSource_Alarm: output the RTC Alarm pulse signal on - * the Tamper pin. - * @arg BKP_RTCOutputSource_Second: output the RTC Second pulse signal on - * the Tamper pin. - * @retval None - */ -void BKP_RTCOutputConfig(uint16_t BKP_RTCOutputSource) -{ - uint16_t tmpreg = 0; - /* Check the parameters */ - assert_param(IS_BKP_RTC_OUTPUT_SOURCE(BKP_RTCOutputSource)); - tmpreg = BKP->RTCCR; - /* Clear CCO, ASOE and ASOS bits */ - tmpreg &= RTCCR_Mask; - - /* Set CCO, ASOE and ASOS bits according to BKP_RTCOutputSource value */ - tmpreg |= BKP_RTCOutputSource; - /* Store the new value */ - BKP->RTCCR = tmpreg; -} - -/** - * @brief Sets RTC Clock Calibration value. - * @param CalibrationValue: specifies the RTC Clock Calibration value. - * This parameter must be a number between 0 and 0x7F. - * @retval None - */ -void BKP_SetRTCCalibrationValue(uint8_t CalibrationValue) -{ - uint16_t tmpreg = 0; - /* Check the parameters */ - assert_param(IS_BKP_CALIBRATION_VALUE(CalibrationValue)); - tmpreg = BKP->RTCCR; - /* Clear CAL[6:0] bits */ - tmpreg &= RTCCR_CAL_Mask; - /* Set CAL[6:0] bits according to CalibrationValue value */ - tmpreg |= CalibrationValue; - /* Store the new value */ - BKP->RTCCR = tmpreg; -} - -/** - * @brief Writes user data to the specified Data Backup Register. - * @param BKP_DR: specifies the Data Backup Register. - * This parameter can be BKP_DRx where x:[1, 42] - * @param Data: data to write - * @retval None - */ -void BKP_WriteBackupRegister(uint16_t BKP_DR, uint16_t Data) -{ - __IO uint32_t tmp = 0; - - /* Check the parameters */ - assert_param(IS_BKP_DR(BKP_DR)); - - tmp = (uint32_t)BKP_BASE; - tmp += BKP_DR; - - *(__IO uint32_t *) tmp = Data; -} - -/** - * @brief Reads data from the specified Data Backup Register. - * @param BKP_DR: specifies the Data Backup Register. - * This parameter can be BKP_DRx where x:[1, 42] - * @retval The content of the specified Data Backup Register - */ -uint16_t BKP_ReadBackupRegister(uint16_t BKP_DR) -{ - __IO uint32_t tmp = 0; - - /* Check the parameters */ - assert_param(IS_BKP_DR(BKP_DR)); - - tmp = (uint32_t)BKP_BASE; - tmp += BKP_DR; - - return (*(__IO uint16_t *) tmp); -} - -/** - * @brief Checks whether the Tamper Pin Event flag is set or not. - * @param None - * @retval The new state of the Tamper Pin Event flag (SET or RESET). - */ -FlagStatus BKP_GetFlagStatus(void) -{ - return (FlagStatus)(*(__IO uint32_t *) CSR_TEF_BB); -} - -/** - * @brief Clears Tamper Pin Event pending flag. - * @param None - * @retval None - */ -void BKP_ClearFlag(void) -{ - /* Set CTE bit to clear Tamper Pin Event flag */ - BKP->CSR |= CSR_CTE_Set; -} - -/** - * @brief Checks whether the Tamper Pin Interrupt has occurred or not. - * @param None - * @retval The new state of the Tamper Pin Interrupt (SET or RESET). - */ -ITStatus BKP_GetITStatus(void) -{ - return (ITStatus)(*(__IO uint32_t *) CSR_TIF_BB); -} - -/** - * @brief Clears Tamper Pin Interrupt pending bit. - * @param None - * @retval None - */ -void BKP_ClearITPendingBit(void) -{ - /* Set CTI bit to clear Tamper Pin Interrupt pending bit */ - BKP->CSR |= CSR_CTI_Set; -} - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_can.c b/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_can.c deleted file mode 100644 index 6e4723850a..0000000000 --- a/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_can.c +++ /dev/null @@ -1,990 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f10x_can.c - * @author MCD Application Team - * @version V3.2.0 - * @date 03/01/2010 - * @brief This file provides all the CAN firmware functions. - ****************************************************************************** - * @copy - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2010 STMicroelectronics

- */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x_can.h" -#include "stm32f10x_rcc.h" - -/** @addtogroup STM32F10x_StdPeriph_Driver - * @{ - */ - -/** @defgroup CAN - * @brief CAN driver modules - * @{ - */ - -/** @defgroup CAN_Private_TypesDefinitions - * @{ - */ - -/** - * @} - */ - -/** @defgroup CAN_Private_Defines - * @{ - */ - -/* CAN Master Control Register bits */ -#define MCR_INRQ ((uint32_t)0x00000001) /* Initialization request */ -#define MCR_SLEEP ((uint32_t)0x00000002) /* Sleep mode request */ -#define MCR_TXFP ((uint32_t)0x00000004) /* Transmit FIFO priority */ -#define MCR_RFLM ((uint32_t)0x00000008) /* Receive FIFO locked mode */ -#define MCR_NART ((uint32_t)0x00000010) /* No automatic retransmission */ -#define MCR_AWUM ((uint32_t)0x00000020) /* Automatic wake up mode */ -#define MCR_ABOM ((uint32_t)0x00000040) /* Automatic bus-off management */ -#define MCR_TTCM ((uint32_t)0x00000080) /* time triggered communication */ -#define MCR_RESET ((uint32_t)0x00008000) /* time triggered communication */ -#define MCR_DBF ((uint32_t)0x00010000) /* software master reset */ - -/* CAN Master Status Register bits */ -#define MSR_INAK ((uint32_t)0x00000001) /* Initialization acknowledge */ -#define MSR_WKUI ((uint32_t)0x00000008) /* Wake-up interrupt */ -#define MSR_SLAKI ((uint32_t)0x00000010) /* Sleep acknowledge interrupt */ - -/* CAN Transmit Status Register bits */ -#define TSR_RQCP0 ((uint32_t)0x00000001) /* Request completed mailbox0 */ -#define TSR_TXOK0 ((uint32_t)0x00000002) /* Transmission OK of mailbox0 */ -#define TSR_ABRQ0 ((uint32_t)0x00000080) /* Abort request for mailbox0 */ -#define TSR_RQCP1 ((uint32_t)0x00000100) /* Request completed mailbox1 */ -#define TSR_TXOK1 ((uint32_t)0x00000200) /* Transmission OK of mailbox1 */ -#define TSR_ABRQ1 ((uint32_t)0x00008000) /* Abort request for mailbox1 */ -#define TSR_RQCP2 ((uint32_t)0x00010000) /* Request completed mailbox2 */ -#define TSR_TXOK2 ((uint32_t)0x00020000) /* Transmission OK of mailbox2 */ -#define TSR_ABRQ2 ((uint32_t)0x00800000) /* Abort request for mailbox2 */ -#define TSR_TME0 ((uint32_t)0x04000000) /* Transmit mailbox 0 empty */ -#define TSR_TME1 ((uint32_t)0x08000000) /* Transmit mailbox 1 empty */ -#define TSR_TME2 ((uint32_t)0x10000000) /* Transmit mailbox 2 empty */ - -/* CAN Receive FIFO 0 Register bits */ -#define RF0R_FULL0 ((uint32_t)0x00000008) /* FIFO 0 full */ -#define RF0R_FOVR0 ((uint32_t)0x00000010) /* FIFO 0 overrun */ -#define RF0R_RFOM0 ((uint32_t)0x00000020) /* Release FIFO 0 output mailbox */ - -/* CAN Receive FIFO 1 Register bits */ -#define RF1R_FULL1 ((uint32_t)0x00000008) /* FIFO 1 full */ -#define RF1R_FOVR1 ((uint32_t)0x00000010) /* FIFO 1 overrun */ -#define RF1R_RFOM1 ((uint32_t)0x00000020) /* Release FIFO 1 output mailbox */ - -/* CAN Error Status Register bits */ -#define ESR_EWGF ((uint32_t)0x00000001) /* Error warning flag */ -#define ESR_EPVF ((uint32_t)0x00000002) /* Error passive flag */ -#define ESR_BOFF ((uint32_t)0x00000004) /* Bus-off flag */ - -/* CAN Mailbox Transmit Request */ -#define TMIDxR_TXRQ ((uint32_t)0x00000001) /* Transmit mailbox request */ - -/* CAN Filter Master Register bits */ -#define FMR_FINIT ((uint32_t)0x00000001) /* Filter init mode */ - -/* Time out for INAK bit */ -#define INAK_TimeOut ((uint32_t)0x0000FFFF) - -/* Time out for SLAK bit */ -#define SLAK_TimeOut ((uint32_t)0x0000FFFF) - -/** - * @} - */ - -/** @defgroup CAN_Private_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup CAN_Private_Variables - * @{ - */ - -/** - * @} - */ - -/** @defgroup CAN_Private_FunctionPrototypes - * @{ - */ - -static ITStatus CheckITStatus(uint32_t CAN_Reg, uint32_t It_Bit); - -/** - * @} - */ - -/** @defgroup CAN_Private_Functions - * @{ - */ - -/** - * @brief Deinitializes the CAN peripheral registers to their default reset values. - * @param CANx: where x can be 1 or 2 to select the CAN peripheral. - * @retval None. - */ -void CAN_DeInit(CAN_TypeDef* CANx) -{ - /* Check the parameters */ - assert_param(IS_CAN_ALL_PERIPH(CANx)); - - if (CANx == CAN1) - { - /* Enable CAN1 reset state */ - RCC_APB1PeriphResetCmd(RCC_APB1Periph_CAN1, ENABLE); - /* Release CAN1 from reset state */ - RCC_APB1PeriphResetCmd(RCC_APB1Periph_CAN1, DISABLE); - } - else - { - /* Enable CAN2 reset state */ - RCC_APB1PeriphResetCmd(RCC_APB1Periph_CAN2, ENABLE); - /* Release CAN2 from reset state */ - RCC_APB1PeriphResetCmd(RCC_APB1Periph_CAN2, DISABLE); - } -} - -/** - * @brief Initializes the CAN peripheral according to the specified - * parameters in the CAN_InitStruct. - * @param CANx: where x can be 1 or 2 to to select the CAN peripheral. - * @param CAN_InitStruct: pointer to a CAN_InitTypeDef structure that - * contains the configuration information for the CAN peripheral. - * @retval Constant indicates initialization succeed which will be - * CANINITFAILED or CANINITOK. - */ -uint8_t CAN_Init(CAN_TypeDef* CANx, CAN_InitTypeDef* CAN_InitStruct) -{ - uint8_t InitStatus = CANINITFAILED; - uint32_t wait_ack = 0x00000000; - /* Check the parameters */ - assert_param(IS_CAN_ALL_PERIPH(CANx)); - assert_param(IS_FUNCTIONAL_STATE(CAN_InitStruct->CAN_TTCM)); - assert_param(IS_FUNCTIONAL_STATE(CAN_InitStruct->CAN_ABOM)); - assert_param(IS_FUNCTIONAL_STATE(CAN_InitStruct->CAN_AWUM)); - assert_param(IS_FUNCTIONAL_STATE(CAN_InitStruct->CAN_NART)); - assert_param(IS_FUNCTIONAL_STATE(CAN_InitStruct->CAN_RFLM)); - assert_param(IS_FUNCTIONAL_STATE(CAN_InitStruct->CAN_TXFP)); - assert_param(IS_CAN_MODE(CAN_InitStruct->CAN_Mode)); - assert_param(IS_CAN_SJW(CAN_InitStruct->CAN_SJW)); - assert_param(IS_CAN_BS1(CAN_InitStruct->CAN_BS1)); - assert_param(IS_CAN_BS2(CAN_InitStruct->CAN_BS2)); - assert_param(IS_CAN_PRESCALER(CAN_InitStruct->CAN_Prescaler)); - - /* exit from sleep mode */ - CANx->MCR &= ~MCR_SLEEP; - - /* Request initialisation */ - CANx->MCR |= MCR_INRQ ; - - /* Wait the acknowledge */ - while (((CANx->MSR & MSR_INAK) != MSR_INAK) && (wait_ack != INAK_TimeOut)) - { - wait_ack++; - } - - /* ...and check acknowledged */ - if ((CANx->MSR & MSR_INAK) != MSR_INAK) - { - InitStatus = CANINITFAILED; - } - else - { - /* Set the time triggered communication mode */ - if (CAN_InitStruct->CAN_TTCM == ENABLE) - { - CANx->MCR |= MCR_TTCM; - } - else - { - CANx->MCR &= ~MCR_TTCM; - } - - /* Set the automatic bus-off management */ - if (CAN_InitStruct->CAN_ABOM == ENABLE) - { - CANx->MCR |= MCR_ABOM; - } - else - { - CANx->MCR &= ~MCR_ABOM; - } - - /* Set the automatic wake-up mode */ - if (CAN_InitStruct->CAN_AWUM == ENABLE) - { - CANx->MCR |= MCR_AWUM; - } - else - { - CANx->MCR &= ~MCR_AWUM; - } - - /* Set the no automatic retransmission */ - if (CAN_InitStruct->CAN_NART == ENABLE) - { - CANx->MCR |= MCR_NART; - } - else - { - CANx->MCR &= ~MCR_NART; - } - - /* Set the receive FIFO locked mode */ - if (CAN_InitStruct->CAN_RFLM == ENABLE) - { - CANx->MCR |= MCR_RFLM; - } - else - { - CANx->MCR &= ~MCR_RFLM; - } - - /* Set the transmit FIFO priority */ - if (CAN_InitStruct->CAN_TXFP == ENABLE) - { - CANx->MCR |= MCR_TXFP; - } - else - { - CANx->MCR &= ~MCR_TXFP; - } - - /* Set the bit timing register */ - CANx->BTR = (uint32_t)((uint32_t)CAN_InitStruct->CAN_Mode << 30) | ((uint32_t)CAN_InitStruct->CAN_SJW << 24) | - ((uint32_t)CAN_InitStruct->CAN_BS1 << 16) | ((uint32_t)CAN_InitStruct->CAN_BS2 << 20) | - ((uint32_t)CAN_InitStruct->CAN_Prescaler - 1); - - /* Request leave initialisation */ - CANx->MCR &= ~MCR_INRQ; - - /* Wait the acknowledge */ - wait_ack = 0x00; - - while (((CANx->MSR & MSR_INAK) == MSR_INAK) && (wait_ack != INAK_TimeOut)) - { - wait_ack++; - } - - /* ...and check acknowledged */ - if ((CANx->MSR & MSR_INAK) == MSR_INAK) - { - InitStatus = CANINITFAILED; - } - else - { - InitStatus = CANINITOK ; - } - } - - /* At this step, return the status of initialization */ - return InitStatus; -} - -/** - * @brief Initializes the CAN peripheral according to the specified - * parameters in the CAN_FilterInitStruct. - * @param CAN_FilterInitStruct: pointer to a CAN_FilterInitTypeDef - * structure that contains the configuration information. - * @retval None. - */ -void CAN_FilterInit(CAN_FilterInitTypeDef* CAN_FilterInitStruct) -{ - uint32_t filter_number_bit_pos = 0; - /* Check the parameters */ - assert_param(IS_CAN_FILTER_NUMBER(CAN_FilterInitStruct->CAN_FilterNumber)); - assert_param(IS_CAN_FILTER_MODE(CAN_FilterInitStruct->CAN_FilterMode)); - assert_param(IS_CAN_FILTER_SCALE(CAN_FilterInitStruct->CAN_FilterScale)); - assert_param(IS_CAN_FILTER_FIFO(CAN_FilterInitStruct->CAN_FilterFIFOAssignment)); - assert_param(IS_FUNCTIONAL_STATE(CAN_FilterInitStruct->CAN_FilterActivation)); - - filter_number_bit_pos = ((uint32_t)0x00000001) << CAN_FilterInitStruct->CAN_FilterNumber; - - /* Initialisation mode for the filter */ - CAN1->FMR |= FMR_FINIT; - - /* Filter Deactivation */ - CAN1->FA1R &= ~(uint32_t)filter_number_bit_pos; - - /* Filter Scale */ - if (CAN_FilterInitStruct->CAN_FilterScale == CAN_FilterScale_16bit) - { - /* 16-bit scale for the filter */ - CAN1->FS1R &= ~(uint32_t)filter_number_bit_pos; - - /* First 16-bit identifier and First 16-bit mask */ - /* Or First 16-bit identifier and Second 16-bit identifier */ - CAN1->sFilterRegister[CAN_FilterInitStruct->CAN_FilterNumber].FR1 = - ((0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterMaskIdLow) << 16) | - (0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterIdLow); - - /* Second 16-bit identifier and Second 16-bit mask */ - /* Or Third 16-bit identifier and Fourth 16-bit identifier */ - CAN1->sFilterRegister[CAN_FilterInitStruct->CAN_FilterNumber].FR2 = - ((0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterMaskIdHigh) << 16) | - (0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterIdHigh); - } - - if (CAN_FilterInitStruct->CAN_FilterScale == CAN_FilterScale_32bit) - { - /* 32-bit scale for the filter */ - CAN1->FS1R |= filter_number_bit_pos; - /* 32-bit identifier or First 32-bit identifier */ - CAN1->sFilterRegister[CAN_FilterInitStruct->CAN_FilterNumber].FR1 = - ((0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterIdHigh) << 16) | - (0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterIdLow); - /* 32-bit mask or Second 32-bit identifier */ - CAN1->sFilterRegister[CAN_FilterInitStruct->CAN_FilterNumber].FR2 = - ((0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterMaskIdHigh) << 16) | - (0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterMaskIdLow); - } - - /* Filter Mode */ - if (CAN_FilterInitStruct->CAN_FilterMode == CAN_FilterMode_IdMask) - { - /*Id/Mask mode for the filter*/ - CAN1->FM1R &= ~(uint32_t)filter_number_bit_pos; - } - else /* CAN_FilterInitStruct->CAN_FilterMode == CAN_FilterMode_IdList */ - { - /*Identifier list mode for the filter*/ - CAN1->FM1R |= (uint32_t)filter_number_bit_pos; - } - - /* Filter FIFO assignment */ - if (CAN_FilterInitStruct->CAN_FilterFIFOAssignment == CAN_FilterFIFO0) - { - /* FIFO 0 assignation for the filter */ - CAN1->FFA1R &= ~(uint32_t)filter_number_bit_pos; - } - - if (CAN_FilterInitStruct->CAN_FilterFIFOAssignment == CAN_FilterFIFO1) - { - /* FIFO 1 assignation for the filter */ - CAN1->FFA1R |= (uint32_t)filter_number_bit_pos; - } - - /* Filter activation */ - if (CAN_FilterInitStruct->CAN_FilterActivation == ENABLE) - { - CAN1->FA1R |= filter_number_bit_pos; - } - - /* Leave the initialisation mode for the filter */ - CAN1->FMR &= ~FMR_FINIT; -} - -/** - * @brief Fills each CAN_InitStruct member with its default value. - * @param CAN_InitStruct: pointer to a CAN_InitTypeDef structure which - * will be initialized. - * @retval None. - */ -void CAN_StructInit(CAN_InitTypeDef* CAN_InitStruct) -{ - /* Reset CAN init structure parameters values */ - /* Initialize the time triggered communication mode */ - CAN_InitStruct->CAN_TTCM = DISABLE; - /* Initialize the automatic bus-off management */ - CAN_InitStruct->CAN_ABOM = DISABLE; - /* Initialize the automatic wake-up mode */ - CAN_InitStruct->CAN_AWUM = DISABLE; - /* Initialize the no automatic retransmission */ - CAN_InitStruct->CAN_NART = DISABLE; - /* Initialize the receive FIFO locked mode */ - CAN_InitStruct->CAN_RFLM = DISABLE; - /* Initialize the transmit FIFO priority */ - CAN_InitStruct->CAN_TXFP = DISABLE; - /* Initialize the CAN_Mode member */ - CAN_InitStruct->CAN_Mode = CAN_Mode_Normal; - /* Initialize the CAN_SJW member */ - CAN_InitStruct->CAN_SJW = CAN_SJW_1tq; - /* Initialize the CAN_BS1 member */ - CAN_InitStruct->CAN_BS1 = CAN_BS1_4tq; - /* Initialize the CAN_BS2 member */ - CAN_InitStruct->CAN_BS2 = CAN_BS2_3tq; - /* Initialize the CAN_Prescaler member */ - CAN_InitStruct->CAN_Prescaler = 1; -} - -/** - * @brief Select the start bank filter for slave CAN. - * @note This function applies only to STM32 Connectivity line devices. - * @param CAN_BankNumber: Select the start slave bank filter from 1..27. - * @retval None. - */ -void CAN_SlaveStartBank(uint8_t CAN_BankNumber) -{ - /* Check the parameters */ - assert_param(IS_CAN_BANKNUMBER(CAN_BankNumber)); - /* enter Initialisation mode for the filter */ - CAN1->FMR |= FMR_FINIT; - /* Select the start slave bank */ - CAN1->FMR &= (uint32_t)0xFFFFC0F1 ; - CAN1->FMR |= (uint32_t)(CAN_BankNumber)<<8; - /* Leave Initialisation mode for the filter */ - CAN1->FMR &= ~FMR_FINIT; -} - -/** - * @brief Enables or disables the specified CAN interrupts. - * @param CANx: where x can be 1 or 2 to to select the CAN peripheral. - * @param CAN_IT: specifies the CAN interrupt sources to be enabled or disabled. - * This parameter can be: CAN_IT_TME, CAN_IT_FMP0, CAN_IT_FF0, - * CAN_IT_FOV0, CAN_IT_FMP1, CAN_IT_FF1, - * CAN_IT_FOV1, CAN_IT_EWG, CAN_IT_EPV, - * CAN_IT_LEC, CAN_IT_ERR, CAN_IT_WKU or - * CAN_IT_SLK. - * @param NewState: new state of the CAN interrupts. - * This parameter can be: ENABLE or DISABLE. - * @retval None. - */ -void CAN_ITConfig(CAN_TypeDef* CANx, uint32_t CAN_IT, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_CAN_ALL_PERIPH(CANx)); - assert_param(IS_CAN_ITConfig(CAN_IT)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - - if (NewState != DISABLE) - { - /* Enable the selected CAN interrupt */ - CANx->IER |= CAN_IT; - } - else - { - /* Disable the selected CAN interrupt */ - CANx->IER &= ~CAN_IT; - } -} - -/** - * @brief Initiates the transmission of a message. - * @param CANx: where x can be 1 or 2 to to select the CAN peripheral. - * @param TxMessage: pointer to a structure which contains CAN Id, CAN - * DLC and CAN datas. - * @retval The number of the mailbox that is used for transmission - * or CAN_NO_MB if there is no empty mailbox. - */ -uint8_t CAN_Transmit(CAN_TypeDef* CANx, CanTxMsg* TxMessage) -{ - uint8_t transmit_mailbox = 0; - /* Check the parameters */ - assert_param(IS_CAN_ALL_PERIPH(CANx)); - assert_param(IS_CAN_IDTYPE(TxMessage->IDE)); - assert_param(IS_CAN_RTR(TxMessage->RTR)); - assert_param(IS_CAN_DLC(TxMessage->DLC)); - - /* Select one empty transmit mailbox */ - if ((CANx->TSR&TSR_TME0) == TSR_TME0) - { - transmit_mailbox = 0; - } - else if ((CANx->TSR&TSR_TME1) == TSR_TME1) - { - transmit_mailbox = 1; - } - else if ((CANx->TSR&TSR_TME2) == TSR_TME2) - { - transmit_mailbox = 2; - } - else - { - transmit_mailbox = CAN_NO_MB; - } - - if (transmit_mailbox != CAN_NO_MB) - { - /* Set up the Id */ - CANx->sTxMailBox[transmit_mailbox].TIR &= TMIDxR_TXRQ; - if (TxMessage->IDE == CAN_ID_STD) - { - assert_param(IS_CAN_STDID(TxMessage->StdId)); - CANx->sTxMailBox[transmit_mailbox].TIR |= ((TxMessage->StdId << 21) | TxMessage->RTR); - } - else - { - assert_param(IS_CAN_EXTID(TxMessage->ExtId)); - CANx->sTxMailBox[transmit_mailbox].TIR |= ((TxMessage->ExtId<<3) | TxMessage->IDE | - TxMessage->RTR); - } - - - /* Set up the DLC */ - TxMessage->DLC &= (uint8_t)0x0000000F; - CANx->sTxMailBox[transmit_mailbox].TDTR &= (uint32_t)0xFFFFFFF0; - CANx->sTxMailBox[transmit_mailbox].TDTR |= TxMessage->DLC; - - /* Set up the data field */ - CANx->sTxMailBox[transmit_mailbox].TDLR = (((uint32_t)TxMessage->Data[3] << 24) | - ((uint32_t)TxMessage->Data[2] << 16) | - ((uint32_t)TxMessage->Data[1] << 8) | - ((uint32_t)TxMessage->Data[0])); - CANx->sTxMailBox[transmit_mailbox].TDHR = (((uint32_t)TxMessage->Data[7] << 24) | - ((uint32_t)TxMessage->Data[6] << 16) | - ((uint32_t)TxMessage->Data[5] << 8) | - ((uint32_t)TxMessage->Data[4])); - /* Request transmission */ - CANx->sTxMailBox[transmit_mailbox].TIR |= TMIDxR_TXRQ; - } - return transmit_mailbox; -} - -/** - * @brief Checks the transmission of a message. - * @param CANx: where x can be 1 or 2 to to select the CAN peripheral. - * @param TransmitMailbox: the number of the mailbox that is used for transmission. - * @retval CANTXOK if the CAN driver transmits the message, CANTXFAILED in an other case. - */ -uint8_t CAN_TransmitStatus(CAN_TypeDef* CANx, uint8_t TransmitMailbox) -{ - /* RQCP, TXOK and TME bits */ - uint8_t state = 0; - /* Check the parameters */ - assert_param(IS_CAN_ALL_PERIPH(CANx)); - assert_param(IS_CAN_TRANSMITMAILBOX(TransmitMailbox)); - switch (TransmitMailbox) - { - case (0): state |= (uint8_t)((CANx->TSR & TSR_RQCP0) << 2); - state |= (uint8_t)((CANx->TSR & TSR_TXOK0) >> 0); - state |= (uint8_t)((CANx->TSR & TSR_TME0) >> 26); - break; - case (1): state |= (uint8_t)((CANx->TSR & TSR_RQCP1) >> 6); - state |= (uint8_t)((CANx->TSR & TSR_TXOK1) >> 8); - state |= (uint8_t)((CANx->TSR & TSR_TME1) >> 27); - break; - case (2): state |= (uint8_t)((CANx->TSR & TSR_RQCP2) >> 14); - state |= (uint8_t)((CANx->TSR & TSR_TXOK2) >> 16); - state |= (uint8_t)((CANx->TSR & TSR_TME2) >> 28); - break; - default: - state = CANTXFAILED; - break; - } - switch (state) - { - /* transmit pending */ - case (0x0): state = CANTXPENDING; - break; - /* transmit failed */ - case (0x5): state = CANTXFAILED; - break; - /* transmit succedeed */ - case (0x7): state = CANTXOK; - break; - default: - state = CANTXFAILED; - break; - } - return state; -} - -/** - * @brief Cancels a transmit request. - * @param CANx: where x can be 1 or 2 to to select the CAN peripheral. - * @param Mailbox: Mailbox number. - * @retval None. - */ -void CAN_CancelTransmit(CAN_TypeDef* CANx, uint8_t Mailbox) -{ - /* Check the parameters */ - assert_param(IS_CAN_ALL_PERIPH(CANx)); - assert_param(IS_CAN_TRANSMITMAILBOX(Mailbox)); - /* abort transmission */ - switch (Mailbox) - { - case (0): CANx->TSR |= TSR_ABRQ0; - break; - case (1): CANx->TSR |= TSR_ABRQ1; - break; - case (2): CANx->TSR |= TSR_ABRQ2; - break; - default: - break; - } -} - -/** - * @brief Releases a FIFO. - * @param CANx: where x can be 1 or 2 to to select the CAN peripheral. - * @param FIFONumber: FIFO to release, CAN_FIFO0 or CAN_FIFO1. - * @retval None. - */ -void CAN_FIFORelease(CAN_TypeDef* CANx, uint8_t FIFONumber) -{ - /* Check the parameters */ - assert_param(IS_CAN_ALL_PERIPH(CANx)); - assert_param(IS_CAN_FIFO(FIFONumber)); - /* Release FIFO0 */ - if (FIFONumber == CAN_FIFO0) - { - CANx->RF0R = RF0R_RFOM0; - } - /* Release FIFO1 */ - else /* FIFONumber == CAN_FIFO1 */ - { - CANx->RF1R = RF1R_RFOM1; - } -} - -/** - * @brief Returns the number of pending messages. - * @param CANx: where x can be 1 or 2 to to select the CAN peripheral. - * @param FIFONumber: Receive FIFO number, CAN_FIFO0 or CAN_FIFO1. - * @retval NbMessage which is the number of pending message. - */ -uint8_t CAN_MessagePending(CAN_TypeDef* CANx, uint8_t FIFONumber) -{ - uint8_t message_pending=0; - /* Check the parameters */ - assert_param(IS_CAN_ALL_PERIPH(CANx)); - assert_param(IS_CAN_FIFO(FIFONumber)); - if (FIFONumber == CAN_FIFO0) - { - message_pending = (uint8_t)(CANx->RF0R&(uint32_t)0x03); - } - else if (FIFONumber == CAN_FIFO1) - { - message_pending = (uint8_t)(CANx->RF1R&(uint32_t)0x03); - } - else - { - message_pending = 0; - } - return message_pending; -} - -/** - * @brief Receives a message. - * @param CANx: where x can be 1 or 2 to to select the CAN peripheral. - * @param FIFONumber: Receive FIFO number, CAN_FIFO0 or CAN_FIFO1. - * @param RxMessage: pointer to a structure receive message which - * contains CAN Id, CAN DLC, CAN datas and FMI number. - * @retval None. - */ -void CAN_Receive(CAN_TypeDef* CANx, uint8_t FIFONumber, CanRxMsg* RxMessage) -{ - /* Check the parameters */ - assert_param(IS_CAN_ALL_PERIPH(CANx)); - assert_param(IS_CAN_FIFO(FIFONumber)); - /* Get the Id */ - RxMessage->IDE = (uint8_t)0x04 & CANx->sFIFOMailBox[FIFONumber].RIR; - if (RxMessage->IDE == CAN_ID_STD) - { - RxMessage->StdId = (uint32_t)0x000007FF & (CANx->sFIFOMailBox[FIFONumber].RIR >> 21); - } - else - { - RxMessage->ExtId = (uint32_t)0x1FFFFFFF & (CANx->sFIFOMailBox[FIFONumber].RIR >> 3); - } - - RxMessage->RTR = (uint8_t)0x02 & CANx->sFIFOMailBox[FIFONumber].RIR; - /* Get the DLC */ - RxMessage->DLC = (uint8_t)0x0F & CANx->sFIFOMailBox[FIFONumber].RDTR; - /* Get the FMI */ - RxMessage->FMI = (uint8_t)0xFF & (CANx->sFIFOMailBox[FIFONumber].RDTR >> 8); - /* Get the data field */ - RxMessage->Data[0] = (uint8_t)0xFF & CANx->sFIFOMailBox[FIFONumber].RDLR; - RxMessage->Data[1] = (uint8_t)0xFF & (CANx->sFIFOMailBox[FIFONumber].RDLR >> 8); - RxMessage->Data[2] = (uint8_t)0xFF & (CANx->sFIFOMailBox[FIFONumber].RDLR >> 16); - RxMessage->Data[3] = (uint8_t)0xFF & (CANx->sFIFOMailBox[FIFONumber].RDLR >> 24); - RxMessage->Data[4] = (uint8_t)0xFF & CANx->sFIFOMailBox[FIFONumber].RDHR; - RxMessage->Data[5] = (uint8_t)0xFF & (CANx->sFIFOMailBox[FIFONumber].RDHR >> 8); - RxMessage->Data[6] = (uint8_t)0xFF & (CANx->sFIFOMailBox[FIFONumber].RDHR >> 16); - RxMessage->Data[7] = (uint8_t)0xFF & (CANx->sFIFOMailBox[FIFONumber].RDHR >> 24); - /* Release the FIFO */ - CAN_FIFORelease(CANx, FIFONumber); -} - -/** - * @brief Enables or disables the DBG Freeze for CAN. - * @param CANx: where x can be 1 or 2 to to select the CAN peripheral. - * @param NewState: new state of the CAN peripheral. - * This parameter can be: ENABLE or DISABLE. - * @retval None. - */ -void CAN_DBGFreeze(CAN_TypeDef* CANx, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_CAN_ALL_PERIPH(CANx)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - - if (NewState != DISABLE) - { - /* Enable Debug Freeze */ - CANx->MCR |= MCR_DBF; - } - else - { - /* Disable Debug Freeze */ - CANx->MCR &= ~MCR_DBF; - } -} - -/** - * @brief Enters the low power mode. - * @param CANx: where x can be 1 or 2 to to select the CAN peripheral. - * @retval CANSLEEPOK if sleep entered, CANSLEEPFAILED in an other case. - */ -uint8_t CAN_Sleep(CAN_TypeDef* CANx) -{ - uint8_t sleepstatus = CANSLEEPFAILED; - - /* Check the parameters */ - assert_param(IS_CAN_ALL_PERIPH(CANx)); - - /* Request Sleep mode */ - CANx->MCR = (((CANx->MCR) & (uint32_t)(~MCR_INRQ)) | MCR_SLEEP); - - /* Sleep mode status */ - if ((CANx->MSR & (CAN_MSR_SLAK|CAN_MSR_INAK)) == CAN_MSR_SLAK) - { - /* Sleep mode not entered */ - sleepstatus = CANSLEEPOK; - } - /* At this step, sleep mode status */ - return (uint8_t)sleepstatus; -} - -/** - * @brief Wakes the CAN up. - * @param CANx: where x can be 1 or 2 to to select the CAN peripheral. - * @retval CANWAKEUPOK if sleep mode left, CANWAKEUPFAILED in an other case. - */ -uint8_t CAN_WakeUp(CAN_TypeDef* CANx) -{ - uint32_t wait_slak = SLAK_TimeOut ; - uint8_t wakeupstatus = CANWAKEUPFAILED; - - /* Check the parameters */ - assert_param(IS_CAN_ALL_PERIPH(CANx)); - - /* Wake up request */ - CANx->MCR &= ~MCR_SLEEP; - - /* Sleep mode status */ - while(((CANx->MSR & CAN_MSR_SLAK) == CAN_MSR_SLAK)&&(wait_slak!=0x00)) - { - wait_slak--; - } - if((CANx->MSR & CAN_MSR_SLAK) != CAN_MSR_SLAK) - { - /* Sleep mode exited */ - wakeupstatus = CANWAKEUPOK; - } - /* At this step, sleep mode status */ - return (uint8_t)wakeupstatus; -} - -/** - * @brief Checks whether the specified CAN flag is set or not. - * @param CANx: where x can be 1 or 2 to to select the CAN peripheral. - * @param CAN_FLAG: specifies the flag to check. - * This parameter can be: CAN_FLAG_EWG, CAN_FLAG_EPV or CAN_FLAG_BOF. - * @retval The new state of CAN_FLAG (SET or RESET). - */ -FlagStatus CAN_GetFlagStatus(CAN_TypeDef* CANx, uint32_t CAN_FLAG) -{ - FlagStatus bitstatus = RESET; - /* Check the parameters */ - assert_param(IS_CAN_ALL_PERIPH(CANx)); - assert_param(IS_CAN_FLAG(CAN_FLAG)); - /* Check the status of the specified CAN flag */ - if ((CANx->ESR & CAN_FLAG) != (uint32_t)RESET) - { - /* CAN_FLAG is set */ - bitstatus = SET; - } - else - { - /* CAN_FLAG is reset */ - bitstatus = RESET; - } - /* Return the CAN_FLAG status */ - return bitstatus; -} - -/** - * @brief Clears the CAN's pending flags. - * @param CANx: where x can be 1 or 2 to to select the CAN peripheral. - * @param CAN_FLAG: specifies the flag to clear. - * @retval None. - */ -void CAN_ClearFlag(CAN_TypeDef* CANx, uint32_t CAN_FLAG) -{ - /* Check the parameters */ - assert_param(IS_CAN_ALL_PERIPH(CANx)); - assert_param(IS_CAN_FLAG(CAN_FLAG)); - /* Clear the selected CAN flags */ - CANx->ESR &= ~CAN_FLAG; -} - -/** - * @brief Checks whether the specified CAN interrupt has occurred or not. - * @param CANx: where x can be 1 or 2 to to select the CAN peripheral. - * @param CAN_IT: specifies the CAN interrupt source to check. - * This parameter can be: CAN_IT_RQCP0, CAN_IT_RQCP1, CAN_IT_RQCP2, - * CAN_IT_FF0, CAN_IT_FOV0, CAN_IT_FF1, - * CAN_IT_FOV1, CAN_IT_EWG, CAN_IT_EPV, - * CAN_IT_BOF, CAN_IT_WKU or CAN_IT_SLK. - * @retval The new state of CAN_IT (SET or RESET). - */ -ITStatus CAN_GetITStatus(CAN_TypeDef* CANx, uint32_t CAN_IT) -{ - ITStatus pendingbitstatus = RESET; - /* Check the parameters */ - assert_param(IS_CAN_ALL_PERIPH(CANx)); - assert_param(IS_CAN_ITStatus(CAN_IT)); - switch (CAN_IT) - { - case CAN_IT_RQCP0: - pendingbitstatus = CheckITStatus(CANx->TSR, TSR_RQCP0); - break; - case CAN_IT_RQCP1: - pendingbitstatus = CheckITStatus(CANx->TSR, TSR_RQCP1); - break; - case CAN_IT_RQCP2: - pendingbitstatus = CheckITStatus(CANx->TSR, TSR_RQCP2); - break; - case CAN_IT_FF0: - pendingbitstatus = CheckITStatus(CANx->RF0R, RF0R_FULL0); - break; - case CAN_IT_FOV0: - pendingbitstatus = CheckITStatus(CANx->RF0R, RF0R_FOVR0); - break; - case CAN_IT_FF1: - pendingbitstatus = CheckITStatus(CANx->RF1R, RF1R_FULL1); - break; - case CAN_IT_FOV1: - pendingbitstatus = CheckITStatus(CANx->RF1R, RF1R_FOVR1); - break; - case CAN_IT_EWG: - pendingbitstatus = CheckITStatus(CANx->ESR, ESR_EWGF); - break; - case CAN_IT_EPV: - pendingbitstatus = CheckITStatus(CANx->ESR, ESR_EPVF); - break; - case CAN_IT_BOF: - pendingbitstatus = CheckITStatus(CANx->ESR, ESR_BOFF); - break; - case CAN_IT_SLK: - pendingbitstatus = CheckITStatus(CANx->MSR, MSR_SLAKI); - break; - case CAN_IT_WKU: - pendingbitstatus = CheckITStatus(CANx->MSR, MSR_WKUI); - break; - default : - pendingbitstatus = RESET; - break; - } - /* Return the CAN_IT status */ - return pendingbitstatus; -} - -/** - * @brief Clears the CAN’s interrupt pending bits. - * @param CANx: where x can be 1 or 2 to to select the CAN peripheral. - * @param CAN_IT: specifies the interrupt pending bit to clear. - * @retval None. - */ -void CAN_ClearITPendingBit(CAN_TypeDef* CANx, uint32_t CAN_IT) -{ - /* Check the parameters */ - assert_param(IS_CAN_ALL_PERIPH(CANx)); - assert_param(IS_CAN_ITStatus(CAN_IT)); - switch (CAN_IT) - { - case CAN_IT_RQCP0: - CANx->TSR = TSR_RQCP0; /* rc_w1*/ - break; - case CAN_IT_RQCP1: - CANx->TSR = TSR_RQCP1; /* rc_w1*/ - break; - case CAN_IT_RQCP2: - CANx->TSR = TSR_RQCP2; /* rc_w1*/ - break; - case CAN_IT_FF0: - CANx->RF0R = RF0R_FULL0; /* rc_w1*/ - break; - case CAN_IT_FOV0: - CANx->RF0R = RF0R_FOVR0; /* rc_w1*/ - break; - case CAN_IT_FF1: - CANx->RF1R = RF1R_FULL1; /* rc_w1*/ - break; - case CAN_IT_FOV1: - CANx->RF1R = RF1R_FOVR1; /* rc_w1*/ - break; - case CAN_IT_EWG: - CANx->ESR &= ~ ESR_EWGF; /* rw */ - break; - case CAN_IT_EPV: - CANx->ESR &= ~ ESR_EPVF; /* rw */ - break; - case CAN_IT_BOF: - CANx->ESR &= ~ ESR_BOFF; /* rw */ - break; - case CAN_IT_WKU: - CANx->MSR = MSR_WKUI; /* rc_w1*/ - break; - case CAN_IT_SLK: - CANx->MSR = MSR_SLAKI; /* rc_w1*/ - break; - default : - break; - } -} - -/** - * @brief Checks whether the CAN interrupt has occurred or not. - * @param CAN_Reg: specifies the CAN interrupt register to check. - * @param It_Bit: specifies the interrupt source bit to check. - * @retval The new state of the CAN Interrupt (SET or RESET). - */ -static ITStatus CheckITStatus(uint32_t CAN_Reg, uint32_t It_Bit) -{ - ITStatus pendingbitstatus = RESET; - - if ((CAN_Reg & It_Bit) != (uint32_t)RESET) - { - /* CAN_IT is set */ - pendingbitstatus = SET; - } - else - { - /* CAN_IT is reset */ - pendingbitstatus = RESET; - } - return pendingbitstatus; -} - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_cec.c b/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_cec.c deleted file mode 100644 index 1dd2ffdae8..0000000000 --- a/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_cec.c +++ /dev/null @@ -1,432 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f10x_cec.c - * @author MCD Application Team - * @version V3.2.0 - * @date 03/01/2010 - * @brief This file provides all the CEC firmware functions. - ****************************************************************************** - * @copy - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2010 STMicroelectronics

- */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x_cec.h" -#include "stm32f10x_rcc.h" - -/** @addtogroup STM32F10x_StdPeriph_Driver - * @{ - */ - -/** @defgroup CEC - * @brief CEC driver modules - * @{ - */ - -/** @defgroup CEC_Private_TypesDefinitions - * @{ - */ - -/** - * @} - */ - - -/** @defgroup CEC_Private_Defines - * @{ - */ - -/* ------------ CEC registers bit address in the alias region ----------- */ -#define CEC_OFFSET (CEC_BASE - PERIPH_BASE) - -/* --- CFGR Register ---*/ - -/* Alias word address of PE bit */ -#define CFGR_OFFSET (CEC_OFFSET + 0x00) -#define PE_BitNumber 0x00 -#define CFGR_PE_BB (PERIPH_BB_BASE + (CFGR_OFFSET * 32) + (PE_BitNumber * 4)) - -/* Alias word address of IE bit */ -#define IE_BitNumber 0x01 -#define CFGR_IE_BB (PERIPH_BB_BASE + (CFGR_OFFSET * 32) + (IE_BitNumber * 4)) - -/* --- CSR Register ---*/ - -/* Alias word address of TSOM bit */ -#define CSR_OFFSET (CEC_OFFSET + 0x10) -#define TSOM_BitNumber 0x00 -#define CSR_TSOM_BB (PERIPH_BB_BASE + (CSR_OFFSET * 32) + (TSOM_BitNumber * 4)) - -/* Alias word address of TEOM bit */ -#define TEOM_BitNumber 0x01 -#define CSR_TEOM_BB (PERIPH_BB_BASE + (CSR_OFFSET * 32) + (TEOM_BitNumber * 4)) - -#define CFGR_CLEAR_Mask (uint8_t)(0xF3) /* CFGR register Mask */ -#define FLAG_Mask ((uint32_t)0x00FFFFFF) /* CEC FLAG mask */ - -/** - * @} - */ - - -/** @defgroup CEC_Private_Macros - * @{ - */ - -/** - * @} - */ - - -/** @defgroup CEC_Private_Variables - * @{ - */ - -/** - * @} - */ - - -/** @defgroup CEC_Private_FunctionPrototypes - * @{ - */ - -/** - * @} - */ - - -/** @defgroup CEC_Private_Functions - * @{ - */ - -/** - * @brief Deinitializes the CEC peripheral registers to their default reset - * values. - * @param None - * @retval None - */ -void CEC_DeInit(void) -{ - /* Enable CEC reset state */ - RCC_APB1PeriphResetCmd(RCC_APB1Periph_CEC, ENABLE); - /* Release CEC from reset state */ - RCC_APB1PeriphResetCmd(RCC_APB1Periph_CEC, DISABLE); -} - - -/** - * @brief Initializes the CEC peripheral according to the specified - * parameters in the CEC_InitStruct. - * @param CEC_InitStruct: pointer to an CEC_InitTypeDef structure that - * contains the configuration information for the specified - * CEC peripheral. - * @retval None - */ -void CEC_Init(CEC_InitTypeDef* CEC_InitStruct) -{ - uint16_t tmpreg = 0; - - /* Check the parameters */ - assert_param(IS_CEC_BIT_TIMING_ERROR_MODE(CEC_InitStruct->CEC_BitTimingMode)); - assert_param(IS_CEC_BIT_PERIOD_ERROR_MODE(CEC_InitStruct->CEC_BitPeriodMode)); - - /*---------------------------- CEC CFGR Configuration -----------------*/ - /* Get the CEC CFGR value */ - tmpreg = CEC->CFGR; - - /* Clear BTEM and BPEM bits */ - tmpreg &= CFGR_CLEAR_Mask; - - /* Configure CEC: Bit Timing Error and Bit Period Error */ - tmpreg |= (uint16_t)(CEC_InitStruct->CEC_BitTimingMode | CEC_InitStruct->CEC_BitPeriodMode); - - /* Write to CEC CFGR register*/ - CEC->CFGR = tmpreg; - -} - -/** - * @brief Enables or disables the specified CEC peripheral. - * @param NewState: new state of the CEC peripheral. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void CEC_Cmd(FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_FUNCTIONAL_STATE(NewState)); - - *(__IO uint32_t *) CFGR_PE_BB = (uint32_t)NewState; - - if(NewState == DISABLE) - { - /* Wait until the PE bit is cleared by hardware (Idle Line detected) */ - while((CEC->CFGR & CEC_CFGR_PE) != (uint32_t)RESET) - { - } - } -} - -/** - * @brief Enables or disables the CEC interrupt. - * @param NewState: new state of the CEC interrupt. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void CEC_ITConfig(FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_FUNCTIONAL_STATE(NewState)); - - *(__IO uint32_t *) CFGR_IE_BB = (uint32_t)NewState; -} - -/** - * @brief Defines the Own Address of the CEC device. - * @param CEC_OwnAddress: The CEC own address - * @retval None - */ -void CEC_OwnAddressConfig(uint8_t CEC_OwnAddress) -{ - /* Check the parameters */ - assert_param(IS_CEC_ADDRESS(CEC_OwnAddress)); - - /* Set the CEC own address */ - CEC->OAR = CEC_OwnAddress; -} - -/** - * @brief Sets the CEC prescaler value. - * @param CEC_Prescaler: CEC prescaler new value - * @retval None - */ -void CEC_SetPrescaler(uint16_t CEC_Prescaler) -{ - /* Check the parameters */ - assert_param(IS_CEC_PRESCALER(CEC_Prescaler)); - - /* Set the Prescaler value*/ - CEC->PRES = CEC_Prescaler; -} - -/** - * @brief Transmits single data through the CEC peripheral. - * @param Data: the data to transmit. - * @retval None - */ -void CEC_SendDataByte(uint8_t Data) -{ - /* Transmit Data */ - CEC->TXD = Data ; -} - - -/** - * @brief Returns the most recent received data by the CEC peripheral. - * @param None - * @retval The received data. - */ -uint8_t CEC_ReceiveDataByte(void) -{ - /* Receive Data */ - return (uint8_t)(CEC->RXD); -} - -/** - * @brief Starts a new message. - * @param None - * @retval None - */ -void CEC_StartOfMessage(void) -{ - /* Starts of new message */ - *(__IO uint32_t *) CSR_TSOM_BB = (uint32_t)0x1; -} - -/** - * @brief Transmits message with or without an EOM bit. - * @param NewState: new state of the CEC Tx End Of Message. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void CEC_EndOfMessageCmd(FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_FUNCTIONAL_STATE(NewState)); - - /* The data byte will be transmitted with or without an EOM bit*/ - *(__IO uint32_t *) CSR_TEOM_BB = (uint32_t)NewState; -} - -/** - * @brief Gets the CEC flag status - * @param CEC_FLAG: specifies the CEC flag to check. - * This parameter can be one of the following values: - * @arg CEC_FLAG_BTE: Bit Timing Error - * @arg CEC_FLAG_BPE: Bit Period Error - * @arg CEC_FLAG_RBTFE: Rx Block Transfer Finished Error - * @arg CEC_FLAG_SBE: Start Bit Error - * @arg CEC_FLAG_ACKE: Block Acknowledge Error - * @arg CEC_FLAG_LINE: Line Error - * @arg CEC_FLAG_TBTFE: Tx Block Transfer Finsihed Error - * @arg CEC_FLAG_TEOM: Tx End Of Message - * @arg CEC_FLAG_TERR: Tx Error - * @arg CEC_FLAG_TBTRF: Tx Byte Transfer Request or Block Transfer Finished - * @arg CEC_FLAG_RSOM: Rx Start Of Message - * @arg CEC_FLAG_REOM: Rx End Of Message - * @arg CEC_FLAG_RERR: Rx Error - * @arg CEC_FLAG_RBTF: Rx Byte/Block Transfer Finished - * @retval The new state of CEC_FLAG (SET or RESET) - */ -FlagStatus CEC_GetFlagStatus(uint32_t CEC_FLAG) -{ - FlagStatus bitstatus = RESET; - uint32_t cecreg = 0, cecbase = 0; - - /* Check the parameters */ - assert_param(IS_CEC_GET_FLAG(CEC_FLAG)); - - /* Get the CEC peripheral base address */ - cecbase = (uint32_t)(CEC_BASE); - - /* Read flag register index */ - cecreg = CEC_FLAG >> 28; - - /* Get bit[23:0] of the flag */ - CEC_FLAG &= FLAG_Mask; - - if(cecreg != 0) - { - /* Flag in CEC ESR Register */ - CEC_FLAG = (uint32_t)(CEC_FLAG >> 16); - - /* Get the CEC ESR register address */ - cecbase += 0xC; - } - else - { - /* Get the CEC CSR register address */ - cecbase += 0x10; - } - - if(((*(__IO uint32_t *)cecbase) & CEC_FLAG) != (uint32_t)RESET) - { - /* CEC_FLAG is set */ - bitstatus = SET; - } - else - { - /* CEC_FLAG is reset */ - bitstatus = RESET; - } - - /* Return the CEC_FLAG status */ - return bitstatus; -} - -/** - * @brief Clears the CEC's pending flags. - * @param CEC_FLAG: specifies the flag to clear. - * This parameter can be any combination of the following values: - * @arg CEC_FLAG_TERR: Tx Error - * @arg CEC_FLAG_TBTRF: Tx Byte Transfer Request or Block Transfer Finished - * @arg CEC_FLAG_RSOM: Rx Start Of Message - * @arg CEC_FLAG_REOM: Rx End Of Message - * @arg CEC_FLAG_RERR: Rx Error - * @arg CEC_FLAG_RBTF: Rx Byte/Block Transfer Finished - * @retval None - */ -void CEC_ClearFlag(uint32_t CEC_FLAG) -{ - uint32_t tmp = 0x0; - - /* Check the parameters */ - assert_param(IS_CEC_CLEAR_FLAG(CEC_FLAG)); - - tmp = CEC->CSR & 0x2; - - /* Clear the selected CEC flags */ - CEC->CSR &= (uint32_t)(((~(uint32_t)CEC_FLAG) & 0xFFFFFFFC) | tmp); -} - -/** - * @brief Checks whether the specified CEC interrupt has occurred or not. - * @param CEC_IT: specifies the CEC interrupt source to check. - * This parameter can be one of the following values: - * @arg CEC_IT_TERR: Tx Error - * @arg CEC_IT_TBTF: Tx Block Transfer Finished - * @arg CEC_IT_RERR: Rx Error - * @arg CEC_IT_RBTF: Rx Block Transfer Finished - * @retval The new state of CEC_IT (SET or RESET). - */ -ITStatus CEC_GetITStatus(uint8_t CEC_IT) -{ - ITStatus bitstatus = RESET; - uint32_t enablestatus = 0; - - /* Check the parameters */ - assert_param(IS_CEC_GET_IT(CEC_IT)); - - /* Get the CEC IT enable bit status */ - enablestatus = (CEC->CFGR & (uint8_t)CEC_CFGR_IE) ; - - /* Check the status of the specified CEC interrupt */ - if (((CEC->CSR & CEC_IT) != (uint32_t)RESET) && enablestatus) - { - /* CEC_IT is set */ - bitstatus = SET; - } - else - { - /* CEC_IT is reset */ - bitstatus = RESET; - } - /* Return the CEC_IT status */ - return bitstatus; -} - -/** - * @brief Clears the CEC's interrupt pending bits. - * @param CEC_IT: specifies the CEC interrupt pending bit to clear. - * This parameter can be any combination of the following values: - * @arg CEC_IT_TERR: Tx Error - * @arg CEC_IT_TBTF: Tx Block Transfer Finished - * @arg CEC_IT_RERR: Rx Error - * @arg CEC_IT_RBTF: Rx Block Transfer Finished - * @retval None - */ -void CEC_ClearITPendingBit(uint16_t CEC_IT) -{ - uint32_t tmp = 0x0; - - /* Check the parameters */ - assert_param(IS_CEC_GET_IT(CEC_IT)); - - tmp = CEC->CSR & 0x2; - - /* Clear the selected CEC interrupt pending bits */ - CEC->CSR &= (uint32_t)(((~(uint32_t)CEC_IT) & 0xFFFFFFFC) | tmp); -} - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_crc.c b/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_crc.c deleted file mode 100644 index 13f07fc206..0000000000 --- a/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_crc.c +++ /dev/null @@ -1,163 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f10x_crc.c - * @author MCD Application Team - * @version V3.2.0 - * @date 03/01/2010 - * @brief This file provides all the CRC firmware functions. - ****************************************************************************** - * @copy - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2010 STMicroelectronics

- */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x_crc.h" - -/** @addtogroup STM32F10x_StdPeriph_Driver - * @{ - */ - -/** @defgroup CRC - * @brief CRC driver modules - * @{ - */ - -/** @defgroup CRC_Private_TypesDefinitions - * @{ - */ - -/** - * @} - */ - -/** @defgroup CRC_Private_Defines - * @{ - */ - -/* CR register bit mask */ - -#define CR_RESET_Set ((uint32_t)0x00000001) - -/** - * @} - */ - -/** @defgroup CRC_Private_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup CRC_Private_Variables - * @{ - */ - -/** - * @} - */ - -/** @defgroup CRC_Private_FunctionPrototypes - * @{ - */ - -/** - * @} - */ - -/** @defgroup CRC_Private_Functions - * @{ - */ - -/** - * @brief Resets the CRC Data register (DR). - * @param None - * @retval None - */ -void CRC_ResetDR(void) -{ - /* Reset CRC generator */ - CRC->CR = CR_RESET_Set; -} - -/** - * @brief Computes the 32-bit CRC of a given data word(32-bit). - * @param Data: data word(32-bit) to compute its CRC - * @retval 32-bit CRC - */ -uint32_t CRC_CalcCRC(uint32_t Data) -{ - CRC->DR = Data; - - return (CRC->DR); -} - -/** - * @brief Computes the 32-bit CRC of a given buffer of data word(32-bit). - * @param pBuffer: pointer to the buffer containing the data to be computed - * @param BufferLength: length of the buffer to be computed - * @retval 32-bit CRC - */ -uint32_t CRC_CalcBlockCRC(uint32_t pBuffer[], uint32_t BufferLength) -{ - uint32_t index = 0; - - for(index = 0; index < BufferLength; index++) - { - CRC->DR = pBuffer[index]; - } - return (CRC->DR); -} - -/** - * @brief Returns the current CRC value. - * @param None - * @retval 32-bit CRC - */ -uint32_t CRC_GetCRC(void) -{ - return (CRC->DR); -} - -/** - * @brief Stores a 8-bit data in the Independent Data(ID) register. - * @param IDValue: 8-bit value to be stored in the ID register - * @retval None - */ -void CRC_SetIDRegister(uint8_t IDValue) -{ - CRC->IDR = IDValue; -} - -/** - * @brief Returns the 8-bit data stored in the Independent Data(ID) register - * @param None - * @retval 8-bit value of the ID register - */ -uint8_t CRC_GetIDRegister(void) -{ - return (CRC->IDR); -} - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_dac.c b/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_dac.c deleted file mode 100644 index eeb0d22e1e..0000000000 --- a/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_dac.c +++ /dev/null @@ -1,579 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f10x_dac.c - * @author MCD Application Team - * @version V3.2.0 - * @date 03/01/2010 - * @brief This file provides all the DAC firmware functions. - ****************************************************************************** - * @copy - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2010 STMicroelectronics

- */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x_dac.h" -#include "stm32f10x_rcc.h" - -/** @addtogroup STM32F10x_StdPeriph_Driver - * @{ - */ - -/** @defgroup DAC - * @brief DAC driver modules - * @{ - */ - -/** @defgroup DAC_Private_TypesDefinitions - * @{ - */ - -/** - * @} - */ - -/** @defgroup DAC_Private_Defines - * @{ - */ - -/* DAC EN mask */ -#define CR_EN_Set ((uint32_t)0x00000001) - -/* DAC DMAEN mask */ -#define CR_DMAEN_Set ((uint32_t)0x00001000) - -/* CR register Mask */ -#define CR_CLEAR_Mask ((uint32_t)0x00000FFE) - -/* DAC SWTRIG mask */ -#define SWTRIGR_SWTRIG_Set ((uint32_t)0x00000001) - -/* DAC Dual Channels SWTRIG masks */ -#define DUAL_SWTRIG_Set ((uint32_t)0x00000003) -#define DUAL_SWTRIG_Reset ((uint32_t)0xFFFFFFFC) - -/* DHR registers offsets */ -#define DHR12R1_Offset ((uint32_t)0x00000008) -#define DHR12R2_Offset ((uint32_t)0x00000014) -#define DHR12RD_Offset ((uint32_t)0x00000020) - -/* DOR register offset */ -#define DOR_Offset ((uint32_t)0x0000002C) -/** - * @} - */ - -/** @defgroup DAC_Private_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup DAC_Private_Variables - * @{ - */ - -/** - * @} - */ - -/** @defgroup DAC_Private_FunctionPrototypes - * @{ - */ - -/** - * @} - */ - -/** @defgroup DAC_Private_Functions - * @{ - */ - -/** - * @brief Deinitializes the DAC peripheral registers to their default reset values. - * @param None - * @retval None - */ -void DAC_DeInit(void) -{ - /* Enable DAC reset state */ - RCC_APB1PeriphResetCmd(RCC_APB1Periph_DAC, ENABLE); - /* Release DAC from reset state */ - RCC_APB1PeriphResetCmd(RCC_APB1Periph_DAC, DISABLE); -} - -/** - * @brief Initializes the DAC peripheral according to the specified - * parameters in the DAC_InitStruct. - * @param DAC_Channel: the selected DAC channel. - * This parameter can be one of the following values: - * @arg DAC_Channel_1: DAC Channel1 selected - * @arg DAC_Channel_2: DAC Channel2 selected - * @param DAC_InitStruct: pointer to a DAC_InitTypeDef structure that - * contains the configuration information for the specified DAC channel. - * @retval None - */ -void DAC_Init(uint32_t DAC_Channel, DAC_InitTypeDef* DAC_InitStruct) -{ - uint32_t tmpreg1 = 0, tmpreg2 = 0; - /* Check the DAC parameters */ - assert_param(IS_DAC_TRIGGER(DAC_InitStruct->DAC_Trigger)); - assert_param(IS_DAC_GENERATE_WAVE(DAC_InitStruct->DAC_WaveGeneration)); - assert_param(IS_DAC_LFSR_UNMASK_TRIANGLE_AMPLITUDE(DAC_InitStruct->DAC_LFSRUnmask_TriangleAmplitude)); - assert_param(IS_DAC_OUTPUT_BUFFER_STATE(DAC_InitStruct->DAC_OutputBuffer)); -/*---------------------------- DAC CR Configuration --------------------------*/ - /* Get the DAC CR value */ - tmpreg1 = DAC->CR; - /* Clear BOFFx, TENx, TSELx, WAVEx and MAMPx bits */ - tmpreg1 &= ~(CR_CLEAR_Mask << DAC_Channel); - /* Configure for the selected DAC channel: buffer output, trigger, wave genration, - mask/amplitude for wave genration */ - /* Set TSELx and TENx bits according to DAC_Trigger value */ - /* Set WAVEx bits according to DAC_WaveGeneration value */ - /* Set MAMPx bits according to DAC_LFSRUnmask_TriangleAmplitude value */ - /* Set BOFFx bit according to DAC_OutputBuffer value */ - tmpreg2 = (DAC_InitStruct->DAC_Trigger | DAC_InitStruct->DAC_WaveGeneration | - DAC_InitStruct->DAC_LFSRUnmask_TriangleAmplitude | DAC_InitStruct->DAC_OutputBuffer); - /* Calculate CR register value depending on DAC_Channel */ - tmpreg1 |= tmpreg2 << DAC_Channel; - /* Write to DAC CR */ - DAC->CR = tmpreg1; -} - -/** - * @brief Fills each DAC_InitStruct member with its default value. - * @param DAC_InitStruct : pointer to a DAC_InitTypeDef structure which will - * be initialized. - * @retval None - */ -void DAC_StructInit(DAC_InitTypeDef* DAC_InitStruct) -{ -/*--------------- Reset DAC init structure parameters values -----------------*/ - /* Initialize the DAC_Trigger member */ - DAC_InitStruct->DAC_Trigger = DAC_Trigger_None; - /* Initialize the DAC_WaveGeneration member */ - DAC_InitStruct->DAC_WaveGeneration = DAC_WaveGeneration_None; - /* Initialize the DAC_LFSRUnmask_TriangleAmplitude member */ - DAC_InitStruct->DAC_LFSRUnmask_TriangleAmplitude = DAC_LFSRUnmask_Bit0; - /* Initialize the DAC_OutputBuffer member */ - DAC_InitStruct->DAC_OutputBuffer = DAC_OutputBuffer_Enable; -} - -/** - * @brief Enables or disables the specified DAC channel. - * @param DAC_Channel: the selected DAC channel. - * This parameter can be one of the following values: - * @arg DAC_Channel_1: DAC Channel1 selected - * @arg DAC_Channel_2: DAC Channel2 selected - * @param NewState: new state of the DAC channel. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void DAC_Cmd(uint32_t DAC_Channel, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_DAC_CHANNEL(DAC_Channel)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - if (NewState != DISABLE) - { - /* Enable the selected DAC channel */ - DAC->CR |= CR_EN_Set << DAC_Channel; - } - else - { - /* Disable the selected DAC channel */ - DAC->CR &= ~(CR_EN_Set << DAC_Channel); - } -} -#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) -/** - * @brief Enables or disables the specified DAC interrupts. - * @param DAC_Channel: the selected DAC channel. - * This parameter can be one of the following values: - * @arg DAC_Channel_1: DAC Channel1 selected - * @arg DAC_Channel_2: DAC Channel2 selected - * @param DAC_IT: specifies the DAC interrupt sources to be enabled or disabled. - * This parameter can be the following values: - * @arg DAC_IT_DMAUDR: DMA underrun interrupt mask - * @param NewState: new state of the specified DAC interrupts. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void DAC_ITConfig(uint32_t DAC_Channel, uint32_t DAC_IT, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_DAC_CHANNEL(DAC_Channel)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - assert_param(IS_DAC_IT(DAC_IT)); - - if (NewState != DISABLE) - { - /* Enable the selected DAC interrupts */ - DAC->CR |= (DAC_IT << DAC_Channel); - } - else - { - /* Disable the selected DAC interrupts */ - DAC->CR &= (~(uint32_t)(DAC_IT << DAC_Channel)); - } -} -#endif - -/** - * @brief Enables or disables the specified DAC channel DMA request. - * @param DAC_Channel: the selected DAC channel. - * This parameter can be one of the following values: - * @arg DAC_Channel_1: DAC Channel1 selected - * @arg DAC_Channel_2: DAC Channel2 selected - * @param NewState: new state of the selected DAC channel DMA request. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void DAC_DMACmd(uint32_t DAC_Channel, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_DAC_CHANNEL(DAC_Channel)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - if (NewState != DISABLE) - { - /* Enable the selected DAC channel DMA request */ - DAC->CR |= CR_DMAEN_Set << DAC_Channel; - } - else - { - /* Disable the selected DAC channel DMA request */ - DAC->CR &= ~(CR_DMAEN_Set << DAC_Channel); - } -} - -/** - * @brief Enables or disables the selected DAC channel software trigger. - * @param DAC_Channel: the selected DAC channel. - * This parameter can be one of the following values: - * @arg DAC_Channel_1: DAC Channel1 selected - * @arg DAC_Channel_2: DAC Channel2 selected - * @param NewState: new state of the selected DAC channel software trigger. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void DAC_SoftwareTriggerCmd(uint32_t DAC_Channel, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_DAC_CHANNEL(DAC_Channel)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - if (NewState != DISABLE) - { - /* Enable software trigger for the selected DAC channel */ - DAC->SWTRIGR |= SWTRIGR_SWTRIG_Set << (DAC_Channel >> 4); - } - else - { - /* Disable software trigger for the selected DAC channel */ - DAC->SWTRIGR &= ~(SWTRIGR_SWTRIG_Set << (DAC_Channel >> 4)); - } -} - -/** - * @brief Enables or disables simultaneously the two DAC channels software - * triggers. - * @param NewState: new state of the DAC channels software triggers. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void DAC_DualSoftwareTriggerCmd(FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_FUNCTIONAL_STATE(NewState)); - if (NewState != DISABLE) - { - /* Enable software trigger for both DAC channels */ - DAC->SWTRIGR |= DUAL_SWTRIG_Set ; - } - else - { - /* Disable software trigger for both DAC channels */ - DAC->SWTRIGR &= DUAL_SWTRIG_Reset; - } -} - -/** - * @brief Enables or disables the selected DAC channel wave generation. - * @param DAC_Channel: the selected DAC channel. - * This parameter can be one of the following values: - * @arg DAC_Channel_1: DAC Channel1 selected - * @arg DAC_Channel_2: DAC Channel2 selected - * @param DAC_Wave: Specifies the wave type to enable or disable. - * This parameter can be one of the following values: - * @arg DAC_Wave_Noise: noise wave generation - * @arg DAC_Wave_Triangle: triangle wave generation - * @param NewState: new state of the selected DAC channel wave generation. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void DAC_WaveGenerationCmd(uint32_t DAC_Channel, uint32_t DAC_Wave, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_DAC_CHANNEL(DAC_Channel)); - assert_param(IS_DAC_WAVE(DAC_Wave)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - if (NewState != DISABLE) - { - /* Enable the selected wave generation for the selected DAC channel */ - DAC->CR |= DAC_Wave << DAC_Channel; - } - else - { - /* Disable the selected wave generation for the selected DAC channel */ - DAC->CR &= ~(DAC_Wave << DAC_Channel); - } -} - -/** - * @brief Set the specified data holding register value for DAC channel1. - * @param DAC_Align: Specifies the data alignement for DAC channel1. - * This parameter can be one of the following values: - * @arg DAC_Align_8b_R: 8bit right data alignement selected - * @arg DAC_Align_12b_L: 12bit left data alignement selected - * @arg DAC_Align_12b_R: 12bit right data alignement selected - * @param Data : Data to be loaded in the selected data holding register. - * @retval None - */ -void DAC_SetChannel1Data(uint32_t DAC_Align, uint16_t Data) -{ - __IO uint32_t tmp = 0; - - /* Check the parameters */ - assert_param(IS_DAC_ALIGN(DAC_Align)); - assert_param(IS_DAC_DATA(Data)); - - tmp = (uint32_t)DAC_BASE; - tmp += DHR12R1_Offset + DAC_Align; - - /* Set the DAC channel1 selected data holding register */ - *(__IO uint32_t *) tmp = Data; -} - -/** - * @brief Set the specified data holding register value for DAC channel2. - * @param DAC_Align: Specifies the data alignement for DAC channel2. - * This parameter can be one of the following values: - * @arg DAC_Align_8b_R: 8bit right data alignement selected - * @arg DAC_Align_12b_L: 12bit left data alignement selected - * @arg DAC_Align_12b_R: 12bit right data alignement selected - * @param Data : Data to be loaded in the selected data holding register. - * @retval None - */ -void DAC_SetChannel2Data(uint32_t DAC_Align, uint16_t Data) -{ - __IO uint32_t tmp = 0; - - /* Check the parameters */ - assert_param(IS_DAC_ALIGN(DAC_Align)); - assert_param(IS_DAC_DATA(Data)); - - tmp = (uint32_t)DAC_BASE; - tmp += DHR12R2_Offset + DAC_Align; - - /* Set the DAC channel2 selected data holding register */ - *(__IO uint32_t *)tmp = Data; -} - -/** - * @brief Set the specified data holding register value for dual channel - * DAC. - * @param DAC_Align: Specifies the data alignement for dual channel DAC. - * This parameter can be one of the following values: - * @arg DAC_Align_8b_R: 8bit right data alignement selected - * @arg DAC_Align_12b_L: 12bit left data alignement selected - * @arg DAC_Align_12b_R: 12bit right data alignement selected - * @param Data2: Data for DAC Channel2 to be loaded in the selected data - * holding register. - * @param Data1: Data for DAC Channel1 to be loaded in the selected data - * holding register. - * @retval None - */ -void DAC_SetDualChannelData(uint32_t DAC_Align, uint16_t Data2, uint16_t Data1) -{ - uint32_t data = 0, tmp = 0; - - /* Check the parameters */ - assert_param(IS_DAC_ALIGN(DAC_Align)); - assert_param(IS_DAC_DATA(Data1)); - assert_param(IS_DAC_DATA(Data2)); - - /* Calculate and set dual DAC data holding register value */ - if (DAC_Align == DAC_Align_8b_R) - { - data = ((uint32_t)Data2 << 8) | Data1; - } - else - { - data = ((uint32_t)Data2 << 16) | Data1; - } - - tmp = (uint32_t)DAC_BASE; - tmp += DHR12RD_Offset + DAC_Align; - - /* Set the dual DAC selected data holding register */ - *(__IO uint32_t *)tmp = data; -} - -/** - * @brief Returns the last data output value of the selected DAC cahnnel. - * @param DAC_Channel: the selected DAC channel. - * This parameter can be one of the following values: - * @arg DAC_Channel_1: DAC Channel1 selected - * @arg DAC_Channel_2: DAC Channel2 selected - * @retval The selected DAC channel data output value. - */ -uint16_t DAC_GetDataOutputValue(uint32_t DAC_Channel) -{ - __IO uint32_t tmp = 0; - - /* Check the parameters */ - assert_param(IS_DAC_CHANNEL(DAC_Channel)); - - tmp = (uint32_t) DAC_BASE ; - tmp += DOR_Offset + ((uint32_t)DAC_Channel >> 2); - - /* Returns the DAC channel data output register value */ - return (uint16_t) (*(__IO uint32_t*) tmp); -} - -#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) -/** - * @brief Checks whether the specified DAC flag is set or not. - * @param DAC_Channel: thee selected DAC channel. - * This parameter can be one of the following values: - * @arg DAC_Channel_1: DAC Channel1 selected - * @arg DAC_Channel_2: DAC Channel2 selected - * @param DAC_FLAG: specifies the flag to check. - * This parameter can be only of the following value: - * @arg DAC_FLAG_DMAUDR: DMA underrun flag - * @retval The new state of DAC_FLAG (SET or RESET). - */ -FlagStatus DAC_GetFlagStatus(uint32_t DAC_Channel, uint32_t DAC_FLAG) -{ - FlagStatus bitstatus = RESET; - /* Check the parameters */ - assert_param(IS_DAC_CHANNEL(DAC_Channel)); - assert_param(IS_DAC_FLAG(DAC_FLAG)); - - /* Check the status of the specified DAC flag */ - if ((DAC->SR & (DAC_FLAG << DAC_Channel)) != (uint8_t)RESET) - { - /* DAC_FLAG is set */ - bitstatus = SET; - } - else - { - /* DAC_FLAG is reset */ - bitstatus = RESET; - } - /* Return the DAC_FLAG status */ - return bitstatus; -} - -/** - * @brief Clears the DAC channelx's pending flags. - * @param DAC_Channel: the selected DAC channel. - * This parameter can be one of the following values: - * @arg DAC_Channel_1: DAC Channel1 selected - * @arg DAC_Channel_2: DAC Channel2 selected - * @param DAC_FLAG: specifies the flag to clear. - * This parameter can be of the following value: - * @arg DAC_FLAG_DMAUDR: DMA underrun flag - * @retval None - */ -void DAC_ClearFlag(uint32_t DAC_Channel, uint32_t DAC_FLAG) -{ - /* Check the parameters */ - assert_param(IS_DAC_CHANNEL(DAC_Channel)); - assert_param(IS_DAC_FLAG(DAC_FLAG)); - - /* Clear the selected DAC flags */ - DAC->SR = (DAC_FLAG << DAC_Channel); -} - -/** - * @brief Checks whether the specified DAC interrupt has occurred or not. - * @param DAC_Channel: the selected DAC channel. - * This parameter can be one of the following values: - * @arg DAC_Channel_1: DAC Channel1 selected - * @arg DAC_Channel_2: DAC Channel2 selected - * @param DAC_IT: specifies the DAC interrupt source to check. - * This parameter can be the following values: - * @arg DAC_IT_DMAUDR: DMA underrun interrupt mask - * @retval The new state of DAC_IT (SET or RESET). - */ -ITStatus DAC_GetITStatus(uint32_t DAC_Channel, uint32_t DAC_IT) -{ - ITStatus bitstatus = RESET; - uint32_t enablestatus = 0; - - /* Check the parameters */ - assert_param(IS_DAC_CHANNEL(DAC_Channel)); - assert_param(IS_DAC_IT(DAC_IT)); - - /* Get the DAC_IT enable bit status */ - enablestatus = (DAC->CR & (DAC_IT << DAC_Channel)) ; - - /* Check the status of the specified DAC interrupt */ - if (((DAC->SR & (DAC_IT << DAC_Channel)) != (uint32_t)RESET) && enablestatus) - { - /* DAC_IT is set */ - bitstatus = SET; - } - else - { - /* DAC_IT is reset */ - bitstatus = RESET; - } - /* Return the DAC_IT status */ - return bitstatus; -} - -/** - * @brief Clears the DAC channelx’s interrupt pending bits. - * @param DAC_Channel: the selected DAC channel. - * This parameter can be one of the following values: - * @arg DAC_Channel_1: DAC Channel1 selected - * @arg DAC_Channel_2: DAC Channel2 selected - * @param DAC_IT: specifies the DAC interrupt pending bit to clear. - * This parameter can be the following values: - * @arg DAC_IT_DMAUDR: DMA underrun interrupt mask - * @retval None - */ -void DAC_ClearITPendingBit(uint32_t DAC_Channel, uint32_t DAC_IT) -{ - /* Check the parameters */ - assert_param(IS_DAC_CHANNEL(DAC_Channel)); - assert_param(IS_DAC_IT(DAC_IT)); - - /* Clear the selected DAC interrupt pending bits */ - DAC->SR = (DAC_IT << DAC_Channel); -} -#endif - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_dbgmcu.c b/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_dbgmcu.c deleted file mode 100644 index 269d15195f..0000000000 --- a/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_dbgmcu.c +++ /dev/null @@ -1,155 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f10x_dbgmcu.c - * @author MCD Application Team - * @version V3.2.0 - * @date 03/01/2010 - * @brief This file provides all the DBGMCU firmware functions. - ****************************************************************************** - * @copy - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2010 STMicroelectronics

- */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x_dbgmcu.h" - -/** @addtogroup STM32F10x_StdPeriph_Driver - * @{ - */ - -/** @defgroup DBGMCU - * @brief DBGMCU driver modules - * @{ - */ - -/** @defgroup DBGMCU_Private_TypesDefinitions - * @{ - */ - -/** - * @} - */ - -/** @defgroup DBGMCU_Private_Defines - * @{ - */ - -#define IDCODE_DEVID_Mask ((uint32_t)0x00000FFF) -/** - * @} - */ - -/** @defgroup DBGMCU_Private_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup DBGMCU_Private_Variables - * @{ - */ - -/** - * @} - */ - -/** @defgroup DBGMCU_Private_FunctionPrototypes - * @{ - */ - -/** - * @} - */ - -/** @defgroup DBGMCU_Private_Functions - * @{ - */ - -/** - * @brief Returns the device revision identifier. - * @param None - * @retval Device revision identifier - */ -uint32_t DBGMCU_GetREVID(void) -{ - return(DBGMCU->IDCODE >> 16); -} - -/** - * @brief Returns the device identifier. - * @param None - * @retval Device identifier - */ -uint32_t DBGMCU_GetDEVID(void) -{ - return(DBGMCU->IDCODE & IDCODE_DEVID_Mask); -} - -/** - * @brief Configures the specified peripheral and low power mode behavior - * when the MCU under Debug mode. - * @param DBGMCU_Periph: specifies the peripheral and low power mode. - * This parameter can be any combination of the following values: - * @arg DBGMCU_SLEEP: Keep debugger connection during SLEEP mode - * @arg DBGMCU_STOP: Keep debugger connection during STOP mode - * @arg DBGMCU_STANDBY: Keep debugger connection during STANDBY mode - * @arg DBGMCU_IWDG_STOP: Debug IWDG stopped when Core is halted - * @arg DBGMCU_WWDG_STOP: Debug WWDG stopped when Core is halted - * @arg DBGMCU_TIM1_STOP: TIM1 counter stopped when Core is halted - * @arg DBGMCU_TIM2_STOP: TIM2 counter stopped when Core is halted - * @arg DBGMCU_TIM3_STOP: TIM3 counter stopped when Core is halted - * @arg DBGMCU_TIM4_STOP: TIM4 counter stopped when Core is halted - * @arg DBGMCU_CAN1_STOP: Debug CAN2 stopped when Core is halted - * @arg DBGMCU_I2C1_SMBUS_TIMEOUT: I2C1 SMBUS timeout mode stopped when Core is halted - * @arg DBGMCU_I2C2_SMBUS_TIMEOUT: I2C2 SMBUS timeout mode stopped when Core is halted - * @arg DBGMCU_TIM5_STOP: TIM5 counter stopped when Core is halted - * @arg DBGMCU_TIM6_STOP: TIM6 counter stopped when Core is halted - * @arg DBGMCU_TIM7_STOP: TIM7 counter stopped when Core is halted - * @arg DBGMCU_TIM8_STOP: TIM8 counter stopped when Core is halted - * @arg DBGMCU_CAN2_STOP: Debug CAN2 stopped when Core is halted - * @arg DBGMCU_TIM15_STOP: TIM15 counter stopped when Core is halted - * @arg DBGMCU_TIM16_STOP: TIM16 counter stopped when Core is halted - * @arg DBGMCU_TIM17_STOP: TIM17 counter stopped when Core is halted - * @param NewState: new state of the specified peripheral in Debug mode. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void DBGMCU_Config(uint32_t DBGMCU_Periph, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_DBGMCU_PERIPH(DBGMCU_Periph)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - - if (NewState != DISABLE) - { - DBGMCU->CR |= DBGMCU_Periph; - } - else - { - DBGMCU->CR &= ~DBGMCU_Periph; - } -} - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c b/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c deleted file mode 100644 index cd8e43dd78..0000000000 --- a/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c +++ /dev/null @@ -1,693 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f10x_dma.c - * @author MCD Application Team - * @version V3.2.0 - * @date 03/01/2010 - * @brief This file provides all the DMA firmware functions. - ****************************************************************************** - * @copy - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2010 STMicroelectronics

- */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x_dma.h" -#include "stm32f10x_rcc.h" - -/** @addtogroup STM32F10x_StdPeriph_Driver - * @{ - */ - -/** @defgroup DMA - * @brief DMA driver modules - * @{ - */ - -/** @defgroup DMA_Private_TypesDefinitions - * @{ - */ -/** - * @} - */ - -/** @defgroup DMA_Private_Defines - * @{ - */ - -/* DMA ENABLE mask */ -#define CCR_ENABLE_Set ((uint32_t)0x00000001) -#define CCR_ENABLE_Reset ((uint32_t)0xFFFFFFFE) - -/* DMA1 Channelx interrupt pending bit masks */ -#define DMA1_Channel1_IT_Mask ((uint32_t)0x0000000F) -#define DMA1_Channel2_IT_Mask ((uint32_t)0x000000F0) -#define DMA1_Channel3_IT_Mask ((uint32_t)0x00000F00) -#define DMA1_Channel4_IT_Mask ((uint32_t)0x0000F000) -#define DMA1_Channel5_IT_Mask ((uint32_t)0x000F0000) -#define DMA1_Channel6_IT_Mask ((uint32_t)0x00F00000) -#define DMA1_Channel7_IT_Mask ((uint32_t)0x0F000000) - -/* DMA2 Channelx interrupt pending bit masks */ -#define DMA2_Channel1_IT_Mask ((uint32_t)0x0000000F) -#define DMA2_Channel2_IT_Mask ((uint32_t)0x000000F0) -#define DMA2_Channel3_IT_Mask ((uint32_t)0x00000F00) -#define DMA2_Channel4_IT_Mask ((uint32_t)0x0000F000) -#define DMA2_Channel5_IT_Mask ((uint32_t)0x000F0000) - -/* DMA2 FLAG mask */ -#define FLAG_Mask ((uint32_t)0x10000000) - -/* DMA registers Masks */ -#define CCR_CLEAR_Mask ((uint32_t)0xFFFF800F) - -/** - * @} - */ - -/** @defgroup DMA_Private_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup DMA_Private_Variables - * @{ - */ - -/** - * @} - */ - -/** @defgroup DMA_Private_FunctionPrototypes - * @{ - */ - -/** - * @} - */ - -/** @defgroup DMA_Private_Functions - * @{ - */ - -/** - * @brief Deinitializes the DMAy Channelx registers to their default reset - * values. - * @param DMAy_Channelx: where y can be 1 or 2 to select the DMA and - * x can be 1 to 7 for DMA1 and 1 to 5 for DMA2 to select the DMA Channel. - * @retval None - */ -void DMA_DeInit(DMA_Channel_TypeDef* DMAy_Channelx) -{ - /* Check the parameters */ - assert_param(IS_DMA_ALL_PERIPH(DMAy_Channelx)); - /* Disable the selected DMAy Channelx */ - DMAy_Channelx->CCR &= CCR_ENABLE_Reset; - /* Reset DMAy Channelx control register */ - DMAy_Channelx->CCR = 0; - - /* Reset DMAy Channelx remaining bytes register */ - DMAy_Channelx->CNDTR = 0; - - /* Reset DMAy Channelx peripheral address register */ - DMAy_Channelx->CPAR = 0; - - /* Reset DMAy Channelx memory address register */ - DMAy_Channelx->CMAR = 0; - - if (DMAy_Channelx == DMA1_Channel1) - { - /* Reset interrupt pending bits for DMA1 Channel1 */ - DMA1->IFCR |= DMA1_Channel1_IT_Mask; - } - else if (DMAy_Channelx == DMA1_Channel2) - { - /* Reset interrupt pending bits for DMA1 Channel2 */ - DMA1->IFCR |= DMA1_Channel2_IT_Mask; - } - else if (DMAy_Channelx == DMA1_Channel3) - { - /* Reset interrupt pending bits for DMA1 Channel3 */ - DMA1->IFCR |= DMA1_Channel3_IT_Mask; - } - else if (DMAy_Channelx == DMA1_Channel4) - { - /* Reset interrupt pending bits for DMA1 Channel4 */ - DMA1->IFCR |= DMA1_Channel4_IT_Mask; - } - else if (DMAy_Channelx == DMA1_Channel5) - { - /* Reset interrupt pending bits for DMA1 Channel5 */ - DMA1->IFCR |= DMA1_Channel5_IT_Mask; - } - else if (DMAy_Channelx == DMA1_Channel6) - { - /* Reset interrupt pending bits for DMA1 Channel6 */ - DMA1->IFCR |= DMA1_Channel6_IT_Mask; - } - else if (DMAy_Channelx == DMA1_Channel7) - { - /* Reset interrupt pending bits for DMA1 Channel7 */ - DMA1->IFCR |= DMA1_Channel7_IT_Mask; - } - else if (DMAy_Channelx == DMA2_Channel1) - { - /* Reset interrupt pending bits for DMA2 Channel1 */ - DMA2->IFCR |= DMA2_Channel1_IT_Mask; - } - else if (DMAy_Channelx == DMA2_Channel2) - { - /* Reset interrupt pending bits for DMA2 Channel2 */ - DMA2->IFCR |= DMA2_Channel2_IT_Mask; - } - else if (DMAy_Channelx == DMA2_Channel3) - { - /* Reset interrupt pending bits for DMA2 Channel3 */ - DMA2->IFCR |= DMA2_Channel3_IT_Mask; - } - else if (DMAy_Channelx == DMA2_Channel4) - { - /* Reset interrupt pending bits for DMA2 Channel4 */ - DMA2->IFCR |= DMA2_Channel4_IT_Mask; - } - else - { - if (DMAy_Channelx == DMA2_Channel5) - { - /* Reset interrupt pending bits for DMA2 Channel5 */ - DMA2->IFCR |= DMA2_Channel5_IT_Mask; - } - } -} - -/** - * @brief Initializes the DMAy Channelx according to the specified - * parameters in the DMA_InitStruct. - * @param DMAy_Channelx: where y can be 1 or 2 to select the DMA and - * x can be 1 to 7 for DMA1 and 1 to 5 for DMA2 to select the DMA Channel. - * @param DMA_InitStruct: pointer to a DMA_InitTypeDef structure that - * contains the configuration information for the specified DMA Channel. - * @retval None - */ -void DMA_Init(DMA_Channel_TypeDef* DMAy_Channelx, DMA_InitTypeDef* DMA_InitStruct) -{ - uint32_t tmpreg = 0; - - /* Check the parameters */ - assert_param(IS_DMA_ALL_PERIPH(DMAy_Channelx)); - assert_param(IS_DMA_DIR(DMA_InitStruct->DMA_DIR)); - assert_param(IS_DMA_BUFFER_SIZE(DMA_InitStruct->DMA_BufferSize)); - assert_param(IS_DMA_PERIPHERAL_INC_STATE(DMA_InitStruct->DMA_PeripheralInc)); - assert_param(IS_DMA_MEMORY_INC_STATE(DMA_InitStruct->DMA_MemoryInc)); - assert_param(IS_DMA_PERIPHERAL_DATA_SIZE(DMA_InitStruct->DMA_PeripheralDataSize)); - assert_param(IS_DMA_MEMORY_DATA_SIZE(DMA_InitStruct->DMA_MemoryDataSize)); - assert_param(IS_DMA_MODE(DMA_InitStruct->DMA_Mode)); - assert_param(IS_DMA_PRIORITY(DMA_InitStruct->DMA_Priority)); - assert_param(IS_DMA_M2M_STATE(DMA_InitStruct->DMA_M2M)); - -/*--------------------------- DMAy Channelx CCR Configuration -----------------*/ - /* Get the DMAy_Channelx CCR value */ - tmpreg = DMAy_Channelx->CCR; - /* Clear MEM2MEM, PL, MSIZE, PSIZE, MINC, PINC, CIRC and DIR bits */ - tmpreg &= CCR_CLEAR_Mask; - /* Configure DMAy Channelx: data transfer, data size, priority level and mode */ - /* Set DIR bit according to DMA_DIR value */ - /* Set CIRC bit according to DMA_Mode value */ - /* Set PINC bit according to DMA_PeripheralInc value */ - /* Set MINC bit according to DMA_MemoryInc value */ - /* Set PSIZE bits according to DMA_PeripheralDataSize value */ - /* Set MSIZE bits according to DMA_MemoryDataSize value */ - /* Set PL bits according to DMA_Priority value */ - /* Set the MEM2MEM bit according to DMA_M2M value */ - tmpreg |= DMA_InitStruct->DMA_DIR | DMA_InitStruct->DMA_Mode | - DMA_InitStruct->DMA_PeripheralInc | DMA_InitStruct->DMA_MemoryInc | - DMA_InitStruct->DMA_PeripheralDataSize | DMA_InitStruct->DMA_MemoryDataSize | - DMA_InitStruct->DMA_Priority | DMA_InitStruct->DMA_M2M; - - /* Write to DMAy Channelx CCR */ - DMAy_Channelx->CCR = tmpreg; - -/*--------------------------- DMAy Channelx CNDTR Configuration ---------------*/ - /* Write to DMAy Channelx CNDTR */ - DMAy_Channelx->CNDTR = DMA_InitStruct->DMA_BufferSize; - -/*--------------------------- DMAy Channelx CPAR Configuration ----------------*/ - /* Write to DMAy Channelx CPAR */ - DMAy_Channelx->CPAR = DMA_InitStruct->DMA_PeripheralBaseAddr; - -/*--------------------------- DMAy Channelx CMAR Configuration ----------------*/ - /* Write to DMAy Channelx CMAR */ - DMAy_Channelx->CMAR = DMA_InitStruct->DMA_MemoryBaseAddr; -} - -/** - * @brief Fills each DMA_InitStruct member with its default value. - * @param DMA_InitStruct : pointer to a DMA_InitTypeDef structure which will - * be initialized. - * @retval None - */ -void DMA_StructInit(DMA_InitTypeDef* DMA_InitStruct) -{ -/*-------------- Reset DMA init structure parameters values ------------------*/ - /* Initialize the DMA_PeripheralBaseAddr member */ - DMA_InitStruct->DMA_PeripheralBaseAddr = 0; - /* Initialize the DMA_MemoryBaseAddr member */ - DMA_InitStruct->DMA_MemoryBaseAddr = 0; - /* Initialize the DMA_DIR member */ - DMA_InitStruct->DMA_DIR = DMA_DIR_PeripheralSRC; - /* Initialize the DMA_BufferSize member */ - DMA_InitStruct->DMA_BufferSize = 0; - /* Initialize the DMA_PeripheralInc member */ - DMA_InitStruct->DMA_PeripheralInc = DMA_PeripheralInc_Disable; - /* Initialize the DMA_MemoryInc member */ - DMA_InitStruct->DMA_MemoryInc = DMA_MemoryInc_Disable; - /* Initialize the DMA_PeripheralDataSize member */ - DMA_InitStruct->DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte; - /* Initialize the DMA_MemoryDataSize member */ - DMA_InitStruct->DMA_MemoryDataSize = DMA_MemoryDataSize_Byte; - /* Initialize the DMA_Mode member */ - DMA_InitStruct->DMA_Mode = DMA_Mode_Normal; - /* Initialize the DMA_Priority member */ - DMA_InitStruct->DMA_Priority = DMA_Priority_Low; - /* Initialize the DMA_M2M member */ - DMA_InitStruct->DMA_M2M = DMA_M2M_Disable; -} - -/** - * @brief Enables or disables the specified DMAy Channelx. - * @param DMAy_Channelx: where y can be 1 or 2 to select the DMA and - * x can be 1 to 7 for DMA1 and 1 to 5 for DMA2 to select the DMA Channel. - * @param NewState: new state of the DMAy Channelx. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void DMA_Cmd(DMA_Channel_TypeDef* DMAy_Channelx, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_DMA_ALL_PERIPH(DMAy_Channelx)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - - if (NewState != DISABLE) - { - /* Enable the selected DMAy Channelx */ - DMAy_Channelx->CCR |= CCR_ENABLE_Set; - } - else - { - /* Disable the selected DMAy Channelx */ - DMAy_Channelx->CCR &= CCR_ENABLE_Reset; - } -} - -/** - * @brief Enables or disables the specified DMAy Channelx interrupts. - * @param DMAy_Channelx: where y can be 1 or 2 to select the DMA and - * x can be 1 to 7 for DMA1 and 1 to 5 for DMA2 to select the DMA Channel. - * @param DMA_IT: specifies the DMA interrupts sources to be enabled - * or disabled. - * This parameter can be any combination of the following values: - * @arg DMA_IT_TC: Transfer complete interrupt mask - * @arg DMA_IT_HT: Half transfer interrupt mask - * @arg DMA_IT_TE: Transfer error interrupt mask - * @param NewState: new state of the specified DMA interrupts. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void DMA_ITConfig(DMA_Channel_TypeDef* DMAy_Channelx, uint32_t DMA_IT, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_DMA_ALL_PERIPH(DMAy_Channelx)); - assert_param(IS_DMA_CONFIG_IT(DMA_IT)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - if (NewState != DISABLE) - { - /* Enable the selected DMA interrupts */ - DMAy_Channelx->CCR |= DMA_IT; - } - else - { - /* Disable the selected DMA interrupts */ - DMAy_Channelx->CCR &= ~DMA_IT; - } -} - -/** - * @brief Returns the number of remaining data units in the current - * DMAy Channelx transfer. - * @param DMAy_Channelx: where y can be 1 or 2 to select the DMA and - * x can be 1 to 7 for DMA1 and 1 to 5 for DMA2 to select the DMA Channel. - * @retval The number of remaining data units in the current DMAy Channelx - * transfer. - */ -uint16_t DMA_GetCurrDataCounter(DMA_Channel_TypeDef* DMAy_Channelx) -{ - /* Check the parameters */ - assert_param(IS_DMA_ALL_PERIPH(DMAy_Channelx)); - /* Return the number of remaining data units for DMAy Channelx */ - return ((uint16_t)(DMAy_Channelx->CNDTR)); -} - -/** - * @brief Checks whether the specified DMAy Channelx flag is set or not. - * @param DMA_FLAG: specifies the flag to check. - * This parameter can be one of the following values: - * @arg DMA1_FLAG_GL1: DMA1 Channel1 global flag. - * @arg DMA1_FLAG_TC1: DMA1 Channel1 transfer complete flag. - * @arg DMA1_FLAG_HT1: DMA1 Channel1 half transfer flag. - * @arg DMA1_FLAG_TE1: DMA1 Channel1 transfer error flag. - * @arg DMA1_FLAG_GL2: DMA1 Channel2 global flag. - * @arg DMA1_FLAG_TC2: DMA1 Channel2 transfer complete flag. - * @arg DMA1_FLAG_HT2: DMA1 Channel2 half transfer flag. - * @arg DMA1_FLAG_TE2: DMA1 Channel2 transfer error flag. - * @arg DMA1_FLAG_GL3: DMA1 Channel3 global flag. - * @arg DMA1_FLAG_TC3: DMA1 Channel3 transfer complete flag. - * @arg DMA1_FLAG_HT3: DMA1 Channel3 half transfer flag. - * @arg DMA1_FLAG_TE3: DMA1 Channel3 transfer error flag. - * @arg DMA1_FLAG_GL4: DMA1 Channel4 global flag. - * @arg DMA1_FLAG_TC4: DMA1 Channel4 transfer complete flag. - * @arg DMA1_FLAG_HT4: DMA1 Channel4 half transfer flag. - * @arg DMA1_FLAG_TE4: DMA1 Channel4 transfer error flag. - * @arg DMA1_FLAG_GL5: DMA1 Channel5 global flag. - * @arg DMA1_FLAG_TC5: DMA1 Channel5 transfer complete flag. - * @arg DMA1_FLAG_HT5: DMA1 Channel5 half transfer flag. - * @arg DMA1_FLAG_TE5: DMA1 Channel5 transfer error flag. - * @arg DMA1_FLAG_GL6: DMA1 Channel6 global flag. - * @arg DMA1_FLAG_TC6: DMA1 Channel6 transfer complete flag. - * @arg DMA1_FLAG_HT6: DMA1 Channel6 half transfer flag. - * @arg DMA1_FLAG_TE6: DMA1 Channel6 transfer error flag. - * @arg DMA1_FLAG_GL7: DMA1 Channel7 global flag. - * @arg DMA1_FLAG_TC7: DMA1 Channel7 transfer complete flag. - * @arg DMA1_FLAG_HT7: DMA1 Channel7 half transfer flag. - * @arg DMA1_FLAG_TE7: DMA1 Channel7 transfer error flag. - * @arg DMA2_FLAG_GL1: DMA2 Channel1 global flag. - * @arg DMA2_FLAG_TC1: DMA2 Channel1 transfer complete flag. - * @arg DMA2_FLAG_HT1: DMA2 Channel1 half transfer flag. - * @arg DMA2_FLAG_TE1: DMA2 Channel1 transfer error flag. - * @arg DMA2_FLAG_GL2: DMA2 Channel2 global flag. - * @arg DMA2_FLAG_TC2: DMA2 Channel2 transfer complete flag. - * @arg DMA2_FLAG_HT2: DMA2 Channel2 half transfer flag. - * @arg DMA2_FLAG_TE2: DMA2 Channel2 transfer error flag. - * @arg DMA2_FLAG_GL3: DMA2 Channel3 global flag. - * @arg DMA2_FLAG_TC3: DMA2 Channel3 transfer complete flag. - * @arg DMA2_FLAG_HT3: DMA2 Channel3 half transfer flag. - * @arg DMA2_FLAG_TE3: DMA2 Channel3 transfer error flag. - * @arg DMA2_FLAG_GL4: DMA2 Channel4 global flag. - * @arg DMA2_FLAG_TC4: DMA2 Channel4 transfer complete flag. - * @arg DMA2_FLAG_HT4: DMA2 Channel4 half transfer flag. - * @arg DMA2_FLAG_TE4: DMA2 Channel4 transfer error flag. - * @arg DMA2_FLAG_GL5: DMA2 Channel5 global flag. - * @arg DMA2_FLAG_TC5: DMA2 Channel5 transfer complete flag. - * @arg DMA2_FLAG_HT5: DMA2 Channel5 half transfer flag. - * @arg DMA2_FLAG_TE5: DMA2 Channel5 transfer error flag. - * @retval The new state of DMA_FLAG (SET or RESET). - */ -FlagStatus DMA_GetFlagStatus(uint32_t DMA_FLAG) -{ - FlagStatus bitstatus = RESET; - uint32_t tmpreg = 0; - /* Check the parameters */ - assert_param(IS_DMA_GET_FLAG(DMA_FLAG)); - - /* Calculate the used DMA */ - if ((DMA_FLAG & FLAG_Mask) != (uint32_t)RESET) - { - /* Get DMA2 ISR register value */ - tmpreg = DMA2->ISR ; - } - else - { - /* Get DMA1 ISR register value */ - tmpreg = DMA1->ISR ; - } - - /* Check the status of the specified DMA flag */ - if ((tmpreg & DMA_FLAG) != (uint32_t)RESET) - { - /* DMA_FLAG is set */ - bitstatus = SET; - } - else - { - /* DMA_FLAG is reset */ - bitstatus = RESET; - } - - /* Return the DMA_FLAG status */ - return bitstatus; -} - -/** - * @brief Clears the DMAy Channelx's pending flags. - * @param DMA_FLAG: specifies the flag to clear. - * This parameter can be any combination (for the same DMA) of the following values: - * @arg DMA1_FLAG_GL1: DMA1 Channel1 global flag. - * @arg DMA1_FLAG_TC1: DMA1 Channel1 transfer complete flag. - * @arg DMA1_FLAG_HT1: DMA1 Channel1 half transfer flag. - * @arg DMA1_FLAG_TE1: DMA1 Channel1 transfer error flag. - * @arg DMA1_FLAG_GL2: DMA1 Channel2 global flag. - * @arg DMA1_FLAG_TC2: DMA1 Channel2 transfer complete flag. - * @arg DMA1_FLAG_HT2: DMA1 Channel2 half transfer flag. - * @arg DMA1_FLAG_TE2: DMA1 Channel2 transfer error flag. - * @arg DMA1_FLAG_GL3: DMA1 Channel3 global flag. - * @arg DMA1_FLAG_TC3: DMA1 Channel3 transfer complete flag. - * @arg DMA1_FLAG_HT3: DMA1 Channel3 half transfer flag. - * @arg DMA1_FLAG_TE3: DMA1 Channel3 transfer error flag. - * @arg DMA1_FLAG_GL4: DMA1 Channel4 global flag. - * @arg DMA1_FLAG_TC4: DMA1 Channel4 transfer complete flag. - * @arg DMA1_FLAG_HT4: DMA1 Channel4 half transfer flag. - * @arg DMA1_FLAG_TE4: DMA1 Channel4 transfer error flag. - * @arg DMA1_FLAG_GL5: DMA1 Channel5 global flag. - * @arg DMA1_FLAG_TC5: DMA1 Channel5 transfer complete flag. - * @arg DMA1_FLAG_HT5: DMA1 Channel5 half transfer flag. - * @arg DMA1_FLAG_TE5: DMA1 Channel5 transfer error flag. - * @arg DMA1_FLAG_GL6: DMA1 Channel6 global flag. - * @arg DMA1_FLAG_TC6: DMA1 Channel6 transfer complete flag. - * @arg DMA1_FLAG_HT6: DMA1 Channel6 half transfer flag. - * @arg DMA1_FLAG_TE6: DMA1 Channel6 transfer error flag. - * @arg DMA1_FLAG_GL7: DMA1 Channel7 global flag. - * @arg DMA1_FLAG_TC7: DMA1 Channel7 transfer complete flag. - * @arg DMA1_FLAG_HT7: DMA1 Channel7 half transfer flag. - * @arg DMA1_FLAG_TE7: DMA1 Channel7 transfer error flag. - * @arg DMA2_FLAG_GL1: DMA2 Channel1 global flag. - * @arg DMA2_FLAG_TC1: DMA2 Channel1 transfer complete flag. - * @arg DMA2_FLAG_HT1: DMA2 Channel1 half transfer flag. - * @arg DMA2_FLAG_TE1: DMA2 Channel1 transfer error flag. - * @arg DMA2_FLAG_GL2: DMA2 Channel2 global flag. - * @arg DMA2_FLAG_TC2: DMA2 Channel2 transfer complete flag. - * @arg DMA2_FLAG_HT2: DMA2 Channel2 half transfer flag. - * @arg DMA2_FLAG_TE2: DMA2 Channel2 transfer error flag. - * @arg DMA2_FLAG_GL3: DMA2 Channel3 global flag. - * @arg DMA2_FLAG_TC3: DMA2 Channel3 transfer complete flag. - * @arg DMA2_FLAG_HT3: DMA2 Channel3 half transfer flag. - * @arg DMA2_FLAG_TE3: DMA2 Channel3 transfer error flag. - * @arg DMA2_FLAG_GL4: DMA2 Channel4 global flag. - * @arg DMA2_FLAG_TC4: DMA2 Channel4 transfer complete flag. - * @arg DMA2_FLAG_HT4: DMA2 Channel4 half transfer flag. - * @arg DMA2_FLAG_TE4: DMA2 Channel4 transfer error flag. - * @arg DMA2_FLAG_GL5: DMA2 Channel5 global flag. - * @arg DMA2_FLAG_TC5: DMA2 Channel5 transfer complete flag. - * @arg DMA2_FLAG_HT5: DMA2 Channel5 half transfer flag. - * @arg DMA2_FLAG_TE5: DMA2 Channel5 transfer error flag. - * @retval None - */ -void DMA_ClearFlag(uint32_t DMA_FLAG) -{ - /* Check the parameters */ - assert_param(IS_DMA_CLEAR_FLAG(DMA_FLAG)); - /* Calculate the used DMA */ - - if ((DMA_FLAG & FLAG_Mask) != (uint32_t)RESET) - { - /* Clear the selected DMA flags */ - DMA2->IFCR = DMA_FLAG; - } - else - { - /* Clear the selected DMA flags */ - DMA1->IFCR = DMA_FLAG; - } -} - -/** - * @brief Checks whether the specified DMAy Channelx interrupt has occurred or not. - * @param DMA_IT: specifies the DMA interrupt source to check. - * This parameter can be one of the following values: - * @arg DMA1_IT_GL1: DMA1 Channel1 global interrupt. - * @arg DMA1_IT_TC1: DMA1 Channel1 transfer complete interrupt. - * @arg DMA1_IT_HT1: DMA1 Channel1 half transfer interrupt. - * @arg DMA1_IT_TE1: DMA1 Channel1 transfer error interrupt. - * @arg DMA1_IT_GL2: DMA1 Channel2 global interrupt. - * @arg DMA1_IT_TC2: DMA1 Channel2 transfer complete interrupt. - * @arg DMA1_IT_HT2: DMA1 Channel2 half transfer interrupt. - * @arg DMA1_IT_TE2: DMA1 Channel2 transfer error interrupt. - * @arg DMA1_IT_GL3: DMA1 Channel3 global interrupt. - * @arg DMA1_IT_TC3: DMA1 Channel3 transfer complete interrupt. - * @arg DMA1_IT_HT3: DMA1 Channel3 half transfer interrupt. - * @arg DMA1_IT_TE3: DMA1 Channel3 transfer error interrupt. - * @arg DMA1_IT_GL4: DMA1 Channel4 global interrupt. - * @arg DMA1_IT_TC4: DMA1 Channel4 transfer complete interrupt. - * @arg DMA1_IT_HT4: DMA1 Channel4 half transfer interrupt. - * @arg DMA1_IT_TE4: DMA1 Channel4 transfer error interrupt. - * @arg DMA1_IT_GL5: DMA1 Channel5 global interrupt. - * @arg DMA1_IT_TC5: DMA1 Channel5 transfer complete interrupt. - * @arg DMA1_IT_HT5: DMA1 Channel5 half transfer interrupt. - * @arg DMA1_IT_TE5: DMA1 Channel5 transfer error interrupt. - * @arg DMA1_IT_GL6: DMA1 Channel6 global interrupt. - * @arg DMA1_IT_TC6: DMA1 Channel6 transfer complete interrupt. - * @arg DMA1_IT_HT6: DMA1 Channel6 half transfer interrupt. - * @arg DMA1_IT_TE6: DMA1 Channel6 transfer error interrupt. - * @arg DMA1_IT_GL7: DMA1 Channel7 global interrupt. - * @arg DMA1_IT_TC7: DMA1 Channel7 transfer complete interrupt. - * @arg DMA1_IT_HT7: DMA1 Channel7 half transfer interrupt. - * @arg DMA1_IT_TE7: DMA1 Channel7 transfer error interrupt. - * @arg DMA2_IT_GL1: DMA2 Channel1 global interrupt. - * @arg DMA2_IT_TC1: DMA2 Channel1 transfer complete interrupt. - * @arg DMA2_IT_HT1: DMA2 Channel1 half transfer interrupt. - * @arg DMA2_IT_TE1: DMA2 Channel1 transfer error interrupt. - * @arg DMA2_IT_GL2: DMA2 Channel2 global interrupt. - * @arg DMA2_IT_TC2: DMA2 Channel2 transfer complete interrupt. - * @arg DMA2_IT_HT2: DMA2 Channel2 half transfer interrupt. - * @arg DMA2_IT_TE2: DMA2 Channel2 transfer error interrupt. - * @arg DMA2_IT_GL3: DMA2 Channel3 global interrupt. - * @arg DMA2_IT_TC3: DMA2 Channel3 transfer complete interrupt. - * @arg DMA2_IT_HT3: DMA2 Channel3 half transfer interrupt. - * @arg DMA2_IT_TE3: DMA2 Channel3 transfer error interrupt. - * @arg DMA2_IT_GL4: DMA2 Channel4 global interrupt. - * @arg DMA2_IT_TC4: DMA2 Channel4 transfer complete interrupt. - * @arg DMA2_IT_HT4: DMA2 Channel4 half transfer interrupt. - * @arg DMA2_IT_TE4: DMA2 Channel4 transfer error interrupt. - * @arg DMA2_IT_GL5: DMA2 Channel5 global interrupt. - * @arg DMA2_IT_TC5: DMA2 Channel5 transfer complete interrupt. - * @arg DMA2_IT_HT5: DMA2 Channel5 half transfer interrupt. - * @arg DMA2_IT_TE5: DMA2 Channel5 transfer error interrupt. - * @retval The new state of DMA_IT (SET or RESET). - */ -ITStatus DMA_GetITStatus(uint32_t DMA_IT) -{ - ITStatus bitstatus = RESET; - uint32_t tmpreg = 0; - /* Check the parameters */ - assert_param(IS_DMA_GET_IT(DMA_IT)); - - /* Calculate the used DMA */ - if ((DMA_IT & FLAG_Mask) != (uint32_t)RESET) - { - /* Get DMA2 ISR register value */ - tmpreg = DMA2->ISR ; - } - else - { - /* Get DMA1 ISR register value */ - tmpreg = DMA1->ISR ; - } - - /* Check the status of the specified DMA interrupt */ - if ((tmpreg & DMA_IT) != (uint32_t)RESET) - { - /* DMA_IT is set */ - bitstatus = SET; - } - else - { - /* DMA_IT is reset */ - bitstatus = RESET; - } - /* Return the DMA_IT status */ - return bitstatus; -} - -/** - * @brief Clears the DMAy Channelx’s interrupt pending bits. - * @param DMA_IT: specifies the DMA interrupt pending bit to clear. - * This parameter can be any combination (for the same DMA) of the following values: - * @arg DMA1_IT_GL1: DMA1 Channel1 global interrupt. - * @arg DMA1_IT_TC1: DMA1 Channel1 transfer complete interrupt. - * @arg DMA1_IT_HT1: DMA1 Channel1 half transfer interrupt. - * @arg DMA1_IT_TE1: DMA1 Channel1 transfer error interrupt. - * @arg DMA1_IT_GL2: DMA1 Channel2 global interrupt. - * @arg DMA1_IT_TC2: DMA1 Channel2 transfer complete interrupt. - * @arg DMA1_IT_HT2: DMA1 Channel2 half transfer interrupt. - * @arg DMA1_IT_TE2: DMA1 Channel2 transfer error interrupt. - * @arg DMA1_IT_GL3: DMA1 Channel3 global interrupt. - * @arg DMA1_IT_TC3: DMA1 Channel3 transfer complete interrupt. - * @arg DMA1_IT_HT3: DMA1 Channel3 half transfer interrupt. - * @arg DMA1_IT_TE3: DMA1 Channel3 transfer error interrupt. - * @arg DMA1_IT_GL4: DMA1 Channel4 global interrupt. - * @arg DMA1_IT_TC4: DMA1 Channel4 transfer complete interrupt. - * @arg DMA1_IT_HT4: DMA1 Channel4 half transfer interrupt. - * @arg DMA1_IT_TE4: DMA1 Channel4 transfer error interrupt. - * @arg DMA1_IT_GL5: DMA1 Channel5 global interrupt. - * @arg DMA1_IT_TC5: DMA1 Channel5 transfer complete interrupt. - * @arg DMA1_IT_HT5: DMA1 Channel5 half transfer interrupt. - * @arg DMA1_IT_TE5: DMA1 Channel5 transfer error interrupt. - * @arg DMA1_IT_GL6: DMA1 Channel6 global interrupt. - * @arg DMA1_IT_TC6: DMA1 Channel6 transfer complete interrupt. - * @arg DMA1_IT_HT6: DMA1 Channel6 half transfer interrupt. - * @arg DMA1_IT_TE6: DMA1 Channel6 transfer error interrupt. - * @arg DMA1_IT_GL7: DMA1 Channel7 global interrupt. - * @arg DMA1_IT_TC7: DMA1 Channel7 transfer complete interrupt. - * @arg DMA1_IT_HT7: DMA1 Channel7 half transfer interrupt. - * @arg DMA1_IT_TE7: DMA1 Channel7 transfer error interrupt. - * @arg DMA2_IT_GL1: DMA2 Channel1 global interrupt. - * @arg DMA2_IT_TC1: DMA2 Channel1 transfer complete interrupt. - * @arg DMA2_IT_HT1: DMA2 Channel1 half transfer interrupt. - * @arg DMA2_IT_TE1: DMA2 Channel1 transfer error interrupt. - * @arg DMA2_IT_GL2: DMA2 Channel2 global interrupt. - * @arg DMA2_IT_TC2: DMA2 Channel2 transfer complete interrupt. - * @arg DMA2_IT_HT2: DMA2 Channel2 half transfer interrupt. - * @arg DMA2_IT_TE2: DMA2 Channel2 transfer error interrupt. - * @arg DMA2_IT_GL3: DMA2 Channel3 global interrupt. - * @arg DMA2_IT_TC3: DMA2 Channel3 transfer complete interrupt. - * @arg DMA2_IT_HT3: DMA2 Channel3 half transfer interrupt. - * @arg DMA2_IT_TE3: DMA2 Channel3 transfer error interrupt. - * @arg DMA2_IT_GL4: DMA2 Channel4 global interrupt. - * @arg DMA2_IT_TC4: DMA2 Channel4 transfer complete interrupt. - * @arg DMA2_IT_HT4: DMA2 Channel4 half transfer interrupt. - * @arg DMA2_IT_TE4: DMA2 Channel4 transfer error interrupt. - * @arg DMA2_IT_GL5: DMA2 Channel5 global interrupt. - * @arg DMA2_IT_TC5: DMA2 Channel5 transfer complete interrupt. - * @arg DMA2_IT_HT5: DMA2 Channel5 half transfer interrupt. - * @arg DMA2_IT_TE5: DMA2 Channel5 transfer error interrupt. - * @retval None - */ -void DMA_ClearITPendingBit(uint32_t DMA_IT) -{ - /* Check the parameters */ - assert_param(IS_DMA_CLEAR_IT(DMA_IT)); - - /* Calculate the used DMA */ - if ((DMA_IT & FLAG_Mask) != (uint32_t)RESET) - { - /* Clear the selected DMA interrupt pending bits */ - DMA2->IFCR = DMA_IT; - } - else - { - /* Clear the selected DMA interrupt pending bits */ - DMA1->IFCR = DMA_IT; - } -} - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_exti.c b/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_exti.c deleted file mode 100644 index a79f575d68..0000000000 --- a/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_exti.c +++ /dev/null @@ -1,268 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f10x_exti.c - * @author MCD Application Team - * @version V3.2.0 - * @date 03/01/2010 - * @brief This file provides all the EXTI firmware functions. - ****************************************************************************** - * @copy - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2010 STMicroelectronics

- */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x_exti.h" - -/** @addtogroup STM32F10x_StdPeriph_Driver - * @{ - */ - -/** @defgroup EXTI - * @brief EXTI driver modules - * @{ - */ - -/** @defgroup EXTI_Private_TypesDefinitions - * @{ - */ - -/** - * @} - */ - -/** @defgroup EXTI_Private_Defines - * @{ - */ - -#define EXTI_LineNone ((uint32_t)0x00000) /* No interrupt selected */ - -/** - * @} - */ - -/** @defgroup EXTI_Private_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup EXTI_Private_Variables - * @{ - */ - -/** - * @} - */ - -/** @defgroup EXTI_Private_FunctionPrototypes - * @{ - */ - -/** - * @} - */ - -/** @defgroup EXTI_Private_Functions - * @{ - */ - -/** - * @brief Deinitializes the EXTI peripheral registers to their default reset values. - * @param None - * @retval None - */ -void EXTI_DeInit(void) -{ - EXTI->IMR = 0x00000000; - EXTI->EMR = 0x00000000; - EXTI->RTSR = 0x00000000; - EXTI->FTSR = 0x00000000; - EXTI->PR = 0x000FFFFF; -} - -/** - * @brief Initializes the EXTI peripheral according to the specified - * parameters in the EXTI_InitStruct. - * @param EXTI_InitStruct: pointer to a EXTI_InitTypeDef structure - * that contains the configuration information for the EXTI peripheral. - * @retval None - */ -void EXTI_Init(EXTI_InitTypeDef* EXTI_InitStruct) -{ - uint32_t tmp = 0; - - /* Check the parameters */ - assert_param(IS_EXTI_MODE(EXTI_InitStruct->EXTI_Mode)); - assert_param(IS_EXTI_TRIGGER(EXTI_InitStruct->EXTI_Trigger)); - assert_param(IS_EXTI_LINE(EXTI_InitStruct->EXTI_Line)); - assert_param(IS_FUNCTIONAL_STATE(EXTI_InitStruct->EXTI_LineCmd)); - - tmp = (uint32_t)EXTI_BASE; - - if (EXTI_InitStruct->EXTI_LineCmd != DISABLE) - { - /* Clear EXTI line configuration */ - EXTI->IMR &= ~EXTI_InitStruct->EXTI_Line; - EXTI->EMR &= ~EXTI_InitStruct->EXTI_Line; - - tmp += EXTI_InitStruct->EXTI_Mode; - - *(__IO uint32_t *) tmp |= EXTI_InitStruct->EXTI_Line; - - /* Clear Rising Falling edge configuration */ - EXTI->RTSR &= ~EXTI_InitStruct->EXTI_Line; - EXTI->FTSR &= ~EXTI_InitStruct->EXTI_Line; - - /* Select the trigger for the selected external interrupts */ - if (EXTI_InitStruct->EXTI_Trigger == EXTI_Trigger_Rising_Falling) - { - /* Rising Falling edge */ - EXTI->RTSR |= EXTI_InitStruct->EXTI_Line; - EXTI->FTSR |= EXTI_InitStruct->EXTI_Line; - } - else - { - tmp = (uint32_t)EXTI_BASE; - tmp += EXTI_InitStruct->EXTI_Trigger; - - *(__IO uint32_t *) tmp |= EXTI_InitStruct->EXTI_Line; - } - } - else - { - tmp += EXTI_InitStruct->EXTI_Mode; - - /* Disable the selected external lines */ - *(__IO uint32_t *) tmp &= ~EXTI_InitStruct->EXTI_Line; - } -} - -/** - * @brief Fills each EXTI_InitStruct member with its reset value. - * @param EXTI_InitStruct: pointer to a EXTI_InitTypeDef structure which will - * be initialized. - * @retval None - */ -void EXTI_StructInit(EXTI_InitTypeDef* EXTI_InitStruct) -{ - EXTI_InitStruct->EXTI_Line = EXTI_LineNone; - EXTI_InitStruct->EXTI_Mode = EXTI_Mode_Interrupt; - EXTI_InitStruct->EXTI_Trigger = EXTI_Trigger_Falling; - EXTI_InitStruct->EXTI_LineCmd = DISABLE; -} - -/** - * @brief Generates a Software interrupt. - * @param EXTI_Line: specifies the EXTI lines to be enabled or disabled. - * This parameter can be any combination of EXTI_Linex where x can be (0..19). - * @retval None - */ -void EXTI_GenerateSWInterrupt(uint32_t EXTI_Line) -{ - /* Check the parameters */ - assert_param(IS_EXTI_LINE(EXTI_Line)); - - EXTI->SWIER |= EXTI_Line; -} - -/** - * @brief Checks whether the specified EXTI line flag is set or not. - * @param EXTI_Line: specifies the EXTI line flag to check. - * This parameter can be: - * @arg EXTI_Linex: External interrupt line x where x(0..19) - * @retval The new state of EXTI_Line (SET or RESET). - */ -FlagStatus EXTI_GetFlagStatus(uint32_t EXTI_Line) -{ - FlagStatus bitstatus = RESET; - /* Check the parameters */ - assert_param(IS_GET_EXTI_LINE(EXTI_Line)); - - if ((EXTI->PR & EXTI_Line) != (uint32_t)RESET) - { - bitstatus = SET; - } - else - { - bitstatus = RESET; - } - return bitstatus; -} - -/** - * @brief Clears the EXTI’s line pending flags. - * @param EXTI_Line: specifies the EXTI lines flags to clear. - * This parameter can be any combination of EXTI_Linex where x can be (0..19). - * @retval None - */ -void EXTI_ClearFlag(uint32_t EXTI_Line) -{ - /* Check the parameters */ - assert_param(IS_EXTI_LINE(EXTI_Line)); - - EXTI->PR = EXTI_Line; -} - -/** - * @brief Checks whether the specified EXTI line is asserted or not. - * @param EXTI_Line: specifies the EXTI line to check. - * This parameter can be: - * @arg EXTI_Linex: External interrupt line x where x(0..19) - * @retval The new state of EXTI_Line (SET or RESET). - */ -ITStatus EXTI_GetITStatus(uint32_t EXTI_Line) -{ - ITStatus bitstatus = RESET; - uint32_t enablestatus = 0; - /* Check the parameters */ - assert_param(IS_GET_EXTI_LINE(EXTI_Line)); - - enablestatus = EXTI->IMR & EXTI_Line; - if (((EXTI->PR & EXTI_Line) != (uint32_t)RESET) && (enablestatus != (uint32_t)RESET)) - { - bitstatus = SET; - } - else - { - bitstatus = RESET; - } - return bitstatus; -} - -/** - * @brief Clears the EXTI’s line pending bits. - * @param EXTI_Line: specifies the EXTI lines to clear. - * This parameter can be any combination of EXTI_Linex where x can be (0..19). - * @retval None - */ -void EXTI_ClearITPendingBit(uint32_t EXTI_Line) -{ - /* Check the parameters */ - assert_param(IS_EXTI_LINE(EXTI_Line)); - - EXTI->PR = EXTI_Line; -} - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_flash.c b/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_flash.c deleted file mode 100644 index df2d494f42..0000000000 --- a/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_flash.c +++ /dev/null @@ -1,869 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f10x_flash.c - * @author MCD Application Team - * @version V3.2.0 - * @date 03/01/2010 - * @brief This file provides all the FLASH firmware functions. - ****************************************************************************** - * @copy - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2010 STMicroelectronics

- */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x_flash.h" - -/** @addtogroup STM32F10x_StdPeriph_Driver - * @{ - */ - -/** @defgroup FLASH - * @brief FLASH driver modules - * @{ - */ - -/** @defgroup FLASH_Private_TypesDefinitions - * @{ - */ - -/** - * @} - */ - -/** @defgroup FLASH_Private_Defines - * @{ - */ - -/* Flash Access Control Register bits */ -#define ACR_LATENCY_Mask ((uint32_t)0x00000038) -#define ACR_HLFCYA_Mask ((uint32_t)0xFFFFFFF7) -#define ACR_PRFTBE_Mask ((uint32_t)0xFFFFFFEF) - -/* Flash Access Control Register bits */ -#define ACR_PRFTBS_Mask ((uint32_t)0x00000020) - -/* Flash Control Register bits */ -#define CR_PG_Set ((uint32_t)0x00000001) -#define CR_PG_Reset ((uint32_t)0x00001FFE) -#define CR_PER_Set ((uint32_t)0x00000002) -#define CR_PER_Reset ((uint32_t)0x00001FFD) -#define CR_MER_Set ((uint32_t)0x00000004) -#define CR_MER_Reset ((uint32_t)0x00001FFB) -#define CR_OPTPG_Set ((uint32_t)0x00000010) -#define CR_OPTPG_Reset ((uint32_t)0x00001FEF) -#define CR_OPTER_Set ((uint32_t)0x00000020) -#define CR_OPTER_Reset ((uint32_t)0x00001FDF) -#define CR_STRT_Set ((uint32_t)0x00000040) -#define CR_LOCK_Set ((uint32_t)0x00000080) - -/* FLASH Mask */ -#define RDPRT_Mask ((uint32_t)0x00000002) -#define WRP0_Mask ((uint32_t)0x000000FF) -#define WRP1_Mask ((uint32_t)0x0000FF00) -#define WRP2_Mask ((uint32_t)0x00FF0000) -#define WRP3_Mask ((uint32_t)0xFF000000) - -/* FLASH Keys */ -#define RDP_Key ((uint16_t)0x00A5) -#define FLASH_KEY1 ((uint32_t)0x45670123) -#define FLASH_KEY2 ((uint32_t)0xCDEF89AB) - -/* Delay definition */ -#define EraseTimeout ((uint32_t)0x000B0000) -#define ProgramTimeout ((uint32_t)0x00002000) - -/** - * @} - */ - -/** @defgroup FLASH_Private_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup FLASH_Private_Variables - * @{ - */ - -/** - * @} - */ - -/** @defgroup FLASH_Private_FunctionPrototypes - * @{ - */ - -/** - * @} - */ - -/** @defgroup FLASH_Private_Functions - * @{ - */ - -/** - * @brief Sets the code latency value. - * @param FLASH_Latency: specifies the FLASH Latency value. - * This parameter can be one of the following values: - * @arg FLASH_Latency_0: FLASH Zero Latency cycle - * @arg FLASH_Latency_1: FLASH One Latency cycle - * @arg FLASH_Latency_2: FLASH Two Latency cycles - * @retval None - */ -void FLASH_SetLatency(uint32_t FLASH_Latency) -{ - uint32_t tmpreg = 0; - - /* Check the parameters */ - assert_param(IS_FLASH_LATENCY(FLASH_Latency)); - - /* Read the ACR register */ - tmpreg = FLASH->ACR; - - /* Sets the Latency value */ - tmpreg &= ACR_LATENCY_Mask; - tmpreg |= FLASH_Latency; - - /* Write the ACR register */ - FLASH->ACR = tmpreg; -} - -/** - * @brief Enables or disables the Half cycle flash access. - * @param FLASH_HalfCycleAccess: specifies the FLASH Half cycle Access mode. - * This parameter can be one of the following values: - * @arg FLASH_HalfCycleAccess_Enable: FLASH Half Cycle Enable - * @arg FLASH_HalfCycleAccess_Disable: FLASH Half Cycle Disable - * @retval None - */ -void FLASH_HalfCycleAccessCmd(uint32_t FLASH_HalfCycleAccess) -{ - /* Check the parameters */ - assert_param(IS_FLASH_HALFCYCLEACCESS_STATE(FLASH_HalfCycleAccess)); - - /* Enable or disable the Half cycle access */ - FLASH->ACR &= ACR_HLFCYA_Mask; - FLASH->ACR |= FLASH_HalfCycleAccess; -} - -/** - * @brief Enables or disables the Prefetch Buffer. - * @param FLASH_PrefetchBuffer: specifies the Prefetch buffer status. - * This parameter can be one of the following values: - * @arg FLASH_PrefetchBuffer_Enable: FLASH Prefetch Buffer Enable - * @arg FLASH_PrefetchBuffer_Disable: FLASH Prefetch Buffer Disable - * @retval None - */ -void FLASH_PrefetchBufferCmd(uint32_t FLASH_PrefetchBuffer) -{ - /* Check the parameters */ - assert_param(IS_FLASH_PREFETCHBUFFER_STATE(FLASH_PrefetchBuffer)); - - /* Enable or disable the Prefetch Buffer */ - FLASH->ACR &= ACR_PRFTBE_Mask; - FLASH->ACR |= FLASH_PrefetchBuffer; -} - -/** - * @brief Unlocks the FLASH Program Erase Controller. - * @param None - * @retval None - */ -void FLASH_Unlock(void) -{ - /* Authorize the FPEC Access */ - FLASH->KEYR = FLASH_KEY1; - FLASH->KEYR = FLASH_KEY2; -} - -/** - * @brief Locks the FLASH Program Erase Controller. - * @param None - * @retval None - */ -void FLASH_Lock(void) -{ - /* Set the Lock Bit to lock the FPEC and the FCR */ - FLASH->CR |= CR_LOCK_Set; -} - -/** - * @brief Erases a specified FLASH page. - * @param Page_Address: The page address to be erased. - * @retval FLASH Status: The returned value can be: FLASH_BUSY, FLASH_ERROR_PG, - * FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT. - */ -FLASH_Status FLASH_ErasePage(uint32_t Page_Address) -{ - FLASH_Status status = FLASH_COMPLETE; - /* Check the parameters */ - assert_param(IS_FLASH_ADDRESS(Page_Address)); - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastOperation(EraseTimeout); - - if(status == FLASH_COMPLETE) - { - /* if the previous operation is completed, proceed to erase the page */ - FLASH->CR|= CR_PER_Set; - FLASH->AR = Page_Address; - FLASH->CR|= CR_STRT_Set; - - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastOperation(EraseTimeout); - if(status != FLASH_TIMEOUT) - { - /* if the erase operation is completed, disable the PER Bit */ - FLASH->CR &= CR_PER_Reset; - } - } - /* Return the Erase Status */ - return status; -} - -/** - * @brief Erases all FLASH pages. - * @param None - * @retval FLASH Status: The returned value can be: FLASH_ERROR_PG, - * FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT. - */ -FLASH_Status FLASH_EraseAllPages(void) -{ - FLASH_Status status = FLASH_COMPLETE; - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastOperation(EraseTimeout); - - if(status == FLASH_COMPLETE) - { - /* if the previous operation is completed, proceed to erase all pages */ - FLASH->CR |= CR_MER_Set; - FLASH->CR |= CR_STRT_Set; - - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastOperation(EraseTimeout); - if(status != FLASH_TIMEOUT) - { - /* if the erase operation is completed, disable the MER Bit */ - FLASH->CR &= CR_MER_Reset; - } - } - /* Return the Erase Status */ - return status; -} - -/** - * @brief Erases the FLASH option bytes. - * @note This functions erases all option bytes except the Read protection - * (RDP). - * @param None - * @retval FLASH Status: The returned value can be: FLASH_ERROR_PG, - * FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT. - */ -FLASH_Status FLASH_EraseOptionBytes(void) -{ - uint16_t rdptmp = RDP_Key; - - FLASH_Status status = FLASH_COMPLETE; - - /* Get the actual read protection Option Byte value */ - if(FLASH_GetReadOutProtectionStatus() != RESET) - { - rdptmp = 0x00; - } - - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastOperation(EraseTimeout); - if(status == FLASH_COMPLETE) - { - /* Authorize the small information block programming */ - FLASH->OPTKEYR = FLASH_KEY1; - FLASH->OPTKEYR = FLASH_KEY2; - - /* if the previous operation is completed, proceed to erase the option bytes */ - FLASH->CR |= CR_OPTER_Set; - FLASH->CR |= CR_STRT_Set; - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastOperation(EraseTimeout); - - if(status == FLASH_COMPLETE) - { - /* if the erase operation is completed, disable the OPTER Bit */ - FLASH->CR &= CR_OPTER_Reset; - - /* Enable the Option Bytes Programming operation */ - FLASH->CR |= CR_OPTPG_Set; - /* Restore the last read protection Option Byte value */ - OB->RDP = (uint16_t)rdptmp; - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastOperation(ProgramTimeout); - - if(status != FLASH_TIMEOUT) - { - /* if the program operation is completed, disable the OPTPG Bit */ - FLASH->CR &= CR_OPTPG_Reset; - } - } - else - { - if (status != FLASH_TIMEOUT) - { - /* Disable the OPTPG Bit */ - FLASH->CR &= CR_OPTPG_Reset; - } - } - } - /* Return the erase status */ - return status; -} - -/** - * @brief Programs a word at a specified address. - * @param Address: specifies the address to be programmed. - * @param Data: specifies the data to be programmed. - * @retval FLASH Status: The returned value can be: FLASH_ERROR_PG, - * FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT. - */ -FLASH_Status FLASH_ProgramWord(uint32_t Address, uint32_t Data) -{ - FLASH_Status status = FLASH_COMPLETE; - __IO uint32_t tmp = 0; - - /* Check the parameters */ - assert_param(IS_FLASH_ADDRESS(Address)); - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastOperation(ProgramTimeout); - - if(status == FLASH_COMPLETE) - { - /* if the previous operation is completed, proceed to program the new first - half word */ - FLASH->CR |= CR_PG_Set; - - *(__IO uint16_t*)Address = (uint16_t)Data; - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastOperation(ProgramTimeout); - - if(status == FLASH_COMPLETE) - { - /* if the previous operation is completed, proceed to program the new second - half word */ - tmp = Address + 2; - - *(__IO uint16_t*) tmp = Data >> 16; - - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastOperation(ProgramTimeout); - - if(status != FLASH_TIMEOUT) - { - /* Disable the PG Bit */ - FLASH->CR &= CR_PG_Reset; - } - } - else - { - if (status != FLASH_TIMEOUT) - { - /* Disable the PG Bit */ - FLASH->CR &= CR_PG_Reset; - } - } - } - /* Return the Program Status */ - return status; -} - -/** - * @brief Programs a half word at a specified address. - * @param Address: specifies the address to be programmed. - * @param Data: specifies the data to be programmed. - * @retval FLASH Status: The returned value can be: FLASH_ERROR_PG, - * FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT. - */ -FLASH_Status FLASH_ProgramHalfWord(uint32_t Address, uint16_t Data) -{ - FLASH_Status status = FLASH_COMPLETE; - /* Check the parameters */ - assert_param(IS_FLASH_ADDRESS(Address)); - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastOperation(ProgramTimeout); - - if(status == FLASH_COMPLETE) - { - /* if the previous operation is completed, proceed to program the new data */ - FLASH->CR |= CR_PG_Set; - - *(__IO uint16_t*)Address = Data; - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastOperation(ProgramTimeout); - if(status != FLASH_TIMEOUT) - { - /* if the program operation is completed, disable the PG Bit */ - FLASH->CR &= CR_PG_Reset; - } - } - /* Return the Program Status */ - return status; -} - -/** - * @brief Programs a half word at a specified Option Byte Data address. - * @param Address: specifies the address to be programmed. - * This parameter can be 0x1FFFF804 or 0x1FFFF806. - * @param Data: specifies the data to be programmed. - * @retval FLASH Status: The returned value can be: FLASH_ERROR_PG, - * FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT. - */ -FLASH_Status FLASH_ProgramOptionByteData(uint32_t Address, uint8_t Data) -{ - FLASH_Status status = FLASH_COMPLETE; - /* Check the parameters */ - assert_param(IS_OB_DATA_ADDRESS(Address)); - status = FLASH_WaitForLastOperation(ProgramTimeout); - if(status == FLASH_COMPLETE) - { - /* Authorize the small information block programming */ - FLASH->OPTKEYR = FLASH_KEY1; - FLASH->OPTKEYR = FLASH_KEY2; - /* Enables the Option Bytes Programming operation */ - FLASH->CR |= CR_OPTPG_Set; - *(__IO uint16_t*)Address = Data; - - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastOperation(ProgramTimeout); - if(status != FLASH_TIMEOUT) - { - /* if the program operation is completed, disable the OPTPG Bit */ - FLASH->CR &= CR_OPTPG_Reset; - } - } - /* Return the Option Byte Data Program Status */ - return status; -} - -/** - * @brief Write protects the desired pages - * @param FLASH_Pages: specifies the address of the pages to be write protected. - * This parameter can be: - * @arg For @b STM32_Low-density_devices: value between FLASH_WRProt_Pages0to3 and FLASH_WRProt_Pages28to31 - * @arg For @b STM32_Medium-density_devices: value between FLASH_WRProt_Pages0to3 - * and FLASH_WRProt_Pages124to127 - * @arg For @b STM32_High-density_devices: value between FLASH_WRProt_Pages0to1 and - * FLASH_WRProt_Pages60to61 or FLASH_WRProt_Pages62to255 - * @arg For @b STM32_Connectivity_line_devices: value between FLASH_WRProt_Pages0to1 and - * FLASH_WRProt_Pages60to61 or FLASH_WRProt_Pages62to127 - * @arg FLASH_WRProt_AllPages - * @retval FLASH Status: The returned value can be: FLASH_ERROR_PG, - * FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT. - */ -FLASH_Status FLASH_EnableWriteProtection(uint32_t FLASH_Pages) -{ - uint16_t WRP0_Data = 0xFFFF, WRP1_Data = 0xFFFF, WRP2_Data = 0xFFFF, WRP3_Data = 0xFFFF; - - FLASH_Status status = FLASH_COMPLETE; - - /* Check the parameters */ - assert_param(IS_FLASH_WRPROT_PAGE(FLASH_Pages)); - - FLASH_Pages = (uint32_t)(~FLASH_Pages); - WRP0_Data = (uint16_t)(FLASH_Pages & WRP0_Mask); - WRP1_Data = (uint16_t)((FLASH_Pages & WRP1_Mask) >> 8); - WRP2_Data = (uint16_t)((FLASH_Pages & WRP2_Mask) >> 16); - WRP3_Data = (uint16_t)((FLASH_Pages & WRP3_Mask) >> 24); - - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastOperation(ProgramTimeout); - - if(status == FLASH_COMPLETE) - { - /* Authorizes the small information block programming */ - FLASH->OPTKEYR = FLASH_KEY1; - FLASH->OPTKEYR = FLASH_KEY2; - FLASH->CR |= CR_OPTPG_Set; - if(WRP0_Data != 0xFF) - { - OB->WRP0 = WRP0_Data; - - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastOperation(ProgramTimeout); - } - if((status == FLASH_COMPLETE) && (WRP1_Data != 0xFF)) - { - OB->WRP1 = WRP1_Data; - - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastOperation(ProgramTimeout); - } - if((status == FLASH_COMPLETE) && (WRP2_Data != 0xFF)) - { - OB->WRP2 = WRP2_Data; - - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastOperation(ProgramTimeout); - } - - if((status == FLASH_COMPLETE)&& (WRP3_Data != 0xFF)) - { - OB->WRP3 = WRP3_Data; - - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastOperation(ProgramTimeout); - } - - if(status != FLASH_TIMEOUT) - { - /* if the program operation is completed, disable the OPTPG Bit */ - FLASH->CR &= CR_OPTPG_Reset; - } - } - /* Return the write protection operation Status */ - return status; -} - -/** - * @brief Enables or disables the read out protection. - * @note If the user has already programmed the other option bytes before calling - * this function, he must re-program them since this function erases all option bytes. - * @param Newstate: new state of the ReadOut Protection. - * This parameter can be: ENABLE or DISABLE. - * @retval FLASH Status: The returned value can be: FLASH_ERROR_PG, - * FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT. - */ -FLASH_Status FLASH_ReadOutProtection(FunctionalState NewState) -{ - FLASH_Status status = FLASH_COMPLETE; - /* Check the parameters */ - assert_param(IS_FUNCTIONAL_STATE(NewState)); - status = FLASH_WaitForLastOperation(EraseTimeout); - if(status == FLASH_COMPLETE) - { - /* Authorizes the small information block programming */ - FLASH->OPTKEYR = FLASH_KEY1; - FLASH->OPTKEYR = FLASH_KEY2; - FLASH->CR |= CR_OPTER_Set; - FLASH->CR |= CR_STRT_Set; - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastOperation(EraseTimeout); - if(status == FLASH_COMPLETE) - { - /* if the erase operation is completed, disable the OPTER Bit */ - FLASH->CR &= CR_OPTER_Reset; - /* Enable the Option Bytes Programming operation */ - FLASH->CR |= CR_OPTPG_Set; - if(NewState != DISABLE) - { - OB->RDP = 0x00; - } - else - { - OB->RDP = RDP_Key; - } - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastOperation(EraseTimeout); - - if(status != FLASH_TIMEOUT) - { - /* if the program operation is completed, disable the OPTPG Bit */ - FLASH->CR &= CR_OPTPG_Reset; - } - } - else - { - if(status != FLASH_TIMEOUT) - { - /* Disable the OPTER Bit */ - FLASH->CR &= CR_OPTER_Reset; - } - } - } - /* Return the protection operation Status */ - return status; -} - -/** - * @brief Programs the FLASH User Option Byte: IWDG_SW / RST_STOP / RST_STDBY. - * @param OB_IWDG: Selects the IWDG mode - * This parameter can be one of the following values: - * @arg OB_IWDG_SW: Software IWDG selected - * @arg OB_IWDG_HW: Hardware IWDG selected - * @param OB_STOP: Reset event when entering STOP mode. - * This parameter can be one of the following values: - * @arg OB_STOP_NoRST: No reset generated when entering in STOP - * @arg OB_STOP_RST: Reset generated when entering in STOP - * @param OB_STDBY: Reset event when entering Standby mode. - * This parameter can be one of the following values: - * @arg OB_STDBY_NoRST: No reset generated when entering in STANDBY - * @arg OB_STDBY_RST: Reset generated when entering in STANDBY - * @retval FLASH Status: The returned value can be: FLASH_ERROR_PG, - * FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT. - */ -FLASH_Status FLASH_UserOptionByteConfig(uint16_t OB_IWDG, uint16_t OB_STOP, uint16_t OB_STDBY) -{ - FLASH_Status status = FLASH_COMPLETE; - - /* Check the parameters */ - assert_param(IS_OB_IWDG_SOURCE(OB_IWDG)); - assert_param(IS_OB_STOP_SOURCE(OB_STOP)); - assert_param(IS_OB_STDBY_SOURCE(OB_STDBY)); - - /* Authorize the small information block programming */ - FLASH->OPTKEYR = FLASH_KEY1; - FLASH->OPTKEYR = FLASH_KEY2; - - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastOperation(ProgramTimeout); - - if(status == FLASH_COMPLETE) - { - /* Enable the Option Bytes Programming operation */ - FLASH->CR |= CR_OPTPG_Set; - - OB->USER = OB_IWDG | (uint16_t)(OB_STOP | (uint16_t)(OB_STDBY | ((uint16_t)0xF8))); - - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastOperation(ProgramTimeout); - if(status != FLASH_TIMEOUT) - { - /* if the program operation is completed, disable the OPTPG Bit */ - FLASH->CR &= CR_OPTPG_Reset; - } - } - /* Return the Option Byte program Status */ - return status; -} - -/** - * @brief Returns the FLASH User Option Bytes values. - * @param None - * @retval The FLASH User Option Bytes values:IWDG_SW(Bit0), RST_STOP(Bit1) - * and RST_STDBY(Bit2). - */ -uint32_t FLASH_GetUserOptionByte(void) -{ - /* Return the User Option Byte */ - return (uint32_t)(FLASH->OBR >> 2); -} - -/** - * @brief Returns the FLASH Write Protection Option Bytes Register value. - * @param None - * @retval The FLASH Write Protection Option Bytes Register value - */ -uint32_t FLASH_GetWriteProtectionOptionByte(void) -{ - /* Return the Falsh write protection Register value */ - return (uint32_t)(FLASH->WRPR); -} - -/** - * @brief Checks whether the FLASH Read Out Protection Status is set or not. - * @param None - * @retval FLASH ReadOut Protection Status(SET or RESET) - */ -FlagStatus FLASH_GetReadOutProtectionStatus(void) -{ - FlagStatus readoutstatus = RESET; - if ((FLASH->OBR & RDPRT_Mask) != (uint32_t)RESET) - { - readoutstatus = SET; - } - else - { - readoutstatus = RESET; - } - return readoutstatus; -} - -/** - * @brief Checks whether the FLASH Prefetch Buffer status is set or not. - * @param None - * @retval FLASH Prefetch Buffer Status (SET or RESET). - */ -FlagStatus FLASH_GetPrefetchBufferStatus(void) -{ - FlagStatus bitstatus = RESET; - - if ((FLASH->ACR & ACR_PRFTBS_Mask) != (uint32_t)RESET) - { - bitstatus = SET; - } - else - { - bitstatus = RESET; - } - /* Return the new state of FLASH Prefetch Buffer Status (SET or RESET) */ - return bitstatus; -} - -/** - * @brief Enables or disables the specified FLASH interrupts. - * @param FLASH_IT: specifies the FLASH interrupt sources to be enabled or disabled. - * This parameter can be any combination of the following values: - * @arg FLASH_IT_ERROR: FLASH Error Interrupt - * @arg FLASH_IT_EOP: FLASH end of operation Interrupt - * @param NewState: new state of the specified Flash interrupts. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void FLASH_ITConfig(uint16_t FLASH_IT, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_FLASH_IT(FLASH_IT)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - if(NewState != DISABLE) - { - /* Enable the interrupt sources */ - FLASH->CR |= FLASH_IT; - } - else - { - /* Disable the interrupt sources */ - FLASH->CR &= ~(uint32_t)FLASH_IT; - } -} - -/** - * @brief Checks whether the specified FLASH flag is set or not. - * @param FLASH_FLAG: specifies the FLASH flag to check. - * This parameter can be one of the following values: - * @arg FLASH_FLAG_BSY: FLASH Busy flag - * @arg FLASH_FLAG_PGERR: FLASH Program error flag - * @arg FLASH_FLAG_WRPRTERR: FLASH Write protected error flag - * @arg FLASH_FLAG_EOP: FLASH End of Operation flag - * @arg FLASH_FLAG_OPTERR: FLASH Option Byte error flag - * @retval The new state of FLASH_FLAG (SET or RESET). - */ -FlagStatus FLASH_GetFlagStatus(uint16_t FLASH_FLAG) -{ - FlagStatus bitstatus = RESET; - /* Check the parameters */ - assert_param(IS_FLASH_GET_FLAG(FLASH_FLAG)) ; - if(FLASH_FLAG == FLASH_FLAG_OPTERR) - { - if((FLASH->OBR & FLASH_FLAG_OPTERR) != (uint32_t)RESET) - { - bitstatus = SET; - } - else - { - bitstatus = RESET; - } - } - else - { - if((FLASH->SR & FLASH_FLAG) != (uint32_t)RESET) - { - bitstatus = SET; - } - else - { - bitstatus = RESET; - } - } - /* Return the new state of FLASH_FLAG (SET or RESET) */ - return bitstatus; -} - -/** - * @brief Clears the FLASH’s pending flags. - * @param FLASH_FLAG: specifies the FLASH flags to clear. - * This parameter can be any combination of the following values: - * @arg FLASH_FLAG_PGERR: FLASH Program error flag - * @arg FLASH_FLAG_WRPRTERR: FLASH Write protected error flag - * @arg FLASH_FLAG_EOP: FLASH End of Operation flag - * @retval None - */ -void FLASH_ClearFlag(uint16_t FLASH_FLAG) -{ - /* Check the parameters */ - assert_param(IS_FLASH_CLEAR_FLAG(FLASH_FLAG)) ; - - /* Clear the flags */ - FLASH->SR = FLASH_FLAG; -} - -/** - * @brief Returns the FLASH Status. - * @param None - * @retval FLASH Status: The returned value can be: FLASH_BUSY, FLASH_ERROR_PG, - * FLASH_ERROR_WRP or FLASH_COMPLETE - */ -FLASH_Status FLASH_GetStatus(void) -{ - FLASH_Status flashstatus = FLASH_COMPLETE; - - if((FLASH->SR & FLASH_FLAG_BSY) == FLASH_FLAG_BSY) - { - flashstatus = FLASH_BUSY; - } - else - { - if((FLASH->SR & FLASH_FLAG_PGERR) != 0) - { - flashstatus = FLASH_ERROR_PG; - } - else - { - if((FLASH->SR & FLASH_FLAG_WRPRTERR) != 0 ) - { - flashstatus = FLASH_ERROR_WRP; - } - else - { - flashstatus = FLASH_COMPLETE; - } - } - } - /* Return the Flash Status */ - return flashstatus; -} - -/** - * @brief Waits for a Flash operation to complete or a TIMEOUT to occur. - * @param Timeout: FLASH progamming Timeout - * @retval FLASH Status: The returned value can be: FLASH_ERROR_PG, - * FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT. - */ -FLASH_Status FLASH_WaitForLastOperation(uint32_t Timeout) -{ - FLASH_Status status = FLASH_COMPLETE; - - /* Check for the Flash Status */ - status = FLASH_GetStatus(); - /* Wait for a Flash operation to complete or a TIMEOUT to occur */ - while((status == FLASH_BUSY) && (Timeout != 0x00)) - { - status = FLASH_GetStatus(); - Timeout--; - } - if(Timeout == 0x00 ) - { - status = FLASH_TIMEOUT; - } - /* Return the operation status */ - return status; -} - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_fsmc.c b/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_fsmc.c deleted file mode 100644 index e5736872ea..0000000000 --- a/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_fsmc.c +++ /dev/null @@ -1,858 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f10x_fsmc.c - * @author MCD Application Team - * @version V3.2.0 - * @date 03/01/2010 - * @brief This file provides all the FSMC firmware functions. - ****************************************************************************** - * @copy - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2010 STMicroelectronics

- */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x_fsmc.h" -#include "stm32f10x_rcc.h" - -/** @addtogroup STM32F10x_StdPeriph_Driver - * @{ - */ - -/** @defgroup FSMC - * @brief FSMC driver modules - * @{ - */ - -/** @defgroup FSMC_Private_TypesDefinitions - * @{ - */ -/** - * @} - */ - -/** @defgroup FSMC_Private_Defines - * @{ - */ - -/* --------------------- FSMC registers bit mask ---------------------------- */ - -/* FSMC BCRx Mask */ -#define BCR_MBKEN_Set ((uint32_t)0x00000001) -#define BCR_MBKEN_Reset ((uint32_t)0x000FFFFE) -#define BCR_FACCEN_Set ((uint32_t)0x00000040) - -/* FSMC PCRx Mask */ -#define PCR_PBKEN_Set ((uint32_t)0x00000004) -#define PCR_PBKEN_Reset ((uint32_t)0x000FFFFB) -#define PCR_ECCEN_Set ((uint32_t)0x00000040) -#define PCR_ECCEN_Reset ((uint32_t)0x000FFFBF) -#define PCR_MemoryType_NAND ((uint32_t)0x00000008) -/** - * @} - */ - -/** @defgroup FSMC_Private_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup FSMC_Private_Variables - * @{ - */ - -/** - * @} - */ - -/** @defgroup FSMC_Private_FunctionPrototypes - * @{ - */ - -/** - * @} - */ - -/** @defgroup FSMC_Private_Functions - * @{ - */ - -/** - * @brief Deinitializes the FSMC NOR/SRAM Banks registers to their default - * reset values. - * @param FSMC_Bank: specifies the FSMC Bank to be used - * This parameter can be one of the following values: - * @arg FSMC_Bank1_NORSRAM1: FSMC Bank1 NOR/SRAM1 - * @arg FSMC_Bank1_NORSRAM2: FSMC Bank1 NOR/SRAM2 - * @arg FSMC_Bank1_NORSRAM3: FSMC Bank1 NOR/SRAM3 - * @arg FSMC_Bank1_NORSRAM4: FSMC Bank1 NOR/SRAM4 - * @retval None - */ -void FSMC_NORSRAMDeInit(uint32_t FSMC_Bank) -{ - /* Check the parameter */ - assert_param(IS_FSMC_NORSRAM_BANK(FSMC_Bank)); - - /* FSMC_Bank1_NORSRAM1 */ - if(FSMC_Bank == FSMC_Bank1_NORSRAM1) - { - FSMC_Bank1->BTCR[FSMC_Bank] = 0x000030DB; - } - /* FSMC_Bank1_NORSRAM2, FSMC_Bank1_NORSRAM3 or FSMC_Bank1_NORSRAM4 */ - else - { - FSMC_Bank1->BTCR[FSMC_Bank] = 0x000030D2; - } - FSMC_Bank1->BTCR[FSMC_Bank + 1] = 0x0FFFFFFF; - FSMC_Bank1E->BWTR[FSMC_Bank] = 0x0FFFFFFF; -} - -/** - * @brief Deinitializes the FSMC NAND Banks registers to their default reset values. - * @param FSMC_Bank: specifies the FSMC Bank to be used - * This parameter can be one of the following values: - * @arg FSMC_Bank2_NAND: FSMC Bank2 NAND - * @arg FSMC_Bank3_NAND: FSMC Bank3 NAND - * @retval None - */ -void FSMC_NANDDeInit(uint32_t FSMC_Bank) -{ - /* Check the parameter */ - assert_param(IS_FSMC_NAND_BANK(FSMC_Bank)); - - if(FSMC_Bank == FSMC_Bank2_NAND) - { - /* Set the FSMC_Bank2 registers to their reset values */ - FSMC_Bank2->PCR2 = 0x00000018; - FSMC_Bank2->SR2 = 0x00000040; - FSMC_Bank2->PMEM2 = 0xFCFCFCFC; - FSMC_Bank2->PATT2 = 0xFCFCFCFC; - } - /* FSMC_Bank3_NAND */ - else - { - /* Set the FSMC_Bank3 registers to their reset values */ - FSMC_Bank3->PCR3 = 0x00000018; - FSMC_Bank3->SR3 = 0x00000040; - FSMC_Bank3->PMEM3 = 0xFCFCFCFC; - FSMC_Bank3->PATT3 = 0xFCFCFCFC; - } -} - -/** - * @brief Deinitializes the FSMC PCCARD Bank registers to their default reset values. - * @param None - * @retval None - */ -void FSMC_PCCARDDeInit(void) -{ - /* Set the FSMC_Bank4 registers to their reset values */ - FSMC_Bank4->PCR4 = 0x00000018; - FSMC_Bank4->SR4 = 0x00000000; - FSMC_Bank4->PMEM4 = 0xFCFCFCFC; - FSMC_Bank4->PATT4 = 0xFCFCFCFC; - FSMC_Bank4->PIO4 = 0xFCFCFCFC; -} - -/** - * @brief Initializes the FSMC NOR/SRAM Banks according to the specified - * parameters in the FSMC_NORSRAMInitStruct. - * @param FSMC_NORSRAMInitStruct : pointer to a FSMC_NORSRAMInitTypeDef - * structure that contains the configuration information for - * the FSMC NOR/SRAM specified Banks. - * @retval None - */ -void FSMC_NORSRAMInit(FSMC_NORSRAMInitTypeDef* FSMC_NORSRAMInitStruct) -{ - /* Check the parameters */ - assert_param(IS_FSMC_NORSRAM_BANK(FSMC_NORSRAMInitStruct->FSMC_Bank)); - assert_param(IS_FSMC_MUX(FSMC_NORSRAMInitStruct->FSMC_DataAddressMux)); - assert_param(IS_FSMC_MEMORY(FSMC_NORSRAMInitStruct->FSMC_MemoryType)); - assert_param(IS_FSMC_MEMORY_WIDTH(FSMC_NORSRAMInitStruct->FSMC_MemoryDataWidth)); - assert_param(IS_FSMC_BURSTMODE(FSMC_NORSRAMInitStruct->FSMC_BurstAccessMode)); - assert_param(IS_FSMC_WAIT_POLARITY(FSMC_NORSRAMInitStruct->FSMC_WaitSignalPolarity)); - assert_param(IS_FSMC_WRAP_MODE(FSMC_NORSRAMInitStruct->FSMC_WrapMode)); - assert_param(IS_FSMC_WAIT_SIGNAL_ACTIVE(FSMC_NORSRAMInitStruct->FSMC_WaitSignalActive)); - assert_param(IS_FSMC_WRITE_OPERATION(FSMC_NORSRAMInitStruct->FSMC_WriteOperation)); - assert_param(IS_FSMC_WAITE_SIGNAL(FSMC_NORSRAMInitStruct->FSMC_WaitSignal)); - assert_param(IS_FSMC_EXTENDED_MODE(FSMC_NORSRAMInitStruct->FSMC_ExtendedMode)); - assert_param(IS_FSMC_WRITE_BURST(FSMC_NORSRAMInitStruct->FSMC_WriteBurst)); - assert_param(IS_FSMC_ADDRESS_SETUP_TIME(FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_AddressSetupTime)); - assert_param(IS_FSMC_ADDRESS_HOLD_TIME(FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_AddressHoldTime)); - assert_param(IS_FSMC_DATASETUP_TIME(FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_DataSetupTime)); - assert_param(IS_FSMC_TURNAROUND_TIME(FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_BusTurnAroundDuration)); - assert_param(IS_FSMC_CLK_DIV(FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_CLKDivision)); - assert_param(IS_FSMC_DATA_LATENCY(FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_DataLatency)); - assert_param(IS_FSMC_ACCESS_MODE(FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_AccessMode)); - - /* Bank1 NOR/SRAM control register configuration */ - FSMC_Bank1->BTCR[FSMC_NORSRAMInitStruct->FSMC_Bank] = - (uint32_t)FSMC_NORSRAMInitStruct->FSMC_DataAddressMux | - FSMC_NORSRAMInitStruct->FSMC_MemoryType | - FSMC_NORSRAMInitStruct->FSMC_MemoryDataWidth | - FSMC_NORSRAMInitStruct->FSMC_BurstAccessMode | - FSMC_NORSRAMInitStruct->FSMC_WaitSignalPolarity | - FSMC_NORSRAMInitStruct->FSMC_WrapMode | - FSMC_NORSRAMInitStruct->FSMC_WaitSignalActive | - FSMC_NORSRAMInitStruct->FSMC_WriteOperation | - FSMC_NORSRAMInitStruct->FSMC_WaitSignal | - FSMC_NORSRAMInitStruct->FSMC_ExtendedMode | - FSMC_NORSRAMInitStruct->FSMC_WriteBurst; - if(FSMC_NORSRAMInitStruct->FSMC_MemoryType == FSMC_MemoryType_NOR) - { - FSMC_Bank1->BTCR[FSMC_NORSRAMInitStruct->FSMC_Bank] |= (uint32_t)BCR_FACCEN_Set; - } - /* Bank1 NOR/SRAM timing register configuration */ - FSMC_Bank1->BTCR[FSMC_NORSRAMInitStruct->FSMC_Bank+1] = - (uint32_t)FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_AddressSetupTime | - (FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_AddressHoldTime << 4) | - (FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_DataSetupTime << 8) | - (FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_BusTurnAroundDuration << 16) | - (FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_CLKDivision << 20) | - (FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_DataLatency << 24) | - FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_AccessMode; - - - /* Bank1 NOR/SRAM timing register for write configuration, if extended mode is used */ - if(FSMC_NORSRAMInitStruct->FSMC_ExtendedMode == FSMC_ExtendedMode_Enable) - { - assert_param(IS_FSMC_ADDRESS_SETUP_TIME(FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_AddressSetupTime)); - assert_param(IS_FSMC_ADDRESS_HOLD_TIME(FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_AddressHoldTime)); - assert_param(IS_FSMC_DATASETUP_TIME(FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_DataSetupTime)); - assert_param(IS_FSMC_CLK_DIV(FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_CLKDivision)); - assert_param(IS_FSMC_DATA_LATENCY(FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_DataLatency)); - assert_param(IS_FSMC_ACCESS_MODE(FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_AccessMode)); - FSMC_Bank1E->BWTR[FSMC_NORSRAMInitStruct->FSMC_Bank] = - (uint32_t)FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_AddressSetupTime | - (FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_AddressHoldTime << 4 )| - (FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_DataSetupTime << 8) | - (FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_CLKDivision << 20) | - (FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_DataLatency << 24) | - FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_AccessMode; - } - else - { - FSMC_Bank1E->BWTR[FSMC_NORSRAMInitStruct->FSMC_Bank] = 0x0FFFFFFF; - } -} - -/** - * @brief Initializes the FSMC NAND Banks according to the specified - * parameters in the FSMC_NANDInitStruct. - * @param FSMC_NANDInitStruct : pointer to a FSMC_NANDInitTypeDef - * structure that contains the configuration information for the FSMC NAND specified Banks. - * @retval None - */ -void FSMC_NANDInit(FSMC_NANDInitTypeDef* FSMC_NANDInitStruct) -{ - uint32_t tmppcr = 0x00000000, tmppmem = 0x00000000, tmppatt = 0x00000000; - - /* Check the parameters */ - assert_param( IS_FSMC_NAND_BANK(FSMC_NANDInitStruct->FSMC_Bank)); - assert_param( IS_FSMC_WAIT_FEATURE(FSMC_NANDInitStruct->FSMC_Waitfeature)); - assert_param( IS_FSMC_MEMORY_WIDTH(FSMC_NANDInitStruct->FSMC_MemoryDataWidth)); - assert_param( IS_FSMC_ECC_STATE(FSMC_NANDInitStruct->FSMC_ECC)); - assert_param( IS_FSMC_ECCPAGE_SIZE(FSMC_NANDInitStruct->FSMC_ECCPageSize)); - assert_param( IS_FSMC_TCLR_TIME(FSMC_NANDInitStruct->FSMC_TCLRSetupTime)); - assert_param( IS_FSMC_TAR_TIME(FSMC_NANDInitStruct->FSMC_TARSetupTime)); - assert_param(IS_FSMC_SETUP_TIME(FSMC_NANDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_SetupTime)); - assert_param(IS_FSMC_WAIT_TIME(FSMC_NANDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_WaitSetupTime)); - assert_param(IS_FSMC_HOLD_TIME(FSMC_NANDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_HoldSetupTime)); - assert_param(IS_FSMC_HIZ_TIME(FSMC_NANDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_HiZSetupTime)); - assert_param(IS_FSMC_SETUP_TIME(FSMC_NANDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_SetupTime)); - assert_param(IS_FSMC_WAIT_TIME(FSMC_NANDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_WaitSetupTime)); - assert_param(IS_FSMC_HOLD_TIME(FSMC_NANDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_HoldSetupTime)); - assert_param(IS_FSMC_HIZ_TIME(FSMC_NANDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_HiZSetupTime)); - - /* Set the tmppcr value according to FSMC_NANDInitStruct parameters */ - tmppcr = (uint32_t)FSMC_NANDInitStruct->FSMC_Waitfeature | - PCR_MemoryType_NAND | - FSMC_NANDInitStruct->FSMC_MemoryDataWidth | - FSMC_NANDInitStruct->FSMC_ECC | - FSMC_NANDInitStruct->FSMC_ECCPageSize | - (FSMC_NANDInitStruct->FSMC_TCLRSetupTime << 9 )| - (FSMC_NANDInitStruct->FSMC_TARSetupTime << 13); - - /* Set tmppmem value according to FSMC_CommonSpaceTimingStructure parameters */ - tmppmem = (uint32_t)FSMC_NANDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_SetupTime | - (FSMC_NANDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_WaitSetupTime << 8) | - (FSMC_NANDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_HoldSetupTime << 16)| - (FSMC_NANDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_HiZSetupTime << 24); - - /* Set tmppatt value according to FSMC_AttributeSpaceTimingStructure parameters */ - tmppatt = (uint32_t)FSMC_NANDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_SetupTime | - (FSMC_NANDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_WaitSetupTime << 8) | - (FSMC_NANDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_HoldSetupTime << 16)| - (FSMC_NANDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_HiZSetupTime << 24); - - if(FSMC_NANDInitStruct->FSMC_Bank == FSMC_Bank2_NAND) - { - /* FSMC_Bank2_NAND registers configuration */ - FSMC_Bank2->PCR2 = tmppcr; - FSMC_Bank2->PMEM2 = tmppmem; - FSMC_Bank2->PATT2 = tmppatt; - } - else - { - /* FSMC_Bank3_NAND registers configuration */ - FSMC_Bank3->PCR3 = tmppcr; - FSMC_Bank3->PMEM3 = tmppmem; - FSMC_Bank3->PATT3 = tmppatt; - } -} - -/** - * @brief Initializes the FSMC PCCARD Bank according to the specified - * parameters in the FSMC_PCCARDInitStruct. - * @param FSMC_PCCARDInitStruct : pointer to a FSMC_PCCARDInitTypeDef - * structure that contains the configuration information for the FSMC PCCARD Bank. - * @retval None - */ -void FSMC_PCCARDInit(FSMC_PCCARDInitTypeDef* FSMC_PCCARDInitStruct) -{ - /* Check the parameters */ - assert_param(IS_FSMC_WAIT_FEATURE(FSMC_PCCARDInitStruct->FSMC_Waitfeature)); - assert_param(IS_FSMC_TCLR_TIME(FSMC_PCCARDInitStruct->FSMC_TCLRSetupTime)); - assert_param(IS_FSMC_TAR_TIME(FSMC_PCCARDInitStruct->FSMC_TARSetupTime)); - - assert_param(IS_FSMC_SETUP_TIME(FSMC_PCCARDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_SetupTime)); - assert_param(IS_FSMC_WAIT_TIME(FSMC_PCCARDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_WaitSetupTime)); - assert_param(IS_FSMC_HOLD_TIME(FSMC_PCCARDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_HoldSetupTime)); - assert_param(IS_FSMC_HIZ_TIME(FSMC_PCCARDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_HiZSetupTime)); - - assert_param(IS_FSMC_SETUP_TIME(FSMC_PCCARDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_SetupTime)); - assert_param(IS_FSMC_WAIT_TIME(FSMC_PCCARDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_WaitSetupTime)); - assert_param(IS_FSMC_HOLD_TIME(FSMC_PCCARDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_HoldSetupTime)); - assert_param(IS_FSMC_HIZ_TIME(FSMC_PCCARDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_HiZSetupTime)); - assert_param(IS_FSMC_SETUP_TIME(FSMC_PCCARDInitStruct->FSMC_IOSpaceTimingStruct->FSMC_SetupTime)); - assert_param(IS_FSMC_WAIT_TIME(FSMC_PCCARDInitStruct->FSMC_IOSpaceTimingStruct->FSMC_WaitSetupTime)); - assert_param(IS_FSMC_HOLD_TIME(FSMC_PCCARDInitStruct->FSMC_IOSpaceTimingStruct->FSMC_HoldSetupTime)); - assert_param(IS_FSMC_HIZ_TIME(FSMC_PCCARDInitStruct->FSMC_IOSpaceTimingStruct->FSMC_HiZSetupTime)); - - /* Set the PCR4 register value according to FSMC_PCCARDInitStruct parameters */ - FSMC_Bank4->PCR4 = (uint32_t)FSMC_PCCARDInitStruct->FSMC_Waitfeature | - FSMC_MemoryDataWidth_16b | - (FSMC_PCCARDInitStruct->FSMC_TCLRSetupTime << 9) | - (FSMC_PCCARDInitStruct->FSMC_TARSetupTime << 13); - - /* Set PMEM4 register value according to FSMC_CommonSpaceTimingStructure parameters */ - FSMC_Bank4->PMEM4 = (uint32_t)FSMC_PCCARDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_SetupTime | - (FSMC_PCCARDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_WaitSetupTime << 8) | - (FSMC_PCCARDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_HoldSetupTime << 16)| - (FSMC_PCCARDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_HiZSetupTime << 24); - - /* Set PATT4 register value according to FSMC_AttributeSpaceTimingStructure parameters */ - FSMC_Bank4->PATT4 = (uint32_t)FSMC_PCCARDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_SetupTime | - (FSMC_PCCARDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_WaitSetupTime << 8) | - (FSMC_PCCARDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_HoldSetupTime << 16)| - (FSMC_PCCARDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_HiZSetupTime << 24); - - /* Set PIO4 register value according to FSMC_IOSpaceTimingStructure parameters */ - FSMC_Bank4->PIO4 = (uint32_t)FSMC_PCCARDInitStruct->FSMC_IOSpaceTimingStruct->FSMC_SetupTime | - (FSMC_PCCARDInitStruct->FSMC_IOSpaceTimingStruct->FSMC_WaitSetupTime << 8) | - (FSMC_PCCARDInitStruct->FSMC_IOSpaceTimingStruct->FSMC_HoldSetupTime << 16)| - (FSMC_PCCARDInitStruct->FSMC_IOSpaceTimingStruct->FSMC_HiZSetupTime << 24); -} - -/** - * @brief Fills each FSMC_NORSRAMInitStruct member with its default value. - * @param FSMC_NORSRAMInitStruct: pointer to a FSMC_NORSRAMInitTypeDef - * structure which will be initialized. - * @retval None - */ -void FSMC_NORSRAMStructInit(FSMC_NORSRAMInitTypeDef* FSMC_NORSRAMInitStruct) -{ - /* Reset NOR/SRAM Init structure parameters values */ - FSMC_NORSRAMInitStruct->FSMC_Bank = FSMC_Bank1_NORSRAM1; - FSMC_NORSRAMInitStruct->FSMC_DataAddressMux = FSMC_DataAddressMux_Enable; - FSMC_NORSRAMInitStruct->FSMC_MemoryType = FSMC_MemoryType_SRAM; - FSMC_NORSRAMInitStruct->FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_8b; - FSMC_NORSRAMInitStruct->FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable; - FSMC_NORSRAMInitStruct->FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low; - FSMC_NORSRAMInitStruct->FSMC_WrapMode = FSMC_WrapMode_Disable; - FSMC_NORSRAMInitStruct->FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState; - FSMC_NORSRAMInitStruct->FSMC_WriteOperation = FSMC_WriteOperation_Enable; - FSMC_NORSRAMInitStruct->FSMC_WaitSignal = FSMC_WaitSignal_Enable; - FSMC_NORSRAMInitStruct->FSMC_ExtendedMode = FSMC_ExtendedMode_Disable; - FSMC_NORSRAMInitStruct->FSMC_WriteBurst = FSMC_WriteBurst_Disable; - FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_AddressSetupTime = 0xF; - FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_AddressHoldTime = 0xF; - FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_DataSetupTime = 0xFF; - FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_BusTurnAroundDuration = 0xF; - FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_CLKDivision = 0xF; - FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_DataLatency = 0xF; - FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_AccessMode = FSMC_AccessMode_A; - FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_AddressSetupTime = 0xF; - FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_AddressHoldTime = 0xF; - FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_DataSetupTime = 0xFF; - FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_BusTurnAroundDuration = 0xF; - FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_CLKDivision = 0xF; - FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_DataLatency = 0xF; - FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_AccessMode = FSMC_AccessMode_A; -} - -/** - * @brief Fills each FSMC_NANDInitStruct member with its default value. - * @param FSMC_NANDInitStruct: pointer to a FSMC_NANDInitTypeDef - * structure which will be initialized. - * @retval None - */ -void FSMC_NANDStructInit(FSMC_NANDInitTypeDef* FSMC_NANDInitStruct) -{ - /* Reset NAND Init structure parameters values */ - FSMC_NANDInitStruct->FSMC_Bank = FSMC_Bank2_NAND; - FSMC_NANDInitStruct->FSMC_Waitfeature = FSMC_Waitfeature_Disable; - FSMC_NANDInitStruct->FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_8b; - FSMC_NANDInitStruct->FSMC_ECC = FSMC_ECC_Disable; - FSMC_NANDInitStruct->FSMC_ECCPageSize = FSMC_ECCPageSize_256Bytes; - FSMC_NANDInitStruct->FSMC_TCLRSetupTime = 0x0; - FSMC_NANDInitStruct->FSMC_TARSetupTime = 0x0; - FSMC_NANDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_SetupTime = 0xFC; - FSMC_NANDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_WaitSetupTime = 0xFC; - FSMC_NANDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_HoldSetupTime = 0xFC; - FSMC_NANDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_HiZSetupTime = 0xFC; - FSMC_NANDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_SetupTime = 0xFC; - FSMC_NANDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_WaitSetupTime = 0xFC; - FSMC_NANDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_HoldSetupTime = 0xFC; - FSMC_NANDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_HiZSetupTime = 0xFC; -} - -/** - * @brief Fills each FSMC_PCCARDInitStruct member with its default value. - * @param FSMC_PCCARDInitStruct: pointer to a FSMC_PCCARDInitTypeDef - * structure which will be initialized. - * @retval None - */ -void FSMC_PCCARDStructInit(FSMC_PCCARDInitTypeDef* FSMC_PCCARDInitStruct) -{ - /* Reset PCCARD Init structure parameters values */ - FSMC_PCCARDInitStruct->FSMC_Waitfeature = FSMC_Waitfeature_Disable; - FSMC_PCCARDInitStruct->FSMC_TCLRSetupTime = 0x0; - FSMC_PCCARDInitStruct->FSMC_TARSetupTime = 0x0; - FSMC_PCCARDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_SetupTime = 0xFC; - FSMC_PCCARDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_WaitSetupTime = 0xFC; - FSMC_PCCARDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_HoldSetupTime = 0xFC; - FSMC_PCCARDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_HiZSetupTime = 0xFC; - FSMC_PCCARDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_SetupTime = 0xFC; - FSMC_PCCARDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_WaitSetupTime = 0xFC; - FSMC_PCCARDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_HoldSetupTime = 0xFC; - FSMC_PCCARDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_HiZSetupTime = 0xFC; - FSMC_PCCARDInitStruct->FSMC_IOSpaceTimingStruct->FSMC_SetupTime = 0xFC; - FSMC_PCCARDInitStruct->FSMC_IOSpaceTimingStruct->FSMC_WaitSetupTime = 0xFC; - FSMC_PCCARDInitStruct->FSMC_IOSpaceTimingStruct->FSMC_HoldSetupTime = 0xFC; - FSMC_PCCARDInitStruct->FSMC_IOSpaceTimingStruct->FSMC_HiZSetupTime = 0xFC; -} - -/** - * @brief Enables or disables the specified NOR/SRAM Memory Bank. - * @param FSMC_Bank: specifies the FSMC Bank to be used - * This parameter can be one of the following values: - * @arg FSMC_Bank1_NORSRAM1: FSMC Bank1 NOR/SRAM1 - * @arg FSMC_Bank1_NORSRAM2: FSMC Bank1 NOR/SRAM2 - * @arg FSMC_Bank1_NORSRAM3: FSMC Bank1 NOR/SRAM3 - * @arg FSMC_Bank1_NORSRAM4: FSMC Bank1 NOR/SRAM4 - * @param NewState: new state of the FSMC_Bank. This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void FSMC_NORSRAMCmd(uint32_t FSMC_Bank, FunctionalState NewState) -{ - assert_param(IS_FSMC_NORSRAM_BANK(FSMC_Bank)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - - if (NewState != DISABLE) - { - /* Enable the selected NOR/SRAM Bank by setting the PBKEN bit in the BCRx register */ - FSMC_Bank1->BTCR[FSMC_Bank] |= BCR_MBKEN_Set; - } - else - { - /* Disable the selected NOR/SRAM Bank by clearing the PBKEN bit in the BCRx register */ - FSMC_Bank1->BTCR[FSMC_Bank] &= BCR_MBKEN_Reset; - } -} - -/** - * @brief Enables or disables the specified NAND Memory Bank. - * @param FSMC_Bank: specifies the FSMC Bank to be used - * This parameter can be one of the following values: - * @arg FSMC_Bank2_NAND: FSMC Bank2 NAND - * @arg FSMC_Bank3_NAND: FSMC Bank3 NAND - * @param NewState: new state of the FSMC_Bank. This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void FSMC_NANDCmd(uint32_t FSMC_Bank, FunctionalState NewState) -{ - assert_param(IS_FSMC_NAND_BANK(FSMC_Bank)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - - if (NewState != DISABLE) - { - /* Enable the selected NAND Bank by setting the PBKEN bit in the PCRx register */ - if(FSMC_Bank == FSMC_Bank2_NAND) - { - FSMC_Bank2->PCR2 |= PCR_PBKEN_Set; - } - else - { - FSMC_Bank3->PCR3 |= PCR_PBKEN_Set; - } - } - else - { - /* Disable the selected NAND Bank by clearing the PBKEN bit in the PCRx register */ - if(FSMC_Bank == FSMC_Bank2_NAND) - { - FSMC_Bank2->PCR2 &= PCR_PBKEN_Reset; - } - else - { - FSMC_Bank3->PCR3 &= PCR_PBKEN_Reset; - } - } -} - -/** - * @brief Enables or disables the PCCARD Memory Bank. - * @param NewState: new state of the PCCARD Memory Bank. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void FSMC_PCCARDCmd(FunctionalState NewState) -{ - assert_param(IS_FUNCTIONAL_STATE(NewState)); - - if (NewState != DISABLE) - { - /* Enable the PCCARD Bank by setting the PBKEN bit in the PCR4 register */ - FSMC_Bank4->PCR4 |= PCR_PBKEN_Set; - } - else - { - /* Disable the PCCARD Bank by clearing the PBKEN bit in the PCR4 register */ - FSMC_Bank4->PCR4 &= PCR_PBKEN_Reset; - } -} - -/** - * @brief Enables or disables the FSMC NAND ECC feature. - * @param FSMC_Bank: specifies the FSMC Bank to be used - * This parameter can be one of the following values: - * @arg FSMC_Bank2_NAND: FSMC Bank2 NAND - * @arg FSMC_Bank3_NAND: FSMC Bank3 NAND - * @param NewState: new state of the FSMC NAND ECC feature. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void FSMC_NANDECCCmd(uint32_t FSMC_Bank, FunctionalState NewState) -{ - assert_param(IS_FSMC_NAND_BANK(FSMC_Bank)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - - if (NewState != DISABLE) - { - /* Enable the selected NAND Bank ECC function by setting the ECCEN bit in the PCRx register */ - if(FSMC_Bank == FSMC_Bank2_NAND) - { - FSMC_Bank2->PCR2 |= PCR_ECCEN_Set; - } - else - { - FSMC_Bank3->PCR3 |= PCR_ECCEN_Set; - } - } - else - { - /* Disable the selected NAND Bank ECC function by clearing the ECCEN bit in the PCRx register */ - if(FSMC_Bank == FSMC_Bank2_NAND) - { - FSMC_Bank2->PCR2 &= PCR_ECCEN_Reset; - } - else - { - FSMC_Bank3->PCR3 &= PCR_ECCEN_Reset; - } - } -} - -/** - * @brief Returns the error correction code register value. - * @param FSMC_Bank: specifies the FSMC Bank to be used - * This parameter can be one of the following values: - * @arg FSMC_Bank2_NAND: FSMC Bank2 NAND - * @arg FSMC_Bank3_NAND: FSMC Bank3 NAND - * @retval The Error Correction Code (ECC) value. - */ -uint32_t FSMC_GetECC(uint32_t FSMC_Bank) -{ - uint32_t eccval = 0x00000000; - - if(FSMC_Bank == FSMC_Bank2_NAND) - { - /* Get the ECCR2 register value */ - eccval = FSMC_Bank2->ECCR2; - } - else - { - /* Get the ECCR3 register value */ - eccval = FSMC_Bank3->ECCR3; - } - /* Return the error correction code value */ - return(eccval); -} - -/** - * @brief Enables or disables the specified FSMC interrupts. - * @param FSMC_Bank: specifies the FSMC Bank to be used - * This parameter can be one of the following values: - * @arg FSMC_Bank2_NAND: FSMC Bank2 NAND - * @arg FSMC_Bank3_NAND: FSMC Bank3 NAND - * @arg FSMC_Bank4_PCCARD: FSMC Bank4 PCCARD - * @param FSMC_IT: specifies the FSMC interrupt sources to be enabled or disabled. - * This parameter can be any combination of the following values: - * @arg FSMC_IT_RisingEdge: Rising edge detection interrupt. - * @arg FSMC_IT_Level: Level edge detection interrupt. - * @arg FSMC_IT_FallingEdge: Falling edge detection interrupt. - * @param NewState: new state of the specified FSMC interrupts. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void FSMC_ITConfig(uint32_t FSMC_Bank, uint32_t FSMC_IT, FunctionalState NewState) -{ - assert_param(IS_FSMC_IT_BANK(FSMC_Bank)); - assert_param(IS_FSMC_IT(FSMC_IT)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - - if (NewState != DISABLE) - { - /* Enable the selected FSMC_Bank2 interrupts */ - if(FSMC_Bank == FSMC_Bank2_NAND) - { - FSMC_Bank2->SR2 |= FSMC_IT; - } - /* Enable the selected FSMC_Bank3 interrupts */ - else if (FSMC_Bank == FSMC_Bank3_NAND) - { - FSMC_Bank3->SR3 |= FSMC_IT; - } - /* Enable the selected FSMC_Bank4 interrupts */ - else - { - FSMC_Bank4->SR4 |= FSMC_IT; - } - } - else - { - /* Disable the selected FSMC_Bank2 interrupts */ - if(FSMC_Bank == FSMC_Bank2_NAND) - { - - FSMC_Bank2->SR2 &= (uint32_t)~FSMC_IT; - } - /* Disable the selected FSMC_Bank3 interrupts */ - else if (FSMC_Bank == FSMC_Bank3_NAND) - { - FSMC_Bank3->SR3 &= (uint32_t)~FSMC_IT; - } - /* Disable the selected FSMC_Bank4 interrupts */ - else - { - FSMC_Bank4->SR4 &= (uint32_t)~FSMC_IT; - } - } -} - -/** - * @brief Checks whether the specified FSMC flag is set or not. - * @param FSMC_Bank: specifies the FSMC Bank to be used - * This parameter can be one of the following values: - * @arg FSMC_Bank2_NAND: FSMC Bank2 NAND - * @arg FSMC_Bank3_NAND: FSMC Bank3 NAND - * @arg FSMC_Bank4_PCCARD: FSMC Bank4 PCCARD - * @param FSMC_FLAG: specifies the flag to check. - * This parameter can be one of the following values: - * @arg FSMC_FLAG_RisingEdge: Rising egde detection Flag. - * @arg FSMC_FLAG_Level: Level detection Flag. - * @arg FSMC_FLAG_FallingEdge: Falling egde detection Flag. - * @arg FSMC_FLAG_FEMPT: Fifo empty Flag. - * @retval The new state of FSMC_FLAG (SET or RESET). - */ -FlagStatus FSMC_GetFlagStatus(uint32_t FSMC_Bank, uint32_t FSMC_FLAG) -{ - FlagStatus bitstatus = RESET; - uint32_t tmpsr = 0x00000000; - - /* Check the parameters */ - assert_param(IS_FSMC_GETFLAG_BANK(FSMC_Bank)); - assert_param(IS_FSMC_GET_FLAG(FSMC_FLAG)); - - if(FSMC_Bank == FSMC_Bank2_NAND) - { - tmpsr = FSMC_Bank2->SR2; - } - else if(FSMC_Bank == FSMC_Bank3_NAND) - { - tmpsr = FSMC_Bank3->SR3; - } - /* FSMC_Bank4_PCCARD*/ - else - { - tmpsr = FSMC_Bank4->SR4; - } - - /* Get the flag status */ - if ((tmpsr & FSMC_FLAG) != (uint16_t)RESET ) - { - bitstatus = SET; - } - else - { - bitstatus = RESET; - } - /* Return the flag status */ - return bitstatus; -} - -/** - * @brief Clears the FSMC’s pending flags. - * @param FSMC_Bank: specifies the FSMC Bank to be used - * This parameter can be one of the following values: - * @arg FSMC_Bank2_NAND: FSMC Bank2 NAND - * @arg FSMC_Bank3_NAND: FSMC Bank3 NAND - * @arg FSMC_Bank4_PCCARD: FSMC Bank4 PCCARD - * @param FSMC_FLAG: specifies the flag to clear. - * This parameter can be any combination of the following values: - * @arg FSMC_FLAG_RisingEdge: Rising egde detection Flag. - * @arg FSMC_FLAG_Level: Level detection Flag. - * @arg FSMC_FLAG_FallingEdge: Falling egde detection Flag. - * @retval None - */ -void FSMC_ClearFlag(uint32_t FSMC_Bank, uint32_t FSMC_FLAG) -{ - /* Check the parameters */ - assert_param(IS_FSMC_GETFLAG_BANK(FSMC_Bank)); - assert_param(IS_FSMC_CLEAR_FLAG(FSMC_FLAG)) ; - - if(FSMC_Bank == FSMC_Bank2_NAND) - { - FSMC_Bank2->SR2 &= ~FSMC_FLAG; - } - else if(FSMC_Bank == FSMC_Bank3_NAND) - { - FSMC_Bank3->SR3 &= ~FSMC_FLAG; - } - /* FSMC_Bank4_PCCARD*/ - else - { - FSMC_Bank4->SR4 &= ~FSMC_FLAG; - } -} - -/** - * @brief Checks whether the specified FSMC interrupt has occurred or not. - * @param FSMC_Bank: specifies the FSMC Bank to be used - * This parameter can be one of the following values: - * @arg FSMC_Bank2_NAND: FSMC Bank2 NAND - * @arg FSMC_Bank3_NAND: FSMC Bank3 NAND - * @arg FSMC_Bank4_PCCARD: FSMC Bank4 PCCARD - * @param FSMC_IT: specifies the FSMC interrupt source to check. - * This parameter can be one of the following values: - * @arg FSMC_IT_RisingEdge: Rising edge detection interrupt. - * @arg FSMC_IT_Level: Level edge detection interrupt. - * @arg FSMC_IT_FallingEdge: Falling edge detection interrupt. - * @retval The new state of FSMC_IT (SET or RESET). - */ -ITStatus FSMC_GetITStatus(uint32_t FSMC_Bank, uint32_t FSMC_IT) -{ - ITStatus bitstatus = RESET; - uint32_t tmpsr = 0x0, itstatus = 0x0, itenable = 0x0; - - /* Check the parameters */ - assert_param(IS_FSMC_IT_BANK(FSMC_Bank)); - assert_param(IS_FSMC_GET_IT(FSMC_IT)); - - if(FSMC_Bank == FSMC_Bank2_NAND) - { - tmpsr = FSMC_Bank2->SR2; - } - else if(FSMC_Bank == FSMC_Bank3_NAND) - { - tmpsr = FSMC_Bank3->SR3; - } - /* FSMC_Bank4_PCCARD*/ - else - { - tmpsr = FSMC_Bank4->SR4; - } - - itstatus = tmpsr & FSMC_IT; - - itenable = tmpsr & (FSMC_IT >> 3); - if ((itstatus != (uint32_t)RESET) && (itenable != (uint32_t)RESET)) - { - bitstatus = SET; - } - else - { - bitstatus = RESET; - } - return bitstatus; -} - -/** - * @brief Clears the FSMC’s interrupt pending bits. - * @param FSMC_Bank: specifies the FSMC Bank to be used - * This parameter can be one of the following values: - * @arg FSMC_Bank2_NAND: FSMC Bank2 NAND - * @arg FSMC_Bank3_NAND: FSMC Bank3 NAND - * @arg FSMC_Bank4_PCCARD: FSMC Bank4 PCCARD - * @param FSMC_IT: specifies the interrupt pending bit to clear. - * This parameter can be any combination of the following values: - * @arg FSMC_IT_RisingEdge: Rising edge detection interrupt. - * @arg FSMC_IT_Level: Level edge detection interrupt. - * @arg FSMC_IT_FallingEdge: Falling edge detection interrupt. - * @retval None - */ -void FSMC_ClearITPendingBit(uint32_t FSMC_Bank, uint32_t FSMC_IT) -{ - /* Check the parameters */ - assert_param(IS_FSMC_IT_BANK(FSMC_Bank)); - assert_param(IS_FSMC_IT(FSMC_IT)); - - if(FSMC_Bank == FSMC_Bank2_NAND) - { - FSMC_Bank2->SR2 &= ~(FSMC_IT >> 3); - } - else if(FSMC_Bank == FSMC_Bank3_NAND) - { - FSMC_Bank3->SR3 &= ~(FSMC_IT >> 3); - } - /* FSMC_Bank4_PCCARD*/ - else - { - FSMC_Bank4->SR4 &= ~(FSMC_IT >> 3); - } -} - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_gpio.c b/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_gpio.c deleted file mode 100644 index f2322a95d4..0000000000 --- a/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_gpio.c +++ /dev/null @@ -1,636 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f10x_gpio.c - * @author MCD Application Team - * @version V3.2.0 - * @date 03/01/2010 - * @brief This file provides all the GPIO firmware functions. - ****************************************************************************** - * @copy - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2010 STMicroelectronics

- */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x_gpio.h" -#include "stm32f10x_rcc.h" - -/** @addtogroup STM32F10x_StdPeriph_Driver - * @{ - */ - -/** @defgroup GPIO - * @brief GPIO driver modules - * @{ - */ - -/** @defgroup GPIO_Private_TypesDefinitions - * @{ - */ - -/** - * @} - */ - -/** @defgroup GPIO_Private_Defines - * @{ - */ - -/* ------------ RCC registers bit address in the alias region ----------------*/ -#define AFIO_OFFSET (AFIO_BASE - PERIPH_BASE) - -/* --- EVENTCR Register -----*/ - -/* Alias word address of EVOE bit */ -#define EVCR_OFFSET (AFIO_OFFSET + 0x00) -#define EVOE_BitNumber ((uint8_t)0x07) -#define EVCR_EVOE_BB (PERIPH_BB_BASE + (EVCR_OFFSET * 32) + (EVOE_BitNumber * 4)) - - -/* --- MAPR Register ---*/ -/* Alias word address of MII_RMII_SEL bit */ -#define MAPR_OFFSET (AFIO_OFFSET + 0x04) -#define MII_RMII_SEL_BitNumber ((u8)0x17) -#define MAPR_MII_RMII_SEL_BB (PERIPH_BB_BASE + (MAPR_OFFSET * 32) + (MII_RMII_SEL_BitNumber * 4)) - - -#define EVCR_PORTPINCONFIG_MASK ((uint16_t)0xFF80) -#define LSB_MASK ((uint16_t)0xFFFF) -#define DBGAFR_POSITION_MASK ((uint32_t)0x000F0000) -#define DBGAFR_SWJCFG_MASK ((uint32_t)0xF0FFFFFF) -#define DBGAFR_LOCATION_MASK ((uint32_t)0x00200000) -#define DBGAFR_NUMBITS_MASK ((uint32_t)0x00100000) -/** - * @} - */ - -/** @defgroup GPIO_Private_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup GPIO_Private_Variables - * @{ - */ - -/** - * @} - */ - -/** @defgroup GPIO_Private_FunctionPrototypes - * @{ - */ - -/** - * @} - */ - -/** @defgroup GPIO_Private_Functions - * @{ - */ - -/** - * @brief Deinitializes the GPIOx peripheral registers to their default reset values. - * @param GPIOx: where x can be (A..G) to select the GPIO peripheral. - * @retval None - */ -void GPIO_DeInit(GPIO_TypeDef* GPIOx) -{ - /* Check the parameters */ - assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); - - if (GPIOx == GPIOA) - { - RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOA, ENABLE); - RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOA, DISABLE); - } - else if (GPIOx == GPIOB) - { - RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOB, ENABLE); - RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOB, DISABLE); - } - else if (GPIOx == GPIOC) - { - RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOC, ENABLE); - RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOC, DISABLE); - } - else if (GPIOx == GPIOD) - { - RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOD, ENABLE); - RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOD, DISABLE); - } - else if (GPIOx == GPIOE) - { - RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOE, ENABLE); - RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOE, DISABLE); - } - else if (GPIOx == GPIOF) - { - RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOF, ENABLE); - RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOF, DISABLE); - } - else - { - if (GPIOx == GPIOG) - { - RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOG, ENABLE); - RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOG, DISABLE); - } - } -} - -/** - * @brief Deinitializes the Alternate Functions (remap, event control - * and EXTI configuration) registers to their default reset values. - * @param None - * @retval None - */ -void GPIO_AFIODeInit(void) -{ - RCC_APB2PeriphResetCmd(RCC_APB2Periph_AFIO, ENABLE); - RCC_APB2PeriphResetCmd(RCC_APB2Periph_AFIO, DISABLE); -} - -/** - * @brief Initializes the GPIOx peripheral according to the specified - * parameters in the GPIO_InitStruct. - * @param GPIOx: where x can be (A..G) to select the GPIO peripheral. - * @param GPIO_InitStruct: pointer to a GPIO_InitTypeDef structure that - * contains the configuration information for the specified GPIO peripheral. - * @retval None - */ -void GPIO_Init(GPIO_TypeDef* GPIOx, GPIO_InitTypeDef* GPIO_InitStruct) -{ - uint32_t currentmode = 0x00, currentpin = 0x00, pinpos = 0x00, pos = 0x00; - uint32_t tmpreg = 0x00, pinmask = 0x00; - /* Check the parameters */ - assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); - assert_param(IS_GPIO_MODE(GPIO_InitStruct->GPIO_Mode)); - assert_param(IS_GPIO_PIN(GPIO_InitStruct->GPIO_Pin)); - -/*---------------------------- GPIO Mode Configuration -----------------------*/ - currentmode = ((uint32_t)GPIO_InitStruct->GPIO_Mode) & ((uint32_t)0x0F); - if ((((uint32_t)GPIO_InitStruct->GPIO_Mode) & ((uint32_t)0x10)) != 0x00) - { - /* Check the parameters */ - assert_param(IS_GPIO_SPEED(GPIO_InitStruct->GPIO_Speed)); - /* Output mode */ - currentmode |= (uint32_t)GPIO_InitStruct->GPIO_Speed; - } -/*---------------------------- GPIO CRL Configuration ------------------------*/ - /* Configure the eight low port pins */ - if (((uint32_t)GPIO_InitStruct->GPIO_Pin & ((uint32_t)0x00FF)) != 0x00) - { - tmpreg = GPIOx->CRL; - for (pinpos = 0x00; pinpos < 0x08; pinpos++) - { - pos = ((uint32_t)0x01) << pinpos; - /* Get the port pins position */ - currentpin = (GPIO_InitStruct->GPIO_Pin) & pos; - if (currentpin == pos) - { - pos = pinpos << 2; - /* Clear the corresponding low control register bits */ - pinmask = ((uint32_t)0x0F) << pos; - tmpreg &= ~pinmask; - /* Write the mode configuration in the corresponding bits */ - tmpreg |= (currentmode << pos); - /* Reset the corresponding ODR bit */ - if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPD) - { - GPIOx->BRR = (((uint32_t)0x01) << pinpos); - } - else - { - /* Set the corresponding ODR bit */ - if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPU) - { - GPIOx->BSRR = (((uint32_t)0x01) << pinpos); - } - } - } - } - GPIOx->CRL = tmpreg; - } -/*---------------------------- GPIO CRH Configuration ------------------------*/ - /* Configure the eight high port pins */ - if (GPIO_InitStruct->GPIO_Pin > 0x00FF) - { - tmpreg = GPIOx->CRH; - for (pinpos = 0x00; pinpos < 0x08; pinpos++) - { - pos = (((uint32_t)0x01) << (pinpos + 0x08)); - /* Get the port pins position */ - currentpin = ((GPIO_InitStruct->GPIO_Pin) & pos); - if (currentpin == pos) - { - pos = pinpos << 2; - /* Clear the corresponding high control register bits */ - pinmask = ((uint32_t)0x0F) << pos; - tmpreg &= ~pinmask; - /* Write the mode configuration in the corresponding bits */ - tmpreg |= (currentmode << pos); - /* Reset the corresponding ODR bit */ - if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPD) - { - GPIOx->BRR = (((uint32_t)0x01) << (pinpos + 0x08)); - } - /* Set the corresponding ODR bit */ - if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPU) - { - GPIOx->BSRR = (((uint32_t)0x01) << (pinpos + 0x08)); - } - } - } - GPIOx->CRH = tmpreg; - } -} - -/** - * @brief Fills each GPIO_InitStruct member with its default value. - * @param GPIO_InitStruct : pointer to a GPIO_InitTypeDef structure which will - * be initialized. - * @retval None - */ -void GPIO_StructInit(GPIO_InitTypeDef* GPIO_InitStruct) -{ - /* Reset GPIO init structure parameters values */ - GPIO_InitStruct->GPIO_Pin = GPIO_Pin_All; - GPIO_InitStruct->GPIO_Speed = GPIO_Speed_2MHz; - GPIO_InitStruct->GPIO_Mode = GPIO_Mode_IN_FLOATING; -} - -/** - * @brief Reads the specified input port pin. - * @param GPIOx: where x can be (A..G) to select the GPIO peripheral. - * @param GPIO_Pin: specifies the port bit to read. - * This parameter can be GPIO_Pin_x where x can be (0..15). - * @retval The input port pin value. - */ -uint8_t GPIO_ReadInputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) -{ - uint8_t bitstatus = 0x00; - - /* Check the parameters */ - assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); - assert_param(IS_GET_GPIO_PIN(GPIO_Pin)); - - if ((GPIOx->IDR & GPIO_Pin) != (uint32_t)Bit_RESET) - { - bitstatus = (uint8_t)Bit_SET; - } - else - { - bitstatus = (uint8_t)Bit_RESET; - } - return bitstatus; -} - -/** - * @brief Reads the specified GPIO input data port. - * @param GPIOx: where x can be (A..G) to select the GPIO peripheral. - * @retval GPIO input data port value. - */ -uint16_t GPIO_ReadInputData(GPIO_TypeDef* GPIOx) -{ - /* Check the parameters */ - assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); - - return ((uint16_t)GPIOx->IDR); -} - -/** - * @brief Reads the specified output data port bit. - * @param GPIOx: where x can be (A..G) to select the GPIO peripheral. - * @param GPIO_Pin: specifies the port bit to read. - * This parameter can be GPIO_Pin_x where x can be (0..15). - * @retval The output port pin value. - */ -uint8_t GPIO_ReadOutputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) -{ - uint8_t bitstatus = 0x00; - /* Check the parameters */ - assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); - assert_param(IS_GET_GPIO_PIN(GPIO_Pin)); - - if ((GPIOx->ODR & GPIO_Pin) != (uint32_t)Bit_RESET) - { - bitstatus = (uint8_t)Bit_SET; - } - else - { - bitstatus = (uint8_t)Bit_RESET; - } - return bitstatus; -} - -/** - * @brief Reads the specified GPIO output data port. - * @param GPIOx: where x can be (A..G) to select the GPIO peripheral. - * @retval GPIO output data port value. - */ -uint16_t GPIO_ReadOutputData(GPIO_TypeDef* GPIOx) -{ - /* Check the parameters */ - assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); - - return ((uint16_t)GPIOx->ODR); -} - -/** - * @brief Sets the selected data port bits. - * @param GPIOx: where x can be (A..G) to select the GPIO peripheral. - * @param GPIO_Pin: specifies the port bits to be written. - * This parameter can be any combination of GPIO_Pin_x where x can be (0..15). - * @retval None - */ -void GPIO_SetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) -{ - /* Check the parameters */ - assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); - assert_param(IS_GPIO_PIN(GPIO_Pin)); - - GPIOx->BSRR = GPIO_Pin; -} - -/** - * @brief Clears the selected data port bits. - * @param GPIOx: where x can be (A..G) to select the GPIO peripheral. - * @param GPIO_Pin: specifies the port bits to be written. - * This parameter can be any combination of GPIO_Pin_x where x can be (0..15). - * @retval None - */ -void GPIO_ResetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) -{ - /* Check the parameters */ - assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); - assert_param(IS_GPIO_PIN(GPIO_Pin)); - - GPIOx->BRR = GPIO_Pin; -} - -/** - * @brief Sets or clears the selected data port bit. - * @param GPIOx: where x can be (A..G) to select the GPIO peripheral. - * @param GPIO_Pin: specifies the port bit to be written. - * This parameter can be one of GPIO_Pin_x where x can be (0..15). - * @param BitVal: specifies the value to be written to the selected bit. - * This parameter can be one of the BitAction enum values: - * @arg Bit_RESET: to clear the port pin - * @arg Bit_SET: to set the port pin - * @retval None - */ -void GPIO_WriteBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, BitAction BitVal) -{ - /* Check the parameters */ - assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); - assert_param(IS_GET_GPIO_PIN(GPIO_Pin)); - assert_param(IS_GPIO_BIT_ACTION(BitVal)); - - if (BitVal != Bit_RESET) - { - GPIOx->BSRR = GPIO_Pin; - } - else - { - GPIOx->BRR = GPIO_Pin; - } -} - -/** - * @brief Writes data to the specified GPIO data port. - * @param GPIOx: where x can be (A..G) to select the GPIO peripheral. - * @param PortVal: specifies the value to be written to the port output data register. - * @retval None - */ -void GPIO_Write(GPIO_TypeDef* GPIOx, uint16_t PortVal) -{ - /* Check the parameters */ - assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); - - GPIOx->ODR = PortVal; -} - -/** - * @brief Locks GPIO Pins configuration registers. - * @param GPIOx: where x can be (A..G) to select the GPIO peripheral. - * @param GPIO_Pin: specifies the port bit to be written. - * This parameter can be any combination of GPIO_Pin_x where x can be (0..15). - * @retval None - */ -void GPIO_PinLockConfig(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) -{ - uint32_t tmp = 0x00010000; - - /* Check the parameters */ - assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); - assert_param(IS_GPIO_PIN(GPIO_Pin)); - - tmp |= GPIO_Pin; - /* Set LCKK bit */ - GPIOx->LCKR = tmp; - /* Reset LCKK bit */ - GPIOx->LCKR = GPIO_Pin; - /* Set LCKK bit */ - GPIOx->LCKR = tmp; - /* Read LCKK bit*/ - tmp = GPIOx->LCKR; - /* Read LCKK bit*/ - tmp = GPIOx->LCKR; -} - -/** - * @brief Selects the GPIO pin used as Event output. - * @param GPIO_PortSource: selects the GPIO port to be used as source - * for Event output. - * This parameter can be GPIO_PortSourceGPIOx where x can be (A..E). - * @param GPIO_PinSource: specifies the pin for the Event output. - * This parameter can be GPIO_PinSourcex where x can be (0..15). - * @retval None - */ -void GPIO_EventOutputConfig(uint8_t GPIO_PortSource, uint8_t GPIO_PinSource) -{ - uint32_t tmpreg = 0x00; - /* Check the parameters */ - assert_param(IS_GPIO_EVENTOUT_PORT_SOURCE(GPIO_PortSource)); - assert_param(IS_GPIO_PIN_SOURCE(GPIO_PinSource)); - - tmpreg = AFIO->EVCR; - /* Clear the PORT[6:4] and PIN[3:0] bits */ - tmpreg &= EVCR_PORTPINCONFIG_MASK; - tmpreg |= (uint32_t)GPIO_PortSource << 0x04; - tmpreg |= GPIO_PinSource; - AFIO->EVCR = tmpreg; -} - -/** - * @brief Enables or disables the Event Output. - * @param NewState: new state of the Event output. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void GPIO_EventOutputCmd(FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_FUNCTIONAL_STATE(NewState)); - - *(__IO uint32_t *) EVCR_EVOE_BB = (uint32_t)NewState; -} - -/** - * @brief Changes the mapping of the specified pin. - * @param GPIO_Remap: selects the pin to remap. - * This parameter can be one of the following values: - * @arg GPIO_Remap_SPI1 - * @arg GPIO_Remap_I2C1 - * @arg GPIO_Remap_USART1 - * @arg GPIO_Remap_USART2 - * @arg GPIO_PartialRemap_USART3 - * @arg GPIO_FullRemap_USART3 - * @arg GPIO_PartialRemap_TIM1 - * @arg GPIO_FullRemap_TIM1 - * @arg GPIO_PartialRemap1_TIM2 - * @arg GPIO_PartialRemap2_TIM2 - * @arg GPIO_FullRemap_TIM2 - * @arg GPIO_PartialRemap_TIM3 - * @arg GPIO_FullRemap_TIM3 - * @arg GPIO_Remap_TIM4 - * @arg GPIO_Remap1_CAN1 - * @arg GPIO_Remap2_CAN1 - * @arg GPIO_Remap_PD01 - * @arg GPIO_Remap_TIM5CH4_LSI - * @arg GPIO_Remap_ADC1_ETRGINJ - * @arg GPIO_Remap_ADC1_ETRGREG - * @arg GPIO_Remap_ADC2_ETRGINJ - * @arg GPIO_Remap_ADC2_ETRGREG - * @arg GPIO_Remap_ETH - * @arg GPIO_Remap_CAN2 - * @arg GPIO_Remap_SWJ_NoJTRST - * @arg GPIO_Remap_SWJ_JTAGDisable - * @arg GPIO_Remap_SWJ_Disable - * @arg GPIO_Remap_SPI3 - * @arg GPIO_Remap_TIM2ITR1_PTP_SOF - * @arg GPIO_Remap_PTP_PPS - * @arg GPIO_Remap_TIM15 - * @arg GPIO_Remap_TIM16 - * @arg GPIO_Remap_TIM17 - * @arg GPIO_Remap_CEC - * @arg GPIO_Remap_TIM1_DMA - * @note If the GPIO_Remap_TIM2ITR1_PTP_SOF is enabled the TIM2 ITR1 is connected - * to Ethernet PTP output. When Reset TIM2 ITR1 is connected to USB OTG SOF output. - * @param NewState: new state of the port pin remapping. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void GPIO_PinRemapConfig(uint32_t GPIO_Remap, FunctionalState NewState) -{ - uint32_t tmp = 0x00, tmp1 = 0x00, tmpreg = 0x00, tmpmask = 0x00; - - /* Check the parameters */ - assert_param(IS_GPIO_REMAP(GPIO_Remap)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - - if((GPIO_Remap & 0x80000000) == 0x80000000) - { - tmpreg = AFIO->MAPR2; - } - else - { - tmpreg = AFIO->MAPR; - } - - tmpmask = (GPIO_Remap & DBGAFR_POSITION_MASK) >> 0x10; - tmp = GPIO_Remap & LSB_MASK; - - if ((GPIO_Remap & (DBGAFR_LOCATION_MASK | DBGAFR_NUMBITS_MASK)) == (DBGAFR_LOCATION_MASK | DBGAFR_NUMBITS_MASK)) - { - tmpreg &= DBGAFR_SWJCFG_MASK; - AFIO->MAPR &= DBGAFR_SWJCFG_MASK; - } - else if ((GPIO_Remap & DBGAFR_NUMBITS_MASK) == DBGAFR_NUMBITS_MASK) - { - tmp1 = ((uint32_t)0x03) << tmpmask; - tmpreg &= ~tmp1; - tmpreg |= ~DBGAFR_SWJCFG_MASK; - } - else - { - tmpreg &= ~(tmp << ((GPIO_Remap >> 0x15)*0x10)); - tmpreg |= ~DBGAFR_SWJCFG_MASK; - } - - if (NewState != DISABLE) - { - tmpreg |= (tmp << ((GPIO_Remap >> 0x15)*0x10)); - } - - if((GPIO_Remap & 0x80000000) == 0x80000000) - { - AFIO->MAPR2 = tmpreg; - } - else - { - AFIO->MAPR = tmpreg; - } -} - -/** - * @brief Selects the GPIO pin used as EXTI Line. - * @param GPIO_PortSource: selects the GPIO port to be used as source for EXTI lines. - * This parameter can be GPIO_PortSourceGPIOx where x can be (A..G). - * @param GPIO_PinSource: specifies the EXTI line to be configured. - * This parameter can be GPIO_PinSourcex where x can be (0..15). - * @retval None - */ -void GPIO_EXTILineConfig(uint8_t GPIO_PortSource, uint8_t GPIO_PinSource) -{ - uint32_t tmp = 0x00; - /* Check the parameters */ - assert_param(IS_GPIO_EXTI_PORT_SOURCE(GPIO_PortSource)); - assert_param(IS_GPIO_PIN_SOURCE(GPIO_PinSource)); - - tmp = ((uint32_t)0x0F) << (0x04 * (GPIO_PinSource & (uint8_t)0x03)); - AFIO->EXTICR[GPIO_PinSource >> 0x02] &= ~tmp; - AFIO->EXTICR[GPIO_PinSource >> 0x02] |= (((uint32_t)GPIO_PortSource) << (0x04 * (GPIO_PinSource & (uint8_t)0x03))); -} - -/** - * @brief Selects the Ethernet media interface. - * @note This function applies only to STM32 Connectivity line devices. - * @param GPIO_ETH_MediaInterface: specifies the Media Interface mode. - * This parameter can be one of the following values: - * @arg GPIO_ETH_MediaInterface_MII: MII mode - * @arg GPIO_ETH_MediaInterface_RMII: RMII mode - * @retval None - */ -void GPIO_ETH_MediaInterfaceConfig(uint32_t GPIO_ETH_MediaInterface) -{ - assert_param(IS_GPIO_ETH_MEDIA_INTERFACE(GPIO_ETH_MediaInterface)); - - /* Configure MII_RMII selection bit */ - *(__IO uint32_t *) MAPR_MII_RMII_SEL_BB = GPIO_ETH_MediaInterface; -} - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_i2c.c b/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_i2c.c deleted file mode 100644 index 9fe53c3e03..0000000000 --- a/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_i2c.c +++ /dev/null @@ -1,1162 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f10x_i2c.c - * @author MCD Application Team - * @version V3.2.0 - * @date 03/01/2010 - * @brief This file provides all the I2C firmware functions. - ****************************************************************************** - * @copy - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2010 STMicroelectronics

- */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x_i2c.h" -#include "stm32f10x_rcc.h" - - -/** @addtogroup STM32F10x_StdPeriph_Driver - * @{ - */ - -/** @defgroup I2C - * @brief I2C driver modules - * @{ - */ - -/** @defgroup I2C_Private_TypesDefinitions - * @{ - */ - -/** - * @} - */ - -/** @defgroup I2C_Private_Defines - * @{ - */ - -/* I2C SPE mask */ -#define CR1_PE_Set ((uint16_t)0x0001) -#define CR1_PE_Reset ((uint16_t)0xFFFE) - -/* I2C START mask */ -#define CR1_START_Set ((uint16_t)0x0100) -#define CR1_START_Reset ((uint16_t)0xFEFF) - -/* I2C STOP mask */ -#define CR1_STOP_Set ((uint16_t)0x0200) -#define CR1_STOP_Reset ((uint16_t)0xFDFF) - -/* I2C ACK mask */ -#define CR1_ACK_Set ((uint16_t)0x0400) -#define CR1_ACK_Reset ((uint16_t)0xFBFF) - -/* I2C ENGC mask */ -#define CR1_ENGC_Set ((uint16_t)0x0040) -#define CR1_ENGC_Reset ((uint16_t)0xFFBF) - -/* I2C SWRST mask */ -#define CR1_SWRST_Set ((uint16_t)0x8000) -#define CR1_SWRST_Reset ((uint16_t)0x7FFF) - -/* I2C PEC mask */ -#define CR1_PEC_Set ((uint16_t)0x1000) -#define CR1_PEC_Reset ((uint16_t)0xEFFF) - -/* I2C ENPEC mask */ -#define CR1_ENPEC_Set ((uint16_t)0x0020) -#define CR1_ENPEC_Reset ((uint16_t)0xFFDF) - -/* I2C ENARP mask */ -#define CR1_ENARP_Set ((uint16_t)0x0010) -#define CR1_ENARP_Reset ((uint16_t)0xFFEF) - -/* I2C NOSTRETCH mask */ -#define CR1_NOSTRETCH_Set ((uint16_t)0x0080) -#define CR1_NOSTRETCH_Reset ((uint16_t)0xFF7F) - -/* I2C registers Masks */ -#define CR1_CLEAR_Mask ((uint16_t)0xFBF5) - -/* I2C DMAEN mask */ -#define CR2_DMAEN_Set ((uint16_t)0x0800) -#define CR2_DMAEN_Reset ((uint16_t)0xF7FF) - -/* I2C LAST mask */ -#define CR2_LAST_Set ((uint16_t)0x1000) -#define CR2_LAST_Reset ((uint16_t)0xEFFF) - -/* I2C FREQ mask */ -#define CR2_FREQ_Reset ((uint16_t)0xFFC0) - -/* I2C ADD0 mask */ -#define OAR1_ADD0_Set ((uint16_t)0x0001) -#define OAR1_ADD0_Reset ((uint16_t)0xFFFE) - -/* I2C ENDUAL mask */ -#define OAR2_ENDUAL_Set ((uint16_t)0x0001) -#define OAR2_ENDUAL_Reset ((uint16_t)0xFFFE) - -/* I2C ADD2 mask */ -#define OAR2_ADD2_Reset ((uint16_t)0xFF01) - -/* I2C F/S mask */ -#define CCR_FS_Set ((uint16_t)0x8000) - -/* I2C CCR mask */ -#define CCR_CCR_Set ((uint16_t)0x0FFF) - -/* I2C FLAG mask */ -#define FLAG_Mask ((uint32_t)0x00FFFFFF) - -/* I2C Interrupt Enable mask */ -#define ITEN_Mask ((uint32_t)0x07000000) - -/** - * @} - */ - -/** @defgroup I2C_Private_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup I2C_Private_Variables - * @{ - */ - -/** - * @} - */ - -/** @defgroup I2C_Private_FunctionPrototypes - * @{ - */ - -/** - * @} - */ - -/** @defgroup I2C_Private_Functions - * @{ - */ - -/** - * @brief Deinitializes the I2Cx peripheral registers to their default reset values. - * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. - * @retval None - */ -void I2C_DeInit(I2C_TypeDef* I2Cx) -{ - /* Check the parameters */ - assert_param(IS_I2C_ALL_PERIPH(I2Cx)); - - if (I2Cx == I2C1) - { - /* Enable I2C1 reset state */ - RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C1, ENABLE); - /* Release I2C1 from reset state */ - RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C1, DISABLE); - } - else - { - /* Enable I2C2 reset state */ - RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C2, ENABLE); - /* Release I2C2 from reset state */ - RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C2, DISABLE); - } -} - -/** - * @brief Initializes the I2Cx peripheral according to the specified - * parameters in the I2C_InitStruct. - * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. - * @param I2C_InitStruct: pointer to a I2C_InitTypeDef structure that - * contains the configuration information for the specified I2C peripheral. - * @retval None - */ -void I2C_Init(I2C_TypeDef* I2Cx, I2C_InitTypeDef* I2C_InitStruct) -{ - uint16_t tmpreg = 0, freqrange = 0; - uint16_t result = 0x04; - uint32_t pclk1 = 8000000; - RCC_ClocksTypeDef rcc_clocks; - /* Check the parameters */ - assert_param(IS_I2C_ALL_PERIPH(I2Cx)); - assert_param(IS_I2C_CLOCK_SPEED(I2C_InitStruct->I2C_ClockSpeed)); - assert_param(IS_I2C_MODE(I2C_InitStruct->I2C_Mode)); - assert_param(IS_I2C_DUTY_CYCLE(I2C_InitStruct->I2C_DutyCycle)); - assert_param(IS_I2C_OWN_ADDRESS1(I2C_InitStruct->I2C_OwnAddress1)); - assert_param(IS_I2C_ACK_STATE(I2C_InitStruct->I2C_Ack)); - assert_param(IS_I2C_ACKNOWLEDGE_ADDRESS(I2C_InitStruct->I2C_AcknowledgedAddress)); - -/*---------------------------- I2Cx CR2 Configuration ------------------------*/ - /* Get the I2Cx CR2 value */ - tmpreg = I2Cx->CR2; - /* Clear frequency FREQ[5:0] bits */ - tmpreg &= CR2_FREQ_Reset; - /* Get pclk1 frequency value */ - RCC_GetClocksFreq(&rcc_clocks); - pclk1 = rcc_clocks.PCLK1_Frequency; - /* Set frequency bits depending on pclk1 value */ - freqrange = (uint16_t)(pclk1 / 1000000); - tmpreg |= freqrange; - /* Write to I2Cx CR2 */ - I2Cx->CR2 = tmpreg; - -/*---------------------------- I2Cx CCR Configuration ------------------------*/ - /* Disable the selected I2C peripheral to configure TRISE */ - I2Cx->CR1 &= CR1_PE_Reset; - /* Reset tmpreg value */ - /* Clear F/S, DUTY and CCR[11:0] bits */ - tmpreg = 0; - - /* Configure speed in standard mode */ - if (I2C_InitStruct->I2C_ClockSpeed <= 100000) - { - /* Standard mode speed calculate */ - result = (uint16_t)(pclk1 / (I2C_InitStruct->I2C_ClockSpeed << 1)); - /* Test if CCR value is under 0x4*/ - if (result < 0x04) - { - /* Set minimum allowed value */ - result = 0x04; - } - /* Set speed value for standard mode */ - tmpreg |= result; - /* Set Maximum Rise Time for standard mode */ - I2Cx->TRISE = freqrange + 1; - } - /* Configure speed in fast mode */ - else /*(I2C_InitStruct->I2C_ClockSpeed <= 400000)*/ - { - if (I2C_InitStruct->I2C_DutyCycle == I2C_DutyCycle_2) - { - /* Fast mode speed calculate: Tlow/Thigh = 2 */ - result = (uint16_t)(pclk1 / (I2C_InitStruct->I2C_ClockSpeed * 3)); - } - else /*I2C_InitStruct->I2C_DutyCycle == I2C_DutyCycle_16_9*/ - { - /* Fast mode speed calculate: Tlow/Thigh = 16/9 */ - result = (uint16_t)(pclk1 / (I2C_InitStruct->I2C_ClockSpeed * 25)); - /* Set DUTY bit */ - result |= I2C_DutyCycle_16_9; - } - - /* Test if CCR value is under 0x1*/ - if ((result & CCR_CCR_Set) == 0) - { - /* Set minimum allowed value */ - result |= (uint16_t)0x0001; - } - /* Set speed value and set F/S bit for fast mode */ - tmpreg |= (uint16_t)(result | CCR_FS_Set); - /* Set Maximum Rise Time for fast mode */ - I2Cx->TRISE = (uint16_t)(((freqrange * (uint16_t)300) / (uint16_t)1000) + (uint16_t)1); - } - - /* Write to I2Cx CCR */ - I2Cx->CCR = tmpreg; - /* Enable the selected I2C peripheral */ - I2Cx->CR1 |= CR1_PE_Set; - -/*---------------------------- I2Cx CR1 Configuration ------------------------*/ - /* Get the I2Cx CR1 value */ - tmpreg = I2Cx->CR1; - /* Clear ACK, SMBTYPE and SMBUS bits */ - tmpreg &= CR1_CLEAR_Mask; - /* Configure I2Cx: mode and acknowledgement */ - /* Set SMBTYPE and SMBUS bits according to I2C_Mode value */ - /* Set ACK bit according to I2C_Ack value */ - tmpreg |= (uint16_t)((uint32_t)I2C_InitStruct->I2C_Mode | I2C_InitStruct->I2C_Ack); - /* Write to I2Cx CR1 */ - I2Cx->CR1 = tmpreg; - -/*---------------------------- I2Cx OAR1 Configuration -----------------------*/ - /* Set I2Cx Own Address1 and acknowledged address */ - I2Cx->OAR1 = (I2C_InitStruct->I2C_AcknowledgedAddress | I2C_InitStruct->I2C_OwnAddress1); -} - -/** - * @brief Fills each I2C_InitStruct member with its default value. - * @param I2C_InitStruct: pointer to an I2C_InitTypeDef structure which will be initialized. - * @retval None - */ -void I2C_StructInit(I2C_InitTypeDef* I2C_InitStruct) -{ -/*---------------- Reset I2C init structure parameters values ----------------*/ - /* initialize the I2C_ClockSpeed member */ - I2C_InitStruct->I2C_ClockSpeed = 5000; - /* Initialize the I2C_Mode member */ - I2C_InitStruct->I2C_Mode = I2C_Mode_I2C; - /* Initialize the I2C_DutyCycle member */ - I2C_InitStruct->I2C_DutyCycle = I2C_DutyCycle_2; - /* Initialize the I2C_OwnAddress1 member */ - I2C_InitStruct->I2C_OwnAddress1 = 0; - /* Initialize the I2C_Ack member */ - I2C_InitStruct->I2C_Ack = I2C_Ack_Disable; - /* Initialize the I2C_AcknowledgedAddress member */ - I2C_InitStruct->I2C_AcknowledgedAddress = I2C_AcknowledgedAddress_7bit; -} - -/** - * @brief Enables or disables the specified I2C peripheral. - * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. - * @param NewState: new state of the I2Cx peripheral. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void I2C_Cmd(I2C_TypeDef* I2Cx, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_I2C_ALL_PERIPH(I2Cx)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - if (NewState != DISABLE) - { - /* Enable the selected I2C peripheral */ - I2Cx->CR1 |= CR1_PE_Set; - } - else - { - /* Disable the selected I2C peripheral */ - I2Cx->CR1 &= CR1_PE_Reset; - } -} - -/** - * @brief Enables or disables the specified I2C DMA requests. - * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. - * @param NewState: new state of the I2C DMA transfer. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void I2C_DMACmd(I2C_TypeDef* I2Cx, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_I2C_ALL_PERIPH(I2Cx)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - if (NewState != DISABLE) - { - /* Enable the selected I2C DMA requests */ - I2Cx->CR2 |= CR2_DMAEN_Set; - } - else - { - /* Disable the selected I2C DMA requests */ - I2Cx->CR2 &= CR2_DMAEN_Reset; - } -} - -/** - * @brief Specifies if the next DMA transfer will be the last one. - * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. - * @param NewState: new state of the I2C DMA last transfer. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void I2C_DMALastTransferCmd(I2C_TypeDef* I2Cx, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_I2C_ALL_PERIPH(I2Cx)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - if (NewState != DISABLE) - { - /* Next DMA transfer is the last transfer */ - I2Cx->CR2 |= CR2_LAST_Set; - } - else - { - /* Next DMA transfer is not the last transfer */ - I2Cx->CR2 &= CR2_LAST_Reset; - } -} - -/** - * @brief Generates I2Cx communication START condition. - * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. - * @param NewState: new state of the I2C START condition generation. - * This parameter can be: ENABLE or DISABLE. - * @retval None. - */ -void I2C_GenerateSTART(I2C_TypeDef* I2Cx, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_I2C_ALL_PERIPH(I2Cx)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - if (NewState != DISABLE) - { - /* Generate a START condition */ - I2Cx->CR1 |= CR1_START_Set; - } - else - { - /* Disable the START condition generation */ - I2Cx->CR1 &= CR1_START_Reset; - } -} - -/** - * @brief Generates I2Cx communication STOP condition. - * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. - * @param NewState: new state of the I2C STOP condition generation. - * This parameter can be: ENABLE or DISABLE. - * @retval None. - */ -void I2C_GenerateSTOP(I2C_TypeDef* I2Cx, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_I2C_ALL_PERIPH(I2Cx)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - if (NewState != DISABLE) - { - /* Generate a STOP condition */ - I2Cx->CR1 |= CR1_STOP_Set; - } - else - { - /* Disable the STOP condition generation */ - I2Cx->CR1 &= CR1_STOP_Reset; - } -} - -/** - * @brief Enables or disables the specified I2C acknowledge feature. - * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. - * @param NewState: new state of the I2C Acknowledgement. - * This parameter can be: ENABLE or DISABLE. - * @retval None. - */ -void I2C_AcknowledgeConfig(I2C_TypeDef* I2Cx, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_I2C_ALL_PERIPH(I2Cx)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - if (NewState != DISABLE) - { - /* Enable the acknowledgement */ - I2Cx->CR1 |= CR1_ACK_Set; - } - else - { - /* Disable the acknowledgement */ - I2Cx->CR1 &= CR1_ACK_Reset; - } -} - -/** - * @brief Configures the specified I2C own address2. - * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. - * @param Address: specifies the 7bit I2C own address2. - * @retval None. - */ -void I2C_OwnAddress2Config(I2C_TypeDef* I2Cx, uint8_t Address) -{ - uint16_t tmpreg = 0; - - /* Check the parameters */ - assert_param(IS_I2C_ALL_PERIPH(I2Cx)); - - /* Get the old register value */ - tmpreg = I2Cx->OAR2; - - /* Reset I2Cx Own address2 bit [7:1] */ - tmpreg &= OAR2_ADD2_Reset; - - /* Set I2Cx Own address2 */ - tmpreg |= (uint16_t)((uint16_t)Address & (uint16_t)0x00FE); - - /* Store the new register value */ - I2Cx->OAR2 = tmpreg; -} - -/** - * @brief Enables or disables the specified I2C dual addressing mode. - * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. - * @param NewState: new state of the I2C dual addressing mode. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void I2C_DualAddressCmd(I2C_TypeDef* I2Cx, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_I2C_ALL_PERIPH(I2Cx)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - if (NewState != DISABLE) - { - /* Enable dual addressing mode */ - I2Cx->OAR2 |= OAR2_ENDUAL_Set; - } - else - { - /* Disable dual addressing mode */ - I2Cx->OAR2 &= OAR2_ENDUAL_Reset; - } -} - -/** - * @brief Enables or disables the specified I2C general call feature. - * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. - * @param NewState: new state of the I2C General call. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void I2C_GeneralCallCmd(I2C_TypeDef* I2Cx, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_I2C_ALL_PERIPH(I2Cx)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - if (NewState != DISABLE) - { - /* Enable generall call */ - I2Cx->CR1 |= CR1_ENGC_Set; - } - else - { - /* Disable generall call */ - I2Cx->CR1 &= CR1_ENGC_Reset; - } -} - -/** - * @brief Enables or disables the specified I2C interrupts. - * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. - * @param I2C_IT: specifies the I2C interrupts sources to be enabled or disabled. - * This parameter can be any combination of the following values: - * @arg I2C_IT_BUF: Buffer interrupt mask - * @arg I2C_IT_EVT: Event interrupt mask - * @arg I2C_IT_ERR: Error interrupt mask - * @param NewState: new state of the specified I2C interrupts. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void I2C_ITConfig(I2C_TypeDef* I2Cx, uint16_t I2C_IT, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_I2C_ALL_PERIPH(I2Cx)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - assert_param(IS_I2C_CONFIG_IT(I2C_IT)); - - if (NewState != DISABLE) - { - /* Enable the selected I2C interrupts */ - I2Cx->CR2 |= I2C_IT; - } - else - { - /* Disable the selected I2C interrupts */ - I2Cx->CR2 &= (uint16_t)~I2C_IT; - } -} - -/** - * @brief Sends a data byte through the I2Cx peripheral. - * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. - * @param Data: Byte to be transmitted.. - * @retval None - */ -void I2C_SendData(I2C_TypeDef* I2Cx, uint8_t Data) -{ - /* Check the parameters */ - assert_param(IS_I2C_ALL_PERIPH(I2Cx)); - /* Write in the DR register the data to be sent */ - I2Cx->DR = Data; -} - -/** - * @brief Returns the most recent received data by the I2Cx peripheral. - * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. - * @retval The value of the received data. - */ -uint8_t I2C_ReceiveData(I2C_TypeDef* I2Cx) -{ - /* Check the parameters */ - assert_param(IS_I2C_ALL_PERIPH(I2Cx)); - /* Return the data in the DR register */ - return (uint8_t)I2Cx->DR; -} - -/** - * @brief Transmits the address byte to select the slave device. - * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. - * @param Address: specifies the slave address which will be transmitted - * @param I2C_Direction: specifies whether the I2C device will be a - * Transmitter or a Receiver. This parameter can be one of the following values - * @arg I2C_Direction_Transmitter: Transmitter mode - * @arg I2C_Direction_Receiver: Receiver mode - * @retval None. - */ -void I2C_Send7bitAddress(I2C_TypeDef* I2Cx, uint8_t Address, uint8_t I2C_Direction) -{ - /* Check the parameters */ - assert_param(IS_I2C_ALL_PERIPH(I2Cx)); - assert_param(IS_I2C_DIRECTION(I2C_Direction)); - /* Test on the direction to set/reset the read/write bit */ - if (I2C_Direction != I2C_Direction_Transmitter) - { - /* Set the address bit0 for read */ - Address |= OAR1_ADD0_Set; - } - else - { - /* Reset the address bit0 for write */ - Address &= OAR1_ADD0_Reset; - } - /* Send the address */ - I2Cx->DR = Address; -} - -/** - * @brief Reads the specified I2C register and returns its value. - * @param I2C_Register: specifies the register to read. - * This parameter can be one of the following values: - * @arg I2C_Register_CR1: CR1 register. - * @arg I2C_Register_CR2: CR2 register. - * @arg I2C_Register_OAR1: OAR1 register. - * @arg I2C_Register_OAR2: OAR2 register. - * @arg I2C_Register_DR: DR register. - * @arg I2C_Register_SR1: SR1 register. - * @arg I2C_Register_SR2: SR2 register. - * @arg I2C_Register_CCR: CCR register. - * @arg I2C_Register_TRISE: TRISE register. - * @retval The value of the read register. - */ -uint16_t I2C_ReadRegister(I2C_TypeDef* I2Cx, uint8_t I2C_Register) -{ - __IO uint32_t tmp = 0; - - /* Check the parameters */ - assert_param(IS_I2C_ALL_PERIPH(I2Cx)); - assert_param(IS_I2C_REGISTER(I2C_Register)); - - tmp = (uint32_t) I2Cx; - tmp += I2C_Register; - - /* Return the selected register value */ - return (*(__IO uint16_t *) tmp); -} - -/** - * @brief Enables or disables the specified I2C software reset. - * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. - * @param NewState: new state of the I2C software reset. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void I2C_SoftwareResetCmd(I2C_TypeDef* I2Cx, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_I2C_ALL_PERIPH(I2Cx)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - if (NewState != DISABLE) - { - /* Peripheral under reset */ - I2Cx->CR1 |= CR1_SWRST_Set; - } - else - { - /* Peripheral not under reset */ - I2Cx->CR1 &= CR1_SWRST_Reset; - } -} - -/** - * @brief Drives the SMBusAlert pin high or low for the specified I2C. - * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. - * @param I2C_SMBusAlert: specifies SMBAlert pin level. - * This parameter can be one of the following values: - * @arg I2C_SMBusAlert_Low: SMBAlert pin driven low - * @arg I2C_SMBusAlert_High: SMBAlert pin driven high - * @retval None - */ -void I2C_SMBusAlertConfig(I2C_TypeDef* I2Cx, uint16_t I2C_SMBusAlert) -{ - /* Check the parameters */ - assert_param(IS_I2C_ALL_PERIPH(I2Cx)); - assert_param(IS_I2C_SMBUS_ALERT(I2C_SMBusAlert)); - if (I2C_SMBusAlert == I2C_SMBusAlert_Low) - { - /* Drive the SMBusAlert pin Low */ - I2Cx->CR1 |= I2C_SMBusAlert_Low; - } - else - { - /* Drive the SMBusAlert pin High */ - I2Cx->CR1 &= I2C_SMBusAlert_High; - } -} - -/** - * @brief Enables or disables the specified I2C PEC transfer. - * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. - * @param NewState: new state of the I2C PEC transmission. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void I2C_TransmitPEC(I2C_TypeDef* I2Cx, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_I2C_ALL_PERIPH(I2Cx)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - if (NewState != DISABLE) - { - /* Enable the selected I2C PEC transmission */ - I2Cx->CR1 |= CR1_PEC_Set; - } - else - { - /* Disable the selected I2C PEC transmission */ - I2Cx->CR1 &= CR1_PEC_Reset; - } -} - -/** - * @brief Selects the specified I2C PEC position. - * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. - * @param I2C_PECPosition: specifies the PEC position. - * This parameter can be one of the following values: - * @arg I2C_PECPosition_Next: indicates that the next byte is PEC - * @arg I2C_PECPosition_Current: indicates that current byte is PEC - * @retval None - */ -void I2C_PECPositionConfig(I2C_TypeDef* I2Cx, uint16_t I2C_PECPosition) -{ - /* Check the parameters */ - assert_param(IS_I2C_ALL_PERIPH(I2Cx)); - assert_param(IS_I2C_PEC_POSITION(I2C_PECPosition)); - if (I2C_PECPosition == I2C_PECPosition_Next) - { - /* Next byte in shift register is PEC */ - I2Cx->CR1 |= I2C_PECPosition_Next; - } - else - { - /* Current byte in shift register is PEC */ - I2Cx->CR1 &= I2C_PECPosition_Current; - } -} - -/** - * @brief Enables or disables the PEC value calculation of the transfered bytes. - * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. - * @param NewState: new state of the I2Cx PEC value calculation. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void I2C_CalculatePEC(I2C_TypeDef* I2Cx, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_I2C_ALL_PERIPH(I2Cx)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - if (NewState != DISABLE) - { - /* Enable the selected I2C PEC calculation */ - I2Cx->CR1 |= CR1_ENPEC_Set; - } - else - { - /* Disable the selected I2C PEC calculation */ - I2Cx->CR1 &= CR1_ENPEC_Reset; - } -} - -/** - * @brief Returns the PEC value for the specified I2C. - * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. - * @retval The PEC value. - */ -uint8_t I2C_GetPEC(I2C_TypeDef* I2Cx) -{ - /* Check the parameters */ - assert_param(IS_I2C_ALL_PERIPH(I2Cx)); - /* Return the selected I2C PEC value */ - return ((I2Cx->SR2) >> 8); -} - -/** - * @brief Enables or disables the specified I2C ARP. - * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. - * @param NewState: new state of the I2Cx ARP. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void I2C_ARPCmd(I2C_TypeDef* I2Cx, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_I2C_ALL_PERIPH(I2Cx)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - if (NewState != DISABLE) - { - /* Enable the selected I2C ARP */ - I2Cx->CR1 |= CR1_ENARP_Set; - } - else - { - /* Disable the selected I2C ARP */ - I2Cx->CR1 &= CR1_ENARP_Reset; - } -} - -/** - * @brief Enables or disables the specified I2C Clock stretching. - * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. - * @param NewState: new state of the I2Cx Clock stretching. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void I2C_StretchClockCmd(I2C_TypeDef* I2Cx, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_I2C_ALL_PERIPH(I2Cx)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - if (NewState == DISABLE) - { - /* Enable the selected I2C Clock stretching */ - I2Cx->CR1 |= CR1_NOSTRETCH_Set; - } - else - { - /* Disable the selected I2C Clock stretching */ - I2Cx->CR1 &= CR1_NOSTRETCH_Reset; - } -} - -/** - * @brief Selects the specified I2C fast mode duty cycle. - * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. - * @param I2C_DutyCycle: specifies the fast mode duty cycle. - * This parameter can be one of the following values: - * @arg I2C_DutyCycle_2: I2C fast mode Tlow/Thigh = 2 - * @arg I2C_DutyCycle_16_9: I2C fast mode Tlow/Thigh = 16/9 - * @retval None - */ -void I2C_FastModeDutyCycleConfig(I2C_TypeDef* I2Cx, uint16_t I2C_DutyCycle) -{ - /* Check the parameters */ - assert_param(IS_I2C_ALL_PERIPH(I2Cx)); - assert_param(IS_I2C_DUTY_CYCLE(I2C_DutyCycle)); - if (I2C_DutyCycle != I2C_DutyCycle_16_9) - { - /* I2C fast mode Tlow/Thigh=2 */ - I2Cx->CCR &= I2C_DutyCycle_2; - } - else - { - /* I2C fast mode Tlow/Thigh=16/9 */ - I2Cx->CCR |= I2C_DutyCycle_16_9; - } -} - -/** - * @brief Returns the last I2Cx Event. - * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. - * @retval The last event - */ -uint32_t I2C_GetLastEvent(I2C_TypeDef* I2Cx) -{ - uint32_t lastevent = 0; - uint32_t flag1 = 0, flag2 = 0; - /* Check the parameters */ - assert_param(IS_I2C_ALL_PERIPH(I2Cx)); - /* Read the I2Cx status register */ - flag1 = I2Cx->SR1; - flag2 = I2Cx->SR2; - flag2 = flag2 << 16; - /* Get the last event value from I2C status register */ - lastevent = (flag1 | flag2) & FLAG_Mask; - /* Return status */ - return lastevent; -} - -/** - * @brief Checks whether the last I2Cx Event is equal to the one passed - * as parameter. - * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. - * @param I2C_EVENT: specifies the event to be checked. - * This parameter can be one of the following values: - * @arg I2C_EVENT_SLAVE_TRANSMITTER_ADDRESS_MATCHED : EV1 - * @arg I2C_EVENT_SLAVE_RECEIVER_ADDRESS_MATCHED : EV1 - * @arg I2C_EVENT_SLAVE_TRANSMITTER_SECONDADDRESS_MATCHED : EV1 - * @arg I2C_EVENT_SLAVE_RECEIVER_SECONDADDRESS_MATCHED : EV1 - * @arg I2C_EVENT_SLAVE_GENERALCALLADDRESS_MATCHED : EV1 - * @arg I2C_EVENT_SLAVE_BYTE_RECEIVED : EV2 - * @arg (I2C_EVENT_SLAVE_BYTE_RECEIVED | I2C_FLAG_DUALF) : EV2 - * @arg (I2C_EVENT_SLAVE_BYTE_RECEIVED | I2C_FLAG_GENCALL) : EV2 - * @arg I2C_EVENT_SLAVE_BYTE_TRANSMITTED : EV3 - * @arg (I2C_EVENT_SLAVE_BYTE_TRANSMITTED | I2C_FLAG_DUALF) : EV3 - * @arg (I2C_EVENT_SLAVE_BYTE_TRANSMITTED | I2C_FLAG_GENCALL) : EV3 - * @arg I2C_EVENT_SLAVE_ACK_FAILURE : EV3_2 - * @arg I2C_EVENT_SLAVE_STOP_DETECTED : EV4 - * @arg I2C_EVENT_MASTER_MODE_SELECT : EV5 - * @arg I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED : EV6 - * @arg I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED : EV6 - * @arg I2C_EVENT_MASTER_BYTE_RECEIVED : EV7 - * @arg I2C_EVENT_MASTER_BYTE_TRANSMITTING : EV8 - * @arg I2C_EVENT_MASTER_BYTE_TRANSMITTED : EV8_2 - * @arg I2C_EVENT_MASTER_MODE_ADDRESS10 : EV9 - * @retval An ErrorStatus enumuration value: - * - SUCCESS: Last event is equal to the I2C_EVENT - * - ERROR: Last event is different from the I2C_EVENT - */ -ErrorStatus I2C_CheckEvent(I2C_TypeDef* I2Cx, uint32_t I2C_EVENT) -{ - uint32_t lastevent = 0; - uint32_t flag1 = 0, flag2 = 0; - ErrorStatus status = ERROR; - /* Check the parameters */ - assert_param(IS_I2C_ALL_PERIPH(I2Cx)); - assert_param(IS_I2C_EVENT(I2C_EVENT)); - /* Read the I2Cx status register */ - flag1 = I2Cx->SR1; - flag2 = I2Cx->SR2; - flag2 = flag2 << 16; - /* Get the last event value from I2C status register */ - lastevent = (flag1 | flag2) & FLAG_Mask; - /* Check whether the last event is equal to I2C_EVENT */ - if (lastevent == I2C_EVENT ) - { - /* SUCCESS: last event is equal to I2C_EVENT */ - status = SUCCESS; - } - else - { - /* ERROR: last event is different from I2C_EVENT */ - status = ERROR; - } - /* Return status */ - return status; -} - -/** - * @brief Checks whether the specified I2C flag is set or not. - * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. - * @param I2C_FLAG: specifies the flag to check. - * This parameter can be one of the following values: - * @arg I2C_FLAG_DUALF: Dual flag (Slave mode) - * @arg I2C_FLAG_SMBHOST: SMBus host header (Slave mode) - * @arg I2C_FLAG_SMBDEFAULT: SMBus default header (Slave mode) - * @arg I2C_FLAG_GENCALL: General call header flag (Slave mode) - * @arg I2C_FLAG_TRA: Transmitter/Receiver flag - * @arg I2C_FLAG_BUSY: Bus busy flag - * @arg I2C_FLAG_MSL: Master/Slave flag - * @arg I2C_FLAG_SMBALERT: SMBus Alert flag - * @arg I2C_FLAG_TIMEOUT: Timeout or Tlow error flag - * @arg I2C_FLAG_PECERR: PEC error in reception flag - * @arg I2C_FLAG_OVR: Overrun/Underrun flag (Slave mode) - * @arg I2C_FLAG_AF: Acknowledge failure flag - * @arg I2C_FLAG_ARLO: Arbitration lost flag (Master mode) - * @arg I2C_FLAG_BERR: Bus error flag - * @arg I2C_FLAG_TXE: Data register empty flag (Transmitter) - * @arg I2C_FLAG_RXNE: Data register not empty (Receiver) flag - * @arg I2C_FLAG_STOPF: Stop detection flag (Slave mode) - * @arg I2C_FLAG_ADD10: 10-bit header sent flag (Master mode) - * @arg I2C_FLAG_BTF: Byte transfer finished flag - * @arg I2C_FLAG_ADDR: Address sent flag (Master mode) “ADSL” - * Address matched flag (Slave mode)”ENDAD” - * @arg I2C_FLAG_SB: Start bit flag (Master mode) - * @retval The new state of I2C_FLAG (SET or RESET). - */ -FlagStatus I2C_GetFlagStatus(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG) -{ - FlagStatus bitstatus = RESET; - __IO uint32_t i2creg = 0, i2cxbase = 0; - - /* Check the parameters */ - assert_param(IS_I2C_ALL_PERIPH(I2Cx)); - assert_param(IS_I2C_GET_FLAG(I2C_FLAG)); - - /* Get the I2Cx peripheral base address */ - i2cxbase = (uint32_t)I2Cx; - - /* Read flag register index */ - i2creg = I2C_FLAG >> 28; - - /* Get bit[23:0] of the flag */ - I2C_FLAG &= FLAG_Mask; - - if(i2creg != 0) - { - /* Get the I2Cx SR1 register address */ - i2cxbase += 0x14; - } - else - { - /* Flag in I2Cx SR2 Register */ - I2C_FLAG = (uint32_t)(I2C_FLAG >> 16); - /* Get the I2Cx SR2 register address */ - i2cxbase += 0x18; - } - - if(((*(__IO uint32_t *)i2cxbase) & I2C_FLAG) != (uint32_t)RESET) - { - /* I2C_FLAG is set */ - bitstatus = SET; - } - else - { - /* I2C_FLAG is reset */ - bitstatus = RESET; - } - - /* Return the I2C_FLAG status */ - return bitstatus; -} - -/** - * @brief Clears the I2Cx's pending flags. - * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. - * @param I2C_FLAG: specifies the flag to clear. - * This parameter can be any combination of the following values: - * @arg I2C_FLAG_SMBALERT: SMBus Alert flag - * @arg I2C_FLAG_TIMEOUT: Timeout or Tlow error flag - * @arg I2C_FLAG_PECERR: PEC error in reception flag - * @arg I2C_FLAG_OVR: Overrun/Underrun flag (Slave mode) - * @arg I2C_FLAG_AF: Acknowledge failure flag - * @arg I2C_FLAG_ARLO: Arbitration lost flag (Master mode) - * @arg I2C_FLAG_BERR: Bus error flag - * - * @note - * - STOPF (STOP detection) is cleared by software sequence: a read operation - * to I2C_SR1 register (I2C_GetFlagStatus()) followed by a write operation - * to I2C_CR1 register (I2C_Cmd() to re-enable the I2C peripheral). - * - ADD10 (10-bit header sent) is cleared by software sequence: a read - * operation to I2C_SR1 (I2C_GetFlagStatus()) followed by writing the - * second byte of the address in DR register. - * - BTF (Byte Transfer Finished) is cleared by software sequence: a read - * operation to I2C_SR1 register (I2C_GetFlagStatus()) followed by a - * read/write to I2C_DR register (I2C_SendData()). - * - ADDR (Address sent) is cleared by software sequence: a read operation to - * I2C_SR1 register (I2C_GetFlagStatus()) followed by a read operation to - * I2C_SR2 register ((void)(I2Cx->SR2)). - * - SB (Start Bit) is cleared software sequence: a read operation to I2C_SR1 - * register (I2C_GetFlagStatus()) followed by a write operation to I2C_DR - * register (I2C_SendData()). - * @retval None - */ -void I2C_ClearFlag(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG) -{ - uint32_t flagpos = 0; - /* Check the parameters */ - assert_param(IS_I2C_ALL_PERIPH(I2Cx)); - assert_param(IS_I2C_CLEAR_FLAG(I2C_FLAG)); - /* Get the I2C flag position */ - flagpos = I2C_FLAG & FLAG_Mask; - /* Clear the selected I2C flag */ - I2Cx->SR1 = (uint16_t)~flagpos; -} - -/** - * @brief Checks whether the specified I2C interrupt has occurred or not. - * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. - * @param I2C_IT: specifies the interrupt source to check. - * This parameter can be one of the following values: - * @arg I2C_IT_SMBALERT: SMBus Alert flag - * @arg I2C_IT_TIMEOUT: Timeout or Tlow error flag - * @arg I2C_IT_PECERR: PEC error in reception flag - * @arg I2C_IT_OVR: Overrun/Underrun flag (Slave mode) - * @arg I2C_IT_AF: Acknowledge failure flag - * @arg I2C_IT_ARLO: Arbitration lost flag (Master mode) - * @arg I2C_IT_BERR: Bus error flag - * @arg I2C_IT_TXE: Data register empty flag (Transmitter) - * @arg I2C_IT_RXNE: Data register not empty (Receiver) flag - * @arg I2C_IT_STOPF: Stop detection flag (Slave mode) - * @arg I2C_IT_ADD10: 10-bit header sent flag (Master mode) - * @arg I2C_IT_BTF: Byte transfer finished flag - * @arg I2C_IT_ADDR: Address sent flag (Master mode) “ADSL” - * Address matched flag (Slave mode)”ENDAD” - * @arg I2C_IT_SB: Start bit flag (Master mode) - * @retval The new state of I2C_IT (SET or RESET). - */ -ITStatus I2C_GetITStatus(I2C_TypeDef* I2Cx, uint32_t I2C_IT) -{ - ITStatus bitstatus = RESET; - uint32_t enablestatus = 0; - /* Check the parameters */ - assert_param(IS_I2C_ALL_PERIPH(I2Cx)); - assert_param(IS_I2C_GET_IT(I2C_IT)); - /* Check if the interrupt source is enabled or not */ - enablestatus = (uint32_t)(((I2C_IT & ITEN_Mask) >> 16) & (I2Cx->CR2)) ; - /* Get bit[23:0] of the flag */ - I2C_IT &= FLAG_Mask; - /* Check the status of the specified I2C flag */ - if (((I2Cx->SR1 & I2C_IT) != (uint32_t)RESET) && enablestatus) - { - /* I2C_IT is set */ - bitstatus = SET; - } - else - { - /* I2C_IT is reset */ - bitstatus = RESET; - } - /* Return the I2C_IT status */ - return bitstatus; -} - -/** - * @brief Clears the I2Cx’s interrupt pending bits. - * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. - * @param I2C_IT: specifies the interrupt pending bit to clear. - * This parameter can be any combination of the following values: - * @arg I2C_IT_SMBALERT: SMBus Alert interrupt - * @arg I2C_IT_TIMEOUT: Timeout or Tlow error interrupt - * @arg I2C_IT_PECERR: PEC error in reception interrupt - * @arg I2C_IT_OVR: Overrun/Underrun interrupt (Slave mode) - * @arg I2C_IT_AF: Acknowledge failure interrupt - * @arg I2C_IT_ARLO: Arbitration lost interrupt (Master mode) - * @arg I2C_IT_BERR: Bus error interrupt - * - * @note - * - STOPF (STOP detection) is cleared by software sequence: a read operation - * to I2C_SR1 register (I2C_GetITStatus()) followed by a write operation to - * I2C_CR1 register (I2C_Cmd() to re-enable the I2C peripheral). - * - ADD10 (10-bit header sent) is cleared by software sequence: a read - * operation to I2C_SR1 (I2C_GetITStatus()) followed by writing the second - * byte of the address in I2C_DR register. - * - BTF (Byte Transfer Finished) is cleared by software sequence: a read - * operation to I2C_SR1 register (I2C_GetITStatus()) followed by a - * read/write to I2C_DR register (I2C_SendData()). - * - ADDR (Address sent) is cleared by software sequence: a read operation to - * I2C_SR1 register (I2C_GetITStatus()) followed by a read operation to - * I2C_SR2 register ((void)(I2Cx->SR2)). - * - SB (Start Bit) is cleared by software sequence: a read operation to - * I2C_SR1 register (I2C_GetITStatus()) followed by a write operation to - * I2C_DR register (I2C_SendData()). - * @retval None - */ -void I2C_ClearITPendingBit(I2C_TypeDef* I2Cx, uint32_t I2C_IT) -{ - uint32_t flagpos = 0; - /* Check the parameters */ - assert_param(IS_I2C_ALL_PERIPH(I2Cx)); - assert_param(IS_I2C_CLEAR_IT(I2C_IT)); - /* Get the I2C flag position */ - flagpos = I2C_IT & FLAG_Mask; - /* Clear the selected I2C flag */ - I2Cx->SR1 = (uint16_t)~flagpos; -} - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_iwdg.c b/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_iwdg.c deleted file mode 100644 index f157ad5384..0000000000 --- a/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_iwdg.c +++ /dev/null @@ -1,189 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f10x_iwdg.c - * @author MCD Application Team - * @version V3.2.0 - * @date 03/01/2010 - * @brief This file provides all the IWDG firmware functions. - ****************************************************************************** - * @copy - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2010 STMicroelectronics

- */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x_iwdg.h" - -/** @addtogroup STM32F10x_StdPeriph_Driver - * @{ - */ - -/** @defgroup IWDG - * @brief IWDG driver modules - * @{ - */ - -/** @defgroup IWDG_Private_TypesDefinitions - * @{ - */ - -/** - * @} - */ - -/** @defgroup IWDG_Private_Defines - * @{ - */ - -/* ---------------------- IWDG registers bit mask ----------------------------*/ - -/* KR register bit mask */ -#define KR_KEY_Reload ((uint16_t)0xAAAA) -#define KR_KEY_Enable ((uint16_t)0xCCCC) - -/** - * @} - */ - -/** @defgroup IWDG_Private_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup IWDG_Private_Variables - * @{ - */ - -/** - * @} - */ - -/** @defgroup IWDG_Private_FunctionPrototypes - * @{ - */ - -/** - * @} - */ - -/** @defgroup IWDG_Private_Functions - * @{ - */ - -/** - * @brief Enables or disables write access to IWDG_PR and IWDG_RLR registers. - * @param IWDG_WriteAccess: new state of write access to IWDG_PR and IWDG_RLR registers. - * This parameter can be one of the following values: - * @arg IWDG_WriteAccess_Enable: Enable write access to IWDG_PR and IWDG_RLR registers - * @arg IWDG_WriteAccess_Disable: Disable write access to IWDG_PR and IWDG_RLR registers - * @retval None - */ -void IWDG_WriteAccessCmd(uint16_t IWDG_WriteAccess) -{ - /* Check the parameters */ - assert_param(IS_IWDG_WRITE_ACCESS(IWDG_WriteAccess)); - IWDG->KR = IWDG_WriteAccess; -} - -/** - * @brief Sets IWDG Prescaler value. - * @param IWDG_Prescaler: specifies the IWDG Prescaler value. - * This parameter can be one of the following values: - * @arg IWDG_Prescaler_4: IWDG prescaler set to 4 - * @arg IWDG_Prescaler_8: IWDG prescaler set to 8 - * @arg IWDG_Prescaler_16: IWDG prescaler set to 16 - * @arg IWDG_Prescaler_32: IWDG prescaler set to 32 - * @arg IWDG_Prescaler_64: IWDG prescaler set to 64 - * @arg IWDG_Prescaler_128: IWDG prescaler set to 128 - * @arg IWDG_Prescaler_256: IWDG prescaler set to 256 - * @retval None - */ -void IWDG_SetPrescaler(uint8_t IWDG_Prescaler) -{ - /* Check the parameters */ - assert_param(IS_IWDG_PRESCALER(IWDG_Prescaler)); - IWDG->PR = IWDG_Prescaler; -} - -/** - * @brief Sets IWDG Reload value. - * @param Reload: specifies the IWDG Reload value. - * This parameter must be a number between 0 and 0x0FFF. - * @retval None - */ -void IWDG_SetReload(uint16_t Reload) -{ - /* Check the parameters */ - assert_param(IS_IWDG_RELOAD(Reload)); - IWDG->RLR = Reload; -} - -/** - * @brief Reloads IWDG counter with value defined in the reload register - * (write access to IWDG_PR and IWDG_RLR registers disabled). - * @param None - * @retval None - */ -void IWDG_ReloadCounter(void) -{ - IWDG->KR = KR_KEY_Reload; -} - -/** - * @brief Enables IWDG (write access to IWDG_PR and IWDG_RLR registers disabled). - * @param None - * @retval None - */ -void IWDG_Enable(void) -{ - IWDG->KR = KR_KEY_Enable; -} - -/** - * @brief Checks whether the specified IWDG flag is set or not. - * @param IWDG_FLAG: specifies the flag to check. - * This parameter can be one of the following values: - * @arg IWDG_FLAG_PVU: Prescaler Value Update on going - * @arg IWDG_FLAG_RVU: Reload Value Update on going - * @retval The new state of IWDG_FLAG (SET or RESET). - */ -FlagStatus IWDG_GetFlagStatus(uint16_t IWDG_FLAG) -{ - FlagStatus bitstatus = RESET; - /* Check the parameters */ - assert_param(IS_IWDG_FLAG(IWDG_FLAG)); - if ((IWDG->SR & IWDG_FLAG) != (uint32_t)RESET) - { - bitstatus = SET; - } - else - { - bitstatus = RESET; - } - /* Return the flag status */ - return bitstatus; -} - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_pwr.c b/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_pwr.c deleted file mode 100644 index 9066cdebf3..0000000000 --- a/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_pwr.c +++ /dev/null @@ -1,316 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f10x_pwr.c - * @author MCD Application Team - * @version V3.2.0 - * @date 03/01/2010 - * @brief This file provides all the PWR firmware functions. - ****************************************************************************** - * @copy - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2010 STMicroelectronics

- */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x_pwr.h" -#include "stm32f10x_rcc.h" - -/** @addtogroup STM32F10x_StdPeriph_Driver - * @{ - */ - -/** @defgroup PWR - * @brief PWR driver modules - * @{ - */ - -/** @defgroup PWR_Private_TypesDefinitions - * @{ - */ - -/** - * @} - */ - -/** @defgroup PWR_Private_Defines - * @{ - */ - -/* --------- PWR registers bit address in the alias region ---------- */ -#define PWR_OFFSET (PWR_BASE - PERIPH_BASE) - -/* --- CR Register ---*/ - -/* Alias word address of DBP bit */ -#define CR_OFFSET (PWR_OFFSET + 0x00) -#define DBP_BitNumber 0x08 -#define CR_DBP_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (DBP_BitNumber * 4)) - -/* Alias word address of PVDE bit */ -#define PVDE_BitNumber 0x04 -#define CR_PVDE_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (PVDE_BitNumber * 4)) - -/* --- CSR Register ---*/ - -/* Alias word address of EWUP bit */ -#define CSR_OFFSET (PWR_OFFSET + 0x04) -#define EWUP_BitNumber 0x08 -#define CSR_EWUP_BB (PERIPH_BB_BASE + (CSR_OFFSET * 32) + (EWUP_BitNumber * 4)) - -/* ------------------ PWR registers bit mask ------------------------ */ - -/* CR register bit mask */ -#define CR_PDDS_Set ((uint32_t)0x00000002) -#define CR_DS_Mask ((uint32_t)0xFFFFFFFC) -#define CR_CWUF_Set ((uint32_t)0x00000004) -#define CR_PLS_Mask ((uint32_t)0xFFFFFF1F) - -/* --------- Cortex System Control register bit mask ---------------- */ - -/* Cortex System Control register address */ -#define SCB_SysCtrl ((uint32_t)0xE000ED10) - -/* SLEEPDEEP bit mask */ -#define SysCtrl_SLEEPDEEP_Set ((uint32_t)0x00000004) -#define SysCtrl_SLEEPDEEP_Reset ((uint32_t)0xFFFFFFFB) - -/** - * @} - */ - -/** @defgroup PWR_Private_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup PWR_Private_Variables - * @{ - */ - -/** - * @} - */ - -/** @defgroup PWR_Private_FunctionPrototypes - * @{ - */ - -/** - * @} - */ - -/** @defgroup PWR_Private_Functions - * @{ - */ - -/** - * @brief Deinitializes the PWR peripheral registers to their default reset values. - * @param None - * @retval None - */ -void PWR_DeInit(void) -{ - RCC_APB1PeriphResetCmd(RCC_APB1Periph_PWR, ENABLE); - RCC_APB1PeriphResetCmd(RCC_APB1Periph_PWR, DISABLE); -} - -/** - * @brief Enables or disables access to the RTC and backup registers. - * @param NewState: new state of the access to the RTC and backup registers. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void PWR_BackupAccessCmd(FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_FUNCTIONAL_STATE(NewState)); - *(__IO uint32_t *) CR_DBP_BB = (uint32_t)NewState; -} - -/** - * @brief Enables or disables the Power Voltage Detector(PVD). - * @param NewState: new state of the PVD. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void PWR_PVDCmd(FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_FUNCTIONAL_STATE(NewState)); - *(__IO uint32_t *) CR_PVDE_BB = (uint32_t)NewState; -} - -/** - * @brief Configures the voltage threshold detected by the Power Voltage Detector(PVD). - * @param PWR_PVDLevel: specifies the PVD detection level - * This parameter can be one of the following values: - * @arg PWR_PVDLevel_2V2: PVD detection level set to 2.2V - * @arg PWR_PVDLevel_2V3: PVD detection level set to 2.3V - * @arg PWR_PVDLevel_2V4: PVD detection level set to 2.4V - * @arg PWR_PVDLevel_2V5: PVD detection level set to 2.5V - * @arg PWR_PVDLevel_2V6: PVD detection level set to 2.6V - * @arg PWR_PVDLevel_2V7: PVD detection level set to 2.7V - * @arg PWR_PVDLevel_2V8: PVD detection level set to 2.8V - * @arg PWR_PVDLevel_2V9: PVD detection level set to 2.9V - * @retval None - */ -void PWR_PVDLevelConfig(uint32_t PWR_PVDLevel) -{ - uint32_t tmpreg = 0; - /* Check the parameters */ - assert_param(IS_PWR_PVD_LEVEL(PWR_PVDLevel)); - tmpreg = PWR->CR; - /* Clear PLS[7:5] bits */ - tmpreg &= CR_PLS_Mask; - /* Set PLS[7:5] bits according to PWR_PVDLevel value */ - tmpreg |= PWR_PVDLevel; - /* Store the new value */ - PWR->CR = tmpreg; -} - -/** - * @brief Enables or disables the WakeUp Pin functionality. - * @param NewState: new state of the WakeUp Pin functionality. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void PWR_WakeUpPinCmd(FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_FUNCTIONAL_STATE(NewState)); - *(__IO uint32_t *) CSR_EWUP_BB = (uint32_t)NewState; -} - -/** - * @brief Enters STOP mode. - * @param PWR_Regulator: specifies the regulator state in STOP mode. - * This parameter can be one of the following values: - * @arg PWR_Regulator_ON: STOP mode with regulator ON - * @arg PWR_Regulator_LowPower: STOP mode with regulator in low power mode - * @param PWR_STOPEntry: specifies if STOP mode in entered with WFI or WFE instruction. - * This parameter can be one of the following values: - * @arg PWR_STOPEntry_WFI: enter STOP mode with WFI instruction - * @arg PWR_STOPEntry_WFE: enter STOP mode with WFE instruction - * @retval None - */ -void PWR_EnterSTOPMode(uint32_t PWR_Regulator, uint8_t PWR_STOPEntry) -{ - uint32_t tmpreg = 0; - /* Check the parameters */ - assert_param(IS_PWR_REGULATOR(PWR_Regulator)); - assert_param(IS_PWR_STOP_ENTRY(PWR_STOPEntry)); - - /* Select the regulator state in STOP mode ---------------------------------*/ - tmpreg = PWR->CR; - /* Clear PDDS and LPDS bits */ - tmpreg &= CR_DS_Mask; - /* Set LPDS bit according to PWR_Regulator value */ - tmpreg |= PWR_Regulator; - /* Store the new value */ - PWR->CR = tmpreg; - /* Set SLEEPDEEP bit of Cortex System Control Register */ - *(__IO uint32_t *) SCB_SysCtrl |= SysCtrl_SLEEPDEEP_Set; - - /* Select STOP mode entry --------------------------------------------------*/ - if(PWR_STOPEntry == PWR_STOPEntry_WFI) - { - /* Request Wait For Interrupt */ - __WFI(); - } - else - { - /* Request Wait For Event */ - __WFE(); - } - - /* Reset SLEEPDEEP bit of Cortex System Control Register */ - *(__IO uint32_t *) SCB_SysCtrl &= SysCtrl_SLEEPDEEP_Reset; -} - -/** - * @brief Enters STANDBY mode. - * @param None - * @retval None - */ -void PWR_EnterSTANDBYMode(void) -{ - /* Clear Wake-up flag */ - PWR->CR |= CR_CWUF_Set; - /* Select STANDBY mode */ - PWR->CR |= CR_PDDS_Set; - /* Set SLEEPDEEP bit of Cortex System Control Register */ - *(__IO uint32_t *) SCB_SysCtrl |= SysCtrl_SLEEPDEEP_Set; -/* This option is used to ensure that store operations are completed */ -#if defined ( __CC_ARM ) - __force_stores(); -#endif - /* Request Wait For Interrupt */ - __WFI(); -} - -/** - * @brief Checks whether the specified PWR flag is set or not. - * @param PWR_FLAG: specifies the flag to check. - * This parameter can be one of the following values: - * @arg PWR_FLAG_WU: Wake Up flag - * @arg PWR_FLAG_SB: StandBy flag - * @arg PWR_FLAG_PVDO: PVD Output - * @retval The new state of PWR_FLAG (SET or RESET). - */ -FlagStatus PWR_GetFlagStatus(uint32_t PWR_FLAG) -{ - FlagStatus bitstatus = RESET; - /* Check the parameters */ - assert_param(IS_PWR_GET_FLAG(PWR_FLAG)); - - if ((PWR->CSR & PWR_FLAG) != (uint32_t)RESET) - { - bitstatus = SET; - } - else - { - bitstatus = RESET; - } - /* Return the flag status */ - return bitstatus; -} - -/** - * @brief Clears the PWR's pending flags. - * @param PWR_FLAG: specifies the flag to clear. - * This parameter can be one of the following values: - * @arg PWR_FLAG_WU: Wake Up flag - * @arg PWR_FLAG_SB: StandBy flag - * @retval None - */ -void PWR_ClearFlag(uint32_t PWR_FLAG) -{ - /* Check the parameters */ - assert_param(IS_PWR_CLEAR_FLAG(PWR_FLAG)); - - PWR->CR |= PWR_FLAG << 2; -} - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c b/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c deleted file mode 100644 index 55ae18dee6..0000000000 --- a/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c +++ /dev/null @@ -1,1473 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f10x_rcc.c - * @author MCD Application Team - * @version V3.2.0 - * @date 03/01/2010 - * @brief This file provides all the RCC firmware functions. - ****************************************************************************** - * @copy - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2010 STMicroelectronics

- */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x_rcc.h" - -/** @addtogroup STM32F10x_StdPeriph_Driver - * @{ - */ - -/** @defgroup RCC - * @brief RCC driver modules - * @{ - */ - -/** @defgroup RCC_Private_TypesDefinitions - * @{ - */ - -/** - * @} - */ - -/** @defgroup RCC_Private_Defines - * @{ - */ - -/* ------------ RCC registers bit address in the alias region ----------- */ -#define RCC_OFFSET (RCC_BASE - PERIPH_BASE) - -/* --- CR Register ---*/ - -/* Alias word address of HSION bit */ -#define CR_OFFSET (RCC_OFFSET + 0x00) -#define HSION_BitNumber 0x00 -#define CR_HSION_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (HSION_BitNumber * 4)) - -/* Alias word address of PLLON bit */ -#define PLLON_BitNumber 0x18 -#define CR_PLLON_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (PLLON_BitNumber * 4)) - -#ifdef STM32F10X_CL - /* Alias word address of PLL2ON bit */ - #define PLL2ON_BitNumber 0x1A - #define CR_PLL2ON_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (PLL2ON_BitNumber * 4)) - - /* Alias word address of PLL3ON bit */ - #define PLL3ON_BitNumber 0x1C - #define CR_PLL3ON_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (PLL3ON_BitNumber * 4)) -#endif /* STM32F10X_CL */ - -/* Alias word address of CSSON bit */ -#define CSSON_BitNumber 0x13 -#define CR_CSSON_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (CSSON_BitNumber * 4)) - -/* --- CFGR Register ---*/ - -/* Alias word address of USBPRE bit */ -#define CFGR_OFFSET (RCC_OFFSET + 0x04) - -#ifndef STM32F10X_CL - #define USBPRE_BitNumber 0x16 - #define CFGR_USBPRE_BB (PERIPH_BB_BASE + (CFGR_OFFSET * 32) + (USBPRE_BitNumber * 4)) -#else - #define OTGFSPRE_BitNumber 0x16 - #define CFGR_OTGFSPRE_BB (PERIPH_BB_BASE + (CFGR_OFFSET * 32) + (OTGFSPRE_BitNumber * 4)) -#endif /* STM32F10X_CL */ - -/* --- BDCR Register ---*/ - -/* Alias word address of RTCEN bit */ -#define BDCR_OFFSET (RCC_OFFSET + 0x20) -#define RTCEN_BitNumber 0x0F -#define BDCR_RTCEN_BB (PERIPH_BB_BASE + (BDCR_OFFSET * 32) + (RTCEN_BitNumber * 4)) - -/* Alias word address of BDRST bit */ -#define BDRST_BitNumber 0x10 -#define BDCR_BDRST_BB (PERIPH_BB_BASE + (BDCR_OFFSET * 32) + (BDRST_BitNumber * 4)) - -/* --- CSR Register ---*/ - -/* Alias word address of LSION bit */ -#define CSR_OFFSET (RCC_OFFSET + 0x24) -#define LSION_BitNumber 0x00 -#define CSR_LSION_BB (PERIPH_BB_BASE + (CSR_OFFSET * 32) + (LSION_BitNumber * 4)) - -#ifdef STM32F10X_CL -/* --- CFGR2 Register ---*/ - - /* Alias word address of I2S2SRC bit */ - #define CFGR2_OFFSET (RCC_OFFSET + 0x2C) - #define I2S2SRC_BitNumber 0x11 - #define CFGR2_I2S2SRC_BB (PERIPH_BB_BASE + (CFGR2_OFFSET * 32) + (I2S2SRC_BitNumber * 4)) - - /* Alias word address of I2S3SRC bit */ - #define I2S3SRC_BitNumber 0x12 - #define CFGR2_I2S3SRC_BB (PERIPH_BB_BASE + (CFGR2_OFFSET * 32) + (I2S3SRC_BitNumber * 4)) -#endif /* STM32F10X_CL */ - -/* ---------------------- RCC registers bit mask ------------------------ */ - -/* CR register bit mask */ -#define CR_HSEBYP_Reset ((uint32_t)0xFFFBFFFF) -#define CR_HSEBYP_Set ((uint32_t)0x00040000) -#define CR_HSEON_Reset ((uint32_t)0xFFFEFFFF) -#define CR_HSEON_Set ((uint32_t)0x00010000) -#define CR_HSITRIM_Mask ((uint32_t)0xFFFFFF07) - -/* CFGR register bit mask */ -#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_CL) - #define CFGR_PLL_Mask ((uint32_t)0xFFC2FFFF) -#else - #define CFGR_PLL_Mask ((uint32_t)0xFFC0FFFF) -#endif /* STM32F10X_CL */ - -#define CFGR_PLLMull_Mask ((uint32_t)0x003C0000) -#define CFGR_PLLSRC_Mask ((uint32_t)0x00010000) -#define CFGR_PLLXTPRE_Mask ((uint32_t)0x00020000) -#define CFGR_SWS_Mask ((uint32_t)0x0000000C) -#define CFGR_SW_Mask ((uint32_t)0xFFFFFFFC) -#define CFGR_HPRE_Reset_Mask ((uint32_t)0xFFFFFF0F) -#define CFGR_HPRE_Set_Mask ((uint32_t)0x000000F0) -#define CFGR_PPRE1_Reset_Mask ((uint32_t)0xFFFFF8FF) -#define CFGR_PPRE1_Set_Mask ((uint32_t)0x00000700) -#define CFGR_PPRE2_Reset_Mask ((uint32_t)0xFFFFC7FF) -#define CFGR_PPRE2_Set_Mask ((uint32_t)0x00003800) -#define CFGR_ADCPRE_Reset_Mask ((uint32_t)0xFFFF3FFF) -#define CFGR_ADCPRE_Set_Mask ((uint32_t)0x0000C000) - -/* CSR register bit mask */ -#define CSR_RMVF_Set ((uint32_t)0x01000000) - -#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_CL) -/* CFGR2 register bit mask */ - #define CFGR2_PREDIV1SRC ((uint32_t)0x00010000) - #define CFGR2_PREDIV1 ((uint32_t)0x0000000F) -#endif -#ifdef STM32F10X_CL - #define CFGR2_PREDIV2 ((uint32_t)0x000000F0) - #define CFGR2_PLL2MUL ((uint32_t)0x00000F00) - #define CFGR2_PLL3MUL ((uint32_t)0x0000F000) -#endif /* STM32F10X_CL */ - -/* RCC Flag Mask */ -#define FLAG_Mask ((uint8_t)0x1F) - -#ifndef HSI_Value -/* Typical Value of the HSI in Hz */ - #define HSI_Value ((uint32_t)8000000) -#endif /* HSI_Value */ - -/* CIR register byte 2 (Bits[15:8]) base address */ -#define CIR_BYTE2_ADDRESS ((uint32_t)0x40021009) - -/* CIR register byte 3 (Bits[23:16]) base address */ -#define CIR_BYTE3_ADDRESS ((uint32_t)0x4002100A) - -/* CFGR register byte 4 (Bits[31:24]) base address */ -#define CFGR_BYTE4_ADDRESS ((uint32_t)0x40021007) - -/* BDCR register base address */ -#define BDCR_ADDRESS (PERIPH_BASE + BDCR_OFFSET) - -#ifndef HSEStartUp_TimeOut -/* Time out for HSE start up */ - #define HSEStartUp_TimeOut ((uint16_t)0x0500) -#endif /* HSEStartUp_TimeOut */ - -/** - * @} - */ - -/** @defgroup RCC_Private_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup RCC_Private_Variables - * @{ - */ - -static __I uint8_t APBAHBPrescTable[16] = {0, 0, 0, 0, 1, 2, 3, 4, 1, 2, 3, 4, 6, 7, 8, 9}; -static __I uint8_t ADCPrescTable[4] = {2, 4, 6, 8}; - -/** - * @} - */ - -/** @defgroup RCC_Private_FunctionPrototypes - * @{ - */ - -/** - * @} - */ - -/** @defgroup RCC_Private_Functions - * @{ - */ - -/** - * @brief Resets the RCC clock configuration to the default reset state. - * @param None - * @retval None - */ -void RCC_DeInit(void) -{ - /* Set HSION bit */ - RCC->CR |= (uint32_t)0x00000001; - - /* Reset SW, HPRE, PPRE1, PPRE2, ADCPRE and MCO bits */ -#ifndef STM32F10X_CL - RCC->CFGR &= (uint32_t)0xF8FF0000; -#else - RCC->CFGR &= (uint32_t)0xF0FF0000; -#endif /* STM32F10X_CL */ - - /* Reset HSEON, CSSON and PLLON bits */ - RCC->CR &= (uint32_t)0xFEF6FFFF; - - /* Reset HSEBYP bit */ - RCC->CR &= (uint32_t)0xFFFBFFFF; - - /* Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE/OTGFSPRE bits */ - RCC->CFGR &= (uint32_t)0xFF80FFFF; - -#ifdef STM32F10X_CL - /* Reset PLL2ON and PLL3ON bits */ - RCC->CR &= (uint32_t)0xEBFFFFFF; - - /* Disable all interrupts and clear pending bits */ - RCC->CIR = 0x00FF0000; - - /* Reset CFGR2 register */ - RCC->CFGR2 = 0x00000000; -#elif defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) - /* Disable all interrupts and clear pending bits */ - RCC->CIR = 0x009F0000; - - /* Reset CFGR2 register */ - RCC->CFGR2 = 0x00000000; -#else - /* Disable all interrupts and clear pending bits */ - RCC->CIR = 0x009F0000; -#endif /* STM32F10X_CL */ - -} - -/** - * @brief Configures the External High Speed oscillator (HSE). - * @note HSE can not be stopped if it is used directly or through the PLL as system clock. - * @param RCC_HSE: specifies the new state of the HSE. - * This parameter can be one of the following values: - * @arg RCC_HSE_OFF: HSE oscillator OFF - * @arg RCC_HSE_ON: HSE oscillator ON - * @arg RCC_HSE_Bypass: HSE oscillator bypassed with external clock - * @retval None - */ -void RCC_HSEConfig(uint32_t RCC_HSE) -{ - /* Check the parameters */ - assert_param(IS_RCC_HSE(RCC_HSE)); - /* Reset HSEON and HSEBYP bits before configuring the HSE ------------------*/ - /* Reset HSEON bit */ - RCC->CR &= CR_HSEON_Reset; - /* Reset HSEBYP bit */ - RCC->CR &= CR_HSEBYP_Reset; - /* Configure HSE (RCC_HSE_OFF is already covered by the code section above) */ - switch(RCC_HSE) - { - case RCC_HSE_ON: - /* Set HSEON bit */ - RCC->CR |= CR_HSEON_Set; - break; - - case RCC_HSE_Bypass: - /* Set HSEBYP and HSEON bits */ - RCC->CR |= CR_HSEBYP_Set | CR_HSEON_Set; - break; - - default: - break; - } -} - -/** - * @brief Waits for HSE start-up. - * @param None - * @retval An ErrorStatus enumuration value: - * - SUCCESS: HSE oscillator is stable and ready to use - * - ERROR: HSE oscillator not yet ready - */ -ErrorStatus RCC_WaitForHSEStartUp(void) -{ - __IO uint32_t StartUpCounter = 0; - ErrorStatus status = ERROR; - FlagStatus HSEStatus = RESET; - - /* Wait till HSE is ready and if Time out is reached exit */ - do - { - HSEStatus = RCC_GetFlagStatus(RCC_FLAG_HSERDY); - StartUpCounter++; - } while((StartUpCounter != HSEStartUp_TimeOut) && (HSEStatus == RESET)); - - if (RCC_GetFlagStatus(RCC_FLAG_HSERDY) != RESET) - { - status = SUCCESS; - } - else - { - status = ERROR; - } - return (status); -} - -/** - * @brief Adjusts the Internal High Speed oscillator (HSI) calibration value. - * @param HSICalibrationValue: specifies the calibration trimming value. - * This parameter must be a number between 0 and 0x1F. - * @retval None - */ -void RCC_AdjustHSICalibrationValue(uint8_t HSICalibrationValue) -{ - uint32_t tmpreg = 0; - /* Check the parameters */ - assert_param(IS_RCC_CALIBRATION_VALUE(HSICalibrationValue)); - tmpreg = RCC->CR; - /* Clear HSITRIM[4:0] bits */ - tmpreg &= CR_HSITRIM_Mask; - /* Set the HSITRIM[4:0] bits according to HSICalibrationValue value */ - tmpreg |= (uint32_t)HSICalibrationValue << 3; - /* Store the new value */ - RCC->CR = tmpreg; -} - -/** - * @brief Enables or disables the Internal High Speed oscillator (HSI). - * @note HSI can not be stopped if it is used directly or through the PLL as system clock. - * @param NewState: new state of the HSI. This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void RCC_HSICmd(FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_FUNCTIONAL_STATE(NewState)); - *(__IO uint32_t *) CR_HSION_BB = (uint32_t)NewState; -} - -/** - * @brief Configures the PLL clock source and multiplication factor. - * @note This function must be used only when the PLL is disabled. - * @param RCC_PLLSource: specifies the PLL entry clock source. - * For @b STM32_Connectivity_line_devices or @b STM32_Value_line_devices, - * this parameter can be one of the following values: - * @arg RCC_PLLSource_HSI_Div2: HSI oscillator clock divided by 2 selected as PLL clock entry - * @arg RCC_PLLSource_PREDIV1: PREDIV1 clock selected as PLL clock entry - * For @b other_STM32_devices, this parameter can be one of the following values: - * @arg RCC_PLLSource_HSI_Div2: HSI oscillator clock divided by 2 selected as PLL clock entry - * @arg RCC_PLLSource_HSE_Div1: HSE oscillator clock selected as PLL clock entry - * @arg RCC_PLLSource_HSE_Div2: HSE oscillator clock divided by 2 selected as PLL clock entry - * @param RCC_PLLMul: specifies the PLL multiplication factor. - * For @b STM32_Connectivity_line_devices, this parameter can be RCC_PLLMul_x where x:{[4,9], 6_5} - * For @b other_STM32_devices, this parameter can be RCC_PLLMul_x where x:[2,16] - * @retval None - */ -void RCC_PLLConfig(uint32_t RCC_PLLSource, uint32_t RCC_PLLMul) -{ - uint32_t tmpreg = 0; - - /* Check the parameters */ - assert_param(IS_RCC_PLL_SOURCE(RCC_PLLSource)); - assert_param(IS_RCC_PLL_MUL(RCC_PLLMul)); - - tmpreg = RCC->CFGR; - /* Clear PLLSRC, PLLXTPRE and PLLMUL[3:0] bits */ - tmpreg &= CFGR_PLL_Mask; - /* Set the PLL configuration bits */ - tmpreg |= RCC_PLLSource | RCC_PLLMul; - /* Store the new value */ - RCC->CFGR = tmpreg; -} - -/** - * @brief Enables or disables the PLL. - * @note The PLL can not be disabled if it is used as system clock. - * @param NewState: new state of the PLL. This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void RCC_PLLCmd(FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_FUNCTIONAL_STATE(NewState)); - - *(__IO uint32_t *) CR_PLLON_BB = (uint32_t)NewState; -} - -#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_CL) -/** - * @brief Configures the PREDIV1 division factor. - * @note - * - This function must be used only when the PLL is disabled. - * - This function applies only to STM32 Connectivity line and Value line - * devices. - * @param RCC_PREDIV1_Source: specifies the PREDIV1 clock source. - * This parameter can be one of the following values: - * @arg RCC_PREDIV1_Source_HSE: HSE selected as PREDIV1 clock - * @arg RCC_PREDIV1_Source_PLL2: PLL2 selected as PREDIV1 clock - * @note - * For @b STM32_Value_line_devices this parameter is always RCC_PREDIV1_Source_HSE - * @param RCC_PREDIV1_Div: specifies the PREDIV1 clock division factor. - * This parameter can be RCC_PREDIV1_Divx where x:[1,16] - * @retval None - */ -void RCC_PREDIV1Config(uint32_t RCC_PREDIV1_Source, uint32_t RCC_PREDIV1_Div) -{ - uint32_t tmpreg = 0; - - /* Check the parameters */ - assert_param(IS_RCC_PREDIV1_SOURCE(RCC_PREDIV1_Source)); - assert_param(IS_RCC_PREDIV1(RCC_PREDIV1_Div)); - - tmpreg = RCC->CFGR2; - /* Clear PREDIV1[3:0] and PREDIV1SRC bits */ - tmpreg &= ~(CFGR2_PREDIV1 | CFGR2_PREDIV1SRC); - /* Set the PREDIV1 clock source and division factor */ - tmpreg |= RCC_PREDIV1_Source | RCC_PREDIV1_Div ; - /* Store the new value */ - RCC->CFGR2 = tmpreg; -} -#endif - -#ifdef STM32F10X_CL -/** - * @brief Configures the PREDIV2 division factor. - * @note - * - This function must be used only when both PLL2 and PLL3 are disabled. - * - This function applies only to STM32 Connectivity line devices. - * @param RCC_PREDIV2_Div: specifies the PREDIV2 clock division factor. - * This parameter can be RCC_PREDIV2_Divx where x:[1,16] - * @retval None - */ -void RCC_PREDIV2Config(uint32_t RCC_PREDIV2_Div) -{ - uint32_t tmpreg = 0; - - /* Check the parameters */ - assert_param(IS_RCC_PREDIV2(RCC_PREDIV2_Div)); - - tmpreg = RCC->CFGR2; - /* Clear PREDIV2[3:0] bits */ - tmpreg &= ~CFGR2_PREDIV2; - /* Set the PREDIV2 division factor */ - tmpreg |= RCC_PREDIV2_Div; - /* Store the new value */ - RCC->CFGR2 = tmpreg; -} - -/** - * @brief Configures the PLL2 multiplication factor. - * @note - * - This function must be used only when the PLL2 is disabled. - * - This function applies only to STM32 Connectivity line devices. - * @param RCC_PLL2Mul: specifies the PLL2 multiplication factor. - * This parameter can be RCC_PLL2Mul_x where x:{[8,14], 16, 20} - * @retval None - */ -void RCC_PLL2Config(uint32_t RCC_PLL2Mul) -{ - uint32_t tmpreg = 0; - - /* Check the parameters */ - assert_param(IS_RCC_PLL2_MUL(RCC_PLL2Mul)); - - tmpreg = RCC->CFGR2; - /* Clear PLL2Mul[3:0] bits */ - tmpreg &= ~CFGR2_PLL2MUL; - /* Set the PLL2 configuration bits */ - tmpreg |= RCC_PLL2Mul; - /* Store the new value */ - RCC->CFGR2 = tmpreg; -} - - -/** - * @brief Enables or disables the PLL2. - * @note - * - The PLL2 can not be disabled if it is used indirectly as system clock - * (i.e. it is used as PLL clock entry that is used as System clock). - * - This function applies only to STM32 Connectivity line devices. - * @param NewState: new state of the PLL2. This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void RCC_PLL2Cmd(FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_FUNCTIONAL_STATE(NewState)); - - *(__IO uint32_t *) CR_PLL2ON_BB = (uint32_t)NewState; -} - - -/** - * @brief Configures the PLL3 multiplication factor. - * @note - * - This function must be used only when the PLL3 is disabled. - * - This function applies only to STM32 Connectivity line devices. - * @param RCC_PLL3Mul: specifies the PLL3 multiplication factor. - * This parameter can be RCC_PLL3Mul_x where x:{[8,14], 16, 20} - * @retval None - */ -void RCC_PLL3Config(uint32_t RCC_PLL3Mul) -{ - uint32_t tmpreg = 0; - - /* Check the parameters */ - assert_param(IS_RCC_PLL3_MUL(RCC_PLL3Mul)); - - tmpreg = RCC->CFGR2; - /* Clear PLL3Mul[3:0] bits */ - tmpreg &= ~CFGR2_PLL3MUL; - /* Set the PLL3 configuration bits */ - tmpreg |= RCC_PLL3Mul; - /* Store the new value */ - RCC->CFGR2 = tmpreg; -} - - -/** - * @brief Enables or disables the PLL3. - * @note This function applies only to STM32 Connectivity line devices. - * @param NewState: new state of the PLL3. This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void RCC_PLL3Cmd(FunctionalState NewState) -{ - /* Check the parameters */ - - assert_param(IS_FUNCTIONAL_STATE(NewState)); - *(__IO uint32_t *) CR_PLL3ON_BB = (uint32_t)NewState; -} -#endif /* STM32F10X_CL */ - -/** - * @brief Configures the system clock (SYSCLK). - * @param RCC_SYSCLKSource: specifies the clock source used as system clock. - * This parameter can be one of the following values: - * @arg RCC_SYSCLKSource_HSI: HSI selected as system clock - * @arg RCC_SYSCLKSource_HSE: HSE selected as system clock - * @arg RCC_SYSCLKSource_PLLCLK: PLL selected as system clock - * @retval None - */ -void RCC_SYSCLKConfig(uint32_t RCC_SYSCLKSource) -{ - uint32_t tmpreg = 0; - /* Check the parameters */ - assert_param(IS_RCC_SYSCLK_SOURCE(RCC_SYSCLKSource)); - tmpreg = RCC->CFGR; - /* Clear SW[1:0] bits */ - tmpreg &= CFGR_SW_Mask; - /* Set SW[1:0] bits according to RCC_SYSCLKSource value */ - tmpreg |= RCC_SYSCLKSource; - /* Store the new value */ - RCC->CFGR = tmpreg; -} - -/** - * @brief Returns the clock source used as system clock. - * @param None - * @retval The clock source used as system clock. The returned value can - * be one of the following: - * - 0x00: HSI used as system clock - * - 0x04: HSE used as system clock - * - 0x08: PLL used as system clock - */ -uint8_t RCC_GetSYSCLKSource(void) -{ - return ((uint8_t)(RCC->CFGR & CFGR_SWS_Mask)); -} - -/** - * @brief Configures the AHB clock (HCLK). - * @param RCC_SYSCLK: defines the AHB clock divider. This clock is derived from - * the system clock (SYSCLK). - * This parameter can be one of the following values: - * @arg RCC_SYSCLK_Div1: AHB clock = SYSCLK - * @arg RCC_SYSCLK_Div2: AHB clock = SYSCLK/2 - * @arg RCC_SYSCLK_Div4: AHB clock = SYSCLK/4 - * @arg RCC_SYSCLK_Div8: AHB clock = SYSCLK/8 - * @arg RCC_SYSCLK_Div16: AHB clock = SYSCLK/16 - * @arg RCC_SYSCLK_Div64: AHB clock = SYSCLK/64 - * @arg RCC_SYSCLK_Div128: AHB clock = SYSCLK/128 - * @arg RCC_SYSCLK_Div256: AHB clock = SYSCLK/256 - * @arg RCC_SYSCLK_Div512: AHB clock = SYSCLK/512 - * @retval None - */ -void RCC_HCLKConfig(uint32_t RCC_SYSCLK) -{ - uint32_t tmpreg = 0; - /* Check the parameters */ - assert_param(IS_RCC_HCLK(RCC_SYSCLK)); - tmpreg = RCC->CFGR; - /* Clear HPRE[3:0] bits */ - tmpreg &= CFGR_HPRE_Reset_Mask; - /* Set HPRE[3:0] bits according to RCC_SYSCLK value */ - tmpreg |= RCC_SYSCLK; - /* Store the new value */ - RCC->CFGR = tmpreg; -} - -/** - * @brief Configures the Low Speed APB clock (PCLK1). - * @param RCC_HCLK: defines the APB1 clock divider. This clock is derived from - * the AHB clock (HCLK). - * This parameter can be one of the following values: - * @arg RCC_HCLK_Div1: APB1 clock = HCLK - * @arg RCC_HCLK_Div2: APB1 clock = HCLK/2 - * @arg RCC_HCLK_Div4: APB1 clock = HCLK/4 - * @arg RCC_HCLK_Div8: APB1 clock = HCLK/8 - * @arg RCC_HCLK_Div16: APB1 clock = HCLK/16 - * @retval None - */ -void RCC_PCLK1Config(uint32_t RCC_HCLK) -{ - uint32_t tmpreg = 0; - /* Check the parameters */ - assert_param(IS_RCC_PCLK(RCC_HCLK)); - tmpreg = RCC->CFGR; - /* Clear PPRE1[2:0] bits */ - tmpreg &= CFGR_PPRE1_Reset_Mask; - /* Set PPRE1[2:0] bits according to RCC_HCLK value */ - tmpreg |= RCC_HCLK; - /* Store the new value */ - RCC->CFGR = tmpreg; -} - -/** - * @brief Configures the High Speed APB clock (PCLK2). - * @param RCC_HCLK: defines the APB2 clock divider. This clock is derived from - * the AHB clock (HCLK). - * This parameter can be one of the following values: - * @arg RCC_HCLK_Div1: APB2 clock = HCLK - * @arg RCC_HCLK_Div2: APB2 clock = HCLK/2 - * @arg RCC_HCLK_Div4: APB2 clock = HCLK/4 - * @arg RCC_HCLK_Div8: APB2 clock = HCLK/8 - * @arg RCC_HCLK_Div16: APB2 clock = HCLK/16 - * @retval None - */ -void RCC_PCLK2Config(uint32_t RCC_HCLK) -{ - uint32_t tmpreg = 0; - /* Check the parameters */ - assert_param(IS_RCC_PCLK(RCC_HCLK)); - tmpreg = RCC->CFGR; - /* Clear PPRE2[2:0] bits */ - tmpreg &= CFGR_PPRE2_Reset_Mask; - /* Set PPRE2[2:0] bits according to RCC_HCLK value */ - tmpreg |= RCC_HCLK << 3; - /* Store the new value */ - RCC->CFGR = tmpreg; -} - -/** - * @brief Enables or disables the specified RCC interrupts. - * @param RCC_IT: specifies the RCC interrupt sources to be enabled or disabled. - * - * For @b STM32_Connectivity_line_devices, this parameter can be any combination - * of the following values - * @arg RCC_IT_LSIRDY: LSI ready interrupt - * @arg RCC_IT_LSERDY: LSE ready interrupt - * @arg RCC_IT_HSIRDY: HSI ready interrupt - * @arg RCC_IT_HSERDY: HSE ready interrupt - * @arg RCC_IT_PLLRDY: PLL ready interrupt - * @arg RCC_IT_PLL2RDY: PLL2 ready interrupt - * @arg RCC_IT_PLL3RDY: PLL3 ready interrupt - * - * For @b other_STM32_devices, this parameter can be any combination of the - * following values - * @arg RCC_IT_LSIRDY: LSI ready interrupt - * @arg RCC_IT_LSERDY: LSE ready interrupt - * @arg RCC_IT_HSIRDY: HSI ready interrupt - * @arg RCC_IT_HSERDY: HSE ready interrupt - * @arg RCC_IT_PLLRDY: PLL ready interrupt - * - * @param NewState: new state of the specified RCC interrupts. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void RCC_ITConfig(uint8_t RCC_IT, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_RCC_IT(RCC_IT)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - if (NewState != DISABLE) - { - /* Perform Byte access to RCC_CIR bits to enable the selected interrupts */ - *(__IO uint8_t *) CIR_BYTE2_ADDRESS |= RCC_IT; - } - else - { - /* Perform Byte access to RCC_CIR bits to disable the selected interrupts */ - *(__IO uint8_t *) CIR_BYTE2_ADDRESS &= (uint8_t)~RCC_IT; - } -} - -#ifndef STM32F10X_CL -/** - * @brief Configures the USB clock (USBCLK). - * @param RCC_USBCLKSource: specifies the USB clock source. This clock is - * derived from the PLL output. - * This parameter can be one of the following values: - * @arg RCC_USBCLKSource_PLLCLK_1Div5: PLL clock divided by 1,5 selected as USB - * clock source - * @arg RCC_USBCLKSource_PLLCLK_Div1: PLL clock selected as USB clock source - * @retval None - */ -void RCC_USBCLKConfig(uint32_t RCC_USBCLKSource) -{ - /* Check the parameters */ - assert_param(IS_RCC_USBCLK_SOURCE(RCC_USBCLKSource)); - - *(__IO uint32_t *) CFGR_USBPRE_BB = RCC_USBCLKSource; -} -#else -/** - * @brief Configures the USB OTG FS clock (OTGFSCLK). - * This function applies only to STM32 Connectivity line devices. - * @param RCC_OTGFSCLKSource: specifies the USB OTG FS clock source. - * This clock is derived from the PLL output. - * This parameter can be one of the following values: - * @arg RCC_OTGFSCLKSource_PLLVCO_Div3: PLL VCO clock divided by 2 selected as USB OTG FS clock source - * @arg RCC_OTGFSCLKSource_PLLVCO_Div2: PLL VCO clock divided by 2 selected as USB OTG FS clock source - * @retval None - */ -void RCC_OTGFSCLKConfig(uint32_t RCC_OTGFSCLKSource) -{ - /* Check the parameters */ - assert_param(IS_RCC_OTGFSCLK_SOURCE(RCC_OTGFSCLKSource)); - - *(__IO uint32_t *) CFGR_OTGFSPRE_BB = RCC_OTGFSCLKSource; -} -#endif /* STM32F10X_CL */ - -/** - * @brief Configures the ADC clock (ADCCLK). - * @param RCC_PCLK2: defines the ADC clock divider. This clock is derived from - * the APB2 clock (PCLK2). - * This parameter can be one of the following values: - * @arg RCC_PCLK2_Div2: ADC clock = PCLK2/2 - * @arg RCC_PCLK2_Div4: ADC clock = PCLK2/4 - * @arg RCC_PCLK2_Div6: ADC clock = PCLK2/6 - * @arg RCC_PCLK2_Div8: ADC clock = PCLK2/8 - * @retval None - */ -void RCC_ADCCLKConfig(uint32_t RCC_PCLK2) -{ - uint32_t tmpreg = 0; - /* Check the parameters */ - assert_param(IS_RCC_ADCCLK(RCC_PCLK2)); - tmpreg = RCC->CFGR; - /* Clear ADCPRE[1:0] bits */ - tmpreg &= CFGR_ADCPRE_Reset_Mask; - /* Set ADCPRE[1:0] bits according to RCC_PCLK2 value */ - tmpreg |= RCC_PCLK2; - /* Store the new value */ - RCC->CFGR = tmpreg; -} - -#ifdef STM32F10X_CL -/** - * @brief Configures the I2S2 clock source(I2S2CLK). - * @note - * - This function must be called before enabling I2S2 APB clock. - * - This function applies only to STM32 Connectivity line devices. - * @param RCC_I2S2CLKSource: specifies the I2S2 clock source. - * This parameter can be one of the following values: - * @arg RCC_I2S2CLKSource_SYSCLK: system clock selected as I2S2 clock entry - * @arg RCC_I2S2CLKSource_PLL3_VCO: PLL3 VCO clock selected as I2S2 clock entry - * @retval None - */ -void RCC_I2S2CLKConfig(uint32_t RCC_I2S2CLKSource) -{ - /* Check the parameters */ - assert_param(IS_RCC_I2S2CLK_SOURCE(RCC_I2S2CLKSource)); - - *(__IO uint32_t *) CFGR2_I2S2SRC_BB = RCC_I2S2CLKSource; -} - -/** - * @brief Configures the I2S3 clock source(I2S2CLK). - * @note - * - This function must be called before enabling I2S3 APB clock. - * - This function applies only to STM32 Connectivity line devices. - * @param RCC_I2S3CLKSource: specifies the I2S3 clock source. - * This parameter can be one of the following values: - * @arg RCC_I2S3CLKSource_SYSCLK: system clock selected as I2S3 clock entry - * @arg RCC_I2S3CLKSource_PLL3_VCO: PLL3 VCO clock selected as I2S3 clock entry - * @retval None - */ -void RCC_I2S3CLKConfig(uint32_t RCC_I2S3CLKSource) -{ - /* Check the parameters */ - assert_param(IS_RCC_I2S3CLK_SOURCE(RCC_I2S3CLKSource)); - - *(__IO uint32_t *) CFGR2_I2S3SRC_BB = RCC_I2S3CLKSource; -} -#endif /* STM32F10X_CL */ - -/** - * @brief Configures the External Low Speed oscillator (LSE). - * @param RCC_LSE: specifies the new state of the LSE. - * This parameter can be one of the following values: - * @arg RCC_LSE_OFF: LSE oscillator OFF - * @arg RCC_LSE_ON: LSE oscillator ON - * @arg RCC_LSE_Bypass: LSE oscillator bypassed with external clock - * @retval None - */ -void RCC_LSEConfig(uint8_t RCC_LSE) -{ - /* Check the parameters */ - assert_param(IS_RCC_LSE(RCC_LSE)); - /* Reset LSEON and LSEBYP bits before configuring the LSE ------------------*/ - /* Reset LSEON bit */ - *(__IO uint8_t *) BDCR_ADDRESS = RCC_LSE_OFF; - /* Reset LSEBYP bit */ - *(__IO uint8_t *) BDCR_ADDRESS = RCC_LSE_OFF; - /* Configure LSE (RCC_LSE_OFF is already covered by the code section above) */ - switch(RCC_LSE) - { - case RCC_LSE_ON: - /* Set LSEON bit */ - *(__IO uint8_t *) BDCR_ADDRESS = RCC_LSE_ON; - break; - - case RCC_LSE_Bypass: - /* Set LSEBYP and LSEON bits */ - *(__IO uint8_t *) BDCR_ADDRESS = RCC_LSE_Bypass | RCC_LSE_ON; - break; - - default: - break; - } -} - -/** - * @brief Enables or disables the Internal Low Speed oscillator (LSI). - * @note LSI can not be disabled if the IWDG is running. - * @param NewState: new state of the LSI. This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void RCC_LSICmd(FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_FUNCTIONAL_STATE(NewState)); - *(__IO uint32_t *) CSR_LSION_BB = (uint32_t)NewState; -} - -/** - * @brief Configures the RTC clock (RTCCLK). - * @note Once the RTC clock is selected it can’t be changed unless the Backup domain is reset. - * @param RCC_RTCCLKSource: specifies the RTC clock source. - * This parameter can be one of the following values: - * @arg RCC_RTCCLKSource_LSE: LSE selected as RTC clock - * @arg RCC_RTCCLKSource_LSI: LSI selected as RTC clock - * @arg RCC_RTCCLKSource_HSE_Div128: HSE clock divided by 128 selected as RTC clock - * @retval None - */ -void RCC_RTCCLKConfig(uint32_t RCC_RTCCLKSource) -{ - /* Check the parameters */ - assert_param(IS_RCC_RTCCLK_SOURCE(RCC_RTCCLKSource)); - /* Select the RTC clock source */ - RCC->BDCR |= RCC_RTCCLKSource; -} - -/** - * @brief Enables or disables the RTC clock. - * @note This function must be used only after the RTC clock was selected using the RCC_RTCCLKConfig function. - * @param NewState: new state of the RTC clock. This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void RCC_RTCCLKCmd(FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_FUNCTIONAL_STATE(NewState)); - *(__IO uint32_t *) BDCR_RTCEN_BB = (uint32_t)NewState; -} - -/** - * @brief Returns the frequencies of different on chip clocks. - * @param RCC_Clocks: pointer to a RCC_ClocksTypeDef structure which will hold - * the clocks frequencies. - * @retval None - */ -void RCC_GetClocksFreq(RCC_ClocksTypeDef* RCC_Clocks) -{ - uint32_t tmp = 0, pllmull = 0, pllsource = 0, presc = 0; - -#ifdef STM32F10X_CL - uint32_t prediv1source = 0, prediv1factor = 0, prediv2factor = 0, pll2mull = 0; -#endif /* STM32F10X_CL */ - -#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) - uint32_t prediv1factor = 0; -#endif - - /* Get SYSCLK source -------------------------------------------------------*/ - tmp = RCC->CFGR & CFGR_SWS_Mask; - - switch (tmp) - { - case 0x00: /* HSI used as system clock */ - RCC_Clocks->SYSCLK_Frequency = HSI_Value; - break; - case 0x04: /* HSE used as system clock */ - RCC_Clocks->SYSCLK_Frequency = HSE_Value; - break; - case 0x08: /* PLL used as system clock */ - - /* Get PLL clock source and multiplication factor ----------------------*/ - pllmull = RCC->CFGR & CFGR_PLLMull_Mask; - pllsource = RCC->CFGR & CFGR_PLLSRC_Mask; - -#ifndef STM32F10X_CL - pllmull = ( pllmull >> 18) + 2; - - if (pllsource == 0x00) - {/* HSI oscillator clock divided by 2 selected as PLL clock entry */ - RCC_Clocks->SYSCLK_Frequency = (HSI_Value >> 1) * pllmull; - } - else - { - #if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) - prediv1factor = (RCC->CFGR2 & CFGR2_PREDIV1) + 1; - /* HSE oscillator clock selected as PREDIV1 clock entry */ - RCC_Clocks->SYSCLK_Frequency = (HSE_Value / prediv1factor) * pllmull; - #else - /* HSE selected as PLL clock entry */ - if ((RCC->CFGR & CFGR_PLLXTPRE_Mask) != (uint32_t)RESET) - {/* HSE oscillator clock divided by 2 */ - RCC_Clocks->SYSCLK_Frequency = (HSE_Value >> 1) * pllmull; - } - else - { - RCC_Clocks->SYSCLK_Frequency = HSE_Value * pllmull; - } - #endif - } -#else - pllmull = pllmull >> 18; - - if (pllmull != 0x0D) - { - pllmull += 2; - } - else - { /* PLL multiplication factor = PLL input clock * 6.5 */ - pllmull = 13 / 2; - } - - if (pllsource == 0x00) - {/* HSI oscillator clock divided by 2 selected as PLL clock entry */ - RCC_Clocks->SYSCLK_Frequency = (HSI_Value >> 1) * pllmull; - } - else - {/* PREDIV1 selected as PLL clock entry */ - - /* Get PREDIV1 clock source and division factor */ - prediv1source = RCC->CFGR2 & CFGR2_PREDIV1SRC; - prediv1factor = (RCC->CFGR2 & CFGR2_PREDIV1) + 1; - - if (prediv1source == 0) - { /* HSE oscillator clock selected as PREDIV1 clock entry */ - RCC_Clocks->SYSCLK_Frequency = (HSE_Value / prediv1factor) * pllmull; - } - else - {/* PLL2 clock selected as PREDIV1 clock entry */ - - /* Get PREDIV2 division factor and PLL2 multiplication factor */ - prediv2factor = ((RCC->CFGR2 & CFGR2_PREDIV2) >> 4) + 1; - pll2mull = ((RCC->CFGR2 & CFGR2_PLL2MUL) >> 8 ) + 2; - RCC_Clocks->SYSCLK_Frequency = (((HSE_Value / prediv2factor) * pll2mull) / prediv1factor) * pllmull; - } - } -#endif /* STM32F10X_CL */ - break; - - default: - RCC_Clocks->SYSCLK_Frequency = HSI_Value; - break; - } - - /* Compute HCLK, PCLK1, PCLK2 and ADCCLK clocks frequencies ----------------*/ - /* Get HCLK prescaler */ - tmp = RCC->CFGR & CFGR_HPRE_Set_Mask; - tmp = tmp >> 4; - presc = APBAHBPrescTable[tmp]; - /* HCLK clock frequency */ - RCC_Clocks->HCLK_Frequency = RCC_Clocks->SYSCLK_Frequency >> presc; - /* Get PCLK1 prescaler */ - tmp = RCC->CFGR & CFGR_PPRE1_Set_Mask; - tmp = tmp >> 8; - presc = APBAHBPrescTable[tmp]; - /* PCLK1 clock frequency */ - RCC_Clocks->PCLK1_Frequency = RCC_Clocks->HCLK_Frequency >> presc; - /* Get PCLK2 prescaler */ - tmp = RCC->CFGR & CFGR_PPRE2_Set_Mask; - tmp = tmp >> 11; - presc = APBAHBPrescTable[tmp]; - /* PCLK2 clock frequency */ - RCC_Clocks->PCLK2_Frequency = RCC_Clocks->HCLK_Frequency >> presc; - /* Get ADCCLK prescaler */ - tmp = RCC->CFGR & CFGR_ADCPRE_Set_Mask; - tmp = tmp >> 14; - presc = ADCPrescTable[tmp]; - /* ADCCLK clock frequency */ - RCC_Clocks->ADCCLK_Frequency = RCC_Clocks->PCLK2_Frequency / presc; -} - -/** - * @brief Enables or disables the AHB peripheral clock. - * @param RCC_AHBPeriph: specifies the AHB peripheral to gates its clock. - * - * For @b STM32_Connectivity_line_devices, this parameter can be any combination - * of the following values: - * @arg RCC_AHBPeriph_DMA1 - * @arg RCC_AHBPeriph_DMA2 - * @arg RCC_AHBPeriph_SRAM - * @arg RCC_AHBPeriph_FLITF - * @arg RCC_AHBPeriph_CRC - * @arg RCC_AHBPeriph_OTG_FS - * @arg RCC_AHBPeriph_ETH_MAC - * @arg RCC_AHBPeriph_ETH_MAC_Tx - * @arg RCC_AHBPeriph_ETH_MAC_Rx - * - * For @b other_STM32_devices, this parameter can be any combination of the - * following values: - * @arg RCC_AHBPeriph_DMA1 - * @arg RCC_AHBPeriph_DMA2 - * @arg RCC_AHBPeriph_SRAM - * @arg RCC_AHBPeriph_FLITF - * @arg RCC_AHBPeriph_CRC - * @arg RCC_AHBPeriph_FSMC - * @arg RCC_AHBPeriph_SDIO - * - * @note SRAM and FLITF clock can be disabled only during sleep mode. - * @param NewState: new state of the specified peripheral clock. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void RCC_AHBPeriphClockCmd(uint32_t RCC_AHBPeriph, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_RCC_AHB_PERIPH(RCC_AHBPeriph)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - - if (NewState != DISABLE) - { - RCC->AHBENR |= RCC_AHBPeriph; - } - else - { - RCC->AHBENR &= ~RCC_AHBPeriph; - } -} - -/** - * @brief Enables or disables the High Speed APB (APB2) peripheral clock. - * @param RCC_APB2Periph: specifies the APB2 peripheral to gates its clock. - * This parameter can be any combination of the following values: - * @arg RCC_APB2Periph_AFIO, RCC_APB2Periph_GPIOA, RCC_APB2Periph_GPIOB, - * RCC_APB2Periph_GPIOC, RCC_APB2Periph_GPIOD, RCC_APB2Periph_GPIOE, - * RCC_APB2Periph_GPIOF, RCC_APB2Periph_GPIOG, RCC_APB2Periph_ADC1, - * RCC_APB2Periph_ADC2, RCC_APB2Periph_TIM1, RCC_APB2Periph_SPI1, - * RCC_APB2Periph_TIM8, RCC_APB2Periph_USART1, RCC_APB2Periph_ADC3, - * RCC_APB2Periph_TIM15, RCC_APB2Periph_TIM16, RCC_APB2Periph_TIM17 - * @param NewState: new state of the specified peripheral clock. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void RCC_APB2PeriphClockCmd(uint32_t RCC_APB2Periph, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_RCC_APB2_PERIPH(RCC_APB2Periph)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - if (NewState != DISABLE) - { - RCC->APB2ENR |= RCC_APB2Periph; - } - else - { - RCC->APB2ENR &= ~RCC_APB2Periph; - } -} - -/** - * @brief Enables or disables the Low Speed APB (APB1) peripheral clock. - * @param RCC_APB1Periph: specifies the APB1 peripheral to gates its clock. - * This parameter can be any combination of the following values: - * @arg RCC_APB1Periph_TIM2, RCC_APB1Periph_TIM3, RCC_APB1Periph_TIM4, - * RCC_APB1Periph_TIM5, RCC_APB1Periph_TIM6, RCC_APB1Periph_TIM7, - * RCC_APB1Periph_WWDG, RCC_APB1Periph_SPI2, RCC_APB1Periph_SPI3, - * RCC_APB1Periph_USART2, RCC_APB1Periph_USART3, RCC_APB1Periph_USART4, - * RCC_APB1Periph_USART5, RCC_APB1Periph_I2C1, RCC_APB1Periph_I2C2, - * RCC_APB1Periph_USB, RCC_APB1Periph_CAN1, RCC_APB1Periph_BKP, - * RCC_APB1Periph_PWR, RCC_APB1Periph_DAC, RCC_APB1Periph_CEC - * @param NewState: new state of the specified peripheral clock. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void RCC_APB1PeriphClockCmd(uint32_t RCC_APB1Periph, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_RCC_APB1_PERIPH(RCC_APB1Periph)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - if (NewState != DISABLE) - { - RCC->APB1ENR |= RCC_APB1Periph; - } - else - { - RCC->APB1ENR &= ~RCC_APB1Periph; - } -} - -#ifdef STM32F10X_CL -/** - * @brief Forces or releases AHB peripheral reset. - * @note This function applies only to STM32 Connectivity line devices. - * @param RCC_AHBPeriph: specifies the AHB peripheral to reset. - * This parameter can be any combination of the following values: - * @arg RCC_AHBPeriph_OTG_FS - * @arg RCC_AHBPeriph_ETH_MAC - * @param NewState: new state of the specified peripheral reset. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void RCC_AHBPeriphResetCmd(uint32_t RCC_AHBPeriph, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_RCC_AHB_PERIPH_RESET(RCC_AHBPeriph)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - - if (NewState != DISABLE) - { - RCC->AHBRSTR |= RCC_AHBPeriph; - } - else - { - RCC->AHBRSTR &= ~RCC_AHBPeriph; - } -} -#endif /* STM32F10X_CL */ - -/** - * @brief Forces or releases High Speed APB (APB2) peripheral reset. - * @param RCC_APB2Periph: specifies the APB2 peripheral to reset. - * This parameter can be any combination of the following values: - * @arg RCC_APB2Periph_AFIO, RCC_APB2Periph_GPIOA, RCC_APB2Periph_GPIOB, - * RCC_APB2Periph_GPIOC, RCC_APB2Periph_GPIOD, RCC_APB2Periph_GPIOE, - * RCC_APB2Periph_GPIOF, RCC_APB2Periph_GPIOG, RCC_APB2Periph_ADC1, - * RCC_APB2Periph_ADC2, RCC_APB2Periph_TIM1, RCC_APB2Periph_SPI1, - * RCC_APB2Periph_TIM8, RCC_APB2Periph_USART1, RCC_APB2Periph_ADC3 - * RCC_APB2Periph_TIM15, RCC_APB2Periph_TIM16, RCC_APB2Periph_TIM17 - * @param NewState: new state of the specified peripheral reset. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void RCC_APB2PeriphResetCmd(uint32_t RCC_APB2Periph, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_RCC_APB2_PERIPH(RCC_APB2Periph)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - if (NewState != DISABLE) - { - RCC->APB2RSTR |= RCC_APB2Periph; - } - else - { - RCC->APB2RSTR &= ~RCC_APB2Periph; - } -} - -/** - * @brief Forces or releases Low Speed APB (APB1) peripheral reset. - * @param RCC_APB1Periph: specifies the APB1 peripheral to reset. - * This parameter can be any combination of the following values: - * @arg RCC_APB1Periph_TIM2, RCC_APB1Periph_TIM3, RCC_APB1Periph_TIM4, - * RCC_APB1Periph_TIM5, RCC_APB1Periph_TIM6, RCC_APB1Periph_TIM7, - * RCC_APB1Periph_WWDG, RCC_APB1Periph_SPI2, RCC_APB1Periph_SPI3, - * RCC_APB1Periph_USART2, RCC_APB1Periph_USART3, RCC_APB1Periph_USART4, - * RCC_APB1Periph_USART5, RCC_APB1Periph_I2C1, RCC_APB1Periph_I2C2, - * RCC_APB1Periph_USB, RCC_APB1Periph_CAN1, RCC_APB1Periph_BKP, - * RCC_APB1Periph_PWR, RCC_APB1Periph_DAC, RCC_APB1Periph_CEC - * @param NewState: new state of the specified peripheral clock. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void RCC_APB1PeriphResetCmd(uint32_t RCC_APB1Periph, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_RCC_APB1_PERIPH(RCC_APB1Periph)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - if (NewState != DISABLE) - { - RCC->APB1RSTR |= RCC_APB1Periph; - } - else - { - RCC->APB1RSTR &= ~RCC_APB1Periph; - } -} - -/** - * @brief Forces or releases the Backup domain reset. - * @param NewState: new state of the Backup domain reset. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void RCC_BackupResetCmd(FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_FUNCTIONAL_STATE(NewState)); - *(__IO uint32_t *) BDCR_BDRST_BB = (uint32_t)NewState; -} - -/** - * @brief Enables or disables the Clock Security System. - * @param NewState: new state of the Clock Security System.. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void RCC_ClockSecuritySystemCmd(FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_FUNCTIONAL_STATE(NewState)); - *(__IO uint32_t *) CR_CSSON_BB = (uint32_t)NewState; -} - -/** - * @brief Selects the clock source to output on MCO pin. - * @param RCC_MCO: specifies the clock source to output. - * - * For @b STM32_Connectivity_line_devices, this parameter can be one of the - * following values: - * @arg RCC_MCO_NoClock: No clock selected - * @arg RCC_MCO_SYSCLK: System clock selected - * @arg RCC_MCO_HSI: HSI oscillator clock selected - * @arg RCC_MCO_HSE: HSE oscillator clock selected - * @arg RCC_MCO_PLLCLK_Div2: PLL clock divided by 2 selected - * @arg RCC_MCO_PLL2CLK: PLL2 clock selected - * @arg RCC_MCO_PLL3CLK_Div2: PLL3 clock divided by 2 selected - * @arg RCC_MCO_XT1: External 3-25 MHz oscillator clock selected - * @arg RCC_MCO_PLL3CLK: PLL3 clock selected - * - * For @b other_STM32_devices, this parameter can be one of the following values: - * @arg RCC_MCO_NoClock: No clock selected - * @arg RCC_MCO_SYSCLK: System clock selected - * @arg RCC_MCO_HSI: HSI oscillator clock selected - * @arg RCC_MCO_HSE: HSE oscillator clock selected - * @arg RCC_MCO_PLLCLK_Div2: PLL clock divided by 2 selected - * - * @retval None - */ -void RCC_MCOConfig(uint8_t RCC_MCO) -{ - /* Check the parameters */ - assert_param(IS_RCC_MCO(RCC_MCO)); - - /* Perform Byte access to MCO bits to select the MCO source */ - *(__IO uint8_t *) CFGR_BYTE4_ADDRESS = RCC_MCO; -} - -/** - * @brief Checks whether the specified RCC flag is set or not. - * @param RCC_FLAG: specifies the flag to check. - * - * For @b STM32_Connectivity_line_devices, this parameter can be one of the - * following values: - * @arg RCC_FLAG_HSIRDY: HSI oscillator clock ready - * @arg RCC_FLAG_HSERDY: HSE oscillator clock ready - * @arg RCC_FLAG_PLLRDY: PLL clock ready - * @arg RCC_FLAG_PLL2RDY: PLL2 clock ready - * @arg RCC_FLAG_PLL3RDY: PLL3 clock ready - * @arg RCC_FLAG_LSERDY: LSE oscillator clock ready - * @arg RCC_FLAG_LSIRDY: LSI oscillator clock ready - * @arg RCC_FLAG_PINRST: Pin reset - * @arg RCC_FLAG_PORRST: POR/PDR reset - * @arg RCC_FLAG_SFTRST: Software reset - * @arg RCC_FLAG_IWDGRST: Independent Watchdog reset - * @arg RCC_FLAG_WWDGRST: Window Watchdog reset - * @arg RCC_FLAG_LPWRRST: Low Power reset - * - * For @b other_STM32_devices, this parameter can be one of the following values: - * @arg RCC_FLAG_HSIRDY: HSI oscillator clock ready - * @arg RCC_FLAG_HSERDY: HSE oscillator clock ready - * @arg RCC_FLAG_PLLRDY: PLL clock ready - * @arg RCC_FLAG_LSERDY: LSE oscillator clock ready - * @arg RCC_FLAG_LSIRDY: LSI oscillator clock ready - * @arg RCC_FLAG_PINRST: Pin reset - * @arg RCC_FLAG_PORRST: POR/PDR reset - * @arg RCC_FLAG_SFTRST: Software reset - * @arg RCC_FLAG_IWDGRST: Independent Watchdog reset - * @arg RCC_FLAG_WWDGRST: Window Watchdog reset - * @arg RCC_FLAG_LPWRRST: Low Power reset - * - * @retval The new state of RCC_FLAG (SET or RESET). - */ -FlagStatus RCC_GetFlagStatus(uint8_t RCC_FLAG) -{ - uint32_t tmp = 0; - uint32_t statusreg = 0; - FlagStatus bitstatus = RESET; - /* Check the parameters */ - assert_param(IS_RCC_FLAG(RCC_FLAG)); - - /* Get the RCC register index */ - tmp = RCC_FLAG >> 5; - if (tmp == 1) /* The flag to check is in CR register */ - { - statusreg = RCC->CR; - } - else if (tmp == 2) /* The flag to check is in BDCR register */ - { - statusreg = RCC->BDCR; - } - else /* The flag to check is in CSR register */ - { - statusreg = RCC->CSR; - } - - /* Get the flag position */ - tmp = RCC_FLAG & FLAG_Mask; - if ((statusreg & ((uint32_t)1 << tmp)) != (uint32_t)RESET) - { - bitstatus = SET; - } - else - { - bitstatus = RESET; - } - - /* Return the flag status */ - return bitstatus; -} - -/** - * @brief Clears the RCC reset flags. - * @note The reset flags are: RCC_FLAG_PINRST, RCC_FLAG_PORRST, RCC_FLAG_SFTRST, - * RCC_FLAG_IWDGRST, RCC_FLAG_WWDGRST, RCC_FLAG_LPWRRST - * @param None - * @retval None - */ -void RCC_ClearFlag(void) -{ - /* Set RMVF bit to clear the reset flags */ - RCC->CSR |= CSR_RMVF_Set; -} - -/** - * @brief Checks whether the specified RCC interrupt has occurred or not. - * @param RCC_IT: specifies the RCC interrupt source to check. - * - * For @b STM32_Connectivity_line_devices, this parameter can be one of the - * following values: - * @arg RCC_IT_LSIRDY: LSI ready interrupt - * @arg RCC_IT_LSERDY: LSE ready interrupt - * @arg RCC_IT_HSIRDY: HSI ready interrupt - * @arg RCC_IT_HSERDY: HSE ready interrupt - * @arg RCC_IT_PLLRDY: PLL ready interrupt - * @arg RCC_IT_PLL2RDY: PLL2 ready interrupt - * @arg RCC_IT_PLL3RDY: PLL3 ready interrupt - * @arg RCC_IT_CSS: Clock Security System interrupt - * - * For @b other_STM32_devices, this parameter can be one of the following values: - * @arg RCC_IT_LSIRDY: LSI ready interrupt - * @arg RCC_IT_LSERDY: LSE ready interrupt - * @arg RCC_IT_HSIRDY: HSI ready interrupt - * @arg RCC_IT_HSERDY: HSE ready interrupt - * @arg RCC_IT_PLLRDY: PLL ready interrupt - * @arg RCC_IT_CSS: Clock Security System interrupt - * - * @retval The new state of RCC_IT (SET or RESET). - */ -ITStatus RCC_GetITStatus(uint8_t RCC_IT) -{ - ITStatus bitstatus = RESET; - /* Check the parameters */ - assert_param(IS_RCC_GET_IT(RCC_IT)); - - /* Check the status of the specified RCC interrupt */ - if ((RCC->CIR & RCC_IT) != (uint32_t)RESET) - { - bitstatus = SET; - } - else - { - bitstatus = RESET; - } - - /* Return the RCC_IT status */ - return bitstatus; -} - -/** - * @brief Clears the RCC’s interrupt pending bits. - * @param RCC_IT: specifies the interrupt pending bit to clear. - * - * For @b STM32_Connectivity_line_devices, this parameter can be any combination - * of the following values: - * @arg RCC_IT_LSIRDY: LSI ready interrupt - * @arg RCC_IT_LSERDY: LSE ready interrupt - * @arg RCC_IT_HSIRDY: HSI ready interrupt - * @arg RCC_IT_HSERDY: HSE ready interrupt - * @arg RCC_IT_PLLRDY: PLL ready interrupt - * @arg RCC_IT_PLL2RDY: PLL2 ready interrupt - * @arg RCC_IT_PLL3RDY: PLL3 ready interrupt - * @arg RCC_IT_CSS: Clock Security System interrupt - * - * For @b other_STM32_devices, this parameter can be any combination of the - * following values: - * @arg RCC_IT_LSIRDY: LSI ready interrupt - * @arg RCC_IT_LSERDY: LSE ready interrupt - * @arg RCC_IT_HSIRDY: HSI ready interrupt - * @arg RCC_IT_HSERDY: HSE ready interrupt - * @arg RCC_IT_PLLRDY: PLL ready interrupt - * - * @arg RCC_IT_CSS: Clock Security System interrupt - * @retval None - */ -void RCC_ClearITPendingBit(uint8_t RCC_IT) -{ - /* Check the parameters */ - assert_param(IS_RCC_CLEAR_IT(RCC_IT)); - - /* Perform Byte access to RCC_CIR[23:16] bits to clear the selected interrupt - pending bits */ - *(__IO uint8_t *) CIR_BYTE3_ADDRESS = RCC_IT; -} - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_rtc.c b/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_rtc.c deleted file mode 100644 index 559e3de300..0000000000 --- a/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_rtc.c +++ /dev/null @@ -1,341 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f10x_rtc.c - * @author MCD Application Team - * @version V3.2.0 - * @date 03/01/2010 - * @brief This file provides all the RTC firmware functions. - ****************************************************************************** - * @copy - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2010 STMicroelectronics

- */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x_rtc.h" - -/** @addtogroup STM32F10x_StdPeriph_Driver - * @{ - */ - -/** @defgroup RTC - * @brief RTC driver modules - * @{ - */ - -/** @defgroup RTC_Private_TypesDefinitions - * @{ - */ -/** - * @} - */ - -/** @defgroup RTC_Private_Defines - * @{ - */ - -#define CRL_CNF_Set ((uint16_t)0x0010) /*!< Configuration Flag Enable Mask */ -#define CRL_CNF_Reset ((uint16_t)0xFFEF) /*!< Configuration Flag Disable Mask */ -#define RTC_LSB_Mask ((uint32_t)0x0000FFFF) /*!< RTC LSB Mask */ -#define PRLH_MSB_Mask ((uint32_t)0x000F0000) /*!< RTC Prescaler MSB Mask */ - -/** - * @} - */ - -/** @defgroup RTC_Private_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup RTC_Private_Variables - * @{ - */ - -/** - * @} - */ - -/** @defgroup RTC_Private_FunctionPrototypes - * @{ - */ - -/** - * @} - */ - -/** @defgroup RTC_Private_Functions - * @{ - */ - -/** - * @brief Enables or disables the specified RTC interrupts. - * @param RTC_IT: specifies the RTC interrupts sources to be enabled or disabled. - * This parameter can be any combination of the following values: - * @arg RTC_IT_OW: Overflow interrupt - * @arg RTC_IT_ALR: Alarm interrupt - * @arg RTC_IT_SEC: Second interrupt - * @param NewState: new state of the specified RTC interrupts. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void RTC_ITConfig(uint16_t RTC_IT, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_RTC_IT(RTC_IT)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - - if (NewState != DISABLE) - { - RTC->CRH |= RTC_IT; - } - else - { - RTC->CRH &= (uint16_t)~RTC_IT; - } -} - -/** - * @brief Enters the RTC configuration mode. - * @param None - * @retval None - */ -void RTC_EnterConfigMode(void) -{ - /* Set the CNF flag to enter in the Configuration Mode */ - RTC->CRL |= CRL_CNF_Set; -} - -/** - * @brief Exits from the RTC configuration mode. - * @param None - * @retval None - */ -void RTC_ExitConfigMode(void) -{ - /* Reset the CNF flag to exit from the Configuration Mode */ - RTC->CRL &= CRL_CNF_Reset; -} - -/** - * @brief Gets the RTC counter value. - * @param None - * @retval RTC counter value. - */ -uint32_t RTC_GetCounter(void) -{ - uint16_t tmp = 0; - tmp = RTC->CNTL; - return (((uint32_t)RTC->CNTH << 16 ) | tmp) ; -} - -/** - * @brief Sets the RTC counter value. - * @param CounterValue: RTC counter new value. - * @retval None - */ -void RTC_SetCounter(uint32_t CounterValue) -{ - RTC_EnterConfigMode(); - /* Set RTC COUNTER MSB word */ - RTC->CNTH = CounterValue >> 16; - /* Set RTC COUNTER LSB word */ - RTC->CNTL = (CounterValue & RTC_LSB_Mask); - RTC_ExitConfigMode(); -} - -/** - * @brief Sets the RTC prescaler value. - * @param PrescalerValue: RTC prescaler new value. - * @retval None - */ -void RTC_SetPrescaler(uint32_t PrescalerValue) -{ - /* Check the parameters */ - assert_param(IS_RTC_PRESCALER(PrescalerValue)); - - RTC_EnterConfigMode(); - /* Set RTC PRESCALER MSB word */ - RTC->PRLH = (PrescalerValue & PRLH_MSB_Mask) >> 16; - /* Set RTC PRESCALER LSB word */ - RTC->PRLL = (PrescalerValue & RTC_LSB_Mask); - RTC_ExitConfigMode(); -} - -/** - * @brief Sets the RTC alarm value. - * @param AlarmValue: RTC alarm new value. - * @retval None - */ -void RTC_SetAlarm(uint32_t AlarmValue) -{ - RTC_EnterConfigMode(); - /* Set the ALARM MSB word */ - RTC->ALRH = AlarmValue >> 16; - /* Set the ALARM LSB word */ - RTC->ALRL = (AlarmValue & RTC_LSB_Mask); - RTC_ExitConfigMode(); -} - -/** - * @brief Gets the RTC divider value. - * @param None - * @retval RTC Divider value. - */ -uint32_t RTC_GetDivider(void) -{ - uint32_t tmp = 0x00; - tmp = ((uint32_t)RTC->DIVH & (uint32_t)0x000F) << 16; - tmp |= RTC->DIVL; - return tmp; -} - -/** - * @brief Waits until last write operation on RTC registers has finished. - * @note This function must be called before any write to RTC registers. - * @param None - * @retval None - */ -void RTC_WaitForLastTask(void) -{ - /* Loop until RTOFF flag is set */ - while ((RTC->CRL & RTC_FLAG_RTOFF) == (uint16_t)RESET) - { - } -} - -/** - * @brief Waits until the RTC registers (RTC_CNT, RTC_ALR and RTC_PRL) - * are synchronized with RTC APB clock. - * @note This function must be called before any read operation after an APB reset - * or an APB clock stop. - * @param None - * @retval None - */ -void RTC_WaitForSynchro(void) -{ - /* Clear RSF flag */ - RTC->CRL &= (uint16_t)~RTC_FLAG_RSF; - /* Loop until RSF flag is set */ - while ((RTC->CRL & RTC_FLAG_RSF) == (uint16_t)RESET) - { - } -} - -/** - * @brief Checks whether the specified RTC flag is set or not. - * @param RTC_FLAG: specifies the flag to check. - * This parameter can be one the following values: - * @arg RTC_FLAG_RTOFF: RTC Operation OFF flag - * @arg RTC_FLAG_RSF: Registers Synchronized flag - * @arg RTC_FLAG_OW: Overflow flag - * @arg RTC_FLAG_ALR: Alarm flag - * @arg RTC_FLAG_SEC: Second flag - * @retval The new state of RTC_FLAG (SET or RESET). - */ -FlagStatus RTC_GetFlagStatus(uint16_t RTC_FLAG) -{ - FlagStatus bitstatus = RESET; - - /* Check the parameters */ - assert_param(IS_RTC_GET_FLAG(RTC_FLAG)); - - if ((RTC->CRL & RTC_FLAG) != (uint16_t)RESET) - { - bitstatus = SET; - } - else - { - bitstatus = RESET; - } - return bitstatus; -} - -/** - * @brief Clears the RTC’s pending flags. - * @param RTC_FLAG: specifies the flag to clear. - * This parameter can be any combination of the following values: - * @arg RTC_FLAG_RSF: Registers Synchronized flag. This flag is cleared only after - * an APB reset or an APB Clock stop. - * @arg RTC_FLAG_OW: Overflow flag - * @arg RTC_FLAG_ALR: Alarm flag - * @arg RTC_FLAG_SEC: Second flag - * @retval None - */ -void RTC_ClearFlag(uint16_t RTC_FLAG) -{ - /* Check the parameters */ - assert_param(IS_RTC_CLEAR_FLAG(RTC_FLAG)); - - /* Clear the coressponding RTC flag */ - RTC->CRL &= (uint16_t)~RTC_FLAG; -} - -/** - * @brief Checks whether the specified RTC interrupt has occured or not. - * @param RTC_IT: specifies the RTC interrupts sources to check. - * This parameter can be one of the following values: - * @arg RTC_IT_OW: Overflow interrupt - * @arg RTC_IT_ALR: Alarm interrupt - * @arg RTC_IT_SEC: Second interrupt - * @retval The new state of the RTC_IT (SET or RESET). - */ -ITStatus RTC_GetITStatus(uint16_t RTC_IT) -{ - ITStatus bitstatus = RESET; - /* Check the parameters */ - assert_param(IS_RTC_GET_IT(RTC_IT)); - - bitstatus = (ITStatus)(RTC->CRL & RTC_IT); - if (((RTC->CRH & RTC_IT) != (uint16_t)RESET) && (bitstatus != (uint16_t)RESET)) - { - bitstatus = SET; - } - else - { - bitstatus = RESET; - } - return bitstatus; -} - -/** - * @brief Clears the RTC’s interrupt pending bits. - * @param RTC_IT: specifies the interrupt pending bit to clear. - * This parameter can be any combination of the following values: - * @arg RTC_IT_OW: Overflow interrupt - * @arg RTC_IT_ALR: Alarm interrupt - * @arg RTC_IT_SEC: Second interrupt - * @retval None - */ -void RTC_ClearITPendingBit(uint16_t RTC_IT) -{ - /* Check the parameters */ - assert_param(IS_RTC_IT(RTC_IT)); - - /* Clear the coressponding RTC pending bit */ - RTC->CRL &= (uint16_t)~RTC_IT; -} - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_sdio.c b/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_sdio.c deleted file mode 100644 index 46868b3655..0000000000 --- a/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_sdio.c +++ /dev/null @@ -1,798 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f10x_sdio.c - * @author MCD Application Team - * @version V3.2.0 - * @date 03/01/2010 - * @brief This file provides all the SDIO firmware functions. - ****************************************************************************** - * @copy - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2010 STMicroelectronics

- */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x_sdio.h" -#include "stm32f10x_rcc.h" - -/** @addtogroup STM32F10x_StdPeriph_Driver - * @{ - */ - -/** @defgroup SDIO - * @brief SDIO driver modules - * @{ - */ - -/** @defgroup SDIO_Private_TypesDefinitions - * @{ - */ - -/* ------------ SDIO registers bit address in the alias region ----------- */ -#define SDIO_OFFSET (SDIO_BASE - PERIPH_BASE) - -/* --- CLKCR Register ---*/ - -/* Alias word address of CLKEN bit */ -#define CLKCR_OFFSET (SDIO_OFFSET + 0x04) -#define CLKEN_BitNumber 0x08 -#define CLKCR_CLKEN_BB (PERIPH_BB_BASE + (CLKCR_OFFSET * 32) + (CLKEN_BitNumber * 4)) - -/* --- CMD Register ---*/ - -/* Alias word address of SDIOSUSPEND bit */ -#define CMD_OFFSET (SDIO_OFFSET + 0x0C) -#define SDIOSUSPEND_BitNumber 0x0B -#define CMD_SDIOSUSPEND_BB (PERIPH_BB_BASE + (CMD_OFFSET * 32) + (SDIOSUSPEND_BitNumber * 4)) - -/* Alias word address of ENCMDCOMPL bit */ -#define ENCMDCOMPL_BitNumber 0x0C -#define CMD_ENCMDCOMPL_BB (PERIPH_BB_BASE + (CMD_OFFSET * 32) + (ENCMDCOMPL_BitNumber * 4)) - -/* Alias word address of NIEN bit */ -#define NIEN_BitNumber 0x0D -#define CMD_NIEN_BB (PERIPH_BB_BASE + (CMD_OFFSET * 32) + (NIEN_BitNumber * 4)) - -/* Alias word address of ATACMD bit */ -#define ATACMD_BitNumber 0x0E -#define CMD_ATACMD_BB (PERIPH_BB_BASE + (CMD_OFFSET * 32) + (ATACMD_BitNumber * 4)) - -/* --- DCTRL Register ---*/ - -/* Alias word address of DMAEN bit */ -#define DCTRL_OFFSET (SDIO_OFFSET + 0x2C) -#define DMAEN_BitNumber 0x03 -#define DCTRL_DMAEN_BB (PERIPH_BB_BASE + (DCTRL_OFFSET * 32) + (DMAEN_BitNumber * 4)) - -/* Alias word address of RWSTART bit */ -#define RWSTART_BitNumber 0x08 -#define DCTRL_RWSTART_BB (PERIPH_BB_BASE + (DCTRL_OFFSET * 32) + (RWSTART_BitNumber * 4)) - -/* Alias word address of RWSTOP bit */ -#define RWSTOP_BitNumber 0x09 -#define DCTRL_RWSTOP_BB (PERIPH_BB_BASE + (DCTRL_OFFSET * 32) + (RWSTOP_BitNumber * 4)) - -/* Alias word address of RWMOD bit */ -#define RWMOD_BitNumber 0x0A -#define DCTRL_RWMOD_BB (PERIPH_BB_BASE + (DCTRL_OFFSET * 32) + (RWMOD_BitNumber * 4)) - -/* Alias word address of SDIOEN bit */ -#define SDIOEN_BitNumber 0x0B -#define DCTRL_SDIOEN_BB (PERIPH_BB_BASE + (DCTRL_OFFSET * 32) + (SDIOEN_BitNumber * 4)) - -/* ---------------------- SDIO registers bit mask ------------------------ */ - -/* --- CLKCR Register ---*/ - -/* CLKCR register clear mask */ -#define CLKCR_CLEAR_MASK ((uint32_t)0xFFFF8100) - -/* --- PWRCTRL Register ---*/ - -/* SDIO PWRCTRL Mask */ -#define PWR_PWRCTRL_MASK ((uint32_t)0xFFFFFFFC) - -/* --- DCTRL Register ---*/ - -/* SDIO DCTRL Clear Mask */ -#define DCTRL_CLEAR_MASK ((uint32_t)0xFFFFFF08) - -/* --- CMD Register ---*/ - -/* CMD Register clear mask */ -#define CMD_CLEAR_MASK ((uint32_t)0xFFFFF800) - -/* SDIO RESP Registers Address */ -#define SDIO_RESP_ADDR ((uint32_t)(SDIO_BASE + 0x14)) - -/** - * @} - */ - -/** @defgroup SDIO_Private_Defines - * @{ - */ - -/** - * @} - */ - -/** @defgroup SDIO_Private_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup SDIO_Private_Variables - * @{ - */ - -/** - * @} - */ - -/** @defgroup SDIO_Private_FunctionPrototypes - * @{ - */ - -/** - * @} - */ - -/** @defgroup SDIO_Private_Functions - * @{ - */ - -/** - * @brief Deinitializes the SDIO peripheral registers to their default reset values. - * @param None - * @retval None - */ -void SDIO_DeInit(void) -{ - SDIO->POWER = 0x00000000; - SDIO->CLKCR = 0x00000000; - SDIO->ARG = 0x00000000; - SDIO->CMD = 0x00000000; - SDIO->DTIMER = 0x00000000; - SDIO->DLEN = 0x00000000; - SDIO->DCTRL = 0x00000000; - SDIO->ICR = 0x00C007FF; - SDIO->MASK = 0x00000000; -} - -/** - * @brief Initializes the SDIO peripheral according to the specified - * parameters in the SDIO_InitStruct. - * @param SDIO_InitStruct : pointer to a SDIO_InitTypeDef structure - * that contains the configuration information for the SDIO peripheral. - * @retval None - */ -void SDIO_Init(SDIO_InitTypeDef* SDIO_InitStruct) -{ - uint32_t tmpreg = 0; - - /* Check the parameters */ - assert_param(IS_SDIO_CLOCK_EDGE(SDIO_InitStruct->SDIO_ClockEdge)); - assert_param(IS_SDIO_CLOCK_BYPASS(SDIO_InitStruct->SDIO_ClockBypass)); - assert_param(IS_SDIO_CLOCK_POWER_SAVE(SDIO_InitStruct->SDIO_ClockPowerSave)); - assert_param(IS_SDIO_BUS_WIDE(SDIO_InitStruct->SDIO_BusWide)); - assert_param(IS_SDIO_HARDWARE_FLOW_CONTROL(SDIO_InitStruct->SDIO_HardwareFlowControl)); - -/*---------------------------- SDIO CLKCR Configuration ------------------------*/ - /* Get the SDIO CLKCR value */ - tmpreg = SDIO->CLKCR; - - /* Clear CLKDIV, PWRSAV, BYPASS, WIDBUS, NEGEDGE, HWFC_EN bits */ - tmpreg &= CLKCR_CLEAR_MASK; - - /* Set CLKDIV bits according to SDIO_ClockDiv value */ - /* Set PWRSAV bit according to SDIO_ClockPowerSave value */ - /* Set BYPASS bit according to SDIO_ClockBypass value */ - /* Set WIDBUS bits according to SDIO_BusWide value */ - /* Set NEGEDGE bits according to SDIO_ClockEdge value */ - /* Set HWFC_EN bits according to SDIO_HardwareFlowControl value */ - tmpreg |= (SDIO_InitStruct->SDIO_ClockDiv | SDIO_InitStruct->SDIO_ClockPowerSave | - SDIO_InitStruct->SDIO_ClockBypass | SDIO_InitStruct->SDIO_BusWide | - SDIO_InitStruct->SDIO_ClockEdge | SDIO_InitStruct->SDIO_HardwareFlowControl); - - /* Write to SDIO CLKCR */ - SDIO->CLKCR = tmpreg; -} - -/** - * @brief Fills each SDIO_InitStruct member with its default value. - * @param SDIO_InitStruct: pointer to an SDIO_InitTypeDef structure which - * will be initialized. - * @retval None - */ -void SDIO_StructInit(SDIO_InitTypeDef* SDIO_InitStruct) -{ - /* SDIO_InitStruct members default value */ - SDIO_InitStruct->SDIO_ClockDiv = 0x00; - SDIO_InitStruct->SDIO_ClockEdge = SDIO_ClockEdge_Rising; - SDIO_InitStruct->SDIO_ClockBypass = SDIO_ClockBypass_Disable; - SDIO_InitStruct->SDIO_ClockPowerSave = SDIO_ClockPowerSave_Disable; - SDIO_InitStruct->SDIO_BusWide = SDIO_BusWide_1b; - SDIO_InitStruct->SDIO_HardwareFlowControl = SDIO_HardwareFlowControl_Disable; -} - -/** - * @brief Enables or disables the SDIO Clock. - * @param NewState: new state of the SDIO Clock. This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void SDIO_ClockCmd(FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_FUNCTIONAL_STATE(NewState)); - - *(__IO uint32_t *) CLKCR_CLKEN_BB = (uint32_t)NewState; -} - -/** - * @brief Sets the power status of the controller. - * @param SDIO_PowerState: new state of the Power state. - * This parameter can be one of the following values: - * @arg SDIO_PowerState_OFF - * @arg SDIO_PowerState_ON - * @retval None - */ -void SDIO_SetPowerState(uint32_t SDIO_PowerState) -{ - /* Check the parameters */ - assert_param(IS_SDIO_POWER_STATE(SDIO_PowerState)); - - SDIO->POWER &= PWR_PWRCTRL_MASK; - SDIO->POWER |= SDIO_PowerState; -} - -/** - * @brief Gets the power status of the controller. - * @param None - * @retval Power status of the controller. The returned value can - * be one of the following: - * - 0x00: Power OFF - * - 0x02: Power UP - * - 0x03: Power ON - */ -uint32_t SDIO_GetPowerState(void) -{ - return (SDIO->POWER & (~PWR_PWRCTRL_MASK)); -} - -/** - * @brief Enables or disables the SDIO interrupts. - * @param SDIO_IT: specifies the SDIO interrupt sources to be enabled or disabled. - * This parameter can be one or a combination of the following values: - * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt - * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt - * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt - * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt - * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt - * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt - * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt - * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt - * @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt - * @arg SDIO_IT_STBITERR: Start bit not detected on all data signals in wide - * bus mode interrupt - * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt - * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt - * @arg SDIO_IT_TXACT: Data transmit in progress interrupt - * @arg SDIO_IT_RXACT: Data receive in progress interrupt - * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt - * @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt - * @arg SDIO_IT_TXFIFOF: Transmit FIFO full interrupt - * @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt - * @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt - * @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt - * @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt - * @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt - * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt - * @arg SDIO_IT_CEATAEND: CE-ATA command completion signal received for CMD61 interrupt - * @param NewState: new state of the specified SDIO interrupts. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void SDIO_ITConfig(uint32_t SDIO_IT, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_SDIO_IT(SDIO_IT)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - - if (NewState != DISABLE) - { - /* Enable the SDIO interrupts */ - SDIO->MASK |= SDIO_IT; - } - else - { - /* Disable the SDIO interrupts */ - SDIO->MASK &= ~SDIO_IT; - } -} - -/** - * @brief Enables or disables the SDIO DMA request. - * @param NewState: new state of the selected SDIO DMA request. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void SDIO_DMACmd(FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_FUNCTIONAL_STATE(NewState)); - - *(__IO uint32_t *) DCTRL_DMAEN_BB = (uint32_t)NewState; -} - -/** - * @brief Initializes the SDIO Command according to the specified - * parameters in the SDIO_CmdInitStruct and send the command. - * @param SDIO_CmdInitStruct : pointer to a SDIO_CmdInitTypeDef - * structure that contains the configuration information for the SDIO command. - * @retval None - */ -void SDIO_SendCommand(SDIO_CmdInitTypeDef *SDIO_CmdInitStruct) -{ - uint32_t tmpreg = 0; - - /* Check the parameters */ - assert_param(IS_SDIO_CMD_INDEX(SDIO_CmdInitStruct->SDIO_CmdIndex)); - assert_param(IS_SDIO_RESPONSE(SDIO_CmdInitStruct->SDIO_Response)); - assert_param(IS_SDIO_WAIT(SDIO_CmdInitStruct->SDIO_Wait)); - assert_param(IS_SDIO_CPSM(SDIO_CmdInitStruct->SDIO_CPSM)); - -/*---------------------------- SDIO ARG Configuration ------------------------*/ - /* Set the SDIO Argument value */ - SDIO->ARG = SDIO_CmdInitStruct->SDIO_Argument; - -/*---------------------------- SDIO CMD Configuration ------------------------*/ - /* Get the SDIO CMD value */ - tmpreg = SDIO->CMD; - /* Clear CMDINDEX, WAITRESP, WAITINT, WAITPEND, CPSMEN bits */ - tmpreg &= CMD_CLEAR_MASK; - /* Set CMDINDEX bits according to SDIO_CmdIndex value */ - /* Set WAITRESP bits according to SDIO_Response value */ - /* Set WAITINT and WAITPEND bits according to SDIO_Wait value */ - /* Set CPSMEN bits according to SDIO_CPSM value */ - tmpreg |= (uint32_t)SDIO_CmdInitStruct->SDIO_CmdIndex | SDIO_CmdInitStruct->SDIO_Response - | SDIO_CmdInitStruct->SDIO_Wait | SDIO_CmdInitStruct->SDIO_CPSM; - - /* Write to SDIO CMD */ - SDIO->CMD = tmpreg; -} - -/** - * @brief Fills each SDIO_CmdInitStruct member with its default value. - * @param SDIO_CmdInitStruct: pointer to an SDIO_CmdInitTypeDef - * structure which will be initialized. - * @retval None - */ -void SDIO_CmdStructInit(SDIO_CmdInitTypeDef* SDIO_CmdInitStruct) -{ - /* SDIO_CmdInitStruct members default value */ - SDIO_CmdInitStruct->SDIO_Argument = 0x00; - SDIO_CmdInitStruct->SDIO_CmdIndex = 0x00; - SDIO_CmdInitStruct->SDIO_Response = SDIO_Response_No; - SDIO_CmdInitStruct->SDIO_Wait = SDIO_Wait_No; - SDIO_CmdInitStruct->SDIO_CPSM = SDIO_CPSM_Disable; -} - -/** - * @brief Returns command index of last command for which response received. - * @param None - * @retval Returns the command index of the last command response received. - */ -uint8_t SDIO_GetCommandResponse(void) -{ - return (uint8_t)(SDIO->RESPCMD); -} - -/** - * @brief Returns response received from the card for the last command. - * @param SDIO_RESP: Specifies the SDIO response register. - * This parameter can be one of the following values: - * @arg SDIO_RESP1: Response Register 1 - * @arg SDIO_RESP2: Response Register 2 - * @arg SDIO_RESP3: Response Register 3 - * @arg SDIO_RESP4: Response Register 4 - * @retval The Corresponding response register value. - */ -uint32_t SDIO_GetResponse(uint32_t SDIO_RESP) -{ - __IO uint32_t tmp = 0; - - /* Check the parameters */ - assert_param(IS_SDIO_RESP(SDIO_RESP)); - - tmp = SDIO_RESP_ADDR + SDIO_RESP; - - return (*(__IO uint32_t *) tmp); -} - -/** - * @brief Initializes the SDIO data path according to the specified - * parameters in the SDIO_DataInitStruct. - * @param SDIO_DataInitStruct : pointer to a SDIO_DataInitTypeDef structure that - * contains the configuration information for the SDIO command. - * @retval None - */ -void SDIO_DataConfig(SDIO_DataInitTypeDef* SDIO_DataInitStruct) -{ - uint32_t tmpreg = 0; - - /* Check the parameters */ - assert_param(IS_SDIO_DATA_LENGTH(SDIO_DataInitStruct->SDIO_DataLength)); - assert_param(IS_SDIO_BLOCK_SIZE(SDIO_DataInitStruct->SDIO_DataBlockSize)); - assert_param(IS_SDIO_TRANSFER_DIR(SDIO_DataInitStruct->SDIO_TransferDir)); - assert_param(IS_SDIO_TRANSFER_MODE(SDIO_DataInitStruct->SDIO_TransferMode)); - assert_param(IS_SDIO_DPSM(SDIO_DataInitStruct->SDIO_DPSM)); - -/*---------------------------- SDIO DTIMER Configuration ---------------------*/ - /* Set the SDIO Data TimeOut value */ - SDIO->DTIMER = SDIO_DataInitStruct->SDIO_DataTimeOut; - -/*---------------------------- SDIO DLEN Configuration -----------------------*/ - /* Set the SDIO DataLength value */ - SDIO->DLEN = SDIO_DataInitStruct->SDIO_DataLength; - -/*---------------------------- SDIO DCTRL Configuration ----------------------*/ - /* Get the SDIO DCTRL value */ - tmpreg = SDIO->DCTRL; - /* Clear DEN, DTMODE, DTDIR and DBCKSIZE bits */ - tmpreg &= DCTRL_CLEAR_MASK; - /* Set DEN bit according to SDIO_DPSM value */ - /* Set DTMODE bit according to SDIO_TransferMode value */ - /* Set DTDIR bit according to SDIO_TransferDir value */ - /* Set DBCKSIZE bits according to SDIO_DataBlockSize value */ - tmpreg |= (uint32_t)SDIO_DataInitStruct->SDIO_DataBlockSize | SDIO_DataInitStruct->SDIO_TransferDir - | SDIO_DataInitStruct->SDIO_TransferMode | SDIO_DataInitStruct->SDIO_DPSM; - - /* Write to SDIO DCTRL */ - SDIO->DCTRL = tmpreg; -} - -/** - * @brief Fills each SDIO_DataInitStruct member with its default value. - * @param SDIO_DataInitStruct: pointer to an SDIO_DataInitTypeDef structure which - * will be initialized. - * @retval None - */ -void SDIO_DataStructInit(SDIO_DataInitTypeDef* SDIO_DataInitStruct) -{ - /* SDIO_DataInitStruct members default value */ - SDIO_DataInitStruct->SDIO_DataTimeOut = 0xFFFFFFFF; - SDIO_DataInitStruct->SDIO_DataLength = 0x00; - SDIO_DataInitStruct->SDIO_DataBlockSize = SDIO_DataBlockSize_1b; - SDIO_DataInitStruct->SDIO_TransferDir = SDIO_TransferDir_ToCard; - SDIO_DataInitStruct->SDIO_TransferMode = SDIO_TransferMode_Block; - SDIO_DataInitStruct->SDIO_DPSM = SDIO_DPSM_Disable; -} - -/** - * @brief Returns number of remaining data bytes to be transferred. - * @param None - * @retval Number of remaining data bytes to be transferred - */ -uint32_t SDIO_GetDataCounter(void) -{ - return SDIO->DCOUNT; -} - -/** - * @brief Read one data word from Rx FIFO. - * @param None - * @retval Data received - */ -uint32_t SDIO_ReadData(void) -{ - return SDIO->FIFO; -} - -/** - * @brief Write one data word to Tx FIFO. - * @param Data: 32-bit data word to write. - * @retval None - */ -void SDIO_WriteData(uint32_t Data) -{ - SDIO->FIFO = Data; -} - -/** - * @brief Returns the number of words left to be written to or read from FIFO. - * @param None - * @retval Remaining number of words. - */ -uint32_t SDIO_GetFIFOCount(void) -{ - return SDIO->FIFOCNT; -} - -/** - * @brief Starts the SD I/O Read Wait operation. - * @param NewState: new state of the Start SDIO Read Wait operation. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void SDIO_StartSDIOReadWait(FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_FUNCTIONAL_STATE(NewState)); - - *(__IO uint32_t *) DCTRL_RWSTART_BB = (uint32_t) NewState; -} - -/** - * @brief Stops the SD I/O Read Wait operation. - * @param NewState: new state of the Stop SDIO Read Wait operation. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void SDIO_StopSDIOReadWait(FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_FUNCTIONAL_STATE(NewState)); - - *(__IO uint32_t *) DCTRL_RWSTOP_BB = (uint32_t) NewState; -} - -/** - * @brief Sets one of the two options of inserting read wait interval. - * @param SDIO_ReadWaitMode: SD I/O Read Wait operation mode. - * This parametre can be: - * @arg SDIO_ReadWaitMode_CLK: Read Wait control by stopping SDIOCLK - * @arg SDIO_ReadWaitMode_DATA2: Read Wait control using SDIO_DATA2 - * @retval None - */ -void SDIO_SetSDIOReadWaitMode(uint32_t SDIO_ReadWaitMode) -{ - /* Check the parameters */ - assert_param(IS_SDIO_READWAIT_MODE(SDIO_ReadWaitMode)); - - *(__IO uint32_t *) DCTRL_RWMOD_BB = SDIO_ReadWaitMode; -} - -/** - * @brief Enables or disables the SD I/O Mode Operation. - * @param NewState: new state of SDIO specific operation. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void SDIO_SetSDIOOperation(FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_FUNCTIONAL_STATE(NewState)); - - *(__IO uint32_t *) DCTRL_SDIOEN_BB = (uint32_t)NewState; -} - -/** - * @brief Enables or disables the SD I/O Mode suspend command sending. - * @param NewState: new state of the SD I/O Mode suspend command. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void SDIO_SendSDIOSuspendCmd(FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_FUNCTIONAL_STATE(NewState)); - - *(__IO uint32_t *) CMD_SDIOSUSPEND_BB = (uint32_t)NewState; -} - -/** - * @brief Enables or disables the command completion signal. - * @param NewState: new state of command completion signal. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void SDIO_CommandCompletionCmd(FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_FUNCTIONAL_STATE(NewState)); - - *(__IO uint32_t *) CMD_ENCMDCOMPL_BB = (uint32_t)NewState; -} - -/** - * @brief Enables or disables the CE-ATA interrupt. - * @param NewState: new state of CE-ATA interrupt. This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void SDIO_CEATAITCmd(FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_FUNCTIONAL_STATE(NewState)); - - *(__IO uint32_t *) CMD_NIEN_BB = (uint32_t)((~((uint32_t)NewState)) & ((uint32_t)0x1)); -} - -/** - * @brief Sends CE-ATA command (CMD61). - * @param NewState: new state of CE-ATA command. This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void SDIO_SendCEATACmd(FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_FUNCTIONAL_STATE(NewState)); - - *(__IO uint32_t *) CMD_ATACMD_BB = (uint32_t)NewState; -} - -/** - * @brief Checks whether the specified SDIO flag is set or not. - * @param SDIO_FLAG: specifies the flag to check. - * This parameter can be one of the following values: - * @arg SDIO_FLAG_CCRCFAIL: Command response received (CRC check failed) - * @arg SDIO_FLAG_DCRCFAIL: Data block sent/received (CRC check failed) - * @arg SDIO_FLAG_CTIMEOUT: Command response timeout - * @arg SDIO_FLAG_DTIMEOUT: Data timeout - * @arg SDIO_FLAG_TXUNDERR: Transmit FIFO underrun error - * @arg SDIO_FLAG_RXOVERR: Received FIFO overrun error - * @arg SDIO_FLAG_CMDREND: Command response received (CRC check passed) - * @arg SDIO_FLAG_CMDSENT: Command sent (no response required) - * @arg SDIO_FLAG_DATAEND: Data end (data counter, SDIDCOUNT, is zero) - * @arg SDIO_FLAG_STBITERR: Start bit not detected on all data signals in wide - * bus mode. - * @arg SDIO_FLAG_DBCKEND: Data block sent/received (CRC check passed) - * @arg SDIO_FLAG_CMDACT: Command transfer in progress - * @arg SDIO_FLAG_TXACT: Data transmit in progress - * @arg SDIO_FLAG_RXACT: Data receive in progress - * @arg SDIO_FLAG_TXFIFOHE: Transmit FIFO Half Empty - * @arg SDIO_FLAG_RXFIFOHF: Receive FIFO Half Full - * @arg SDIO_FLAG_TXFIFOF: Transmit FIFO full - * @arg SDIO_FLAG_RXFIFOF: Receive FIFO full - * @arg SDIO_FLAG_TXFIFOE: Transmit FIFO empty - * @arg SDIO_FLAG_RXFIFOE: Receive FIFO empty - * @arg SDIO_FLAG_TXDAVL: Data available in transmit FIFO - * @arg SDIO_FLAG_RXDAVL: Data available in receive FIFO - * @arg SDIO_FLAG_SDIOIT: SD I/O interrupt received - * @arg SDIO_FLAG_CEATAEND: CE-ATA command completion signal received for CMD61 - * @retval The new state of SDIO_FLAG (SET or RESET). - */ -FlagStatus SDIO_GetFlagStatus(uint32_t SDIO_FLAG) -{ - FlagStatus bitstatus = RESET; - - /* Check the parameters */ - assert_param(IS_SDIO_FLAG(SDIO_FLAG)); - - if ((SDIO->STA & SDIO_FLAG) != (uint32_t)RESET) - { - bitstatus = SET; - } - else - { - bitstatus = RESET; - } - return bitstatus; -} - -/** - * @brief Clears the SDIO's pending flags. - * @param SDIO_FLAG: specifies the flag to clear. - * This parameter can be one or a combination of the following values: - * @arg SDIO_FLAG_CCRCFAIL: Command response received (CRC check failed) - * @arg SDIO_FLAG_DCRCFAIL: Data block sent/received (CRC check failed) - * @arg SDIO_FLAG_CTIMEOUT: Command response timeout - * @arg SDIO_FLAG_DTIMEOUT: Data timeout - * @arg SDIO_FLAG_TXUNDERR: Transmit FIFO underrun error - * @arg SDIO_FLAG_RXOVERR: Received FIFO overrun error - * @arg SDIO_FLAG_CMDREND: Command response received (CRC check passed) - * @arg SDIO_FLAG_CMDSENT: Command sent (no response required) - * @arg SDIO_FLAG_DATAEND: Data end (data counter, SDIDCOUNT, is zero) - * @arg SDIO_FLAG_STBITERR: Start bit not detected on all data signals in wide - * bus mode - * @arg SDIO_FLAG_DBCKEND: Data block sent/received (CRC check passed) - * @arg SDIO_FLAG_SDIOIT: SD I/O interrupt received - * @arg SDIO_FLAG_CEATAEND: CE-ATA command completion signal received for CMD61 - * @retval None - */ -void SDIO_ClearFlag(uint32_t SDIO_FLAG) -{ - /* Check the parameters */ - assert_param(IS_SDIO_CLEAR_FLAG(SDIO_FLAG)); - - SDIO->ICR = SDIO_FLAG; -} - -/** - * @brief Checks whether the specified SDIO interrupt has occurred or not. - * @param SDIO_IT: specifies the SDIO interrupt source to check. - * This parameter can be one of the following values: - * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt - * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt - * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt - * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt - * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt - * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt - * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt - * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt - * @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt - * @arg SDIO_IT_STBITERR: Start bit not detected on all data signals in wide - * bus mode interrupt - * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt - * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt - * @arg SDIO_IT_TXACT: Data transmit in progress interrupt - * @arg SDIO_IT_RXACT: Data receive in progress interrupt - * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt - * @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt - * @arg SDIO_IT_TXFIFOF: Transmit FIFO full interrupt - * @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt - * @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt - * @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt - * @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt - * @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt - * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt - * @arg SDIO_IT_CEATAEND: CE-ATA command completion signal received for CMD61 interrupt - * @retval The new state of SDIO_IT (SET or RESET). - */ -ITStatus SDIO_GetITStatus(uint32_t SDIO_IT) -{ - ITStatus bitstatus = RESET; - - /* Check the parameters */ - assert_param(IS_SDIO_GET_IT(SDIO_IT)); - if ((SDIO->STA & SDIO_IT) != (uint32_t)RESET) - { - bitstatus = SET; - } - else - { - bitstatus = RESET; - } - return bitstatus; -} - -/** - * @brief Clears the SDIO’s interrupt pending bits. - * @param SDIO_IT: specifies the interrupt pending bit to clear. - * This parameter can be one or a combination of the following values: - * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt - * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt - * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt - * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt - * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt - * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt - * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt - * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt - * @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt - * @arg SDIO_IT_STBITERR: Start bit not detected on all data signals in wide - * bus mode interrupt - * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt - * @arg SDIO_IT_CEATAEND: CE-ATA command completion signal received for CMD61 - * @retval None - */ -void SDIO_ClearITPendingBit(uint32_t SDIO_IT) -{ - /* Check the parameters */ - assert_param(IS_SDIO_CLEAR_IT(SDIO_IT)); - - SDIO->ICR = SDIO_IT; -} - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_spi.c b/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_spi.c deleted file mode 100644 index 004803d0c3..0000000000 --- a/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_spi.c +++ /dev/null @@ -1,907 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f10x_spi.c - * @author MCD Application Team - * @version V3.2.0 - * @date 03/01/2010 - * @brief This file provides all the SPI firmware functions. - ****************************************************************************** - * @copy - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2010 STMicroelectronics

- */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x_spi.h" -#include "stm32f10x_rcc.h" - -/** @addtogroup STM32F10x_StdPeriph_Driver - * @{ - */ - -/** @defgroup SPI - * @brief SPI driver modules - * @{ - */ - -/** @defgroup SPI_Private_TypesDefinitions - * @{ - */ - -/** - * @} - */ - - -/** @defgroup SPI_Private_Defines - * @{ - */ - -/* SPI SPE mask */ -#define CR1_SPE_Set ((uint16_t)0x0040) -#define CR1_SPE_Reset ((uint16_t)0xFFBF) - -/* I2S I2SE mask */ -#define I2SCFGR_I2SE_Set ((uint16_t)0x0400) -#define I2SCFGR_I2SE_Reset ((uint16_t)0xFBFF) - -/* SPI CRCNext mask */ -#define CR1_CRCNext_Set ((uint16_t)0x1000) - -/* SPI CRCEN mask */ -#define CR1_CRCEN_Set ((uint16_t)0x2000) -#define CR1_CRCEN_Reset ((uint16_t)0xDFFF) - -/* SPI SSOE mask */ -#define CR2_SSOE_Set ((uint16_t)0x0004) -#define CR2_SSOE_Reset ((uint16_t)0xFFFB) - -/* SPI registers Masks */ -#define CR1_CLEAR_Mask ((uint16_t)0x3040) -#define I2SCFGR_CLEAR_Mask ((uint16_t)0xF040) - -/* SPI or I2S mode selection masks */ -#define SPI_Mode_Select ((uint16_t)0xF7FF) -#define I2S_Mode_Select ((uint16_t)0x0800) - -/* I2S clock source selection masks */ -#define I2S2_CLOCK_SRC ((uint32_t)(0x00020000)) -#define I2S3_CLOCK_SRC ((uint32_t)(0x00040000)) -#define I2S_MUL_MASK ((uint32_t)(0x0000F000)) -#define I2S_DIV_MASK ((uint32_t)(0x000000F0)) - -/** - * @} - */ - -/** @defgroup SPI_Private_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup SPI_Private_Variables - * @{ - */ - -/** - * @} - */ - -/** @defgroup SPI_Private_FunctionPrototypes - * @{ - */ - -/** - * @} - */ - -/** @defgroup SPI_Private_Functions - * @{ - */ - -/** - * @brief Deinitializes the SPIx peripheral registers to their default - * reset values (Affects also the I2Ss). - * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral. - * @retval None - */ -void SPI_I2S_DeInit(SPI_TypeDef* SPIx) -{ - /* Check the parameters */ - assert_param(IS_SPI_ALL_PERIPH(SPIx)); - - if (SPIx == SPI1) - { - /* Enable SPI1 reset state */ - RCC_APB2PeriphResetCmd(RCC_APB2Periph_SPI1, ENABLE); - /* Release SPI1 from reset state */ - RCC_APB2PeriphResetCmd(RCC_APB2Periph_SPI1, DISABLE); - } - else if (SPIx == SPI2) - { - /* Enable SPI2 reset state */ - RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI2, ENABLE); - /* Release SPI2 from reset state */ - RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI2, DISABLE); - } - else - { - if (SPIx == SPI3) - { - /* Enable SPI3 reset state */ - RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI3, ENABLE); - /* Release SPI3 from reset state */ - RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI3, DISABLE); - } - } -} - -/** - * @brief Initializes the SPIx peripheral according to the specified - * parameters in the SPI_InitStruct. - * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral. - * @param SPI_InitStruct: pointer to a SPI_InitTypeDef structure that - * contains the configuration information for the specified SPI peripheral. - * @retval None - */ -void SPI_Init(SPI_TypeDef* SPIx, SPI_InitTypeDef* SPI_InitStruct) -{ - uint16_t tmpreg = 0; - - /* check the parameters */ - assert_param(IS_SPI_ALL_PERIPH(SPIx)); - - /* Check the SPI parameters */ - assert_param(IS_SPI_DIRECTION_MODE(SPI_InitStruct->SPI_Direction)); - assert_param(IS_SPI_MODE(SPI_InitStruct->SPI_Mode)); - assert_param(IS_SPI_DATASIZE(SPI_InitStruct->SPI_DataSize)); - assert_param(IS_SPI_CPOL(SPI_InitStruct->SPI_CPOL)); - assert_param(IS_SPI_CPHA(SPI_InitStruct->SPI_CPHA)); - assert_param(IS_SPI_NSS(SPI_InitStruct->SPI_NSS)); - assert_param(IS_SPI_BAUDRATE_PRESCALER(SPI_InitStruct->SPI_BaudRatePrescaler)); - assert_param(IS_SPI_FIRST_BIT(SPI_InitStruct->SPI_FirstBit)); - assert_param(IS_SPI_CRC_POLYNOMIAL(SPI_InitStruct->SPI_CRCPolynomial)); - -/*---------------------------- SPIx CR1 Configuration ------------------------*/ - /* Get the SPIx CR1 value */ - tmpreg = SPIx->CR1; - /* Clear BIDIMode, BIDIOE, RxONLY, SSM, SSI, LSBFirst, BR, MSTR, CPOL and CPHA bits */ - tmpreg &= CR1_CLEAR_Mask; - /* Configure SPIx: direction, NSS management, first transmitted bit, BaudRate prescaler - master/salve mode, CPOL and CPHA */ - /* Set BIDImode, BIDIOE and RxONLY bits according to SPI_Direction value */ - /* Set SSM, SSI and MSTR bits according to SPI_Mode and SPI_NSS values */ - /* Set LSBFirst bit according to SPI_FirstBit value */ - /* Set BR bits according to SPI_BaudRatePrescaler value */ - /* Set CPOL bit according to SPI_CPOL value */ - /* Set CPHA bit according to SPI_CPHA value */ - tmpreg |= (uint16_t)((uint32_t)SPI_InitStruct->SPI_Direction | SPI_InitStruct->SPI_Mode | - SPI_InitStruct->SPI_DataSize | SPI_InitStruct->SPI_CPOL | - SPI_InitStruct->SPI_CPHA | SPI_InitStruct->SPI_NSS | - SPI_InitStruct->SPI_BaudRatePrescaler | SPI_InitStruct->SPI_FirstBit); - /* Write to SPIx CR1 */ - SPIx->CR1 = tmpreg; - - /* Activate the SPI mode (Reset I2SMOD bit in I2SCFGR register) */ - SPIx->I2SCFGR &= SPI_Mode_Select; - -/*---------------------------- SPIx CRCPOLY Configuration --------------------*/ - /* Write to SPIx CRCPOLY */ - SPIx->CRCPR = SPI_InitStruct->SPI_CRCPolynomial; -} - -/** - * @brief Initializes the SPIx peripheral according to the specified - * parameters in the I2S_InitStruct. - * @param SPIx: where x can be 2 or 3 to select the SPI peripheral - * (configured in I2S mode). - * @param I2S_InitStruct: pointer to an I2S_InitTypeDef structure that - * contains the configuration information for the specified SPI peripheral - * configured in I2S mode. - * @note - * The function calculates the optimal prescaler needed to obtain the most - * accurate audio frequency (depending on the I2S clock source, the PLL values - * and the product configuration). But in case the prescaler value is greater - * than 511, the default value (0x02) will be configured instead. * - * @retval None - */ -void I2S_Init(SPI_TypeDef* SPIx, I2S_InitTypeDef* I2S_InitStruct) -{ - uint16_t tmpreg = 0, i2sdiv = 2, i2sodd = 0, packetlength = 1; - uint32_t tmp = 0; - RCC_ClocksTypeDef RCC_Clocks; - uint32_t sourceclock = 0; - - /* Check the I2S parameters */ - assert_param(IS_SPI_23_PERIPH(SPIx)); - assert_param(IS_I2S_MODE(I2S_InitStruct->I2S_Mode)); - assert_param(IS_I2S_STANDARD(I2S_InitStruct->I2S_Standard)); - assert_param(IS_I2S_DATA_FORMAT(I2S_InitStruct->I2S_DataFormat)); - assert_param(IS_I2S_MCLK_OUTPUT(I2S_InitStruct->I2S_MCLKOutput)); - assert_param(IS_I2S_AUDIO_FREQ(I2S_InitStruct->I2S_AudioFreq)); - assert_param(IS_I2S_CPOL(I2S_InitStruct->I2S_CPOL)); - -/*----------------------- SPIx I2SCFGR & I2SPR Configuration -----------------*/ - /* Clear I2SMOD, I2SE, I2SCFG, PCMSYNC, I2SSTD, CKPOL, DATLEN and CHLEN bits */ - SPIx->I2SCFGR &= I2SCFGR_CLEAR_Mask; - SPIx->I2SPR = 0x0002; - - /* Get the I2SCFGR register value */ - tmpreg = SPIx->I2SCFGR; - - /* If the default value has to be written, reinitialize i2sdiv and i2sodd*/ - if(I2S_InitStruct->I2S_AudioFreq == I2S_AudioFreq_Default) - { - i2sodd = (uint16_t)0; - i2sdiv = (uint16_t)2; - } - /* If the requested audio frequency is not the default, compute the prescaler */ - else - { - /* Check the frame length (For the Prescaler computing) */ - if(I2S_InitStruct->I2S_DataFormat == I2S_DataFormat_16b) - { - /* Packet length is 16 bits */ - packetlength = 1; - } - else - { - /* Packet length is 32 bits */ - packetlength = 2; - } - - /* Get the I2S clock source mask depending on the peripheral number */ - if(((uint32_t)SPIx) == SPI2_BASE) - { - /* The mask is relative to I2S2 */ - tmp = I2S2_CLOCK_SRC; - } - else - { - /* The mask is relative to I2S3 */ - tmp = I2S3_CLOCK_SRC; - } - - /* Check the I2S clock source configuration depending on the Device: - Only Connectivity line devices have the PLL3 VCO clock */ -#ifdef STM32F10X_CL - if((RCC->CFGR2 & tmp) != 0) - { - /* Get the configuration bits of RCC PLL3 multiplier */ - tmp = (uint32_t)((RCC->CFGR2 & I2S_MUL_MASK) >> 12); - - /* Get the value of the PLL3 multiplier */ - if((tmp > 5) && (tmp < 15)) - { - /* Multplier is between 8 and 14 (value 15 is forbidden) */ - tmp += 2; - } - else - { - if (tmp == 15) - { - /* Multiplier is 20 */ - tmp = 20; - } - } - /* Get the PREDIV2 value */ - sourceclock = (uint32_t)(((RCC->CFGR2 & I2S_DIV_MASK) >> 4) + 1); - - /* Calculate the Source Clock frequency based on PLL3 and PREDIV2 values */ - sourceclock = (uint32_t) ((HSE_Value / sourceclock) * tmp * 2); - } - else - { - /* I2S Clock source is System clock: Get System Clock frequency */ - RCC_GetClocksFreq(&RCC_Clocks); - - /* Get the source clock value: based on System Clock value */ - sourceclock = RCC_Clocks.SYSCLK_Frequency; - } -#else /* STM32F10X_HD */ - /* I2S Clock source is System clock: Get System Clock frequency */ - RCC_GetClocksFreq(&RCC_Clocks); - - /* Get the source clock value: based on System Clock value */ - sourceclock = RCC_Clocks.SYSCLK_Frequency; -#endif /* STM32F10X_CL */ - - /* Compute the Real divider depending on the MCLK output state with a flaoting point */ - if(I2S_InitStruct->I2S_MCLKOutput == I2S_MCLKOutput_Enable) - { - /* MCLK output is enabled */ - tmp = (uint16_t)(((((sourceclock / 256) * 10) / I2S_InitStruct->I2S_AudioFreq)) + 5); - } - else - { - /* MCLK output is disabled */ - tmp = (uint16_t)(((((sourceclock / (32 * packetlength)) *10 ) / I2S_InitStruct->I2S_AudioFreq)) + 5); - } - - /* Remove the flaoting point */ - tmp = tmp / 10; - - /* Check the parity of the divider */ - i2sodd = (uint16_t)(tmp & (uint16_t)0x0001); - - /* Compute the i2sdiv prescaler */ - i2sdiv = (uint16_t)((tmp - i2sodd) / 2); - - /* Get the Mask for the Odd bit (SPI_I2SPR[8]) register */ - i2sodd = (uint16_t) (i2sodd << 8); - } - - /* Test if the divider is 1 or 0 or greater than 0xFF */ - if ((i2sdiv < 2) || (i2sdiv > 0xFF)) - { - /* Set the default values */ - i2sdiv = 2; - i2sodd = 0; - } - - /* Write to SPIx I2SPR register the computed value */ - SPIx->I2SPR = (uint16_t)(i2sdiv | (uint16_t)(i2sodd | (uint16_t)I2S_InitStruct->I2S_MCLKOutput)); - - /* Configure the I2S with the SPI_InitStruct values */ - tmpreg |= (uint16_t)(I2S_Mode_Select | (uint16_t)(I2S_InitStruct->I2S_Mode | \ - (uint16_t)(I2S_InitStruct->I2S_Standard | (uint16_t)(I2S_InitStruct->I2S_DataFormat | \ - (uint16_t)I2S_InitStruct->I2S_CPOL)))); - - /* Write to SPIx I2SCFGR */ - SPIx->I2SCFGR = tmpreg; -} - -/** - * @brief Fills each SPI_InitStruct member with its default value. - * @param SPI_InitStruct : pointer to a SPI_InitTypeDef structure which will be initialized. - * @retval None - */ -void SPI_StructInit(SPI_InitTypeDef* SPI_InitStruct) -{ -/*--------------- Reset SPI init structure parameters values -----------------*/ - /* Initialize the SPI_Direction member */ - SPI_InitStruct->SPI_Direction = SPI_Direction_2Lines_FullDuplex; - /* initialize the SPI_Mode member */ - SPI_InitStruct->SPI_Mode = SPI_Mode_Slave; - /* initialize the SPI_DataSize member */ - SPI_InitStruct->SPI_DataSize = SPI_DataSize_8b; - /* Initialize the SPI_CPOL member */ - SPI_InitStruct->SPI_CPOL = SPI_CPOL_Low; - /* Initialize the SPI_CPHA member */ - SPI_InitStruct->SPI_CPHA = SPI_CPHA_1Edge; - /* Initialize the SPI_NSS member */ - SPI_InitStruct->SPI_NSS = SPI_NSS_Hard; - /* Initialize the SPI_BaudRatePrescaler member */ - SPI_InitStruct->SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_2; - /* Initialize the SPI_FirstBit member */ - SPI_InitStruct->SPI_FirstBit = SPI_FirstBit_MSB; - /* Initialize the SPI_CRCPolynomial member */ - SPI_InitStruct->SPI_CRCPolynomial = 7; -} - -/** - * @brief Fills each I2S_InitStruct member with its default value. - * @param I2S_InitStruct : pointer to a I2S_InitTypeDef structure which will be initialized. - * @retval None - */ -void I2S_StructInit(I2S_InitTypeDef* I2S_InitStruct) -{ -/*--------------- Reset I2S init structure parameters values -----------------*/ - /* Initialize the I2S_Mode member */ - I2S_InitStruct->I2S_Mode = I2S_Mode_SlaveTx; - - /* Initialize the I2S_Standard member */ - I2S_InitStruct->I2S_Standard = I2S_Standard_Phillips; - - /* Initialize the I2S_DataFormat member */ - I2S_InitStruct->I2S_DataFormat = I2S_DataFormat_16b; - - /* Initialize the I2S_MCLKOutput member */ - I2S_InitStruct->I2S_MCLKOutput = I2S_MCLKOutput_Disable; - - /* Initialize the I2S_AudioFreq member */ - I2S_InitStruct->I2S_AudioFreq = I2S_AudioFreq_Default; - - /* Initialize the I2S_CPOL member */ - I2S_InitStruct->I2S_CPOL = I2S_CPOL_Low; -} - -/** - * @brief Enables or disables the specified SPI peripheral. - * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral. - * @param NewState: new state of the SPIx peripheral. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void SPI_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_SPI_ALL_PERIPH(SPIx)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - if (NewState != DISABLE) - { - /* Enable the selected SPI peripheral */ - SPIx->CR1 |= CR1_SPE_Set; - } - else - { - /* Disable the selected SPI peripheral */ - SPIx->CR1 &= CR1_SPE_Reset; - } -} - -/** - * @brief Enables or disables the specified SPI peripheral (in I2S mode). - * @param SPIx: where x can be 2 or 3 to select the SPI peripheral. - * @param NewState: new state of the SPIx peripheral. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void I2S_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_SPI_23_PERIPH(SPIx)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - if (NewState != DISABLE) - { - /* Enable the selected SPI peripheral (in I2S mode) */ - SPIx->I2SCFGR |= I2SCFGR_I2SE_Set; - } - else - { - /* Disable the selected SPI peripheral (in I2S mode) */ - SPIx->I2SCFGR &= I2SCFGR_I2SE_Reset; - } -} - -/** - * @brief Enables or disables the specified SPI/I2S interrupts. - * @param SPIx: where x can be - * - 1, 2 or 3 in SPI mode - * - 2 or 3 in I2S mode - * @param SPI_I2S_IT: specifies the SPI/I2S interrupt source to be enabled or disabled. - * This parameter can be one of the following values: - * @arg SPI_I2S_IT_TXE: Tx buffer empty interrupt mask - * @arg SPI_I2S_IT_RXNE: Rx buffer not empty interrupt mask - * @arg SPI_I2S_IT_ERR: Error interrupt mask - * @param NewState: new state of the specified SPI/I2S interrupt. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void SPI_I2S_ITConfig(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT, FunctionalState NewState) -{ - uint16_t itpos = 0, itmask = 0 ; - /* Check the parameters */ - assert_param(IS_SPI_ALL_PERIPH(SPIx)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - assert_param(IS_SPI_I2S_CONFIG_IT(SPI_I2S_IT)); - - /* Get the SPI/I2S IT index */ - itpos = SPI_I2S_IT >> 4; - - /* Set the IT mask */ - itmask = (uint16_t)1 << (uint16_t)itpos; - - if (NewState != DISABLE) - { - /* Enable the selected SPI/I2S interrupt */ - SPIx->CR2 |= itmask; - } - else - { - /* Disable the selected SPI/I2S interrupt */ - SPIx->CR2 &= (uint16_t)~itmask; - } -} - -/** - * @brief Enables or disables the SPIx/I2Sx DMA interface. - * @param SPIx: where x can be - * - 1, 2 or 3 in SPI mode - * - 2 or 3 in I2S mode - * @param SPI_I2S_DMAReq: specifies the SPI/I2S DMA transfer request to be enabled or disabled. - * This parameter can be any combination of the following values: - * @arg SPI_I2S_DMAReq_Tx: Tx buffer DMA transfer request - * @arg SPI_I2S_DMAReq_Rx: Rx buffer DMA transfer request - * @param NewState: new state of the selected SPI/I2S DMA transfer request. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void SPI_I2S_DMACmd(SPI_TypeDef* SPIx, uint16_t SPI_I2S_DMAReq, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_SPI_ALL_PERIPH(SPIx)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - assert_param(IS_SPI_I2S_DMAREQ(SPI_I2S_DMAReq)); - if (NewState != DISABLE) - { - /* Enable the selected SPI/I2S DMA requests */ - SPIx->CR2 |= SPI_I2S_DMAReq; - } - else - { - /* Disable the selected SPI/I2S DMA requests */ - SPIx->CR2 &= (uint16_t)~SPI_I2S_DMAReq; - } -} - -/** - * @brief Transmits a Data through the SPIx/I2Sx peripheral. - * @param SPIx: where x can be - * - 1, 2 or 3 in SPI mode - * - 2 or 3 in I2S mode - * @param Data : Data to be transmitted. - * @retval None - */ -void SPI_I2S_SendData(SPI_TypeDef* SPIx, uint16_t Data) -{ - /* Check the parameters */ - assert_param(IS_SPI_ALL_PERIPH(SPIx)); - - /* Write in the DR register the data to be sent */ - SPIx->DR = Data; -} - -/** - * @brief Returns the most recent received data by the SPIx/I2Sx peripheral. - * @param SPIx: where x can be - * - 1, 2 or 3 in SPI mode - * - 2 or 3 in I2S mode - * @retval The value of the received data. - */ -uint16_t SPI_I2S_ReceiveData(SPI_TypeDef* SPIx) -{ - /* Check the parameters */ - assert_param(IS_SPI_ALL_PERIPH(SPIx)); - - /* Return the data in the DR register */ - return SPIx->DR; -} - -/** - * @brief Configures internally by software the NSS pin for the selected SPI. - * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral. - * @param SPI_NSSInternalSoft: specifies the SPI NSS internal state. - * This parameter can be one of the following values: - * @arg SPI_NSSInternalSoft_Set: Set NSS pin internally - * @arg SPI_NSSInternalSoft_Reset: Reset NSS pin internally - * @retval None - */ -void SPI_NSSInternalSoftwareConfig(SPI_TypeDef* SPIx, uint16_t SPI_NSSInternalSoft) -{ - /* Check the parameters */ - assert_param(IS_SPI_ALL_PERIPH(SPIx)); - assert_param(IS_SPI_NSS_INTERNAL(SPI_NSSInternalSoft)); - if (SPI_NSSInternalSoft != SPI_NSSInternalSoft_Reset) - { - /* Set NSS pin internally by software */ - SPIx->CR1 |= SPI_NSSInternalSoft_Set; - } - else - { - /* Reset NSS pin internally by software */ - SPIx->CR1 &= SPI_NSSInternalSoft_Reset; - } -} - -/** - * @brief Enables or disables the SS output for the selected SPI. - * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral. - * @param NewState: new state of the SPIx SS output. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void SPI_SSOutputCmd(SPI_TypeDef* SPIx, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_SPI_ALL_PERIPH(SPIx)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - if (NewState != DISABLE) - { - /* Enable the selected SPI SS output */ - SPIx->CR2 |= CR2_SSOE_Set; - } - else - { - /* Disable the selected SPI SS output */ - SPIx->CR2 &= CR2_SSOE_Reset; - } -} - -/** - * @brief Configures the data size for the selected SPI. - * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral. - * @param SPI_DataSize: specifies the SPI data size. - * This parameter can be one of the following values: - * @arg SPI_DataSize_16b: Set data frame format to 16bit - * @arg SPI_DataSize_8b: Set data frame format to 8bit - * @retval None - */ -void SPI_DataSizeConfig(SPI_TypeDef* SPIx, uint16_t SPI_DataSize) -{ - /* Check the parameters */ - assert_param(IS_SPI_ALL_PERIPH(SPIx)); - assert_param(IS_SPI_DATASIZE(SPI_DataSize)); - /* Clear DFF bit */ - SPIx->CR1 &= (uint16_t)~SPI_DataSize_16b; - /* Set new DFF bit value */ - SPIx->CR1 |= SPI_DataSize; -} - -/** - * @brief Transmit the SPIx CRC value. - * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral. - * @retval None - */ -void SPI_TransmitCRC(SPI_TypeDef* SPIx) -{ - /* Check the parameters */ - assert_param(IS_SPI_ALL_PERIPH(SPIx)); - - /* Enable the selected SPI CRC transmission */ - SPIx->CR1 |= CR1_CRCNext_Set; -} - -/** - * @brief Enables or disables the CRC value calculation of the transfered bytes. - * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral. - * @param NewState: new state of the SPIx CRC value calculation. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void SPI_CalculateCRC(SPI_TypeDef* SPIx, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_SPI_ALL_PERIPH(SPIx)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - if (NewState != DISABLE) - { - /* Enable the selected SPI CRC calculation */ - SPIx->CR1 |= CR1_CRCEN_Set; - } - else - { - /* Disable the selected SPI CRC calculation */ - SPIx->CR1 &= CR1_CRCEN_Reset; - } -} - -/** - * @brief Returns the transmit or the receive CRC register value for the specified SPI. - * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral. - * @param SPI_CRC: specifies the CRC register to be read. - * This parameter can be one of the following values: - * @arg SPI_CRC_Tx: Selects Tx CRC register - * @arg SPI_CRC_Rx: Selects Rx CRC register - * @retval The selected CRC register value.. - */ -uint16_t SPI_GetCRC(SPI_TypeDef* SPIx, uint8_t SPI_CRC) -{ - uint16_t crcreg = 0; - /* Check the parameters */ - assert_param(IS_SPI_ALL_PERIPH(SPIx)); - assert_param(IS_SPI_CRC(SPI_CRC)); - if (SPI_CRC != SPI_CRC_Rx) - { - /* Get the Tx CRC register */ - crcreg = SPIx->TXCRCR; - } - else - { - /* Get the Rx CRC register */ - crcreg = SPIx->RXCRCR; - } - /* Return the selected CRC register */ - return crcreg; -} - -/** - * @brief Returns the CRC Polynomial register value for the specified SPI. - * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral. - * @retval The CRC Polynomial register value. - */ -uint16_t SPI_GetCRCPolynomial(SPI_TypeDef* SPIx) -{ - /* Check the parameters */ - assert_param(IS_SPI_ALL_PERIPH(SPIx)); - - /* Return the CRC polynomial register */ - return SPIx->CRCPR; -} - -/** - * @brief Selects the data transfer direction in bi-directional mode for the specified SPI. - * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral. - * @param SPI_Direction: specifies the data transfer direction in bi-directional mode. - * This parameter can be one of the following values: - * @arg SPI_Direction_Tx: Selects Tx transmission direction - * @arg SPI_Direction_Rx: Selects Rx receive direction - * @retval None - */ -void SPI_BiDirectionalLineConfig(SPI_TypeDef* SPIx, uint16_t SPI_Direction) -{ - /* Check the parameters */ - assert_param(IS_SPI_ALL_PERIPH(SPIx)); - assert_param(IS_SPI_DIRECTION(SPI_Direction)); - if (SPI_Direction == SPI_Direction_Tx) - { - /* Set the Tx only mode */ - SPIx->CR1 |= SPI_Direction_Tx; - } - else - { - /* Set the Rx only mode */ - SPIx->CR1 &= SPI_Direction_Rx; - } -} - -/** - * @brief Checks whether the specified SPI/I2S flag is set or not. - * @param SPIx: where x can be - * - 1, 2 or 3 in SPI mode - * - 2 or 3 in I2S mode - * @param SPI_I2S_FLAG: specifies the SPI/I2S flag to check. - * This parameter can be one of the following values: - * @arg SPI_I2S_FLAG_TXE: Transmit buffer empty flag. - * @arg SPI_I2S_FLAG_RXNE: Receive buffer not empty flag. - * @arg SPI_I2S_FLAG_BSY: Busy flag. - * @arg SPI_I2S_FLAG_OVR: Overrun flag. - * @arg SPI_FLAG_MODF: Mode Fault flag. - * @arg SPI_FLAG_CRCERR: CRC Error flag. - * @arg I2S_FLAG_UDR: Underrun Error flag. - * @arg I2S_FLAG_CHSIDE: Channel Side flag. - * @retval The new state of SPI_I2S_FLAG (SET or RESET). - */ -FlagStatus SPI_I2S_GetFlagStatus(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG) -{ - FlagStatus bitstatus = RESET; - /* Check the parameters */ - assert_param(IS_SPI_ALL_PERIPH(SPIx)); - assert_param(IS_SPI_I2S_GET_FLAG(SPI_I2S_FLAG)); - /* Check the status of the specified SPI/I2S flag */ - if ((SPIx->SR & SPI_I2S_FLAG) != (uint16_t)RESET) - { - /* SPI_I2S_FLAG is set */ - bitstatus = SET; - } - else - { - /* SPI_I2S_FLAG is reset */ - bitstatus = RESET; - } - /* Return the SPI_I2S_FLAG status */ - return bitstatus; -} - -/** - * @brief Clears the SPIx CRC Error (CRCERR) flag. - * @param SPIx: where x can be - * - 1, 2 or 3 in SPI mode - * @param SPI_I2S_FLAG: specifies the SPI flag to clear. - * This function clears only CRCERR flag. - * @note - * - OVR (OverRun error) flag is cleared by software sequence: a read - * operation to SPI_DR register (SPI_I2S_ReceiveData()) followed by a read - * operation to SPI_SR register (SPI_I2S_GetFlagStatus()). - * - UDR (UnderRun error) flag is cleared by a read operation to - * SPI_SR register (SPI_I2S_GetFlagStatus()). - * - MODF (Mode Fault) flag is cleared by software sequence: a read/write - * operation to SPI_SR register (SPI_I2S_GetFlagStatus()) followed by a - * write operation to SPI_CR1 register (SPI_Cmd() to enable the SPI). - * @retval None - */ -void SPI_I2S_ClearFlag(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG) -{ - /* Check the parameters */ - assert_param(IS_SPI_ALL_PERIPH(SPIx)); - assert_param(IS_SPI_I2S_CLEAR_FLAG(SPI_I2S_FLAG)); - - /* Clear the selected SPI CRC Error (CRCERR) flag */ - SPIx->SR = (uint16_t)~SPI_I2S_FLAG; -} - -/** - * @brief Checks whether the specified SPI/I2S interrupt has occurred or not. - * @param SPIx: where x can be - * - 1, 2 or 3 in SPI mode - * - 2 or 3 in I2S mode - * @param SPI_I2S_IT: specifies the SPI/I2S interrupt source to check. - * This parameter can be one of the following values: - * @arg SPI_I2S_IT_TXE: Transmit buffer empty interrupt. - * @arg SPI_I2S_IT_RXNE: Receive buffer not empty interrupt. - * @arg SPI_I2S_IT_OVR: Overrun interrupt. - * @arg SPI_IT_MODF: Mode Fault interrupt. - * @arg SPI_IT_CRCERR: CRC Error interrupt. - * @arg I2S_IT_UDR: Underrun Error interrupt. - * @retval The new state of SPI_I2S_IT (SET or RESET). - */ -ITStatus SPI_I2S_GetITStatus(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT) -{ - ITStatus bitstatus = RESET; - uint16_t itpos = 0, itmask = 0, enablestatus = 0; - - /* Check the parameters */ - assert_param(IS_SPI_ALL_PERIPH(SPIx)); - assert_param(IS_SPI_I2S_GET_IT(SPI_I2S_IT)); - - /* Get the SPI/I2S IT index */ - itpos = 0x01 << (SPI_I2S_IT & 0x0F); - - /* Get the SPI/I2S IT mask */ - itmask = SPI_I2S_IT >> 4; - - /* Set the IT mask */ - itmask = 0x01 << itmask; - - /* Get the SPI_I2S_IT enable bit status */ - enablestatus = (SPIx->CR2 & itmask) ; - - /* Check the status of the specified SPI/I2S interrupt */ - if (((SPIx->SR & itpos) != (uint16_t)RESET) && enablestatus) - { - /* SPI_I2S_IT is set */ - bitstatus = SET; - } - else - { - /* SPI_I2S_IT is reset */ - bitstatus = RESET; - } - /* Return the SPI_I2S_IT status */ - return bitstatus; -} - -/** - * @brief Clears the SPIx CRC Error (CRCERR) interrupt pending bit. - * @param SPIx: where x can be - * - 1, 2 or 3 in SPI mode - * @param SPI_I2S_IT: specifies the SPI interrupt pending bit to clear. - * This function clears only CRCERR intetrrupt pending bit. - * @note - * - OVR (OverRun Error) interrupt pending bit is cleared by software - * sequence: a read operation to SPI_DR register (SPI_I2S_ReceiveData()) - * followed by a read operation to SPI_SR register (SPI_I2S_GetITStatus()). - * - UDR (UnderRun Error) interrupt pending bit is cleared by a read - * operation to SPI_SR register (SPI_I2S_GetITStatus()). - * - MODF (Mode Fault) interrupt pending bit is cleared by software sequence: - * a read/write operation to SPI_SR register (SPI_I2S_GetITStatus()) - * followed by a write operation to SPI_CR1 register (SPI_Cmd() to enable - * the SPI). - * @retval None - */ -void SPI_I2S_ClearITPendingBit(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT) -{ - uint16_t itpos = 0; - /* Check the parameters */ - assert_param(IS_SPI_ALL_PERIPH(SPIx)); - assert_param(IS_SPI_I2S_CLEAR_IT(SPI_I2S_IT)); - - /* Get the SPI IT index */ - itpos = 0x01 << (SPI_I2S_IT & 0x0F); - - /* Clear the selected SPI CRC Error (CRCERR) interrupt pending bit */ - SPIx->SR = (uint16_t)~itpos; -} -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_tim.c b/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_tim.c deleted file mode 100644 index 10aa8dcd59..0000000000 --- a/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_tim.c +++ /dev/null @@ -1,2832 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f10x_tim.c - * @author MCD Application Team - * @version V3.2.0 - * @date 03/01/2010 - * @brief This file provides all the TIM firmware functions. - ****************************************************************************** - * @copy - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2010 STMicroelectronics

- */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x_tim.h" -#include "stm32f10x_rcc.h" - -/** @addtogroup STM32F10x_StdPeriph_Driver - * @{ - */ - -/** @defgroup TIM - * @brief TIM driver modules - * @{ - */ - -/** @defgroup TIM_Private_TypesDefinitions - * @{ - */ - -/** - * @} - */ - -/** @defgroup TIM_Private_Defines - * @{ - */ - -/* ---------------------- TIM registers bit mask ------------------------ */ -#define CR1_CEN_Set ((uint16_t)0x0001) -#define CR1_CEN_Reset ((uint16_t)0x03FE) -#define CR1_UDIS_Set ((uint16_t)0x0002) -#define CR1_UDIS_Reset ((uint16_t)0x03FD) -#define CR1_URS_Set ((uint16_t)0x0004) -#define CR1_URS_Reset ((uint16_t)0x03FB) -#define CR1_OPM_Reset ((uint16_t)0x03F7) -#define CR1_CounterMode_Mask ((uint16_t)0x038F) -#define CR1_ARPE_Set ((uint16_t)0x0080) -#define CR1_ARPE_Reset ((uint16_t)0x037F) -#define CR1_CKD_Mask ((uint16_t)0x00FF) -#define CR2_CCPC_Set ((uint16_t)0x0001) -#define CR2_CCPC_Reset ((uint16_t)0xFFFE) -#define CR2_CCUS_Set ((uint16_t)0x0004) -#define CR2_CCUS_Reset ((uint16_t)0xFFFB) -#define CR2_CCDS_Set ((uint16_t)0x0008) -#define CR2_CCDS_Reset ((uint16_t)0xFFF7) -#define CR2_MMS_Mask ((uint16_t)0xFF8F) -#define CR2_TI1S_Set ((uint16_t)0x0080) -#define CR2_TI1S_Reset ((uint16_t)0xFF7F) -#define CR2_OIS1_Reset ((uint16_t)0x7EFF) -#define CR2_OIS1N_Reset ((uint16_t)0x7DFF) -#define CR2_OIS2_Reset ((uint16_t)0x7BFF) -#define CR2_OIS2N_Reset ((uint16_t)0x77FF) -#define CR2_OIS3_Reset ((uint16_t)0x6FFF) -#define CR2_OIS3N_Reset ((uint16_t)0x5FFF) -#define CR2_OIS4_Reset ((uint16_t)0x3FFF) -#define SMCR_SMS_Mask ((uint16_t)0xFFF8) -#define SMCR_ETR_Mask ((uint16_t)0x00FF) -#define SMCR_TS_Mask ((uint16_t)0xFF8F) -#define SMCR_MSM_Reset ((uint16_t)0xFF7F) -#define SMCR_ECE_Set ((uint16_t)0x4000) -#define CCMR_CC13S_Mask ((uint16_t)0xFFFC) -#define CCMR_CC24S_Mask ((uint16_t)0xFCFF) -#define CCMR_TI13Direct_Set ((uint16_t)0x0001) -#define CCMR_TI24Direct_Set ((uint16_t)0x0100) -#define CCMR_OC13FE_Reset ((uint16_t)0xFFFB) -#define CCMR_OC24FE_Reset ((uint16_t)0xFBFF) -#define CCMR_OC13PE_Reset ((uint16_t)0xFFF7) -#define CCMR_OC24PE_Reset ((uint16_t)0xF7FF) -#define CCMR_OC13M_Mask ((uint16_t)0xFF8F) -#define CCMR_OC24M_Mask ((uint16_t)0x8FFF) -#define CCMR_OC13CE_Reset ((uint16_t)0xFF7F) -#define CCMR_OC24CE_Reset ((uint16_t)0x7FFF) -#define CCMR_IC13PSC_Mask ((uint16_t)0xFFF3) -#define CCMR_IC24PSC_Mask ((uint16_t)0xF3FF) -#define CCMR_IC13F_Mask ((uint16_t)0xFF0F) -#define CCMR_IC24F_Mask ((uint16_t)0x0FFF) -#define CCMR_Offset ((uint16_t)0x0018) -#define CCER_CCE_Set ((uint16_t)0x0001) -#define CCER_CCNE_Set ((uint16_t)0x0004) -#define CCER_CC1P_Reset ((uint16_t)0xFFFD) -#define CCER_CC2P_Reset ((uint16_t)0xFFDF) -#define CCER_CC3P_Reset ((uint16_t)0xFDFF) -#define CCER_CC4P_Reset ((uint16_t)0xDFFF) -#define CCER_CC1NP_Reset ((uint16_t)0xFFF7) -#define CCER_CC2NP_Reset ((uint16_t)0xFF7F) -#define CCER_CC3NP_Reset ((uint16_t)0xF7FF) -#define CCER_CC1E_Set ((uint16_t)0x0001) -#define CCER_CC1E_Reset ((uint16_t)0xFFFE) -#define CCER_CC1NE_Reset ((uint16_t)0xFFFB) -#define CCER_CC2E_Set ((uint16_t)0x0010) -#define CCER_CC2E_Reset ((uint16_t)0xFFEF) -#define CCER_CC2NE_Reset ((uint16_t)0xFFBF) -#define CCER_CC3E_Set ((uint16_t)0x0100) -#define CCER_CC3E_Reset ((uint16_t)0xFEFF) -#define CCER_CC3NE_Reset ((uint16_t)0xFBFF) -#define CCER_CC4E_Set ((uint16_t)0x1000) -#define CCER_CC4E_Reset ((uint16_t)0xEFFF) -#define BDTR_MOE_Set ((uint16_t)0x8000) -#define BDTR_MOE_Reset ((uint16_t)0x7FFF) -/** - * @} - */ - -/** @defgroup TIM_Private_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup TIM_Private_Variables - * @{ - */ - -/** - * @} - */ - -/** @defgroup TIM_Private_FunctionPrototypes - * @{ - */ - -static void TI1_Config(TIM_TypeDef* TIMx, uint16_t TIM_ICPolarity, uint16_t TIM_ICSelection, - uint16_t TIM_ICFilter); -static void TI2_Config(TIM_TypeDef* TIMx, uint16_t TIM_ICPolarity, uint16_t TIM_ICSelection, - uint16_t TIM_ICFilter); -static void TI3_Config(TIM_TypeDef* TIMx, uint16_t TIM_ICPolarity, uint16_t TIM_ICSelection, - uint16_t TIM_ICFilter); -static void TI4_Config(TIM_TypeDef* TIMx, uint16_t TIM_ICPolarity, uint16_t TIM_ICSelection, - uint16_t TIM_ICFilter); -/** - * @} - */ - -/** @defgroup TIM_Private_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup TIM_Private_Variables - * @{ - */ - -/** - * @} - */ - -/** @defgroup TIM_Private_FunctionPrototypes - * @{ - */ - -/** - * @} - */ - -/** @defgroup TIM_Private_Functions - * @{ - */ - -/** - * @brief Deinitializes the TIMx peripheral registers to their default reset values. - * @param TIMx: where x can be 1 to 8 to select the TIM peripheral. - * @retval None - */ -void TIM_DeInit(TIM_TypeDef* TIMx) -{ - /* Check the parameters */ - assert_param(IS_TIM_ALL_PERIPH(TIMx)); - - if (TIMx == TIM1) - { - RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM1, ENABLE); - RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM1, DISABLE); - } - else if (TIMx == TIM2) - { - RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM2, ENABLE); - RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM2, DISABLE); - } - else if (TIMx == TIM3) - { - RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM3, ENABLE); - RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM3, DISABLE); - } - else if (TIMx == TIM4) - { - RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM4, ENABLE); - RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM4, DISABLE); - } - else if (TIMx == TIM5) - { - RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM5, ENABLE); - RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM5, DISABLE); - } - else if (TIMx == TIM6) - { - RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM6, ENABLE); - RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM6, DISABLE); - } - else if (TIMx == TIM7) - { - RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM7, ENABLE); - RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM7, DISABLE); - } - else if (TIMx == TIM8) - { - RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM8, ENABLE); - RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM8, DISABLE); - } - else if (TIMx == TIM15) - { - RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM15, ENABLE); - RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM15, DISABLE); - } - else if (TIMx == TIM16) - { - RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM16, ENABLE); - RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM16, DISABLE); - } - else - { - if (TIMx == TIM17) - { - RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM17, ENABLE); - RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM17, DISABLE); - } - } -} - -/** - * @brief Initializes the TIMx Time Base Unit peripheral according to - * the specified parameters in the TIM_TimeBaseInitStruct. - * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. - * @param TIM_TimeBaseInitStruct: pointer to a TIM_TimeBaseInitTypeDef - * structure that contains the configuration information for the specified TIM peripheral. - * @retval None - */ -void TIM_TimeBaseInit(TIM_TypeDef* TIMx, TIM_TimeBaseInitTypeDef* TIM_TimeBaseInitStruct) -{ - /* Check the parameters */ - assert_param(IS_TIM_ALL_PERIPH(TIMx)); - assert_param(IS_TIM_COUNTER_MODE(TIM_TimeBaseInitStruct->TIM_CounterMode)); - assert_param(IS_TIM_CKD_DIV(TIM_TimeBaseInitStruct->TIM_ClockDivision)); - - /* Select the Counter Mode and set the clock division */ - if((((uint32_t) TIMx) == TIM1_BASE) || (((uint32_t) TIMx) == TIM8_BASE) || - (((uint32_t) TIMx) == TIM2_BASE) || (((uint32_t) TIMx) == TIM3_BASE) || - (((uint32_t) TIMx) == TIM4_BASE) || (((uint32_t) TIMx) == TIM5_BASE)) - { - TIMx->CR1 &= CR1_CKD_Mask & CR1_CounterMode_Mask; - TIMx->CR1 |= (uint32_t)TIM_TimeBaseInitStruct->TIM_ClockDivision | - TIM_TimeBaseInitStruct->TIM_CounterMode; - } - if((((uint32_t) TIMx) != TIM6_BASE) && (((uint32_t) TIMx) != TIM7_BASE)) - { - TIMx->CR1 &= CR1_CKD_Mask; - TIMx->CR1 |= (uint32_t)TIM_TimeBaseInitStruct->TIM_ClockDivision; - } - - /* Set the Autoreload value */ - TIMx->ARR = TIM_TimeBaseInitStruct->TIM_Period ; - - /* Set the Prescaler value */ - TIMx->PSC = TIM_TimeBaseInitStruct->TIM_Prescaler; - - if ((((uint32_t) TIMx) == TIM1_BASE) || (((uint32_t) TIMx) == TIM8_BASE) || - (((uint32_t) TIMx) == TIM15_BASE) || (((uint32_t) TIMx) == TIM16_BASE)|| - (((uint32_t) TIMx) == TIM17_BASE)) - { - /* Set the Repetition Counter value */ - TIMx->RCR = TIM_TimeBaseInitStruct->TIM_RepetitionCounter; - } - - /* Generate an update event to reload the Prescaler value immediatly */ - TIMx->EGR = TIM_PSCReloadMode_Immediate; -} - -/** - * @brief Initializes the TIMx Channel1 according to the specified - * parameters in the TIM_OCInitStruct. - * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. - * @param TIM_OCInitStruct: pointer to a TIM_OCInitTypeDef structure - * that contains the configuration information for the specified TIM peripheral. - * @retval None - */ -void TIM_OC1Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct) -{ - uint16_t tmpccmrx = 0, tmpccer = 0, tmpcr2 = 0; - - /* Check the parameters */ - assert_param(IS_TIM_123458151617_PERIPH(TIMx)); - assert_param(IS_TIM_OC_MODE(TIM_OCInitStruct->TIM_OCMode)); - assert_param(IS_TIM_OUTPUT_STATE(TIM_OCInitStruct->TIM_OutputState)); - assert_param(IS_TIM_OC_POLARITY(TIM_OCInitStruct->TIM_OCPolarity)); - /* Disable the Channel 1: Reset the CC1E Bit */ - TIMx->CCER &= CCER_CC1E_Reset; - - /* Get the TIMx CCER register value */ - tmpccer = TIMx->CCER; - /* Get the TIMx CR2 register value */ - tmpcr2 = TIMx->CR2; - - /* Get the TIMx CCMR1 register value */ - tmpccmrx = TIMx->CCMR1; - - /* Reset the Output Compare mode and Capture/Compare selection Bits */ - tmpccmrx &= CCMR_OC13M_Mask & CCMR_CC13S_Mask; - - /* Select the Output Compare Mode */ - tmpccmrx |= TIM_OCInitStruct->TIM_OCMode; - - /* Reset the Output Polarity level */ - tmpccer &= CCER_CC1P_Reset; - /* Set the Output Compare Polarity */ - tmpccer |= TIM_OCInitStruct->TIM_OCPolarity; - - /* Set the Output State */ - tmpccer |= TIM_OCInitStruct->TIM_OutputState; - - if(((uint32_t) TIMx == TIM1_BASE) || ((uint32_t) TIMx == TIM8_BASE)|| - ((uint32_t) TIMx == TIM15_BASE)||((uint32_t) TIMx == TIM16_BASE)|| - ((uint32_t) TIMx == TIM17_BASE)) - { - assert_param(IS_TIM_OUTPUTN_STATE(TIM_OCInitStruct->TIM_OutputNState)); - assert_param(IS_TIM_OCN_POLARITY(TIM_OCInitStruct->TIM_OCNPolarity)); - assert_param(IS_TIM_OCNIDLE_STATE(TIM_OCInitStruct->TIM_OCNIdleState)); - assert_param(IS_TIM_OCIDLE_STATE(TIM_OCInitStruct->TIM_OCIdleState)); - - /* Reset the Output N Polarity level */ - tmpccer &= CCER_CC1NP_Reset; - /* Set the Output N Polarity */ - tmpccer |= TIM_OCInitStruct->TIM_OCNPolarity; - /* Reset the Output N State */ - tmpccer &= CCER_CC1NE_Reset; - - /* Set the Output N State */ - tmpccer |= TIM_OCInitStruct->TIM_OutputNState; - /* Reset the Ouput Compare and Output Compare N IDLE State */ - tmpcr2 &= CR2_OIS1_Reset; - tmpcr2 &= CR2_OIS1N_Reset; - /* Set the Output Idle state */ - tmpcr2 |= TIM_OCInitStruct->TIM_OCIdleState; - /* Set the Output N Idle state */ - tmpcr2 |= TIM_OCInitStruct->TIM_OCNIdleState; - } - /* Write to TIMx CR2 */ - TIMx->CR2 = tmpcr2; - - /* Write to TIMx CCMR1 */ - TIMx->CCMR1 = tmpccmrx; - - /* Set the Capture Compare Register value */ - TIMx->CCR1 = TIM_OCInitStruct->TIM_Pulse; - - /* Write to TIMx CCER */ - TIMx->CCER = tmpccer; -} - -/** - * @brief Initializes the TIMx Channel2 according to the specified - * parameters in the TIM_OCInitStruct. - * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. - * @param TIM_OCInitStruct: pointer to a TIM_OCInitTypeDef structure - * that contains the configuration information for the specified TIM peripheral. - * @retval None - */ -void TIM_OC2Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct) -{ - uint16_t tmpccmrx = 0, tmpccer = 0, tmpcr2 = 0; - - /* Check the parameters */ - assert_param(IS_TIM_12345815_PERIPH(TIMx)); - assert_param(IS_TIM_OC_MODE(TIM_OCInitStruct->TIM_OCMode)); - assert_param(IS_TIM_OUTPUT_STATE(TIM_OCInitStruct->TIM_OutputState)); - assert_param(IS_TIM_OC_POLARITY(TIM_OCInitStruct->TIM_OCPolarity)); - /* Disable the Channel 2: Reset the CC2E Bit */ - TIMx->CCER &= CCER_CC2E_Reset; - - /* Get the TIMx CCER register value */ - tmpccer = TIMx->CCER; - /* Get the TIMx CR2 register value */ - tmpcr2 = TIMx->CR2; - - /* Get the TIMx CCMR1 register value */ - tmpccmrx = TIMx->CCMR1; - - /* Reset the Output Compare mode and Capture/Compare selection Bits */ - tmpccmrx &= CCMR_OC24M_Mask & CCMR_CC24S_Mask; - - /* Select the Output Compare Mode */ - tmpccmrx |= (uint16_t)(TIM_OCInitStruct->TIM_OCMode << 8); - - /* Reset the Output Polarity level */ - tmpccer &= CCER_CC2P_Reset; - /* Set the Output Compare Polarity */ - tmpccer |= (uint16_t)(TIM_OCInitStruct->TIM_OCPolarity << 4); - - /* Set the Output State */ - tmpccer |= (uint16_t)(TIM_OCInitStruct->TIM_OutputState << 4); - - if(((uint32_t) TIMx == TIM1_BASE) || ((uint32_t) TIMx == TIM8_BASE)) - { - assert_param(IS_TIM_OUTPUTN_STATE(TIM_OCInitStruct->TIM_OutputNState)); - assert_param(IS_TIM_OCN_POLARITY(TIM_OCInitStruct->TIM_OCNPolarity)); - assert_param(IS_TIM_OCNIDLE_STATE(TIM_OCInitStruct->TIM_OCNIdleState)); - assert_param(IS_TIM_OCIDLE_STATE(TIM_OCInitStruct->TIM_OCIdleState)); - - /* Reset the Output N Polarity level */ - tmpccer &= CCER_CC2NP_Reset; - /* Set the Output N Polarity */ - tmpccer |= (uint16_t)(TIM_OCInitStruct->TIM_OCNPolarity << 4); - /* Reset the Output N State */ - tmpccer &= CCER_CC2NE_Reset; - - /* Set the Output N State */ - tmpccer |= (uint16_t)(TIM_OCInitStruct->TIM_OutputNState << 4); - /* Reset the Ouput Compare and Output Compare N IDLE State */ - tmpcr2 &= CR2_OIS2_Reset; - tmpcr2 &= CR2_OIS2N_Reset; - /* Set the Output Idle state */ - tmpcr2 |= (uint16_t)(TIM_OCInitStruct->TIM_OCIdleState << 2); - /* Set the Output N Idle state */ - tmpcr2 |= (uint16_t)(TIM_OCInitStruct->TIM_OCNIdleState << 2); - } - /* Write to TIMx CR2 */ - TIMx->CR2 = tmpcr2; - - /* Write to TIMx CCMR1 */ - TIMx->CCMR1 = tmpccmrx; - - /* Set the Capture Compare Register value */ - TIMx->CCR2 = TIM_OCInitStruct->TIM_Pulse; - - /* Write to TIMx CCER */ - TIMx->CCER = tmpccer; -} - -/** - * @brief Initializes the TIMx Channel3 according to the specified - * parameters in the TIM_OCInitStruct. - * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. - * @param TIM_OCInitStruct: pointer to a TIM_OCInitTypeDef structure - * that contains the configuration information for the specified TIM peripheral. - * @retval None - */ -void TIM_OC3Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct) -{ - uint16_t tmpccmrx = 0, tmpccer = 0, tmpcr2 = 0; - - /* Check the parameters */ - assert_param(IS_TIM_123458_PERIPH(TIMx)); - assert_param(IS_TIM_OC_MODE(TIM_OCInitStruct->TIM_OCMode)); - assert_param(IS_TIM_OUTPUT_STATE(TIM_OCInitStruct->TIM_OutputState)); - assert_param(IS_TIM_OC_POLARITY(TIM_OCInitStruct->TIM_OCPolarity)); - /* Disable the Channel 2: Reset the CC2E Bit */ - TIMx->CCER &= CCER_CC3E_Reset; - - /* Get the TIMx CCER register value */ - tmpccer = TIMx->CCER; - /* Get the TIMx CR2 register value */ - tmpcr2 = TIMx->CR2; - - /* Get the TIMx CCMR2 register value */ - tmpccmrx = TIMx->CCMR2; - - /* Reset the Output Compare mode and Capture/Compare selection Bits */ - tmpccmrx &= CCMR_OC13M_Mask & CCMR_CC13S_Mask; - - /* Select the Output Compare Mode */ - tmpccmrx |= TIM_OCInitStruct->TIM_OCMode; - - /* Reset the Output Polarity level */ - tmpccer &= CCER_CC3P_Reset; - /* Set the Output Compare Polarity */ - tmpccer |= (uint16_t)(TIM_OCInitStruct->TIM_OCPolarity << 8); - - /* Set the Output State */ - tmpccer |= (uint16_t)(TIM_OCInitStruct->TIM_OutputState << 8); - - if(((uint32_t) TIMx == TIM1_BASE) || ((uint32_t) TIMx == TIM8_BASE)) - { - assert_param(IS_TIM_OUTPUTN_STATE(TIM_OCInitStruct->TIM_OutputNState)); - assert_param(IS_TIM_OCN_POLARITY(TIM_OCInitStruct->TIM_OCNPolarity)); - assert_param(IS_TIM_OCNIDLE_STATE(TIM_OCInitStruct->TIM_OCNIdleState)); - assert_param(IS_TIM_OCIDLE_STATE(TIM_OCInitStruct->TIM_OCIdleState)); - - /* Reset the Output N Polarity level */ - tmpccer &= CCER_CC3NP_Reset; - /* Set the Output N Polarity */ - tmpccer |= (uint16_t)(TIM_OCInitStruct->TIM_OCNPolarity << 8); - /* Reset the Output N State */ - tmpccer &= CCER_CC3NE_Reset; - - /* Set the Output N State */ - tmpccer |= (uint16_t)(TIM_OCInitStruct->TIM_OutputNState << 8); - /* Reset the Ouput Compare and Output Compare N IDLE State */ - tmpcr2 &= CR2_OIS3_Reset; - tmpcr2 &= CR2_OIS3N_Reset; - /* Set the Output Idle state */ - tmpcr2 |= (uint16_t)(TIM_OCInitStruct->TIM_OCIdleState << 4); - /* Set the Output N Idle state */ - tmpcr2 |= (uint16_t)(TIM_OCInitStruct->TIM_OCNIdleState << 4); - } - /* Write to TIMx CR2 */ - TIMx->CR2 = tmpcr2; - - /* Write to TIMx CCMR2 */ - TIMx->CCMR2 = tmpccmrx; - - /* Set the Capture Compare Register value */ - TIMx->CCR3 = TIM_OCInitStruct->TIM_Pulse; - - /* Write to TIMx CCER */ - TIMx->CCER = tmpccer; -} - -/** - * @brief Initializes the TIMx Channel4 according to the specified - * parameters in the TIM_OCInitStruct. - * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. - * @param TIM_OCInitStruct: pointer to a TIM_OCInitTypeDef structure - * that contains the configuration information for the specified TIM peripheral. - * @retval None - */ -void TIM_OC4Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct) -{ - uint16_t tmpccmrx = 0, tmpccer = 0, tmpcr2 = 0; - - /* Check the parameters */ - assert_param(IS_TIM_123458_PERIPH(TIMx)); - assert_param(IS_TIM_OC_MODE(TIM_OCInitStruct->TIM_OCMode)); - assert_param(IS_TIM_OUTPUT_STATE(TIM_OCInitStruct->TIM_OutputState)); - assert_param(IS_TIM_OC_POLARITY(TIM_OCInitStruct->TIM_OCPolarity)); - /* Disable the Channel 2: Reset the CC4E Bit */ - TIMx->CCER &= CCER_CC4E_Reset; - - /* Get the TIMx CCER register value */ - tmpccer = TIMx->CCER; - /* Get the TIMx CR2 register value */ - tmpcr2 = TIMx->CR2; - - /* Get the TIMx CCMR2 register value */ - tmpccmrx = TIMx->CCMR2; - - /* Reset the Output Compare mode and Capture/Compare selection Bits */ - tmpccmrx &= CCMR_OC24M_Mask & CCMR_CC24S_Mask; - - /* Select the Output Compare Mode */ - tmpccmrx |= (uint16_t)(TIM_OCInitStruct->TIM_OCMode << 8); - - /* Reset the Output Polarity level */ - tmpccer &= CCER_CC4P_Reset; - /* Set the Output Compare Polarity */ - tmpccer |= (uint16_t)(TIM_OCInitStruct->TIM_OCPolarity << 12); - - /* Set the Output State */ - tmpccer |= (uint16_t)(TIM_OCInitStruct->TIM_OutputState << 12); - - if(((uint32_t) TIMx == TIM1_BASE) || ((uint32_t) TIMx == TIM8_BASE)) - { - assert_param(IS_TIM_OCIDLE_STATE(TIM_OCInitStruct->TIM_OCIdleState)); - /* Reset the Ouput Compare IDLE State */ - tmpcr2 &= CR2_OIS4_Reset; - /* Set the Output Idle state */ - tmpcr2 |= (uint16_t)(TIM_OCInitStruct->TIM_OCIdleState << 6); - } - /* Write to TIMx CR2 */ - TIMx->CR2 = tmpcr2; - - /* Write to TIMx CCMR2 */ - TIMx->CCMR2 = tmpccmrx; - - /* Set the Capture Compare Register value */ - TIMx->CCR4 = TIM_OCInitStruct->TIM_Pulse; - - /* Write to TIMx CCER */ - TIMx->CCER = tmpccer; -} - -/** - * @brief Initializes the TIM peripheral according to the specified - * parameters in the TIM_ICInitStruct. - * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. - * @param TIM_ICInitStruct: pointer to a TIM_ICInitTypeDef structure - * that contains the configuration information for the specified TIM peripheral. - * @retval None - */ -void TIM_ICInit(TIM_TypeDef* TIMx, TIM_ICInitTypeDef* TIM_ICInitStruct) -{ - /* Check the parameters */ - assert_param(IS_TIM_CHANNEL(TIM_ICInitStruct->TIM_Channel)); - assert_param(IS_TIM_IC_POLARITY(TIM_ICInitStruct->TIM_ICPolarity)); - assert_param(IS_TIM_IC_SELECTION(TIM_ICInitStruct->TIM_ICSelection)); - assert_param(IS_TIM_IC_PRESCALER(TIM_ICInitStruct->TIM_ICPrescaler)); - assert_param(IS_TIM_IC_FILTER(TIM_ICInitStruct->TIM_ICFilter)); - - if (TIM_ICInitStruct->TIM_Channel == TIM_Channel_1) - { - assert_param(IS_TIM_123458151617_PERIPH(TIMx)); - /* TI1 Configuration */ - TI1_Config(TIMx, TIM_ICInitStruct->TIM_ICPolarity, - TIM_ICInitStruct->TIM_ICSelection, - TIM_ICInitStruct->TIM_ICFilter); - /* Set the Input Capture Prescaler value */ - TIM_SetIC1Prescaler(TIMx, TIM_ICInitStruct->TIM_ICPrescaler); - } - else if (TIM_ICInitStruct->TIM_Channel == TIM_Channel_2) - { - assert_param(IS_TIM_12345815_PERIPH(TIMx)); - /* TI2 Configuration */ - TI2_Config(TIMx, TIM_ICInitStruct->TIM_ICPolarity, - TIM_ICInitStruct->TIM_ICSelection, - TIM_ICInitStruct->TIM_ICFilter); - /* Set the Input Capture Prescaler value */ - TIM_SetIC2Prescaler(TIMx, TIM_ICInitStruct->TIM_ICPrescaler); - } - else if (TIM_ICInitStruct->TIM_Channel == TIM_Channel_3) - { - assert_param(IS_TIM_123458151617_PERIPH(TIMx)); - /* TI3 Configuration */ - TI3_Config(TIMx, TIM_ICInitStruct->TIM_ICPolarity, - TIM_ICInitStruct->TIM_ICSelection, - TIM_ICInitStruct->TIM_ICFilter); - /* Set the Input Capture Prescaler value */ - TIM_SetIC3Prescaler(TIMx, TIM_ICInitStruct->TIM_ICPrescaler); - } - else - { - assert_param(IS_TIM_123458151617_PERIPH(TIMx)); - /* TI4 Configuration */ - TI4_Config(TIMx, TIM_ICInitStruct->TIM_ICPolarity, - TIM_ICInitStruct->TIM_ICSelection, - TIM_ICInitStruct->TIM_ICFilter); - /* Set the Input Capture Prescaler value */ - TIM_SetIC4Prescaler(TIMx, TIM_ICInitStruct->TIM_ICPrescaler); - } -} - -/** - * @brief Configures the TIM peripheral according to the specified - * parameters in the TIM_ICInitStruct to measure an external PWM signal. - * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. - * @param TIM_ICInitStruct: pointer to a TIM_ICInitTypeDef structure - * that contains the configuration information for the specified TIM peripheral. - * @retval None - */ -void TIM_PWMIConfig(TIM_TypeDef* TIMx, TIM_ICInitTypeDef* TIM_ICInitStruct) -{ - uint16_t icoppositepolarity = TIM_ICPolarity_Rising; - uint16_t icoppositeselection = TIM_ICSelection_DirectTI; - /* Check the parameters */ - assert_param(IS_TIM_12345815_PERIPH(TIMx)); - /* Select the Opposite Input Polarity */ - if (TIM_ICInitStruct->TIM_ICPolarity == TIM_ICPolarity_Rising) - { - icoppositepolarity = TIM_ICPolarity_Falling; - } - else - { - icoppositepolarity = TIM_ICPolarity_Rising; - } - /* Select the Opposite Input */ - if (TIM_ICInitStruct->TIM_ICSelection == TIM_ICSelection_DirectTI) - { - icoppositeselection = TIM_ICSelection_IndirectTI; - } - else - { - icoppositeselection = TIM_ICSelection_DirectTI; - } - if (TIM_ICInitStruct->TIM_Channel == TIM_Channel_1) - { - /* TI1 Configuration */ - TI1_Config(TIMx, TIM_ICInitStruct->TIM_ICPolarity, TIM_ICInitStruct->TIM_ICSelection, - TIM_ICInitStruct->TIM_ICFilter); - /* Set the Input Capture Prescaler value */ - TIM_SetIC1Prescaler(TIMx, TIM_ICInitStruct->TIM_ICPrescaler); - /* TI2 Configuration */ - TI2_Config(TIMx, icoppositepolarity, icoppositeselection, TIM_ICInitStruct->TIM_ICFilter); - /* Set the Input Capture Prescaler value */ - TIM_SetIC2Prescaler(TIMx, TIM_ICInitStruct->TIM_ICPrescaler); - } - else - { - /* TI2 Configuration */ - TI2_Config(TIMx, TIM_ICInitStruct->TIM_ICPolarity, TIM_ICInitStruct->TIM_ICSelection, - TIM_ICInitStruct->TIM_ICFilter); - /* Set the Input Capture Prescaler value */ - TIM_SetIC2Prescaler(TIMx, TIM_ICInitStruct->TIM_ICPrescaler); - /* TI1 Configuration */ - TI1_Config(TIMx, icoppositepolarity, icoppositeselection, TIM_ICInitStruct->TIM_ICFilter); - /* Set the Input Capture Prescaler value */ - TIM_SetIC1Prescaler(TIMx, TIM_ICInitStruct->TIM_ICPrescaler); - } -} - -/** - * @brief Configures the: Break feature, dead time, Lock level, the OSSI, - * the OSSR State and the AOE(automatic output enable). - * @param TIMx: where x can be 1 or 8 to select the TIM - * @param TIM_BDTRInitStruct: pointer to a TIM_BDTRInitTypeDef structure that - * contains the BDTR Register configuration information for the TIM peripheral. - * @retval None - */ -void TIM_BDTRConfig(TIM_TypeDef* TIMx, TIM_BDTRInitTypeDef *TIM_BDTRInitStruct) -{ - /* Check the parameters */ - assert_param(IS_TIM_18151617_PERIPH(TIMx)); - assert_param(IS_TIM_OSSR_STATE(TIM_BDTRInitStruct->TIM_OSSRState)); - assert_param(IS_TIM_OSSI_STATE(TIM_BDTRInitStruct->TIM_OSSIState)); - assert_param(IS_TIM_LOCK_LEVEL(TIM_BDTRInitStruct->TIM_LOCKLevel)); - assert_param(IS_TIM_BREAK_STATE(TIM_BDTRInitStruct->TIM_Break)); - assert_param(IS_TIM_BREAK_POLARITY(TIM_BDTRInitStruct->TIM_BreakPolarity)); - assert_param(IS_TIM_AUTOMATIC_OUTPUT_STATE(TIM_BDTRInitStruct->TIM_AutomaticOutput)); - /* Set the Lock level, the Break enable Bit and the Ploarity, the OSSR State, - the OSSI State, the dead time value and the Automatic Output Enable Bit */ - TIMx->BDTR = (uint32_t)TIM_BDTRInitStruct->TIM_OSSRState | TIM_BDTRInitStruct->TIM_OSSIState | - TIM_BDTRInitStruct->TIM_LOCKLevel | TIM_BDTRInitStruct->TIM_DeadTime | - TIM_BDTRInitStruct->TIM_Break | TIM_BDTRInitStruct->TIM_BreakPolarity | - TIM_BDTRInitStruct->TIM_AutomaticOutput; -} - -/** - * @brief Fills each TIM_TimeBaseInitStruct member with its default value. - * @param TIM_TimeBaseInitStruct : pointer to a TIM_TimeBaseInitTypeDef - * structure which will be initialized. - * @retval None - */ -void TIM_TimeBaseStructInit(TIM_TimeBaseInitTypeDef* TIM_TimeBaseInitStruct) -{ - /* Set the default configuration */ - TIM_TimeBaseInitStruct->TIM_Period = 0xFFFF; - TIM_TimeBaseInitStruct->TIM_Prescaler = 0x0000; - TIM_TimeBaseInitStruct->TIM_ClockDivision = TIM_CKD_DIV1; - TIM_TimeBaseInitStruct->TIM_CounterMode = TIM_CounterMode_Up; - TIM_TimeBaseInitStruct->TIM_RepetitionCounter = 0x0000; -} - -/** - * @brief Fills each TIM_OCInitStruct member with its default value. - * @param TIM_OCInitStruct : pointer to a TIM_OCInitTypeDef structure which will - * be initialized. - * @retval None - */ -void TIM_OCStructInit(TIM_OCInitTypeDef* TIM_OCInitStruct) -{ - /* Set the default configuration */ - TIM_OCInitStruct->TIM_OCMode = TIM_OCMode_Timing; - TIM_OCInitStruct->TIM_OutputState = TIM_OutputState_Disable; - TIM_OCInitStruct->TIM_OutputNState = TIM_OutputNState_Disable; - TIM_OCInitStruct->TIM_Pulse = 0x0000; - TIM_OCInitStruct->TIM_OCPolarity = TIM_OCPolarity_High; - TIM_OCInitStruct->TIM_OCNPolarity = TIM_OCPolarity_High; - TIM_OCInitStruct->TIM_OCIdleState = TIM_OCIdleState_Reset; - TIM_OCInitStruct->TIM_OCNIdleState = TIM_OCNIdleState_Reset; -} - -/** - * @brief Fills each TIM_ICInitStruct member with its default value. - * @param TIM_ICInitStruct : pointer to a TIM_ICInitTypeDef structure which will - * be initialized. - * @retval None - */ -void TIM_ICStructInit(TIM_ICInitTypeDef* TIM_ICInitStruct) -{ - /* Set the default configuration */ - TIM_ICInitStruct->TIM_Channel = TIM_Channel_1; - TIM_ICInitStruct->TIM_ICPolarity = TIM_ICPolarity_Rising; - TIM_ICInitStruct->TIM_ICSelection = TIM_ICSelection_DirectTI; - TIM_ICInitStruct->TIM_ICPrescaler = TIM_ICPSC_DIV1; - TIM_ICInitStruct->TIM_ICFilter = 0x00; -} - -/** - * @brief Fills each TIM_BDTRInitStruct member with its default value. - * @param TIM_BDTRInitStruct: pointer to a TIM_BDTRInitTypeDef structure which - * will be initialized. - * @retval None - */ -void TIM_BDTRStructInit(TIM_BDTRInitTypeDef* TIM_BDTRInitStruct) -{ - /* Set the default configuration */ - TIM_BDTRInitStruct->TIM_OSSRState = TIM_OSSRState_Disable; - TIM_BDTRInitStruct->TIM_OSSIState = TIM_OSSIState_Disable; - TIM_BDTRInitStruct->TIM_LOCKLevel = TIM_LOCKLevel_OFF; - TIM_BDTRInitStruct->TIM_DeadTime = 0x00; - TIM_BDTRInitStruct->TIM_Break = TIM_Break_Disable; - TIM_BDTRInitStruct->TIM_BreakPolarity = TIM_BreakPolarity_Low; - TIM_BDTRInitStruct->TIM_AutomaticOutput = TIM_AutomaticOutput_Disable; -} - -/** - * @brief Enables or disables the specified TIM peripheral. - * @param TIMx: where x can be 1 to 8 to select the TIMx peripheral. - * @param NewState: new state of the TIMx peripheral. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void TIM_Cmd(TIM_TypeDef* TIMx, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_TIM_ALL_PERIPH(TIMx)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - - if (NewState != DISABLE) - { - /* Enable the TIM Counter */ - TIMx->CR1 |= CR1_CEN_Set; - } - else - { - /* Disable the TIM Counter */ - TIMx->CR1 &= CR1_CEN_Reset; - } -} - -/** - * @brief Enables or disables the TIM peripheral Main Outputs. - * @param TIMx: where x can be 1 or 8 to select the TIMx peripheral. - * @param NewState: new state of the TIM peripheral Main Outputs. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void TIM_CtrlPWMOutputs(TIM_TypeDef* TIMx, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_TIM_18151617_PERIPH(TIMx)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - if (NewState != DISABLE) - { - /* Enable the TIM Main Output */ - TIMx->BDTR |= BDTR_MOE_Set; - } - else - { - /* Disable the TIM Main Output */ - TIMx->BDTR &= BDTR_MOE_Reset; - } -} - -/** - * @brief Enables or disables the specified TIM interrupts. - * @param TIMx: where x can be 1 to 8 to select the TIMx peripheral. - * @param TIM_IT: specifies the TIM interrupts sources to be enabled or disabled. - * This parameter can be any combination of the following values: - * @arg TIM_IT_Update: TIM update Interrupt source - * @arg TIM_IT_CC1: TIM Capture Compare 1 Interrupt source - * @arg TIM_IT_CC2: TIM Capture Compare 2 Interrupt source - * @arg TIM_IT_CC3: TIM Capture Compare 3 Interrupt source - * @arg TIM_IT_CC4: TIM Capture Compare 4 Interrupt source - * @arg TIM_IT_COM: TIM Commutation Interrupt source - * @arg TIM_IT_Trigger: TIM Trigger Interrupt source - * @arg TIM_IT_Break: TIM Break Interrupt source - * @note - * - TIM6 and TIM7 can only generate an update interrupt. - * - TIM_IT_COM and TIM_IT_Break are used only with TIM1 and TIM8. - * @param NewState: new state of the TIM interrupts. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void TIM_ITConfig(TIM_TypeDef* TIMx, uint16_t TIM_IT, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_TIM_ALL_PERIPH(TIMx)); - assert_param(IS_TIM_IT(TIM_IT)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - - if (NewState != DISABLE) - { - /* Enable the Interrupt sources */ - TIMx->DIER |= TIM_IT; - } - else - { - /* Disable the Interrupt sources */ - TIMx->DIER &= (uint16_t)~TIM_IT; - } -} - -/** - * @brief Configures the TIMx event to be generate by software. - * @param TIMx: where x can be 1 to 8 to select the TIM peripheral. - * @param TIM_EventSource: specifies the event source. - * This parameter can be one or more of the following values: - * @arg TIM_EventSource_Update: Timer update Event source - * @arg TIM_EventSource_CC1: Timer Capture Compare 1 Event source - * @arg TIM_EventSource_CC2: Timer Capture Compare 2 Event source - * @arg TIM_EventSource_CC3: Timer Capture Compare 3 Event source - * @arg TIM_EventSource_CC4: Timer Capture Compare 4 Event source - * @arg TIM_EventSource_COM: Timer COM event source - * @arg TIM_EventSource_Trigger: Timer Trigger Event source - * @arg TIM_EventSource_Break: Timer Break event source - * @note - * - TIM6 and TIM7 can only generate an update event. - * - TIM_EventSource_COM and TIM_EventSource_Break are used only with TIM1 and TIM8. - * @retval None - */ -void TIM_GenerateEvent(TIM_TypeDef* TIMx, uint16_t TIM_EventSource) -{ - /* Check the parameters */ - assert_param(IS_TIM_ALL_PERIPH(TIMx)); - assert_param(IS_TIM_EVENT_SOURCE(TIM_EventSource)); - - /* Set the event sources */ - TIMx->EGR = TIM_EventSource; -} - -/** - * @brief Configures the TIMx’s DMA interface. - * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. - * @param TIM_DMABase: DMA Base address. - * This parameter can be one of the following values: - * @arg TIM_DMABase_CR, TIM_DMABase_CR2, TIM_DMABase_SMCR, - * TIM_DMABase_DIER, TIM1_DMABase_SR, TIM_DMABase_EGR, - * TIM_DMABase_CCMR1, TIM_DMABase_CCMR2, TIM_DMABase_CCER, - * TIM_DMABase_CNT, TIM_DMABase_PSC, TIM_DMABase_ARR, - * TIM_DMABase_RCR, TIM_DMABase_CCR1, TIM_DMABase_CCR2, - * TIM_DMABase_CCR3, TIM_DMABase_CCR4, TIM_DMABase_BDTR, - * TIM_DMABase_DCR. - * @param TIM_DMABurstLength: DMA Burst length. - * This parameter can be one value between: - * TIM_DMABurstLength_1Byte and TIM_DMABurstLength_18Bytes. - * @retval None - */ -void TIM_DMAConfig(TIM_TypeDef* TIMx, uint16_t TIM_DMABase, uint16_t TIM_DMABurstLength) -{ - /* Check the parameters */ - assert_param(IS_TIM_123458151617_PERIPH(TIMx)); - assert_param(IS_TIM_DMA_BASE(TIM_DMABase)); - assert_param(IS_TIM_DMA_LENGTH(TIM_DMABurstLength)); - /* Set the DMA Base and the DMA Burst Length */ - TIMx->DCR = TIM_DMABase | TIM_DMABurstLength; -} - -/** - * @brief Enables or disables the TIMx’s DMA Requests. - * @param TIMx: where x can be 1 to 8 to select the TIM peripheral. - * @param TIM_DMASource: specifies the DMA Request sources. - * This parameter can be any combination of the following values: - * @arg TIM_DMA_Update: TIM update Interrupt source - * @arg TIM_DMA_CC1: TIM Capture Compare 1 DMA source - * @arg TIM_DMA_CC2: TIM Capture Compare 2 DMA source - * @arg TIM_DMA_CC3: TIM Capture Compare 3 DMA source - * @arg TIM_DMA_CC4: TIM Capture Compare 4 DMA source - * @arg TIM_DMA_COM: TIM Commutation DMA source - * @arg TIM_DMA_Trigger: TIM Trigger DMA source - * @param NewState: new state of the DMA Request sources. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void TIM_DMACmd(TIM_TypeDef* TIMx, uint16_t TIM_DMASource, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_TIM_ALL_PERIPH(TIMx)); - assert_param(IS_TIM_DMA_SOURCE(TIM_DMASource)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - - if (NewState != DISABLE) - { - /* Enable the DMA sources */ - TIMx->DIER |= TIM_DMASource; - } - else - { - /* Disable the DMA sources */ - TIMx->DIER &= (uint16_t)~TIM_DMASource; - } -} - -/** - * @brief Configures the TIMx interrnal Clock - * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. - * @retval None - */ -void TIM_InternalClockConfig(TIM_TypeDef* TIMx) -{ - /* Check the parameters */ - assert_param(IS_TIM_123458151617_PERIPH(TIMx)); - /* Disable slave mode to clock the prescaler directly with the internal clock */ - TIMx->SMCR &= SMCR_SMS_Mask; -} - -/** - * @brief Configures the TIMx Internal Trigger as External Clock - * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. - * @param TIM_ITRSource: Trigger source. - * This parameter can be one of the following values: - * @param TIM_TS_ITR0: Internal Trigger 0 - * @param TIM_TS_ITR1: Internal Trigger 1 - * @param TIM_TS_ITR2: Internal Trigger 2 - * @param TIM_TS_ITR3: Internal Trigger 3 - * @retval None - */ -void TIM_ITRxExternalClockConfig(TIM_TypeDef* TIMx, uint16_t TIM_InputTriggerSource) -{ - /* Check the parameters */ - assert_param(IS_TIM_12345815_PERIPH(TIMx)); - assert_param(IS_TIM_INTERNAL_TRIGGER_SELECTION(TIM_InputTriggerSource)); - /* Select the Internal Trigger */ - TIM_SelectInputTrigger(TIMx, TIM_InputTriggerSource); - /* Select the External clock mode1 */ - TIMx->SMCR |= TIM_SlaveMode_External1; -} - -/** - * @brief Configures the TIMx Trigger as External Clock - * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. - * @param TIM_TIxExternalCLKSource: Trigger source. - * This parameter can be one of the following values: - * @arg TIM_TIxExternalCLK1Source_TI1ED: TI1 Edge Detector - * @arg TIM_TIxExternalCLK1Source_TI1: Filtered Timer Input 1 - * @arg TIM_TIxExternalCLK1Source_TI2: Filtered Timer Input 2 - * @param TIM_ICPolarity: specifies the TIx Polarity. - * This parameter can be one of the following values: - * @arg TIM_ICPolarity_Rising - * @arg TIM_ICPolarity_Falling - * @param ICFilter : specifies the filter value. - * This parameter must be a value between 0x0 and 0xF. - * @retval None - */ -void TIM_TIxExternalClockConfig(TIM_TypeDef* TIMx, uint16_t TIM_TIxExternalCLKSource, - uint16_t TIM_ICPolarity, uint16_t ICFilter) -{ - /* Check the parameters */ - assert_param(IS_TIM_12345815_PERIPH(TIMx)); - assert_param(IS_TIM_TIXCLK_SOURCE(TIM_TIxExternalCLKSource)); - assert_param(IS_TIM_IC_POLARITY(TIM_ICPolarity)); - assert_param(IS_TIM_IC_FILTER(ICFilter)); - /* Configure the Timer Input Clock Source */ - if (TIM_TIxExternalCLKSource == TIM_TIxExternalCLK1Source_TI2) - { - TI2_Config(TIMx, TIM_ICPolarity, TIM_ICSelection_DirectTI, ICFilter); - } - else - { - TI1_Config(TIMx, TIM_ICPolarity, TIM_ICSelection_DirectTI, ICFilter); - } - /* Select the Trigger source */ - TIM_SelectInputTrigger(TIMx, TIM_TIxExternalCLKSource); - /* Select the External clock mode1 */ - TIMx->SMCR |= TIM_SlaveMode_External1; -} - -/** - * @brief Configures the External clock Mode1 - * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. - * @param TIM_ExtTRGPrescaler: The external Trigger Prescaler. - * This parameter can be one of the following values: - * @arg TIM_ExtTRGPSC_OFF: ETRP Prescaler OFF. - * @arg TIM_ExtTRGPSC_DIV2: ETRP frequency divided by 2. - * @arg TIM_ExtTRGPSC_DIV4: ETRP frequency divided by 4. - * @arg TIM_ExtTRGPSC_DIV8: ETRP frequency divided by 8. - * @param TIM_ExtTRGPolarity: The external Trigger Polarity. - * This parameter can be one of the following values: - * @arg TIM_ExtTRGPolarity_Inverted: active low or falling edge active. - * @arg TIM_ExtTRGPolarity_NonInverted: active high or rising edge active. - * @param ExtTRGFilter: External Trigger Filter. - * This parameter must be a value between 0x00 and 0x0F - * @retval None - */ -void TIM_ETRClockMode1Config(TIM_TypeDef* TIMx, uint16_t TIM_ExtTRGPrescaler, uint16_t TIM_ExtTRGPolarity, - uint16_t ExtTRGFilter) -{ - uint16_t tmpsmcr = 0; - /* Check the parameters */ - assert_param(IS_TIM_123458_PERIPH(TIMx)); - assert_param(IS_TIM_EXT_PRESCALER(TIM_ExtTRGPrescaler)); - assert_param(IS_TIM_EXT_POLARITY(TIM_ExtTRGPolarity)); - assert_param(IS_TIM_EXT_FILTER(ExtTRGFilter)); - /* Configure the ETR Clock source */ - TIM_ETRConfig(TIMx, TIM_ExtTRGPrescaler, TIM_ExtTRGPolarity, ExtTRGFilter); - - /* Get the TIMx SMCR register value */ - tmpsmcr = TIMx->SMCR; - /* Reset the SMS Bits */ - tmpsmcr &= SMCR_SMS_Mask; - /* Select the External clock mode1 */ - tmpsmcr |= TIM_SlaveMode_External1; - /* Select the Trigger selection : ETRF */ - tmpsmcr &= SMCR_TS_Mask; - tmpsmcr |= TIM_TS_ETRF; - /* Write to TIMx SMCR */ - TIMx->SMCR = tmpsmcr; -} - -/** - * @brief Configures the External clock Mode2 - * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. - * @param TIM_ExtTRGPrescaler: The external Trigger Prescaler. - * This parameter can be one of the following values: - * @arg TIM_ExtTRGPSC_OFF: ETRP Prescaler OFF. - * @arg TIM_ExtTRGPSC_DIV2: ETRP frequency divided by 2. - * @arg TIM_ExtTRGPSC_DIV4: ETRP frequency divided by 4. - * @arg TIM_ExtTRGPSC_DIV8: ETRP frequency divided by 8. - * @param TIM_ExtTRGPolarity: The external Trigger Polarity. - * This parameter can be one of the following values: - * @arg TIM_ExtTRGPolarity_Inverted: active low or falling edge active. - * @arg TIM_ExtTRGPolarity_NonInverted: active high or rising edge active. - * @param ExtTRGFilter: External Trigger Filter. - * This parameter must be a value between 0x00 and 0x0F - * @retval None - */ -void TIM_ETRClockMode2Config(TIM_TypeDef* TIMx, uint16_t TIM_ExtTRGPrescaler, - uint16_t TIM_ExtTRGPolarity, uint16_t ExtTRGFilter) -{ - /* Check the parameters */ - assert_param(IS_TIM_123458_PERIPH(TIMx)); - assert_param(IS_TIM_EXT_PRESCALER(TIM_ExtTRGPrescaler)); - assert_param(IS_TIM_EXT_POLARITY(TIM_ExtTRGPolarity)); - assert_param(IS_TIM_EXT_FILTER(ExtTRGFilter)); - /* Configure the ETR Clock source */ - TIM_ETRConfig(TIMx, TIM_ExtTRGPrescaler, TIM_ExtTRGPolarity, ExtTRGFilter); - /* Enable the External clock mode2 */ - TIMx->SMCR |= SMCR_ECE_Set; -} - -/** - * @brief Configures the TIMx External Trigger (ETR). - * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. - * @param TIM_ExtTRGPrescaler: The external Trigger Prescaler. - * This parameter can be one of the following values: - * @arg TIM_ExtTRGPSC_OFF: ETRP Prescaler OFF. - * @arg TIM_ExtTRGPSC_DIV2: ETRP frequency divided by 2. - * @arg TIM_ExtTRGPSC_DIV4: ETRP frequency divided by 4. - * @arg TIM_ExtTRGPSC_DIV8: ETRP frequency divided by 8. - * @param TIM_ExtTRGPolarity: The external Trigger Polarity. - * This parameter can be one of the following values: - * @arg TIM_ExtTRGPolarity_Inverted: active low or falling edge active. - * @arg TIM_ExtTRGPolarity_NonInverted: active high or rising edge active. - * @param ExtTRGFilter: External Trigger Filter. - * This parameter must be a value between 0x00 and 0x0F - * @retval None - */ -void TIM_ETRConfig(TIM_TypeDef* TIMx, uint16_t TIM_ExtTRGPrescaler, uint16_t TIM_ExtTRGPolarity, - uint16_t ExtTRGFilter) -{ - uint16_t tmpsmcr = 0; - /* Check the parameters */ - assert_param(IS_TIM_123458_PERIPH(TIMx)); - assert_param(IS_TIM_EXT_PRESCALER(TIM_ExtTRGPrescaler)); - assert_param(IS_TIM_EXT_POLARITY(TIM_ExtTRGPolarity)); - assert_param(IS_TIM_EXT_FILTER(ExtTRGFilter)); - tmpsmcr = TIMx->SMCR; - /* Reset the ETR Bits */ - tmpsmcr &= SMCR_ETR_Mask; - /* Set the Prescaler, the Filter value and the Polarity */ - tmpsmcr |= (uint16_t)(TIM_ExtTRGPrescaler | (uint16_t)(TIM_ExtTRGPolarity | (uint16_t)(ExtTRGFilter << (uint16_t)8))); - /* Write to TIMx SMCR */ - TIMx->SMCR = tmpsmcr; -} - -/** - * @brief Configures the TIMx Prescaler. - * @param TIMx: where x can be 1 to 8 to select the TIM peripheral. - * @param Prescaler: specifies the Prescaler Register value - * @param TIM_PSCReloadMode: specifies the TIM Prescaler Reload mode - * This parameter can be one of the following values: - * @arg TIM_PSCReloadMode_Update: The Prescaler is loaded at the update event. - * @arg TIM_PSCReloadMode_Immediate: The Prescaler is loaded immediatly. - * @retval None - */ -void TIM_PrescalerConfig(TIM_TypeDef* TIMx, uint16_t Prescaler, uint16_t TIM_PSCReloadMode) -{ - /* Check the parameters */ - assert_param(IS_TIM_ALL_PERIPH(TIMx)); - assert_param(IS_TIM_PRESCALER_RELOAD(TIM_PSCReloadMode)); - /* Set the Prescaler value */ - TIMx->PSC = Prescaler; - /* Set or reset the UG Bit */ - TIMx->EGR = TIM_PSCReloadMode; -} - -/** - * @brief Specifies the TIMx Counter Mode to be used. - * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. - * @param TIM_CounterMode: specifies the Counter Mode to be used - * This parameter can be one of the following values: - * @arg TIM_CounterMode_Up: TIM Up Counting Mode - * @arg TIM_CounterMode_Down: TIM Down Counting Mode - * @arg TIM_CounterMode_CenterAligned1: TIM Center Aligned Mode1 - * @arg TIM_CounterMode_CenterAligned2: TIM Center Aligned Mode2 - * @arg TIM_CounterMode_CenterAligned3: TIM Center Aligned Mode3 - * @retval None - */ -void TIM_CounterModeConfig(TIM_TypeDef* TIMx, uint16_t TIM_CounterMode) -{ - uint16_t tmpcr1 = 0; - /* Check the parameters */ - assert_param(IS_TIM_123458_PERIPH(TIMx)); - assert_param(IS_TIM_COUNTER_MODE(TIM_CounterMode)); - tmpcr1 = TIMx->CR1; - /* Reset the CMS and DIR Bits */ - tmpcr1 &= CR1_CounterMode_Mask; - /* Set the Counter Mode */ - tmpcr1 |= TIM_CounterMode; - /* Write to TIMx CR1 register */ - TIMx->CR1 = tmpcr1; -} - -/** - * @brief Selects the Input Trigger source - * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. - * @param TIM_InputTriggerSource: The Input Trigger source. - * This parameter can be one of the following values: - * @arg TIM_TS_ITR0: Internal Trigger 0 - * @arg TIM_TS_ITR1: Internal Trigger 1 - * @arg TIM_TS_ITR2: Internal Trigger 2 - * @arg TIM_TS_ITR3: Internal Trigger 3 - * @arg TIM_TS_TI1F_ED: TI1 Edge Detector - * @arg TIM_TS_TI1FP1: Filtered Timer Input 1 - * @arg TIM_TS_TI2FP2: Filtered Timer Input 2 - * @arg TIM_TS_ETRF: External Trigger input - * @retval None - */ -void TIM_SelectInputTrigger(TIM_TypeDef* TIMx, uint16_t TIM_InputTriggerSource) -{ - uint16_t tmpsmcr = 0; - /* Check the parameters */ - assert_param(IS_TIM_123458151617_PERIPH(TIMx)); - assert_param(IS_TIM_TRIGGER_SELECTION(TIM_InputTriggerSource)); - /* Get the TIMx SMCR register value */ - tmpsmcr = TIMx->SMCR; - /* Reset the TS Bits */ - tmpsmcr &= SMCR_TS_Mask; - /* Set the Input Trigger source */ - tmpsmcr |= TIM_InputTriggerSource; - /* Write to TIMx SMCR */ - TIMx->SMCR = tmpsmcr; -} - -/** - * @brief Configures the TIMx Encoder Interface. - * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. - * @param TIM_EncoderMode: specifies the TIMx Encoder Mode. - * This parameter can be one of the following values: - * @arg TIM_EncoderMode_TI1: Counter counts on TI1FP1 edge depending on TI2FP2 level. - * @arg TIM_EncoderMode_TI2: Counter counts on TI2FP2 edge depending on TI1FP1 level. - * @arg TIM_EncoderMode_TI12: Counter counts on both TI1FP1 and TI2FP2 edges depending - * on the level of the other input. - * @param TIM_IC1Polarity: specifies the IC1 Polarity - * This parmeter can be one of the following values: - * @arg TIM_ICPolarity_Falling: IC Falling edge. - * @arg TIM_ICPolarity_Rising: IC Rising edge. - * @param TIM_IC2Polarity: specifies the IC2 Polarity - * This parmeter can be one of the following values: - * @arg TIM_ICPolarity_Falling: IC Falling edge. - * @arg TIM_ICPolarity_Rising: IC Rising edge. - * @retval None - */ -void TIM_EncoderInterfaceConfig(TIM_TypeDef* TIMx, uint16_t TIM_EncoderMode, - uint16_t TIM_IC1Polarity, uint16_t TIM_IC2Polarity) -{ - uint16_t tmpsmcr = 0; - uint16_t tmpccmr1 = 0; - uint16_t tmpccer = 0; - - /* Check the parameters */ - assert_param(IS_TIM_12345815_PERIPH(TIMx)); - assert_param(IS_TIM_ENCODER_MODE(TIM_EncoderMode)); - assert_param(IS_TIM_IC_POLARITY(TIM_IC1Polarity)); - assert_param(IS_TIM_IC_POLARITY(TIM_IC2Polarity)); - - /* Get the TIMx SMCR register value */ - tmpsmcr = TIMx->SMCR; - - /* Get the TIMx CCMR1 register value */ - tmpccmr1 = TIMx->CCMR1; - - /* Get the TIMx CCER register value */ - tmpccer = TIMx->CCER; - - /* Set the encoder Mode */ - tmpsmcr &= SMCR_SMS_Mask; - tmpsmcr |= TIM_EncoderMode; - - /* Select the Capture Compare 1 and the Capture Compare 2 as input */ - tmpccmr1 &= CCMR_CC13S_Mask & CCMR_CC24S_Mask; - tmpccmr1 |= CCMR_TI13Direct_Set | CCMR_TI24Direct_Set; - - /* Set the TI1 and the TI2 Polarities */ - tmpccer &= CCER_CC1P_Reset & CCER_CC2P_Reset; - tmpccer |= (uint16_t)(TIM_IC1Polarity | (uint16_t)(TIM_IC2Polarity << (uint16_t)4)); - - /* Write to TIMx SMCR */ - TIMx->SMCR = tmpsmcr; - - /* Write to TIMx CCMR1 */ - TIMx->CCMR1 = tmpccmr1; - - /* Write to TIMx CCER */ - TIMx->CCER = tmpccer; -} - -/** - * @brief Forces the TIMx output 1 waveform to active or inactive level. - * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. - * @param TIM_ForcedAction: specifies the forced Action to be set to the output waveform. - * This parameter can be one of the following values: - * @arg TIM_ForcedAction_Active: Force active level on OC1REF - * @arg TIM_ForcedAction_InActive: Force inactive level on OC1REF. - * @retval None - */ -void TIM_ForcedOC1Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction) -{ - uint16_t tmpccmr1 = 0; - /* Check the parameters */ - assert_param(IS_TIM_123458151617_PERIPH(TIMx)); - assert_param(IS_TIM_FORCED_ACTION(TIM_ForcedAction)); - tmpccmr1 = TIMx->CCMR1; - /* Reset the OC1M Bits */ - tmpccmr1 &= CCMR_OC13M_Mask; - /* Configure The Forced output Mode */ - tmpccmr1 |= TIM_ForcedAction; - /* Write to TIMx CCMR1 register */ - TIMx->CCMR1 = tmpccmr1; -} - -/** - * @brief Forces the TIMx output 2 waveform to active or inactive level. - * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. - * @param TIM_ForcedAction: specifies the forced Action to be set to the output waveform. - * This parameter can be one of the following values: - * @arg TIM_ForcedAction_Active: Force active level on OC2REF - * @arg TIM_ForcedAction_InActive: Force inactive level on OC2REF. - * @retval None - */ -void TIM_ForcedOC2Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction) -{ - uint16_t tmpccmr1 = 0; - /* Check the parameters */ - assert_param(IS_TIM_12345815_PERIPH(TIMx)); - assert_param(IS_TIM_FORCED_ACTION(TIM_ForcedAction)); - tmpccmr1 = TIMx->CCMR1; - /* Reset the OC2M Bits */ - tmpccmr1 &= CCMR_OC24M_Mask; - /* Configure The Forced output Mode */ - tmpccmr1 |= (uint16_t)(TIM_ForcedAction << 8); - /* Write to TIMx CCMR1 register */ - TIMx->CCMR1 = tmpccmr1; -} - -/** - * @brief Forces the TIMx output 3 waveform to active or inactive level. - * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. - * @param TIM_ForcedAction: specifies the forced Action to be set to the output waveform. - * This parameter can be one of the following values: - * @arg TIM_ForcedAction_Active: Force active level on OC3REF - * @arg TIM_ForcedAction_InActive: Force inactive level on OC3REF. - * @retval None - */ -void TIM_ForcedOC3Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction) -{ - uint16_t tmpccmr2 = 0; - /* Check the parameters */ - assert_param(IS_TIM_123458_PERIPH(TIMx)); - assert_param(IS_TIM_FORCED_ACTION(TIM_ForcedAction)); - tmpccmr2 = TIMx->CCMR2; - /* Reset the OC1M Bits */ - tmpccmr2 &= CCMR_OC13M_Mask; - /* Configure The Forced output Mode */ - tmpccmr2 |= TIM_ForcedAction; - /* Write to TIMx CCMR2 register */ - TIMx->CCMR2 = tmpccmr2; -} - -/** - * @brief Forces the TIMx output 4 waveform to active or inactive level. - * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. - * @param TIM_ForcedAction: specifies the forced Action to be set to the output waveform. - * This parameter can be one of the following values: - * @arg TIM_ForcedAction_Active: Force active level on OC4REF - * @arg TIM_ForcedAction_InActive: Force inactive level on OC4REF. - * @retval None - */ -void TIM_ForcedOC4Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction) -{ - uint16_t tmpccmr2 = 0; - /* Check the parameters */ - assert_param(IS_TIM_123458_PERIPH(TIMx)); - assert_param(IS_TIM_FORCED_ACTION(TIM_ForcedAction)); - tmpccmr2 = TIMx->CCMR2; - /* Reset the OC2M Bits */ - tmpccmr2 &= CCMR_OC24M_Mask; - /* Configure The Forced output Mode */ - tmpccmr2 |= (uint16_t)(TIM_ForcedAction << 8); - /* Write to TIMx CCMR2 register */ - TIMx->CCMR2 = tmpccmr2; -} - -/** - * @brief Enables or disables TIMx peripheral Preload register on ARR. - * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. - * @param NewState: new state of the TIMx peripheral Preload register - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void TIM_ARRPreloadConfig(TIM_TypeDef* TIMx, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_TIM_ALL_PERIPH(TIMx)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - if (NewState != DISABLE) - { - /* Set the ARR Preload Bit */ - TIMx->CR1 |= CR1_ARPE_Set; - } - else - { - /* Reset the ARR Preload Bit */ - TIMx->CR1 &= CR1_ARPE_Reset; - } -} - -/** - * @brief Selects the TIM peripheral Commutation event. - * @param TIMx: where x can be 1 or 8 to select the TIMx peripheral - * @param NewState: new state of the Commutation event. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void TIM_SelectCOM(TIM_TypeDef* TIMx, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_TIM_18151617_PERIPH(TIMx)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - if (NewState != DISABLE) - { - /* Set the COM Bit */ - TIMx->CR2 |= CR2_CCUS_Set; - } - else - { - /* Reset the COM Bit */ - TIMx->CR2 &= CR2_CCUS_Reset; - } -} - -/** - * @brief Selects the TIMx peripheral Capture Compare DMA source. - * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. - * @param NewState: new state of the Capture Compare DMA source - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void TIM_SelectCCDMA(TIM_TypeDef* TIMx, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_TIM_123458151617_PERIPH(TIMx)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - if (NewState != DISABLE) - { - /* Set the CCDS Bit */ - TIMx->CR2 |= CR2_CCDS_Set; - } - else - { - /* Reset the CCDS Bit */ - TIMx->CR2 &= CR2_CCDS_Reset; - } -} - -/** - * @brief Sets or Resets the TIM peripheral Capture Compare Preload Control bit. - * @param TIMx: where x can be 1 or 8 to select the TIMx peripheral - * @param NewState: new state of the Capture Compare Preload Control bit - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void TIM_CCPreloadControl(TIM_TypeDef* TIMx, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_TIM_18151617_PERIPH(TIMx)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - if (NewState != DISABLE) - { - /* Set the CCPC Bit */ - TIMx->CR2 |= CR2_CCPC_Set; - } - else - { - /* Reset the CCPC Bit */ - TIMx->CR2 &= CR2_CCPC_Reset; - } -} - -/** - * @brief Enables or disables the TIMx peripheral Preload register on CCR1. - * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. - * @param TIM_OCPreload: new state of the TIMx peripheral Preload register - * This parameter can be one of the following values: - * @arg TIM_OCPreload_Enable - * @arg TIM_OCPreload_Disable - * @retval None - */ -void TIM_OC1PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload) -{ - uint16_t tmpccmr1 = 0; - /* Check the parameters */ - assert_param(IS_TIM_123458151617_PERIPH(TIMx)); - assert_param(IS_TIM_OCPRELOAD_STATE(TIM_OCPreload)); - tmpccmr1 = TIMx->CCMR1; - /* Reset the OC1PE Bit */ - tmpccmr1 &= CCMR_OC13PE_Reset; - /* Enable or Disable the Output Compare Preload feature */ - tmpccmr1 |= TIM_OCPreload; - /* Write to TIMx CCMR1 register */ - TIMx->CCMR1 = tmpccmr1; -} - -/** - * @brief Enables or disables the TIMx peripheral Preload register on CCR2. - * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. - * @param TIM_OCPreload: new state of the TIMx peripheral Preload register - * This parameter can be one of the following values: - * @arg TIM_OCPreload_Enable - * @arg TIM_OCPreload_Disable - * @retval None - */ -void TIM_OC2PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload) -{ - uint16_t tmpccmr1 = 0; - /* Check the parameters */ - assert_param(IS_TIM_12345815_PERIPH(TIMx)); - assert_param(IS_TIM_OCPRELOAD_STATE(TIM_OCPreload)); - tmpccmr1 = TIMx->CCMR1; - /* Reset the OC2PE Bit */ - tmpccmr1 &= CCMR_OC24PE_Reset; - /* Enable or Disable the Output Compare Preload feature */ - tmpccmr1 |= (uint16_t)(TIM_OCPreload << 8); - /* Write to TIMx CCMR1 register */ - TIMx->CCMR1 = tmpccmr1; -} - -/** - * @brief Enables or disables the TIMx peripheral Preload register on CCR3. - * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. - * @param TIM_OCPreload: new state of the TIMx peripheral Preload register - * This parameter can be one of the following values: - * @arg TIM_OCPreload_Enable - * @arg TIM_OCPreload_Disable - * @retval None - */ -void TIM_OC3PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload) -{ - uint16_t tmpccmr2 = 0; - /* Check the parameters */ - assert_param(IS_TIM_123458_PERIPH(TIMx)); - assert_param(IS_TIM_OCPRELOAD_STATE(TIM_OCPreload)); - tmpccmr2 = TIMx->CCMR2; - /* Reset the OC3PE Bit */ - tmpccmr2 &= CCMR_OC13PE_Reset; - /* Enable or Disable the Output Compare Preload feature */ - tmpccmr2 |= TIM_OCPreload; - /* Write to TIMx CCMR2 register */ - TIMx->CCMR2 = tmpccmr2; -} - -/** - * @brief Enables or disables the TIMx peripheral Preload register on CCR4. - * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. - * @param TIM_OCPreload: new state of the TIMx peripheral Preload register - * This parameter can be one of the following values: - * @arg TIM_OCPreload_Enable - * @arg TIM_OCPreload_Disable - * @retval None - */ -void TIM_OC4PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload) -{ - uint16_t tmpccmr2 = 0; - /* Check the parameters */ - assert_param(IS_TIM_123458_PERIPH(TIMx)); - assert_param(IS_TIM_OCPRELOAD_STATE(TIM_OCPreload)); - tmpccmr2 = TIMx->CCMR2; - /* Reset the OC4PE Bit */ - tmpccmr2 &= CCMR_OC24PE_Reset; - /* Enable or Disable the Output Compare Preload feature */ - tmpccmr2 |= (uint16_t)(TIM_OCPreload << 8); - /* Write to TIMx CCMR2 register */ - TIMx->CCMR2 = tmpccmr2; -} - -/** - * @brief Configures the TIMx Output Compare 1 Fast feature. - * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. - * @param TIM_OCFast: new state of the Output Compare Fast Enable Bit. - * This parameter can be one of the following values: - * @arg TIM_OCFast_Enable: TIM output compare fast enable - * @arg TIM_OCFast_Disable: TIM output compare fast disable - * @retval None - */ -void TIM_OC1FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast) -{ - uint16_t tmpccmr1 = 0; - /* Check the parameters */ - assert_param(IS_TIM_123458151617_PERIPH(TIMx)); - assert_param(IS_TIM_OCFAST_STATE(TIM_OCFast)); - /* Get the TIMx CCMR1 register value */ - tmpccmr1 = TIMx->CCMR1; - /* Reset the OC1FE Bit */ - tmpccmr1 &= CCMR_OC13FE_Reset; - /* Enable or Disable the Output Compare Fast Bit */ - tmpccmr1 |= TIM_OCFast; - /* Write to TIMx CCMR1 */ - TIMx->CCMR1 = tmpccmr1; -} - -/** - * @brief Configures the TIMx Output Compare 2 Fast feature. - * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. - * @param TIM_OCFast: new state of the Output Compare Fast Enable Bit. - * This parameter can be one of the following values: - * @arg TIM_OCFast_Enable: TIM output compare fast enable - * @arg TIM_OCFast_Disable: TIM output compare fast disable - * @retval None - */ -void TIM_OC2FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast) -{ - uint16_t tmpccmr1 = 0; - /* Check the parameters */ - assert_param(IS_TIM_12345815_PERIPH(TIMx)); - assert_param(IS_TIM_OCFAST_STATE(TIM_OCFast)); - /* Get the TIMx CCMR1 register value */ - tmpccmr1 = TIMx->CCMR1; - /* Reset the OC2FE Bit */ - tmpccmr1 &= CCMR_OC24FE_Reset; - /* Enable or Disable the Output Compare Fast Bit */ - tmpccmr1 |= (uint16_t)(TIM_OCFast << 8); - /* Write to TIMx CCMR1 */ - TIMx->CCMR1 = tmpccmr1; -} - -/** - * @brief Configures the TIMx Output Compare 3 Fast feature. - * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. - * @param TIM_OCFast: new state of the Output Compare Fast Enable Bit. - * This parameter can be one of the following values: - * @arg TIM_OCFast_Enable: TIM output compare fast enable - * @arg TIM_OCFast_Disable: TIM output compare fast disable - * @retval None - */ -void TIM_OC3FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast) -{ - uint16_t tmpccmr2 = 0; - /* Check the parameters */ - assert_param(IS_TIM_123458_PERIPH(TIMx)); - assert_param(IS_TIM_OCFAST_STATE(TIM_OCFast)); - /* Get the TIMx CCMR2 register value */ - tmpccmr2 = TIMx->CCMR2; - /* Reset the OC3FE Bit */ - tmpccmr2 &= CCMR_OC13FE_Reset; - /* Enable or Disable the Output Compare Fast Bit */ - tmpccmr2 |= TIM_OCFast; - /* Write to TIMx CCMR2 */ - TIMx->CCMR2 = tmpccmr2; -} - -/** - * @brief Configures the TIMx Output Compare 4 Fast feature. - * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. - * @param TIM_OCFast: new state of the Output Compare Fast Enable Bit. - * This parameter can be one of the following values: - * @arg TIM_OCFast_Enable: TIM output compare fast enable - * @arg TIM_OCFast_Disable: TIM output compare fast disable - * @retval None - */ -void TIM_OC4FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast) -{ - uint16_t tmpccmr2 = 0; - /* Check the parameters */ - assert_param(IS_TIM_123458_PERIPH(TIMx)); - assert_param(IS_TIM_OCFAST_STATE(TIM_OCFast)); - /* Get the TIMx CCMR2 register value */ - tmpccmr2 = TIMx->CCMR2; - /* Reset the OC4FE Bit */ - tmpccmr2 &= CCMR_OC24FE_Reset; - /* Enable or Disable the Output Compare Fast Bit */ - tmpccmr2 |= (uint16_t)(TIM_OCFast << 8); - /* Write to TIMx CCMR2 */ - TIMx->CCMR2 = tmpccmr2; -} - -/** - * @brief Clears or safeguards the OCREF1 signal on an external event - * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. - * @param TIM_OCClear: new state of the Output Compare Clear Enable Bit. - * This parameter can be one of the following values: - * @arg TIM_OCClear_Enable: TIM Output clear enable - * @arg TIM_OCClear_Disable: TIM Output clear disable - * @retval None - */ -void TIM_ClearOC1Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear) -{ - uint16_t tmpccmr1 = 0; - /* Check the parameters */ - assert_param(IS_TIM_123458_PERIPH(TIMx)); - assert_param(IS_TIM_OCCLEAR_STATE(TIM_OCClear)); - tmpccmr1 = TIMx->CCMR1; - /* Reset the OC1CE Bit */ - tmpccmr1 &= CCMR_OC13CE_Reset; - /* Enable or Disable the Output Compare Clear Bit */ - tmpccmr1 |= TIM_OCClear; - /* Write to TIMx CCMR1 register */ - TIMx->CCMR1 = tmpccmr1; -} - -/** - * @brief Clears or safeguards the OCREF2 signal on an external event - * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. - * @param TIM_OCClear: new state of the Output Compare Clear Enable Bit. - * This parameter can be one of the following values: - * @arg TIM_OCClear_Enable: TIM Output clear enable - * @arg TIM_OCClear_Disable: TIM Output clear disable - * @retval None - */ -void TIM_ClearOC2Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear) -{ - uint16_t tmpccmr1 = 0; - /* Check the parameters */ - assert_param(IS_TIM_123458_PERIPH(TIMx)); - assert_param(IS_TIM_OCCLEAR_STATE(TIM_OCClear)); - tmpccmr1 = TIMx->CCMR1; - /* Reset the OC2CE Bit */ - tmpccmr1 &= CCMR_OC24CE_Reset; - /* Enable or Disable the Output Compare Clear Bit */ - tmpccmr1 |= (uint16_t)(TIM_OCClear << 8); - /* Write to TIMx CCMR1 register */ - TIMx->CCMR1 = tmpccmr1; -} - -/** - * @brief Clears or safeguards the OCREF3 signal on an external event - * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. - * @param TIM_OCClear: new state of the Output Compare Clear Enable Bit. - * This parameter can be one of the following values: - * @arg TIM_OCClear_Enable: TIM Output clear enable - * @arg TIM_OCClear_Disable: TIM Output clear disable - * @retval None - */ -void TIM_ClearOC3Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear) -{ - uint16_t tmpccmr2 = 0; - /* Check the parameters */ - assert_param(IS_TIM_123458_PERIPH(TIMx)); - assert_param(IS_TIM_OCCLEAR_STATE(TIM_OCClear)); - tmpccmr2 = TIMx->CCMR2; - /* Reset the OC3CE Bit */ - tmpccmr2 &= CCMR_OC13CE_Reset; - /* Enable or Disable the Output Compare Clear Bit */ - tmpccmr2 |= TIM_OCClear; - /* Write to TIMx CCMR2 register */ - TIMx->CCMR2 = tmpccmr2; -} - -/** - * @brief Clears or safeguards the OCREF4 signal on an external event - * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. - * @param TIM_OCClear: new state of the Output Compare Clear Enable Bit. - * This parameter can be one of the following values: - * @arg TIM_OCClear_Enable: TIM Output clear enable - * @arg TIM_OCClear_Disable: TIM Output clear disable - * @retval None - */ -void TIM_ClearOC4Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear) -{ - uint16_t tmpccmr2 = 0; - /* Check the parameters */ - assert_param(IS_TIM_123458_PERIPH(TIMx)); - assert_param(IS_TIM_OCCLEAR_STATE(TIM_OCClear)); - tmpccmr2 = TIMx->CCMR2; - /* Reset the OC4CE Bit */ - tmpccmr2 &= CCMR_OC24CE_Reset; - /* Enable or Disable the Output Compare Clear Bit */ - tmpccmr2 |= (uint16_t)(TIM_OCClear << 8); - /* Write to TIMx CCMR2 register */ - TIMx->CCMR2 = tmpccmr2; -} - -/** - * @brief Configures the TIMx channel 1 polarity. - * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. - * @param TIM_OCPolarity: specifies the OC1 Polarity - * This parmeter can be one of the following values: - * @arg TIM_OCPolarity_High: Output Compare active high - * @arg TIM_OCPolarity_Low: Output Compare active low - * @retval None - */ -void TIM_OC1PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity) -{ - uint16_t tmpccer = 0; - /* Check the parameters */ - assert_param(IS_TIM_123458151617_PERIPH(TIMx)); - assert_param(IS_TIM_OC_POLARITY(TIM_OCPolarity)); - tmpccer = TIMx->CCER; - /* Set or Reset the CC1P Bit */ - tmpccer &= CCER_CC1P_Reset; - tmpccer |= TIM_OCPolarity; - /* Write to TIMx CCER register */ - TIMx->CCER = tmpccer; -} - -/** - * @brief Configures the TIMx Channel 1N polarity. - * @param TIMx: where x can be 1 or 8 to select the TIM peripheral. - * @param TIM_OCNPolarity: specifies the OC1N Polarity - * This parmeter can be one of the following values: - * @arg TIM_OCNPolarity_High: Output Compare active high - * @arg TIM_OCNPolarity_Low: Output Compare active low - * @retval None - */ -void TIM_OC1NPolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCNPolarity) -{ - uint16_t tmpccer = 0; - /* Check the parameters */ - assert_param(IS_TIM_18151617_PERIPH(TIMx)); - assert_param(IS_TIM_OCN_POLARITY(TIM_OCNPolarity)); - - tmpccer = TIMx->CCER; - /* Set or Reset the CC1NP Bit */ - tmpccer &= CCER_CC1NP_Reset; - tmpccer |= TIM_OCNPolarity; - /* Write to TIMx CCER register */ - TIMx->CCER = tmpccer; -} - -/** - * @brief Configures the TIMx channel 2 polarity. - * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. - * @param TIM_OCPolarity: specifies the OC2 Polarity - * This parmeter can be one of the following values: - * @arg TIM_OCPolarity_High: Output Compare active high - * @arg TIM_OCPolarity_Low: Output Compare active low - * @retval None - */ -void TIM_OC2PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity) -{ - uint16_t tmpccer = 0; - /* Check the parameters */ - assert_param(IS_TIM_12345815_PERIPH(TIMx)); - assert_param(IS_TIM_OC_POLARITY(TIM_OCPolarity)); - tmpccer = TIMx->CCER; - /* Set or Reset the CC2P Bit */ - tmpccer &= CCER_CC2P_Reset; - tmpccer |= (uint16_t)(TIM_OCPolarity << 4); - /* Write to TIMx CCER register */ - TIMx->CCER = tmpccer; -} - -/** - * @brief Configures the TIMx Channel 2N polarity. - * @param TIMx: where x can be 1 or 8 to select the TIM peripheral. - * @param TIM_OCNPolarity: specifies the OC2N Polarity - * This parmeter can be one of the following values: - * @arg TIM_OCNPolarity_High: Output Compare active high - * @arg TIM_OCNPolarity_Low: Output Compare active low - * @retval None - */ -void TIM_OC2NPolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCNPolarity) -{ - uint16_t tmpccer = 0; - /* Check the parameters */ - assert_param(IS_TIM_18_PERIPH(TIMx)); - assert_param(IS_TIM_OCN_POLARITY(TIM_OCNPolarity)); - - tmpccer = TIMx->CCER; - /* Set or Reset the CC2NP Bit */ - tmpccer &= CCER_CC2NP_Reset; - tmpccer |= (uint16_t)(TIM_OCNPolarity << 4); - /* Write to TIMx CCER register */ - TIMx->CCER = tmpccer; -} - -/** - * @brief Configures the TIMx channel 3 polarity. - * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. - * @param TIM_OCPolarity: specifies the OC3 Polarity - * This parmeter can be one of the following values: - * @arg TIM_OCPolarity_High: Output Compare active high - * @arg TIM_OCPolarity_Low: Output Compare active low - * @retval None - */ -void TIM_OC3PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity) -{ - uint16_t tmpccer = 0; - /* Check the parameters */ - assert_param(IS_TIM_123458_PERIPH(TIMx)); - assert_param(IS_TIM_OC_POLARITY(TIM_OCPolarity)); - tmpccer = TIMx->CCER; - /* Set or Reset the CC3P Bit */ - tmpccer &= CCER_CC3P_Reset; - tmpccer |= (uint16_t)(TIM_OCPolarity << 8); - /* Write to TIMx CCER register */ - TIMx->CCER = tmpccer; -} - -/** - * @brief Configures the TIMx Channel 3N polarity. - * @param TIMx: where x can be 1 or 8 to select the TIM peripheral. - * @param TIM_OCNPolarity: specifies the OC3N Polarity - * This parmeter can be one of the following values: - * @arg TIM_OCNPolarity_High: Output Compare active high - * @arg TIM_OCNPolarity_Low: Output Compare active low - * @retval None - */ -void TIM_OC3NPolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCNPolarity) -{ - uint16_t tmpccer = 0; - - /* Check the parameters */ - assert_param(IS_TIM_18_PERIPH(TIMx)); - assert_param(IS_TIM_OCN_POLARITY(TIM_OCNPolarity)); - - tmpccer = TIMx->CCER; - /* Set or Reset the CC3NP Bit */ - tmpccer &= CCER_CC3NP_Reset; - tmpccer |= (uint16_t)(TIM_OCNPolarity << 8); - /* Write to TIMx CCER register */ - TIMx->CCER = tmpccer; -} - -/** - * @brief Configures the TIMx channel 4 polarity. - * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. - * @param TIM_OCPolarity: specifies the OC4 Polarity - * This parmeter can be one of the following values: - * @arg TIM_OCPolarity_High: Output Compare active high - * @arg TIM_OCPolarity_Low: Output Compare active low - * @retval None - */ -void TIM_OC4PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity) -{ - uint16_t tmpccer = 0; - /* Check the parameters */ - assert_param(IS_TIM_123458_PERIPH(TIMx)); - assert_param(IS_TIM_OC_POLARITY(TIM_OCPolarity)); - tmpccer = TIMx->CCER; - /* Set or Reset the CC4P Bit */ - tmpccer &= CCER_CC4P_Reset; - tmpccer |= (uint16_t)(TIM_OCPolarity << 12); - /* Write to TIMx CCER register */ - TIMx->CCER = tmpccer; -} - -/** - * @brief Enables or disables the TIM Capture Compare Channel x. - * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. - * @param TIM_Channel: specifies the TIM Channel - * This parmeter can be one of the following values: - * @arg TIM_Channel_1: TIM Channel 1 - * @arg TIM_Channel_2: TIM Channel 2 - * @arg TIM_Channel_3: TIM Channel 3 - * @arg TIM_Channel_4: TIM Channel 4 - * @param TIM_CCx: specifies the TIM Channel CCxE bit new state. - * This parameter can be: TIM_CCx_Enable or TIM_CCx_Disable. - * @retval None - */ -void TIM_CCxCmd(TIM_TypeDef* TIMx, uint16_t TIM_Channel, uint16_t TIM_CCx) -{ - uint16_t tmp = 0; - - /* Check the parameters */ - assert_param(IS_TIM_123458151617_PERIPH(TIMx)); - assert_param(IS_TIM_CHANNEL(TIM_Channel)); - assert_param(IS_TIM_CCX(TIM_CCx)); - - tmp = CCER_CCE_Set << TIM_Channel; - - /* Reset the CCxE Bit */ - TIMx->CCER &= (uint16_t)~ tmp; - - /* Set or reset the CCxE Bit */ - TIMx->CCER |= (uint16_t)(TIM_CCx << TIM_Channel); -} - -/** - * @brief Enables or disables the TIM Capture Compare Channel xN. - * @param TIMx: where x can be 1 or 8 to select the TIM peripheral. - * @param TIM_Channel: specifies the TIM Channel - * This parmeter can be one of the following values: - * @arg TIM_Channel_1: TIM Channel 1 - * @arg TIM_Channel_2: TIM Channel 2 - * @arg TIM_Channel_3: TIM Channel 3 - * @param TIM_CCxN: specifies the TIM Channel CCxNE bit new state. - * This parameter can be: TIM_CCxN_Enable or TIM_CCxN_Disable. - * @retval None - */ -void TIM_CCxNCmd(TIM_TypeDef* TIMx, uint16_t TIM_Channel, uint16_t TIM_CCxN) -{ - uint16_t tmp = 0; - - /* Check the parameters */ - assert_param(IS_TIM_18151617_PERIPH(TIMx)); - assert_param(IS_TIM_COMPLEMENTARY_CHANNEL(TIM_Channel)); - assert_param(IS_TIM_CCXN(TIM_CCxN)); - - tmp = CCER_CCNE_Set << TIM_Channel; - - /* Reset the CCxNE Bit */ - TIMx->CCER &= (uint16_t) ~tmp; - - /* Set or reset the CCxNE Bit */ - TIMx->CCER |= (uint16_t)(TIM_CCxN << TIM_Channel); -} - -/** - * @brief Selects the TIM Ouput Compare Mode. - * @note This function disables the selected channel before changing the Ouput - * Compare Mode. - * User has to enable this channel using TIM_CCxCmd and TIM_CCxNCmd functions. - * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. - * @param TIM_Channel: specifies the TIM Channel - * This parmeter can be one of the following values: - * @arg TIM_Channel_1: TIM Channel 1 - * @arg TIM_Channel_2: TIM Channel 2 - * @arg TIM_Channel_3: TIM Channel 3 - * @arg TIM_Channel_4: TIM Channel 4 - * @param TIM_OCMode: specifies the TIM Output Compare Mode. - * This paramter can be one of the following values: - * @arg TIM_OCMode_Timing - * @arg TIM_OCMode_Active - * @arg TIM_OCMode_Toggle - * @arg TIM_OCMode_PWM1 - * @arg TIM_OCMode_PWM2 - * @arg TIM_ForcedAction_Active - * @arg TIM_ForcedAction_InActive - * @retval None - */ -void TIM_SelectOCxM(TIM_TypeDef* TIMx, uint16_t TIM_Channel, uint16_t TIM_OCMode) -{ - uint32_t tmp = 0; - uint16_t tmp1 = 0; - - /* Check the parameters */ - assert_param(IS_TIM_123458151617_PERIPH(TIMx)); - assert_param(IS_TIM_CHANNEL(TIM_Channel)); - assert_param(IS_TIM_OCM(TIM_OCMode)); - - tmp = (uint32_t) TIMx; - tmp += CCMR_Offset; - - tmp1 = CCER_CCE_Set << (uint16_t)TIM_Channel; - - /* Disable the Channel: Reset the CCxE Bit */ - TIMx->CCER &= (uint16_t) ~tmp1; - - if((TIM_Channel == TIM_Channel_1) ||(TIM_Channel == TIM_Channel_3)) - { - tmp += (TIM_Channel>>1); - - /* Reset the OCxM bits in the CCMRx register */ - *(__IO uint32_t *) tmp &= CCMR_OC13M_Mask; - - /* Configure the OCxM bits in the CCMRx register */ - *(__IO uint32_t *) tmp |= TIM_OCMode; - } - else - { - tmp += (uint16_t)(TIM_Channel - (uint16_t)4)>> (uint16_t)1; - - /* Reset the OCxM bits in the CCMRx register */ - *(__IO uint32_t *) tmp &= CCMR_OC24M_Mask; - - /* Configure the OCxM bits in the CCMRx register */ - *(__IO uint32_t *) tmp |= (uint16_t)(TIM_OCMode << 8); - } -} - -/** - * @brief Enables or Disables the TIMx Update event. - * @param TIMx: where x can be 1 to 8 to select the TIM peripheral. - * @param NewState: new state of the TIMx UDIS bit - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void TIM_UpdateDisableConfig(TIM_TypeDef* TIMx, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_TIM_ALL_PERIPH(TIMx)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - if (NewState != DISABLE) - { - /* Set the Update Disable Bit */ - TIMx->CR1 |= CR1_UDIS_Set; - } - else - { - /* Reset the Update Disable Bit */ - TIMx->CR1 &= CR1_UDIS_Reset; - } -} - -/** - * @brief Configures the TIMx Update Request Interrupt source. - * @param TIMx: where x can be 1 to 8 to select the TIM peripheral. - * @param TIM_UpdateSource: specifies the Update source. - * This parameter can be one of the following values: - * @arg TIM_UpdateSource_Regular: Source of update is the counter overflow/underflow - or the setting of UG bit, or an update generation - through the slave mode controller. - * @arg TIM_UpdateSource_Global: Source of update is counter overflow/underflow. - * @retval None - */ -void TIM_UpdateRequestConfig(TIM_TypeDef* TIMx, uint16_t TIM_UpdateSource) -{ - /* Check the parameters */ - assert_param(IS_TIM_ALL_PERIPH(TIMx)); - assert_param(IS_TIM_UPDATE_SOURCE(TIM_UpdateSource)); - if (TIM_UpdateSource != TIM_UpdateSource_Global) - { - /* Set the URS Bit */ - TIMx->CR1 |= CR1_URS_Set; - } - else - { - /* Reset the URS Bit */ - TIMx->CR1 &= CR1_URS_Reset; - } -} - -/** - * @brief Enables or disables the TIMx’s Hall sensor interface. - * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. - * @param NewState: new state of the TIMx Hall sensor interface. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void TIM_SelectHallSensor(TIM_TypeDef* TIMx, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_TIM_12345815_PERIPH(TIMx)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - if (NewState != DISABLE) - { - /* Set the TI1S Bit */ - TIMx->CR2 |= CR2_TI1S_Set; - } - else - { - /* Reset the TI1S Bit */ - TIMx->CR2 &= CR2_TI1S_Reset; - } -} - -/** - * @brief Selects the TIMx’s One Pulse Mode. - * @param TIMx: where x can be 1 to 8 to select the TIM peripheral. - * @param TIM_OPMode: specifies the OPM Mode to be used. - * This parameter can be one of the following values: - * @arg TIM_OPMode_Single - * @arg TIM_OPMode_Repetitive - * @retval None - */ -void TIM_SelectOnePulseMode(TIM_TypeDef* TIMx, uint16_t TIM_OPMode) -{ - /* Check the parameters */ - assert_param(IS_TIM_ALL_PERIPH(TIMx)); - assert_param(IS_TIM_OPM_MODE(TIM_OPMode)); - /* Reset the OPM Bit */ - TIMx->CR1 &= CR1_OPM_Reset; - /* Configure the OPM Mode */ - TIMx->CR1 |= TIM_OPMode; -} - -/** - * @brief Selects the TIMx Trigger Output Mode. - * @param TIMx: where x can be 1 to 8 to select the TIM peripheral. - * @param TIM_TRGOSource: specifies the Trigger Output source. - * This paramter can be one of the following values: - * - * - For all TIMx - * @arg TIM_TRGOSource_Reset: The UG bit in the TIM_EGR register is used as the trigger output (TRGO). - * @arg TIM_TRGOSource_Enable: The Counter Enable CEN is used as the trigger output (TRGO). - * @arg TIM_TRGOSource_Update: The update event is selected as the trigger output (TRGO). - * - * - For all TIMx except TIM6 and TIM7 - * @arg TIM_TRGOSource_OC1: The trigger output sends a positive pulse when the CC1IF flag - * is to be set, as soon as a capture or compare match occurs (TRGO). - * @arg TIM_TRGOSource_OC1Ref: OC1REF signal is used as the trigger output (TRGO). - * @arg TIM_TRGOSource_OC2Ref: OC2REF signal is used as the trigger output (TRGO). - * @arg TIM_TRGOSource_OC3Ref: OC3REF signal is used as the trigger output (TRGO). - * @arg TIM_TRGOSource_OC4Ref: OC4REF signal is used as the trigger output (TRGO). - * - * @retval None - */ -void TIM_SelectOutputTrigger(TIM_TypeDef* TIMx, uint16_t TIM_TRGOSource) -{ - /* Check the parameters */ - assert_param(IS_TIM_ALL_PERIPH(TIMx)); - assert_param(IS_TIM_TRGO_SOURCE(TIM_TRGOSource)); - /* Reset the MMS Bits */ - TIMx->CR2 &= CR2_MMS_Mask; - /* Select the TRGO source */ - TIMx->CR2 |= TIM_TRGOSource; -} - -/** - * @brief Selects the TIMx Slave Mode. - * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. - * @param TIM_SlaveMode: specifies the Timer Slave Mode. - * This paramter can be one of the following values: - * @arg TIM_SlaveMode_Reset: Rising edge of the selected trigger signal (TRGI) re-initializes - * the counter and triggers an update of the registers. - * @arg TIM_SlaveMode_Gated: The counter clock is enabled when the trigger signal (TRGI) is high. - * @arg TIM_SlaveMode_Trigger: The counter starts at a rising edge of the trigger TRGI. - * @arg TIM_SlaveMode_External1: Rising edges of the selected trigger (TRGI) clock the counter. - * @retval None - */ -void TIM_SelectSlaveMode(TIM_TypeDef* TIMx, uint16_t TIM_SlaveMode) -{ - /* Check the parameters */ - assert_param(IS_TIM_12345815_PERIPH(TIMx)); - assert_param(IS_TIM_SLAVE_MODE(TIM_SlaveMode)); - /* Reset the SMS Bits */ - TIMx->SMCR &= SMCR_SMS_Mask; - /* Select the Slave Mode */ - TIMx->SMCR |= TIM_SlaveMode; -} - -/** - * @brief Sets or Resets the TIMx Master/Slave Mode. - * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. - * @param TIM_MasterSlaveMode: specifies the Timer Master Slave Mode. - * This paramter can be one of the following values: - * @arg TIM_MasterSlaveMode_Enable: synchronization between the current timer - * and its slaves (through TRGO). - * @arg TIM_MasterSlaveMode_Disable: No action - * @retval None - */ -void TIM_SelectMasterSlaveMode(TIM_TypeDef* TIMx, uint16_t TIM_MasterSlaveMode) -{ - /* Check the parameters */ - assert_param(IS_TIM_12345815_PERIPH(TIMx)); - assert_param(IS_TIM_MSM_STATE(TIM_MasterSlaveMode)); - /* Reset the MSM Bit */ - TIMx->SMCR &= SMCR_MSM_Reset; - - /* Set or Reset the MSM Bit */ - TIMx->SMCR |= TIM_MasterSlaveMode; -} - -/** - * @brief Sets the TIMx Counter Register value - * @param TIMx: where x can be 1 to 8 to select the TIM peripheral. - * @param Counter: specifies the Counter register new value. - * @retval None - */ -void TIM_SetCounter(TIM_TypeDef* TIMx, uint16_t Counter) -{ - /* Check the parameters */ - assert_param(IS_TIM_ALL_PERIPH(TIMx)); - /* Set the Counter Register value */ - TIMx->CNT = Counter; -} - -/** - * @brief Sets the TIMx Autoreload Register value - * @param TIMx: where x can be 1 to 8 to select the TIM peripheral. - * @param Autoreload: specifies the Autoreload register new value. - * @retval None - */ -void TIM_SetAutoreload(TIM_TypeDef* TIMx, uint16_t Autoreload) -{ - /* Check the parameters */ - assert_param(IS_TIM_ALL_PERIPH(TIMx)); - /* Set the Autoreload Register value */ - TIMx->ARR = Autoreload; -} - -/** - * @brief Sets the TIMx Capture Compare1 Register value - * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. - * @param Compare1: specifies the Capture Compare1 register new value. - * @retval None - */ -void TIM_SetCompare1(TIM_TypeDef* TIMx, uint16_t Compare1) -{ - /* Check the parameters */ - assert_param(IS_TIM_123458151617_PERIPH(TIMx)); - /* Set the Capture Compare1 Register value */ - TIMx->CCR1 = Compare1; -} - -/** - * @brief Sets the TIMx Capture Compare2 Register value - * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. - * @param Compare2: specifies the Capture Compare2 register new value. - * @retval None - */ -void TIM_SetCompare2(TIM_TypeDef* TIMx, uint16_t Compare2) -{ - /* Check the parameters */ - assert_param(IS_TIM_12345815_PERIPH(TIMx)); - /* Set the Capture Compare2 Register value */ - TIMx->CCR2 = Compare2; -} - -/** - * @brief Sets the TIMx Capture Compare3 Register value - * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. - * @param Compare3: specifies the Capture Compare3 register new value. - * @retval None - */ -void TIM_SetCompare3(TIM_TypeDef* TIMx, uint16_t Compare3) -{ - /* Check the parameters */ - assert_param(IS_TIM_123458_PERIPH(TIMx)); - /* Set the Capture Compare3 Register value */ - TIMx->CCR3 = Compare3; -} - -/** - * @brief Sets the TIMx Capture Compare4 Register value - * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. - * @param Compare4: specifies the Capture Compare4 register new value. - * @retval None - */ -void TIM_SetCompare4(TIM_TypeDef* TIMx, uint16_t Compare4) -{ - /* Check the parameters */ - assert_param(IS_TIM_123458_PERIPH(TIMx)); - /* Set the Capture Compare4 Register value */ - TIMx->CCR4 = Compare4; -} - -/** - * @brief Sets the TIMx Input Capture 1 prescaler. - * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. - * @param TIM_ICPSC: specifies the Input Capture1 prescaler new value. - * This parameter can be one of the following values: - * @arg TIM_ICPSC_DIV1: no prescaler - * @arg TIM_ICPSC_DIV2: capture is done once every 2 events - * @arg TIM_ICPSC_DIV4: capture is done once every 4 events - * @arg TIM_ICPSC_DIV8: capture is done once every 8 events - * @retval None - */ -void TIM_SetIC1Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC) -{ - /* Check the parameters */ - assert_param(IS_TIM_123458151617_PERIPH(TIMx)); - assert_param(IS_TIM_IC_PRESCALER(TIM_ICPSC)); - /* Reset the IC1PSC Bits */ - TIMx->CCMR1 &= CCMR_IC13PSC_Mask; - /* Set the IC1PSC value */ - TIMx->CCMR1 |= TIM_ICPSC; -} - -/** - * @brief Sets the TIMx Input Capture 2 prescaler. - * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. - * @param TIM_ICPSC: specifies the Input Capture2 prescaler new value. - * This parameter can be one of the following values: - * @arg TIM_ICPSC_DIV1: no prescaler - * @arg TIM_ICPSC_DIV2: capture is done once every 2 events - * @arg TIM_ICPSC_DIV4: capture is done once every 4 events - * @arg TIM_ICPSC_DIV8: capture is done once every 8 events - * @retval None - */ -void TIM_SetIC2Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC) -{ - /* Check the parameters */ - assert_param(IS_TIM_12345815_PERIPH(TIMx)); - assert_param(IS_TIM_IC_PRESCALER(TIM_ICPSC)); - /* Reset the IC2PSC Bits */ - TIMx->CCMR1 &= CCMR_IC24PSC_Mask; - /* Set the IC2PSC value */ - TIMx->CCMR1 |= (uint16_t)(TIM_ICPSC << 8); -} - -/** - * @brief Sets the TIMx Input Capture 3 prescaler. - * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. - * @param TIM_ICPSC: specifies the Input Capture3 prescaler new value. - * This parameter can be one of the following values: - * @arg TIM_ICPSC_DIV1: no prescaler - * @arg TIM_ICPSC_DIV2: capture is done once every 2 events - * @arg TIM_ICPSC_DIV4: capture is done once every 4 events - * @arg TIM_ICPSC_DIV8: capture is done once every 8 events - * @retval None - */ -void TIM_SetIC3Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC) -{ - /* Check the parameters */ - assert_param(IS_TIM_123458_PERIPH(TIMx)); - assert_param(IS_TIM_IC_PRESCALER(TIM_ICPSC)); - /* Reset the IC3PSC Bits */ - TIMx->CCMR2 &= CCMR_IC13PSC_Mask; - /* Set the IC3PSC value */ - TIMx->CCMR2 |= TIM_ICPSC; -} - -/** - * @brief Sets the TIMx Input Capture 4 prescaler. - * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. - * @param TIM_ICPSC: specifies the Input Capture4 prescaler new value. - * This parameter can be one of the following values: - * @arg TIM_ICPSC_DIV1: no prescaler - * @arg TIM_ICPSC_DIV2: capture is done once every 2 events - * @arg TIM_ICPSC_DIV4: capture is done once every 4 events - * @arg TIM_ICPSC_DIV8: capture is done once every 8 events - * @retval None - */ -void TIM_SetIC4Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC) -{ - /* Check the parameters */ - assert_param(IS_TIM_123458_PERIPH(TIMx)); - assert_param(IS_TIM_IC_PRESCALER(TIM_ICPSC)); - /* Reset the IC4PSC Bits */ - TIMx->CCMR2 &= CCMR_IC24PSC_Mask; - /* Set the IC4PSC value */ - TIMx->CCMR2 |= (uint16_t)(TIM_ICPSC << 8); -} - -/** - * @brief Sets the TIMx Clock Division value. - * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. - * @param TIM_CKD: specifies the clock division value. - * This parameter can be one of the following value: - * @arg TIM_CKD_DIV1: TDTS = Tck_tim - * @arg TIM_CKD_DIV2: TDTS = 2*Tck_tim - * @arg TIM_CKD_DIV4: TDTS = 4*Tck_tim - * @retval None - */ -void TIM_SetClockDivision(TIM_TypeDef* TIMx, uint16_t TIM_CKD) -{ - /* Check the parameters */ - assert_param(IS_TIM_123458151617_PERIPH(TIMx)); - assert_param(IS_TIM_CKD_DIV(TIM_CKD)); - /* Reset the CKD Bits */ - TIMx->CR1 &= CR1_CKD_Mask; - /* Set the CKD value */ - TIMx->CR1 |= TIM_CKD; -} - -/** - * @brief Gets the TIMx Input Capture 1 value. - * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. - * @retval Capture Compare 1 Register value. - */ -uint16_t TIM_GetCapture1(TIM_TypeDef* TIMx) -{ - /* Check the parameters */ - assert_param(IS_TIM_123458151617_PERIPH(TIMx)); - /* Get the Capture 1 Register value */ - return TIMx->CCR1; -} - -/** - * @brief Gets the TIMx Input Capture 2 value. - * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. - * @retval Capture Compare 2 Register value. - */ -uint16_t TIM_GetCapture2(TIM_TypeDef* TIMx) -{ - /* Check the parameters */ - assert_param(IS_TIM_12345815_PERIPH(TIMx)); - /* Get the Capture 2 Register value */ - return TIMx->CCR2; -} - -/** - * @brief Gets the TIMx Input Capture 3 value. - * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. - * @retval Capture Compare 3 Register value. - */ -uint16_t TIM_GetCapture3(TIM_TypeDef* TIMx) -{ - /* Check the parameters */ - assert_param(IS_TIM_123458_PERIPH(TIMx)); - /* Get the Capture 3 Register value */ - return TIMx->CCR3; -} - -/** - * @brief Gets the TIMx Input Capture 4 value. - * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. - * @retval Capture Compare 4 Register value. - */ -uint16_t TIM_GetCapture4(TIM_TypeDef* TIMx) -{ - /* Check the parameters */ - assert_param(IS_TIM_123458_PERIPH(TIMx)); - /* Get the Capture 4 Register value */ - return TIMx->CCR4; -} - -/** - * @brief Gets the TIMx Counter value. - * @param TIMx: where x can be 1 to 8 to select the TIM peripheral. - * @retval Counter Register value. - */ -uint16_t TIM_GetCounter(TIM_TypeDef* TIMx) -{ - /* Check the parameters */ - assert_param(IS_TIM_ALL_PERIPH(TIMx)); - /* Get the Counter Register value */ - return TIMx->CNT; -} - -/** - * @brief Gets the TIMx Prescaler value. - * @param TIMx: where x can be 1 to 8 to select the TIM peripheral. - * @retval Prescaler Register value. - */ -uint16_t TIM_GetPrescaler(TIM_TypeDef* TIMx) -{ - /* Check the parameters */ - assert_param(IS_TIM_ALL_PERIPH(TIMx)); - /* Get the Prescaler Register value */ - return TIMx->PSC; -} - -/** - * @brief Checks whether the specified TIM flag is set or not. - * @param TIMx: where x can be 1 to 8 to select the TIM peripheral. - * @param TIM_FLAG: specifies the flag to check. - * This parameter can be one of the following values: - * @arg TIM_FLAG_Update: TIM update Flag - * @arg TIM_FLAG_CC1: TIM Capture Compare 1 Flag - * @arg TIM_FLAG_CC2: TIM Capture Compare 2 Flag - * @arg TIM_FLAG_CC3: TIM Capture Compare 3 Flag - * @arg TIM_FLAG_CC4: TIM Capture Compare 4 Flag - * @arg TIM_FLAG_COM: TIM Commutation Flag - * @arg TIM_FLAG_Trigger: TIM Trigger Flag - * @arg TIM_FLAG_Break: TIM Break Flag - * @arg TIM_FLAG_CC1OF: TIM Capture Compare 1 overcapture Flag - * @arg TIM_FLAG_CC2OF: TIM Capture Compare 2 overcapture Flag - * @arg TIM_FLAG_CC3OF: TIM Capture Compare 3 overcapture Flag - * @arg TIM_FLAG_CC4OF: TIM Capture Compare 4 overcapture Flag - * @note - * - TIM6 and TIM7 can have only one update flag. - * - TIM_FLAG_COM and TIM_FLAG_Break are used only with TIM1 and TIM8. - * @retval The new state of TIM_FLAG (SET or RESET). - */ -FlagStatus TIM_GetFlagStatus(TIM_TypeDef* TIMx, uint16_t TIM_FLAG) -{ - ITStatus bitstatus = RESET; - /* Check the parameters */ - assert_param(IS_TIM_ALL_PERIPH(TIMx)); - assert_param(IS_TIM_GET_FLAG(TIM_FLAG)); - - if ((TIMx->SR & TIM_FLAG) != (uint16_t)RESET) - { - bitstatus = SET; - } - else - { - bitstatus = RESET; - } - return bitstatus; -} - -/** - * @brief Clears the TIMx's pending flags. - * @param TIMx: where x can be 1 to 8 to select the TIM peripheral. - * @param TIM_FLAG: specifies the flag bit to clear. - * This parameter can be any combination of the following values: - * @arg TIM_FLAG_Update: TIM update Flag - * @arg TIM_FLAG_CC1: TIM Capture Compare 1 Flag - * @arg TIM_FLAG_CC2: TIM Capture Compare 2 Flag - * @arg TIM_FLAG_CC3: TIM Capture Compare 3 Flag - * @arg TIM_FLAG_CC4: TIM Capture Compare 4 Flag - * @arg TIM_FLAG_COM: TIM Commutation Flag - * @arg TIM_FLAG_Trigger: TIM Trigger Flag - * @arg TIM_FLAG_Break: TIM Break Flag - * @arg TIM_FLAG_CC1OF: TIM Capture Compare 1 overcapture Flag - * @arg TIM_FLAG_CC2OF: TIM Capture Compare 2 overcapture Flag - * @arg TIM_FLAG_CC3OF: TIM Capture Compare 3 overcapture Flag - * @arg TIM_FLAG_CC4OF: TIM Capture Compare 4 overcapture Flag - * @note - * - TIM6 and TIM7 can have only one update flag. - * - TIM_FLAG_COM and TIM_FLAG_Break are used only with TIM1 and TIM8. - * @retval None - */ -void TIM_ClearFlag(TIM_TypeDef* TIMx, uint16_t TIM_FLAG) -{ - /* Check the parameters */ - assert_param(IS_TIM_ALL_PERIPH(TIMx)); - assert_param(IS_TIM_CLEAR_FLAG(TIM_FLAG)); - - /* Clear the flags */ - TIMx->SR = (uint16_t)~TIM_FLAG; -} - -/** - * @brief Checks whether the TIM interrupt has occurred or not. - * @param TIMx: where x can be 1 to 8 to select the TIM peripheral. - * @param TIM_IT: specifies the TIM interrupt source to check. - * This parameter can be one of the following values: - * @arg TIM_IT_Update: TIM update Interrupt source - * @arg TIM_IT_CC1: TIM Capture Compare 1 Interrupt source - * @arg TIM_IT_CC2: TIM Capture Compare 2 Interrupt source - * @arg TIM_IT_CC3: TIM Capture Compare 3 Interrupt source - * @arg TIM_IT_CC4: TIM Capture Compare 4 Interrupt source - * @arg TIM_IT_COM: TIM Commutation Interrupt source - * @arg TIM_IT_Trigger: TIM Trigger Interrupt source - * @arg TIM_IT_Break: TIM Break Interrupt source - * @note - * - TIM6 and TIM7 can generate only an update interrupt. - * - TIM_IT_COM and TIM_IT_Break are used only with TIM1 and TIM8. - * @retval The new state of the TIM_IT(SET or RESET). - */ -ITStatus TIM_GetITStatus(TIM_TypeDef* TIMx, uint16_t TIM_IT) -{ - ITStatus bitstatus = RESET; - uint16_t itstatus = 0x0, itenable = 0x0; - /* Check the parameters */ - assert_param(IS_TIM_ALL_PERIPH(TIMx)); - assert_param(IS_TIM_GET_IT(TIM_IT)); - - itstatus = TIMx->SR & TIM_IT; - - itenable = TIMx->DIER & TIM_IT; - if ((itstatus != (uint16_t)RESET) && (itenable != (uint16_t)RESET)) - { - bitstatus = SET; - } - else - { - bitstatus = RESET; - } - return bitstatus; -} - -/** - * @brief Clears the TIMx's interrupt pending bits. - * @param TIMx: where x can be 1 to 8 to select the TIM peripheral. - * @param TIM_IT: specifies the pending bit to clear. - * This parameter can be any combination of the following values: - * @arg TIM_IT_Update: TIM1 update Interrupt source - * @arg TIM_IT_CC1: TIM Capture Compare 1 Interrupt source - * @arg TIM_IT_CC2: TIM Capture Compare 2 Interrupt source - * @arg TIM_IT_CC3: TIM Capture Compare 3 Interrupt source - * @arg TIM_IT_CC4: TIM Capture Compare 4 Interrupt source - * @arg TIM_IT_COM: TIM Commutation Interrupt source - * @arg TIM_IT_Trigger: TIM Trigger Interrupt source - * @arg TIM_IT_Break: TIM Break Interrupt source - * @note - * - TIM6 and TIM7 can generate only an update interrupt. - * - TIM_IT_COM and TIM_IT_Break are used only with TIM1 and TIM8. - * @retval None - */ -void TIM_ClearITPendingBit(TIM_TypeDef* TIMx, uint16_t TIM_IT) -{ - /* Check the parameters */ - assert_param(IS_TIM_ALL_PERIPH(TIMx)); - assert_param(IS_TIM_IT(TIM_IT)); - /* Clear the IT pending Bit */ - TIMx->SR = (uint16_t)~TIM_IT; -} - -/** - * @brief Configure the TI1 as Input. - * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. - * @param TIM_ICPolarity : The Input Polarity. - * This parameter can be one of the following values: - * @arg TIM_ICPolarity_Rising - * @arg TIM_ICPolarity_Falling - * @param TIM_ICSelection: specifies the input to be used. - * This parameter can be one of the following values: - * @arg TIM_ICSelection_DirectTI: TIM Input 1 is selected to be connected to IC1. - * @arg TIM_ICSelection_IndirectTI: TIM Input 1 is selected to be connected to IC2. - * @arg TIM_ICSelection_TRC: TIM Input 1 is selected to be connected to TRC. - * @param TIM_ICFilter: Specifies the Input Capture Filter. - * This parameter must be a value between 0x00 and 0x0F. - * @retval None - */ -static void TI1_Config(TIM_TypeDef* TIMx, uint16_t TIM_ICPolarity, uint16_t TIM_ICSelection, - uint16_t TIM_ICFilter) -{ - uint16_t tmpccmr1 = 0, tmpccer = 0; - /* Disable the Channel 1: Reset the CC1E Bit */ - TIMx->CCER &= CCER_CC1E_Reset; - tmpccmr1 = TIMx->CCMR1; - tmpccer = TIMx->CCER; - /* Select the Input and set the filter */ - tmpccmr1 &= CCMR_CC13S_Mask & CCMR_IC13F_Mask; - tmpccmr1 |= (uint16_t)(TIM_ICSelection | (uint16_t)(TIM_ICFilter << (uint16_t)4)); - /* Select the Polarity and set the CC1E Bit */ - tmpccer &= CCER_CC1P_Reset; - tmpccer |= (uint16_t)(TIM_ICPolarity | (uint16_t)CCER_CC1E_Set); - /* Write to TIMx CCMR1 and CCER registers */ - TIMx->CCMR1 = tmpccmr1; - TIMx->CCER = tmpccer; -} - -/** - * @brief Configure the TI2 as Input. - * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. - * @param TIM_ICPolarity : The Input Polarity. - * This parameter can be one of the following values: - * @arg TIM_ICPolarity_Rising - * @arg TIM_ICPolarity_Falling - * @param TIM_ICSelection: specifies the input to be used. - * This parameter can be one of the following values: - * @arg TIM_ICSelection_DirectTI: TIM Input 2 is selected to be connected to IC2. - * @arg TIM_ICSelection_IndirectTI: TIM Input 2 is selected to be connected to IC1. - * @arg TIM_ICSelection_TRC: TIM Input 2 is selected to be connected to TRC. - * @param TIM_ICFilter: Specifies the Input Capture Filter. - * This parameter must be a value between 0x00 and 0x0F. - * @retval None - */ -static void TI2_Config(TIM_TypeDef* TIMx, uint16_t TIM_ICPolarity, uint16_t TIM_ICSelection, - uint16_t TIM_ICFilter) -{ - uint16_t tmpccmr1 = 0, tmpccer = 0, tmp = 0; - /* Disable the Channel 2: Reset the CC2E Bit */ - TIMx->CCER &= CCER_CC2E_Reset; - tmpccmr1 = TIMx->CCMR1; - tmpccer = TIMx->CCER; - tmp = (uint16_t)(TIM_ICPolarity << 4); - /* Select the Input and set the filter */ - tmpccmr1 &= CCMR_CC24S_Mask & CCMR_IC24F_Mask; - tmpccmr1 |= (uint16_t)(TIM_ICFilter << 12); - tmpccmr1 |= (uint16_t)(TIM_ICSelection << 8); - /* Select the Polarity and set the CC2E Bit */ - tmpccer &= CCER_CC2P_Reset; - tmpccer |= (uint16_t)(tmp | (uint16_t)CCER_CC2E_Set); - /* Write to TIMx CCMR1 and CCER registers */ - TIMx->CCMR1 = tmpccmr1 ; - TIMx->CCER = tmpccer; -} - -/** - * @brief Configure the TI3 as Input. - * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. - * @param TIM_ICPolarity : The Input Polarity. - * This parameter can be one of the following values: - * @arg TIM_ICPolarity_Rising - * @arg TIM_ICPolarity_Falling - * @param TIM_ICSelection: specifies the input to be used. - * This parameter can be one of the following values: - * @arg TIM_ICSelection_DirectTI: TIM Input 3 is selected to be connected to IC3. - * @arg TIM_ICSelection_IndirectTI: TIM Input 3 is selected to be connected to IC4. - * @arg TIM_ICSelection_TRC: TIM Input 3 is selected to be connected to TRC. - * @param TIM_ICFilter: Specifies the Input Capture Filter. - * This parameter must be a value between 0x00 and 0x0F. - * @retval None - */ -static void TI3_Config(TIM_TypeDef* TIMx, uint16_t TIM_ICPolarity, uint16_t TIM_ICSelection, - uint16_t TIM_ICFilter) -{ - uint16_t tmpccmr2 = 0, tmpccer = 0, tmp = 0; - /* Disable the Channel 3: Reset the CC3E Bit */ - TIMx->CCER &= CCER_CC3E_Reset; - tmpccmr2 = TIMx->CCMR2; - tmpccer = TIMx->CCER; - tmp = (uint16_t)(TIM_ICPolarity << 8); - /* Select the Input and set the filter */ - tmpccmr2 &= CCMR_CC13S_Mask & CCMR_IC13F_Mask; - tmpccmr2 |= (uint16_t)(TIM_ICSelection | (uint16_t)(TIM_ICFilter << (uint16_t)4)); - /* Select the Polarity and set the CC3E Bit */ - tmpccer &= CCER_CC3P_Reset; - tmpccer |= (uint16_t)(tmp | (uint16_t)CCER_CC3E_Set); - /* Write to TIMx CCMR2 and CCER registers */ - TIMx->CCMR2 = tmpccmr2; - TIMx->CCER = tmpccer; -} - -/** - * @brief Configure the TI1 as Input. - * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. - * @param TIM_ICPolarity : The Input Polarity. - * This parameter can be one of the following values: - * @arg TIM_ICPolarity_Rising - * @arg TIM_ICPolarity_Falling - * @param TIM_ICSelection: specifies the input to be used. - * This parameter can be one of the following values: - * @arg TIM_ICSelection_DirectTI: TIM Input 4 is selected to be connected to IC4. - * @arg TIM_ICSelection_IndirectTI: TIM Input 4 is selected to be connected to IC3. - * @arg TIM_ICSelection_TRC: TIM Input 4 is selected to be connected to TRC. - * @param TIM_ICFilter: Specifies the Input Capture Filter. - * This parameter must be a value between 0x00 and 0x0F. - * @retval None - */ -static void TI4_Config(TIM_TypeDef* TIMx, uint16_t TIM_ICPolarity, uint16_t TIM_ICSelection, - uint16_t TIM_ICFilter) -{ - uint16_t tmpccmr2 = 0, tmpccer = 0, tmp = 0; - - /* Disable the Channel 4: Reset the CC4E Bit */ - TIMx->CCER &= CCER_CC4E_Reset; - tmpccmr2 = TIMx->CCMR2; - tmpccer = TIMx->CCER; - tmp = (uint16_t)(TIM_ICPolarity << 12); - - /* Select the Input and set the filter */ - tmpccmr2 &= CCMR_CC24S_Mask & CCMR_IC24F_Mask; - tmpccmr2 |= (uint16_t)(TIM_ICSelection << 8); - tmpccmr2 |= (uint16_t)(TIM_ICFilter << 12); - - /* Select the Polarity and set the CC4E Bit */ - tmpccer &= CCER_CC4P_Reset; - tmpccer |= (uint16_t)(tmp | (uint16_t)CCER_CC4E_Set); - /* Write to TIMx CCMR2 and CCER registers */ - TIMx->CCMR2 = tmpccmr2; - TIMx->CCER = tmpccer ; -} - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_usart.c b/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_usart.c deleted file mode 100644 index c23a51d48f..0000000000 --- a/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_usart.c +++ /dev/null @@ -1,1054 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f10x_usart.c - * @author MCD Application Team - * @version V3.2.0 - * @date 03/01/2010 - * @brief This file provides all the USART firmware functions. - ****************************************************************************** - * @copy - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2010 STMicroelectronics

- */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x_usart.h" -#include "stm32f10x_rcc.h" - -/** @addtogroup STM32F10x_StdPeriph_Driver - * @{ - */ - -/** @defgroup USART - * @brief USART driver modules - * @{ - */ - -/** @defgroup USART_Private_TypesDefinitions - * @{ - */ - -/** - * @} - */ - -/** @defgroup USART_Private_Defines - * @{ - */ - -#define CR1_UE_Set ((uint16_t)0x2000) /*!< USART Enable Mask */ -#define CR1_UE_Reset ((uint16_t)0xDFFF) /*!< USART Disable Mask */ - -#define CR1_WAKE_Mask ((uint16_t)0xF7FF) /*!< USART WakeUp Method Mask */ - -#define CR1_RWU_Set ((uint16_t)0x0002) /*!< USART mute mode Enable Mask */ -#define CR1_RWU_Reset ((uint16_t)0xFFFD) /*!< USART mute mode Enable Mask */ -#define CR1_SBK_Set ((uint16_t)0x0001) /*!< USART Break Character send Mask */ -#define CR1_CLEAR_Mask ((uint16_t)0xE9F3) /*!< USART CR1 Mask */ -#define CR2_Address_Mask ((uint16_t)0xFFF0) /*!< USART address Mask */ - -#define CR2_LINEN_Set ((uint16_t)0x4000) /*!< USART LIN Enable Mask */ -#define CR2_LINEN_Reset ((uint16_t)0xBFFF) /*!< USART LIN Disable Mask */ - -#define CR2_LBDL_Mask ((uint16_t)0xFFDF) /*!< USART LIN Break detection Mask */ -#define CR2_STOP_CLEAR_Mask ((uint16_t)0xCFFF) /*!< USART CR2 STOP Bits Mask */ -#define CR2_CLOCK_CLEAR_Mask ((uint16_t)0xF0FF) /*!< USART CR2 Clock Mask */ - -#define CR3_SCEN_Set ((uint16_t)0x0020) /*!< USART SC Enable Mask */ -#define CR3_SCEN_Reset ((uint16_t)0xFFDF) /*!< USART SC Disable Mask */ - -#define CR3_NACK_Set ((uint16_t)0x0010) /*!< USART SC NACK Enable Mask */ -#define CR3_NACK_Reset ((uint16_t)0xFFEF) /*!< USART SC NACK Disable Mask */ - -#define CR3_HDSEL_Set ((uint16_t)0x0008) /*!< USART Half-Duplex Enable Mask */ -#define CR3_HDSEL_Reset ((uint16_t)0xFFF7) /*!< USART Half-Duplex Disable Mask */ - -#define CR3_IRLP_Mask ((uint16_t)0xFFFB) /*!< USART IrDA LowPower mode Mask */ -#define CR3_CLEAR_Mask ((uint16_t)0xFCFF) /*!< USART CR3 Mask */ - -#define CR3_IREN_Set ((uint16_t)0x0002) /*!< USART IrDA Enable Mask */ -#define CR3_IREN_Reset ((uint16_t)0xFFFD) /*!< USART IrDA Disable Mask */ -#define GTPR_LSB_Mask ((uint16_t)0x00FF) /*!< Guard Time Register LSB Mask */ -#define GTPR_MSB_Mask ((uint16_t)0xFF00) /*!< Guard Time Register MSB Mask */ -#define IT_Mask ((uint16_t)0x001F) /*!< USART Interrupt Mask */ - -/* USART OverSampling-8 Mask */ -#define CR1_OVER8_Set ((u16)0x8000) /* USART OVER8 mode Enable Mask */ -#define CR1_OVER8_Reset ((u16)0x7FFF) /* USART OVER8 mode Disable Mask */ - -/* USART One Bit Sampling Mask */ -#define CR3_ONEBITE_Set ((u16)0x0800) /* USART ONEBITE mode Enable Mask */ -#define CR3_ONEBITE_Reset ((u16)0xF7FF) /* USART ONEBITE mode Disable Mask */ - -/** - * @} - */ - -/** @defgroup USART_Private_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup USART_Private_Variables - * @{ - */ - -/** - * @} - */ - -/** @defgroup USART_Private_FunctionPrototypes - * @{ - */ - -/** - * @} - */ - -/** @defgroup USART_Private_Functions - * @{ - */ - -/** - * @brief Deinitializes the USARTx peripheral registers to their default reset values. - * @param USARTx: Select the USART or the UART peripheral. - * This parameter can be one of the following values: USART1, USART2, USART3, UART4 or UART5. - * @retval None - */ -void USART_DeInit(USART_TypeDef* USARTx) -{ - /* Check the parameters */ - assert_param(IS_USART_ALL_PERIPH(USARTx)); - - if (USARTx == USART1) - { - RCC_APB2PeriphResetCmd(RCC_APB2Periph_USART1, ENABLE); - RCC_APB2PeriphResetCmd(RCC_APB2Periph_USART1, DISABLE); - } - else if (USARTx == USART2) - { - RCC_APB1PeriphResetCmd(RCC_APB1Periph_USART2, ENABLE); - RCC_APB1PeriphResetCmd(RCC_APB1Periph_USART2, DISABLE); - } - else if (USARTx == USART3) - { - RCC_APB1PeriphResetCmd(RCC_APB1Periph_USART3, ENABLE); - RCC_APB1PeriphResetCmd(RCC_APB1Periph_USART3, DISABLE); - } - else if (USARTx == UART4) - { - RCC_APB1PeriphResetCmd(RCC_APB1Periph_UART4, ENABLE); - RCC_APB1PeriphResetCmd(RCC_APB1Periph_UART4, DISABLE); - } - else - { - if (USARTx == UART5) - { - RCC_APB1PeriphResetCmd(RCC_APB1Periph_UART5, ENABLE); - RCC_APB1PeriphResetCmd(RCC_APB1Periph_UART5, DISABLE); - } - } -} - -/** - * @brief Initializes the USARTx peripheral according to the specified - * parameters in the USART_InitStruct . - * @param USARTx: Select the USART or the UART peripheral. - * This parameter can be one of the following values: - * USART1, USART2, USART3, UART4 or UART5. - * @param USART_InitStruct: pointer to a USART_InitTypeDef structure - * that contains the configuration information for the specified USART peripheral. - * @retval None - */ -void USART_Init(USART_TypeDef* USARTx, USART_InitTypeDef* USART_InitStruct) -{ - uint32_t tmpreg = 0x00, apbclock = 0x00; - uint32_t integerdivider = 0x00; - uint32_t fractionaldivider = 0x00; - uint32_t usartxbase = 0; - RCC_ClocksTypeDef RCC_ClocksStatus; - /* Check the parameters */ - assert_param(IS_USART_ALL_PERIPH(USARTx)); - assert_param(IS_USART_BAUDRATE(USART_InitStruct->USART_BaudRate)); - assert_param(IS_USART_WORD_LENGTH(USART_InitStruct->USART_WordLength)); - assert_param(IS_USART_STOPBITS(USART_InitStruct->USART_StopBits)); - assert_param(IS_USART_PARITY(USART_InitStruct->USART_Parity)); - assert_param(IS_USART_MODE(USART_InitStruct->USART_Mode)); - assert_param(IS_USART_HARDWARE_FLOW_CONTROL(USART_InitStruct->USART_HardwareFlowControl)); - /* The hardware flow control is available only for USART1, USART2 and USART3 */ - if (USART_InitStruct->USART_HardwareFlowControl != USART_HardwareFlowControl_None) - { - assert_param(IS_USART_123_PERIPH(USARTx)); - } - - usartxbase = (uint32_t)USARTx; - -/*---------------------------- USART CR2 Configuration -----------------------*/ - tmpreg = USARTx->CR2; - /* Clear STOP[13:12] bits */ - tmpreg &= CR2_STOP_CLEAR_Mask; - /* Configure the USART Stop Bits, Clock, CPOL, CPHA and LastBit ------------*/ - /* Set STOP[13:12] bits according to USART_StopBits value */ - tmpreg |= (uint32_t)USART_InitStruct->USART_StopBits; - - /* Write to USART CR2 */ - USARTx->CR2 = (uint16_t)tmpreg; - -/*---------------------------- USART CR1 Configuration -----------------------*/ - tmpreg = USARTx->CR1; - /* Clear M, PCE, PS, TE and RE bits */ - tmpreg &= CR1_CLEAR_Mask; - /* Configure the USART Word Length, Parity and mode ----------------------- */ - /* Set the M bits according to USART_WordLength value */ - /* Set PCE and PS bits according to USART_Parity value */ - /* Set TE and RE bits according to USART_Mode value */ - tmpreg |= (uint32_t)USART_InitStruct->USART_WordLength | USART_InitStruct->USART_Parity | - USART_InitStruct->USART_Mode; - /* Write to USART CR1 */ - USARTx->CR1 = (uint16_t)tmpreg; - -/*---------------------------- USART CR3 Configuration -----------------------*/ - tmpreg = USARTx->CR3; - /* Clear CTSE and RTSE bits */ - tmpreg &= CR3_CLEAR_Mask; - /* Configure the USART HFC -------------------------------------------------*/ - /* Set CTSE and RTSE bits according to USART_HardwareFlowControl value */ - tmpreg |= USART_InitStruct->USART_HardwareFlowControl; - /* Write to USART CR3 */ - USARTx->CR3 = (uint16_t)tmpreg; - -/*---------------------------- USART BRR Configuration -----------------------*/ - /* Configure the USART Baud Rate -------------------------------------------*/ - RCC_GetClocksFreq(&RCC_ClocksStatus); - if (usartxbase == USART1_BASE) - { - apbclock = RCC_ClocksStatus.PCLK2_Frequency; - } - else - { - apbclock = RCC_ClocksStatus.PCLK1_Frequency; - } - - /* Determine the integer part */ - if ((USARTx->CR1 & CR1_OVER8_Set) != 0) - { - /* Integer part computing in case Oversampling mode is 8 Samples */ - integerdivider = ((25 * apbclock) / (2 * (USART_InitStruct->USART_BaudRate))); - } - else /* if ((USARTx->CR1 & CR1_OVER8_Set) == 0) */ - { - /* Integer part computing in case Oversampling mode is 16 Samples */ - integerdivider = ((25 * apbclock) / (4 * (USART_InitStruct->USART_BaudRate))); - } - tmpreg = (integerdivider / 100) << 4; - - /* Determine the fractional part */ - fractionaldivider = integerdivider - (100 * (tmpreg >> 4)); - - /* Implement the fractional part in the register */ - if ((USARTx->CR1 & CR1_OVER8_Set) != 0) - { - tmpreg |= ((((fractionaldivider * 8) + 50) / 100)) & ((uint8_t)0x07); - } - else /* if ((USARTx->CR1 & CR1_OVER8_Set) == 0) */ - { - tmpreg |= ((((fractionaldivider * 16) + 50) / 100)) & ((uint8_t)0x0F); - } - - /* Write to USART BRR */ - USARTx->BRR = (uint16_t)tmpreg; -} - -/** - * @brief Fills each USART_InitStruct member with its default value. - * @param USART_InitStruct: pointer to a USART_InitTypeDef structure - * which will be initialized. - * @retval None - */ -void USART_StructInit(USART_InitTypeDef* USART_InitStruct) -{ - /* USART_InitStruct members default value */ - USART_InitStruct->USART_BaudRate = 9600; - USART_InitStruct->USART_WordLength = USART_WordLength_8b; - USART_InitStruct->USART_StopBits = USART_StopBits_1; - USART_InitStruct->USART_Parity = USART_Parity_No ; - USART_InitStruct->USART_Mode = USART_Mode_Rx | USART_Mode_Tx; - USART_InitStruct->USART_HardwareFlowControl = USART_HardwareFlowControl_None; -} - -/** - * @brief Initializes the USARTx peripheral Clock according to the - * specified parameters in the USART_ClockInitStruct . - * @param USARTx: where x can be 1, 2, 3 to select the USART peripheral. - * @param USART_ClockInitStruct: pointer to a USART_ClockInitTypeDef - * structure that contains the configuration information for the specified - * USART peripheral. - * @note The Smart Card mode is not available for UART4 and UART5. - * @retval None - */ -void USART_ClockInit(USART_TypeDef* USARTx, USART_ClockInitTypeDef* USART_ClockInitStruct) -{ - uint32_t tmpreg = 0x00; - /* Check the parameters */ - assert_param(IS_USART_123_PERIPH(USARTx)); - assert_param(IS_USART_CLOCK(USART_ClockInitStruct->USART_Clock)); - assert_param(IS_USART_CPOL(USART_ClockInitStruct->USART_CPOL)); - assert_param(IS_USART_CPHA(USART_ClockInitStruct->USART_CPHA)); - assert_param(IS_USART_LASTBIT(USART_ClockInitStruct->USART_LastBit)); - -/*---------------------------- USART CR2 Configuration -----------------------*/ - tmpreg = USARTx->CR2; - /* Clear CLKEN, CPOL, CPHA and LBCL bits */ - tmpreg &= CR2_CLOCK_CLEAR_Mask; - /* Configure the USART Clock, CPOL, CPHA and LastBit ------------*/ - /* Set CLKEN bit according to USART_Clock value */ - /* Set CPOL bit according to USART_CPOL value */ - /* Set CPHA bit according to USART_CPHA value */ - /* Set LBCL bit according to USART_LastBit value */ - tmpreg |= (uint32_t)USART_ClockInitStruct->USART_Clock | USART_ClockInitStruct->USART_CPOL | - USART_ClockInitStruct->USART_CPHA | USART_ClockInitStruct->USART_LastBit; - /* Write to USART CR2 */ - USARTx->CR2 = (uint16_t)tmpreg; -} - -/** - * @brief Fills each USART_ClockInitStruct member with its default value. - * @param USART_ClockInitStruct: pointer to a USART_ClockInitTypeDef - * structure which will be initialized. - * @retval None - */ -void USART_ClockStructInit(USART_ClockInitTypeDef* USART_ClockInitStruct) -{ - /* USART_ClockInitStruct members default value */ - USART_ClockInitStruct->USART_Clock = USART_Clock_Disable; - USART_ClockInitStruct->USART_CPOL = USART_CPOL_Low; - USART_ClockInitStruct->USART_CPHA = USART_CPHA_1Edge; - USART_ClockInitStruct->USART_LastBit = USART_LastBit_Disable; -} - -/** - * @brief Enables or disables the specified USART peripheral. - * @param USARTx: Select the USART or the UART peripheral. - * This parameter can be one of the following values: - * USART1, USART2, USART3, UART4 or UART5. - * @param NewState: new state of the USARTx peripheral. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void USART_Cmd(USART_TypeDef* USARTx, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_USART_ALL_PERIPH(USARTx)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - - if (NewState != DISABLE) - { - /* Enable the selected USART by setting the UE bit in the CR1 register */ - USARTx->CR1 |= CR1_UE_Set; - } - else - { - /* Disable the selected USART by clearing the UE bit in the CR1 register */ - USARTx->CR1 &= CR1_UE_Reset; - } -} - -/** - * @brief Enables or disables the specified USART interrupts. - * @param USARTx: Select the USART or the UART peripheral. - * This parameter can be one of the following values: - * USART1, USART2, USART3, UART4 or UART5. - * @param USART_IT: specifies the USART interrupt sources to be enabled or disabled. - * This parameter can be one of the following values: - * @arg USART_IT_CTS: CTS change interrupt (not available for UART4 and UART5) - * @arg USART_IT_LBD: LIN Break detection interrupt - * @arg USART_IT_TXE: Tansmit Data Register empty interrupt - * @arg USART_IT_TC: Transmission complete interrupt - * @arg USART_IT_RXNE: Receive Data register not empty interrupt - * @arg USART_IT_IDLE: Idle line detection interrupt - * @arg USART_IT_PE: Parity Error interrupt - * @arg USART_IT_ERR: Error interrupt(Frame error, noise error, overrun error) - * @param NewState: new state of the specified USARTx interrupts. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void USART_ITConfig(USART_TypeDef* USARTx, uint16_t USART_IT, FunctionalState NewState) -{ - uint32_t usartreg = 0x00, itpos = 0x00, itmask = 0x00; - uint32_t usartxbase = 0x00; - /* Check the parameters */ - assert_param(IS_USART_ALL_PERIPH(USARTx)); - assert_param(IS_USART_CONFIG_IT(USART_IT)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - /* The CTS interrupt is not available for UART4 and UART5 */ - if (USART_IT == USART_IT_CTS) - { - assert_param(IS_USART_123_PERIPH(USARTx)); - } - - usartxbase = (uint32_t)USARTx; - - /* Get the USART register index */ - usartreg = (((uint8_t)USART_IT) >> 0x05); - - /* Get the interrupt position */ - itpos = USART_IT & IT_Mask; - itmask = (((uint32_t)0x01) << itpos); - - if (usartreg == 0x01) /* The IT is in CR1 register */ - { - usartxbase += 0x0C; - } - else if (usartreg == 0x02) /* The IT is in CR2 register */ - { - usartxbase += 0x10; - } - else /* The IT is in CR3 register */ - { - usartxbase += 0x14; - } - if (NewState != DISABLE) - { - *(__IO uint32_t*)usartxbase |= itmask; - } - else - { - *(__IO uint32_t*)usartxbase &= ~itmask; - } -} - -/** - * @brief Enables or disables the USART’s DMA interface. - * @param USARTx: Select the USART or the UART peripheral. - * This parameter can be one of the following values: - * USART1, USART2, USART3 or UART4. - * @param USART_DMAReq: specifies the DMA request. - * This parameter can be any combination of the following values: - * @arg USART_DMAReq_Tx: USART DMA transmit request - * @arg USART_DMAReq_Rx: USART DMA receive request - * @param NewState: new state of the DMA Request sources. - * This parameter can be: ENABLE or DISABLE. - * @note The DMA mode is not available for UART5. - * @retval None - */ -void USART_DMACmd(USART_TypeDef* USARTx, uint16_t USART_DMAReq, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_USART_1234_PERIPH(USARTx)); - assert_param(IS_USART_DMAREQ(USART_DMAReq)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - if (NewState != DISABLE) - { - /* Enable the DMA transfer for selected requests by setting the DMAT and/or - DMAR bits in the USART CR3 register */ - USARTx->CR3 |= USART_DMAReq; - } - else - { - /* Disable the DMA transfer for selected requests by clearing the DMAT and/or - DMAR bits in the USART CR3 register */ - USARTx->CR3 &= (uint16_t)~USART_DMAReq; - } -} - -/** - * @brief Sets the address of the USART node. - * @param USARTx: Select the USART or the UART peripheral. - * This parameter can be one of the following values: - * USART1, USART2, USART3, UART4 or UART5. - * @param USART_Address: Indicates the address of the USART node. - * @retval None - */ -void USART_SetAddress(USART_TypeDef* USARTx, uint8_t USART_Address) -{ - /* Check the parameters */ - assert_param(IS_USART_ALL_PERIPH(USARTx)); - assert_param(IS_USART_ADDRESS(USART_Address)); - - /* Clear the USART address */ - USARTx->CR2 &= CR2_Address_Mask; - /* Set the USART address node */ - USARTx->CR2 |= USART_Address; -} - -/** - * @brief Selects the USART WakeUp method. - * @param USARTx: Select the USART or the UART peripheral. - * This parameter can be one of the following values: - * USART1, USART2, USART3, UART4 or UART5. - * @param USART_WakeUp: specifies the USART wakeup method. - * This parameter can be one of the following values: - * @arg USART_WakeUp_IdleLine: WakeUp by an idle line detection - * @arg USART_WakeUp_AddressMark: WakeUp by an address mark - * @retval None - */ -void USART_WakeUpConfig(USART_TypeDef* USARTx, uint16_t USART_WakeUp) -{ - /* Check the parameters */ - assert_param(IS_USART_ALL_PERIPH(USARTx)); - assert_param(IS_USART_WAKEUP(USART_WakeUp)); - - USARTx->CR1 &= CR1_WAKE_Mask; - USARTx->CR1 |= USART_WakeUp; -} - -/** - * @brief Determines if the USART is in mute mode or not. - * @param USARTx: Select the USART or the UART peripheral. - * This parameter can be one of the following values: - * USART1, USART2, USART3, UART4 or UART5. - * @param NewState: new state of the USART mute mode. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void USART_ReceiverWakeUpCmd(USART_TypeDef* USARTx, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_USART_ALL_PERIPH(USARTx)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - - if (NewState != DISABLE) - { - /* Enable the USART mute mode by setting the RWU bit in the CR1 register */ - USARTx->CR1 |= CR1_RWU_Set; - } - else - { - /* Disable the USART mute mode by clearing the RWU bit in the CR1 register */ - USARTx->CR1 &= CR1_RWU_Reset; - } -} - -/** - * @brief Sets the USART LIN Break detection length. - * @param USARTx: Select the USART or the UART peripheral. - * This parameter can be one of the following values: - * USART1, USART2, USART3, UART4 or UART5. - * @param USART_LINBreakDetectLength: specifies the LIN break detection length. - * This parameter can be one of the following values: - * @arg USART_LINBreakDetectLength_10b: 10-bit break detection - * @arg USART_LINBreakDetectLength_11b: 11-bit break detection - * @retval None - */ -void USART_LINBreakDetectLengthConfig(USART_TypeDef* USARTx, uint16_t USART_LINBreakDetectLength) -{ - /* Check the parameters */ - assert_param(IS_USART_ALL_PERIPH(USARTx)); - assert_param(IS_USART_LIN_BREAK_DETECT_LENGTH(USART_LINBreakDetectLength)); - - USARTx->CR2 &= CR2_LBDL_Mask; - USARTx->CR2 |= USART_LINBreakDetectLength; -} - -/** - * @brief Enables or disables the USART’s LIN mode. - * @param USARTx: Select the USART or the UART peripheral. - * This parameter can be one of the following values: - * USART1, USART2, USART3, UART4 or UART5. - * @param NewState: new state of the USART LIN mode. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void USART_LINCmd(USART_TypeDef* USARTx, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_USART_ALL_PERIPH(USARTx)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - - if (NewState != DISABLE) - { - /* Enable the LIN mode by setting the LINEN bit in the CR2 register */ - USARTx->CR2 |= CR2_LINEN_Set; - } - else - { - /* Disable the LIN mode by clearing the LINEN bit in the CR2 register */ - USARTx->CR2 &= CR2_LINEN_Reset; - } -} - -/** - * @brief Transmits single data through the USARTx peripheral. - * @param USARTx: Select the USART or the UART peripheral. - * This parameter can be one of the following values: - * USART1, USART2, USART3, UART4 or UART5. - * @param Data: the data to transmit. - * @retval None - */ -void USART_SendData(USART_TypeDef* USARTx, uint16_t Data) -{ - /* Check the parameters */ - assert_param(IS_USART_ALL_PERIPH(USARTx)); - assert_param(IS_USART_DATA(Data)); - - /* Transmit Data */ - USARTx->DR = (Data & (uint16_t)0x01FF); -} - -/** - * @brief Returns the most recent received data by the USARTx peripheral. - * @param USARTx: Select the USART or the UART peripheral. - * This parameter can be one of the following values: - * USART1, USART2, USART3, UART4 or UART5. - * @retval The received data. - */ -uint16_t USART_ReceiveData(USART_TypeDef* USARTx) -{ - /* Check the parameters */ - assert_param(IS_USART_ALL_PERIPH(USARTx)); - - /* Receive Data */ - return (uint16_t)(USARTx->DR & (uint16_t)0x01FF); -} - -/** - * @brief Transmits break characters. - * @param USARTx: Select the USART or the UART peripheral. - * This parameter can be one of the following values: - * USART1, USART2, USART3, UART4 or UART5. - * @retval None - */ -void USART_SendBreak(USART_TypeDef* USARTx) -{ - /* Check the parameters */ - assert_param(IS_USART_ALL_PERIPH(USARTx)); - - /* Send break characters */ - USARTx->CR1 |= CR1_SBK_Set; -} - -/** - * @brief Sets the specified USART guard time. - * @param USARTx: where x can be 1, 2 or 3 to select the USART peripheral. - * @param USART_GuardTime: specifies the guard time. - * @note The guard time bits are not available for UART4 and UART5. - * @retval None - */ -void USART_SetGuardTime(USART_TypeDef* USARTx, uint8_t USART_GuardTime) -{ - /* Check the parameters */ - assert_param(IS_USART_123_PERIPH(USARTx)); - - /* Clear the USART Guard time */ - USARTx->GTPR &= GTPR_LSB_Mask; - /* Set the USART guard time */ - USARTx->GTPR |= (uint16_t)((uint16_t)USART_GuardTime << 0x08); -} - -/** - * @brief Sets the system clock prescaler. - * @param USARTx: Select the USART or the UART peripheral. - * This parameter can be one of the following values: - * USART1, USART2, USART3, UART4 or UART5. - * @param USART_Prescaler: specifies the prescaler clock. - * @note The function is used for IrDA mode with UART4 and UART5. - * @retval None - */ -void USART_SetPrescaler(USART_TypeDef* USARTx, uint8_t USART_Prescaler) -{ - /* Check the parameters */ - assert_param(IS_USART_ALL_PERIPH(USARTx)); - - /* Clear the USART prescaler */ - USARTx->GTPR &= GTPR_MSB_Mask; - /* Set the USART prescaler */ - USARTx->GTPR |= USART_Prescaler; -} - -/** - * @brief Enables or disables the USART’s Smart Card mode. - * @param USARTx: where x can be 1, 2 or 3 to select the USART peripheral. - * @param NewState: new state of the Smart Card mode. - * This parameter can be: ENABLE or DISABLE. - * @note The Smart Card mode is not available for UART4 and UART5. - * @retval None - */ -void USART_SmartCardCmd(USART_TypeDef* USARTx, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_USART_123_PERIPH(USARTx)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - if (NewState != DISABLE) - { - /* Enable the SC mode by setting the SCEN bit in the CR3 register */ - USARTx->CR3 |= CR3_SCEN_Set; - } - else - { - /* Disable the SC mode by clearing the SCEN bit in the CR3 register */ - USARTx->CR3 &= CR3_SCEN_Reset; - } -} - -/** - * @brief Enables or disables NACK transmission. - * @param USARTx: where x can be 1, 2 or 3 to select the USART peripheral. - * @param NewState: new state of the NACK transmission. - * This parameter can be: ENABLE or DISABLE. - * @note The Smart Card mode is not available for UART4 and UART5. - * @retval None - */ -void USART_SmartCardNACKCmd(USART_TypeDef* USARTx, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_USART_123_PERIPH(USARTx)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - if (NewState != DISABLE) - { - /* Enable the NACK transmission by setting the NACK bit in the CR3 register */ - USARTx->CR3 |= CR3_NACK_Set; - } - else - { - /* Disable the NACK transmission by clearing the NACK bit in the CR3 register */ - USARTx->CR3 &= CR3_NACK_Reset; - } -} - -/** - * @brief Enables or disables the USART’s Half Duplex communication. - * @param USARTx: Select the USART or the UART peripheral. - * This parameter can be one of the following values: - * USART1, USART2, USART3, UART4 or UART5. - * @param NewState: new state of the USART Communication. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void USART_HalfDuplexCmd(USART_TypeDef* USARTx, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_USART_ALL_PERIPH(USARTx)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - - if (NewState != DISABLE) - { - /* Enable the Half-Duplex mode by setting the HDSEL bit in the CR3 register */ - USARTx->CR3 |= CR3_HDSEL_Set; - } - else - { - /* Disable the Half-Duplex mode by clearing the HDSEL bit in the CR3 register */ - USARTx->CR3 &= CR3_HDSEL_Reset; - } -} - - -/** - * @brief Enables or disables the USART's 8x oversampling mode. - * @param USARTx: Select the USART or the UART peripheral. - * This parameter can be one of the following values: - * USART1, USART2, USART3, UART4 or UART5. - * @param NewState: new state of the USART one bit sampling methode. - * This parameter can be: ENABLE or DISABLE. - * @note - * This function has to be called before calling USART_Init() - * function in order to have correct baudrate Divider value. - * @retval None - */ -void USART_OverSampling8Cmd(USART_TypeDef* USARTx, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_USART_ALL_PERIPH(USARTx)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - - if (NewState != DISABLE) - { - /* Enable the 8x Oversampling mode by setting the OVER8 bit in the CR1 register */ - USARTx->CR1 |= CR1_OVER8_Set; - } - else - { - /* Disable the 8x Oversampling mode by clearing the OVER8 bit in the CR1 register */ - USARTx->CR1 &= CR1_OVER8_Reset; - } -} - -/** - * @brief Enables or disables the USART's one bit sampling methode. - * @param USARTx: Select the USART or the UART peripheral. - * This parameter can be one of the following values: - * USART1, USART2, USART3, UART4 or UART5. - * @param NewState: new state of the USART one bit sampling methode. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void USART_OneBitMethodCmd(USART_TypeDef* USARTx, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_USART_ALL_PERIPH(USARTx)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - - if (NewState != DISABLE) - { - /* Enable the one bit method by setting the ONEBITE bit in the CR3 register */ - USARTx->CR3 |= CR3_ONEBITE_Set; - } - else - { - /* Disable tthe one bit method by clearing the ONEBITE bit in the CR3 register */ - USARTx->CR3 &= CR3_ONEBITE_Reset; - } -} - -/** - * @brief Configures the USART’s IrDA interface. - * @param USARTx: Select the USART or the UART peripheral. - * This parameter can be one of the following values: - * USART1, USART2, USART3, UART4 or UART5. - * @param USART_IrDAMode: specifies the IrDA mode. - * This parameter can be one of the following values: - * @arg USART_IrDAMode_LowPower - * @arg USART_IrDAMode_Normal - * @retval None - */ -void USART_IrDAConfig(USART_TypeDef* USARTx, uint16_t USART_IrDAMode) -{ - /* Check the parameters */ - assert_param(IS_USART_ALL_PERIPH(USARTx)); - assert_param(IS_USART_IRDA_MODE(USART_IrDAMode)); - - USARTx->CR3 &= CR3_IRLP_Mask; - USARTx->CR3 |= USART_IrDAMode; -} - -/** - * @brief Enables or disables the USART’s IrDA interface. - * @param USARTx: Select the USART or the UART peripheral. - * This parameter can be one of the following values: - * USART1, USART2, USART3, UART4 or UART5. - * @param NewState: new state of the IrDA mode. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void USART_IrDACmd(USART_TypeDef* USARTx, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_USART_ALL_PERIPH(USARTx)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - - if (NewState != DISABLE) - { - /* Enable the IrDA mode by setting the IREN bit in the CR3 register */ - USARTx->CR3 |= CR3_IREN_Set; - } - else - { - /* Disable the IrDA mode by clearing the IREN bit in the CR3 register */ - USARTx->CR3 &= CR3_IREN_Reset; - } -} - -/** - * @brief Checks whether the specified USART flag is set or not. - * @param USARTx: Select the USART or the UART peripheral. - * This parameter can be one of the following values: - * USART1, USART2, USART3, UART4 or UART5. - * @param USART_FLAG: specifies the flag to check. - * This parameter can be one of the following values: - * @arg USART_FLAG_CTS: CTS Change flag (not available for UART4 and UART5) - * @arg USART_FLAG_LBD: LIN Break detection flag - * @arg USART_FLAG_TXE: Transmit data register empty flag - * @arg USART_FLAG_TC: Transmission Complete flag - * @arg USART_FLAG_RXNE: Receive data register not empty flag - * @arg USART_FLAG_IDLE: Idle Line detection flag - * @arg USART_FLAG_ORE: OverRun Error flag - * @arg USART_FLAG_NE: Noise Error flag - * @arg USART_FLAG_FE: Framing Error flag - * @arg USART_FLAG_PE: Parity Error flag - * @retval The new state of USART_FLAG (SET or RESET). - */ -FlagStatus USART_GetFlagStatus(USART_TypeDef* USARTx, uint16_t USART_FLAG) -{ - FlagStatus bitstatus = RESET; - /* Check the parameters */ - assert_param(IS_USART_ALL_PERIPH(USARTx)); - assert_param(IS_USART_FLAG(USART_FLAG)); - /* The CTS flag is not available for UART4 and UART5 */ - if (USART_FLAG == USART_FLAG_CTS) - { - assert_param(IS_USART_123_PERIPH(USARTx)); - } - - if ((USARTx->SR & USART_FLAG) != (uint16_t)RESET) - { - bitstatus = SET; - } - else - { - bitstatus = RESET; - } - return bitstatus; -} - -/** - * @brief Clears the USARTx's pending flags. - * @param USARTx: Select the USART or the UART peripheral. - * This parameter can be one of the following values: - * USART1, USART2, USART3, UART4 or UART5. - * @param USART_FLAG: specifies the flag to clear. - * This parameter can be any combination of the following values: - * @arg USART_FLAG_CTS: CTS Change flag (not available for UART4 and UART5). - * @arg USART_FLAG_LBD: LIN Break detection flag. - * @arg USART_FLAG_TC: Transmission Complete flag. - * @arg USART_FLAG_RXNE: Receive data register not empty flag. - * - * @note - * - PE (Parity error), FE (Framing error), NE (Noise error), ORE (OverRun - * error) and IDLE (Idle line detected) flags are cleared by software - * sequence: a read operation to USART_SR register (USART_GetFlagStatus()) - * followed by a read operation to USART_DR register (USART_ReceiveData()). - * - RXNE flag can be also cleared by a read to the USART_DR register - * (USART_ReceiveData()). - * - TC flag can be also cleared by software sequence: a read operation to - * USART_SR register (USART_GetFlagStatus()) followed by a write operation - * to USART_DR register (USART_SendData()). - * - TXE flag is cleared only by a write to the USART_DR register - * (USART_SendData()). - * @retval None - */ -void USART_ClearFlag(USART_TypeDef* USARTx, uint16_t USART_FLAG) -{ - /* Check the parameters */ - assert_param(IS_USART_ALL_PERIPH(USARTx)); - assert_param(IS_USART_CLEAR_FLAG(USART_FLAG)); - /* The CTS flag is not available for UART4 and UART5 */ - if ((USART_FLAG & USART_FLAG_CTS) == USART_FLAG_CTS) - { - assert_param(IS_USART_123_PERIPH(USARTx)); - } - - USARTx->SR = (uint16_t)~USART_FLAG; -} - -/** - * @brief Checks whether the specified USART interrupt has occurred or not. - * @param USARTx: Select the USART or the UART peripheral. - * This parameter can be one of the following values: - * USART1, USART2, USART3, UART4 or UART5. - * @param USART_IT: specifies the USART interrupt source to check. - * This parameter can be one of the following values: - * @arg USART_IT_CTS: CTS change interrupt (not available for UART4 and UART5) - * @arg USART_IT_LBD: LIN Break detection interrupt - * @arg USART_IT_TXE: Tansmit Data Register empty interrupt - * @arg USART_IT_TC: Transmission complete interrupt - * @arg USART_IT_RXNE: Receive Data register not empty interrupt - * @arg USART_IT_IDLE: Idle line detection interrupt - * @arg USART_IT_ORE: OverRun Error interrupt - * @arg USART_IT_NE: Noise Error interrupt - * @arg USART_IT_FE: Framing Error interrupt - * @arg USART_IT_PE: Parity Error interrupt - * @retval The new state of USART_IT (SET or RESET). - */ -ITStatus USART_GetITStatus(USART_TypeDef* USARTx, uint16_t USART_IT) -{ - uint32_t bitpos = 0x00, itmask = 0x00, usartreg = 0x00; - ITStatus bitstatus = RESET; - /* Check the parameters */ - assert_param(IS_USART_ALL_PERIPH(USARTx)); - assert_param(IS_USART_GET_IT(USART_IT)); - /* The CTS interrupt is not available for UART4 and UART5 */ - if (USART_IT == USART_IT_CTS) - { - assert_param(IS_USART_123_PERIPH(USARTx)); - } - - /* Get the USART register index */ - usartreg = (((uint8_t)USART_IT) >> 0x05); - /* Get the interrupt position */ - itmask = USART_IT & IT_Mask; - itmask = (uint32_t)0x01 << itmask; - - if (usartreg == 0x01) /* The IT is in CR1 register */ - { - itmask &= USARTx->CR1; - } - else if (usartreg == 0x02) /* The IT is in CR2 register */ - { - itmask &= USARTx->CR2; - } - else /* The IT is in CR3 register */ - { - itmask &= USARTx->CR3; - } - - bitpos = USART_IT >> 0x08; - bitpos = (uint32_t)0x01 << bitpos; - bitpos &= USARTx->SR; - if ((itmask != (uint16_t)RESET)&&(bitpos != (uint16_t)RESET)) - { - bitstatus = SET; - } - else - { - bitstatus = RESET; - } - - return bitstatus; -} - -/** - * @brief Clears the USARTx’s interrupt pending bits. - * @param USARTx: Select the USART or the UART peripheral. - * This parameter can be one of the following values: - * USART1, USART2, USART3, UART4 or UART5. - * @param USART_IT: specifies the interrupt pending bit to clear. - * This parameter can be one of the following values: - * @arg USART_IT_CTS: CTS change interrupt (not available for UART4 and UART5) - * @arg USART_IT_LBD: LIN Break detection interrupt - * @arg USART_IT_TC: Transmission complete interrupt. - * @arg USART_IT_RXNE: Receive Data register not empty interrupt. - * - * @note - * - PE (Parity error), FE (Framing error), NE (Noise error), ORE (OverRun - * error) and IDLE (Idle line detected) pending bits are cleared by - * software sequence: a read operation to USART_SR register - * (USART_GetITStatus()) followed by a read operation to USART_DR register - * (USART_ReceiveData()). - * - RXNE pending bit can be also cleared by a read to the USART_DR register - * (USART_ReceiveData()). - * - TC pending bit can be also cleared by software sequence: a read - * operation to USART_SR register (USART_GetITStatus()) followed by a write - * operation to USART_DR register (USART_SendData()). - * - TXE pending bit is cleared only by a write to the USART_DR register - * (USART_SendData()). - * @retval None - */ -void USART_ClearITPendingBit(USART_TypeDef* USARTx, uint16_t USART_IT) -{ - uint16_t bitpos = 0x00, itmask = 0x00; - /* Check the parameters */ - assert_param(IS_USART_ALL_PERIPH(USARTx)); - assert_param(IS_USART_CLEAR_IT(USART_IT)); - /* The CTS interrupt is not available for UART4 and UART5 */ - if (USART_IT == USART_IT_CTS) - { - assert_param(IS_USART_123_PERIPH(USARTx)); - } - - bitpos = USART_IT >> 0x08; - itmask = ((uint16_t)0x01 << (uint16_t)bitpos); - USARTx->SR = (uint16_t)~itmask; -} -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_wwdg.c b/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_wwdg.c deleted file mode 100644 index 7805d3c050..0000000000 --- a/bsp/stm32_radio/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_wwdg.c +++ /dev/null @@ -1,223 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f10x_wwdg.c - * @author MCD Application Team - * @version V3.2.0 - * @date 03/01/2010 - * @brief This file provides all the WWDG firmware functions. - ****************************************************************************** - * @copy - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2010 STMicroelectronics

- */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x_wwdg.h" -#include "stm32f10x_rcc.h" - -/** @addtogroup STM32F10x_StdPeriph_Driver - * @{ - */ - -/** @defgroup WWDG - * @brief WWDG driver modules - * @{ - */ - -/** @defgroup WWDG_Private_TypesDefinitions - * @{ - */ - -/** - * @} - */ - -/** @defgroup WWDG_Private_Defines - * @{ - */ - -/* ----------- WWDG registers bit address in the alias region ----------- */ -#define WWDG_OFFSET (WWDG_BASE - PERIPH_BASE) - -/* Alias word address of EWI bit */ -#define CFR_OFFSET (WWDG_OFFSET + 0x04) -#define EWI_BitNumber 0x09 -#define CFR_EWI_BB (PERIPH_BB_BASE + (CFR_OFFSET * 32) + (EWI_BitNumber * 4)) - -/* --------------------- WWDG registers bit mask ------------------------ */ - -/* CR register bit mask */ -#define CR_WDGA_Set ((uint32_t)0x00000080) - -/* CFR register bit mask */ -#define CFR_WDGTB_Mask ((uint32_t)0xFFFFFE7F) -#define CFR_W_Mask ((uint32_t)0xFFFFFF80) -#define BIT_Mask ((uint8_t)0x7F) - -/** - * @} - */ - -/** @defgroup WWDG_Private_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup WWDG_Private_Variables - * @{ - */ - -/** - * @} - */ - -/** @defgroup WWDG_Private_FunctionPrototypes - * @{ - */ - -/** - * @} - */ - -/** @defgroup WWDG_Private_Functions - * @{ - */ - -/** - * @brief Deinitializes the WWDG peripheral registers to their default reset values. - * @param None - * @retval None - */ -void WWDG_DeInit(void) -{ - RCC_APB1PeriphResetCmd(RCC_APB1Periph_WWDG, ENABLE); - RCC_APB1PeriphResetCmd(RCC_APB1Periph_WWDG, DISABLE); -} - -/** - * @brief Sets the WWDG Prescaler. - * @param WWDG_Prescaler: specifies the WWDG Prescaler. - * This parameter can be one of the following values: - * @arg WWDG_Prescaler_1: WWDG counter clock = (PCLK1/4096)/1 - * @arg WWDG_Prescaler_2: WWDG counter clock = (PCLK1/4096)/2 - * @arg WWDG_Prescaler_4: WWDG counter clock = (PCLK1/4096)/4 - * @arg WWDG_Prescaler_8: WWDG counter clock = (PCLK1/4096)/8 - * @retval None - */ -void WWDG_SetPrescaler(uint32_t WWDG_Prescaler) -{ - uint32_t tmpreg = 0; - /* Check the parameters */ - assert_param(IS_WWDG_PRESCALER(WWDG_Prescaler)); - /* Clear WDGTB[1:0] bits */ - tmpreg = WWDG->CFR & CFR_WDGTB_Mask; - /* Set WDGTB[1:0] bits according to WWDG_Prescaler value */ - tmpreg |= WWDG_Prescaler; - /* Store the new value */ - WWDG->CFR = tmpreg; -} - -/** - * @brief Sets the WWDG window value. - * @param WindowValue: specifies the window value to be compared to the downcounter. - * This parameter value must be lower than 0x80. - * @retval None - */ -void WWDG_SetWindowValue(uint8_t WindowValue) -{ - __IO uint32_t tmpreg = 0; - - /* Check the parameters */ - assert_param(IS_WWDG_WINDOW_VALUE(WindowValue)); - /* Clear W[6:0] bits */ - - tmpreg = WWDG->CFR & CFR_W_Mask; - - /* Set W[6:0] bits according to WindowValue value */ - tmpreg |= WindowValue & (uint32_t) BIT_Mask; - - /* Store the new value */ - WWDG->CFR = tmpreg; -} - -/** - * @brief Enables the WWDG Early Wakeup interrupt(EWI). - * @param None - * @retval None - */ -void WWDG_EnableIT(void) -{ - *(__IO uint32_t *) CFR_EWI_BB = (uint32_t)ENABLE; -} - -/** - * @brief Sets the WWDG counter value. - * @param Counter: specifies the watchdog counter value. - * This parameter must be a number between 0x40 and 0x7F. - * @retval None - */ -void WWDG_SetCounter(uint8_t Counter) -{ - /* Check the parameters */ - assert_param(IS_WWDG_COUNTER(Counter)); - /* Write to T[6:0] bits to configure the counter value, no need to do - a read-modify-write; writing a 0 to WDGA bit does nothing */ - WWDG->CR = Counter & BIT_Mask; -} - -/** - * @brief Enables WWDG and load the counter value. - * @param Counter: specifies the watchdog counter value. - * This parameter must be a number between 0x40 and 0x7F. - * @retval None - */ -void WWDG_Enable(uint8_t Counter) -{ - /* Check the parameters */ - assert_param(IS_WWDG_COUNTER(Counter)); - WWDG->CR = CR_WDGA_Set | Counter; -} - -/** - * @brief Checks whether the Early Wakeup interrupt flag is set or not. - * @param None - * @retval The new state of the Early Wakeup interrupt flag (SET or RESET) - */ -FlagStatus WWDG_GetFlagStatus(void) -{ - return (FlagStatus)(WWDG->SR); -} - -/** - * @brief Clears Early Wakeup interrupt flag. - * @param None - * @retval None - */ -void WWDG_ClearFlag(void) -{ - WWDG->SR = (uint32_t)RESET; -} - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/Libraries/STM32_USB-FS-Device_Driver/inc/otgd_fs_cal.h b/bsp/stm32_radio/Libraries/STM32_USB-FS-Device_Driver/inc/otgd_fs_cal.h deleted file mode 100644 index 3c87394b60..0000000000 --- a/bsp/stm32_radio/Libraries/STM32_USB-FS-Device_Driver/inc/otgd_fs_cal.h +++ /dev/null @@ -1,259 +0,0 @@ -/******************** (C) COPYRIGHT 2009 STMicroelectronics ******************** -* File Name : otgd_fs_cal.h -* Author : STMicroelectronics -* Version : V3.1.0 -* Date : 10/30/2009 -* Description : Header of OTG FS Device Core Access Layer interface. -******************************************************************************** -* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS -* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. -* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, -* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE -* CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING -* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ -#ifndef __OTG_CORE_H__ -#define __OTG_CORE_H__ - -#ifdef STM32F10X_CL - -#include "stm32f10x.h" -#include "usb_type.h" - -#if defined ( __CC_ARM ) - #define __packed __packed /*!< packing keyword for ARM Compiler */ - -#elif defined ( __ICCARM__ ) - #define __packed __packed /*!< packing keyword for IAR Compiler */ - -#elif defined ( __GNUC__ ) - #define __packed __attribute__ ((__packed__)) /*!< packing keyword for GNU Compiler */ - -#endif /* __CC_ARM */ - -/******************************************************************************* - define and types -*******************************************************************************/ - -#define DEVICE_MODE_ENABLED - -#ifndef NULL -#define NULL ((void *)0) -#endif - - -#define DEV_EP_TX_DIS 0x0000 -#define DEV_EP_TX_STALL 0x0010 -#define DEV_EP_TX_NAK 0x0020 -#define DEV_EP_TX_VALID 0x0030 - -#define DEV_EP_RX_DIS 0x0000 -#define DEV_EP_RX_STALL 0x1000 -#define DEV_EP_RX_NAK 0x2000 -#define DEV_EP_RX_VALID 0x3000 - -/***************** GLOBAL DEFINES ***************************/ - -#define GAHBCFG_TXFEMPTYLVL_EMPTY 1 -#define GAHBCFG_TXFEMPTYLVL_HALFEMPTY 0 - -#define GAHBCFG_GLBINT_ENABLE 1 -#define GAHBCFG_INT_DMA_BURST_SINGLE 0 -#define GAHBCFG_INT_DMA_BURST_INCR 1 -#define GAHBCFG_INT_DMA_BURST_INCR4 3 -#define GAHBCFG_INT_DMA_BURST_INCR8 5 -#define GAHBCFG_INT_DMA_BURST_INCR16 7 -#define GAHBCFG_DMAENABLE 1 -#define GAHBCFG_TXFEMPTYLVL_EMPTY 1 -#define GAHBCFG_TXFEMPTYLVL_HALFEMPTY 0 - -#define GRXSTS_PKTSTS_IN 2 -#define GRXSTS_PKTSTS_IN_XFER_COMP 3 -#define GRXSTS_PKTSTS_DATA_TOGGLE_ERR 5 -#define GRXSTS_PKTSTS_CH_HALTED 7 - -#define DEVICE_MODE 0 -#define HOST_MODE 1 - -/***************** DEVICE DEFINES ***************************/ - -#define DSTS_ENUMSPD_HS_PHY_30MHZ_OR_60MHZ 0 -#define DSTS_ENUMSPD_FS_PHY_30MHZ_OR_60MHZ 1 -#define DSTS_ENUMSPD_LS_PHY_6MHZ 2 -#define DSTS_ENUMSPD_FS_PHY_48MHZ 3 - -#define DCFG_FRAME_INTERVAL_80 0 -#define DCFG_FRAME_INTERVAL_85 1 -#define DCFG_FRAME_INTERVAL_90 2 -#define DCFG_FRAME_INTERVAL_95 3 - -#define DEP0CTL_MPS_64 0 -#define DEP0CTL_MPS_32 1 -#define DEP0CTL_MPS_16 2 -#define DEP0CTL_MPS_8 3 - -#define EP_SPEED_LOW 0 -#define EP_SPEED_FULL 1 -#define EP_SPEED_HIGH 2 - -#define EP_TYPE_CTRL 0 -#define EP_TYPE_ISOC 1 -#define EP_TYPE_BULK 2 -#define EP_TYPE_INTR 3 - -#define STS_GOUT_NAK 1 -#define STS_DATA_UPDT 2 -#define STS_XFER_COMP 3 -#define STS_SETUP_COMP 4 -#define STS_SETUP_UPDT 6 - - - - -typedef enum { - - USB_OTG_OK, - USB_OTG_FAIL - -}USB_OTG_Status; - -typedef struct USB_OTG_hc -{ - uint8_t hc_num; - uint8_t dev_addr ; - uint8_t ep_num; - uint8_t ep_is_in; - uint8_t speed; - uint8_t ep_type; - uint16_t max_packet; - uint8_t data_pid; - uint16_t multi_count; - uint8_t *xfer_buff; - uint32_t xfer_len; -} -USB_OTG_HC , *PUSB_OTG_HC; - -typedef struct USB_OTG_ep -{ - uint8_t num; - uint8_t is_in; - uint32_t tx_fifo_num; - uint32_t type; - uint8_t data_pid_start; - uint8_t even_odd_frame; - uint32_t maxpacket; - uint8_t *xfer_buff; - uint32_t xfer_len; - uint32_t xfer_count; -} - -USB_OTG_EP , *PUSB_OTG_EP; - -/******************************************************************************** - MACRO'S -********************************************************************************/ - -#define CLEAR_IN_EP_INTR(epnum,intr) \ - diepint.d32=0; \ - diepint.b.intr = 1; \ - WRITE_REG32(&core_regs.inep_regs[epnum]->dev_in_ep_int,diepint.d32); - -#define CLEAR_OUT_EP_INTR(epnum,intr) \ - doepint.d32=0; \ - doepint.b.intr = 1; \ - WRITE_REG32(&core_regs.outep_regs[epnum]->dev_out_ep_int,doepint.d32); - - -#define READ_REG32(reg) (*(__IO uint32_t *)reg) - -#define WRITE_REG32(reg,value) (*(__IO uint32_t *)reg = value) - -#define MODIFY_REG32(reg,clear_mask,set_mask) \ - WRITE_REG32(reg, (((READ_REG32(reg)) & ~clear_mask) | set_mask ) ) - - -#define uDELAY(usec) udelay(usec) -#define mDELAY(msec) uDELAY(msec * 1000) - -#define _OTGD_FS_GATE_PHYCLK *(__IO uint32_t*)(0x50000E00) = 0x03 -#define _OTGD_FS_UNGATE_PHYCLK *(__IO uint32_t*)(0x50000E00) = 0x00 - -/******************************************************************************* - this can be changed for real time base -*******************************************************************************/ -static void udelay (const uint32_t usec) -{ - uint32_t count = 0; - const uint32_t utime = usec * 10; - do - { - if ( ++count > utime ) - { - return ; - } - } - while (1); -} -/******************************************************************************** - EXPORTED FUNCTIONS FROM THE OTGD_FS_CAL LAYER -********************************************************************************/ -USB_OTG_Status OTGD_FS_CoreInit(void); -USB_OTG_Status OTGD_FS_SetAddress(uint32_t BaseAddress); -USB_OTG_Status OTGD_FS_EnableGlobalInt(void); -USB_OTG_Status OTGD_FS_DisableGlobalInt(void); - -USB_OTG_Status USB_OTG_CoreInitHost(void); -USB_OTG_Status USB_OTG_EnableHostInt(void); -USB_OTG_Status USB_OTG_DisableHostInt(void); - -void* OTGD_FS_ReadPacket(uint8_t *dest, uint16_t bytes); -USB_OTG_Status OTGD_FS_WritePacket(uint8_t *src, uint8_t ch_ep_num, uint16_t bytes); - -USB_OTG_Status USB_OTG_HcInit(USB_OTG_HC *hc); -USB_OTG_Status USB_OTG_StartXfer(USB_OTG_HC *hc); - -uint32_t USB_OTG_ResetPort( void); - -uint32_t USB_OTG_ReadHPRT0(void); -uint32_t OTGD_FS_ReadDevAllInEPItr(void); -uint32_t OTGD_FS_ReadCoreItr(void); -uint32_t OTGD_FS_ReadOtgItr (void); -uint32_t USB_OTG_ReadHostAllChannels_intr (void); -uint8_t IsHostMode(void); -uint8_t IsDeviceMode(void); -USB_OTG_Status USB_OTG_HcInit(USB_OTG_HC *hc); -USB_OTG_Status USB_OTG_HcHalt(uint8_t hc_num); - -USB_OTG_Status OTGD_FS_FlushTxFifo (uint32_t num); -USB_OTG_Status OTGD_FS_FlushRxFifo (void); -USB_OTG_Status OTGD_FS_SetHostMode (void); - -USB_OTG_Status OTGD_FS_PhyInit(void); -USB_OTG_Status USB_OTG_HcStartXfer(USB_OTG_HC *hc); - -USB_OTG_Status OTGD_FS_CoreInitDev (void); -USB_OTG_Status OTGD_FS_EnableDevInt(void); -USB_OTG_Status OTGD_FS_EP0Activate(void); -USB_OTG_Status OTGD_FS_EPActivate(USB_OTG_EP *ep); -USB_OTG_Status OTGD_FS_EPDeactivate(USB_OTG_EP *ep); - -USB_OTG_Status OTGD_FS_EPStartXfer(USB_OTG_EP *ep); -USB_OTG_Status OTGD_FS_EP0StartXfer(USB_OTG_EP *ep); - -USB_OTG_Status OTGD_FS_EPSetStall(USB_OTG_EP *ep); -USB_OTG_Status OTGD_FS_EPClearStall(USB_OTG_EP *ep); -uint32_t OTGD_FS_ReadDevAllOutEp_itr(void); -uint32_t OTGD_FS_ReadDevOutEP_itr(USB_OTG_EP *ep); -uint32_t OTGD_FS_ReadDevAllInEPItr(void); - - -uint32_t OTGD_FS_Dev_GetEPStatus(USB_OTG_EP *ep); -void OTGD_FS_Dev_SetEPStatus(USB_OTG_EP *ep, uint32_t Status); -void OTGD_FS_Dev_SetRemoteWakeup(void); -void OTGD_FS_Dev_ResetRemoteWakeup(void); - -#endif /* STM32F10X_CL */ - -#endif -/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/ - diff --git a/bsp/stm32_radio/Libraries/STM32_USB-FS-Device_Driver/inc/otgd_fs_dev.h b/bsp/stm32_radio/Libraries/STM32_USB-FS-Device_Driver/inc/otgd_fs_dev.h deleted file mode 100644 index e3f2a52a10..0000000000 --- a/bsp/stm32_radio/Libraries/STM32_USB-FS-Device_Driver/inc/otgd_fs_dev.h +++ /dev/null @@ -1,121 +0,0 @@ -/******************** (C) COPYRIGHT 2009 STMicroelectronics ******************** -* File Name : otg_dev.h -* Author : STMicroelectronics -* Version : V3.1.0 -* Date : 10/30/2009 -* Description : linking defines -******************************************************************************** -* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS -* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. -* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, -* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE -* CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING -* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __OTG_DEV_H__ -#define __OTG_DEV_H__ - -#ifdef STM32F10X_CL - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x.h" -#include "usb_type.h" - -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ - -/* Endpoint types */ -#define OTG_DEV_EP_TYPE_CONTROL 0 -#define OTG_DEV_EP_TYPE_ISOC 1 -#define OTG_DEV_EP_TYPE_BULK 2 -#define OTG_DEV_EP_TYPE_INT 3 - -/* Endpoint Addresses (w/direction) */ -#define EP0_OUT 0x00 -#define EP0_IN 0x80 -#define EP1_OUT 0x01 -#define EP1_IN 0x81 -#define EP2_OUT 0x02 -#define EP2_IN 0x82 -#define EP3_OUT 0x03 -#define EP3_IN 0x83 - - -/*-*-*-*-*-*-*-*-*-* Replace the usb_regs.h defines -*-*-*-*-*-*-*-*-*-*-*-*-*/ -/* endpoints enumeration */ -#define ENDP0 ((uint8_t)0) -#define ENDP1 ((uint8_t)1) -#define ENDP2 ((uint8_t)2) -#define ENDP3 ((uint8_t)3) -#define ENDP4 ((uint8_t)4) -#define ENDP5 ((uint8_t)5) -#define ENDP6 ((uint8_t)6) -#define ENDP7 ((uint8_t)7) - -/* EP Transmit status defines */ -#define EP_TX_DIS DEV_EP_TX_DIS) /* EndPoint TX DISabled */ -#define EP_TX_STALL DEV_EP_TX_STALL /* EndPoint TX STALLed */ -#define EP_TX_NAK DEV_EP_TX_NAK /* EndPoint TX NAKed */ -#define EP_TX_VALID DEV_EP_TX_VALID /* EndPoint TX VALID */ - -/* EP Transmit status defines */ -#define EP_RX_DIS DEV_EP_RX_DIS /* EndPoint RX DISabled */ -#define EP_RX_STALL DEV_EP_RX_STALL /* EndPoint RX STALLed */ -#define EP_RX_NAK DEV_EP_RX_NAK /* EndPoint RX NAKed */ -#define EP_RX_VALID DEV_EP_RX_VALID /* EndPoint RX VALID */ -/*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/ - -/* Exported macro ------------------------------------------------------------*/ -#define _GetEPTxStatus(bEpNum) ((uint16_t)OTG_DEV_GetEPTxStatus(bEpNum)) -#define _GetEPRxStatus(bEpNum) ((uint16_t)OTG_DEV_GetEPRxStatus(bEpNum)) - -#define _SetEPTxStatus(bEpNum,wState) (OTG_DEV_SetEPTxStatus(bEpNum, wState)) -#define _SetEPRxStatus(bEpNum,wState) (OTG_DEV_SetEPRxStatus(bEpNum, wState)) - -#define _SetEPTxValid(bEpNum) (OTG_DEV_SetEPTxStatus(bEpNum, EP_TX_VALID)) -#define _SetEPRxValid(bEpNum) (OTG_DEV_SetEPRxStatus(bEpNum, EP_RX_VALID)) - -#define _GetTxStallStatus(bEpNum) (OTG_DEV_GetEPTxStatus(bEpNum) == EP_TX_STALL) -#define _GetRxStallStatus(bEpNum) (OTG_DEV_GetEPRxStatus(bEpNum) == EP_RX_STALL) - -/* Define the callbacks for updating the USB state machine */ -#define OTGD_FS_DEVICE_RESET Device_Property.Reset() - -/* Exported define -----------------------------------------------------------*/ -/* Exported functions ------------------------------------------------------- */ - -void OTG_DEV_Init(void); -void OTG_DEV_EP_Init(uint8_t bEpAdd, uint8_t bEpType, uint16_t wEpMaxPackSize); - -void OTG_DEV_SetEPRxStatus(uint8_t bEpnum, uint32_t status); -void OTG_DEV_SetEPTxStatus(uint8_t bEpnum, uint32_t status); -uint32_t OTG_DEV_GetEPRxStatus(uint8_t bEpnum); -uint32_t OTG_DEV_GetEPTxStatus(uint8_t bEpnum); - -void USB_DevDisconnect(void); -void USB_DevConnect(void); - - -/*-*-*-*-*-*-*-*-*-* Replace the usb_regs.h prototypes *-*-*-*-*-*-*-*-*-*-*-*/ -void SetEPTxStatus(uint8_t bEpNum, uint16_t wState); -void SetEPRxStatus(uint8_t bEpNum, uint16_t wState); -uint16_t GetEPTxStatus(uint8_t bEpNum); -uint16_t GetEPRxStatus(uint8_t bEpNum); -void SetEPTxValid(uint8_t bEpNum); -void SetEPRxValid(uint8_t bEpNum); -uint16_t GetTxStallStatus(uint8_t bEpNum); -uint16_t GetRxStallStatus(uint8_t bEpNum); -void SetEPTxCount(uint8_t bEpNum, uint16_t wCount); -void SetEPRxCount(uint8_t bEpNum, uint16_t wCount); - -uint16_t ToWord(uint8_t, uint8_t); -uint16_t ByteSwap(uint16_t); -/*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/ - -#endif /* STM32F10X_CL */ - -#endif /* __OTG_DEV_H__ */ -/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/ - diff --git a/bsp/stm32_radio/Libraries/STM32_USB-FS-Device_Driver/inc/otgd_fs_int.h b/bsp/stm32_radio/Libraries/STM32_USB-FS-Device_Driver/inc/otgd_fs_int.h deleted file mode 100644 index fab816412a..0000000000 --- a/bsp/stm32_radio/Libraries/STM32_USB-FS-Device_Driver/inc/otgd_fs_int.h +++ /dev/null @@ -1,54 +0,0 @@ -/******************** (C) COPYRIGHT 2009 STMicroelectronics ******************** -* File Name : otgd_fs_int.h -* Author : MCD Application Team -* Version : V3.1.0 -* Date : 10/30/2009 -* Description : Endpoint interrupt's service routines prototypes. -******************************************************************************** -* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS -* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. -* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, -* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE -* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING -* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __USB_INT_H -#define __USB_INT_H - -/* Includes ------------------------------------------------------------------*/ -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ -/* Exported macro ------------------------------------------------------------*/ -/* Exported functions ------------------------------------------------------- */ - -#ifdef STM32F10X_CL - -/* Interrupt Handlers functions */ -uint32_t OTGD_FS_Handle_ModeMismatch_ISR(void); -uint32_t OTGD_FS_Handle_Sof_ISR(void); -uint32_t OTGD_FS_Handle_RxStatusQueueLevel_ISR(void); -uint32_t OTGD_FS_Handle_NPTxFE_ISR(void); -uint32_t OTGD_FS_Handle_GInNakEff_ISR(void); -uint32_t OTGD_FS_Handle_GOutNakEff_ISR(void); -uint32_t OTGD_FS_Handle_EarlySuspend_ISR(void); -uint32_t OTGD_FS_Handle_USBSuspend_ISR(void); -uint32_t OTGD_FS_Handle_UsbReset_ISR(void); -uint32_t OTGD_FS_Handle_EnumDone_ISR(void); -uint32_t OTGD_FS_Handle_IsoOutDrop_ISR(void); -uint32_t OTGD_FS_Handle_EOPF_ISR(void); -uint32_t OTGD_FS_Handle_EPMismatch_ISR(void); -uint32_t OTGD_FS_Handle_InEP_ISR(void); -uint32_t OTGD_FS_Handle_OutEP_ISR(void); -uint32_t OTGD_FS_Handle_IncomplIsoIn_ISR(void); -uint32_t OTGD_FS_Handle_IncomplIsoOut_ISR(void); -uint32_t OTGD_FS_Handle_Wakeup_ISR(void); - -#endif /* STM32F10X_CL */ - -/* External variables --------------------------------------------------------*/ - -#endif /* __USB_INT_H */ - -/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/Libraries/STM32_USB-FS-Device_Driver/inc/otgd_fs_pcd.h b/bsp/stm32_radio/Libraries/STM32_USB-FS-Device_Driver/inc/otgd_fs_pcd.h deleted file mode 100644 index 1ae359b6db..0000000000 --- a/bsp/stm32_radio/Libraries/STM32_USB-FS-Device_Driver/inc/otgd_fs_pcd.h +++ /dev/null @@ -1,87 +0,0 @@ -/******************** (C) COPYRIGHT 2009 STMicroelectronics ******************** -* File Name : otgd_fs_pcd.h -* Author : MCD Application Team -* Version : V3.1.0 -* Date : 10/30/2009 -* Description : Header file of the High Layer device mode interface and -* wrapping layer -******************************************************************************** -* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS -* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. -* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, -* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE -* CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING -* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -#ifndef __USB_OTG_PCD_H__ -#define __USB_OTG_PCD_H__ - -#include "otgd_fs_regs.h" - -#define MAX_EP0_SIZE 0x40 -#define MAX_PACKET_SIZE 0x400 - - -#define USB_ENDPOINT_XFER_CONTROL 0 -#define USB_ENDPOINT_XFER_ISOC 1 -#define USB_ENDPOINT_XFER_BULK 2 -#define USB_ENDPOINT_XFER_INT 3 -#define USB_ENDPOINT_XFERTYPE_MASK 3 - - -/******************************************************************************** - ENUMERATION TYPE -********************************************************************************/ -enum usb_device_speed { - USB_SPEED_UNKNOWN = 0, - USB_SPEED_LOW, USB_SPEED_FULL, - USB_SPEED_HIGH -}; -/******************************************************************************** - Data structure type -********************************************************************************/ -typedef struct usb_ep_descriptor -{ - uint8_t bLength; - uint8_t bDescriptorType; - uint8_t bEndpointAddress; - uint8_t bmAttributes; - uint16_t wMaxPacketSize; - uint8_t bInterval; -} -EP_DESCRIPTOR , *PEP_DESCRIPTOR; -/******************************************************************************** - USBF LAYER UNION AND STRUCTURES -********************************************************************************/ -typedef struct USB_OTG_USBF -{ - - USB_OTG_EP ep0; - uint8_t ep0state; - USB_OTG_EP in_ep[ MAX_TX_FIFOS - 1]; - USB_OTG_EP out_ep[ MAX_TX_FIFOS - 1]; -} -USB_OTG_PCD_DEV , *USB_OTG_PCD_PDEV; -/******************************************************************************** - EXPORTED FUNCTION FROM THE USB_OTG LAYER -********************************************************************************/ -void OTGD_FS_PCD_Init(void); -void OTGD_FS_PCD_DevConnect (void); -void OTGD_FS_PCD_DevDisconnect (void); -void OTGD_FS_PCD_EP_SetAddress (uint8_t address); -uint32_t OTGD_FS_PCD_EP_Open(EP_DESCRIPTOR *epdesc); -uint32_t OTGD_FS_PCD_EP_Close ( uint8_t ep_addr); -uint32_t OTGD_FS_PCD_EP_Read ( uint8_t ep_addr, uint8_t *pbuf, uint32_t buf_len); -uint32_t OTGD_FS_PCD_EP_Write ( uint8_t ep_addr, uint8_t *pbuf, uint32_t buf_len); -uint32_t OTGD_FS_PCD_EP_Stall (uint8_t epnum); -uint32_t OTGD_FS_PCD_EP_ClrStall (uint8_t epnum); -uint32_t OTGD_FS_PCD_EP_Flush (uint8_t epnum); -uint32_t OTGD_FS_PCD_Handle_ISR(void); - -USB_OTG_EP* OTGD_FS_PCD_GetOutEP(uint32_t ep_num) ; -USB_OTG_EP* OTGD_FS_PCD_GetInEP(uint32_t ep_num); -void OTGD_FS_PCD_EP0_OutStart(void); - -#endif -/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/Libraries/STM32_USB-FS-Device_Driver/inc/otgd_fs_regs.h b/bsp/stm32_radio/Libraries/STM32_USB-FS-Device_Driver/inc/otgd_fs_regs.h deleted file mode 100644 index b46c9d76d7..0000000000 --- a/bsp/stm32_radio/Libraries/STM32_USB-FS-Device_Driver/inc/otgd_fs_regs.h +++ /dev/null @@ -1,1597 +0,0 @@ -/******************** (C) COPYRIGHT 2009 STMicroelectronics ******************** -* File Name : otgd_fs_regs.h -* Author : STMicroelectronics -* Version : V3.1.0 -* Date : 10/30/2009 -* Description : USB OTG IP hardware registers. -******************************************************************************** -* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS -* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. -* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, -* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE -* CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING -* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -#ifndef __USB_OTG_REGS_H__ -#define __USB_OTG_REGS_H__ - -#ifdef STM32F10X_CL - -#include "stm32f10x.h" -#include "usb_type.h" - -#define USB_OTG_FS1_BASE_ADDR 0x50000000 - -#define USB_OTG_CORE_GLOBAL_REGS_OFFSET 0x000 -#define USB_OTG_DEV_GLOBAL_REG_OFFSET 0x800 -#define USB_OTG_DEV_IN_EP_REG_OFFSET 0x900 -#define USB_OTG_EP_REG_OFFSET 0x20 -#define USB_OTG_DEV_OUT_EP_REG_OFFSET 0xB00 -#define USB_OTG_HOST_GLOBAL_REG_OFFSET 0x400 -#define USB_OTG_HOST_PORT_REGS_OFFSET 0x440 -#define USB_OTG_HOST_CHAN_REGS_OFFSET 0x500 -#define USB_OTG_CHAN_REGS_OFFSET 0x20 -#define USB_OTG_PCGCCTL_OFFSET 0xE00 -#define USB_OTG_DATA_FIFO_OFFSET 0x1000 -#define USB_OTG_DATA_FIFO_SIZE 0x1000 - -#define MAX_PERIO_FIFOS 8 -#define MAX_TX_FIFOS 4 -#define MAX_EPS_CHANNELS 8 - -#define DEV_NP_TX_FIFO_SIZE 160 -#define RX_FIFO_SIZE 160 -#define TX_FIFO_SIZE 160 - -/******************************************************************************* - * USB_OTG Core registers . - * The USB_OTG_core_regs structure defines the size - * and relative field offsets for the Core Global registers. - ******************************************************************************/ -typedef struct _USB_OTG_common_regs //000h -{ - - __IO uint32_t otg_ctl; /* USB_OTG Control and Status Register 000h*/ - __IO uint32_t otg_int; /* USB_OTG Interrupt Register 004h*/ - __IO uint32_t ahb_cfg; /* Core AHB Configuration Register 008h*/ - __IO uint32_t usb_cfg; /* Core USB Configuration Register 00Ch*/ - __IO uint32_t rst_ctl; /* Core Reset Register 010h*/ - __IO uint32_t int_sts; /* Core Interrupt Register 014h*/ - __IO uint32_t int_msk; /* Core Interrupt Mask Register 018h*/ - __IO uint32_t rx_stsr; /* Receive Sts Q Read Register 01Ch*/ - __IO uint32_t rx_stsp; /* Receive Sts Q Read & POP Register 020h*/ - __IO uint32_t rx_fifo_siz; /* Receive FIFO Size Register 024h*/ - __IO uint32_t np_tx_fifo_siz; /* Non Periodic Tx FIFO Size Register 028h*/ - __IO uint32_t np_tx_sts; /* Non Periodic Tx FIFO/Queue Sts reg 02Ch*/ - __IO uint32_t i2c_ctl; /* I2C Access Register 030h*/ - __IO uint32_t phy_vnd_ctl; /* PHY Vendor Control Register 034h*/ - __IO uint32_t gpio; /* General Purpose IO Register 038h*/ - __IO uint32_t usr_id; /* User ID Register 03Ch*/ - __IO uint32_t snps_id; /* Synopsys ID Register 040h*/ - __IO uint32_t hw_cfg1; /* User HW Config1 Register (RO) 044h*/ - __IO uint32_t hw_cfg2; /* User HW Config2 Register (RO) 048h*/ - __IO uint32_t hw_cfg3; /* User HW Config3 Register (RO) 04Ch*/ - __IO uint32_t hw_cfg4; /* User HW Config4 Register (RO) 050h*/ - uint32_t reserved[43]; /* Reserved 054h-0FFh*/ - __IO uint32_t host_p_tx_fifo_siz; /* Host Periodic Tx FIFO Size Reg 100h*/ - __IO uint32_t dev_p_tx_fsiz_dieptxf[15];/* dev Periodic Transmit FIFO */ - -} -USB_OTG_common_regs; - -/******************************************************************************* - * dev Registers - * dev Global Registers : Offsets 800h-BFFh - * The following structures define the size and relative field offsets - * for the dev Mode Registers. - * These registers are visible only in dev mode and must not be - * accessed in Host mode, as the results are unknown - ******************************************************************************/ -typedef struct _USB_OTG_dev_regs // 800h -{ - - __IO uint32_t dev_cfg; /* dev Configuration Register 800h*/ - __IO uint32_t dev_ctl; /* dev Control Register 804h*/ - __IO uint32_t dev_sts; /* dev Status Register (RO) 808h*/ - uint32_t reserved3; /* Reserved 80Ch*/ - __IO uint32_t dev_in_ep_msk; /* dev IN Endpoint Mask 810h*/ - __IO uint32_t dev_out_ep_msk; /* dev OUT Endpoint Mask 814h*/ - __IO uint32_t dev_all_int; /* dev All Endpoints Itr Reg 818h*/ - __IO uint32_t dev_all_int_msk; /* dev All Endpoints Itr Mask 81Ch*/ - uint32_t Reserved8; /* Reserved 820h*/ - __IO uint32_t Reserved9; /* Reserved 824h*/ - __IO uint32_t dev_vbus_dis; /* dev VBUS discharge Register 828h*/ - __IO uint32_t dev_vbus_pulse; /* dev VBUS Pulse Register 82Ch*/ - __IO uint32_t dev_thr_ctl; /* dev thr 830h*/ - __IO uint32_t dev_fifo_empty_msk; /* dev empty msk 834h*/ - -} -USB_OTG_dev_regs; -/******************************************************************************* - * dev Logical IN Endpoint-Specific Registers: Offsets 900h-AFCh - * There will be one set of endpoint registers per logical endpointimplemented. - * These registers are visible only in dev mode and must not be - * accessed in Host mode, as the results are unknown -*******************************************************************************/ -typedef struct _USB_OTG_dev_in_ep_regs -{ - __IO uint32_t dev_in_ep_ctl; /* dev IN Endpoint Control Reg 900h + (ep_num * 20h) + 00h*/ - uint32_t reserved04; /* Reserved 900h + (ep_num * 20h) + 04h*/ - __IO uint32_t dev_in_ep_int; /* dev IN Endpoint Itr Reg 900h + (ep_num * 20h) + 08h*/ - uint32_t reserved0C; /* Reserved 900h + (ep_num * 20h) + 0Ch*/ - __IO uint32_t dev_in_ep_txfer_siz; /* IN Endpoint Txfer Size 900h + (ep_num * 20h) + 10h*/ - __IO uint32_t dev_in_ep_dma; /* IN Endpoint DMA Address Reg 900h + (ep_num * 20h) + 14h*/ - __IO uint32_t dev_tx_fifo_sts;/*IN Endpoint Tx FIFO Status Reg 900h + (ep_num * 20h) + 18h*/ - uint32_t reserved18; /* Reserved 900h+(ep_num*20h)+1Ch-900h+ (ep_num * 20h) + 1Ch*/ - -} -USB_OTG_dev_in_ep_regs; - -/******************************************************************************* - * dev Logical OUT Endpoint-Specific Registers Offsets: B00h-CFCh - * There will be one set of endpoint registers per logical endpoint - * implemented. - * These registers are visible only in dev mode and must not be - * accessed in Host mode, as the results are unknown -******************************************************************************/ -typedef struct _USB_OTG_dev_out_ep_regs -{ - __IO uint32_t dev_out_ep_ctl; /* dev OUT Endpoint Control Reg B00h + (ep_num * 20h) + 00h*/ - __IO uint32_t dev_out_ep_frm_nbr; /* dev OUT Endpoint Frame number B00h + (ep_num * 20h) + 04h*/ - __IO uint32_t dev_out_ep_int; /* dev OUT Endpoint Itr Reg B00h + (ep_num * 20h) + 08h*/ - uint32_t reserved0C; /* Reserved B00h + (ep_num * 20h) + 0Ch*/ - __IO uint32_t dev_out_ep_txfer_siz; /* dev OUT Endpoint Txfer Size B00h + (ep_num * 20h) + 10h*/ - __IO uint32_t dev_out_ep_dma; /* dev OUT Endpoint DMA Address B00h + (ep_num * 20h) + 14h*/ - uint32_t reserved18[2]; /* Reserved B00h + (ep_num * 20h) + 18h - B00h + (ep_num * 20h) + 1Ch*/ - -} -USB_OTG_dev_out_ep_regs; -/******************************************************************************* - * Host Mode Register Structures - * The Host Global Registers structure defines the size and relative - * field offsets for the Host Mode Global Registers. - * Host Global Registers offsets 400h-7FFh. -*******************************************************************************/ -typedef struct _USB_OTG_host_regs -{ - __IO uint32_t host_cfg; /* Host Configuration Register 400h*/ - __IO uint32_t host_frm_intrvl; /* Host Frame Interval Register 404h*/ - __IO uint32_t host_frm_nbr; /* Host Frame Nbr/Frame Remaining 408h*/ - uint32_t reserved40C; /* Reserved 40Ch*/ - __IO uint32_t host_p_tx_sts; /* Host Periodic Tx FIFO/ Queue Status 410h*/ - __IO uint32_t host_all_int; /* Host All Channels Interrupt Register 414h*/ - __IO uint32_t host_all_int_msk; /* Host All Channels Interrupt Mask 418h*/ - -} -USB_OTG_host_regs; - -/******************************************************************************* -* Host Channel Specific Registers 500h-5FCh -*******************************************************************************/ -typedef struct _USB_OTG_hc_regs -{ - - __IO uint32_t hc_char; - __IO uint32_t hc_split; - __IO uint32_t hc_int; - __IO uint32_t hc_int_msk; - __IO uint32_t hc_txfer_siz; - __IO uint32_t hc_dma; - uint32_t reserved[2]; - -} -USB_OTG_hc_regs; -/******************************************************************************* - * otg Core registers . - * The USB_OTG_core_regs structure defines the size - * and relative field offsets for the Core Global registers. - ******************************************************************************/ -typedef struct USB_OTG_core_regs //000h -{ - USB_OTG_common_regs *common_regs; - USB_OTG_dev_regs *dev_regs; - USB_OTG_host_regs *host_regs; - USB_OTG_dev_in_ep_regs *inep_regs[MAX_EPS_CHANNELS]; - USB_OTG_dev_out_ep_regs *outep_regs[MAX_EPS_CHANNELS]; - USB_OTG_hc_regs *hc_regs[MAX_EPS_CHANNELS]; - __IO uint32_t *hprt0; - __IO uint32_t *data_fifo[MAX_EPS_CHANNELS]; - __IO uint32_t *pcgcctl; - -} -USB_OTG_CORE_REGS , *pUSB_OTG_CORE_REGS; -/******************************************************************************/ - -typedef union _USB_OTG_OTG_ctl_data -{ - uint32_t d32; - struct - { -uint32_t sesreqscs : - 1; -uint32_t sesreq : - 1; -uint32_t reserved2_7 : - 6; -uint32_t hstnegscs : - 1; -uint32_t hnpreq : - 1; -uint32_t hstsethnpen : - 1; -uint32_t devhnpen : - 1; -uint32_t reserved12_15 : - 4; -uint32_t conidsts : - 1; -uint32_t reserved17 : - 1; -uint32_t asesvld : - 1; -uint32_t bsesvld : - 1; -uint32_t currmod : - 1; -uint32_t reserved21_31 : - 11; - } - b; -} USB_OTG_OTG_ctl_data; - -/******************************************************************************/ - -typedef union _USB_OTG_OTG_int_data -{ - uint32_t d32; - struct - { -uint32_t reserved0_1 : - 2; -uint32_t sesenddet : - 1; -uint32_t reserved3_7 : - 5; -uint32_t sesreqsucstschng : - 1; -uint32_t hstnegsucstschng : - 1; -uint32_t reserver10_16 : - 7; -uint32_t hstnegdet : - 1; -uint32_t adevtoutchng : - 1; -uint32_t debdone : - 1; -uint32_t reserved31_20 : - 12; - } - b; -} USB_OTG_OTG_int_data; - - -/******************************************************************************/ - - -typedef union _USB_OTG_ahb_cfg_data -{ - uint32_t d32; - struct - { -uint32_t glblintrmsk : - 1; -uint32_t hburstlen : - 4; -uint32_t dmaenable : - 1; -uint32_t reserved : - 1; -uint32_t nptxfemplvl_txfemplvl : - 1; -uint32_t ptxfemplvl : - 1; -uint32_t reserved9_31 : - 23; - } - b; -} USB_OTG_ahb_cfg_data; - -/******************************************************************************/ - -typedef union _USB_OTG_usb_cfg_data -{ - uint32_t d32; - struct - { -uint32_t toutcal : - 3; -uint32_t phyif : - 1; -uint32_t ulpi_utmi_sel : - 1; -uint32_t fsintf : - 1; -uint32_t physel : - 1; -uint32_t ddrsel : - 1; -uint32_t srpcap : - 1; -uint32_t hnpcap : - 1; -uint32_t usbtrdtim : - 4; -uint32_t nptxfrwnden : - 1; -uint32_t phylpwrclksel : - 1; -uint32_t otgutmifssel : - 1; -uint32_t ulpi_fsls : - 1; -uint32_t ulpi_auto_res : - 1; -uint32_t ulpi_clk_sus_m : - 1; -uint32_t ulpi_ext_vbus_drv : - 1; -uint32_t ulpi_int_vbus_indicator : - 1; -uint32_t term_sel_dl_pulse : - 1; -uint32_t reserved : - 6; -uint32_t force_host : - 1; -uint32_t force_dev : - 1; -uint32_t corrupt_tx : - 1; - } - b; -} USB_OTG_usb_cfg_data; -/******************************************************************************/ - -typedef union _USB_OTG_rst_ctl_data -{ - uint32_t d32; - struct - { -uint32_t csftrst : - 1; -uint32_t hsftrst : - 1; -uint32_t hstfrm : - 1; -uint32_t intknqflsh : - 1; -uint32_t rxfflsh : - 1; -uint32_t txfflsh : - 1; -uint32_t txfnum : - 5; -uint32_t reserved11_29 : - 19; -uint32_t dmareq : - 1; -uint32_t ahbidle : - 1; - } - b; -} USB_OTG_rst_ctl_data; - -/******************************************************************************/ - -typedef union _USB_OTG_int_msk_data -{ - uint32_t d32; - struct - { -uint32_t reserved0 : - 1; -uint32_t modemismatch : - 1; -uint32_t otgintr : - 1; -uint32_t sofintr : - 1; -uint32_t rxstsqlvl : - 1; -uint32_t nptxfempty : - 1; -uint32_t ginnakeff : - 1; -uint32_t goutnakeff : - 1; -uint32_t reserved8 : - 1; -uint32_t i2cintr : - 1; -uint32_t erlysuspend : - 1; -uint32_t usbsuspend : - 1; -uint32_t usbreset : - 1; -uint32_t enumdone : - 1; -uint32_t isooutdrop : - 1; -uint32_t eopframe : - 1; -uint32_t reserved16 : - 1; -uint32_t epmismatch : - 1; -uint32_t inepintr : - 1; -uint32_t outepintr : - 1; -uint32_t incomplisoin : - 1; -uint32_t incomplisoout : - 1; -uint32_t reserved22_23 : - 2; -uint32_t portintr : - 1; -uint32_t hcintr : - 1; -uint32_t ptxfempty : - 1; -uint32_t reserved27 : - 1; -uint32_t conidstschng : - 1; -uint32_t disconnect : - 1; -uint32_t sessreqintr : - 1; -uint32_t wkupintr : - 1; - } - b; -} USB_OTG_int_msk_data; - -/******************************************************************************/ - - -typedef union _USB_OTG_int_sts_data -{ - uint32_t d32; - struct - { -uint32_t curmode : - 1; -uint32_t modemismatch : - 1; -uint32_t otgintr : - 1; -uint32_t sofintr : - 1; -uint32_t rxstsqlvl : - 1; -uint32_t nptxfempty : - 1; -uint32_t ginnakeff : - 1; -uint32_t goutnakeff : - 1; -uint32_t reserved8 : - 1; -uint32_t i2cintr : - 1; -uint32_t erlysuspend : - 1; -uint32_t usbsuspend : - 1; -uint32_t usbreset : - 1; -uint32_t enumdone : - 1; -uint32_t isooutdrop : - 1; -uint32_t eopframe : - 1; -uint32_t intokenrx : - 1; -uint32_t epmismatch : - 1; -uint32_t inepint: - 1; -uint32_t outepintr : - 1; -uint32_t incomplisoin : - 1; -uint32_t incomplisoout : - 1; -uint32_t reserved22_23 : - 2; -uint32_t portintr : - 1; -uint32_t hcintr : - 1; -uint32_t ptxfempty : - 1; -uint32_t reserved27 : - 1; -uint32_t conidstschng : - 1; -uint32_t disconnect : - 1; -uint32_t sessreqintr : - 1; -uint32_t wkupintr : - 1; - } - b; -} USB_OTG_int_sts_data; - -/******************************************************************************/ -typedef union _USB_OTG_dev_rx_sts_data -{ - - uint32_t d32; - struct - { -uint32_t epnum : - 4; -uint32_t bcnt : - 11; -uint32_t dpid : - 2; -uint32_t pktsts : - 4; -uint32_t fn : - 4; -uint32_t reserved : - 7; - } - b; -} USB_OTG_dev_rx_sts_data; - -/******************************************************************************/ -typedef union _USB_OTG_host_rx_sts_data -{ - - uint32_t d32; - struct - { -uint32_t chnum : - 4; -uint32_t bcnt : - 11; -uint32_t dpid : - 2; -uint32_t pktsts : - 4; -uint32_t reserved : - 11; - } - b; -} USB_OTG_host_rx_sts_data; - -/******************************************************************************/ - -typedef union _USB_OTG_fifo_size_data -{ - uint32_t d32; - struct - { -uint32_t startaddr : - 16; -uint32_t depth : - 16; - } - b; -} USB_OTG_fifo_size_data; - -/******************************************************************************/ - -typedef union _USB_OTG_np_tx_sts_data -{ - uint32_t d32; - struct - { -uint32_t nptxfspcavail : - 16; -uint32_t nptxqspcavail : - 8; -uint32_t nptxqtop_terminate : - 1; -uint32_t nptxqtop_token : - 2; -uint32_t nptxqtop_chnep : - 4; -uint32_t reserved : - 1; - } - b; -} USB_OTG_np_tx_sts_data; - -/******************************************************************************/ - -typedef union _USB_OTG_dev_tx_fifo_sts_data -{ - uint32_t d32; - struct - { -uint32_t txfspcavail : - 16; -uint32_t reserved : - 16; - } - b; -} USB_OTG_dev_tx_fifo_sts_data; - -/******************************************************************************/ -typedef union _USB_OTG_i2c_ctl_data -{ - - uint32_t d32; - struct - { -uint32_t rwdata : - 8; -uint32_t regaddr : - 8; -uint32_t addr : - 7; -uint32_t i2cen : - 1; -uint32_t ack : - 1; -uint32_t i2csuspctl : - 1; -uint32_t i2cdevaddr : - 2; -uint32_t dat_se0: - 1; -uint32_t reserved : - 1; -uint32_t rw : - 1; -uint32_t bsydne : - 1; - } - b; -} USB_OTG_i2c_ctl_data; - -/******************************************************************************/ - -typedef union _USB_OTG_gpio_data -{ - - uint32_t d32; - struct - { - /* input */ -uint32_t ovrcur : - 1; -uint32_t otgid : - 1; -uint32_t reserved_in : - 14; - /* Output */ -uint32_t pwdn : - 1; -uint32_t i2cifen : - 1; -uint32_t vbussensingA : - 1; -uint32_t vbussensingB : - 1; -uint32_t SOFouten : - 1; -uint32_t reserved_out : - 11; - } - b; -} USB_OTG_gpio_data; - - -/******************************************************************************/ - -typedef union _USB_OTG_hw_cfg1_data -{ - - uint32_t d32; - struct - { -uint32_t ep_dir0 : - 2; -uint32_t ep_dir1 : - 2; -uint32_t ep_dir2 : - 2; -uint32_t ep_dir3 : - 2; -uint32_t ep_dir4 : - 2; -uint32_t ep_dir5 : - 2; -uint32_t ep_dir6 : - 2; -uint32_t ep_dir7 : - 2; -uint32_t ep_dir8 : - 2; -uint32_t ep_dir9 : - 2; -uint32_t ep_dir10 : - 2; -uint32_t ep_dir11 : - 2; -uint32_t ep_dir12 : - 2; -uint32_t ep_dir13 : - 2; -uint32_t ep_dir14 : - 2; -uint32_t ep_dir15 : - 2; - } - b; -} USB_OTG_hw_cfg1_data; - -/******************************************************************************/ -typedef union _USB_OTG_hw_cfg2_data -{ - uint32_t d32; - struct - { -uint32_t op_mode : - 3; -uint32_t architecture : - 2; -uint32_t point2point : - 1; -uint32_t hs_phy_type : - 2; -uint32_t fs_phy_type : - 2; -uint32_t num_dev_ep : - 4; -uint32_t num_host_chan : - 4; -uint32_t perio_ep_supported : - 1; -uint32_t dynamic_fifo : - 1; -uint32_t rx_status_q_depth : - 2; -uint32_t nonperio_tx_q_depth : - 2; -uint32_t host_perio_tx_q_depth : - 2; -uint32_t dev_token_q_depth : - 5; -uint32_t reserved31 : - 1; - } - b; -} USB_OTG_hw_cfg2_data; - -/******************************************************************************/ - -typedef union _USB_OTG_hw_cfg3_data -{ - - uint32_t d32; - struct - { -uint32_t xfer_size_cntr_width : - 4; -uint32_t packet_size_cntr_width : - 3; -uint32_t otg_func : - 1; -uint32_t i2c : - 1; -uint32_t vendor_ctrl_if : - 1; -uint32_t optional_features : - 1; -uint32_t synch_reset_type : - 1; -uint32_t ahb_phy_clock_synch : - 1; -uint32_t reserved15_13 : - 3; -uint32_t dfifo_depth : - 16; - } - b; -} USB_OTG_hw_cfg3_data; - -/******************************************************************************/ - -typedef union _USB_OTG_hw_cfg4_data -{ - uint32_t d32; - struct - { -uint32_t num_dev_perio_in_ep : - 4; -uint32_t power_optimiz : - 1; -uint32_t min_ahb_freq : - 9; -uint32_t utmi_phy_data_width : - 2; -uint32_t num_dev_mode_ctrl_ep : - 4; -uint32_t iddig_filt_en : - 1; -uint32_t vbus_valid_filt_en : - 1; -uint32_t a_valid_filt_en : - 1; -uint32_t b_valid_filt_en : - 1; -uint32_t session_end_filt_en : - 1; -uint32_t ded_fifo_en : - 1; -uint32_t num_in_eps : - 4; -uint32_t reserved31_30 : - 2; - } - b; -} USB_OTG_hw_cfg4_data; - -/******************************************************************************/ -typedef union _USB_OTG_dev_cfg_data -{ - - uint32_t d32; - struct - { -uint32_t devspd : - 2; -uint32_t nzstsouthshk : - 1; -uint32_t reserved3 : - 1; -uint32_t devaddr : - 7; -uint32_t perfrint : - 2; -uint32_t reserved13_17 : - 5; -uint32_t epmscnt : - 4; - } - b; -} USB_OTG_dev_cfg_data; - -/******************************************************************************/ - -typedef union _USB_OTG_dev_ctl_data -{ - - uint32_t d32; - struct - { -uint32_t rmtwkupsig : - 1; -uint32_t sftdiscon : - 1; -uint32_t gnpinnaksts : - 1; -uint32_t goutnaksts : - 1; -uint32_t tstctl : - 3; -uint32_t sgnpinnak : - 1; -uint32_t cgnpinnak : - 1; -uint32_t sgoutnak : - 1; -uint32_t cgoutnak : - 1; -uint32_t reserved : - 21; - } - b; -} USB_OTG_dev_ctl_data; - -/******************************************************************************/ -typedef union _USB_OTG_dev_sts_data -{ - - uint32_t d32; - struct - { -uint32_t suspsts : - 1; -uint32_t enumspd : - 2; -uint32_t errticerr : - 1; -uint32_t reserved4_7: - 4; -uint32_t soffn : - 14; -uint32_t reserved22_31 : - 10; - } - b; -} USB_OTG_dev_sts_data; - -/******************************************************************************/ - -typedef union _USB_OTG_dev_in_ep_int_data -{ - - uint32_t d32; - struct - { -uint32_t xfercompl : - 1; -uint32_t epdisabled : - 1; -uint32_t ahberr : - 1; -uint32_t timeout : - 1; -uint32_t intktxfemp : - 1; -uint32_t intknepmis : - 1; -uint32_t inepnakeff : - 1; -uint32_t emptyintr : - 1; -uint32_t txfifoundrn : - 1; -uint32_t reserved08_31 : - 23; - } - b; -} USB_OTG_dev_in_ep_int_data; - -/******************************************************************************/ - -typedef union _USB_OTG_dev_in_ep_int_data USB_OTG_dev_in_ep_msk_data; -/******************************************************************************/ - -typedef union _USB_OTG_dev_out_ep_int_data -{ - - uint32_t d32; - struct - { -uint32_t xfercompl : - 1; -uint32_t epdisabled : - 1; -uint32_t ahberr : - 1; -uint32_t setup : - 1; -uint32_t reserved04_31 : - 28; - } - b; -} USB_OTG_dev_out_ep_int_data; - -/******************************************************************************/ - -typedef union _USB_OTG_dev_out_ep_int_data USB_OTG_dev_out_ep_msk_data; - -/******************************************************************************/ -typedef union _USB_OTG_dev_all_int_data -{ - - uint32_t d32; - struct - { -uint32_t in : - 16; -uint32_t out : - 16; - } - ep; - struct - { - /** IN Endpoint bits */ -uint32_t inep0 : - 1; -uint32_t inep1 : - 1; -uint32_t inep2 : - 1; -uint32_t inep3 : - 1; -uint32_t inep4 : - 1; -uint32_t inep5 : - 1; -uint32_t inep6 : - 1; -uint32_t inep7 : - 1; -uint32_t inep8 : - 1; -uint32_t inep9 : - 1; -uint32_t inep10 : - 1; -uint32_t inep11 : - 1; -uint32_t inep12 : - 1; -uint32_t inep13 : - 1; -uint32_t inep14 : - 1; -uint32_t inep15 : - 1; - /** OUT Endpoint bits */ -uint32_t outep0 : - 1; -uint32_t outep1 : - 1; -uint32_t outep2 : - 1; -uint32_t outep3 : - 1; -uint32_t outep4 : - 1; -uint32_t outep5 : - 1; -uint32_t outep6 : - 1; -uint32_t outep7 : - 1; -uint32_t outep8 : - 1; -uint32_t outep9 : - 1; -uint32_t outep10 : - 1; -uint32_t outep11 : - 1; -uint32_t outep12 : - 1; -uint32_t outep13 : - 1; -uint32_t outep14 : - 1; -uint32_t outep15 : - 1; - } - b; -} USB_OTG_dev_all_int_data; - -/******************************************************************************/ -typedef union _USB_OTG_token_qr1_data -{ - - uint32_t d32; - struct - { -uint32_t intknwptr : - 5; -uint32_t reserved05_06 : - 2; -uint32_t wrap_bit : - 1; -uint32_t epnums0_5 : - 24; - } - b; -} USB_OTG_token_qr1_data; - -/******************************************************************************/ - -typedef union _USB_OTG_dev_thr_ctl_data -{ - - uint32_t d32; - struct - { -uint32_t non_iso_thr_en : - 1; -uint32_t iso_thr_en : - 1; -uint32_t tx_thr_len : - 9; -uint32_t reserved11_15 : - 5; -uint32_t rx_thr_en : - 1; -uint32_t rx_thr_len : - 9; -uint32_t reserved26_31 : - 6; - } - b; -} USB_OTG_dev_thr_ctl_data; - -/******************************************************************************/ -typedef union _USB_OTG_dev_ep_ctl_data -{ - - uint32_t d32; - struct - { -uint32_t mps : - 11; -uint32_t nextep : - 4; -uint32_t usbactep : - 1; -uint32_t dpid : - 1; -uint32_t naksts : - 1; -uint32_t eptype : - 2; -uint32_t snp : - 1; -uint32_t stall : - 1; -uint32_t txfnum : - 4; -uint32_t cnak : - 1; -uint32_t snak : - 1; -uint32_t setd0pid : - 1; -uint32_t setd1pid : - 1; -uint32_t epdis : - 1; -uint32_t epena : - 1; - } - b; -} USB_OTG_dev_ep_ctl_data; - -/******************************************************************************/ - -typedef union _USB_OTG_dev_ep_txfer_siz_data -{ - - uint32_t d32; - struct - { -uint32_t xfersize : - 19; -uint32_t pktcnt : - 10; -uint32_t mc : - 2; -uint32_t reserved : - 1; - } - b; -} USB_OTG_dev_ep_txfer_siz_data; - -/******************************************************************************/ - -typedef union _USB_OTG_dev_ep_txfer_size0_data -{ - - uint32_t d32; - struct - { -uint32_t xfersize : - 7; -uint32_t reserved7_18 : - 12; -uint32_t pktcnt : - 1; -uint32_t reserved20_28 : - 9; -uint32_t supcnt : - 2; - uint32_t reserved31; - } - b; -} USB_OTG_dev_ep_txfer_size0_data; - -/******************************************************************************/ -typedef union _USB_OTG_host_cfg_data -{ - - uint32_t d32; - struct - { -uint32_t fslspclksel : - 2; -uint32_t fslssupp : - 1; - } - b; -} USB_OTG_host_cfg_data; - -/******************************************************************************/ - -typedef union _USB_OTG_Host_frm_intrvl_data -{ - uint32_t d32; - struct - { -uint32_t frint : - 16; -uint32_t reserved : - 16; - } - b; -} USB_OTG_Host_frm_intrvl_data; - -/******************************************************************************/ -#define HFNUM_MAX_FRNUM 0x3FFF -typedef union _USB_OTG_host_frm_nbr_data -{ - - uint32_t d32; - struct - { -uint32_t frnum : - 16; -uint32_t frrem : - 16; - } - b; -} USB_OTG_host_frm_nbr_data; - -/******************************************************************************/ - -typedef union _USB_OTG_host_perio_tx_sts_data -{ - - uint32_t d32; - struct - { -uint32_t ptxfspcavail : - 16; -uint32_t ptxqspcavail : - 8; -uint32_t ptxqtop_terminate : - 1; -uint32_t ptxqtop_token : - 2; -uint32_t ptxqtop_chnum : - 4; -uint32_t ptxqtop_odd : - 1; - } - b; -} USB_OTG_host_perio_tx_sts_data; - -/******************************************************************************/ -typedef union _USB_OTG_hprt0_data -{ - uint32_t d32; - struct - { -uint32_t prtconnsts : - 1; -uint32_t prtconndet : - 1; -uint32_t prtena : - 1; -uint32_t prtenchng : - 1; -uint32_t prtovrcurract : - 1; -uint32_t prtovrcurrchng : - 1; -uint32_t prtres : - 1; -uint32_t prtsusp : - 1; -uint32_t prtrst : - 1; -uint32_t reserved9 : - 1; -uint32_t prtlnsts : - 2; -uint32_t prtpwr : - 1; -uint32_t prttstctl : - 4; -uint32_t prtspd : - 2; -uint32_t reserved19_31 : - 13; - } - b; -} USB_OTG_hprt0_data; - -/******************************************************************************/ - -typedef union _USB_OTG_host_all_int_data -{ - uint32_t d32; - struct - { -uint32_t ch0 : - 1; -uint32_t ch1 : - 1; -uint32_t ch2 : - 1; -uint32_t ch3 : - 1; -uint32_t ch4 : - 1; -uint32_t ch5 : - 1; -uint32_t ch6 : - 1; -uint32_t ch7 : - 1; -uint32_t ch8 : - 1; -uint32_t ch9 : - 1; -uint32_t ch10 : - 1; -uint32_t ch11 : - 1; -uint32_t ch12 : - 1; -uint32_t ch13 : - 1; -uint32_t ch14 : - 1; -uint32_t ch15 : - 1; -uint32_t reserved : - 16; - } - b; - - struct - { -uint32_t chint : - 16; -uint32_t reserved : - 16; - } - b2; -} USB_OTG_host_all_int_data; - - -/******************************************************************************/ - -typedef union _USB_OTG_host_all_int_msk_data -{ - uint32_t d32; - struct - { -uint32_t ch0 : - 1; -uint32_t ch1 : - 1; -uint32_t ch2 : - 1; -uint32_t ch3 : - 1; -uint32_t ch4 : - 1; -uint32_t ch5 : - 1; -uint32_t ch6 : - 1; -uint32_t ch7 : - 1; -uint32_t ch8 : - 1; -uint32_t ch9 : - 1; -uint32_t ch10 : - 1; -uint32_t ch11 : - 1; -uint32_t ch12 : - 1; -uint32_t ch13 : - 1; -uint32_t ch14 : - 1; -uint32_t ch15 : - 1; -uint32_t reserved : - 16; - } - b; - - struct - { -uint32_t chint : - 16; -uint32_t reserved : - 16; - } - b2; -} USB_OTG_host_all_int_msk_data; - -/******************************************************************************/ - -typedef union _USB_OTG_hc_char_data -{ - - uint32_t d32; - struct - { -uint32_t mps : - 11; -uint32_t epnum : - 4; -uint32_t epdir : - 1; -uint32_t reserved : - 1; -uint32_t lspddev : - 1; -uint32_t eptype : - 2; -uint32_t multicnt : - 2; -uint32_t devaddr : - 7; -uint32_t oddfrm : - 1; -uint32_t chdis : - 1; -uint32_t chen : - 1; - } - b; -} USB_OTG_hc_char_data; - -/******************************************************************************/ -typedef union _USB_OTG_hc_splt_data -{ - - uint32_t d32; - struct - { -uint32_t prtaddr : - 7; -uint32_t hubaddr : - 7; -uint32_t xactpos : - 2; -uint32_t compsplt : - 1; -uint32_t reserved : - 14; -uint32_t spltena : - 1; - } - b; -} USB_OTG_hc_splt_data; - -/******************************************************************************/ - -typedef union _USB_OTG_hc_int_data -{ - uint32_t d32; - struct - { -uint32_t xfercomp : - 1; -uint32_t chhltd : - 1; -uint32_t ahberr : - 1; -uint32_t stall : - 1; -uint32_t nak : - 1; -uint32_t ack : - 1; -uint32_t nyet : - 1; -uint32_t xacterr : - 1; -uint32_t bblerr : - 1; -uint32_t frmovrun : - 1; -uint32_t datatglerr : - 1; -uint32_t reserved : - 21; - } - b; -} USB_OTG_hc_int_data; - -/******************************************************************************/ - - -typedef union _USB_OTG_hc_txfer_siz_data -{ - - uint32_t d32; - struct - { -uint32_t xfersize : - 19; -uint32_t pktcnt : - 10; -uint32_t pid : - 2; -uint32_t dopng : - 1; - } - b; -} USB_OTG_hc_txfer_siz_data; - -/******************************************************************************/ - -typedef union _USB_OTG_hc_int_msk_data -{ - - uint32_t d32; - struct - { -uint32_t xfercompl : - 1; -uint32_t chhltd : - 1; -uint32_t ahberr : - 1; -uint32_t stall : - 1; -uint32_t nak : - 1; -uint32_t ack : - 1; -uint32_t nyet : - 1; -uint32_t xacterr : - 1; -uint32_t bblerr : - 1; -uint32_t frmovrun : - 1; -uint32_t datatglerr : - 1; -uint32_t reserved : - 21; - } - b; -} USB_OTG_hc_int_msk_data; - -/******************************************************************************/ - -typedef union _USB_OTG_host_pcgcctl_data -{ - uint32_t d32; - struct - { -uint32_t stoppclk : - 1; -uint32_t gatehclk : - 1; -uint32_t pwrclmp : - 1; -uint32_t rstpdwnmodule : - 1; -uint32_t physuspended : - 1; -uint32_t reserved : - 27; - } - b; -} USB_OTG_host_pcgcctl_data; - -#endif /* STM32F10X_CL */ - -/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/ - -#endif diff --git a/bsp/stm32_radio/Libraries/STM32_USB-FS-Device_Driver/inc/usb_core.h b/bsp/stm32_radio/Libraries/STM32_USB-FS-Device_Driver/inc/usb_core.h deleted file mode 100644 index 4fa53c2c53..0000000000 --- a/bsp/stm32_radio/Libraries/STM32_USB-FS-Device_Driver/inc/usb_core.h +++ /dev/null @@ -1,243 +0,0 @@ -/******************** (C) COPYRIGHT 2009 STMicroelectronics ******************** -* File Name : usb_core.h -* Author : MCD Application Team -* Version : V3.1.0 -* Date : 10/30/2009 -* Description : Standard protocol processing functions prototypes -******************************************************************************** -* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS -* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. -* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, -* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE -* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING -* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __USB_CORE_H -#define __USB_CORE_H - -/* Includes ------------------------------------------------------------------*/ -/* Exported types ------------------------------------------------------------*/ -typedef enum _CONTROL_STATE -{ - WAIT_SETUP, /* 0 */ - SETTING_UP, /* 1 */ - IN_DATA, /* 2 */ - OUT_DATA, /* 3 */ - LAST_IN_DATA, /* 4 */ - LAST_OUT_DATA, /* 5 */ - WAIT_STATUS_IN, /* 7 */ - WAIT_STATUS_OUT, /* 8 */ - STALLED, /* 9 */ - PAUSE /* 10 */ -} CONTROL_STATE; /* The state machine states of a control pipe */ - -typedef struct OneDescriptor -{ - uint8_t *Descriptor; - uint16_t Descriptor_Size; -} -ONE_DESCRIPTOR, *PONE_DESCRIPTOR; -/* All the request process routines return a value of this type - If the return value is not SUCCESS or NOT_READY, - the software will STALL the correspond endpoint */ -typedef enum _RESULT -{ - USB_SUCCESS = 0, /* Process sucessfully */ - USB_ERROR, - USB_UNSUPPORT, - USB_NOT_READY /* The process has not been finished, endpoint will be - NAK to further rquest */ -} RESULT; - - -/*-*-*-*-*-*-*-*-*-*-* Definitions for endpoint level -*-*-*-*-*-*-*-*-*-*-*-*/ -typedef struct _ENDPOINT_INFO -{ - /* When send data out of the device, - CopyData() is used to get data buffer 'Length' bytes data - if Length is 0, - CopyData() returns the total length of the data - if the request is not supported, returns 0 - (NEW Feature ) - if CopyData() returns -1, the calling routine should not proceed - further and will resume the SETUP process by the class device - if Length is not 0, - CopyData() returns a pointer to indicate the data location - Usb_wLength is the data remain to be sent, - Usb_wOffset is the Offset of original data - When receive data from the host, - CopyData() is used to get user data buffer which is capable - of Length bytes data to copy data from the endpoint buffer. - if Length is 0, - CopyData() returns the available data length, - if Length is not 0, - CopyData() returns user buffer address - Usb_rLength is the data remain to be received, - Usb_rPointer is the Offset of data buffer - */ - uint16_t Usb_wLength; - uint16_t Usb_wOffset; - uint16_t PacketSize; - uint8_t *(*CopyData)(uint16_t Length); -}ENDPOINT_INFO; - -/*-*-*-*-*-*-*-*-*-*-*-* Definitions for device level -*-*-*-*-*-*-*-*-*-*-*-*/ - -typedef struct _DEVICE -{ - uint8_t Total_Endpoint; /* Number of endpoints that are used */ - uint8_t Total_Configuration;/* Number of configuration available */ -} -DEVICE; - -typedef union -{ - uint16_t w; - struct BW - { - uint8_t bb1; - uint8_t bb0; - } - bw; -} uint16_t_uint8_t; - -typedef struct _DEVICE_INFO -{ - uint8_t USBbmRequestType; /* bmRequestType */ - uint8_t USBbRequest; /* bRequest */ - uint16_t_uint8_t USBwValues; /* wValue */ - uint16_t_uint8_t USBwIndexs; /* wIndex */ - uint16_t_uint8_t USBwLengths; /* wLength */ - - uint8_t ControlState; /* of type CONTROL_STATE */ - uint8_t Current_Feature; - uint8_t Current_Configuration; /* Selected configuration */ - uint8_t Current_Interface; /* Selected interface of current configuration */ - uint8_t Current_AlternateSetting;/* Selected Alternate Setting of current - interface*/ - - ENDPOINT_INFO Ctrl_Info; -}DEVICE_INFO; - -typedef struct _DEVICE_PROP -{ - void (*Init)(void); /* Initialize the device */ - void (*Reset)(void); /* Reset routine of this device */ - - /* Device dependent process after the status stage */ - void (*Process_Status_IN)(void); - void (*Process_Status_OUT)(void); - - /* Procedure of process on setup stage of a class specified request with data stage */ - /* All class specified requests with data stage are processed in Class_Data_Setup - Class_Data_Setup() - responses to check all special requests and fills ENDPOINT_INFO - according to the request - If IN tokens are expected, then wLength & wOffset will be filled - with the total transferring bytes and the starting position - If OUT tokens are expected, then rLength & rOffset will be filled - with the total expected bytes and the starting position in the buffer - - If the request is valid, Class_Data_Setup returns SUCCESS, else UNSUPPORT - - CAUTION: - Since GET_CONFIGURATION & GET_INTERFACE are highly related to - the individual classes, they will be checked and processed here. - */ - RESULT (*Class_Data_Setup)(uint8_t RequestNo); - - /* Procedure of process on setup stage of a class specified request without data stage */ - /* All class specified requests without data stage are processed in Class_NoData_Setup - Class_NoData_Setup - responses to check all special requests and perform the request - - CAUTION: - Since SET_CONFIGURATION & SET_INTERFACE are highly related to - the individual classes, they will be checked and processed here. - */ - RESULT (*Class_NoData_Setup)(uint8_t RequestNo); - - /*Class_Get_Interface_Setting - This function is used by the file usb_core.c to test if the selected Interface - and Alternate Setting (uint8_t Interface, uint8_t AlternateSetting) are supported by - the application. - This function is writing by user. It should return "SUCCESS" if the Interface - and Alternate Setting are supported by the application or "UNSUPPORT" if they - are not supported. */ - - RESULT (*Class_Get_Interface_Setting)(uint8_t Interface, uint8_t AlternateSetting); - - uint8_t* (*GetDeviceDescriptor)(uint16_t Length); - uint8_t* (*GetConfigDescriptor)(uint16_t Length); - uint8_t* (*GetStringDescriptor)(uint16_t Length); - - uint8_t* RxEP_buffer; - uint8_t MaxPacketSize; - -}DEVICE_PROP; - -typedef struct _USER_STANDARD_REQUESTS -{ - void (*User_GetConfiguration)(void); /* Get Configuration */ - void (*User_SetConfiguration)(void); /* Set Configuration */ - void (*User_GetInterface)(void); /* Get Interface */ - void (*User_SetInterface)(void); /* Set Interface */ - void (*User_GetStatus)(void); /* Get Status */ - void (*User_ClearFeature)(void); /* Clear Feature */ - void (*User_SetEndPointFeature)(void); /* Set Endpoint Feature */ - void (*User_SetDeviceFeature)(void); /* Set Device Feature */ - void (*User_SetDeviceAddress)(void); /* Set Device Address */ -} -USER_STANDARD_REQUESTS; - -/* Exported constants --------------------------------------------------------*/ -#define Type_Recipient (pInformation->USBbmRequestType & (REQUEST_TYPE | RECIPIENT)) - -#define Usb_rLength Usb_wLength -#define Usb_rOffset Usb_wOffset - -#define USBwValue USBwValues.w -#define USBwValue0 USBwValues.bw.bb0 -#define USBwValue1 USBwValues.bw.bb1 -#define USBwIndex USBwIndexs.w -#define USBwIndex0 USBwIndexs.bw.bb0 -#define USBwIndex1 USBwIndexs.bw.bb1 -#define USBwLength USBwLengths.w -#define USBwLength0 USBwLengths.bw.bb0 -#define USBwLength1 USBwLengths.bw.bb1 - -/* Exported macro ------------------------------------------------------------*/ -/* Exported functions ------------------------------------------------------- */ -uint8_t Setup0_Process(void); -uint8_t Post0_Process(void); -uint8_t Out0_Process(void); -uint8_t In0_Process(void); - -RESULT Standard_SetEndPointFeature(void); -RESULT Standard_SetDeviceFeature(void); - -uint8_t *Standard_GetConfiguration(uint16_t Length); -RESULT Standard_SetConfiguration(void); -uint8_t *Standard_GetInterface(uint16_t Length); -RESULT Standard_SetInterface(void); -uint8_t *Standard_GetDescriptorData(uint16_t Length, PONE_DESCRIPTOR pDesc); - -uint8_t *Standard_GetStatus(uint16_t Length); -RESULT Standard_ClearFeature(void); -void SetDeviceAddress(uint8_t); -void NOP_Process(void); - -extern DEVICE_PROP Device_Property; -extern USER_STANDARD_REQUESTS User_Standard_Requests; -extern DEVICE Device_Table; -extern DEVICE_INFO Device_Info; - -/* cells saving status during interrupt servicing */ -extern __IO uint16_t SaveRState; -extern __IO uint16_t SaveTState; - -#endif /* __USB_CORE_H */ - -/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/Libraries/STM32_USB-FS-Device_Driver/inc/usb_def.h b/bsp/stm32_radio/Libraries/STM32_USB-FS-Device_Driver/inc/usb_def.h deleted file mode 100644 index 9817fb8f48..0000000000 --- a/bsp/stm32_radio/Libraries/STM32_USB-FS-Device_Driver/inc/usb_def.h +++ /dev/null @@ -1,80 +0,0 @@ -/******************** (C) COPYRIGHT 2009 STMicroelectronics ******************** -* File Name : usb_def.h -* Author : MCD Application Team -* Version : V3.1.0 -* Date : 10/30/2009 -* Description : Definitions related to USB Core -******************************************************************************** -* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS -* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. -* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, -* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE -* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING -* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __USB_DEF_H -#define __USB_DEF_H - -/* Includes ------------------------------------------------------------------*/ -/* Exported types ------------------------------------------------------------*/ -typedef enum _RECIPIENT_TYPE -{ - DEVICE_RECIPIENT, /* Recipient device */ - INTERFACE_RECIPIENT, /* Recipient interface */ - ENDPOINT_RECIPIENT, /* Recipient endpoint */ - OTHER_RECIPIENT -} RECIPIENT_TYPE; - - -typedef enum _STANDARD_REQUESTS -{ - GET_STATUS = 0, - CLEAR_FEATURE, - RESERVED1, - SET_FEATURE, - RESERVED2, - SET_ADDRESS, - GET_DESCRIPTOR, - SET_DESCRIPTOR, - GET_CONFIGURATION, - SET_CONFIGURATION, - GET_INTERFACE, - SET_INTERFACE, - TOTAL_sREQUEST, /* Total number of Standard request */ - SYNCH_FRAME = 12 -} STANDARD_REQUESTS; - -/* Definition of "USBwValue" */ -typedef enum _DESCRIPTOR_TYPE -{ - DEVICE_DESCRIPTOR = 1, - CONFIG_DESCRIPTOR, - STRING_DESCRIPTOR, - INTERFACE_DESCRIPTOR, - ENDPOINT_DESCRIPTOR -} DESCRIPTOR_TYPE; - -/* Feature selector of a SET_FEATURE or CLEAR_FEATURE */ -typedef enum _FEATURE_SELECTOR -{ - ENDPOINT_STALL, - DEVICE_REMOTE_WAKEUP -} FEATURE_SELECTOR; - -/* Exported constants --------------------------------------------------------*/ -/* Definition of "USBbmRequestType" */ -#define REQUEST_TYPE 0x60 /* Mask to get request type */ -#define STANDARD_REQUEST 0x00 /* Standard request */ -#define CLASS_REQUEST 0x20 /* Class request */ -#define VENDOR_REQUEST 0x40 /* Vendor request */ - -#define RECIPIENT 0x1F /* Mask to get recipient */ - -/* Exported macro ------------------------------------------------------------*/ -/* Exported functions ------------------------------------------------------- */ - -#endif /* __USB_DEF_H */ - -/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/Libraries/STM32_USB-FS-Device_Driver/inc/usb_init.h b/bsp/stm32_radio/Libraries/STM32_USB-FS-Device_Driver/inc/usb_init.h deleted file mode 100644 index b0a2dd19ff..0000000000 --- a/bsp/stm32_radio/Libraries/STM32_USB-FS-Device_Driver/inc/usb_init.h +++ /dev/null @@ -1,49 +0,0 @@ -/******************** (C) COPYRIGHT 2009 STMicroelectronics ******************** -* File Name : usb_init.h -* Author : MCD Application Team -* Version : V3.1.0 -* Date : 10/30/2009 -* Description : Initialization routines & global variables -******************************************************************************** -* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS -* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. -* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, -* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE -* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING -* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __USB_INIT_H -#define __USB_INIT_H - -/* Includes ------------------------------------------------------------------*/ -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ -/* Exported macro ------------------------------------------------------------*/ -/* Exported functions ------------------------------------------------------- */ -void USB_Init(void); - -/* External variables --------------------------------------------------------*/ -/* The number of current endpoint, it will be used to specify an endpoint */ -extern uint8_t EPindex; -/* The number of current device, it is an index to the Device_Table */ -/*extern uint8_t Device_no; */ -/* Points to the DEVICE_INFO structure of current device */ -/* The purpose of this register is to speed up the execution */ -extern DEVICE_INFO* pInformation; -/* Points to the DEVICE_PROP structure of current device */ -/* The purpose of this register is to speed up the execution */ -extern DEVICE_PROP* pProperty; -/* Temporary save the state of Rx & Tx status. */ -/* Whenever the Rx or Tx state is changed, its value is saved */ -/* in this variable first and will be set to the EPRB or EPRA */ -/* at the end of interrupt process */ -extern USER_STANDARD_REQUESTS *pUser_Standard_Requests; - -extern uint16_t SaveState ; -extern uint16_t wInterrupt_Mask; - -#endif /* __USB_INIT_H */ - -/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/Libraries/STM32_USB-FS-Device_Driver/inc/usb_int.h b/bsp/stm32_radio/Libraries/STM32_USB-FS-Device_Driver/inc/usb_int.h deleted file mode 100644 index 07e981116e..0000000000 --- a/bsp/stm32_radio/Libraries/STM32_USB-FS-Device_Driver/inc/usb_int.h +++ /dev/null @@ -1,33 +0,0 @@ -/******************** (C) COPYRIGHT 2009 STMicroelectronics ******************** -* File Name : usb_int.h -* Author : MCD Application Team -* Version : V3.1.0 -* Date : 10/30/2009 -* Description : Endpoint CTR (Low and High) interrupt's service routines -* prototypes -******************************************************************************** -* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS -* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. -* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, -* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE -* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING -* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __USB_INT_H -#define __USB_INT_H - -/* Includes ------------------------------------------------------------------*/ -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ -/* Exported macro ------------------------------------------------------------*/ -/* Exported functions ------------------------------------------------------- */ -void CTR_LP(void); -void CTR_HP(void); - -/* External variables --------------------------------------------------------*/ - -#endif /* __USB_INT_H */ - -/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/Libraries/STM32_USB-FS-Device_Driver/inc/usb_lib.h b/bsp/stm32_radio/Libraries/STM32_USB-FS-Device_Driver/inc/usb_lib.h deleted file mode 100644 index dbbd82106b..0000000000 --- a/bsp/stm32_radio/Libraries/STM32_USB-FS-Device_Driver/inc/usb_lib.h +++ /dev/null @@ -1,50 +0,0 @@ -/******************** (C) COPYRIGHT 2009 STMicroelectronics ******************** -* File Name : usb_lib.h -* Author : MCD Application Team -* Version : V3.1.0 -* Date : 10/30/2009 -* Description : USB library include files -******************************************************************************** -* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS -* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. -* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, -* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE -* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING -* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __USB_LIB_H -#define __USB_LIB_H - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x.h" -#include "usb_type.h" -#include "usb_regs.h" -#include "usb_def.h" -#include "usb_core.h" -#include "usb_init.h" -#ifndef STM32F10X_CL - #include "usb_mem.h" - #include "usb_int.h" -#endif /* STM32F10X_CL */ - -#include "usb_sil.h" - -#ifdef STM32F10X_CL - #include "otgd_fs_cal.h" - #include "otgd_fs_pcd.h" - #include "otgd_fs_dev.h" - #include "otgd_fs_int.h" -#endif /* STM32F10X_CL */ - - -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ -/* Exported macro ------------------------------------------------------------*/ -/* Exported functions ------------------------------------------------------- */ -/* External variables --------------------------------------------------------*/ - -#endif /* __USB_LIB_H */ - -/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/Libraries/STM32_USB-FS-Device_Driver/inc/usb_mem.h b/bsp/stm32_radio/Libraries/STM32_USB-FS-Device_Driver/inc/usb_mem.h deleted file mode 100644 index 176374e3da..0000000000 --- a/bsp/stm32_radio/Libraries/STM32_USB-FS-Device_Driver/inc/usb_mem.h +++ /dev/null @@ -1,32 +0,0 @@ -/******************** (C) COPYRIGHT 2009 STMicroelectronics ******************** -* File Name : usb_mem.h -* Author : MCD Application Team -* Version : V3.1.0 -* Date : 10/30/2009 -* Description : Utility prototypes functions for memory/PMA transfers -******************************************************************************** -* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS -* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. -* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, -* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE -* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING -* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __USB_MEM_H -#define __USB_MEM_H - -/* Includes ------------------------------------------------------------------*/ -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ -/* Exported macro ------------------------------------------------------------*/ -/* Exported functions ------------------------------------------------------- */ -void UserToPMABufferCopy(uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes); -void PMAToUserBufferCopy(uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes); - -/* External variables --------------------------------------------------------*/ - -#endif /*__USB_MEM_H*/ - -/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/Libraries/STM32_USB-FS-Device_Driver/inc/usb_regs.h b/bsp/stm32_radio/Libraries/STM32_USB-FS-Device_Driver/inc/usb_regs.h deleted file mode 100644 index 1f8f4b63af..0000000000 --- a/bsp/stm32_radio/Libraries/STM32_USB-FS-Device_Driver/inc/usb_regs.h +++ /dev/null @@ -1,671 +0,0 @@ -/******************** (C) COPYRIGHT 2009 STMicroelectronics ******************** -* File Name : usb_regs.h -* Author : MCD Application Team -* Version : V3.1.0 -* Date : 10/30/2009 -* Description : Interface prototype functions to USB cell registers -******************************************************************************** -* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS -* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. -* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, -* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE -* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING -* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __USB_REGS_H -#define __USB_REGS_H - -#ifndef STM32F10X_CL - -/* Includes ------------------------------------------------------------------*/ -/* Exported types ------------------------------------------------------------*/ -typedef enum _EP_DBUF_DIR -{ - /* double buffered endpoint direction */ - EP_DBUF_ERR, - EP_DBUF_OUT, - EP_DBUF_IN -}EP_DBUF_DIR; - -/* endpoint buffer number */ -enum EP_BUF_NUM -{ - EP_NOBUF, - EP_BUF0, - EP_BUF1 -}; - -/* Exported constants --------------------------------------------------------*/ -#define RegBase (0x40005C00L) /* USB_IP Peripheral Registers base address */ -#define PMAAddr (0x40006000L) /* USB_IP Packet Memory Area base address */ - -/******************************************************************************/ -/* General registers */ -/******************************************************************************/ - -/* Control register */ -#define CNTR ((__IO unsigned *)(RegBase + 0x40)) -/* Interrupt status register */ -#define ISTR ((__IO unsigned *)(RegBase + 0x44)) -/* Frame number register */ -#define FNR ((__IO unsigned *)(RegBase + 0x48)) -/* Device address register */ -#define DADDR ((__IO unsigned *)(RegBase + 0x4C)) -/* Buffer Table address register */ -#define BTABLE ((__IO unsigned *)(RegBase + 0x50)) -/******************************************************************************/ -/* Endpoint registers */ -/******************************************************************************/ -#define EP0REG ((__IO unsigned *)(RegBase)) /* endpoint 0 register address */ - -/* Endpoint Addresses (w/direction) */ -#define EP0_OUT ((uint8_t)0x00) -#define EP0_IN ((uint8_t)0x80) -#define EP1_OUT ((uint8_t)0x01) -#define EP1_IN ((uint8_t)0x81) -#define EP2_OUT ((uint8_t)0x02) -#define EP2_IN ((uint8_t)0x82) -#define EP3_OUT ((uint8_t)0x03) -#define EP3_IN ((uint8_t)0x83) -#define EP4_OUT ((uint8_t)0x04) -#define EP4_IN ((uint8_t)0x84) -#define EP5_OUT ((uint8_t)0x05) -#define EP5_IN ((uint8_t)0x85) -#define EP6_OUT ((uint8_t)0x06) -#define EP6_IN ((uint8_t)0x86) -#define EP7_OUT ((uint8_t)0x07) -#define EP7_IN ((uint8_t)0x87) - -/* endpoints enumeration */ -#define ENDP0 ((uint8_t)0) -#define ENDP1 ((uint8_t)1) -#define ENDP2 ((uint8_t)2) -#define ENDP3 ((uint8_t)3) -#define ENDP4 ((uint8_t)4) -#define ENDP5 ((uint8_t)5) -#define ENDP6 ((uint8_t)6) -#define ENDP7 ((uint8_t)7) - -/******************************************************************************/ -/* ISTR interrupt events */ -/******************************************************************************/ -#define ISTR_CTR (0x8000) /* Correct TRansfer (clear-only bit) */ -#define ISTR_DOVR (0x4000) /* DMA OVeR/underrun (clear-only bit) */ -#define ISTR_ERR (0x2000) /* ERRor (clear-only bit) */ -#define ISTR_WKUP (0x1000) /* WaKe UP (clear-only bit) */ -#define ISTR_SUSP (0x0800) /* SUSPend (clear-only bit) */ -#define ISTR_RESET (0x0400) /* RESET (clear-only bit) */ -#define ISTR_SOF (0x0200) /* Start Of Frame (clear-only bit) */ -#define ISTR_ESOF (0x0100) /* Expected Start Of Frame (clear-only bit) */ - - -#define ISTR_DIR (0x0010) /* DIRection of transaction (read-only bit) */ -#define ISTR_EP_ID (0x000F) /* EndPoint IDentifier (read-only bit) */ - -#define CLR_CTR (~ISTR_CTR) /* clear Correct TRansfer bit */ -#define CLR_DOVR (~ISTR_DOVR) /* clear DMA OVeR/underrun bit*/ -#define CLR_ERR (~ISTR_ERR) /* clear ERRor bit */ -#define CLR_WKUP (~ISTR_WKUP) /* clear WaKe UP bit */ -#define CLR_SUSP (~ISTR_SUSP) /* clear SUSPend bit */ -#define CLR_RESET (~ISTR_RESET) /* clear RESET bit */ -#define CLR_SOF (~ISTR_SOF) /* clear Start Of Frame bit */ -#define CLR_ESOF (~ISTR_ESOF) /* clear Expected Start Of Frame bit */ - -/******************************************************************************/ -/* CNTR control register bits definitions */ -/******************************************************************************/ -#define CNTR_CTRM (0x8000) /* Correct TRansfer Mask */ -#define CNTR_DOVRM (0x4000) /* DMA OVeR/underrun Mask */ -#define CNTR_ERRM (0x2000) /* ERRor Mask */ -#define CNTR_WKUPM (0x1000) /* WaKe UP Mask */ -#define CNTR_SUSPM (0x0800) /* SUSPend Mask */ -#define CNTR_RESETM (0x0400) /* RESET Mask */ -#define CNTR_SOFM (0x0200) /* Start Of Frame Mask */ -#define CNTR_ESOFM (0x0100) /* Expected Start Of Frame Mask */ - - -#define CNTR_RESUME (0x0010) /* RESUME request */ -#define CNTR_FSUSP (0x0008) /* Force SUSPend */ -#define CNTR_LPMODE (0x0004) /* Low-power MODE */ -#define CNTR_PDWN (0x0002) /* Power DoWN */ -#define CNTR_FRES (0x0001) /* Force USB RESet */ - -/******************************************************************************/ -/* FNR Frame Number Register bit definitions */ -/******************************************************************************/ -#define FNR_RXDP (0x8000) /* status of D+ data line */ -#define FNR_RXDM (0x4000) /* status of D- data line */ -#define FNR_LCK (0x2000) /* LoCKed */ -#define FNR_LSOF (0x1800) /* Lost SOF */ -#define FNR_FN (0x07FF) /* Frame Number */ -/******************************************************************************/ -/* DADDR Device ADDRess bit definitions */ -/******************************************************************************/ -#define DADDR_EF (0x80) -#define DADDR_ADD (0x7F) -/******************************************************************************/ -/* Endpoint register */ -/******************************************************************************/ -/* bit positions */ -#define EP_CTR_RX (0x8000) /* EndPoint Correct TRansfer RX */ -#define EP_DTOG_RX (0x4000) /* EndPoint Data TOGGLE RX */ -#define EPRX_STAT (0x3000) /* EndPoint RX STATus bit field */ -#define EP_SETUP (0x0800) /* EndPoint SETUP */ -#define EP_T_FIELD (0x0600) /* EndPoint TYPE */ -#define EP_KIND (0x0100) /* EndPoint KIND */ -#define EP_CTR_TX (0x0080) /* EndPoint Correct TRansfer TX */ -#define EP_DTOG_TX (0x0040) /* EndPoint Data TOGGLE TX */ -#define EPTX_STAT (0x0030) /* EndPoint TX STATus bit field */ -#define EPADDR_FIELD (0x000F) /* EndPoint ADDRess FIELD */ - -/* EndPoint REGister MASK (no toggle fields) */ -#define EPREG_MASK (EP_CTR_RX|EP_SETUP|EP_T_FIELD|EP_KIND|EP_CTR_TX|EPADDR_FIELD) - -/* EP_TYPE[1:0] EndPoint TYPE */ -#define EP_TYPE_MASK (0x0600) /* EndPoint TYPE Mask */ -#define EP_BULK (0x0000) /* EndPoint BULK */ -#define EP_CONTROL (0x0200) /* EndPoint CONTROL */ -#define EP_ISOCHRONOUS (0x0400) /* EndPoint ISOCHRONOUS */ -#define EP_INTERRUPT (0x0600) /* EndPoint INTERRUPT */ -#define EP_T_MASK (~EP_T_FIELD & EPREG_MASK) - - -/* EP_KIND EndPoint KIND */ -#define EPKIND_MASK (~EP_KIND & EPREG_MASK) - -/* STAT_TX[1:0] STATus for TX transfer */ -#define EP_TX_DIS (0x0000) /* EndPoint TX DISabled */ -#define EP_TX_STALL (0x0010) /* EndPoint TX STALLed */ -#define EP_TX_NAK (0x0020) /* EndPoint TX NAKed */ -#define EP_TX_VALID (0x0030) /* EndPoint TX VALID */ -#define EPTX_DTOG1 (0x0010) /* EndPoint TX Data TOGgle bit1 */ -#define EPTX_DTOG2 (0x0020) /* EndPoint TX Data TOGgle bit2 */ -#define EPTX_DTOGMASK (EPTX_STAT|EPREG_MASK) - -/* STAT_RX[1:0] STATus for RX transfer */ -#define EP_RX_DIS (0x0000) /* EndPoint RX DISabled */ -#define EP_RX_STALL (0x1000) /* EndPoint RX STALLed */ -#define EP_RX_NAK (0x2000) /* EndPoint RX NAKed */ -#define EP_RX_VALID (0x3000) /* EndPoint RX VALID */ -#define EPRX_DTOG1 (0x1000) /* EndPoint RX Data TOGgle bit1 */ -#define EPRX_DTOG2 (0x2000) /* EndPoint RX Data TOGgle bit1 */ -#define EPRX_DTOGMASK (EPRX_STAT|EPREG_MASK) -/* Exported macro ------------------------------------------------------------*/ -/* SetCNTR */ -#define _SetCNTR(wRegValue) (*CNTR = (uint16_t)wRegValue) - -/* SetISTR */ -#define _SetISTR(wRegValue) (*ISTR = (uint16_t)wRegValue) - -/* SetDADDR */ -#define _SetDADDR(wRegValue) (*DADDR = (uint16_t)wRegValue) - -/* SetBTABLE */ -#define _SetBTABLE(wRegValue)(*BTABLE = (uint16_t)(wRegValue & 0xFFF8)) - -/* GetCNTR */ -#define _GetCNTR() ((uint16_t) *CNTR) - -/* GetISTR */ -#define _GetISTR() ((uint16_t) *ISTR) - -/* GetFNR */ -#define _GetFNR() ((uint16_t) *FNR) - -/* GetDADDR */ -#define _GetDADDR() ((uint16_t) *DADDR) - -/* GetBTABLE */ -#define _GetBTABLE() ((uint16_t) *BTABLE) - -/* SetENDPOINT */ -#define _SetENDPOINT(bEpNum,wRegValue) (*(EP0REG + bEpNum)= \ - (uint16_t)wRegValue) - -/* GetENDPOINT */ -#define _GetENDPOINT(bEpNum) ((uint16_t)(*(EP0REG + bEpNum))) - -/******************************************************************************* -* Macro Name : SetEPType -* Description : sets the type in the endpoint register(bits EP_TYPE[1:0]) -* Input : bEpNum: Endpoint Number. -* wType -* Output : None. -* Return : None. -*******************************************************************************/ -#define _SetEPType(bEpNum,wType) (_SetENDPOINT(bEpNum,\ - ((_GetENDPOINT(bEpNum) & EP_T_MASK) | wType ))) - -/******************************************************************************* -* Macro Name : GetEPType -* Description : gets the type in the endpoint register(bits EP_TYPE[1:0]) -* Input : bEpNum: Endpoint Number. -* Output : None. -* Return : Endpoint Type -*******************************************************************************/ -#define _GetEPType(bEpNum) (_GetENDPOINT(bEpNum) & EP_T_FIELD) - -/******************************************************************************* -* Macro Name : SetEPTxStatus -* Description : sets the status for tx transfer (bits STAT_TX[1:0]). -* Input : bEpNum: Endpoint Number. -* wState: new state -* Output : None. -* Return : None. -*******************************************************************************/ -#define _SetEPTxStatus(bEpNum,wState) {\ - register uint16_t _wRegVal; \ - _wRegVal = _GetENDPOINT(bEpNum) & EPTX_DTOGMASK;\ - /* toggle first bit ? */ \ - if((EPTX_DTOG1 & wState)!= 0) \ - _wRegVal ^= EPTX_DTOG1; \ - /* toggle second bit ? */ \ - if((EPTX_DTOG2 & wState)!= 0) \ - _wRegVal ^= EPTX_DTOG2; \ - _SetENDPOINT(bEpNum, (_wRegVal | EP_CTR_RX|EP_CTR_TX)); \ - } /* _SetEPTxStatus */ - -/******************************************************************************* -* Macro Name : SetEPRxStatus -* Description : sets the status for rx transfer (bits STAT_TX[1:0]) -* Input : bEpNum: Endpoint Number. -* wState: new state. -* Output : None. -* Return : None. -*******************************************************************************/ -#define _SetEPRxStatus(bEpNum,wState) {\ - register uint16_t _wRegVal; \ - \ - _wRegVal = _GetENDPOINT(bEpNum) & EPRX_DTOGMASK;\ - /* toggle first bit ? */ \ - if((EPRX_DTOG1 & wState)!= 0) \ - _wRegVal ^= EPRX_DTOG1; \ - /* toggle second bit ? */ \ - if((EPRX_DTOG2 & wState)!= 0) \ - _wRegVal ^= EPRX_DTOG2; \ - _SetENDPOINT(bEpNum, (_wRegVal | EP_CTR_RX|EP_CTR_TX)); \ - } /* _SetEPRxStatus */ - -/******************************************************************************* -* Macro Name : SetEPRxTxStatus -* Description : sets the status for rx & tx (bits STAT_TX[1:0] & STAT_RX[1:0]) -* Input : bEpNum: Endpoint Number. -* wStaterx: new state. -* wStatetx: new state. -* Output : None. -* Return : None. -*******************************************************************************/ -#define _SetEPRxTxStatus(bEpNum,wStaterx,wStatetx) {\ - register uint32_t _wRegVal; \ - \ - _wRegVal = _GetENDPOINT(bEpNum) & (EPRX_DTOGMASK |EPTX_STAT) ;\ - /* toggle first bit ? */ \ - if((EPRX_DTOG1 & wStaterx)!= 0) \ - _wRegVal ^= EPRX_DTOG1; \ - /* toggle second bit ? */ \ - if((EPRX_DTOG2 & wStaterx)!= 0) \ - _wRegVal ^= EPRX_DTOG2; \ - /* toggle first bit ? */ \ - if((EPTX_DTOG1 & wStatetx)!= 0) \ - _wRegVal ^= EPTX_DTOG1; \ - /* toggle second bit ? */ \ - if((EPTX_DTOG2 & wStatetx)!= 0) \ - _wRegVal ^= EPTX_DTOG2; \ - _SetENDPOINT(bEpNum, _wRegVal | EP_CTR_RX|EP_CTR_TX); \ - } /* _SetEPRxTxStatus */ -/******************************************************************************* -* Macro Name : GetEPTxStatus / GetEPRxStatus -* Description : gets the status for tx/rx transfer (bits STAT_TX[1:0] -* /STAT_RX[1:0]) -* Input : bEpNum: Endpoint Number. -* Output : None. -* Return : status . -*******************************************************************************/ -#define _GetEPTxStatus(bEpNum) ((uint16_t)_GetENDPOINT(bEpNum) & EPTX_STAT) - -#define _GetEPRxStatus(bEpNum) ((uint16_t)_GetENDPOINT(bEpNum) & EPRX_STAT) - -/******************************************************************************* -* Macro Name : SetEPTxValid / SetEPRxValid -* Description : sets directly the VALID tx/rx-status into the enpoint register -* Input : bEpNum: Endpoint Number. -* Output : None. -* Return : None. -*******************************************************************************/ -#define _SetEPTxValid(bEpNum) (_SetEPTxStatus(bEpNum, EP_TX_VALID)) - -#define _SetEPRxValid(bEpNum) (_SetEPRxStatus(bEpNum, EP_RX_VALID)) - -/******************************************************************************* -* Macro Name : GetTxStallStatus / GetRxStallStatus. -* Description : checks stall condition in an endpoint. -* Input : bEpNum: Endpoint Number. -* Output : None. -* Return : TRUE = endpoint in stall condition. -*******************************************************************************/ -#define _GetTxStallStatus(bEpNum) (_GetEPTxStatus(bEpNum) \ - == EP_TX_STALL) -#define _GetRxStallStatus(bEpNum) (_GetEPRxStatus(bEpNum) \ - == EP_RX_STALL) - -/******************************************************************************* -* Macro Name : SetEP_KIND / ClearEP_KIND. -* Description : set & clear EP_KIND bit. -* Input : bEpNum: Endpoint Number. -* Output : None. -* Return : None. -*******************************************************************************/ -#define _SetEP_KIND(bEpNum) (_SetENDPOINT(bEpNum, \ - (EP_CTR_RX|EP_CTR_TX|((_GetENDPOINT(bEpNum) | EP_KIND) & EPREG_MASK)))) -#define _ClearEP_KIND(bEpNum) (_SetENDPOINT(bEpNum, \ - (EP_CTR_RX|EP_CTR_TX|(_GetENDPOINT(bEpNum) & EPKIND_MASK)))) - -/******************************************************************************* -* Macro Name : Set_Status_Out / Clear_Status_Out. -* Description : Sets/clears directly STATUS_OUT bit in the endpoint register. -* Input : bEpNum: Endpoint Number. -* Output : None. -* Return : None. -*******************************************************************************/ -#define _Set_Status_Out(bEpNum) _SetEP_KIND(bEpNum) -#define _Clear_Status_Out(bEpNum) _ClearEP_KIND(bEpNum) - -/******************************************************************************* -* Macro Name : SetEPDoubleBuff / ClearEPDoubleBuff. -* Description : Sets/clears directly EP_KIND bit in the endpoint register. -* Input : bEpNum: Endpoint Number. -* Output : None. -* Return : None. -*******************************************************************************/ -#define _SetEPDoubleBuff(bEpNum) _SetEP_KIND(bEpNum) -#define _ClearEPDoubleBuff(bEpNum) _ClearEP_KIND(bEpNum) - -/******************************************************************************* -* Macro Name : ClearEP_CTR_RX / ClearEP_CTR_TX. -* Description : Clears bit CTR_RX / CTR_TX in the endpoint register. -* Input : bEpNum: Endpoint Number. -* Output : None. -* Return : None. -*******************************************************************************/ -#define _ClearEP_CTR_RX(bEpNum) (_SetENDPOINT(bEpNum,\ - _GetENDPOINT(bEpNum) & 0x7FFF & EPREG_MASK)) -#define _ClearEP_CTR_TX(bEpNum) (_SetENDPOINT(bEpNum,\ - _GetENDPOINT(bEpNum) & 0xFF7F & EPREG_MASK)) - -/******************************************************************************* -* Macro Name : ToggleDTOG_RX / ToggleDTOG_TX . -* Description : Toggles DTOG_RX / DTOG_TX bit in the endpoint register. -* Input : bEpNum: Endpoint Number. -* Output : None. -* Return : None. -*******************************************************************************/ -#define _ToggleDTOG_RX(bEpNum) (_SetENDPOINT(bEpNum, \ - EP_CTR_RX|EP_CTR_TX|EP_DTOG_RX | (_GetENDPOINT(bEpNum) & EPREG_MASK))) -#define _ToggleDTOG_TX(bEpNum) (_SetENDPOINT(bEpNum, \ - EP_CTR_RX|EP_CTR_TX|EP_DTOG_TX | (_GetENDPOINT(bEpNum) & EPREG_MASK))) - -/******************************************************************************* -* Macro Name : ClearDTOG_RX / ClearDTOG_TX. -* Description : Clears DTOG_RX / DTOG_TX bit in the endpoint register. -* Input : bEpNum: Endpoint Number. -* Output : None. -* Return : None. -*******************************************************************************/ -#define _ClearDTOG_RX(bEpNum) if((_GetENDPOINT(bEpNum) & EP_DTOG_RX) != 0)\ - _ToggleDTOG_RX(bEpNum) -#define _ClearDTOG_TX(bEpNum) if((_GetENDPOINT(bEpNum) & EP_DTOG_TX) != 0)\ - _ToggleDTOG_TX(bEpNum) -/******************************************************************************* -* Macro Name : SetEPAddress. -* Description : Sets address in an endpoint register. -* Input : bEpNum: Endpoint Number. -* bAddr: Address. -* Output : None. -* Return : None. -*******************************************************************************/ -#define _SetEPAddress(bEpNum,bAddr) _SetENDPOINT(bEpNum,\ - EP_CTR_RX|EP_CTR_TX|(_GetENDPOINT(bEpNum) & EPREG_MASK) | bAddr) - -/******************************************************************************* -* Macro Name : GetEPAddress. -* Description : Gets address in an endpoint register. -* Input : bEpNum: Endpoint Number. -* Output : None. -* Return : None. -*******************************************************************************/ -#define _GetEPAddress(bEpNum) ((uint8_t)(_GetENDPOINT(bEpNum) & EPADDR_FIELD)) - -#define _pEPTxAddr(bEpNum) ((uint32_t *)((_GetBTABLE()+bEpNum*8 )*2 + PMAAddr)) -#define _pEPTxCount(bEpNum) ((uint32_t *)((_GetBTABLE()+bEpNum*8+2)*2 + PMAAddr)) -#define _pEPRxAddr(bEpNum) ((uint32_t *)((_GetBTABLE()+bEpNum*8+4)*2 + PMAAddr)) -#define _pEPRxCount(bEpNum) ((uint32_t *)((_GetBTABLE()+bEpNum*8+6)*2 + PMAAddr)) - -/******************************************************************************* -* Macro Name : SetEPTxAddr / SetEPRxAddr. -* Description : sets address of the tx/rx buffer. -* Input : bEpNum: Endpoint Number. -* wAddr: address to be set (must be word aligned). -* Output : None. -* Return : None. -*******************************************************************************/ -#define _SetEPTxAddr(bEpNum,wAddr) (*_pEPTxAddr(bEpNum) = ((wAddr >> 1) << 1)) -#define _SetEPRxAddr(bEpNum,wAddr) (*_pEPRxAddr(bEpNum) = ((wAddr >> 1) << 1)) - -/******************************************************************************* -* Macro Name : GetEPTxAddr / GetEPRxAddr. -* Description : Gets address of the tx/rx buffer. -* Input : bEpNum: Endpoint Number. -* Output : None. -* Return : address of the buffer. -*******************************************************************************/ -#define _GetEPTxAddr(bEpNum) ((uint16_t)*_pEPTxAddr(bEpNum)) -#define _GetEPRxAddr(bEpNum) ((uint16_t)*_pEPRxAddr(bEpNum)) - -/******************************************************************************* -* Macro Name : SetEPCountRxReg. -* Description : Sets counter of rx buffer with no. of blocks. -* Input : pdwReg: pointer to counter. -* wCount: Counter. -* Output : None. -* Return : None. -*******************************************************************************/ -#define _BlocksOf32(dwReg,wCount,wNBlocks) {\ - wNBlocks = wCount >> 5;\ - if((wCount & 0x1f) == 0)\ - wNBlocks--;\ - *pdwReg = (uint32_t)((wNBlocks << 10) | 0x8000);\ - }/* _BlocksOf32 */ - -#define _BlocksOf2(dwReg,wCount,wNBlocks) {\ - wNBlocks = wCount >> 1;\ - if((wCount & 0x1) != 0)\ - wNBlocks++;\ - *pdwReg = (uint32_t)(wNBlocks << 10);\ - }/* _BlocksOf2 */ - -#define _SetEPCountRxReg(dwReg,wCount) {\ - uint16_t wNBlocks;\ - if(wCount > 62){_BlocksOf32(dwReg,wCount,wNBlocks);}\ - else {_BlocksOf2(dwReg,wCount,wNBlocks);}\ - }/* _SetEPCountRxReg */ - - - -#define _SetEPRxDblBuf0Count(bEpNum,wCount) {\ - uint32_t *pdwReg = _pEPTxCount(bEpNum); \ - _SetEPCountRxReg(pdwReg, wCount);\ - } -/******************************************************************************* -* Macro Name : SetEPTxCount / SetEPRxCount. -* Description : sets counter for the tx/rx buffer. -* Input : bEpNum: endpoint number. -* wCount: Counter value. -* Output : None. -* Return : None. -*******************************************************************************/ -#define _SetEPTxCount(bEpNum,wCount) (*_pEPTxCount(bEpNum) = wCount) -#define _SetEPRxCount(bEpNum,wCount) {\ - uint32_t *pdwReg = _pEPRxCount(bEpNum); \ - _SetEPCountRxReg(pdwReg, wCount);\ - } -/******************************************************************************* -* Macro Name : GetEPTxCount / GetEPRxCount. -* Description : gets counter of the tx buffer. -* Input : bEpNum: endpoint number. -* Output : None. -* Return : Counter value. -*******************************************************************************/ -#define _GetEPTxCount(bEpNum)((uint16_t)(*_pEPTxCount(bEpNum)) & 0x3ff) -#define _GetEPRxCount(bEpNum)((uint16_t)(*_pEPRxCount(bEpNum)) & 0x3ff) - -/******************************************************************************* -* Macro Name : SetEPDblBuf0Addr / SetEPDblBuf1Addr. -* Description : Sets buffer 0/1 address in a double buffer endpoint. -* Input : bEpNum: endpoint number. -* : wBuf0Addr: buffer 0 address. -* Output : None. -* Return : None. -*******************************************************************************/ -#define _SetEPDblBuf0Addr(bEpNum,wBuf0Addr) {_SetEPTxAddr(bEpNum, wBuf0Addr);} -#define _SetEPDblBuf1Addr(bEpNum,wBuf1Addr) {_SetEPRxAddr(bEpNum, wBuf1Addr);} - -/******************************************************************************* -* Macro Name : SetEPDblBuffAddr. -* Description : Sets addresses in a double buffer endpoint. -* Input : bEpNum: endpoint number. -* : wBuf0Addr: buffer 0 address. -* : wBuf1Addr = buffer 1 address. -* Output : None. -* Return : None. -*******************************************************************************/ -#define _SetEPDblBuffAddr(bEpNum,wBuf0Addr,wBuf1Addr) { \ - _SetEPDblBuf0Addr(bEpNum, wBuf0Addr);\ - _SetEPDblBuf1Addr(bEpNum, wBuf1Addr);\ - } /* _SetEPDblBuffAddr */ - -/******************************************************************************* -* Macro Name : GetEPDblBuf0Addr / GetEPDblBuf1Addr. -* Description : Gets buffer 0/1 address of a double buffer endpoint. -* Input : bEpNum: endpoint number. -* Output : None. -* Return : None. -*******************************************************************************/ -#define _GetEPDblBuf0Addr(bEpNum) (_GetEPTxAddr(bEpNum)) -#define _GetEPDblBuf1Addr(bEpNum) (_GetEPRxAddr(bEpNum)) - -/******************************************************************************* -* Macro Name : SetEPDblBuffCount / SetEPDblBuf0Count / SetEPDblBuf1Count. -* Description : Gets buffer 0/1 address of a double buffer endpoint. -* Input : bEpNum: endpoint number. -* : bDir: endpoint dir EP_DBUF_OUT = OUT -* EP_DBUF_IN = IN -* : wCount: Counter value -* Output : None. -* Return : None. -*******************************************************************************/ -#define _SetEPDblBuf0Count(bEpNum, bDir, wCount) { \ - if(bDir == EP_DBUF_OUT)\ - /* OUT endpoint */ \ - {_SetEPRxDblBuf0Count(bEpNum,wCount);} \ - else if(bDir == EP_DBUF_IN)\ - /* IN endpoint */ \ - *_pEPTxCount(bEpNum) = (uint32_t)wCount; \ - } /* SetEPDblBuf0Count*/ - -#define _SetEPDblBuf1Count(bEpNum, bDir, wCount) { \ - if(bDir == EP_DBUF_OUT)\ - /* OUT endpoint */ \ - {_SetEPRxCount(bEpNum,wCount);}\ - else if(bDir == EP_DBUF_IN)\ - /* IN endpoint */\ - *_pEPRxCount(bEpNum) = (uint32_t)wCount; \ - } /* SetEPDblBuf1Count */ - -#define _SetEPDblBuffCount(bEpNum, bDir, wCount) {\ - _SetEPDblBuf0Count(bEpNum, bDir, wCount); \ - _SetEPDblBuf1Count(bEpNum, bDir, wCount); \ - } /* _SetEPDblBuffCount */ - -/******************************************************************************* -* Macro Name : GetEPDblBuf0Count / GetEPDblBuf1Count. -* Description : Gets buffer 0/1 rx/tx counter for double buffering. -* Input : bEpNum: endpoint number. -* Output : None. -* Return : None. -*******************************************************************************/ -#define _GetEPDblBuf0Count(bEpNum) (_GetEPTxCount(bEpNum)) -#define _GetEPDblBuf1Count(bEpNum) (_GetEPRxCount(bEpNum)) - - -/* External variables --------------------------------------------------------*/ -extern __IO uint16_t wIstr; /* ISTR register last read value */ - -/* Exported functions ------------------------------------------------------- */ -void SetCNTR(uint16_t /*wRegValue*/); -void SetISTR(uint16_t /*wRegValue*/); -void SetDADDR(uint16_t /*wRegValue*/); -void SetBTABLE(uint16_t /*wRegValue*/); -void SetBTABLE(uint16_t /*wRegValue*/); -uint16_t GetCNTR(void); -uint16_t GetISTR(void); -uint16_t GetFNR(void); -uint16_t GetDADDR(void); -uint16_t GetBTABLE(void); -void SetENDPOINT(uint8_t /*bEpNum*/, uint16_t /*wRegValue*/); -uint16_t GetENDPOINT(uint8_t /*bEpNum*/); -void SetEPType(uint8_t /*bEpNum*/, uint16_t /*wType*/); -uint16_t GetEPType(uint8_t /*bEpNum*/); -void SetEPTxStatus(uint8_t /*bEpNum*/, uint16_t /*wState*/); -void SetEPRxStatus(uint8_t /*bEpNum*/, uint16_t /*wState*/); -void SetDouBleBuffEPStall(uint8_t /*bEpNum*/, uint8_t bDir); -uint16_t GetEPTxStatus(uint8_t /*bEpNum*/); -uint16_t GetEPRxStatus(uint8_t /*bEpNum*/); -void SetEPTxValid(uint8_t /*bEpNum*/); -void SetEPRxValid(uint8_t /*bEpNum*/); -uint16_t GetTxStallStatus(uint8_t /*bEpNum*/); -uint16_t GetRxStallStatus(uint8_t /*bEpNum*/); -void SetEP_KIND(uint8_t /*bEpNum*/); -void ClearEP_KIND(uint8_t /*bEpNum*/); -void Set_Status_Out(uint8_t /*bEpNum*/); -void Clear_Status_Out(uint8_t /*bEpNum*/); -void SetEPDoubleBuff(uint8_t /*bEpNum*/); -void ClearEPDoubleBuff(uint8_t /*bEpNum*/); -void ClearEP_CTR_RX(uint8_t /*bEpNum*/); -void ClearEP_CTR_TX(uint8_t /*bEpNum*/); -void ToggleDTOG_RX(uint8_t /*bEpNum*/); -void ToggleDTOG_TX(uint8_t /*bEpNum*/); -void ClearDTOG_RX(uint8_t /*bEpNum*/); -void ClearDTOG_TX(uint8_t /*bEpNum*/); -void SetEPAddress(uint8_t /*bEpNum*/, uint8_t /*bAddr*/); -uint8_t GetEPAddress(uint8_t /*bEpNum*/); -void SetEPTxAddr(uint8_t /*bEpNum*/, uint16_t /*wAddr*/); -void SetEPRxAddr(uint8_t /*bEpNum*/, uint16_t /*wAddr*/); -uint16_t GetEPTxAddr(uint8_t /*bEpNum*/); -uint16_t GetEPRxAddr(uint8_t /*bEpNum*/); -void SetEPCountRxReg(uint32_t * /*pdwReg*/, uint16_t /*wCount*/); -void SetEPTxCount(uint8_t /*bEpNum*/, uint16_t /*wCount*/); -void SetEPRxCount(uint8_t /*bEpNum*/, uint16_t /*wCount*/); -uint16_t GetEPTxCount(uint8_t /*bEpNum*/); -uint16_t GetEPRxCount(uint8_t /*bEpNum*/); -void SetEPDblBuf0Addr(uint8_t /*bEpNum*/, uint16_t /*wBuf0Addr*/); -void SetEPDblBuf1Addr(uint8_t /*bEpNum*/, uint16_t /*wBuf1Addr*/); -void SetEPDblBuffAddr(uint8_t /*bEpNum*/, uint16_t /*wBuf0Addr*/, uint16_t /*wBuf1Addr*/); -uint16_t GetEPDblBuf0Addr(uint8_t /*bEpNum*/); -uint16_t GetEPDblBuf1Addr(uint8_t /*bEpNum*/); -void SetEPDblBuffCount(uint8_t /*bEpNum*/, uint8_t /*bDir*/, uint16_t /*wCount*/); -void SetEPDblBuf0Count(uint8_t /*bEpNum*/, uint8_t /*bDir*/, uint16_t /*wCount*/); -void SetEPDblBuf1Count(uint8_t /*bEpNum*/, uint8_t /*bDir*/, uint16_t /*wCount*/); -uint16_t GetEPDblBuf0Count(uint8_t /*bEpNum*/); -uint16_t GetEPDblBuf1Count(uint8_t /*bEpNum*/); -EP_DBUF_DIR GetEPDblBufDir(uint8_t /*bEpNum*/); -void FreeUserBuffer(uint8_t bEpNum/*bEpNum*/, uint8_t bDir); -uint16_t ToWord(uint8_t, uint8_t); -uint16_t ByteSwap(uint16_t); - -#endif /* STM32F10X_CL */ - -#endif /* __USB_REGS_H */ - -/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/Libraries/STM32_USB-FS-Device_Driver/inc/usb_sil.h b/bsp/stm32_radio/Libraries/STM32_USB-FS-Device_Driver/inc/usb_sil.h deleted file mode 100644 index 974a9a217d..0000000000 --- a/bsp/stm32_radio/Libraries/STM32_USB-FS-Device_Driver/inc/usb_sil.h +++ /dev/null @@ -1,34 +0,0 @@ -/******************** (C) COPYRIGHT 2009 STMicroelectronics ******************** -* File Name : usb_sil.h -* Author : MCD Application Team -* Version : V3.1.0 -* Date : 10/30/2009 -* Description : Simplified Interface Layer function prototypes. -******************************************************************************** -* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS -* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. -* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, -* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE -* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING -* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __USB_SIL_H -#define __USB_SIL_H - -/* Includes ------------------------------------------------------------------*/ -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ -/* Exported macro ------------------------------------------------------------*/ -/* Exported functions ------------------------------------------------------- */ - -uint32_t USB_SIL_Init(void); -uint32_t USB_SIL_Write(uint8_t bEpAddr, uint8_t* pBufferPointer, uint32_t wBufferSize); -uint32_t USB_SIL_Read(uint8_t bEpAddr, uint8_t* pBufferPointer); - -/* External variables --------------------------------------------------------*/ - -#endif /* __USB_SIL_H */ - -/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/Libraries/STM32_USB-FS-Device_Driver/inc/usb_type.h b/bsp/stm32_radio/Libraries/STM32_USB-FS-Device_Driver/inc/usb_type.h deleted file mode 100644 index 6972ea318d..0000000000 --- a/bsp/stm32_radio/Libraries/STM32_USB-FS-Device_Driver/inc/usb_type.h +++ /dev/null @@ -1,74 +0,0 @@ -/******************** (C) COPYRIGHT 2009 STMicroelectronics ******************** -* File Name : usb_type.h -* Author : MCD Application Team -* Version : V3.1.0 -* Date : 10/30/2009 -* Description : Type definitions used by the USB Library -******************************************************************************** -* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS -* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. -* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, -* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE -* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING -* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __USB_TYPE_H -#define __USB_TYPE_H - -/* Includes ------------------------------------------------------------------*/ -#include "usb_conf.h" - -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ -#ifndef NULL -#define NULL ((void *)0) -#endif - -#ifndef __STM32F10x_H - -typedef signed long s32; -typedef signed short s16; -typedef signed char s8; - -typedef volatile signed long vs32; -typedef volatile signed short vs16; -typedef volatile signed char vs8; - -typedef unsigned long u32; -typedef unsigned short u16; -typedef unsigned char u8; - -typedef unsigned long const uc32; /* Read Only */ -typedef unsigned short const uc16; /* Read Only */ -typedef unsigned char const uc8; /* Read Only */ - -typedef volatile unsigned long vu32; -typedef volatile unsigned short vu16; -typedef volatile unsigned char vu8; - -typedef volatile unsigned long const vuc32; /* Read Only */ -typedef volatile unsigned short const vuc16; /* Read Only */ -typedef volatile unsigned char const vuc8; /* Read Only */ - - -typedef enum -{ - FALSE = 0, TRUE = !FALSE -} -bool; - -typedef enum { RESET = 0, SET = !RESET } FlagStatus, ITStatus; - -typedef enum { DISABLE = 0, ENABLE = !DISABLE} FunctionalState; - -typedef enum { ERROR = 0, SUCCESS = !ERROR} ErrorStatus; -#endif -/* Exported macro ------------------------------------------------------------*/ -/* Exported functions ------------------------------------------------------- */ -/* External variables --------------------------------------------------------*/ - -#endif /* __USB_TYPE_H */ - -/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/Libraries/STM32_USB-FS-Device_Driver/src/otgd_fs_cal.c b/bsp/stm32_radio/Libraries/STM32_USB-FS-Device_Driver/src/otgd_fs_cal.c deleted file mode 100644 index bf96829fd1..0000000000 --- a/bsp/stm32_radio/Libraries/STM32_USB-FS-Device_Driver/src/otgd_fs_cal.c +++ /dev/null @@ -1,1273 +0,0 @@ -/******************** (C) COPYRIGHT 2009 STMicroelectronics ******************** -* File Name : otgd_fs_cal.c -* Author : STMicroelectronics -* Version : V3.1.0 -* Date : 10/30/2009 -* Description : OTG FS Device Core Access Layer interface. -******************************************************************************** -* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS -* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. -* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, -* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE -* CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING -* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -#ifdef STM32F10X_CL - -/* Includes ------------------------------------------------------------------*/ -#include "otgd_fs_cal.h" -#include "usb_conf.h" -#include "otgd_fs_regs.h" - -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ -/* Private macro -------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ - -USB_OTG_CORE_REGS core_regs; - -/* Private function prototypes -----------------------------------------------*/ -static uint32_t GetMode(void); -static void EnableCommonInt(void); -static USB_OTG_Status SetID(void); -static USB_OTG_Status OTGD_FS_CoreReset(void); - -extern uint32_t STM32_USBH_OTG_ISR_Handler (void); -extern uint32_t STM32_PCD_OTG_ISR_Handler (void); -extern uint32_t STM32_USBO_OTG_ISR_Handler (void); - -#ifdef HOST_MODE_ENABLED -static void InitFSLSPClkSel(void); -#endif - - -/******************************************************************************/ -/* Common Core Layer */ -/******************************************************************************/ - -/******************************************************************************* -* Function Name : OTGD_FS_PhyInit -* Description : Initialize the phy -* Input : None -* Output : None -* Return : Status -*******************************************************************************/ -USB_OTG_Status OTGD_FS_PhyInit(void) -{ - USB_OTG_gpio_data gpioctl; - USB_OTG_usb_cfg_data usbcfg; - USB_OTG_Status status = USB_OTG_OK; - - /* Enable the I2C interface and deactivate the power down*/ - gpioctl.d32 = 0; - gpioctl.b.vbussensingB = 1; - gpioctl.b.pwdn = 1; - gpioctl.b.i2cifen = 0; - WRITE_REG32 (&core_regs.common_regs->gpio, gpioctl.d32); - mDELAY(200); - - /* Program GUSBCFG.OtgUtmifsSel to I2C*/ - usbcfg.d32 = READ_REG32(&core_regs.common_regs->usb_cfg); - usbcfg.b.otgutmifssel = 0; - WRITE_REG32 (&core_regs.common_regs->usb_cfg, usbcfg.d32); - - return status; -} -/******************************************************************************* -* Function Name : OTGD_FS_WritePacket -* Description : Writes a packet into the Tx FIFO associated with the EP -* Input : None -* Output : None -* Return : Status -*******************************************************************************/ -USB_OTG_Status OTGD_FS_WritePacket(uint8_t *src, uint8_t ch_ep_num, uint16_t bytes) -{ - USB_OTG_Status status = USB_OTG_OK; - uint32_t dword_count , i; - __IO uint32_t *fifo; - - /* Find the DWORD length, padded by extra bytes as neccessary if MPS - * is not a multiple of DWORD */ - dword_count = (bytes + 3) / 4; - - fifo = core_regs.data_fifo[ch_ep_num]; - - for (i = 0; i < dword_count; i++, src += 4) - { - WRITE_REG32( fifo, *((__packed uint32_t *)src) ); - } - - return status; -} -/******************************************************************************* -* Function Name : OTGD_FS_ReadPacket -* Description : Reads a packet from the Rx FIFO -* Input : None -* Output : None -* Return : status -*******************************************************************************/ -void* OTGD_FS_ReadPacket(uint8_t *dest, uint16_t bytes) -{ - uint32_t i; - uint32_t word_count = (bytes + 3) / 4; - - __IO uint32_t *fifo = core_regs.data_fifo[0]; - uint32_t *data_buff = (uint32_t *)dest; - - for (i = 0; i < word_count; i++, data_buff++) - { - *data_buff = READ_REG32(fifo); - } - - /* Return the buffer pointer because if the transfer is composed of several packets, - the data of the next packet must be stored following the previous packet's data */ - return ((void *)data_buff); -} -/******************************************************************************* -* Function Name : EnableCommonInt -* Description : initializes the commmon interrupts, used in both device and - host modes -* Input : None -* Output : None -* Return : None -*******************************************************************************/ -static void EnableCommonInt(void) -{ - - USB_OTG_int_msk_data int_mask; - int_mask.d32 = 0; - - /* Clear any pending USB_OTG Interrupts */ - WRITE_REG32( &core_regs.common_regs->otg_int, 0xFFFFFFFF); - - /* Clear any pending common interrupts */ - WRITE_REG32( &core_regs.common_regs->int_sts, 0xFFFFFFFF); - - WRITE_REG32( &core_regs.common_regs->int_msk, int_mask.d32); -} -/******************************************************************************* -* Function Name : OTGD_FS_SetAddress -* Description : Initialize core registers addresses. -* Input : BaseAddress -* Output : None -* Return : status -*******************************************************************************/ -USB_OTG_Status OTGD_FS_SetAddress(uint32_t BaseAddress) -{ - uint32_t i = 0; - USB_OTG_Status status = USB_OTG_OK; - core_regs.common_regs = (USB_OTG_common_regs *)(BaseAddress + USB_OTG_CORE_GLOBAL_REGS_OFFSET); - core_regs.dev_regs = (USB_OTG_dev_regs *) (BaseAddress + USB_OTG_DEV_GLOBAL_REG_OFFSET); - - for (i = 0; i < MAX_EPS_CHANNELS; i++) - { - core_regs.inep_regs[i] = (USB_OTG_dev_in_ep_regs *) (BaseAddress + USB_OTG_DEV_IN_EP_REG_OFFSET + (i * USB_OTG_EP_REG_OFFSET)); - core_regs.outep_regs[i] = (USB_OTG_dev_out_ep_regs *) (BaseAddress + USB_OTG_DEV_OUT_EP_REG_OFFSET + (i * USB_OTG_EP_REG_OFFSET)); - } - - core_regs.host_regs = (USB_OTG_host_regs *)(BaseAddress + USB_OTG_HOST_GLOBAL_REG_OFFSET); - core_regs.hprt0 = (uint32_t *)(BaseAddress + USB_OTG_HOST_PORT_REGS_OFFSET); - - for (i = 0; i < MAX_EPS_CHANNELS; i++) - { - core_regs.hc_regs[i] = (USB_OTG_hc_regs *)(BaseAddress + USB_OTG_HOST_CHAN_REGS_OFFSET + (i * USB_OTG_CHAN_REGS_OFFSET)); - } - - - for (i = 0; i < MAX_EPS_CHANNELS; i++) - { - core_regs.data_fifo[i] = (uint32_t *)(BaseAddress + USB_OTG_DATA_FIFO_OFFSET + (i * USB_OTG_DATA_FIFO_SIZE)); - } - - core_regs.pcgcctl = (uint32_t *)(BaseAddress + USB_OTG_PCGCCTL_OFFSET); - - return status; -} -/******************************************************************************* -* Function Name : OTGD_FS_CoreInit -* Description : Initialize the USB_OTG controller registers and prepares the core - for device mode or host mode operation. -* Input : None -* Output : None -* Return : Status -*******************************************************************************/ -USB_OTG_Status OTGD_FS_CoreInit(void) -{ - USB_OTG_Status status = USB_OTG_OK; - USB_OTG_usb_cfg_data usbcfg; - - usbcfg.d32 = 0; - - /* Reset the Controller */ - OTGD_FS_CoreReset(); - - usbcfg.d32 = READ_REG32(&core_regs.common_regs->usb_cfg); - usbcfg.b.physel = 1; - WRITE_REG32 (&core_regs.common_regs->usb_cfg, usbcfg.d32); - - /* init and configure the phy */ - OTGD_FS_PhyInit(); - - /* Reset after a PHY select and set Host mode */ - OTGD_FS_CoreReset(); - - /* Set Host or Device Mode */ - SetID(); - - return status; -} - -/******************************************************************************* -* Function Name : OTGD_FS_CoreReset -* Description : Soft reset of the core -* Input : None -* Output : None -* Return : Status -*******************************************************************************/ -static USB_OTG_Status OTGD_FS_CoreReset(void) -{ - USB_OTG_Status status = USB_OTG_OK; - __IO USB_OTG_rst_ctl_data greset; - uint32_t count = 0; - greset.d32 = 0; - - /* Wait for AHB master IDLE state. */ - do - { - uDELAY(3); - greset.d32 = READ_REG32(&core_regs.common_regs->rst_ctl); - if (++count > 200000) - { - return USB_OTG_OK; - } - } - while (greset.b.ahbidle == 0); - - /* Core Soft Reset */ - count = 0; - greset.b.csftrst = 1; - WRITE_REG32(&core_regs.common_regs->rst_ctl, greset.d32 ); - do - { - greset.d32 = READ_REG32(&core_regs.common_regs->rst_ctl); - if (++count > 200000) - { - break; - } - } - while (greset.b.csftrst == 1); - - /* Wait for 3 PHY Clocks*/ - uDELAY(10); - return status; -} - -/******************************************************************************* -* Function Name : OTGD_FS_EnableGlobalInt -* Description : Enables the controller's Global Int in the AHB Config reg -* Input : None -* Output : None -* Return : Status -*******************************************************************************/ -USB_OTG_Status OTGD_FS_EnableGlobalInt(void) -{ - USB_OTG_Status status = USB_OTG_OK; - USB_OTG_ahb_cfg_data ahb_cfg; - - ahb_cfg.d32 = 0; - ahb_cfg.b.glblintrmsk = 1; /* Enable interrupts */ - MODIFY_REG32(&core_regs.common_regs->ahb_cfg, 0, ahb_cfg.d32); - return status; -} - -/******************************************************************************* -* Function Name : OTGD_FS_DisableGlobalInt -* Description : Disables the controller's Global Int in the AHB Config reg -* Input : None -* Output : None -* Return : Status -*******************************************************************************/ -USB_OTG_Status OTGD_FS_DisableGlobalInt(void) -{ - USB_OTG_Status status = USB_OTG_OK; - USB_OTG_ahb_cfg_data ahbcfg; - - ahbcfg.d32 = 0; - ahbcfg.b.glblintrmsk = 1; /* Enable interrupts */ - MODIFY_REG32(&core_regs.common_regs->ahb_cfg, ahbcfg.d32, 0); - return status; -} - -/******************************************************************************* -* Function Name : OTGD_FS_FlushTxFifo -* Description : Flush a Tx FIFO -* Input : FIFO num -* Output : None -* Return : status -*******************************************************************************/ -USB_OTG_Status OTGD_FS_FlushTxFifo (uint32_t num ) -{ - - USB_OTG_Status status = USB_OTG_OK; - __IO USB_OTG_rst_ctl_data greset; - int count = 0; - - greset.d32 = 0; - greset.b.txfflsh = 1; - greset.b.txfnum = num; - WRITE_REG32( &core_regs.common_regs->rst_ctl, greset.d32 ); - - do - { - greset.d32 = READ_REG32( &core_regs.common_regs->rst_ctl); - if (++count > 200000) - { - break; - } - } - while (greset.b.txfflsh == 1); - - /* Wait for 3 PHY Clocks*/ - uDELAY(3); - - return status; -} - -/******************************************************************************* -* Function Name : OTGD_FS_FlushRxFifo -* Description : Flush a Rx FIFO -* Input : None -* Output : None -* Return : status -*******************************************************************************/ -USB_OTG_Status OTGD_FS_FlushRxFifo( void ) -{ - USB_OTG_Status status = USB_OTG_OK; - __IO USB_OTG_rst_ctl_data greset; - int count = 0; - - greset.d32 = 0; - greset.b.rxfflsh = 1; - WRITE_REG32( &core_regs.common_regs->rst_ctl, greset.d32 ); - - do - { - greset.d32 = READ_REG32( &core_regs.common_regs->rst_ctl); - if (++count > 200000) - { - break; - } - } - while (greset.b.rxfflsh == 1); - - /* Wait for 3 PHY Clocks*/ - uDELAY(3); - - return status; -} - -/******************************************************************************* -* Function Name : SetID -* Description : Set ID line -* Input : None -* Output : None -* Return : num_in_ep -*******************************************************************************/ -USB_OTG_Status SetID(void) -{ - - USB_OTG_Status status = USB_OTG_OK; - USB_OTG_usb_cfg_data usbcfg; - - usbcfg.d32 = READ_REG32(&core_regs.common_regs->usb_cfg); - - usbcfg.b.force_dev = 1; - - WRITE_REG32(&core_regs.common_regs->usb_cfg, usbcfg.d32); - - mDELAY(50); - - return status; -} - -/******************************************************************************* -* Function Name : GetMode -* Description : Get current mode -* Input : None -* Output : None -* Return : current mode -*******************************************************************************/ -static uint32_t GetMode(void) -{ - return (READ_REG32(&core_regs.common_regs->int_sts ) & 0x1); -} - -/******************************************************************************* -* Function Name : IsDeviceMode -* Description : Check if it is device mode -* Input : None -* Output : None -* Return : num_in_ep -*******************************************************************************/ -uint8_t IsDeviceMode(void) -{ - return (GetMode() != HOST_MODE); -} - -/******************************************************************************* -* Function Name : IsHostMode -* Description : Check if it is host mode -* Input : None -* Output : None -* Return : num_in_ep -*******************************************************************************/ -uint8_t IsHostMode(void) -{ - return (GetMode() == HOST_MODE); -} - -/******************************************************************************* -* Function Name : OTGD_FS_ReadCoreItr -* Description : returns the Core Interrupt register -* Input : None -* Output : None -* Return : None -*******************************************************************************/ -uint32_t OTGD_FS_ReadCoreItr(void) -{ - uint32_t v; - - v = READ_REG32(&core_regs.common_regs->int_sts); - v &= READ_REG32(&core_regs.common_regs->int_msk); - - return v; -} - -/******************************************************************************* -* Function Name : OTGD_FS_ReadOtgItr -* Description : returns the USB_OTG Interrupt register -* Input : None -* Output : None -* Return : None -*******************************************************************************/ -uint32_t OTGD_FS_ReadOtgItr (void) -{ - return (READ_REG32 (&core_regs.common_regs->otg_int)); -} - -/******************************************************************************/ -/* PCD Core Layer */ -/******************************************************************************/ - -/******************************************************************************* -* Function Name : InitDevSpeed -* Description : Initializes the DevSpd field of the DCFG register depending - on the PHY type and the enumeration speed of the device. -* Input : None -* Output : None -* Return : None -*******************************************************************************/ -static void InitDevSpeed(void) -{ - USB_OTG_dev_cfg_data dcfg; - - dcfg.d32 = READ_REG32(&core_regs.dev_regs->dev_cfg); - dcfg.b.devspd = 0x3; /* Full speed PHY */ - WRITE_REG32(&core_regs.dev_regs->dev_cfg, dcfg.d32); -} -/******************************************************************************* -* Function Name : OTGD_FS_CoreInitDev -* Description : Initialize the USB_OTG controller registers for device mode -* Input : None -* Output : None -* Return : Status -*******************************************************************************/ -USB_OTG_Status OTGD_FS_CoreInitDev (void) -{ - USB_OTG_Status status = USB_OTG_OK; - USB_OTG_dev_ep_ctl_data depctl; - uint32_t i; - - USB_OTG_dev_cfg_data dcfg; - USB_OTG_fifo_size_data nptxfifosize; - USB_OTG_fifo_size_data txfifosize; - USB_OTG_dev_in_ep_msk_data msk; - - dcfg.d32 = 0; - - /* Set device speed */ - InitDevSpeed (); - - /* Restart the Phy Clock */ - WRITE_REG32(core_regs.pcgcctl, 0); - - /* Device configuration register */ - dcfg.d32 = READ_REG32( &core_regs.dev_regs->dev_cfg); - dcfg.b.perfrint = DCFG_FRAME_INTERVAL_80; - WRITE_REG32( &core_regs.dev_regs->dev_cfg, dcfg.d32 ); - - /* set Rx FIFO size */ - WRITE_REG32( &core_regs.common_regs->rx_fifo_siz, RX_FIFO_SIZE); - - /* Non-periodic Tx FIFO */ - nptxfifosize.b.depth = DEV_NP_TX_FIFO_SIZE; - nptxfifosize.b.startaddr = RX_FIFO_SIZE; - - WRITE_REG32( &core_regs.common_regs->np_tx_fifo_siz, nptxfifosize.d32 ); - - txfifosize.b.depth = DEV_NP_TX_FIFO_SIZE; - WRITE_REG32( &core_regs.common_regs->dev_p_tx_fsiz_dieptxf[0], txfifosize.d32 ); - txfifosize.b.startaddr += txfifosize.b.depth; - txfifosize.b.startaddr = nptxfifosize.b.startaddr + nptxfifosize.b.depth; - - /* Flush the FIFOs */ - OTGD_FS_FlushTxFifo(0x10); /* all Tx FIFOs */ - OTGD_FS_FlushRxFifo(); - - /* Clear all pending Device Interrupts */ - WRITE_REG32( &core_regs.dev_regs->dev_in_ep_msk, 0 ); - WRITE_REG32( &core_regs.dev_regs->dev_out_ep_msk, 0 ); - WRITE_REG32( &core_regs.dev_regs->dev_all_int, 0xFFFFFFFF ); - WRITE_REG32( &core_regs.dev_regs->dev_all_int_msk, 0 ); - - for (i = 0; i <= MAX_TX_FIFOS; i++) - { - depctl.d32 = READ_REG32(&core_regs.inep_regs[i]->dev_in_ep_ctl); - if (depctl.b.epena) - { - depctl.d32 = 0; - depctl.b.epdis = 1; - depctl.b.snak = 1; - } - else - { - depctl.d32 = 0; - } - - WRITE_REG32( &core_regs.inep_regs[i]->dev_in_ep_ctl, depctl.d32); - - - WRITE_REG32( &core_regs.inep_regs[i]->dev_in_ep_txfer_siz, 0); - WRITE_REG32( &core_regs.inep_regs[i]->dev_in_ep_int, 0xFF); - } - - for (i = 0; i < 1/* NUM_OUT_EPS*/; i++) - { - depctl.d32 = READ_REG32(&core_regs.outep_regs[i]->dev_out_ep_ctl); - if (depctl.b.epena) - { - depctl.d32 = 0; - depctl.b.epdis = 1; - depctl.b.snak = 1; - } - else - { - depctl.d32 = 0; - } - - WRITE_REG32( &core_regs.outep_regs[i]->dev_out_ep_ctl, depctl.d32); - - WRITE_REG32( &core_regs.outep_regs[i]->dev_out_ep_txfer_siz, 0); - WRITE_REG32( &core_regs.outep_regs[i]->dev_out_ep_int, 0xFF); - } - - msk.d32 = 0; - msk.b.txfifoundrn = 1; - MODIFY_REG32(&core_regs.dev_regs->dev_in_ep_msk, msk.d32, msk.d32); - - OTGD_FS_EnableDevInt(); - - return status; -} -/******************************************************************************* -* Function Name : OTGD_FS_EnableDevInt -* Description : Enables the Device mode interrupts -* Input : None -* Output : None -* Return : status -*******************************************************************************/ -USB_OTG_Status OTGD_FS_EnableDevInt(void) -{ - - USB_OTG_Status status = USB_OTG_OK; - USB_OTG_int_msk_data intr_mask; - - intr_mask.d32 = 0; - - /* Disable all interrupts. */ - WRITE_REG32( &core_regs.common_regs->int_msk, 0); - - /* Clear any pending interrupts */ - WRITE_REG32( &core_regs.common_regs->int_sts, 0xFFFFFFFF); - - /* Enable the common interrupts */ - EnableCommonInt(); - - /* Enable the defined interrupts*/ -#ifdef INTR_MODEMISMATCH - intr_mask.b.modemismatch = 1; -#endif /* INTR_MODEMISMATCH */ -#ifdef INTR_SOFINTR - intr_mask.b.sofintr = 1; -#endif /* INTR_SOFINTR */ -#ifdef INTR_RXSTSQLVL - intr_mask.b.rxstsqlvl = 1; -#endif /* INTR_RXSTSQLVL */ -#ifdef INTR_NPTXFEMPTY - intr_mask.b.nptxfempty = 1; -#endif /* INTR_NPTXFEMPTY */ -#ifdef INTR_GINNAKEFF - intr_mask.b.ginnakeff = 1; -#endif /* INTR_GINNAKEFF */ -#ifdef INTR_GOUTNAKEFF - intr_mask.b.goutnakeff = 1; -#endif /* INTR_GOUTNAKEFF */ -#ifdef INTR_ERLYSUSPEND - intr_mask.b.erlysuspend = 1; -#endif /* INTR_ERLYSUSPEND */ -#ifdef INTR_USBSUSPEND - intr_mask.b.usbsuspend = 1; -#endif /* INTR_USBSUSPEND */ -#ifdef INTR_USBRESET - intr_mask.b.usbreset = 1; -#endif /* INTR_USBRESET */ -#ifdef INTR_ENUMDONE - intr_mask.b.enumdone = 1; -#endif /* INTR_ENUMDONE */ -#ifdef INTR_ISOOUTDROP - intr_mask.b.isooutdrop = 1; -#endif /* INTR_ISOOUTDROP */ -#ifdef INTR_EOPFRAME - intr_mask.b.eopframe = 1; -#endif /* INTR_EOPFRAME */ -#ifdef INTR_EPMISMATCH - intr_mask.b.epmismatch = 1; -#endif /* INTR_EPMISMATCH */ -#ifdef INTR_INEPINTR - intr_mask.b.inepintr = 1; -#endif /* INTR_INEPINTR */ -#ifdef INTR_OUTEPINTR - intr_mask.b.outepintr = 1; -#endif /* INTR_OUTEPINTR */ -#ifdef INTR_INCOMPLISOIN - intr_mask.b.incomplisoin = 1; -#endif /* INTR_INCOMPLISOIN */ -#ifdef INTR_INCOMPLISOOUT - intr_mask.b.incomplisoout = 1; -#endif /* INTR_INCOMPLISOOUT */ -#ifdef INTR_DISCONNECT - intr_mask.b.disconnect = 1; -#endif /* INTR_DISCONNECT */ -#ifdef INTR_WKUPINTR - intr_mask.b.wkupintr = 1; -#endif /* INTR_WKUPINTR */ - - MODIFY_REG32( &core_regs.common_regs->int_msk, intr_mask.d32, intr_mask.d32); - return status; - -} -/******************************************************************************* -* Function Name : OTGD_FS_EP0Activate -* Description : enables EP0 OUT to receive SETUP packets and configures EP0 - IN for transmitting packets -* Input : None -* Output : None -* Return : status -*******************************************************************************/ -USB_OTG_Status OTGD_FS_EP0Activate(void) -{ - USB_OTG_Status status = USB_OTG_OK; - USB_OTG_dev_sts_data dsts; - USB_OTG_dev_ep_ctl_data diepctl; - USB_OTG_dev_ctl_data dctl; - - dctl.d32 = 0; - /* Read the Device Status and Endpoint 0 Control registers */ - dsts.d32 = READ_REG32(&core_regs.dev_regs->dev_sts); - diepctl.d32 = READ_REG32(&core_regs.inep_regs[0]->dev_in_ep_ctl); - - /* Set the MPS of the IN EP based on the enumeration speed */ - switch (dsts.b.enumspd) - { - case DSTS_ENUMSPD_HS_PHY_30MHZ_OR_60MHZ: - case DSTS_ENUMSPD_FS_PHY_30MHZ_OR_60MHZ: - case DSTS_ENUMSPD_FS_PHY_48MHZ: - diepctl.b.mps = DEP0CTL_MPS_64; - break; - case DSTS_ENUMSPD_LS_PHY_6MHZ: - diepctl.b.mps = DEP0CTL_MPS_8; - break; - } - - WRITE_REG32(&core_regs.inep_regs[0]->dev_in_ep_ctl, diepctl.d32); - dctl.b.cgnpinnak = 1; - MODIFY_REG32(&core_regs.dev_regs->dev_ctl, dctl.d32, dctl.d32); - return status; -} -/******************************************************************************* -* Function Name : OTGD_FS_EPActivate -* Description : Activates an EP -* Input : ep -* Output : None -* Return : num_in_ep -*******************************************************************************/ -USB_OTG_Status OTGD_FS_EPActivate(USB_OTG_EP *ep) -{ - - USB_OTG_Status status = USB_OTG_OK; - USB_OTG_dev_ep_ctl_data depctl; - __IO uint32_t *addr; - USB_OTG_dev_all_int_data daintmsk; - daintmsk.d32 = 0; - - /* Read DEPCTLn register */ - if (ep->is_in == 1) - { - addr = &core_regs.inep_regs[ep->num]->dev_in_ep_ctl; - daintmsk.ep.in = 1 << ep->num; - } - else - { - addr = &core_regs.outep_regs[ep->num]->dev_out_ep_ctl; - daintmsk.ep.out = 1 << ep->num; - } - - /* If the EP is already active don't change the EP Control - * register. */ - depctl.d32 = READ_REG32(addr); - if (!depctl.b.usbactep) - { - depctl.b.mps = ep->maxpacket; - depctl.b.eptype = ep->type; - depctl.b.txfnum = ep->tx_fifo_num; - depctl.b.setd0pid = 1; - depctl.b.usbactep = 1; - WRITE_REG32(addr, depctl.d32); - } - - /* Enable the Interrupt for this EP */ - MODIFY_REG32(&core_regs.dev_regs->dev_all_int_msk, 0, daintmsk.d32); - return status; -} - -/******************************************************************************* -* Function Name : OTGD_FS_EPDeactivate -* Description : Deactivates an EP -* Input : ep -* Output : None -* Return : num_in_ep -*******************************************************************************/ -USB_OTG_Status OTGD_FS_EPDeactivate(USB_OTG_EP *ep) -{ - - USB_OTG_Status status = USB_OTG_OK; - USB_OTG_dev_ep_ctl_data depctl; - __IO uint32_t *addr; - USB_OTG_dev_all_int_data daintmsk; - depctl.d32 = 0; - daintmsk.d32 = 0; - - /* Read DEPCTLn register */ - if (ep->is_in == 1) - { - addr = &core_regs.inep_regs[ep->num]->dev_in_ep_ctl; - daintmsk.ep.in = 1 << ep->num; - } - else - { - addr = &core_regs.outep_regs[ep->num]->dev_out_ep_ctl; - daintmsk.ep.out = 1 << ep->num; - } - - depctl.b.usbactep = 0; - WRITE_REG32(addr, depctl.d32); - - /* Disable the Interrupt for this EP */ - MODIFY_REG32(&core_regs.dev_regs->dev_all_int_msk, daintmsk.d32, 0); - return status; -} - -/******************************************************************************* -* Function Name : OTGD_FS_EPStartXfer -* Description : Handle the setup for data xfer for an EP and starts the xfer -* Input : None -* Output : None -* Return : status -*******************************************************************************/ -USB_OTG_Status OTGD_FS_EPStartXfer(USB_OTG_EP *ep) -{ - - USB_OTG_Status status = USB_OTG_OK; - __IO USB_OTG_dev_ep_ctl_data depctl; - USB_OTG_dev_ep_txfer_siz_data deptsiz; - - /* IN endpoint */ - if (ep->is_in == 1) - { - - depctl.d32 = READ_REG32(&(core_regs.inep_regs[ep->num]->dev_in_ep_ctl)); - deptsiz.d32 = READ_REG32(&(core_regs.inep_regs[ep->num]->dev_in_ep_txfer_siz)); - - /* Zero Length Packet? */ - if (ep->xfer_len == 0) - { - deptsiz.b.xfersize = 0; - deptsiz.b.pktcnt = 1; - - } - else - { - /* Program the transfer size and packet count - * as follows: xfersize = N * maxpacket + - * short_packet pktcnt = N + (short_packet - * exist ? 1 : 0) - */ - deptsiz.b.xfersize = ep->xfer_len; - deptsiz.b.pktcnt = (ep->xfer_len - 1 + ep->maxpacket) / ep->maxpacket; - } - WRITE_REG32(&core_regs.inep_regs[ep->num]->dev_in_ep_txfer_siz, deptsiz.d32); - - if (ep->type != EP_TYPE_ISOC) - { - /* Enable the Tx FIFO Empty Interrupt for this EP */ - uint32_t fifoemptymsk = 0; - fifoemptymsk = 1 << ep->num; - MODIFY_REG32(&core_regs.dev_regs->dev_fifo_empty_msk, 0, fifoemptymsk); - } - - /* EP enable, IN data in FIFO */ - depctl.b.cnak = 1; - depctl.b.epena = 1; - WRITE_REG32(&core_regs.inep_regs[ep->num]->dev_in_ep_ctl, depctl.d32); - - depctl.d32 = READ_REG32 (&core_regs.inep_regs[0]->dev_in_ep_ctl); - depctl.b.nextep = ep->num; - WRITE_REG32 (&core_regs.inep_regs[0]->dev_in_ep_ctl, depctl.d32); - } - else - { - /* OUT endpoint */ - depctl.d32 = READ_REG32(&(core_regs.outep_regs[ep->num]->dev_out_ep_ctl)); - deptsiz.d32 = READ_REG32(&(core_regs.outep_regs[ep->num]->dev_out_ep_txfer_siz)); - - /* Program the transfer size and packet count as follows: - * pktcnt = N - * xfersize = N * maxpacket - */ - if (ep->xfer_len == 0) - { - deptsiz.b.xfersize = ep->maxpacket; - deptsiz.b.pktcnt = 1; - } - else - { - deptsiz.b.pktcnt = (ep->xfer_len + (ep->maxpacket - 1)) / ep->maxpacket; - deptsiz.b.xfersize = deptsiz.b.pktcnt * ep->maxpacket; - } - WRITE_REG32(&core_regs.outep_regs[ep->num]->dev_out_ep_txfer_siz, deptsiz.d32); - - if (ep->type == EP_TYPE_ISOC) - { - - if (ep->even_odd_frame) - { - depctl.b.setd1pid = 1; - } - else - { - depctl.b.setd0pid = 1; - } - } - - /* EP enable */ - depctl.b.cnak = 1; - depctl.b.epena = 1; - - WRITE_REG32(&core_regs.outep_regs[ep->num]->dev_out_ep_ctl, depctl.d32); - - } - return status; -} - -/******************************************************************************* -* Function Name : OTGD_FS_EP0StartXfer -* Description : Handle the setup for a data xfer for EP0 and starts the xfer -* Input : None -* Output : None -* Return : status -*******************************************************************************/ -USB_OTG_Status OTGD_FS_EP0StartXfer(USB_OTG_EP *ep) -{ - - USB_OTG_Status status = USB_OTG_OK; - uint32_t fifoemptymsk = 0; - USB_OTG_dev_ep_ctl_data depctl; - USB_OTG_dev_ep_txfer_size0_data deptsiz; - USB_OTG_dev_in_ep_regs *in_regs ; - - /* IN endpoint */ - if (ep->is_in == 1) - { - in_regs = core_regs.inep_regs[0]; - depctl.d32 = READ_REG32(&in_regs->dev_in_ep_ctl); - deptsiz.d32 = READ_REG32(&in_regs->dev_in_ep_txfer_siz); - - /* Zero Length Packet? */ - if (ep->xfer_len == 0) - { - deptsiz.b.xfersize = 0; - deptsiz.b.pktcnt = 1; - } - else - { - if (ep->xfer_len > ep->maxpacket) - { - ep->xfer_len = ep->maxpacket; - deptsiz.b.xfersize = ep->maxpacket; - } - else - { - deptsiz.b.xfersize = ep->xfer_len; - } - deptsiz.b.pktcnt = 1; - - } - WRITE_REG32(&in_regs->dev_in_ep_txfer_siz, deptsiz.d32); - - /* EP enable, IN data in FIFO */ - depctl.b.cnak = 1; - depctl.b.epena = 1; - WRITE_REG32(&in_regs->dev_in_ep_ctl, depctl.d32); - - /* Enable the Tx FIFO Empty Interrupt for this EP */ - if (ep->xfer_len > 0) - { - fifoemptymsk |= 1 << ep->num; - MODIFY_REG32(&core_regs.dev_regs->dev_fifo_empty_msk, 0, fifoemptymsk); - } - } - else - { - /* OUT endpoint */ - depctl.d32 = READ_REG32(&core_regs.outep_regs[ep->num]->dev_out_ep_ctl); - deptsiz.d32 = READ_REG32(&core_regs.outep_regs[ep->num]->dev_out_ep_txfer_siz); - - /* Program the transfer size and packet count as follows: - * xfersize = N * (maxpacket + 4 - (maxpacket % 4)) - * pktcnt = N */ - if (ep->xfer_len == 0) - { - deptsiz.b.xfersize = ep->maxpacket; - deptsiz.b.pktcnt = 1; - } - else - { - deptsiz.b.pktcnt = (ep->xfer_len + (ep->maxpacket - 1)) / ep->maxpacket; - deptsiz.b.xfersize = deptsiz.b.pktcnt * ep->maxpacket; - } - - WRITE_REG32(&core_regs.outep_regs[ep->num]->dev_out_ep_txfer_siz, deptsiz.d32); - - /* EP enable */ - depctl.b.cnak = 1; - depctl.b.epena = 1; - WRITE_REG32 (&(core_regs.outep_regs[ep->num]->dev_out_ep_ctl), depctl.d32); - } - return status; -} -/******************************************************************************* -* Function Name : OTGD_FS_EPSetStall -* Description : Set the EP STALL -* Input : None -* Output : None -* Return : Status -*******************************************************************************/ -USB_OTG_Status OTGD_FS_EPSetStall(USB_OTG_EP *ep) -{ - USB_OTG_Status status = USB_OTG_OK; - USB_OTG_dev_ep_ctl_data depctl; - __IO uint32_t *depctl_addr; - - if (ep->is_in == 1) - { - depctl_addr = &(core_regs.inep_regs[ep->num]->dev_in_ep_ctl); - depctl.d32 = READ_REG32(depctl_addr); - - /* set the disable and stall bits */ - if (depctl.b.epena) - { - depctl.b.epdis = 1; - } - depctl.b.stall = 1; - WRITE_REG32(depctl_addr, depctl.d32); - } - else - { - depctl_addr = &(core_regs.outep_regs[ep->num]->dev_out_ep_ctl); - depctl.d32 = READ_REG32(depctl_addr); - - /* set the stall bit */ - depctl.b.stall = 1; - WRITE_REG32(depctl_addr, depctl.d32); - } - return status; -} - -/******************************************************************************* -* Function Name : OTGD_FS_EPClearStall -* Description : Clear the EP STALL -* Input : None -* Output : None -* Return : Status -*******************************************************************************/ -USB_OTG_Status OTGD_FS_EPClearStall(USB_OTG_EP *ep) -{ - USB_OTG_Status status = USB_OTG_OK; - USB_OTG_dev_ep_ctl_data depctl; - __IO uint32_t *depctl_addr; - - if (ep->is_in == 1) - { - depctl_addr = &(core_regs.inep_regs[ep->num]->dev_in_ep_ctl); - } - else - { - depctl_addr = &(core_regs.outep_regs[ep->num]->dev_out_ep_ctl); - } - - - depctl.d32 = READ_REG32(depctl_addr); - - /* clear the stall bits */ - depctl.b.stall = 0; - - if (ep->type == EP_TYPE_INTR || ep->type == EP_TYPE_BULK) - { - depctl.b.setd0pid = 1; /* DATA0 */ - } - - WRITE_REG32(depctl_addr, depctl.d32); - return status; -} - -/******************************************************************************* -* Function Name : OTGD_FS_ReadDevAllOutEp_itr -* Description : returns the OUT endpoint interrupt bits -* Input : None -* Output : None -* Return : None -*******************************************************************************/ -uint32_t OTGD_FS_ReadDevAllOutEp_itr(void) -{ - uint32_t v; - v = READ_REG32(&core_regs.dev_regs->dev_all_int); - v &= READ_REG32(&core_regs.dev_regs->dev_all_int_msk); - return ((v & 0xffff0000) >> 16); -} - -/******************************************************************************* -* Function Name : OTGD_FS_ReadDevOutEP_itr -* Description : returns the Device OUT EP Interrupt register -* Input : None -* Output : None -* Return : None -*******************************************************************************/ -uint32_t OTGD_FS_ReadDevOutEP_itr(USB_OTG_EP *ep) -{ - uint32_t v; - v = READ_REG32(&core_regs.outep_regs[ep->num]->dev_out_ep_int); - v &= READ_REG32(&core_regs.dev_regs->dev_out_ep_msk); - return v; -} -/******************************************************************************* -* Function Name : OTGD_FS_ReadDevAllInEPItr -* Description : Get int status register -* Input : None -* Output : None -* Return : None -*******************************************************************************/ -uint32_t OTGD_FS_ReadDevAllInEPItr(void) -{ - uint32_t v; - v = READ_REG32(&core_regs.dev_regs->dev_all_int); - v &= READ_REG32(&core_regs.dev_regs->dev_all_int_msk); - return (v & 0xffff); -} - -/******************************************************************************* -* Function Name : OTGD_FS_Dev_GetEPStatus -* Description : returns the EP Status -* Input : - ep: pointer to the EP structure -* Output : None -* Return : status: DEV_EP_TX_STALL, DEV_EP_TX_VALID, DEV_EP_TX_NAK, -* DEV_EP_RX_STALL, DEV_EP_RX_VALID or DEV_EP_RX_NAK, -*******************************************************************************/ -uint32_t OTGD_FS_Dev_GetEPStatus(USB_OTG_EP *ep) -{ - USB_OTG_dev_ep_ctl_data depctl; - __IO uint32_t *depctl_addr; - uint32_t Status = 0; - - if (ep->is_in == 1) - { - depctl_addr = &(core_regs.inep_regs[ep->num]->dev_in_ep_ctl); - } - else - { - depctl_addr = &(core_regs.outep_regs[ep->num]->dev_out_ep_ctl); - } - - depctl.d32 = READ_REG32(depctl_addr); - - /* Process for IN endpoint */ - if (ep->is_in == 1) - { - if (depctl.b.stall == 1) - Status = DEV_EP_TX_STALL; - else if (depctl.b.naksts == 1) - Status = DEV_EP_TX_NAK; - else - Status = DEV_EP_TX_VALID; - } - /* Process for OUT endpoint */ - else - { - if (depctl.b.stall == 1) - Status = DEV_EP_RX_STALL; - else if (depctl.b.naksts == 1) - Status = DEV_EP_RX_NAK; - else - Status = DEV_EP_RX_VALID; - } - - /* Return the current status */ - return Status; -} - -/******************************************************************************* -* Function Name : OTGD_FS_Dev_SetEPStatus -* Description : Sets the EP Status -* Input : - ep: pointer to the EP structure -* - Status: new status to be set -* Output : None -* Return : None -*******************************************************************************/ -void OTGD_FS_Dev_SetEPStatus(USB_OTG_EP *ep, uint32_t Status) -{ - USB_OTG_dev_ep_ctl_data depctl; - __IO uint32_t *depctl_addr; - - if (ep->is_in == 1) - { - depctl_addr = &(core_regs.inep_regs[ep->num]->dev_in_ep_ctl); - } - else - { - depctl_addr = &(core_regs.outep_regs[ep->num]->dev_out_ep_ctl); - } - - depctl.d32 = READ_REG32(depctl_addr); - - /* Process for IN endpoint */ - if (ep->is_in == 1) - { - if (Status == DEV_EP_TX_STALL) - { - OTGD_FS_EPSetStall(ep); return; - } - else if (Status == DEV_EP_TX_NAK) - depctl.b.snak = 1; - else if (Status == DEV_EP_TX_VALID) - { - if (depctl.b.stall == 1) - { - ep->even_odd_frame = 0; - OTGD_FS_EPClearStall(ep); - return; - } - depctl.b.cnak = 1; - depctl.b.usbactep = 1; - depctl.b.epena = 1; - } - else if (Status == DEV_EP_TX_DIS) - depctl.b.usbactep = 0; - } - else /* Process for OUT endpoint */ - { - if (Status == DEV_EP_RX_STALL) - depctl.b.stall = 1; - else if (Status == DEV_EP_RX_NAK) - depctl.b.snak = 1; - else if (Status == DEV_EP_RX_VALID) - { - if (depctl.b.stall == 1) - { - ep->even_odd_frame = 0; - OTGD_FS_EPClearStall(ep); - return; - } - depctl.b.cnak = 1; - depctl.b.usbactep = 1; - depctl.b.epena = 1; - } - else if (Status == DEV_EP_RX_DIS) - { - depctl.b.usbactep = 0; - } - } - - if (ep->type == EP_TYPE_INTR || ep->type == EP_TYPE_BULK) - { - depctl.b.setd0pid = 1; /* DATA0 */ - } - - WRITE_REG32(depctl_addr, depctl.d32); -} - -/******************************************************************************* -* Function Name : OTGD_FS_Dev_SetRemoteWakeup -* Description : Enable Remote wakeup signaling -* Input : None -* Output : None -* Return : status -*******************************************************************************/ -void OTGD_FS_Dev_SetRemoteWakeup() -{ - USB_OTG_dev_ctl_data devctl; - __IO uint32_t *dctl_addr; - - dctl_addr = &(core_regs.dev_regs->dev_ctl); - - devctl.d32 = READ_REG32( dctl_addr); - - /* Enable the Remote Wakeup signal */ - devctl.b.rmtwkupsig = 1; - - WRITE_REG32(dctl_addr, devctl.d32); -} - -/******************************************************************************* -* Function Name : OTGD_FS_Dev_ResetRemoteWakeup -* Description : Disable Remote wakeup signaling -* Input : None -* Output : None -* Return : status -*******************************************************************************/ -void OTGD_FS_Dev_ResetRemoteWakeup() -{ - USB_OTG_dev_ctl_data devctl; - __IO uint32_t *dctl_addr; - - dctl_addr = &(core_regs.dev_regs->dev_ctl); - - devctl.d32 = READ_REG32( dctl_addr); - - /* Disable the Remote Wakeup signal */ - devctl.b.rmtwkupsig = 0; - - - WRITE_REG32(dctl_addr, devctl.d32); -} -#endif /* STM32F10X_CL */ -/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/Libraries/STM32_USB-FS-Device_Driver/src/otgd_fs_dev.c b/bsp/stm32_radio/Libraries/STM32_USB-FS-Device_Driver/src/otgd_fs_dev.c deleted file mode 100644 index 0ef31fa5ec..0000000000 --- a/bsp/stm32_radio/Libraries/STM32_USB-FS-Device_Driver/src/otgd_fs_dev.c +++ /dev/null @@ -1,385 +0,0 @@ -/******************** (C) COPYRIGHT 2009 STMicroelectronics ******************** -* File Name : otgd_fs_dev.c -* Author : STMicroelectronics -* Version : V3.1.0 -* Date : 10/30/2009 -* Description : High Layer device mode interface and wrapping layer. -******************************************************************************** -* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS -* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. -* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, -* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE -* CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING -* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -#ifdef STM32F10X_CL - -/* Includes ------------------------------------------------------------------*/ -#include "otgd_fs_dev.h" -#include "usb_regs.h" -#include "otgd_fs_cal.h" -#include "otgd_fs_pcd.h" - -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ -/* Private macro -------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/* Extern variables ----------------------------------------------------------*/ -/* Private function prototypes -----------------------------------------------*/ - -/* Private functions ---------------------------------------------------------*/ - -/******************************************************************************* -* Function Name : OTG_DEV_Init -* Description : Initialize the OTG Device IP and EP0. -* Input : None. -* Output : None. -* Return : None. -*******************************************************************************/ -void OTG_DEV_Init(void) -{ - EP_DESCRIPTOR ep_descriptor; - USB_OTG_EP *ep; - - /* Set the OTG_USB base registers address */ - OTGD_FS_SetAddress(USB_OTG_FS1_BASE_ADDR); - - /* Disable all global interrupts */ - OTGD_FS_DisableGlobalInt(); - - /*Init the Core (common init.) */ - OTGD_FS_CoreInit(); - - /* Init Device */ - OTGD_FS_CoreInitDev(); - - /* Init internal driver structure */ - OTGD_FS_PCD_Init(); - - /* Configure and open the IN control EP0 */ - ep_descriptor.bEndpointAddress = 0x80; - ep_descriptor.wMaxPacketSize = 64; - ep_descriptor.bmAttributes = USB_ENDPOINT_XFER_CONTROL; - OTGD_FS_PCD_EP_Open(&ep_descriptor); - - /* Configure and open the OUT control EP0 */ - ep_descriptor.bEndpointAddress = 0x00; - OTGD_FS_PCD_EP_Open(&ep_descriptor); - - - ep = OTGD_FS_PCD_GetOutEP(0); - OTGD_FS_EPStartXfer(ep); - - /* Enable EP0 to start receiving setup packets */ - OTGD_FS_PCD_EP0_OutStart(); - - /* Enable USB Global interrupt */ - OTGD_FS_EnableGlobalInt(); -} - - -/******************************************************************************* -* Function Name : OTG_DEV_EP_Init -* Description : Initialize the selected endpoint parameters -* Input : - bEpAdd: address of the endpoint (epnum|epdir) -* expample: EP1 OUT -> 0x01 and EP1 IN 0x81. -* - bEpType: OTG_DEV_EP_TYPE_CONTROL, OTG_DEV_EP_TYPE_ISOC, -* OTG_DEV_EP_TYPE_BULK, OTG_DEV_EP_TYPE_INT -* - wEpMaxPackSize: The EP max packet size. -* Output : None. -* Return : Status: New status to be set for the endpoint: -*******************************************************************************/ -void OTG_DEV_EP_Init(uint8_t bEpAdd, uint8_t bEpType, uint16_t wEpMaxPackSize) -{ - EP_DESCRIPTOR ep_descriptor; - USB_OTG_EP *ep; - - /* Set the EP parameters in a structure */ - ep_descriptor.bEndpointAddress = bEpAdd; - ep_descriptor.bmAttributes = bEpType; - ep_descriptor.wMaxPacketSize = wEpMaxPackSize; - - OTGD_FS_PCD_EP_Flush(bEpAdd); - - /* Open the EP with entered parameters */ - OTGD_FS_PCD_EP_Open(&ep_descriptor); - - /* Activate the EP if it is an OUT EP */ - if ((bEpAdd & 0x80) == 0) - { - ep = OTGD_FS_PCD_GetOutEP(bEpAdd & 0x7F); - OTGD_FS_EPStartXfer(ep); - } - else - { - ep = OTGD_FS_PCD_GetInEP(bEpAdd & 0x7F); - ep->even_odd_frame = 0; - OTG_DEV_SetEPTxStatus(bEpAdd, DEV_EP_TX_NAK); - } - -} - -/******************************************************************************* -* Function Name : OTG_DEV_GetEPTxStatus -* Description : Set the related endpoint status. -* Input : Number of the endpoint. -* Output : None. -* Return : Status: New status to be set for the endpoint: -*******************************************************************************/ -uint32_t OTG_DEV_GetEPTxStatus(uint8_t bEpnum) -{ - USB_OTG_EP *ep; - uint32_t status = 0; - - ep = OTGD_FS_PCD_GetInEP(bEpnum & 0x7F); - - status = OTGD_FS_Dev_GetEPStatus(ep); - - return status; -} - -/******************************************************************************* -* Function Name : OTG_DEV_GetEPRxStatus -* Description : returns the related endpoint status. -* Input : Number of the endpoint. -* Output : None. -* Return : Status: New status to be set for the endpoint: -*******************************************************************************/ -uint32_t OTG_DEV_GetEPRxStatus(uint8_t bEpnum) -{ - USB_OTG_EP *ep; - uint32_t status = 0; - - ep = OTGD_FS_PCD_GetOutEP(bEpnum & 0x7F); - - status = OTGD_FS_Dev_GetEPStatus(ep); - - return status; -} - -/******************************************************************************* -* Function Name : OTG_DEV_SetEPTxStatus -* Description : Sets the related endpoint status. -* Input : - bEpnum: Number of the endpoint. -* - Status: New status to be set for the endpoint. It can be -* DEV_EP_TX_VALID, DEV_EP_TX_STALL, DEV_EP_TX_NAK or -* DEV_EP_TX_DISABLE. -* Output : None. -* Return : None. -*******************************************************************************/ -void OTG_DEV_SetEPTxStatus(uint8_t bEpnum, uint32_t Status) -{ - USB_OTG_EP *ep; - - ep = OTGD_FS_PCD_GetInEP(bEpnum & 0x7F); - - if ((bEpnum == 0x80) && (Status == DEV_EP_TX_STALL)) - { - ep->is_in = 1; - } - - OTGD_FS_Dev_SetEPStatus(ep, Status); -} - -/******************************************************************************* -* Function Name : OTG_DEV_SetEPRxStatus -* Description : Sets the related endpoint status. -* Input : - bEpnum: Number of the endpoint. -* - Status: New status to be set for the endpoint. It can be -* DEV_EP_RX_VALID, DEV_EP_RX_STALL, DEV_EP_RX_NAK or -* DEV_EP_RX_DISABLE. -* Output : None. -* Return : None. -*******************************************************************************/ -void OTG_DEV_SetEPRxStatus(uint8_t bEpnum, uint32_t Status) -{ - USB_OTG_EP *ep; - - ep = OTGD_FS_PCD_GetOutEP(bEpnum & 0x7F); - - OTGD_FS_Dev_SetEPStatus(ep, Status); -} - -/******************************************************************************* -* Function Name : USB_DevDisconnect -* Description : Disconnect the Pullup resist. -* Input : bEpNum: Endpoint Number. -* wState: new state. -* Output : None. -* Return : None. -*******************************************************************************/ -void USB_DevDisconnect(void) -{ - OTGD_FS_PCD_DevDisconnect(); -} - -/******************************************************************************* -* Function Name : USB_DevConnect -* Description : Disconnect the . -* Input : bEpNum: Endpoint Number. -* wState: new state. -* Output : None. -* Return : None. -*******************************************************************************/ -void USB_DevConnect(void) -{ - OTGD_FS_PCD_DevConnect(); -} - -/*-*-*-*-*-*-*-*-*-* Replace the usb_regs.h defines -*-*-*-*-*-*-*-*-*-*-*-*-*/ - -/******************************************************************************* -* Function Name : SetEPTxStatus -* Description : Set the status of Tx endpoint. -* Input : bEpNum: Endpoint Number. -* wState: new state. -* Output : None. -* Return : None. -*******************************************************************************/ -void SetEPTxStatus(uint8_t bEpNum, uint16_t wState) -{ - _SetEPTxStatus(bEpNum, wState); -} - -/******************************************************************************* -* Function Name : SetEPRxStatus -* Description : Set the status of Rx endpoint. -* Input : bEpNum: Endpoint Number. -* wState: new state. -* Output : None. -* Return : None. -*******************************************************************************/ -void SetEPRxStatus(uint8_t bEpNum, uint16_t wState) -{ - _SetEPRxStatus(bEpNum, wState); -} - -/******************************************************************************* -* Function Name : GetEPTxStatus -* Description : Returns the endpoint Tx status. -* Input : bEpNum: Endpoint Number. -* Output : None. -* Return : Endpoint TX Status -*******************************************************************************/ -uint16_t GetEPTxStatus(uint8_t bEpNum) -{ - return(_GetEPTxStatus(bEpNum)); -} - -/******************************************************************************* -* Function Name : GetEPRxStatus -* Description : Returns the endpoint Rx status. -* Input : bEpNum: Endpoint Number. -* Output : None. -* Return : Endpoint RX Status -*******************************************************************************/ -uint16_t GetEPRxStatus(uint8_t bEpNum) -{ - return(_GetEPRxStatus(bEpNum)); -} - -/******************************************************************************* -* Function Name : SetEPTxValid -* Description : Valid the endpoint Tx Status. -* Input : bEpNum: Endpoint Number. -* Output : None. -* Return : None. -*******************************************************************************/ -void SetEPTxValid(uint8_t bEpNum) -{ - _SetEPTxStatus(bEpNum, EP_TX_VALID); -} - -/******************************************************************************* -* Function Name : SetEPRxValid -* Description : Valid the endpoint Rx Status. -* Input : bEpNum: Endpoint Number. -* Output : None. -* Return : None. -*******************************************************************************/ -void SetEPRxValid(uint8_t bEpNum) -{ - _SetEPRxStatus(bEpNum, EP_RX_VALID); -} - -/******************************************************************************* -* Function Name : GetTxStallStatus -* Description : Returns the Stall status of the Tx endpoint. -* Input : bEpNum: Endpoint Number. -* Output : None. -* Return : Tx Stall status. -*******************************************************************************/ -uint16_t GetTxStallStatus(uint8_t bEpNum) -{ - return(_GetTxStallStatus(bEpNum)); -} - -/******************************************************************************* -* Function Name : GetRxStallStatus -* Description : Returns the Stall status of the Rx endpoint. -* Input : bEpNum: Endpoint Number. -* Output : None. -* Return : Rx Stall status. -*******************************************************************************/ -uint16_t GetRxStallStatus(uint8_t bEpNum) -{ - return(_GetRxStallStatus(bEpNum)); -} - -/******************************************************************************* -* Function Name : SetEPTxCount. -* Description : Set the Tx count. -* Input : bEpNum: Endpoint Number. -* wCount: new count value. -* Output : None. -* Return : None. -*******************************************************************************/ -void SetEPTxCount(uint8_t bEpNum, uint16_t wCount) -{ -} - -/******************************************************************************* -* Function Name : SetEPRxCount -* Description : Set the Rx count. -* Input : bEpNum: Endpoint Number. -* wCount: the new count value. -* Output : None. -* Return : None. -*******************************************************************************/ -void SetEPRxCount(uint8_t bEpNum, uint16_t wCount) -{ -} - -/******************************************************************************* -* Function Name : ToWord -* Description : merge two byte in a word. -* Input : bh: byte high, bl: bytes low. -* Output : None. -* Return : resulted word. -*******************************************************************************/ -uint16_t ToWord(uint8_t bh, uint8_t bl) -{ - uint16_t wRet; - wRet = (uint16_t)bl | ((uint16_t)bh << 8); - return(wRet); -} - -/******************************************************************************* -* Function Name : ByteSwap -* Description : Swap two byte in a word. -* Input : wSwW: word to Swap. -* Output : None. -* Return : resulted word. -*******************************************************************************/ -uint16_t ByteSwap(uint16_t wSwW) -{ - uint8_t bTemp; - uint16_t wRet; - bTemp = (uint8_t)(wSwW & 0xff); - wRet = (wSwW >> 8) | ((uint16_t)bTemp << 8); - return(wRet); -} - -#endif /* STM32F10X_CL */ -/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/Libraries/STM32_USB-FS-Device_Driver/src/otgd_fs_int.c b/bsp/stm32_radio/Libraries/STM32_USB-FS-Device_Driver/src/otgd_fs_int.c deleted file mode 100644 index 4532bf9519..0000000000 --- a/bsp/stm32_radio/Libraries/STM32_USB-FS-Device_Driver/src/otgd_fs_int.c +++ /dev/null @@ -1,876 +0,0 @@ -/******************** (C) COPYRIGHT 2009 STMicroelectronics ******************** -* File Name : otgd_fs_int.c -* Author : MCD Application Team -* Version : V3.1.0 -* Date : 10/30/2009 -* Description : Endpoint interrupt's service routines. -******************************************************************************** -* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS -* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. -* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, -* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE -* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING -* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -#ifdef STM32F10X_CL - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x.h" -#include "usb_type.h" -#include "otgd_fs_int.h" -#include "usb_lib.h" -#include "usb_istr.h" - -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ -/* Max size of the received OUT Non periodic packet */ -#define MAX_OUT_PKT_SIZE 160 - -/* Private macro -------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ - -uint8_t USBD_Data_Buffer [MAX_OUT_PKT_SIZE]; -__IO uint8_t IsocBuff [(ISOC_BUFFER_SZE * NUM_SUB_BUFFERS)]; -__IO uint32_t IsocBufferIdx = 0; - -extern USB_OTG_CORE_REGS core_regs; - -__IO uint16_t SaveRState; -__IO uint16_t SaveTState; - -/* Extern variables ----------------------------------------------------------*/ -extern void (*pEpInt_IN[7])(void); /* Handles IN interrupts */ -extern void (*pEpInt_OUT[7])(void); /* Handles OUT interrupts */ - -/* Private function prototypes -----------------------------------------------*/ -static uint32_t OTGD_FS_PCD_ReadDevInEP( USB_OTG_EP *ep); -static enum usb_device_speed OTGD_FS_PCD_GetDeviceSpeed(void); -static uint32_t OTGD_FS_PCD_WriteEmptyTxFifo(uint32_t epnum); - -/* Private functions ---------------------------------------------------------*/ - -/******************************************************************************* -* Function Name : OTGD_FS_Handle_ModeMismatch_ISR -* Description : Handles the Mode Mismatch error interrupt. -* Input : None -* Output : None -* Return : status -*******************************************************************************/ -uint32_t OTGD_FS_Handle_ModeMismatch_ISR(void) -{ - USB_OTG_int_sts_data gintsts; - - INTR_MODEMISMATCH_Callback(); - - /* Clear interrupt */ - gintsts.d32 = 0; - gintsts.b.modemismatch = 1; - WRITE_REG32(&core_regs.common_regs->int_sts, gintsts.d32); - - return 1; -} - -/******************************************************************************* -* Function Name : OTGD_FS_Handle_Sof_ISR -* Description : Handles the Start Of Frame detected interrupt. -* Input : None -* Output : None -* Return : status -*******************************************************************************/ -uint32_t OTGD_FS_Handle_Sof_ISR(void) -{ - USB_OTG_int_sts_data int_sts; - - /* Call user function */ - INTR_SOFINTR_Callback(); - - /* Clear interrupt */ - int_sts.d32 = 0; - int_sts.b.sofintr = 1; - WRITE_REG32 (&core_regs.common_regs->int_sts, int_sts.d32); - - return 1; -} - -/******************************************************************************* -* Function Name : OTGD_FS_Handle_RxStatusQueueLevel_ISR -* Description : Handles the Rx Status Queue Level Interrupt. -* Input : None -* Output : None -* Return : status -*******************************************************************************/ -uint32_t OTGD_FS_Handle_RxStatusQueueLevel_ISR(void) -{ - USB_OTG_int_msk_data int_mask; - USB_OTG_dev_rx_sts_data status; - /* USB_OTG_int_sts_data int_sts; */ - USB_OTG_EP *ep; - - /* Disable the Rx Status Queue Level interrupt */ - int_mask.b.rxstsqlvl = 1; - MODIFY_REG32( &core_regs.common_regs->int_msk, int_mask.d32, 0); - - /* Get the Status from the top of the FIFO */ - status.d32 = READ_REG32( &core_regs.common_regs->rx_stsp ); - - /* Get the related endpoint structure */ - ep = OTGD_FS_PCD_GetOutEP(status.b.epnum); - - switch (status.b.pktsts) - { - case STS_GOUT_NAK: - break; - case STS_DATA_UPDT: - if (status.b.bcnt) - { - if (ep->type == EP_TYPE_ISOC) - { - /* Call user function */ - INTR_RXSTSQLVL_ISODU_Callback(); - - /* Copy the received buffer to the RAM */ - OTGD_FS_ReadPacket((uint8_t*)(IsocBuff + (ISOC_BUFFER_SZE * IsocBufferIdx)), status.b.bcnt); - ep->xfer_buff = (uint8_t*)(IsocBuff + (ISOC_BUFFER_SZE * IsocBufferIdx)); - - /* Check if the end of the global buffer has been reached */ - if (IsocBufferIdx == (NUM_SUB_BUFFERS - 1)) - { - /* Reset the buffer index */ - IsocBufferIdx = 0; - } - else - { - /* Increment the buffer index */ - IsocBufferIdx ++; - } - } - else - { - /* Copy the received buffer to the RAM */ - OTGD_FS_ReadPacket(USBD_Data_Buffer, status.b.bcnt); - ep->xfer_buff = USBD_Data_Buffer; - } - - /* Update the endpoint structure */ - ep->xfer_len = status.b.bcnt; - ep->xfer_count += status.b.bcnt; - } - break; - case STS_XFER_COMP: - break; - case STS_SETUP_COMP: - break; - case STS_SETUP_UPDT: - /* Copy the setup packet received in Fifo into the setup buffer in RAM */ - OTGD_FS_ReadPacket(USBD_Data_Buffer, 8); - ep->xfer_buff = USBD_Data_Buffer; - ep->xfer_count += status.b.bcnt; - ep->xfer_len = status.b.bcnt; - break; - default: - break; - } - - /* Call the user function */ - INTR_RXSTSQLVL_Callback(); - - /* Enable the Rx Status Queue Level interrupt */ - MODIFY_REG32( &core_regs.common_regs->int_msk, 0, int_mask.d32); - - /* Clear interrupt: this is a read only bit, it cannot be cleared by register - access */ - /* int_sts.d32 = 0; - int_sts.b.rxstsqlvl = 1; - WRITE_REG32 (&core_regs.common_regs->int_sts, int_sts.d32); - */ - - return 1; -} - -/******************************************************************************* -* Function Name : OTGD_FS_Handle_NPTxFE_ISR -* Description : Handles the Non Periodic Tx FIFO Empty interrupt. -* Input : None -* Output : None -* Return : status -*******************************************************************************/ -uint32_t OTGD_FS_Handle_NPTxFE_ISR(void ) -{ - /* USB_OTG_int_sts_data gintsts; */ - USB_OTG_int_msk_data gintmsk; - gintmsk.d32 = 0; - - /* Call the user function */ - INTR_NPTXFEMPTY_Callback(); - - gintmsk.b.nptxfempty = 1; - MODIFY_REG32(&core_regs.common_regs->int_msk, gintmsk.d32, 0 ); - - /* Clear interrupt: This bit is a read only bit, cannot be cleared - by register access */ - /* gintsts.d32 = 0; - gintsts.b.nptxfempty = 1; - WRITE_REG32(&core_regs.common_regs->int_sts, gintsts.d32); - */ - return 1; -} - -/******************************************************************************* -* Function Name : OTGD_FS_Handle_GInNakEff_ISR -* Description : Handles the Global IN Endpoints NAK Effective interrupt. -* Input : None -* Output : None -* Return : status -*******************************************************************************/ -uint32_t OTGD_FS_Handle_GInNakEff_ISR(void) -{ - /* USB_OTG_int_sts_data gintsts; */ - - /* Call user function */ - INTR_GINNAKEFF_Callback(); - - /* Clear interrupt: This is a read only bit, it cannot be cleared by register - access */ - /* gintsts.d32 = 0; - gintsts.b.ginnakeff = 1; - WRITE_REG32(&core_regs.common_regs->int_sts, gintsts.d32); - */ - return 1; -} - -/******************************************************************************* -* Function Name : OTGD_FS_Handle_GOutNakEff_ISR -* Description : Handles the Global OUT Endpoints NAK Effective interrupt. -* Input : None -* Output : None -* Return : status -*******************************************************************************/ -uint32_t OTGD_FS_Handle_GOutNakEff_ISR(void) -{ - /* USB_OTG_int_sts_data gintsts; */ - - /* Call user function */ - INTR_GOUTNAKEFF_Callback(); - - /* Clear interrupt: This is a read only bit, it cannot be cleared by register - access */ - /* gintsts.d32 = 0; - gintsts.b.goutnakeff = 1; - WRITE_REG32(&core_regs.common_regs->int_sts, gintsts.d32); - */ - return 1; -} - -/******************************************************************************* -* Function Name : OTGD_FS_Handle_EarlySuspend_ISR -* Description : Handles the Early Suspend detected interrupt. -* Input : None -* Output : None -* Return : status -*******************************************************************************/ -uint32_t OTGD_FS_Handle_EarlySuspend_ISR(void ) -{ - USB_OTG_int_sts_data gintsts; - USB_OTG_int_msk_data gintmsk; - gintmsk.d32 = 0; - - /* Call user function */ - INTR_ERLYSUSPEND_Callback(); - - gintmsk.b.erlysuspend = 1; - MODIFY_REG32(&core_regs.common_regs->int_msk, gintmsk.d32, 0 ); - - /* Clear interrupt */ - gintsts.d32 = 0; - gintsts.b.erlysuspend = 1; - WRITE_REG32(&core_regs.common_regs->int_sts, gintsts.d32); - return 1; -} - -/******************************************************************************* -* Function Name : OTGD_FS_Handle_USBSuspend_ISR -* Description : Handles the Suspend condition detected interrupt. -* Input : None -* Output : None -* Return : status -*******************************************************************************/ -uint32_t OTGD_FS_Handle_USBSuspend_ISR(void) -{ - USB_OTG_int_sts_data gintsts; - - /* Call user function */ - INTR_USBSUSPEND_Callback(); - - /* Clear interrupt */ - gintsts.d32 = 0; - gintsts.b.usbsuspend = 1; - WRITE_REG32(&core_regs.common_regs->int_sts, gintsts.d32); - - return 1; -} - -/******************************************************************************* -* Function Name : OTGD_FS_Handle_UsbReset_ISR -* Description : This interrupt occurs when a USB Reset is detected. -* Input : None -* Output : None -* Return : status -*******************************************************************************/ -uint32_t OTGD_FS_Handle_UsbReset_ISR(void) -{ - USB_OTG_dev_all_int_data daintmsk; - USB_OTG_dev_out_ep_msk_data doepmsk; - USB_OTG_dev_in_ep_msk_data diepmsk; - USB_OTG_dev_cfg_data dcfg; - USB_OTG_dev_ctl_data dctl; - USB_OTG_int_sts_data gintsts; - - daintmsk.d32 = 0; - doepmsk.d32 = 0; - diepmsk.d32 = 0; - dcfg.d32 = 0; - dctl.d32 = 0; - - /* Clear the Remote Wakeup Signalling */ - dctl.b.rmtwkupsig = 1; - MODIFY_REG32(&core_regs.dev_regs->dev_ctl, dctl.d32, 0 ); - - /* Flush the NP Tx FIFO */ - OTGD_FS_FlushTxFifo( 0 ); - - daintmsk.b.inep0 = 1; - daintmsk.b.outep0 = 1; - WRITE_REG32( &core_regs.dev_regs->dev_all_int_msk, daintmsk.d32 ); - - doepmsk.b.setup = 1; - doepmsk.b.xfercompl = 1; - doepmsk.b.ahberr = 1; - doepmsk.b.epdisabled = 1; - WRITE_REG32( &core_regs.dev_regs->dev_out_ep_msk, doepmsk.d32 ); - - diepmsk.b.xfercompl = 1; - diepmsk.b.timeout = 1; - diepmsk.b.epdisabled = 1; - diepmsk.b.ahberr = 1; - diepmsk.b.intknepmis = 1; - WRITE_REG32( &core_regs.dev_regs->dev_in_ep_msk, diepmsk.d32 ); - - /* Reset Device Address */ - dcfg.d32 = READ_REG32( &core_regs.dev_regs->dev_cfg); - dcfg.b.devaddr = 0; - WRITE_REG32( &core_regs.dev_regs->dev_cfg, dcfg.d32); - - - /* setup EP0 to receive SETUP packets */ - OTGD_FS_PCD_EP0_OutStart(); - - /* Clear interrupt */ - gintsts.d32 = 0; - gintsts.b.usbreset = 1; - WRITE_REG32 (&core_regs.common_regs->int_sts, gintsts.d32); - - /* Call the user reset function */ - OTGD_FS_DEVICE_RESET; - - /* Call user function */ - INTR_USBRESET_Callback(); - - return 1; -} - -/******************************************************************************* -* Function Name : OTGD_FS_Handle_EnumDone_ISR -* Description : Reads the device status register and set the device speed -* Input : None -* Output : None -* Return : status -*******************************************************************************/ -uint32_t OTGD_FS_Handle_EnumDone_ISR(void) -{ - USB_OTG_int_sts_data gintsts; - USB_OTG_usb_cfg_data gusbcfg; - - OTGD_FS_EP0Activate(); - - /* Set USB turnaround time based on device speed and PHY interface. */ - gusbcfg.d32 = READ_REG32(&core_regs.common_regs->usb_cfg); - - /* Full or low speed */ - if ( OTGD_FS_PCD_GetDeviceSpeed() == USB_SPEED_FULL) - { - gusbcfg.b.usbtrdtim = 9; - } - WRITE_REG32(&core_regs.common_regs->usb_cfg, gusbcfg.d32); - - /* Call user function */ - INTR_ENUMDONE_Callback(); - - /* Clear interrupt */ - gintsts.d32 = 0; - gintsts.b.enumdone = 1; - WRITE_REG32( &core_regs.common_regs->int_sts, gintsts.d32 ); - return 1; -} - -/******************************************************************************* -* Function Name : OTGD_FS_Handle_IsoOutDrop_ISR -* Description : Handles the Isochrounous Out packet Dropped interrupt. -* Input : None -* Output : None -* Return : status -*******************************************************************************/ -uint32_t OTGD_FS_Handle_IsoOutDrop_ISR(void) -{ - USB_OTG_int_sts_data gintsts; - - /* Call user function */ - INTR_ISOOUTDROP_Callback(); - - /* Clear interrupt */ - gintsts.d32 = 0; - gintsts.b.isooutdrop = 1; - WRITE_REG32(&core_regs.common_regs->int_sts, gintsts.d32); - - return 1; -} - -/******************************************************************************* -* Function Name : OTGD_FS_Handle_EOPF_ISR -* Description : Handles the Expexted End Of Periodic Frame interrupt. -* Input : None -* Output : None -* Return : status -*******************************************************************************/ -uint32_t OTGD_FS_Handle_EOPF_ISR(void ) -{ - USB_OTG_int_sts_data gintsts; - USB_OTG_int_msk_data gintmsk; - gintmsk.d32 = 0; - - gintmsk.b.eopframe = 1; - MODIFY_REG32(&core_regs.common_regs->int_msk, gintmsk.d32, 0 ); - - /* Call user function */ - INTR_EOPFRAME_Callback(); - - /* Clear interrupt */ - gintsts.d32 = 0; - gintsts.b.eopframe = 1; - WRITE_REG32(&core_regs.common_regs->int_sts, gintsts.d32); - return 1; -} - -/******************************************************************************* -* Function Name : OTGD_FS_Handle_EPMismatch_ISR -* Description : Handles the Endpoint Mismatch error interrupt. -* Input : None -* Output : None -* Return : status -*******************************************************************************/ -uint32_t OTGD_FS_Handle_EPMismatch_ISR(void) -{ - USB_OTG_int_sts_data gintsts; - - /* Call user function */ - INTR_EPMISMATCH_Callback(); - - /* Clear interrupt */ - gintsts.d32 = 0; - gintsts.b.epmismatch = 1; - WRITE_REG32(&core_regs.common_regs->int_sts, gintsts.d32); - - return 1; -} - -/******************************************************************************* -* Function Name : OTGD_FS_Handle_InEP_ISR -* Description : Handles all IN endpoints interrupts. -* Output : None -* Return : status -*******************************************************************************/ -uint32_t OTGD_FS_Handle_InEP_ISR(void) -{ - USB_OTG_dev_in_ep_int_data diepint; - - uint32_t ep_intr; - uint32_t epnum = 0; - USB_OTG_EP *ep; - uint32_t fifoemptymsk; - - diepint.d32 = 0; - ep_intr = OTGD_FS_ReadDevAllInEPItr(); - while ( ep_intr ) - { - if (ep_intr&0x1) /* In ITR */ - { - ep = OTGD_FS_PCD_GetInEP(epnum); - diepint.d32 = OTGD_FS_PCD_ReadDevInEP(ep); /* Get In ITR status */ - if ( diepint.b.xfercompl ) - { - fifoemptymsk = 0x1 << ep->num; - MODIFY_REG32(&core_regs.dev_regs->dev_fifo_empty_msk, fifoemptymsk, 0); - - /* Clear the Interrupt flag */ - CLEAR_IN_EP_INTR(epnum, xfercompl); - - if (epnum == 0) - { - /* Call the core IN process for EP0 */ - In0_Process(); - - /* before terminate set Tx & Rx status */ - OTG_DEV_SetEPRxStatus(epnum, SaveRState); - OTG_DEV_SetEPTxStatus(epnum, SaveTState); - } - else - { - OTG_DEV_SetEPTxStatus(EP1_IN, DEV_EP_TX_NAK); - - (*pEpInt_IN[epnum -1])(); - - /* Toggle Endpoint frame ID */ - if (ep->even_odd_frame == 0) - ep->even_odd_frame = 1; - else - ep->even_odd_frame = 0; - } - } - if ( diepint.b.ahberr ) - { - CLEAR_IN_EP_INTR(epnum, ahberr); - } - if ( diepint.b.timeout ) - { - CLEAR_IN_EP_INTR(epnum, timeout); - } - if (diepint.b.intktxfemp) - { - CLEAR_IN_EP_INTR(epnum, intktxfemp); - } - if (diepint.b.intknepmis) - { - CLEAR_IN_EP_INTR(epnum, intknepmis); - } - if (diepint.b.inepnakeff) - { - CLEAR_IN_EP_INTR(epnum, inepnakeff); - } - if (diepint.b.emptyintr) - { - if ((epnum == 0) || (OTG_DEV_GetEPTxStatus(epnum) == DEV_EP_TX_VALID)) - { - OTGD_FS_PCD_WriteEmptyTxFifo(epnum); - } - - CLEAR_IN_EP_INTR(epnum, emptyintr); - } - if ( diepint.b.epdisabled ) - { - /* Reset Endpoint Frame ID to 0 */ - ep->even_odd_frame = 0; - - CLEAR_IN_EP_INTR(epnum, epdisabled); - } - } - epnum++; - ep_intr >>= 1; - } - - /* Call user function */ - INTR_INEPINTR_Callback(); - - return 1; -} - - -/******************************************************************************* -* Function Name : OTGD_FS_Handle_OutEP_ISR -* Description : Handles all OUT endpoints interrupts. -* Input : None -* Output : None -* Return : Status -*******************************************************************************/ -uint32_t OTGD_FS_Handle_OutEP_ISR(void) -{ - uint32_t ep_intr; - USB_OTG_dev_out_ep_int_data doepint; - uint32_t epnum = 0; - USB_OTG_EP *ep; - - doepint.d32 = 0; - - /* Read in the device interrupt bits */ - ep_intr = OTGD_FS_ReadDevAllOutEp_itr(); - - while ( ep_intr ) - { - if (ep_intr&0x1) - { - /* Get EP pointer */ - ep = OTGD_FS_PCD_GetOutEP(epnum); - doepint.d32 = OTGD_FS_ReadDevOutEP_itr(ep); - - /* Transfer complete */ - if ( doepint.b.xfercompl ) - { - /* Clear the bit in DOEPINTn for this interrupt */ - CLEAR_OUT_EP_INTR(epnum, xfercompl); - - if (epnum == 0) - { - /* Call the OUT process for the EP0 */ - Out0_Process(); - } - else - { - (*pEpInt_OUT[epnum-1])(); - } - } - /* Endpoint disable */ - if ( doepint.b.epdisabled ) - { - /* Clear the bit in DOEPINTn for this interrupt */ - CLEAR_OUT_EP_INTR(epnum, epdisabled); - } - /* AHB Error */ - if ( doepint.b.ahberr ) - { - CLEAR_OUT_EP_INTR(epnum, ahberr); - } - /* Setup Phase Done (control EPs) */ - if ( doepint.b.setup ) - { - if (epnum == 0) - { - /* Call the SETUP process for the EP0 */ - Setup0_Process(); - - /* Before exit, update the Tx status */ - OTG_DEV_SetEPTxStatus(0x80, SaveTState); - } - else - { - /* Other control endpoints */ - } - - /* Clear the EP Interrupt */ - CLEAR_OUT_EP_INTR(epnum, setup); - } - } - epnum++; - ep_intr >>= 1; - } - - /* Call user function */ - INTR_OUTEPINTR_Callback(); - - return 1; -} - -/******************************************************************************* -* Function Name : OTGD_FS_Handle_IncomplIsoIn_ISR -* Description : Handles the Incomplete Isochrous IN tranfer error interrupt. -* Input : None -* Output : None -* Return : status -*******************************************************************************/ -uint32_t OTGD_FS_Handle_IncomplIsoIn_ISR(void) -{ - USB_OTG_int_sts_data gintsts; - - /* Call user function */ - INTR_INCOMPLISOIN_Callback(); - - /* Clear interrupt */ - gintsts.d32 = 0; - gintsts.b.incomplisoin = 1; - WRITE_REG32(&core_regs.common_regs->int_sts, gintsts.d32); - - return 1; -} - -/******************************************************************************* -* Function Name : OTGD_FS_Handle_IncomplIsoOut_ISR -* Description : Handles the Incomplete Isochrous OUT tranfer error interrupt. -* Input : None -* Output : None -* Return : status -*******************************************************************************/ -uint32_t OTGD_FS_Handle_IncomplIsoOut_ISR(void) -{ - USB_OTG_int_sts_data gintsts; - - /* Call user function */ - INTR_INCOMPLISOOUT_Callback(); - - /* Clear interrupt */ - gintsts.d32 = 0; - gintsts.b.outepintr = 1; - WRITE_REG32(&core_regs.common_regs->int_sts, gintsts.d32); - - return 1; -} - -/******************************************************************************* -* Function Name : OTGD_FS_Handle_Wakeup_ISR -* Description : Handles the Wakeup or Remote Wakeup detected interrupt. -* Input : None -* Output : None -* Return : status -*******************************************************************************/ -uint32_t OTGD_FS_Handle_Wakeup_ISR(void) -{ - USB_OTG_int_sts_data gintsts; - - /* Call user function */ - INTR_WKUPINTR_Callback(); - - /* Clear interrupt */ - gintsts.d32 = 0; - gintsts.b.wkupintr = 1; - WRITE_REG32 (&core_regs.common_regs->int_sts, gintsts.d32); - - return 1; -} - - - -/******************************************************************************* -* Function Name : OTGD_FS_PCD_GetDeviceSpeed -* Description : Get the device speed from the device status register -* Input : None -* Output : None -* Return : The Device speed value. -*******************************************************************************/ -static enum usb_device_speed OTGD_FS_PCD_GetDeviceSpeed(void) -{ - USB_OTG_dev_sts_data dsts; - enum usb_device_speed speed = USB_SPEED_UNKNOWN; - dsts.d32 = READ_REG32(&core_regs.dev_regs->dev_sts); - - switch (dsts.b.enumspd) - { - case DSTS_ENUMSPD_HS_PHY_30MHZ_OR_60MHZ: - speed = USB_SPEED_HIGH; - break; - case DSTS_ENUMSPD_FS_PHY_30MHZ_OR_60MHZ: - case DSTS_ENUMSPD_FS_PHY_48MHZ: - speed = USB_SPEED_FULL; - break; - - case DSTS_ENUMSPD_LS_PHY_6MHZ: - speed = USB_SPEED_LOW; - break; - } - - return speed; -} - -/******************************************************************************* -* Function Name : OTGD_FS_PCD_ReadDevInEP -* Description : Reads all the Endpoints flags. -* Input : None -* Output : None -* Return : Status -*******************************************************************************/ -static uint32_t OTGD_FS_PCD_ReadDevInEP( USB_OTG_EP *ep) -{ - uint32_t v, msk, emp; - msk = READ_REG32(&core_regs.dev_regs->dev_in_ep_msk); - emp = READ_REG32(&core_regs.dev_regs->dev_fifo_empty_msk); - msk |= ((emp >> ep->num) & 0x1) << 7; - v = READ_REG32(&core_regs.inep_regs[ep->num]->dev_in_ep_int) & msk; - return v; -} - -/******************************************************************************* -* Function Name : OTGD_FS_PCD_WriteEmptyTxFifo -* Description : Checks Fifo for the next packet to be loaded. -* Input : None -* Output : None -* Return : Status -*******************************************************************************/ -static uint32_t OTGD_FS_PCD_WriteEmptyTxFifo(uint32_t epnum) -{ - USB_OTG_dev_tx_fifo_sts_data txstatus; - USB_OTG_EP *ep; - uint32_t len = 0; - uint32_t dwords; - USB_OTG_dev_ep_ctl_data depctl; - - txstatus.d32 = 0; - - ep = OTGD_FS_PCD_GetInEP(epnum); - - len = ep->xfer_len - ep->xfer_count; - - if (len > ep->maxpacket) - { - len = ep->maxpacket; - } - - dwords = (len + 3) / 4; - txstatus.d32 = READ_REG32( &core_regs.inep_regs[epnum]->dev_tx_fifo_sts); - - /* Manage the case of 0-length data packets toggling data PID */ - if ((ep->xfer_len == 0) && (ep->xfer_count == 0)) - { - if (ep->num > 0) - { - depctl.d32 = READ_REG32( &core_regs.inep_regs[epnum]->dev_in_ep_ctl); - if (ep->even_odd_frame == 1) - { - depctl.b.setd0pid = 0; - depctl.b.setd1pid = 1; - } - else - { - depctl.b.setd0pid = 1; - depctl.b.setd1pid = 0; - } - WRITE_REG32( &core_regs.inep_regs[epnum]->dev_in_ep_ctl, depctl.d32); - } - } - - - while (txstatus.b.txfspcavail > dwords && - ep->xfer_count < ep->xfer_len && - ep->xfer_len != 0) - { - if (ep->num > 0) - { - depctl.d32 = READ_REG32( &core_regs.inep_regs[epnum]->dev_in_ep_ctl); - if (ep->even_odd_frame == 0) - { - depctl.b.setd0pid = 1; - depctl.b.setd1pid = 0; - } - else - { - depctl.b.setd0pid = 0; - depctl.b.setd1pid = 1; - } - WRITE_REG32( &core_regs.inep_regs[epnum]->dev_in_ep_ctl, depctl.d32); - } - - /* Write the FIFO */ - len = ep->xfer_len - ep->xfer_count; - - if (len > ep->maxpacket) - { - len = ep->maxpacket; - } - dwords = (len + 3) / 4; - - OTGD_FS_WritePacket(ep->xfer_buff, epnum, len); - - ep->xfer_count += len; - - txstatus.d32 = READ_REG32(&core_regs.inep_regs[epnum]->dev_tx_fifo_sts); - } - - return 1; -} -#endif /* STM32F10X_CL */ -/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/Libraries/STM32_USB-FS-Device_Driver/src/otgd_fs_pcd.c b/bsp/stm32_radio/Libraries/STM32_USB-FS-Device_Driver/src/otgd_fs_pcd.c deleted file mode 100644 index aca8c3547d..0000000000 --- a/bsp/stm32_radio/Libraries/STM32_USB-FS-Device_Driver/src/otgd_fs_pcd.c +++ /dev/null @@ -1,445 +0,0 @@ -/******************** (C) COPYRIGHT 2009 STMicroelectronics ******************** -* File Name : otgd_fs_pcd.c -* Author : MCD Application Team -* Version : V3.1.0 -* Date : 10/30/2009 -* Description : Peripheral Device Interface low layer. -******************************************************************************** -* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS -* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. -* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, -* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE -* CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING -* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -#ifdef STM32F10X_CL - -#include "usb_lib.h" -#include "otgd_fs_cal.h" -#include "otgd_fs_pcd.h" - -USB_OTG_PCD_DEV USB_OTG_PCD_dev; - -extern USB_OTG_CORE_REGS core_regs; -/******************************************************************************* -* Function Name : OTGD_FS_PCD_Init -* Description : Initialize the USB Device portion of the driver. -* Input : None -* Output : None -* Return : None -*******************************************************************************/ -void OTGD_FS_PCD_Init(void) -{ - uint32_t i; - USB_OTG_EP *ep; - - ep = &USB_OTG_PCD_dev.ep0; - USB_OTG_PCD_dev.ep0state = 0; - - /* Init ep structure */ - ep->num = 0; - ep->tx_fifo_num = 0; - - /* Control until ep is actvated */ - ep->type = EP_TYPE_CTRL; - ep->maxpacket = MAX_PACKET_SIZE; - - ep->xfer_buff = 0; - ep->xfer_len = 0; - - for (i = 1; i < MAX_TX_FIFOS ; i++) - { - ep = &USB_OTG_PCD_dev.in_ep[i-1]; - - /* Init ep structure */ - ep->is_in = 1; - ep->num = i; - ep->tx_fifo_num = i; - - /* Control until ep is actvated */ - ep->type = EP_TYPE_CTRL; - ep->maxpacket = MAX_PACKET_SIZE; - ep->xfer_buff = 0; - ep->xfer_len = 0; - } - - for (i = 1; i < MAX_TX_FIFOS; i++) - { - ep = &USB_OTG_PCD_dev.out_ep[i-1]; - - /* Init ep structure */ - ep->is_in = 0; - ep->num = i; - ep->tx_fifo_num = i; - - /* Control until ep is activated */ - ep->type = EP_TYPE_CTRL; - ep->maxpacket = MAX_PACKET_SIZE; - ep->xfer_buff = 0; - ep->xfer_len = 0; - } - - USB_OTG_PCD_dev.ep0.maxpacket = MAX_EP0_SIZE; - USB_OTG_PCD_dev.ep0.type = EP_TYPE_CTRL; - -} - -/******************************************************************************* -* Function Name : OTGD_FS_PCD_EP_Open -* Description : Configure an Endpoint -* Input : None -* Output : None -* Return : status -*******************************************************************************/ -uint32_t OTGD_FS_PCD_EP_Open(EP_DESCRIPTOR *epdesc) -{ - USB_OTG_EP *ep; - - - if ((0x80 & epdesc->bEndpointAddress) != 0) - { - ep = OTGD_FS_PCD_GetInEP(epdesc->bEndpointAddress & 0x7F); - } - else - { - ep = OTGD_FS_PCD_GetOutEP(epdesc->bEndpointAddress & 0x7F); - } - - ep->num = epdesc->bEndpointAddress & 0x7F; - ep->is_in = (0x80 & epdesc->bEndpointAddress) != 0; - ep->maxpacket = epdesc->wMaxPacketSize; - ep->type = epdesc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK; - - if (ep->is_in) - { - /* Assign a Tx FIFO */ - ep->tx_fifo_num = ep->num; - } - - /* Set initial data PID. */ - if ((epdesc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) == USB_ENDPOINT_XFER_BULK ) - { - ep->data_pid_start = 0; - } - - OTGD_FS_EPActivate(ep ); - - return 0; -} - -/******************************************************************************* -* Function Name : OTGD_FS_PCD_EP_Close -* Description : Called when an EP is disabled -* Input : Endpoint address. -* Output : None -* Return : status -*******************************************************************************/ -uint32_t OTGD_FS_PCD_EP_Close(uint8_t ep_addr) -{ - - USB_OTG_EP *ep; - - if ((0x80 & ep_addr) != 0) - { - ep = OTGD_FS_PCD_GetInEP(ep_addr & 0x7F); - } - else - { - ep = OTGD_FS_PCD_GetOutEP(ep_addr & 0x7F); - } - - ep->num = ep_addr & 0x7F; - ep->is_in = (0x80 & ep_addr) != 0; - - OTGD_FS_EPDeactivate(ep ); - return 0; -} - -/******************************************************************************* -* Function Name : OTGD_FS_PCD_EP_Read -* Description : Read data from Fifo -* Input : Endpoint address. -* Output : None -* Return : status -*******************************************************************************/ -uint32_t OTGD_FS_PCD_EP_Read (uint8_t ep_addr, uint8_t *pbuf, uint32_t buf_len) -{ - USB_OTG_EP *ep; - uint32_t i; - - ep = OTGD_FS_PCD_GetOutEP(ep_addr & 0x7F); - - /* copy received data into application buffer */ - for (i = 0 ; i < buf_len ; i++) - { - pbuf[i] = ep->xfer_buff[i]; - } - - /*setup and start the Xfer */ - ep->xfer_buff = pbuf; - ep->xfer_len = buf_len; - ep->xfer_count = 0; - ep->is_in = 0; - ep->num = ep_addr & 0x7F; - - if ( ep->num == 0 ) - { - OTGD_FS_EP0StartXfer(ep); - } - else if (USB_OTG_PCD_dev.ep0state == 0) - { - OTGD_FS_EPStartXfer( ep ); - } - - return 0; -} - -/******************************************************************************* -* Function Name : USBF_EP_Write -* Description : Read data from Fifo -* Input : ep -* Output : None -* Return : status -*******************************************************************************/ -uint32_t OTGD_FS_PCD_EP_Write (uint8_t ep_addr, uint8_t *pbuf, uint32_t buf_len) -{ - USB_OTG_EP *ep; - - ep = OTGD_FS_PCD_GetInEP(ep_addr & 0x7f); - - /* assign data to EP structure buffer */ - ep->xfer_buff = pbuf; - - /* Setup and start the Transfer */ - ep->xfer_count = 0; - ep->xfer_len = buf_len; - ep->is_in = 1; - ep->num = ep_addr & 0x7F; - - if ( ep->num == 0 ) - { - OTGD_FS_EP0StartXfer(ep); - } - else if (USB_OTG_PCD_dev.ep0state == 0) - { - OTGD_FS_EPStartXfer( ep ); - } - - return 0; -} - -/******************************************************************************* -* Function Name : OTGD_FS_PCD_EP_Stall -* Description : Stall an endpoint. -* Input : Endpoint Address. -* Output : None -* Return : status -*******************************************************************************/ -uint32_t OTGD_FS_PCD_EP_Stall (uint8_t ep_addr) -{ - USB_OTG_EP *ep; - - if ((0x80 & ep_addr) != 0) - { - ep = OTGD_FS_PCD_GetInEP(ep_addr & 0x7F); - } - else - { - ep = OTGD_FS_PCD_GetOutEP(ep_addr & 0x7F); - } - - ep->num = ep_addr & 0x7F; - ep->is_in = ((ep_addr & 0x80) == 0x80) ? 1 : 0; - - OTGD_FS_EPSetStall(ep); - return (0); -} -/******************************************************************************* -* Function Name : OTGD_FS_PCD_EP_ClrStall -* Description : Clear stall condition on endpoints. -* Input : Endpoint Address. -* Output : None -* Return : status -*******************************************************************************/ -uint32_t OTGD_FS_PCD_EP_ClrStall (uint8_t ep_addr) -{ - - USB_OTG_EP *ep; - - if ((0x80 & ep_addr) != 0) - { - ep = OTGD_FS_PCD_GetInEP(ep_addr & 0x7F); - } - else - { - ep = OTGD_FS_PCD_GetOutEP(ep_addr & 0x7F); - } - - ep->num = ep_addr & 0x7F; - ep->is_in = ((ep_addr & 0x80) == 0x80) ? 1 : 0; - - OTGD_FS_EPClearStall(ep); - - return (0); -} - -/******************************************************************************* -* Function Name : USBF_FCD_EP_Flush() -* Description : This Function flushes the buffer. -* Input : Endpoint Address. -* Output : None -* Return : status -*******************************************************************************/ -uint32_t OTGD_FS_PCD_EP_Flush (uint8_t ep_addr) -{ - - uint8_t is_out; - uint8_t ep_nbr; - - ep_nbr = ep_addr & 0x7F; - is_out = ((ep_addr & 0x80) == 0x80) ? 0 : 1; - - if (is_out == 0) - { - OTGD_FS_FlushTxFifo(ep_nbr); - } - else - { - OTGD_FS_FlushRxFifo(); - } - OTGD_FS_PCD_EP_ClrStall(ep_addr); - return (0); -} - -/******************************************************************************* -* Function Name : OTGD_FS_PCD_EP_SetAddress -* Description : This Function set USB device address -* Input : The new device Address to be set. -* Output : None -* Return : status -*******************************************************************************/ -void OTGD_FS_PCD_EP_SetAddress (uint8_t address) -{ - - USB_OTG_dev_cfg_data dcfg; - dcfg.d32 = 0; - - dcfg.b.devaddr = address; - MODIFY_REG32( &core_regs.dev_regs->dev_cfg, 0, dcfg.d32); -} - - -/******************************************************************************* -* Function Name : OTGD_FS_PCD_GetInEP -* Description : This function returns pointer to IN EP struct with number ep_num -* Input : Endpoint Number. -* Output : None -* Return : status -*******************************************************************************/ -USB_OTG_EP* OTGD_FS_PCD_GetInEP(uint32_t ep_num) -{ - uint32_t i; - if (ep_num == 0) - { - return &USB_OTG_PCD_dev.ep0; - } - else - { - for (i = 0; i < MAX_TX_FIFOS; ++i) - { - if (USB_OTG_PCD_dev.in_ep[i].num == ep_num) - return &USB_OTG_PCD_dev.in_ep[i]; - } - return 0; - } -} -/******************************************************************************* -* Function Name : USBF_GetOutEP -* Description : returns pointer to OUT EP struct with number ep_num -* Input : Endpoint Number. -* Output : None -* Return : USBF_EP -*******************************************************************************/ -USB_OTG_EP* OTGD_FS_PCD_GetOutEP(uint32_t ep_num) -{ - uint32_t i; - if (ep_num == 0) - { - return &USB_OTG_PCD_dev.ep0; - } - else - { - for (i = 0; i < MAX_TX_FIFOS; ++i) - { - if (USB_OTG_PCD_dev.out_ep[i].num == ep_num) - return &USB_OTG_PCD_dev.out_ep[i]; - } - return 0; - } -} - -/******************************************************************************* -* Function Name : OTGD_FS_PCD_DevConnect -* Description : Connect device -* Input : None -* Output : None -* Return : status -*******************************************************************************/ -void OTGD_FS_PCD_DevConnect(void) -{ - - USB_OTG_dev_ctl_data dctl; - - dctl.d32 = READ_REG32(&core_regs.dev_regs->dev_ctl); - - /* Connect device */ - dctl.b.sftdiscon = 0; - WRITE_REG32(&core_regs.dev_regs->dev_ctl, dctl.d32); - mDELAY(25); -} - -/******************************************************************************* -* Function Name : OTGD_FS_PCD_DevDisconnect -* Description : Disconnect device -* Input : None -* Output : None -* Return : status -*******************************************************************************/ -void OTGD_FS_PCD_DevDisconnect (void) -{ - - USB_OTG_dev_ctl_data dctl; - - dctl.d32 = READ_REG32(&core_regs.dev_regs->dev_ctl); - - /* Disconnect device for 20ms */ - dctl.b.sftdiscon = 1; - WRITE_REG32(&core_regs.dev_regs->dev_ctl, dctl.d32); - mDELAY(25); -} - -/******************************************************************************* -* Function Name : OTGD_FS_PCD_EP0_OutStart -* Description : Configures EPO to receive SETUP packets. -* Input : None -* Output : None -* Return : None -*******************************************************************************/ -void OTGD_FS_PCD_EP0_OutStart(void) -{ - - USB_OTG_dev_ep_txfer_size0_data doeptsize0; - - doeptsize0.d32 = 0; - doeptsize0.b.supcnt = 3; - doeptsize0.b.pktcnt = 1; - doeptsize0.b.xfersize = 8 * 3; - - WRITE_REG32( &core_regs.outep_regs[0]->dev_out_ep_txfer_siz, doeptsize0.d32 ); - -} - -#endif /* STM32F10X_CL */ -/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/ - diff --git a/bsp/stm32_radio/Libraries/STM32_USB-FS-Device_Driver/src/usb_core.c b/bsp/stm32_radio/Libraries/STM32_USB-FS-Device_Driver/src/usb_core.c deleted file mode 100644 index 9657d920be..0000000000 --- a/bsp/stm32_radio/Libraries/STM32_USB-FS-Device_Driver/src/usb_core.c +++ /dev/null @@ -1,1088 +0,0 @@ -/******************** (C) COPYRIGHT 2009 STMicroelectronics ******************** -* File Name : usb_core.c -* Author : MCD Application Team -* Version : V3.1.0 -* Date : 10/30/2009 -* Description : Standard protocol processing (USB v2.0) -******************************************************************************** -* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS -* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. -* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, -* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE -* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING -* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -/* Includes ------------------------------------------------------------------*/ -#include "usb_lib.h" -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ -#define ValBit(VAR,Place) (VAR & (1 << Place)) -#define SetBit(VAR,Place) (VAR |= (1 << Place)) -#define ClrBit(VAR,Place) (VAR &= ((1 << Place) ^ 255)) - -#ifdef STM32F10X_CL - #define Send0LengthData() {OTGD_FS_PCD_EP_Write (0, 0, 0) ; vSetEPTxStatus(EP_TX_VALID);} -#else -#define Send0LengthData() { _SetEPTxCount(ENDP0, 0); \ - vSetEPTxStatus(EP_TX_VALID); \ - } -#endif /* STM32F10X_CL */ - -#define vSetEPRxStatus(st) (SaveRState = st) -#define vSetEPTxStatus(st) (SaveTState = st) - -#define USB_StatusIn() Send0LengthData() -#define USB_StatusOut() vSetEPRxStatus(EP_RX_VALID) - -#define StatusInfo0 StatusInfo.bw.bb1 /* Reverse bb0 & bb1 */ -#define StatusInfo1 StatusInfo.bw.bb0 - -/* Private macro -------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -uint16_t_uint8_t StatusInfo; - -bool Data_Mul_MaxPacketSize = FALSE; -/* Private function prototypes -----------------------------------------------*/ -static void DataStageOut(void); -static void DataStageIn(void); -static void NoData_Setup0(void); -static void Data_Setup0(void); -/* Private functions ---------------------------------------------------------*/ - -/******************************************************************************* -* Function Name : Standard_GetConfiguration. -* Description : Return the current configuration variable address. -* Input : Length - How many bytes are needed. -* Output : None. -* Return : Return 1 , if the request is invalid when "Length" is 0. -* Return "Buffer" if the "Length" is not 0. -*******************************************************************************/ -uint8_t *Standard_GetConfiguration(uint16_t Length) -{ - if (Length == 0) - { - pInformation->Ctrl_Info.Usb_wLength = - sizeof(pInformation->Current_Configuration); - return 0; - } - pUser_Standard_Requests->User_GetConfiguration(); - return (uint8_t *)&pInformation->Current_Configuration; -} - -/******************************************************************************* -* Function Name : Standard_SetConfiguration. -* Description : This routine is called to set the configuration value -* Then each class should configure device themself. -* Input : None. -* Output : None. -* Return : Return USB_SUCCESS, if the request is performed. -* Return USB_UNSUPPORT, if the request is invalid. -*******************************************************************************/ -RESULT Standard_SetConfiguration(void) -{ - - if ((pInformation->USBwValue0 <= - Device_Table.Total_Configuration) && (pInformation->USBwValue1 == 0) - && (pInformation->USBwIndex == 0)) /*call Back usb spec 2.0*/ - { - pInformation->Current_Configuration = pInformation->USBwValue0; - pUser_Standard_Requests->User_SetConfiguration(); - return USB_SUCCESS; - } - else - { - return USB_UNSUPPORT; - } -} - -/******************************************************************************* -* Function Name : Standard_GetInterface. -* Description : Return the Alternate Setting of the current interface. -* Input : Length - How many bytes are needed. -* Output : None. -* Return : Return 0, if the request is invalid when "Length" is 0. -* Return "Buffer" if the "Length" is not 0. -*******************************************************************************/ -uint8_t *Standard_GetInterface(uint16_t Length) -{ - if (Length == 0) - { - pInformation->Ctrl_Info.Usb_wLength = - sizeof(pInformation->Current_AlternateSetting); - return 0; - } - pUser_Standard_Requests->User_GetInterface(); - return (uint8_t *)&pInformation->Current_AlternateSetting; -} - -/******************************************************************************* -* Function Name : Standard_SetInterface. -* Description : This routine is called to set the interface. -* Then each class should configure the interface them self. -* Input : None. -* Output : None. -* Return : - Return USB_SUCCESS, if the request is performed. -* - Return USB_UNSUPPORT, if the request is invalid. -*******************************************************************************/ -RESULT Standard_SetInterface(void) -{ - RESULT Re; - /*Test if the specified Interface and Alternate Setting are supported by - the application Firmware*/ - Re = (*pProperty->Class_Get_Interface_Setting)(pInformation->USBwIndex0, pInformation->USBwValue0); - - if (pInformation->Current_Configuration != 0) - { - if ((Re != USB_SUCCESS) || (pInformation->USBwIndex1 != 0) - || (pInformation->USBwValue1 != 0)) - { - return USB_UNSUPPORT; - } - else if (Re == USB_SUCCESS) - { - pUser_Standard_Requests->User_SetInterface(); - pInformation->Current_Interface = pInformation->USBwIndex0; - pInformation->Current_AlternateSetting = pInformation->USBwValue0; - return USB_SUCCESS; - } - - } - - return USB_UNSUPPORT; -} - -/******************************************************************************* -* Function Name : Standard_GetStatus. -* Description : Copy the device request data to "StatusInfo buffer". -* Input : - Length - How many bytes are needed. -* Output : None. -* Return : Return 0, if the request is at end of data block, -* or is invalid when "Length" is 0. -*******************************************************************************/ -uint8_t *Standard_GetStatus(uint16_t Length) -{ - if (Length == 0) - { - pInformation->Ctrl_Info.Usb_wLength = 2; - return 0; - } - - /* Reset Status Information */ - StatusInfo.w = 0; - - if (Type_Recipient == (STANDARD_REQUEST | DEVICE_RECIPIENT)) - { - /*Get Device Status */ - uint8_t Feature = pInformation->Current_Feature; - - /* Remote Wakeup enabled */ - if (ValBit(Feature, 5)) - { - SetBit(StatusInfo0, 1); - } - else - { - ClrBit(StatusInfo0, 1); - } - - /* Bus-powered */ - if (ValBit(Feature, 6)) - { - SetBit(StatusInfo0, 0); - } - else /* Self-powered */ - { - ClrBit(StatusInfo0, 0); - } - } - /*Interface Status*/ - else if (Type_Recipient == (STANDARD_REQUEST | INTERFACE_RECIPIENT)) - { - return (uint8_t *)&StatusInfo; - } - /*Get EndPoint Status*/ - else if (Type_Recipient == (STANDARD_REQUEST | ENDPOINT_RECIPIENT)) - { - uint8_t Related_Endpoint; - uint8_t wIndex0 = pInformation->USBwIndex0; - - Related_Endpoint = (wIndex0 & 0x0f); - if (ValBit(wIndex0, 7)) - { - /* IN endpoint */ - if (_GetTxStallStatus(Related_Endpoint)) - { - SetBit(StatusInfo0, 0); /* IN Endpoint stalled */ - } - } - else - { - /* OUT endpoint */ - if (_GetRxStallStatus(Related_Endpoint)) - { - SetBit(StatusInfo0, 0); /* OUT Endpoint stalled */ - } - } - - } - else - { - return NULL; - } - pUser_Standard_Requests->User_GetStatus(); - return (uint8_t *)&StatusInfo; -} - -/******************************************************************************* -* Function Name : Standard_ClearFeature. -* Description : Clear or disable a specific feature. -* Input : None. -* Output : None. -* Return : - Return USB_SUCCESS, if the request is performed. -* - Return USB_UNSUPPORT, if the request is invalid. -*******************************************************************************/ -RESULT Standard_ClearFeature(void) -{ - uint32_t Type_Rec = Type_Recipient; - uint32_t Status; - - - if (Type_Rec == (STANDARD_REQUEST | DEVICE_RECIPIENT)) - {/*Device Clear Feature*/ - ClrBit(pInformation->Current_Feature, 5); - return USB_SUCCESS; - } - else if (Type_Rec == (STANDARD_REQUEST | ENDPOINT_RECIPIENT)) - {/*EndPoint Clear Feature*/ - DEVICE* pDev; - uint32_t Related_Endpoint; - uint32_t wIndex0; - uint32_t rEP; - - if ((pInformation->USBwValue != ENDPOINT_STALL) - || (pInformation->USBwIndex1 != 0)) - { - return USB_UNSUPPORT; - } - - pDev = &Device_Table; - wIndex0 = pInformation->USBwIndex0; - rEP = wIndex0 & ~0x80; - Related_Endpoint = ENDP0 + rEP; - - if (ValBit(pInformation->USBwIndex0, 7)) - { - /*Get Status of endpoint & stall the request if the related_ENdpoint - is Disabled*/ - Status = _GetEPTxStatus(Related_Endpoint); - } - else - { - Status = _GetEPRxStatus(Related_Endpoint); - } - - if ((rEP >= pDev->Total_Endpoint) || (Status == 0) - || (pInformation->Current_Configuration == 0)) - { - return USB_UNSUPPORT; - } - - - if (wIndex0 & 0x80) - { - /* IN endpoint */ - if (_GetTxStallStatus(Related_Endpoint )) - { - #ifndef STM32F10X_CL - ClearDTOG_TX(Related_Endpoint); - #endif /* STM32F10X_CL */ - SetEPTxStatus(Related_Endpoint, EP_TX_VALID); - } - } - else - { - /* OUT endpoint */ - if (_GetRxStallStatus(Related_Endpoint)) - { - if (Related_Endpoint == ENDP0) - { - /* After clear the STALL, enable the default endpoint receiver */ - SetEPRxCount(Related_Endpoint, Device_Property.MaxPacketSize); - _SetEPRxStatus(Related_Endpoint, EP_RX_VALID); - } - else - { - #ifndef STM32F10X_CL - ClearDTOG_RX(Related_Endpoint); - #endif /* STM32F10X_CL */ - _SetEPRxStatus(Related_Endpoint, EP_RX_VALID); - } - } - } - pUser_Standard_Requests->User_ClearFeature(); - return USB_SUCCESS; - } - - return USB_UNSUPPORT; -} - -/******************************************************************************* -* Function Name : Standard_SetEndPointFeature -* Description : Set or enable a specific feature of EndPoint -* Input : None. -* Output : None. -* Return : - Return USB_SUCCESS, if the request is performed. -* - Return USB_UNSUPPORT, if the request is invalid. -*******************************************************************************/ -RESULT Standard_SetEndPointFeature(void) -{ - uint32_t wIndex0; - uint32_t Related_Endpoint; - uint32_t rEP; - uint32_t Status; - - wIndex0 = pInformation->USBwIndex0; - rEP = wIndex0 & ~0x80; - Related_Endpoint = ENDP0 + rEP; - - if (ValBit(pInformation->USBwIndex0, 7)) - { - /* get Status of endpoint & stall the request if the related_ENdpoint - is Disabled*/ - Status = _GetEPTxStatus(Related_Endpoint); - } - else - { - Status = _GetEPRxStatus(Related_Endpoint); - } - - if (Related_Endpoint >= Device_Table.Total_Endpoint - || pInformation->USBwValue != 0 || Status == 0 - || pInformation->Current_Configuration == 0) - { - return USB_UNSUPPORT; - } - else - { - if (wIndex0 & 0x80) - { - /* IN endpoint */ - _SetEPTxStatus(Related_Endpoint, EP_TX_STALL); - } - - else - { - /* OUT endpoint */ - _SetEPRxStatus(Related_Endpoint, EP_RX_STALL); - } - } - pUser_Standard_Requests->User_SetEndPointFeature(); - return USB_SUCCESS; -} - -/******************************************************************************* -* Function Name : Standard_SetDeviceFeature. -* Description : Set or enable a specific feature of Device. -* Input : None. -* Output : None. -* Return : - Return USB_SUCCESS, if the request is performed. -* - Return USB_UNSUPPORT, if the request is invalid. -*******************************************************************************/ -RESULT Standard_SetDeviceFeature(void) -{ - SetBit(pInformation->Current_Feature, 5); - pUser_Standard_Requests->User_SetDeviceFeature(); - return USB_SUCCESS; -} - -/******************************************************************************* -* Function Name : Standard_GetDescriptorData. -* Description : Standard_GetDescriptorData is used for descriptors transfer. -* : This routine is used for the descriptors resident in Flash -* or RAM -* pDesc can be in either Flash or RAM -* The purpose of this routine is to have a versatile way to -* response descriptors request. It allows user to generate -* certain descriptors with software or read descriptors from -* external storage part by part. -* Input : - Length - Length of the data in this transfer. -* - pDesc - A pointer points to descriptor struct. -* The structure gives the initial address of the descriptor and -* its original size. -* Output : None. -* Return : Address of a part of the descriptor pointed by the Usb_ -* wOffset The buffer pointed by this address contains at least -* Length bytes. -*******************************************************************************/ -uint8_t *Standard_GetDescriptorData(uint16_t Length, ONE_DESCRIPTOR *pDesc) -{ - uint32_t wOffset; - - wOffset = pInformation->Ctrl_Info.Usb_wOffset; - if (Length == 0) - { - pInformation->Ctrl_Info.Usb_wLength = pDesc->Descriptor_Size - wOffset; - return 0; - } - - return pDesc->Descriptor + wOffset; -} - -/******************************************************************************* -* Function Name : DataStageOut. -* Description : Data stage of a Control Write Transfer. -* Input : None. -* Output : None. -* Return : None. -*******************************************************************************/ -void DataStageOut(void) -{ - ENDPOINT_INFO *pEPinfo = &pInformation->Ctrl_Info; - uint32_t save_rLength; - - save_rLength = pEPinfo->Usb_rLength; - - if (pEPinfo->CopyData && save_rLength) - { - uint8_t *Buffer; - uint32_t Length; - - Length = pEPinfo->PacketSize; - if (Length > save_rLength) - { - Length = save_rLength; - } - - Buffer = (*pEPinfo->CopyData)(Length); - pEPinfo->Usb_rLength -= Length; - pEPinfo->Usb_rOffset += Length; - - #ifdef STM32F10X_CL - OTGD_FS_PCD_EP_Read(ENDP0, Buffer, Length); - #else - PMAToUserBufferCopy(Buffer, GetEPRxAddr(ENDP0), Length); - #endif /* STM32F10X_CL */ - } - - if (pEPinfo->Usb_rLength != 0) - { - vSetEPRxStatus(EP_RX_VALID);/* re-enable for next data reception */ - SetEPTxCount(ENDP0, 0); - vSetEPTxStatus(EP_TX_VALID);/* Expect the host to abort the data OUT stage */ - } - /* Set the next State*/ - if (pEPinfo->Usb_rLength >= pEPinfo->PacketSize) - { - pInformation->ControlState = OUT_DATA; - } - else - { - if (pEPinfo->Usb_rLength > 0) - { - pInformation->ControlState = LAST_OUT_DATA; - } - else if (pEPinfo->Usb_rLength == 0) - { - pInformation->ControlState = WAIT_STATUS_IN; - USB_StatusIn(); - } - } -} - -/******************************************************************************* -* Function Name : DataStageIn. -* Description : Data stage of a Control Read Transfer. -* Input : None. -* Output : None. -* Return : None. -*******************************************************************************/ -void DataStageIn(void) -{ - ENDPOINT_INFO *pEPinfo = &pInformation->Ctrl_Info; - uint32_t save_wLength = pEPinfo->Usb_wLength; - uint32_t ControlState = pInformation->ControlState; - - uint8_t *DataBuffer; - uint32_t Length; - - if ((save_wLength == 0) && (ControlState == LAST_IN_DATA)) - { - if(Data_Mul_MaxPacketSize == TRUE) - { - /* No more data to send and empty packet */ - Send0LengthData(); - ControlState = LAST_IN_DATA; - Data_Mul_MaxPacketSize = FALSE; - } - else - { - /* No more data to send so STALL the TX Status*/ - ControlState = WAIT_STATUS_OUT; - - #ifdef STM32F10X_CL - OTGD_FS_PCD_EP_Read (ENDP0, 0, 0); - #endif /* STM32F10X_CL */ - - #ifndef STM32F10X_CL - vSetEPTxStatus(EP_TX_STALL); - #endif /* STM32F10X_CL */ - } - - goto Expect_Status_Out; - } - - Length = pEPinfo->PacketSize; - ControlState = (save_wLength <= Length) ? LAST_IN_DATA : IN_DATA; - - if (Length > save_wLength) - { - Length = save_wLength; - } - - DataBuffer = (*pEPinfo->CopyData)(Length); - -#ifdef STM32F10X_CL - OTGD_FS_PCD_EP_Write (ENDP0, DataBuffer, Length); -#else - UserToPMABufferCopy(DataBuffer, GetEPTxAddr(ENDP0), Length); -#endif /* STM32F10X_CL */ - - SetEPTxCount(ENDP0, Length); - - pEPinfo->Usb_wLength -= Length; - pEPinfo->Usb_wOffset += Length; - vSetEPTxStatus(EP_TX_VALID); - - USB_StatusOut();/* Expect the host to abort the data IN stage */ - -Expect_Status_Out: - pInformation->ControlState = ControlState; -} - -/******************************************************************************* -* Function Name : NoData_Setup0. -* Description : Proceed the processing of setup request without data stage. -* Input : None. -* Output : None. -* Return : None. -*******************************************************************************/ -void NoData_Setup0(void) -{ - RESULT Result = USB_UNSUPPORT; - uint32_t RequestNo = pInformation->USBbRequest; - uint32_t ControlState; - - if (Type_Recipient == (STANDARD_REQUEST | DEVICE_RECIPIENT)) - { - /* Device Request*/ - /* SET_CONFIGURATION*/ - if (RequestNo == SET_CONFIGURATION) - { - Result = Standard_SetConfiguration(); - } - - /*SET ADDRESS*/ - else if (RequestNo == SET_ADDRESS) - { - if ((pInformation->USBwValue0 > 127) || (pInformation->USBwValue1 != 0) - || (pInformation->USBwIndex != 0) - || (pInformation->Current_Configuration != 0)) - /* Device Address should be 127 or less*/ - { - ControlState = STALLED; - goto exit_NoData_Setup0; - } - else - { - Result = USB_SUCCESS; - - #ifdef STM32F10X_CL - SetDeviceAddress(pInformation->USBwValue0); - #endif /* STM32F10X_CL */ - } - } - /*SET FEATURE for Device*/ - else if (RequestNo == SET_FEATURE) - { - if ((pInformation->USBwValue0 == DEVICE_REMOTE_WAKEUP) - && (pInformation->USBwIndex == 0) - && (ValBit(pInformation->Current_Feature, 5))) - { - Result = Standard_SetDeviceFeature(); - } - else - { - Result = USB_UNSUPPORT; - } - } - /*Clear FEATURE for Device */ - else if (RequestNo == CLEAR_FEATURE) - { - if (pInformation->USBwValue0 == DEVICE_REMOTE_WAKEUP - && pInformation->USBwIndex == 0 - && ValBit(pInformation->Current_Feature, 5)) - { - Result = Standard_ClearFeature(); - } - else - { - Result = USB_UNSUPPORT; - } - } - - } - - /* Interface Request*/ - else if (Type_Recipient == (STANDARD_REQUEST | INTERFACE_RECIPIENT)) - { - /*SET INTERFACE*/ - if (RequestNo == SET_INTERFACE) - { - Result = Standard_SetInterface(); - } - } - - /* EndPoint Request*/ - else if (Type_Recipient == (STANDARD_REQUEST | ENDPOINT_RECIPIENT)) - { - /*CLEAR FEATURE for EndPoint*/ - if (RequestNo == CLEAR_FEATURE) - { - Result = Standard_ClearFeature(); - } - /* SET FEATURE for EndPoint*/ - else if (RequestNo == SET_FEATURE) - { - Result = Standard_SetEndPointFeature(); - } - } - else - { - Result = USB_UNSUPPORT; - } - - - if (Result != USB_SUCCESS) - { - Result = (*pProperty->Class_NoData_Setup)(RequestNo); - if (Result == USB_NOT_READY) - { - ControlState = PAUSE; - goto exit_NoData_Setup0; - } - } - - if (Result != USB_SUCCESS) - { - ControlState = STALLED; - goto exit_NoData_Setup0; - } - - ControlState = WAIT_STATUS_IN;/* After no data stage SETUP */ - - USB_StatusIn(); - -exit_NoData_Setup0: - pInformation->ControlState = ControlState; - return; -} - -/******************************************************************************* -* Function Name : Data_Setup0. -* Description : Proceed the processing of setup request with data stage. -* Input : None. -* Output : None. -* Return : None. -*******************************************************************************/ -void Data_Setup0(void) -{ - uint8_t *(*CopyRoutine)(uint16_t); - RESULT Result; - uint32_t Request_No = pInformation->USBbRequest; - - uint32_t Related_Endpoint, Reserved; - uint32_t wOffset, Status; - - - - CopyRoutine = NULL; - wOffset = 0; - - /*GET DESCRIPTOR*/ - if (Request_No == GET_DESCRIPTOR) - { - if (Type_Recipient == (STANDARD_REQUEST | DEVICE_RECIPIENT)) - { - uint8_t wValue1 = pInformation->USBwValue1; - if (wValue1 == DEVICE_DESCRIPTOR) - { - CopyRoutine = pProperty->GetDeviceDescriptor; - } - else if (wValue1 == CONFIG_DESCRIPTOR) - { - CopyRoutine = pProperty->GetConfigDescriptor; - } - else if (wValue1 == STRING_DESCRIPTOR) - { - CopyRoutine = pProperty->GetStringDescriptor; - } /* End of GET_DESCRIPTOR */ - } - } - - /*GET STATUS*/ - else if ((Request_No == GET_STATUS) && (pInformation->USBwValue == 0) - && (pInformation->USBwLength == 0x0002) - && (pInformation->USBwIndex1 == 0)) - { - /* GET STATUS for Device*/ - if ((Type_Recipient == (STANDARD_REQUEST | DEVICE_RECIPIENT)) - && (pInformation->USBwIndex == 0)) - { - CopyRoutine = Standard_GetStatus; - } - - /* GET STATUS for Interface*/ - else if (Type_Recipient == (STANDARD_REQUEST | INTERFACE_RECIPIENT)) - { - if (((*pProperty->Class_Get_Interface_Setting)(pInformation->USBwIndex0, 0) == USB_SUCCESS) - && (pInformation->Current_Configuration != 0)) - { - CopyRoutine = Standard_GetStatus; - } - } - - /* GET STATUS for EndPoint*/ - else if (Type_Recipient == (STANDARD_REQUEST | ENDPOINT_RECIPIENT)) - { - Related_Endpoint = (pInformation->USBwIndex0 & 0x0f); - Reserved = pInformation->USBwIndex0 & 0x70; - - if (ValBit(pInformation->USBwIndex0, 7)) - { - /*Get Status of endpoint & stall the request if the related_ENdpoint - is Disabled*/ - Status = _GetEPTxStatus(Related_Endpoint); - } - else - { - Status = _GetEPRxStatus(Related_Endpoint); - } - - if ((Related_Endpoint < Device_Table.Total_Endpoint) && (Reserved == 0) - && (Status != 0)) - { - CopyRoutine = Standard_GetStatus; - } - } - - } - - /*GET CONFIGURATION*/ - else if (Request_No == GET_CONFIGURATION) - { - if (Type_Recipient == (STANDARD_REQUEST | DEVICE_RECIPIENT)) - { - CopyRoutine = Standard_GetConfiguration; - } - } - /*GET INTERFACE*/ - else if (Request_No == GET_INTERFACE) - { - if ((Type_Recipient == (STANDARD_REQUEST | INTERFACE_RECIPIENT)) - && (pInformation->Current_Configuration != 0) && (pInformation->USBwValue == 0) - && (pInformation->USBwIndex1 == 0) && (pInformation->USBwLength == 0x0001) - && ((*pProperty->Class_Get_Interface_Setting)(pInformation->USBwIndex0, 0) == USB_SUCCESS)) - { - CopyRoutine = Standard_GetInterface; - } - - } - - if (CopyRoutine) - { - pInformation->Ctrl_Info.Usb_wOffset = wOffset; - pInformation->Ctrl_Info.CopyData = CopyRoutine; - /* sb in the original the cast to word was directly */ - /* now the cast is made step by step */ - (*CopyRoutine)(0); - Result = USB_SUCCESS; - } - else - { - Result = (*pProperty->Class_Data_Setup)(pInformation->USBbRequest); - if (Result == USB_NOT_READY) - { - pInformation->ControlState = PAUSE; - return; - } - } - - if (pInformation->Ctrl_Info.Usb_wLength == 0xFFFF) - { - /* Data is not ready, wait it */ - pInformation->ControlState = PAUSE; - return; - } - if ((Result == USB_UNSUPPORT) || (pInformation->Ctrl_Info.Usb_wLength == 0)) - { - /* Unsupported request */ - pInformation->ControlState = STALLED; - return; - } - - - if (ValBit(pInformation->USBbmRequestType, 7)) - { - /* Device ==> Host */ - __IO uint32_t wLength = pInformation->USBwLength; - - /* Restrict the data length to be the one host asks for */ - if (pInformation->Ctrl_Info.Usb_wLength > wLength) - { - pInformation->Ctrl_Info.Usb_wLength = wLength; - } - - else if (pInformation->Ctrl_Info.Usb_wLength < pInformation->USBwLength) - { - if (pInformation->Ctrl_Info.Usb_wLength < pProperty->MaxPacketSize) - { - Data_Mul_MaxPacketSize = FALSE; - } - else if ((pInformation->Ctrl_Info.Usb_wLength % pProperty->MaxPacketSize) == 0) - { - Data_Mul_MaxPacketSize = TRUE; - } - } - - pInformation->Ctrl_Info.PacketSize = pProperty->MaxPacketSize; - DataStageIn(); - } - else - { - pInformation->ControlState = OUT_DATA; - vSetEPRxStatus(EP_RX_VALID); /* enable for next data reception */ - } - - return; -} - -/******************************************************************************* -* Function Name : Setup0_Process -* Description : Get the device request data and dispatch to individual process. -* Input : None. -* Output : None. -* Return : Post0_Process. -*******************************************************************************/ -uint8_t Setup0_Process(void) -{ - - union - { - uint8_t* b; - uint16_t* w; - } pBuf; - -#ifdef STM32F10X_CL - USB_OTG_EP *ep; - uint16_t offset = 0; - - ep = OTGD_FS_PCD_GetOutEP(ENDP0); - pBuf.b = ep->xfer_buff; - - OTGD_FS_EP0StartXfer(ep); -#else - uint16_t offset = 1; - - pBuf.b = PMAAddr + (uint8_t *)(_GetEPRxAddr(ENDP0) * 2); /* *2 for 32 bits addr */ -#endif /* STM32F10X_CL */ - - if (pInformation->ControlState != PAUSE) - { - pInformation->USBbmRequestType = *pBuf.b++; /* bmRequestType */ - pInformation->USBbRequest = *pBuf.b++; /* bRequest */ - pBuf.w += offset; /* word not accessed because of 32 bits addressing */ - pInformation->USBwValue = ByteSwap(*pBuf.w++); /* wValue */ - pBuf.w += offset; /* word not accessed because of 32 bits addressing */ - pInformation->USBwIndex = ByteSwap(*pBuf.w++); /* wIndex */ - pBuf.w += offset; /* word not accessed because of 32 bits addressing */ - pInformation->USBwLength = *pBuf.w; /* wLength */ - } - - pInformation->ControlState = SETTING_UP; - if (pInformation->USBwLength == 0) - { - /* Setup with no data stage */ - NoData_Setup0(); - } - else - { - /* Setup with data stage */ - Data_Setup0(); - } - return Post0_Process(); -} - -/******************************************************************************* -* Function Name : In0_Process -* Description : Process the IN token on all default endpoint. -* Input : None. -* Output : None. -* Return : Post0_Process. -*******************************************************************************/ -uint8_t In0_Process(void) -{ - uint32_t ControlState = pInformation->ControlState; - - if ((ControlState == IN_DATA) || (ControlState == LAST_IN_DATA)) - { - DataStageIn(); - /* ControlState may be changed outside the function */ - ControlState = pInformation->ControlState; - } - - else if (ControlState == WAIT_STATUS_IN) - { - if ((pInformation->USBbRequest == SET_ADDRESS) && - (Type_Recipient == (STANDARD_REQUEST | DEVICE_RECIPIENT))) - { - SetDeviceAddress(pInformation->USBwValue0); - pUser_Standard_Requests->User_SetDeviceAddress(); - } - (*pProperty->Process_Status_IN)(); - ControlState = STALLED; - } - - else - { - ControlState = STALLED; - } - - pInformation->ControlState = ControlState; - - return Post0_Process(); -} - -/******************************************************************************* -* Function Name : Out0_Process -* Description : Process the OUT token on all default endpoint. -* Input : None. -* Output : None. -* Return : Post0_Process. -*******************************************************************************/ -uint8_t Out0_Process(void) -{ - uint32_t ControlState = pInformation->ControlState; - - if ((ControlState == IN_DATA) || (ControlState == LAST_IN_DATA)) - { - /* host aborts the transfer before finish */ - ControlState = STALLED; - } - else if ((ControlState == OUT_DATA) || (ControlState == LAST_OUT_DATA)) - { - DataStageOut(); - ControlState = pInformation->ControlState; /* may be changed outside the function */ - } - - else if (ControlState == WAIT_STATUS_OUT) - { - (*pProperty->Process_Status_OUT)(); - #ifndef STM32F10X_CL - ControlState = STALLED; - #endif /* STM32F10X_CL */ - } - - - /* Unexpect state, STALL the endpoint */ - else - { - ControlState = STALLED; - } - - pInformation->ControlState = ControlState; - - return Post0_Process(); -} - -/******************************************************************************* -* Function Name : Post0_Process -* Description : Stall the Endpoint 0 in case of error. -* Input : None. -* Output : None. -* Return : - 0 if the control State is in PAUSE -* - 1 if not. -*******************************************************************************/ -uint8_t Post0_Process(void) -{ -#ifdef STM32F10X_CL - USB_OTG_EP *ep; -#endif /* STM32F10X_CL */ - - SetEPRxCount(ENDP0, Device_Property.MaxPacketSize); - - if (pInformation->ControlState == STALLED) - { - vSetEPRxStatus(EP_RX_STALL); - vSetEPTxStatus(EP_TX_STALL); - } - -#ifdef STM32F10X_CL - else if ((pInformation->ControlState == OUT_DATA) || - (pInformation->ControlState == WAIT_STATUS_OUT)) - { - ep = OTGD_FS_PCD_GetInEP(0); - ep->is_in = 0; - OTGD_FS_EP0StartXfer(ep); - - vSetEPTxStatus(EP_TX_VALID); - } - - else if ((pInformation->ControlState == IN_DATA) || - (pInformation->ControlState == WAIT_STATUS_IN)) - { - ep = OTGD_FS_PCD_GetInEP(0); - ep->is_in = 1; - OTGD_FS_EP0StartXfer(ep); - } -#endif /* STM32F10X_CL */ - - return (pInformation->ControlState == PAUSE); -} - -/******************************************************************************* -* Function Name : SetDeviceAddress. -* Description : Set the device and all the used Endpoints addresses. -* Input : - Val: device adress. -* Output : None. -* Return : None. -*******************************************************************************/ -void SetDeviceAddress(uint8_t Val) -{ -#ifdef STM32F10X_CL - OTGD_FS_PCD_EP_SetAddress ((uint8_t)Val); -#else - uint32_t i; - uint32_t nEP = Device_Table.Total_Endpoint; - - /* set address in every used endpoint */ - for (i = 0; i < nEP; i++) - { - _SetEPAddress((uint8_t)i, (uint8_t)i); - } /* for */ - _SetDADDR(Val | DADDR_EF); /* set device address and enable function */ -#endif /* STM32F10X_CL */ -} - -/******************************************************************************* -* Function Name : NOP_Process -* Description : No operation function. -* Input : None. -* Output : None. -* Return : None. -*******************************************************************************/ -void NOP_Process(void) -{ -} - -/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/Libraries/STM32_USB-FS-Device_Driver/src/usb_init.c b/bsp/stm32_radio/Libraries/STM32_USB-FS-Device_Driver/src/usb_init.c deleted file mode 100644 index e7a250978d..0000000000 --- a/bsp/stm32_radio/Libraries/STM32_USB-FS-Device_Driver/src/usb_init.c +++ /dev/null @@ -1,63 +0,0 @@ -/******************** (C) COPYRIGHT 2009 STMicroelectronics ******************** -* File Name : usb_init.c -* Author : MCD Application Team -* Version : V3.1.0 -* Date : 10/30/2009 -* Description : Initialization routines & global variables -******************************************************************************** -* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS -* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. -* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, -* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE -* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING -* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -/* Includes ------------------------------------------------------------------*/ -#include "usb_lib.h" - -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ -/* Private macro -------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/* The number of current endpoint, it will be used to specify an endpoint */ - uint8_t EPindex; -/* The number of current device, it is an index to the Device_Table */ -/* uint8_t Device_no; */ -/* Points to the DEVICE_INFO structure of current device */ -/* The purpose of this register is to speed up the execution */ -DEVICE_INFO *pInformation; -/* Points to the DEVICE_PROP structure of current device */ -/* The purpose of this register is to speed up the execution */ -DEVICE_PROP *pProperty; -/* Temporary save the state of Rx & Tx status. */ -/* Whenever the Rx or Tx state is changed, its value is saved */ -/* in this variable first and will be set to the EPRB or EPRA */ -/* at the end of interrupt process */ -uint16_t SaveState ; -uint16_t wInterrupt_Mask; -DEVICE_INFO Device_Info; -USER_STANDARD_REQUESTS *pUser_Standard_Requests; - -/* Extern variables ----------------------------------------------------------*/ -/* Private function prototypes -----------------------------------------------*/ -/* Private functions ---------------------------------------------------------*/ - -/******************************************************************************* -* Function Name : USB_Init -* Description : USB system initialization -* Input : None. -* Output : None. -* Return : None. -*******************************************************************************/ -void USB_Init(void) -{ - pInformation = &Device_Info; - pInformation->ControlState = 2; - pProperty = &Device_Property; - pUser_Standard_Requests = &User_Standard_Requests; - /* Initialize devices one by one */ - pProperty->Init(); -} - -/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/Libraries/STM32_USB-FS-Device_Driver/src/usb_int.c b/bsp/stm32_radio/Libraries/STM32_USB-FS-Device_Driver/src/usb_int.c deleted file mode 100644 index 9cf001d975..0000000000 --- a/bsp/stm32_radio/Libraries/STM32_USB-FS-Device_Driver/src/usb_int.c +++ /dev/null @@ -1,188 +0,0 @@ -/******************** (C) COPYRIGHT 2009 STMicroelectronics ******************** -* File Name : usb_int.c -* Author : MCD Application Team -* Version : V3.1.0 -* Date : 10/30/2009 -* Description : Endpoint CTR (Low and High) interrupt's service routines -******************************************************************************** -* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS -* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. -* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, -* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE -* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING -* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ -#ifndef STM32F10X_CL - -/* Includes ------------------------------------------------------------------*/ -#include "usb_lib.h" - -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ -/* Private macro -------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -__IO uint16_t SaveRState; -__IO uint16_t SaveTState; - -/* Extern variables ----------------------------------------------------------*/ -extern void (*pEpInt_IN[7])(void); /* Handles IN interrupts */ -extern void (*pEpInt_OUT[7])(void); /* Handles OUT interrupts */ - -/* Private function prototypes -----------------------------------------------*/ -/* Private functions ---------------------------------------------------------*/ - -/******************************************************************************* -* Function Name : CTR_LP. -* Description : Low priority Endpoint Correct Transfer interrupt's service -* routine. -* Input : None. -* Output : None. -* Return : None. -*******************************************************************************/ -void CTR_LP(void) -{ - __IO uint16_t wEPVal = 0; - /* stay in loop while pending ints */ - while (((wIstr = _GetISTR()) & ISTR_CTR) != 0) - { - /* extract highest priority endpoint number */ - EPindex = (uint8_t)(wIstr & ISTR_EP_ID); - if (EPindex == 0) - { - /* Decode and service control endpoint interrupt */ - /* calling related service routine */ - /* (Setup0_Process, In0_Process, Out0_Process) */ - - /* save RX & TX status */ - /* and set both to NAK */ - - - SaveRState = _GetENDPOINT(ENDP0); - SaveTState = SaveRState & EPTX_STAT; - SaveRState &= EPRX_STAT; - - _SetEPRxTxStatus(ENDP0,EP_RX_NAK,EP_TX_NAK); - - /* DIR bit = origin of the interrupt */ - - if ((wIstr & ISTR_DIR) == 0) - { - /* DIR = 0 */ - - /* DIR = 0 => IN int */ - /* DIR = 0 implies that (EP_CTR_TX = 1) always */ - - - _ClearEP_CTR_TX(ENDP0); - In0_Process(); - - /* before terminate set Tx & Rx status */ - - _SetEPRxTxStatus(ENDP0,SaveRState,SaveTState); - return; - } - else - { - /* DIR = 1 */ - - /* DIR = 1 & CTR_RX => SETUP or OUT int */ - /* DIR = 1 & (CTR_TX | CTR_RX) => 2 int pending */ - - wEPVal = _GetENDPOINT(ENDP0); - - if ((wEPVal &EP_SETUP) != 0) - { - _ClearEP_CTR_RX(ENDP0); /* SETUP bit kept frozen while CTR_RX = 1 */ - Setup0_Process(); - /* before terminate set Tx & Rx status */ - - _SetEPRxTxStatus(ENDP0,SaveRState,SaveTState); - return; - } - - else if ((wEPVal & EP_CTR_RX) != 0) - { - _ClearEP_CTR_RX(ENDP0); - Out0_Process(); - /* before terminate set Tx & Rx status */ - - _SetEPRxTxStatus(ENDP0,SaveRState,SaveTState); - return; - } - } - }/* if(EPindex == 0) */ - else - { - /* Decode and service non control endpoints interrupt */ - - /* process related endpoint register */ - wEPVal = _GetENDPOINT(EPindex); - if ((wEPVal & EP_CTR_RX) != 0) - { - /* clear int flag */ - _ClearEP_CTR_RX(EPindex); - - /* call OUT service function */ - (*pEpInt_OUT[EPindex-1])(); - - } /* if((wEPVal & EP_CTR_RX) */ - - if ((wEPVal & EP_CTR_TX) != 0) - { - /* clear int flag */ - _ClearEP_CTR_TX(EPindex); - - /* call IN service function */ - (*pEpInt_IN[EPindex-1])(); - } /* if((wEPVal & EP_CTR_TX) != 0) */ - - }/* if(EPindex == 0) else */ - - }/* while(...) */ -} - -/******************************************************************************* -* Function Name : CTR_HP. -* Description : High Priority Endpoint Correct Transfer interrupt's service -* routine. -* Input : None. -* Output : None. -* Return : None. -*******************************************************************************/ -void CTR_HP(void) -{ - uint32_t wEPVal = 0; - - while (((wIstr = _GetISTR()) & ISTR_CTR) != 0) - { - _SetISTR((uint16_t)CLR_CTR); /* clear CTR flag */ - /* extract highest priority endpoint number */ - EPindex = (uint8_t)(wIstr & ISTR_EP_ID); - /* process related endpoint register */ - wEPVal = _GetENDPOINT(EPindex); - if ((wEPVal & EP_CTR_RX) != 0) - { - /* clear int flag */ - _ClearEP_CTR_RX(EPindex); - - /* call OUT service function */ - (*pEpInt_OUT[EPindex-1])(); - - } /* if((wEPVal & EP_CTR_RX) */ - else if ((wEPVal & EP_CTR_TX) != 0) - { - /* clear int flag */ - _ClearEP_CTR_TX(EPindex); - - /* call IN service function */ - (*pEpInt_IN[EPindex-1])(); - - - } /* if((wEPVal & EP_CTR_TX) != 0) */ - - }/* while(...) */ -} - -#endif /* STM32F10X_CL */ - -/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/Libraries/STM32_USB-FS-Device_Driver/src/usb_mem.c b/bsp/stm32_radio/Libraries/STM32_USB-FS-Device_Driver/src/usb_mem.c deleted file mode 100644 index 5a03910a07..0000000000 --- a/bsp/stm32_radio/Libraries/STM32_USB-FS-Device_Driver/src/usb_mem.c +++ /dev/null @@ -1,75 +0,0 @@ -/******************** (C) COPYRIGHT 2009 STMicroelectronics ******************** -* File Name : usb_mem.c -* Author : MCD Application Team -* Version : V3.1.0 -* Date : 10/30/2009 -* Description : Utility functions for memory transfers to/from PMA -******************************************************************************** -* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS -* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. -* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, -* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE -* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING -* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ -#ifndef STM32F10X_CL - -/* Includes ------------------------------------------------------------------*/ -#include "usb_lib.h" - -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ -/* Private macro -------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/* Extern variables ----------------------------------------------------------*/ -/* Private function prototypes -----------------------------------------------*/ -/* Private functions ---------------------------------------------------------*/ -/******************************************************************************* -* Function Name : UserToPMABufferCopy -* Description : Copy a buffer from user memory area to packet memory area (PMA) -* Input : - pbUsrBuf: pointer to user memory area. -* - wPMABufAddr: address into PMA. -* - wNBytes: no. of bytes to be copied. -* Output : None. -* Return : None . -*******************************************************************************/ -void UserToPMABufferCopy(uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes) -{ - uint32_t n = (wNBytes + 1) >> 1; /* n = (wNBytes + 1) / 2 */ - uint32_t i, temp1, temp2; - uint16_t *pdwVal; - pdwVal = (uint16_t *)(wPMABufAddr * 2 + PMAAddr); - for (i = n; i != 0; i--) - { - temp1 = (uint16_t) * pbUsrBuf; - pbUsrBuf++; - temp2 = temp1 | (uint16_t) * pbUsrBuf << 8; - *pdwVal++ = temp2; - pdwVal++; - pbUsrBuf++; - } -} -/******************************************************************************* -* Function Name : PMAToUserBufferCopy -* Description : Copy a buffer from user memory area to packet memory area (PMA) -* Input : - pbUsrBuf = pointer to user memory area. -* - wPMABufAddr = address into PMA. -* - wNBytes = no. of bytes to be copied. -* Output : None. -* Return : None. -*******************************************************************************/ -void PMAToUserBufferCopy(uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes) -{ - uint32_t n = (wNBytes + 1) >> 1;/* /2*/ - uint32_t i; - uint32_t *pdwVal; - pdwVal = (uint32_t *)(wPMABufAddr * 2 + PMAAddr); - for (i = n; i != 0; i--) - { - *(uint16_t*)pbUsrBuf++ = *pdwVal++; - pbUsrBuf++; - } -} - -#endif /* STM32F10X_CL */ -/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/Libraries/STM32_USB-FS-Device_Driver/src/usb_regs.c b/bsp/stm32_radio/Libraries/STM32_USB-FS-Device_Driver/src/usb_regs.c deleted file mode 100644 index 38e8bbb1aa..0000000000 --- a/bsp/stm32_radio/Libraries/STM32_USB-FS-Device_Driver/src/usb_regs.c +++ /dev/null @@ -1,750 +0,0 @@ -/******************** (C) COPYRIGHT 2009 STMicroelectronics ******************** -* File Name : usb_regs.c -* Author : MCD Application Team -* Version : V3.1.0 -* Date : 10/30/2009 -* Description : Interface functions to USB cell registers -******************************************************************************** -* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS -* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. -* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, -* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE -* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING -* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ -#ifndef STM32F10X_CL - -/* Includes ------------------------------------------------------------------*/ -#include "usb_lib.h" - -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ -/* Private macro -------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/* Extern variables ----------------------------------------------------------*/ -/* Private function prototypes -----------------------------------------------*/ -/* Private functions ---------------------------------------------------------*/ - -/******************************************************************************* -* Function Name : SetCNTR. -* Description : Set the CNTR register value. -* Input : wRegValue: new register value. -* Output : None. -* Return : None. -*******************************************************************************/ -void SetCNTR(uint16_t wRegValue) -{ - _SetCNTR(wRegValue); -} - -/******************************************************************************* -* Function Name : GetCNTR. -* Description : returns the CNTR register value. -* Input : None. -* Output : None. -* Return : CNTR register Value. -*******************************************************************************/ -uint16_t GetCNTR(void) -{ - return(_GetCNTR()); -} - -/******************************************************************************* -* Function Name : SetISTR. -* Description : Set the ISTR register value. -* Input : wRegValue: new register value. -* Output : None. -* Return : None. -*******************************************************************************/ -void SetISTR(uint16_t wRegValue) -{ - _SetISTR(wRegValue); -} - -/******************************************************************************* -* Function Name : GetISTR -* Description : Returns the ISTR register value. -* Input : None. -* Output : None. -* Return : ISTR register Value -*******************************************************************************/ -uint16_t GetISTR(void) -{ - return(_GetISTR()); -} - -/******************************************************************************* -* Function Name : GetFNR -* Description : Returns the FNR register value. -* Input : None. -* Output : None. -* Return : FNR register Value -*******************************************************************************/ -uint16_t GetFNR(void) -{ - return(_GetFNR()); -} - -/******************************************************************************* -* Function Name : SetDADDR -* Description : Set the DADDR register value. -* Input : wRegValue: new register value. -* Output : None. -* Return : None. -*******************************************************************************/ -void SetDADDR(uint16_t wRegValue) -{ - _SetDADDR(wRegValue); -} - -/******************************************************************************* -* Function Name : GetDADDR -* Description : Returns the DADDR register value. -* Input : None. -* Output : None. -* Return : DADDR register Value -*******************************************************************************/ -uint16_t GetDADDR(void) -{ - return(_GetDADDR()); -} - -/******************************************************************************* -* Function Name : SetBTABLE -* Description : Set the BTABLE. -* Input : wRegValue: New register value. -* Output : None. -* Return : None. -*******************************************************************************/ -void SetBTABLE(uint16_t wRegValue) -{ - _SetBTABLE(wRegValue); -} - -/******************************************************************************* -* Function Name : GetBTABLE. -* Description : Returns the BTABLE register value. -* Input : None. -* Output : None. -* Return : BTABLE address. -*******************************************************************************/ -uint16_t GetBTABLE(void) -{ - return(_GetBTABLE()); -} - -/******************************************************************************* -* Function Name : SetENDPOINT -* Description : Setthe Endpoint register value. -* Input : bEpNum: Endpoint Number. -* wRegValue. -* Output : None. -* Return : None. -*******************************************************************************/ -void SetENDPOINT(uint8_t bEpNum, uint16_t wRegValue) -{ - _SetENDPOINT(bEpNum, wRegValue); -} - -/******************************************************************************* -* Function Name : GetENDPOINT -* Description : Return the Endpoint register value. -* Input : bEpNum: Endpoint Number. -* Output : None. -* Return : Endpoint register value. -*******************************************************************************/ -uint16_t GetENDPOINT(uint8_t bEpNum) -{ - return(_GetENDPOINT(bEpNum)); -} - -/******************************************************************************* -* Function Name : SetEPType -* Description : sets the type in the endpoint register. -* Input : bEpNum: Endpoint Number. -* wType: type definition. -* Output : None. -* Return : None. -*******************************************************************************/ -void SetEPType(uint8_t bEpNum, uint16_t wType) -{ - _SetEPType(bEpNum, wType); -} - -/******************************************************************************* -* Function Name : GetEPType -* Description : Returns the endpoint type. -* Input : bEpNum: Endpoint Number. -* Output : None. -* Return : Endpoint Type -*******************************************************************************/ -uint16_t GetEPType(uint8_t bEpNum) -{ - return(_GetEPType(bEpNum)); -} - -/******************************************************************************* -* Function Name : SetEPTxStatus -* Description : Set the status of Tx endpoint. -* Input : bEpNum: Endpoint Number. -* wState: new state. -* Output : None. -* Return : None. -*******************************************************************************/ -void SetEPTxStatus(uint8_t bEpNum, uint16_t wState) -{ - _SetEPTxStatus(bEpNum, wState); -} - -/******************************************************************************* -* Function Name : SetEPRxStatus -* Description : Set the status of Rx endpoint. -* Input : bEpNum: Endpoint Number. -* wState: new state. -* Output : None. -* Return : None. -*******************************************************************************/ -void SetEPRxStatus(uint8_t bEpNum, uint16_t wState) -{ - _SetEPRxStatus(bEpNum, wState); -} - -/******************************************************************************* -* Function Name : SetDouBleBuffEPStall -* Description : sets the status for Double Buffer Endpoint to STALL -* Input : bEpNum: Endpoint Number. -* bDir: Endpoint direction. -* Output : None. -* Return : None. -*******************************************************************************/ -void SetDouBleBuffEPStall(uint8_t bEpNum, uint8_t bDir) -{ - uint16_t Endpoint_DTOG_Status; - Endpoint_DTOG_Status = GetENDPOINT(bEpNum); - if (bDir == EP_DBUF_OUT) - { /* OUT double buffered endpoint */ - _SetENDPOINT(bEpNum, Endpoint_DTOG_Status & ~EPRX_DTOG1); - } - else if (bDir == EP_DBUF_IN) - { /* IN double buffered endpoint */ - _SetENDPOINT(bEpNum, Endpoint_DTOG_Status & ~EPTX_DTOG1); - } -} - -/******************************************************************************* -* Function Name : GetEPTxStatus -* Description : Returns the endpoint Tx status. -* Input : bEpNum: Endpoint Number. -* Output : None. -* Return : Endpoint TX Status -*******************************************************************************/ -uint16_t GetEPTxStatus(uint8_t bEpNum) -{ - return(_GetEPTxStatus(bEpNum)); -} - -/******************************************************************************* -* Function Name : GetEPRxStatus -* Description : Returns the endpoint Rx status. -* Input : bEpNum: Endpoint Number. -* Output : None. -* Return : Endpoint RX Status -*******************************************************************************/ -uint16_t GetEPRxStatus(uint8_t bEpNum) -{ - return(_GetEPRxStatus(bEpNum)); -} - -/******************************************************************************* -* Function Name : SetEPTxValid -* Description : Valid the endpoint Tx Status. -* Input : bEpNum: Endpoint Number. -* Output : None. -* Return : None. -*******************************************************************************/ -void SetEPTxValid(uint8_t bEpNum) -{ - _SetEPTxStatus(bEpNum, EP_TX_VALID); -} - -/******************************************************************************* -* Function Name : SetEPRxValid -* Description : Valid the endpoint Rx Status. -* Input : bEpNum: Endpoint Number. -* Output : None. -* Return : None. -*******************************************************************************/ -void SetEPRxValid(uint8_t bEpNum) -{ - _SetEPRxStatus(bEpNum, EP_RX_VALID); -} - -/******************************************************************************* -* Function Name : SetEP_KIND -* Description : Clear the EP_KIND bit. -* Input : bEpNum: Endpoint Number. -* Output : None. -* Return : None. -*******************************************************************************/ -void SetEP_KIND(uint8_t bEpNum) -{ - _SetEP_KIND(bEpNum); -} - -/******************************************************************************* -* Function Name : ClearEP_KIND -* Description : set the EP_KIND bit. -* Input : bEpNum: Endpoint Number. -* Output : None. -* Return : None. -*******************************************************************************/ -void ClearEP_KIND(uint8_t bEpNum) -{ - _ClearEP_KIND(bEpNum); -} -/******************************************************************************* -* Function Name : Clear_Status_Out -* Description : Clear the Status Out of the related Endpoint -* Input : bEpNum: Endpoint Number. -* Output : None. -* Return : None. -*******************************************************************************/ -void Clear_Status_Out(uint8_t bEpNum) -{ - _ClearEP_KIND(bEpNum); -} -/******************************************************************************* -* Function Name : Set_Status_Out -* Description : Set the Status Out of the related Endpoint -* Input : bEpNum: Endpoint Number. -* Output : None. -* Return : None. -*******************************************************************************/ -void Set_Status_Out(uint8_t bEpNum) -{ - _SetEP_KIND(bEpNum); -} -/******************************************************************************* -* Function Name : SetEPDoubleBuff -* Description : Enable the double buffer feature for the endpoint. -* Input : bEpNum: Endpoint Number. -* Output : None. -* Return : None. -*******************************************************************************/ -void SetEPDoubleBuff(uint8_t bEpNum) -{ - _SetEP_KIND(bEpNum); -} -/******************************************************************************* -* Function Name : ClearEPDoubleBuff -* Description : Disable the double buffer feature for the endpoint. -* Input : bEpNum: Endpoint Number. -* Output : None. -* Return : None. -*******************************************************************************/ -void ClearEPDoubleBuff(uint8_t bEpNum) -{ - _ClearEP_KIND(bEpNum); -} -/******************************************************************************* -* Function Name : GetTxStallStatus -* Description : Returns the Stall status of the Tx endpoint. -* Input : bEpNum: Endpoint Number. -* Output : None. -* Return : Tx Stall status. -*******************************************************************************/ -uint16_t GetTxStallStatus(uint8_t bEpNum) -{ - return(_GetTxStallStatus(bEpNum)); -} -/******************************************************************************* -* Function Name : GetRxStallStatus -* Description : Returns the Stall status of the Rx endpoint. -* Input : bEpNum: Endpoint Number. -* Output : None. -* Return : Rx Stall status. -*******************************************************************************/ -uint16_t GetRxStallStatus(uint8_t bEpNum) -{ - return(_GetRxStallStatus(bEpNum)); -} -/******************************************************************************* -* Function Name : ClearEP_CTR_RX -* Description : Clear the CTR_RX bit. -* Input : bEpNum: Endpoint Number. -* Output : None. -* Return : None. -*******************************************************************************/ -void ClearEP_CTR_RX(uint8_t bEpNum) -{ - _ClearEP_CTR_RX(bEpNum); -} -/******************************************************************************* -* Function Name : ClearEP_CTR_TX -* Description : Clear the CTR_TX bit. -* Input : bEpNum: Endpoint Number. -* Output : None. -* Return : None. -*******************************************************************************/ -void ClearEP_CTR_TX(uint8_t bEpNum) -{ - _ClearEP_CTR_TX(bEpNum); -} -/******************************************************************************* -* Function Name : ToggleDTOG_RX -* Description : Toggle the DTOG_RX bit. -* Input : bEpNum: Endpoint Number. -* Output : None. -* Return : None. -*******************************************************************************/ -void ToggleDTOG_RX(uint8_t bEpNum) -{ - _ToggleDTOG_RX(bEpNum); -} -/******************************************************************************* -* Function Name : ToggleDTOG_TX -* Description : Toggle the DTOG_TX bit. -* Input : bEpNum: Endpoint Number. -* Output : None. -* Return : None. -*******************************************************************************/ -void ToggleDTOG_TX(uint8_t bEpNum) -{ - _ToggleDTOG_TX(bEpNum); -} -/******************************************************************************* -* Function Name : ClearDTOG_RX. -* Description : Clear the DTOG_RX bit. -* Input : bEpNum: Endpoint Number. -* Output : None. -* Return : None. -*******************************************************************************/ -void ClearDTOG_RX(uint8_t bEpNum) -{ - _ClearDTOG_RX(bEpNum); -} -/******************************************************************************* -* Function Name : ClearDTOG_TX. -* Description : Clear the DTOG_TX bit. -* Input : bEpNum: Endpoint Number. -* Output : None. -* Return : None. -*******************************************************************************/ -void ClearDTOG_TX(uint8_t bEpNum) -{ - _ClearDTOG_TX(bEpNum); -} -/******************************************************************************* -* Function Name : SetEPAddress -* Description : Set the endpoint address. -* Input : bEpNum: Endpoint Number. -* bAddr: New endpoint address. -* Output : None. -* Return : None. -*******************************************************************************/ -void SetEPAddress(uint8_t bEpNum, uint8_t bAddr) -{ - _SetEPAddress(bEpNum, bAddr); -} -/******************************************************************************* -* Function Name : GetEPAddress -* Description : Get the endpoint address. -* Input : bEpNum: Endpoint Number. -* Output : None. -* Return : Endpoint address. -*******************************************************************************/ -uint8_t GetEPAddress(uint8_t bEpNum) -{ - return(_GetEPAddress(bEpNum)); -} -/******************************************************************************* -* Function Name : SetEPTxAddr -* Description : Set the endpoint Tx buffer address. -* Input : bEpNum: Endpoint Number. -* wAddr: new address. -* Output : None. -* Return : None. -*******************************************************************************/ -void SetEPTxAddr(uint8_t bEpNum, uint16_t wAddr) -{ - _SetEPTxAddr(bEpNum, wAddr); -} -/******************************************************************************* -* Function Name : SetEPRxAddr -* Description : Set the endpoint Rx buffer address. -* Input : bEpNum: Endpoint Number. -* wAddr: new address. -* Output : None. -* Return : None. -*******************************************************************************/ -void SetEPRxAddr(uint8_t bEpNum, uint16_t wAddr) -{ - _SetEPRxAddr(bEpNum, wAddr); -} -/******************************************************************************* -* Function Name : GetEPTxAddr -* Description : Returns the endpoint Tx buffer address. -* Input : bEpNum: Endpoint Number. -* Output : None. -* Return : Rx buffer address. -*******************************************************************************/ -uint16_t GetEPTxAddr(uint8_t bEpNum) -{ - return(_GetEPTxAddr(bEpNum)); -} -/******************************************************************************* -* Function Name : GetEPRxAddr. -* Description : Returns the endpoint Rx buffer address. -* Input : bEpNum: Endpoint Number. -* Output : None. -* Return : Rx buffer address. -*******************************************************************************/ -uint16_t GetEPRxAddr(uint8_t bEpNum) -{ - return(_GetEPRxAddr(bEpNum)); -} -/******************************************************************************* -* Function Name : SetEPTxCount. -* Description : Set the Tx count. -* Input : bEpNum: Endpoint Number. -* wCount: new count value. -* Output : None. -* Return : None. -*******************************************************************************/ -void SetEPTxCount(uint8_t bEpNum, uint16_t wCount) -{ - _SetEPTxCount(bEpNum, wCount); -} -/******************************************************************************* -* Function Name : SetEPCountRxReg. -* Description : Set the Count Rx Register value. -* Input : *pdwReg: point to the register. -* wCount: the new register value. -* Output : None. -* Return : None. -*******************************************************************************/ -void SetEPCountRxReg(uint32_t *pdwReg, uint16_t wCount) -{ - _SetEPCountRxReg(dwReg, wCount); -} -/******************************************************************************* -* Function Name : SetEPRxCount -* Description : Set the Rx count. -* Input : bEpNum: Endpoint Number. -* wCount: the new count value. -* Output : None. -* Return : None. -*******************************************************************************/ -void SetEPRxCount(uint8_t bEpNum, uint16_t wCount) -{ - _SetEPRxCount(bEpNum, wCount); -} -/******************************************************************************* -* Function Name : GetEPTxCount -* Description : Get the Tx count. -* Input : bEpNum: Endpoint Number. -* Output : None -* Return : Tx count value. -*******************************************************************************/ -uint16_t GetEPTxCount(uint8_t bEpNum) -{ - return(_GetEPTxCount(bEpNum)); -} -/******************************************************************************* -* Function Name : GetEPRxCount -* Description : Get the Rx count. -* Input : bEpNum: Endpoint Number. -* Output : None. -* Return : Rx count value. -*******************************************************************************/ -uint16_t GetEPRxCount(uint8_t bEpNum) -{ - return(_GetEPRxCount(bEpNum)); -} -/******************************************************************************* -* Function Name : SetEPDblBuffAddr -* Description : Set the addresses of the buffer 0 and 1. -* Input : bEpNum: Endpoint Number. -* wBuf0Addr: new address of buffer 0. -* wBuf1Addr: new address of buffer 1. -* Output : None. -* Return : None. -*******************************************************************************/ -void SetEPDblBuffAddr(uint8_t bEpNum, uint16_t wBuf0Addr, uint16_t wBuf1Addr) -{ - _SetEPDblBuffAddr(bEpNum, wBuf0Addr, wBuf1Addr); -} -/******************************************************************************* -* Function Name : SetEPDblBuf0Addr -* Description : Set the Buffer 1 address. -* Input : bEpNum: Endpoint Number -* wBuf0Addr: new address. -* Output : None. -* Return : None. -*******************************************************************************/ -void SetEPDblBuf0Addr(uint8_t bEpNum, uint16_t wBuf0Addr) -{ - _SetEPDblBuf0Addr(bEpNum, wBuf0Addr); -} -/******************************************************************************* -* Function Name : SetEPDblBuf1Addr -* Description : Set the Buffer 1 address. -* Input : bEpNum: Endpoint Number -* wBuf1Addr: new address. -* Output : None. -* Return : None. -*******************************************************************************/ -void SetEPDblBuf1Addr(uint8_t bEpNum, uint16_t wBuf1Addr) -{ - _SetEPDblBuf1Addr(bEpNum, wBuf1Addr); -} -/******************************************************************************* -* Function Name : GetEPDblBuf0Addr -* Description : Returns the address of the Buffer 0. -* Input : bEpNum: Endpoint Number. -* Output : None. -* Return : None. -*******************************************************************************/ -uint16_t GetEPDblBuf0Addr(uint8_t bEpNum) -{ - return(_GetEPDblBuf0Addr(bEpNum)); -} -/******************************************************************************* -* Function Name : GetEPDblBuf1Addr -* Description : Returns the address of the Buffer 1. -* Input : bEpNum: Endpoint Number. -* Output : None. -* Return : Address of the Buffer 1. -*******************************************************************************/ -uint16_t GetEPDblBuf1Addr(uint8_t bEpNum) -{ - return(_GetEPDblBuf1Addr(bEpNum)); -} -/******************************************************************************* -* Function Name : SetEPDblBuffCount -* Description : Set the number of bytes for a double Buffer -* endpoint. -* Input : bEpNum,bDir, wCount -* Output : None. -* Return : None. -*******************************************************************************/ -void SetEPDblBuffCount(uint8_t bEpNum, uint8_t bDir, uint16_t wCount) -{ - _SetEPDblBuffCount(bEpNum, bDir, wCount); -} -/******************************************************************************* -* Function Name : SetEPDblBuf0Count -* Description : Set the number of bytes in the buffer 0 of a double Buffer -* endpoint. -* Input : bEpNum, bDir, wCount -* Output : None. -* Return : None. -*******************************************************************************/ -void SetEPDblBuf0Count(uint8_t bEpNum, uint8_t bDir, uint16_t wCount) -{ - _SetEPDblBuf0Count(bEpNum, bDir, wCount); -} -/******************************************************************************* -* Function Name : SetEPDblBuf1Count -* Description : Set the number of bytes in the buffer 0 of a double Buffer -* endpoint. -* Input : bEpNum, bDir, wCount -* Output : None. -* Return : None. -*******************************************************************************/ -void SetEPDblBuf1Count(uint8_t bEpNum, uint8_t bDir, uint16_t wCount) -{ - _SetEPDblBuf1Count(bEpNum, bDir, wCount); -} -/******************************************************************************* -* Function Name : GetEPDblBuf0Count -* Description : Returns the number of byte received in the buffer 0 of a double -* Buffer endpoint. -* Input : bEpNum: Endpoint Number. -* Output : None. -* Return : Endpoint Buffer 0 count -*******************************************************************************/ -uint16_t GetEPDblBuf0Count(uint8_t bEpNum) -{ - return(_GetEPDblBuf0Count(bEpNum)); -} -/******************************************************************************* -* Function Name : GetEPDblBuf1Count -* Description : Returns the number of data received in the buffer 1 of a double -* Buffer endpoint. -* Input : bEpNum: Endpoint Number. -* Output : None. -* Return : Endpoint Buffer 1 count. -*******************************************************************************/ -uint16_t GetEPDblBuf1Count(uint8_t bEpNum) -{ - return(_GetEPDblBuf1Count(bEpNum)); -} -/******************************************************************************* -* Function Name : GetEPDblBufDir -* Description : gets direction of the double buffered endpoint -* Input : bEpNum: Endpoint Number. -* Output : None. -* Return : EP_DBUF_OUT, EP_DBUF_IN, -* EP_DBUF_ERR if the endpoint counter not yet programmed. -*******************************************************************************/ -EP_DBUF_DIR GetEPDblBufDir(uint8_t bEpNum) -{ - if ((uint16_t)(*_pEPRxCount(bEpNum) & 0xFC00) != 0) - return(EP_DBUF_OUT); - else if (((uint16_t)(*_pEPTxCount(bEpNum)) & 0x03FF) != 0) - return(EP_DBUF_IN); - else - return(EP_DBUF_ERR); -} -/******************************************************************************* -* Function Name : FreeUserBuffer -* Description : free buffer used from the application realizing it to the line - toggles bit SW_BUF in the double buffered endpoint register -* Input : bEpNum, bDir -* Output : None. -* Return : None. -*******************************************************************************/ -void FreeUserBuffer(uint8_t bEpNum, uint8_t bDir) -{ - if (bDir == EP_DBUF_OUT) - { /* OUT double buffered endpoint */ - _ToggleDTOG_TX(bEpNum); - } - else if (bDir == EP_DBUF_IN) - { /* IN double buffered endpoint */ - _ToggleDTOG_RX(bEpNum); - } -} - -/******************************************************************************* -* Function Name : ToWord -* Description : merge two byte in a word. -* Input : bh: byte high, bl: bytes low. -* Output : None. -* Return : resulted word. -*******************************************************************************/ -uint16_t ToWord(uint8_t bh, uint8_t bl) -{ - uint16_t wRet; - wRet = (uint16_t)bl | ((uint16_t)bh << 8); - return(wRet); -} -/******************************************************************************* -* Function Name : ByteSwap -* Description : Swap two byte in a word. -* Input : wSwW: word to Swap. -* Output : None. -* Return : resulted word. -*******************************************************************************/ -uint16_t ByteSwap(uint16_t wSwW) -{ - uint8_t bTemp; - uint16_t wRet; - bTemp = (uint8_t)(wSwW & 0xff); - wRet = (wSwW >> 8) | ((uint16_t)bTemp << 8); - return(wRet); -} - -#endif /* STM32F10X_CL */ -/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/Libraries/STM32_USB-FS-Device_Driver/src/usb_sil.c b/bsp/stm32_radio/Libraries/STM32_USB-FS-Device_Driver/src/usb_sil.c deleted file mode 100644 index 6e7d76fdd0..0000000000 --- a/bsp/stm32_radio/Libraries/STM32_USB-FS-Device_Driver/src/usb_sil.c +++ /dev/null @@ -1,126 +0,0 @@ -/******************** (C) COPYRIGHT 2009 STMicroelectronics ******************** -* File Name : usb_sil.c -* Author : MCD Application Team -* Version : V3.1.0 -* Date : 10/30/2009 -* Description : Simplified Interface Layer for Global Initialization and -* Endpoint Rea/Write operations. -******************************************************************************** -* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS -* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. -* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, -* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE -* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING -* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -/* Includes ------------------------------------------------------------------*/ -#include "usb_lib.h" - -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ -/* Private macro -------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/* Extern variables ----------------------------------------------------------*/ -/* Private function prototypes -----------------------------------------------*/ -/* Private functions ---------------------------------------------------------*/ - -/******************************************************************************* -* Function Name : USB_SIL_Init -* Description : Initialize the USB Device IP and the Endpoint 0. -* Input : None. -* Output : None. -* Return : Status. -*******************************************************************************/ -uint32_t USB_SIL_Init(void) -{ -#ifndef STM32F10X_CL - - /* USB interrupts initialization */ - /* clear pending interrupts */ - _SetISTR(0); - wInterrupt_Mask = IMR_MSK; - /* set interrupts mask */ - _SetCNTR(wInterrupt_Mask); - -#else - - /* Perform OTG Device initialization procedure (including EP0 init) */ - OTG_DEV_Init(); - -#endif /* STM32F10X_CL */ - - return 0; -} - -/******************************************************************************* -* Function Name : USB_SIL_Write -* Description : Write a buffer of data to a selected endpoint. -* Input : - bEpAddr: The address of the non control endpoint. -* - pBufferPointer: The pointer to the buffer of data to be written -* to the endpoint. -* - wBufferSize: Number of data to be written (in bytes). -* Output : None. -* Return : Status. -*******************************************************************************/ -uint32_t USB_SIL_Write(uint8_t bEpAddr, uint8_t* pBufferPointer, uint32_t wBufferSize) -{ -#ifndef STM32F10X_CL - - /* Use the memory interface function to write to the selected endpoint */ - UserToPMABufferCopy(pBufferPointer, GetEPTxAddr(bEpAddr & 0x7F), wBufferSize); - - /* Update the data length in the control register */ - SetEPTxCount((bEpAddr & 0x7F), wBufferSize); - -#else - - /* Use the PCD interface layer function to write to the selected endpoint */ - OTGD_FS_PCD_EP_Write (bEpAddr, pBufferPointer, wBufferSize); - -#endif /* STM32F10X_CL */ - - return 0; -} - -/******************************************************************************* -* Function Name : USB_SIL_Read -* Description : Write a buffer of data to a selected endpoint. -* Input : - bEpAddr: The address of the non control endpoint. -* - pBufferPointer: The pointer to which will be saved the -* received data buffer. -* Output : None. -* Return : Number of received data (in Bytes). -*******************************************************************************/ -uint32_t USB_SIL_Read(uint8_t bEpAddr, uint8_t* pBufferPointer) -{ - uint32_t DataLength = 0; - -#ifndef STM32F10X_CL - - /* Get the number of received data on the selected Endpoint */ - DataLength = GetEPRxCount(bEpAddr & 0x7F); - - /* Use the memory interface function to write to the selected endpoint */ - PMAToUserBufferCopy(pBufferPointer, GetEPRxAddr(bEpAddr & 0x7F), DataLength); - -#else - - USB_OTG_EP *ep; - - /* Get the structure pointer of the selected Endpoint */ - ep = OTGD_FS_PCD_GetOutEP(bEpAddr); - - /* Get the number of received data */ - DataLength = ep->xfer_len; - - /* Use the PCD interface layer function to read the selected endpoint */ - OTGD_FS_PCD_EP_Read (bEpAddr, pBufferPointer, DataLength); - -#endif /* STM32F10X_CL */ - - /* Return the number of received data */ - return DataLength; -} - -/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/application.c b/bsp/stm32_radio/application.c deleted file mode 100644 index 65d9cb7445..0000000000 --- a/bsp/stm32_radio/application.c +++ /dev/null @@ -1,130 +0,0 @@ -/* - * File : application.c - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2006, RT-Thread Development Team - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rt-thread.org/license/LICENSE - * - * Change Logs: - * Date Author Notes - * 2009-01-05 Bernard the first version - */ - -/** - * @addtogroup STM32 - */ -/*@{*/ - -#include -#include - -#include -#include "board.h" -#include "netbuffer.h" -#include "lcd.h" -#include "rtc.h" - -#ifdef RT_USING_DFS -/* dfs init */ -#include -/* dfs filesystem:ELM FatFs filesystem init */ -#include -/* dfs Filesystem APIs */ -#include -#endif - -#ifdef RT_USING_LWIP -#include -#include -#include -#endif - -#ifdef RT_USING_RTGUI -extern void radio_rtgui_init(void); -#endif - -/* thread phase init */ -void rt_init_thread_entry(void *parameter) -{ - /* Filesystem Initialization */ -#ifdef RT_USING_DFS - { - /* init the device filesystem */ - dfs_init(); - - /* init the elm FAT filesystam*/ - elm_init(); - - /* mount spi flash fat as root directory */ - if (dfs_mount("spi0", "/", "elm", 0, 0) == 0) - rt_kprintf("SPI File System initialized!\n"); - else - rt_kprintf("SPI File System init failed!\n"); - - /* mount sd card fat partition 1 as SD directory */ - if (dfs_mount("sd0", "/SD", "elm", 0, 0) == 0) - rt_kprintf("File System initialized!\n"); - else - rt_kprintf("File System init failed!\n"); - } -#endif - - /* RTGUI Initialization */ -#ifdef RT_USING_RTGUI - { - extern void rt_hw_key_init(void); - - radio_rtgui_init(); - rt_hw_key_init(); - } -#endif - - /* LwIP Initialization */ -#ifdef RT_USING_LWIP - { - extern void lwip_sys_init(void); - extern void rt_hw_dm9000_init(void); - - eth_system_device_init(); - - /* register ethernetif device */ - rt_hw_dm9000_init(); - /* init all device */ - rt_device_init_all(); - - /* init lwip system */ - lwip_sys_init(); - rt_kprintf("TCP/IP initialized!\n"); - } -#endif - -#if STM32_EXT_SRAM - /* init netbuf worker */ - net_buf_init(320 * 1024); -#endif - - /* start RTC */ - rt_hw_rtc_init(); -} - -int rt_application_init() -{ - rt_thread_t init_thread; - -#if (RT_THREAD_PRIORITY_MAX == 32) - init_thread = rt_thread_create("init", - rt_init_thread_entry, RT_NULL, - 2048, 8, 20); -#else - init_thread = rt_thread_create("init", - rt_init_thread_entry, RT_NULL, - 2048, 80, 20); -#endif - if (init_thread != RT_NULL) rt_thread_startup(init_thread); - - return 0; -} - -/*@}*/ diff --git a/bsp/stm32_radio/board.c b/bsp/stm32_radio/board.c deleted file mode 100644 index 5f50ac70ff..0000000000 --- a/bsp/stm32_radio/board.c +++ /dev/null @@ -1,293 +0,0 @@ -/* - * File : board.c - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2006 - 2009 RT-Thread Develop Team - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rt-thread.org/license/LICENSE - * - * Change Logs: - * Date Author Notes - * 2006-08-23 Bernard first implementation - */ - -#include -#include - -#include "stm32f10x.h" -#include "board.h" - -struct rt_semaphore spi1_lock; - -/** - * @addtogroup STM32 - */ - -/*@{*/ - -/******************************************************************************* -* Function Name : NVIC_Configuration -* Description : Configures Vector Table base location. -* Input : None -* Output : None -* Return : None -*******************************************************************************/ -void NVIC_Configuration(void) -{ -#ifdef VECT_TAB_RAM - /* Set the Vector Table base location at 0x20000000 */ - NVIC_SetVectorTable(NVIC_VectTab_RAM, 0x0); -#else /* VECT_TAB_FLASH */ - /* Set the Vector Table base location at 0x08000000 */ - NVIC_SetVectorTable(NVIC_VectTab_FLASH, 0x0); -#endif - - /* - * set priority group: - * 2 bits for pre-emption priority - * 2 bits for subpriority - */ - NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2); -} - -extern void rt_hw_interrupt_thread_switch(void); -/** - * This is the timer interrupt service routine. - * - */ -void rt_hw_timer_handler(void) -{ - /* enter interrupt */ - rt_interrupt_enter(); - - rt_tick_increase(); - - /* leave interrupt */ - rt_interrupt_leave(); -} - -/* NAND Flash */ -#include "fsmc_nand.h" - -static void all_device_reset(void) -{ - /* RESET */ - /* DM9000A PE5 */ - /* LCD PF10 */ - /* SPI-FLASH PA3 */ - - /* CS */ - /* DM9000A FSMC_NE4 PG12 */ - /* LCD FSMC_NE2 PG9 */ - /* SPI_FLASH PA4 */ - /* CODEC PC5 */ - /* TOUCH PC4 */ - - GPIO_InitTypeDef GPIO_InitStructure; - RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOC | RCC_APB2Periph_GPIOE - | RCC_APB2Periph_GPIOF | RCC_APB2Periph_GPIOG,ENABLE); - - GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP; - GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz; - - /* SDIO POWER */ - GPIO_InitStructure.GPIO_Pin = GPIO_Pin_6; - GPIO_Init(GPIOC,&GPIO_InitStructure); - GPIO_SetBits(GPIOC,GPIO_Pin_6); /* SD card power down */ - - /* SPI_FLASH CS */ - GPIO_InitStructure.GPIO_Pin = GPIO_Pin_4; - GPIO_Init(GPIOA,&GPIO_InitStructure); - GPIO_SetBits(GPIOA,GPIO_Pin_4); - - GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz; - - /* CODEC && TOUCH CS */ - GPIO_InitStructure.GPIO_Pin = GPIO_Pin_4 | GPIO_Pin_5; - GPIO_Init(GPIOC,&GPIO_InitStructure); - GPIO_SetBits(GPIOC,GPIO_Pin_4 | GPIO_Pin_5); - - /* DM9000A RESET */ - GPIO_InitStructure.GPIO_Pin = GPIO_Pin_5; - GPIO_Init(GPIOE,&GPIO_InitStructure); - GPIO_ResetBits(GPIOE,GPIO_Pin_5); - - /* LCD RESET */ - GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10; - GPIO_Init(GPIOF,&GPIO_InitStructure); - GPIO_ResetBits(GPIOF,GPIO_Pin_10); - - /* SPI_FLASH RESET */ - GPIO_InitStructure.GPIO_Pin = GPIO_Pin_3; - GPIO_Init(GPIOA,&GPIO_InitStructure); - GPIO_ResetBits(GPIOA,GPIO_Pin_3); - - /* FSMC GPIO configure */ - { - GPIO_InitTypeDef GPIO_InitStructure; - RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOD | RCC_APB2Periph_GPIOE | RCC_APB2Periph_GPIOF - | RCC_APB2Periph_GPIOG, ENABLE); - RCC_AHBPeriphClockCmd(RCC_AHBPeriph_FSMC, ENABLE); - - GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; - GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; - - /* - FSMC_D0 ~ FSMC_D3 - PD14 FSMC_D0 PD15 FSMC_D1 PD0 FSMC_D2 PD1 FSMC_D3 - */ - GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_14 | GPIO_Pin_15; - GPIO_Init(GPIOD,&GPIO_InitStructure); - - /* - FSMC_D4 ~ FSMC_D12 - PE7 ~ PE15 FSMC_D4 ~ FSMC_D12 - */ - GPIO_InitStructure.GPIO_Pin = GPIO_Pin_7 | GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10 - | GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_14 | GPIO_Pin_15; - GPIO_Init(GPIOE,&GPIO_InitStructure); - - /* FSMC_D13 ~ FSMC_D15 PD8 ~ PD10 */ - GPIO_InitStructure.GPIO_Pin = GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10; - GPIO_Init(GPIOD,&GPIO_InitStructure); - - /* - FSMC_A0 ~ FSMC_A5 FSMC_A6 ~ FSMC_A9 - PF0 ~ PF5 PF12 ~ PF15 - */ - GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_3 - | GPIO_Pin_4 | GPIO_Pin_5 | GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_14 | GPIO_Pin_15; - GPIO_Init(GPIOF,&GPIO_InitStructure); - - /* FSMC_A10 ~ FSMC_A15 PG0 ~ PG5 */ - GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_3 | GPIO_Pin_4 | GPIO_Pin_5; - GPIO_Init(GPIOG,&GPIO_InitStructure); - - /* FSMC_A16 ~ FSMC_A18 PD11 ~ PD13 */ - GPIO_InitStructure.GPIO_Pin = GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_13; - GPIO_Init(GPIOD,&GPIO_InitStructure); - - /* RD-PD4 WR-PD5 */ - GPIO_InitStructure.GPIO_Pin = GPIO_Pin_4 | GPIO_Pin_5; - GPIO_Init(GPIOD,&GPIO_InitStructure); - - /* NBL0-PE0 NBL1-PE1 */ - GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1; - GPIO_Init(GPIOE,&GPIO_InitStructure); - - /* NE1/NCE2 */ - GPIO_InitStructure.GPIO_Pin = GPIO_Pin_7; - GPIO_Init(GPIOD,&GPIO_InitStructure); - /* NE2 */ - GPIO_InitStructure.GPIO_Pin = GPIO_Pin_9; - GPIO_Init(GPIOG,&GPIO_InitStructure); - /* NE3 */ - GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10; - GPIO_Init(GPIOG,&GPIO_InitStructure); - /* NE4 */ - GPIO_InitStructure.GPIO_Pin = GPIO_Pin_12; - GPIO_Init(GPIOG,&GPIO_InitStructure); - } - /* FSMC GPIO configure */ - - GPIO_SetBits(GPIOE,GPIO_Pin_5); /* DM9000A */ - GPIO_SetBits(GPIOF,GPIO_Pin_10); /* LCD */ - GPIO_SetBits(GPIOA,GPIO_Pin_3); /* SPI_FLASH */ -} - -/** - * This function will initial STM32 Radio board. - */ -extern void FSMC_SRAM_Init(void); -void rt_hw_board_init() -{ - //NAND_IDTypeDef NAND_ID; - - /* Configure the system clocks */ - SystemInit(); - - all_device_reset(); - - /* NVIC Configuration */ - NVIC_Configuration(); - - /* Configure the SysTick */ - SysTick_Config( SystemCoreClock / RT_TICK_PER_SECOND ); - - /* Console Initialization*/ - rt_hw_usart_init(); - rt_console_set_device("uart1"); - - rt_kprintf("\r\n\r\nSystemInit......\r\n"); - - /* SRAM init */ - RCC_AHBPeriphClockCmd(RCC_AHBPeriph_FSMC, ENABLE); - FSMC_SRAM_Init(); - - /* memtest */ - { - unsigned char * p_extram = (unsigned char *)STM32_EXT_SRAM_BEGIN; - unsigned int temp; - - rt_kprintf("\r\nmem testing...."); - for(temp=0; temp<(STM32_EXT_SRAM_END-STM32_EXT_SRAM_BEGIN); temp++) - { - *p_extram++ = (unsigned char)temp; - } - - p_extram = (unsigned char *)STM32_EXT_SRAM_BEGIN; - for(temp=0; temp<(STM32_EXT_SRAM_END-STM32_EXT_SRAM_BEGIN); temp++) - { - if( *p_extram++ != (unsigned char)temp ) - { - rt_kprintf("\rmemtest fail @ %08X\r\nsystem halt!!!!!",(unsigned int)p_extram); - while(1); - } - } - rt_kprintf("\rmem test pass!!\r\n"); - }/* memtest */ - - /* SPI1 config */ - { - GPIO_InitTypeDef GPIO_InitStructure; - SPI_InitTypeDef SPI_InitStructure; - - /* Enable SPI1 Periph clock */ - RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA - | RCC_APB2Periph_AFIO | RCC_APB2Periph_SPI1, - ENABLE); - - /* Configure SPI1 pins: PA5-SCK, PA6-MISO and PA7-MOSI */ - GPIO_InitStructure.GPIO_Pin = GPIO_Pin_5 | GPIO_Pin_6 | GPIO_Pin_7; - GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; - GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; - GPIO_Init(GPIOA, &GPIO_InitStructure); - - /*------------------------ SPI1 configuration ------------------------*/ - SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex;//SPI_Direction_1Line_Tx; - SPI_InitStructure.SPI_Mode = SPI_Mode_Master; - SPI_InitStructure.SPI_DataSize = SPI_DataSize_8b; - SPI_InitStructure.SPI_CPOL = SPI_CPOL_Low; - SPI_InitStructure.SPI_CPHA = SPI_CPHA_1Edge; - SPI_InitStructure.SPI_NSS = SPI_NSS_Soft; - SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_8;/* 72M/64=1.125M */ - SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB; - SPI_InitStructure.SPI_CRCPolynomial = 7; - - SPI_I2S_DeInit(SPI1); - SPI_Init(SPI1, &SPI_InitStructure); - - /* Enable SPI_MASTER */ - SPI_Cmd(SPI1, ENABLE); - SPI_CalculateCRC(SPI1, DISABLE); - - if (rt_sem_init(&spi1_lock, "spi1lock", 1, RT_IPC_FLAG_FIFO) != RT_EOK) - { - rt_kprintf("init spi1 lock semaphore failed\n"); - } - } - -}/* rt_hw_board_init */ - -/*@}*/ diff --git a/bsp/stm32_radio/board.h b/bsp/stm32_radio/board.h deleted file mode 100644 index bc40a0486d..0000000000 --- a/bsp/stm32_radio/board.h +++ /dev/null @@ -1,76 +0,0 @@ -/* - * File : board.h - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2006, RT-Thread Develop Team - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rt-thread.org/license/LICENSE - * - * Change Logs: - * Date Author Notes - * 2009-09-22 Bernard add board.h to this bsp - */ - -// <<< Use Configuration Wizard in Context Menu >>> -#ifndef __BOARD_H__ -#define __BOARD_H__ - -/* board configuration */ -// SDCard Driver <1=>SDIO sdcard <0=>SPI MMC card -// Default: 1 -#define STM32_USE_SDIO 1 - -/* whether use board external SRAM memory */ -// Use external SRAM memory on the board -// Enable External SRAM memory -#define STM32_EXT_SRAM 1 -// Begin Address of External SRAM -// Default: 0x68000000 -#define STM32_EXT_SRAM_BEGIN 0x68000000 /* the begining address of external SRAM */ -// End Address of External SRAM -// Default: 0x68080000 -#define STM32_EXT_SRAM_END 0x68080000 /* the end address of external SRAM */ -// - -// Internal SRAM memory size[Kbytes] <8-64> -// Default: 64 -#define STM32_SRAM_SIZE 64 -#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) - -// Console on USART: <0=> no console <1=>USART 1 <2=>USART 2 <3=> USART 3 -// Default: 1 -#define STM32_CONSOLE_USART 1 - -// LCD Module Version -// <1=>Version 1:fmt0371 -// <2=>Version 2:ili9320/9325 -// Default: 1 -#define LCD_VERSION 1 - -/* - * IMPORTANT NOTICE: - * CODEC_MASTER_MODE = 1 with CODEC_USE_SPI3 = 0 is unusable due to a hardware bug of STM32's SPI2. - */ -// CODEC Mode -// <0=>I2S Slave -// <1=>I2S Master -#define CODEC_MASTER_MODE 0 - -// CODEC SPI Port -// <0=>SPI2 -// <1=>SPI3 -#define CODEC_USE_SPI3 0 - -void rt_hw_board_led_on(int n); -void rt_hw_board_led_off(int n); -void rt_hw_board_init(void); - -void rt_hw_usart_init(void); -void rt_hw_sdcard_init(void); - -extern struct rt_semaphore spi1_lock; - -#endif - -// <<< Use Configuration Wizard in Context Menu >>> diff --git a/bsp/stm32_radio/codec.c b/bsp/stm32_radio/codec.c deleted file mode 100644 index 74cc419842..0000000000 --- a/bsp/stm32_radio/codec.c +++ /dev/null @@ -1,657 +0,0 @@ -#include -#include -#include "stm32f10x.h" -#include "board.h" -#include "codec.h" - -#if CODEC_USE_SPI3 - -#define CODEC_I2S_PORT SPI3 -#define CODEC_I2S_IRQ SPI3_IRQn -#define CODEC_I2S_DMA DMA2_Channel2 -#define CODEC_I2S_DMA_IRQ DMA2_Channel2_IRQn -#define CODEC_I2S_RCC_APB1 RCC_APB1Periph_SPI3 -#define CODEC_I2S_RCC_AHB RCC_AHBPeriph_DMA2 - -// I2S3_WS -> PA15 -#define CODEC_I2S_WS_PIN GPIO_Pin_15 -#define CODEC_I2S_WS_PORT GPIOA -// I2S3_CK -> PB3 -#define CODEC_I2S_CK_PIN GPIO_Pin_3 -#define CODEC_I2S_CK_PORT GPIOB -// I2S3_SD -> PB5 -#define CODEC_I2S_SD_PIN GPIO_Pin_5 -#define CODEC_I2S_SD_PORT GPIOB - -#else - -#define CODEC_I2S_PORT SPI2 -#define CODEC_I2S_IRQ SPI2_IRQn -#define CODEC_I2S_DMA DMA1_Channel5 -#define CODEC_I2S_DMA_IRQ DMA1_Channel5_IRQn -#define CODEC_I2S_RCC_APB1 RCC_APB1Periph_SPI2 -#define CODEC_I2S_RCC_AHB RCC_AHBPeriph_DMA1 - -// I2S2_WS -> PB12 -#define CODEC_I2S_WS_PIN GPIO_Pin_12 -#define CODEC_I2S_WS_PORT GPIOB -// I2S2_CK -> PB13 -#define CODEC_I2S_CK_PIN GPIO_Pin_13 -#define CODEC_I2S_CK_PORT GPIOB -// I2S2_SD -> PB15 -#define CODEC_I2S_SD_PIN GPIO_Pin_15 -#define CODEC_I2S_SD_PORT GPIOB - -#endif // #if CODEC_USE_SPI3 - -/* -SCLK PA5 SPI1_SCK -SDIN PA7 SPI1_MOSI -CSB PC5 -*/ -#define CODEC_CSB_PORT GPIOC -#define CODEC_CSB_PIN GPIO_Pin_5 -#define codec_set_csb() do { CODEC_CSB_PORT->BSRR = CODEC_CSB_PIN; } while (0) -#define codec_reset_csb() do { CODEC_CSB_PORT->BRR = CODEC_CSB_PIN; } while (0) - -void vol(uint16_t v); -static void codec_send(rt_uint16_t s_data); - -#define DATA_NODE_MAX 5 -/* data node for Tx Mode */ -struct codec_data_node -{ - rt_uint16_t *data_ptr; - rt_size_t data_size; -}; - -struct codec_device -{ - /* inherit from rt_device */ - struct rt_device parent; - - /* pcm data list */ - struct codec_data_node data_list[DATA_NODE_MAX]; - rt_uint16_t read_index, put_index; - - /* transmitted offset of current data node */ - rt_size_t offset; -}; -struct codec_device codec; - -static uint16_t r06 = REG_CLOCK_GEN | CLKSEL_PLL | MCLK_DIV2 | BCLK_DIV8; - -#if !CODEC_MASTER_MODE -static int codec_sr_new = 0; -#endif - -static void NVIC_Configuration(void) -{ - NVIC_InitTypeDef NVIC_InitStructure; - - /* DMA IRQ Channel configuration */ - NVIC_InitStructure.NVIC_IRQChannel = CODEC_I2S_DMA_IRQ; - NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0; - NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; - NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; - NVIC_Init(&NVIC_InitStructure); -} - -static void GPIO_Configuration(void) -{ - GPIO_InitTypeDef GPIO_InitStructure; - - /* Disable the JTAG interface and enable the SWJ interface */ - GPIO_PinRemapConfig(GPIO_Remap_SWJ_JTAGDisable, ENABLE); - - /* PC5 CODEC CS */ - GPIO_InitStructure.GPIO_Pin = CODEC_CSB_PIN; - GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP; - GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz; - GPIO_Init(CODEC_CSB_PORT, &GPIO_InitStructure); - - // WS - GPIO_InitStructure.GPIO_Pin = CODEC_I2S_WS_PIN; - GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz; -#if CODEC_MASTER_MODE - GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IPD; -#else - GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; -#endif - GPIO_Init(CODEC_I2S_WS_PORT, &GPIO_InitStructure); - - // CK - GPIO_InitStructure.GPIO_Pin = CODEC_I2S_CK_PIN; - GPIO_InitStructure.GPIO_Speed = GPIO_Speed_10MHz; -#if CODEC_MASTER_MODE - GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IPU; -#else - GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; -#endif - GPIO_Init(CODEC_I2S_CK_PORT, &GPIO_InitStructure); - - // SD - GPIO_InitStructure.GPIO_Pin = CODEC_I2S_SD_PIN; - GPIO_InitStructure.GPIO_Speed = GPIO_Speed_10MHz; - GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; - GPIO_Init(CODEC_I2S_SD_PORT, &GPIO_InitStructure); - -#ifdef CODEC_USE_MCO - /* MCO configure */ - GPIO_InitStructure.GPIO_Pin = GPIO_Pin_8; - GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; - GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; - GPIO_Init(GPIOA,&GPIO_InitStructure); - - RCC_MCOConfig(RCC_MCO_HSE); -#endif -} - -static void DMA_Configuration(rt_uint32_t addr, rt_size_t size) -{ - DMA_InitTypeDef DMA_InitStructure; - - /* DMA Channel configuration ----------------------------------------------*/ - DMA_Cmd(CODEC_I2S_DMA, DISABLE); - DMA_InitStructure.DMA_PeripheralBaseAddr = (u32)(&(CODEC_I2S_PORT->DR)); - DMA_InitStructure.DMA_MemoryBaseAddr = (u32) addr; - DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST; - DMA_InitStructure.DMA_BufferSize = size; - DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable; - DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable; - DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord; - DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord; - DMA_InitStructure.DMA_Priority = DMA_Priority_Medium; - DMA_InitStructure.DMA_Mode = DMA_Mode_Normal; - DMA_InitStructure.DMA_M2M = DMA_M2M_Disable; - DMA_Init(CODEC_I2S_DMA, &DMA_InitStructure); - - /* Enable SPI DMA Tx request */ - SPI_I2S_DMACmd(CODEC_I2S_PORT, SPI_I2S_DMAReq_Tx, ENABLE); - - DMA_ITConfig(CODEC_I2S_DMA, DMA_IT_TC, ENABLE); - DMA_Cmd(CODEC_I2S_DMA, ENABLE); -} - -static void I2S_Configuration(uint32_t I2S_AudioFreq) -{ - I2S_InitTypeDef I2S_InitStructure; - - /* I2S peripheral configuration */ - I2S_InitStructure.I2S_Standard = I2S_Standard_Phillips; - I2S_InitStructure.I2S_DataFormat = I2S_DataFormat_16b; - I2S_InitStructure.I2S_MCLKOutput = I2S_MCLKOutput_Disable; - I2S_InitStructure.I2S_AudioFreq = I2S_AudioFreq; - I2S_InitStructure.I2S_CPOL = I2S_CPOL_Low; - - /* I2S2 configuration */ -#if CODEC_MASTER_MODE - I2S_InitStructure.I2S_Mode = I2S_Mode_SlaveTx; -#else - I2S_InitStructure.I2S_Mode = I2S_Mode_MasterTx; -#endif - I2S_Init(CODEC_I2S_PORT, &I2S_InitStructure); -} - -uint8_t SPI_WriteByte(unsigned char data) -{ - //Wait until the transmit buffer is empty - while (SPI_I2S_GetFlagStatus(SPI1, SPI_I2S_FLAG_TXE) == RESET); - // Send the byte - SPI_I2S_SendData(SPI1, data); - - //Wait until a data is received - while (SPI_I2S_GetFlagStatus(SPI1, SPI_I2S_FLAG_RXNE) == RESET); - // Get the received data - data = SPI_I2S_ReceiveData(SPI1); - - // Return the shifted data - return data; -} - -static void codec_send(rt_uint16_t s_data) -{ - rt_sem_take(&spi1_lock, RT_WAITING_FOREVER); - - codec_reset_csb(); - SPI_WriteByte((s_data >> 8) & 0xFF); - SPI_WriteByte(s_data & 0xFF); - codec_set_csb(); - - rt_sem_release(&spi1_lock); -} - -static rt_err_t codec_init(rt_device_t dev) -{ - codec_send(REG_SOFTWARE_RESET); - - // 1.5x boost power up sequence. - // Mute all outputs. - codec_send(REG_LOUT1_VOL | LOUT1MUTE); - codec_send(REG_ROUT1_VOL | ROUT1MUTE); - codec_send(REG_LOUT2_VOL | LOUT2MUTE); - codec_send(REG_ROUT2_VOL | ROUT2MUTE); - // Enable unused output chosen from L/ROUT2, OUT3 or OUT4. - codec_send(REG_POWER_MANAGEMENT3 | OUT4EN); - // Set BUFDCOPEN=1 and BUFIOEN=1 in register R1 - codec_send(REG_POWER_MANAGEMENT1 | BUFDCOPEN | BUFIOEN); - // Set SPKBOOST=1 in register R49. - codec_send(REG_OUTPUT | SPKBOOST); - // Set VMIDSEL[1:0] to required value in register R1. - codec_send(REG_POWER_MANAGEMENT1 | BUFDCOPEN | BUFIOEN | VMIDSEL_75K); - // Set L/RMIXEN=1 and DACENL/R=1 in register R3. - codec_send(REG_POWER_MANAGEMENT3 | LMIXEN | RMIXEN | DACENL | DACENR); - // Set BIASEN=1 in register R1. - codec_send(REG_POWER_MANAGEMENT1 | BUFDCOPEN | BUFIOEN | VMIDSEL_75K | BIASEN); - // Set L/ROUT2EN=1 in register R3. - codec_send(REG_POWER_MANAGEMENT3 | LMIXEN | RMIXEN | DACENL | DACENR | LOUT2EN | ROUT2EN); - // Enable other mixers as required. - // Enable other outputs as required. - codec_send(REG_POWER_MANAGEMENT2 | LOUT1EN | ROUT1EN | BOOSTENL | BOOSTENR | INPPGAENL | INPPGAENR); - - // Digital inferface setup. - codec_send(REG_AUDIO_INTERFACE | BCP_NORMAL | LRP_NORMAL | WL_16BITS | FMT_I2S); - - // PLL setup. - // fs = 44.1KHz * 256fs = 11.2896MHz - // F_PLL = 11.2896MHz * 4 * 2 = 90.3168MHz - // R = 90.3168MHz / 12.288MHz = 7.35 - // PLL_N = 7 - // PLL_K = 0x59999A (0x5A5A5A for STM32's 44.117KHz fs generated from 72MHz clock) - codec_send(REG_PLL_N | 7); -#if CODEC_MASTER_MODE - codec_send(REG_PLL_K1 | 0x16); - codec_send(REG_PLL_K2 | 0xCC); - codec_send(REG_PLL_K3 | 0x19A); -#else - codec_send(REG_PLL_K1 | 0x16); - codec_send(REG_PLL_K2 | 0x12D); - codec_send(REG_PLL_K3 | 0x5A); -#endif - codec_send(REG_POWER_MANAGEMENT1 | BUFDCOPEN | BUFIOEN | VMIDSEL_75K | BIASEN | PLLEN); - codec_send(r06); - - // Enable DAC 128x oversampling. - codec_send(REG_DAC | DACOSR128); - - // Set LOUT2/ROUT2 in BTL operation. - codec_send(REG_BEEP | INVROUT2); - - // Set output volume. - vol(25); - - return RT_EOK; -} - -// Exported functions -#include - -void vol(uint16_t v) -{ - v = (v & VOL_MASK) << VOL_POS; - codec_send(REG_LOUT1_VOL | v); - codec_send(REG_ROUT1_VOL | HPVU | v); - codec_send(REG_LOUT2_VOL | v); - codec_send(REG_ROUT2_VOL | SPKVU | v); -} - -void eq(codec_eq_args_t args) -{ - switch (args->channel) - { - case 1: - codec_send(REG_EQ1 | ((args->frequency & EQC_MASK) << EQC_POS) | ((args->gain & EQG_MASK) << EQG_POS) | (args->mode_bandwidth ? EQ3DMODE_DAC : EQ3DMODE_ADC)); - break; - - case 2: - codec_send(REG_EQ2 | ((args->frequency & EQC_MASK) << EQC_POS) | ((args->gain & EQG_MASK) << EQG_POS) | (args->mode_bandwidth ? EQ2BW_WIDE : EQ2BW_NARROW)); - break; - - case 3: - codec_send(REG_EQ3 | ((args->frequency & EQC_MASK) << EQC_POS) | ((args->gain & EQG_MASK) << EQG_POS) | (args->mode_bandwidth ? EQ3BW_WIDE : EQ3BW_NARROW)); - break; - - case 4: - codec_send(REG_EQ4 | ((args->frequency & EQC_MASK) << EQC_POS) | ((args->gain & EQG_MASK) << EQG_POS) | (args->mode_bandwidth ? EQ4BW_WIDE : EQ4BW_NARROW)); - break; - - case 5: - codec_send(REG_EQ5 | ((args->frequency & EQC_MASK) << EQC_POS) | ((args->gain & EQG_MASK) << EQG_POS)); - break; - } -} - -// TODO eq1() ~ eq5() are just for testing. To be removed. -void eq1(uint8_t freq, uint8_t gain, uint8_t mode) -{ - codec_send(REG_EQ1 | ((freq & EQC_MASK) << EQC_POS) | ((gain & EQG_MASK) << EQG_POS) | (mode ? EQ3DMODE_DAC : EQ3DMODE_ADC)); -} - -void eq2(uint8_t freq, uint8_t gain, uint8_t bw) -{ - codec_send(REG_EQ2 | ((freq & EQC_MASK) << EQC_POS) | ((gain & EQG_MASK) << EQG_POS) | (bw ? EQ2BW_WIDE : EQ2BW_NARROW)); -} - -void eq3(uint8_t freq, uint8_t gain, uint8_t bw) -{ - codec_send(REG_EQ3 | ((freq & EQC_MASK) << EQC_POS) | ((gain & EQG_MASK) << EQG_POS) | (bw ? EQ3BW_WIDE : EQ3BW_NARROW)); -} - -void eq4(uint8_t freq, uint8_t gain, uint8_t bw) -{ - codec_send(REG_EQ4 | ((freq & EQC_MASK) << EQC_POS) | ((gain & EQG_MASK) << EQG_POS) | (bw ? EQ4BW_WIDE : EQ4BW_NARROW)); -} - -void eq5(uint8_t freq, uint8_t gain) -{ - codec_send(REG_EQ2 | ((freq & EQC_MASK) << EQC_POS) | ((gain & EQG_MASK) << EQG_POS)); -} - -void eq3d(uint8_t depth) -{ - codec_send(REG_3D | ((depth & DEPTH3D_MASK) << DEPTH3D_POS)); -} - -rt_err_t sample_rate(int sr) -{ - uint16_t r07 = REG_ADDITIONAL; - - switch (sr) - { - case 8000: - r06 = REG_CLOCK_GEN | CLKSEL_MCLK | MCLK_DIV6 | BCLK_DIV8 | (r06 & MS); - r07 |= SR_8KHZ; - break; - - case 11025: - r06 = REG_CLOCK_GEN | CLKSEL_PLL | MCLK_DIV8 | BCLK_DIV8 | (r06 & MS); - r07 |= SR_12KHZ; - break; - -#if CODEC_MASTER_MODE - case 12000: - r06 = REG_CLOCK_GEN | CLKSEL_MCLK | MCLK_DIV4 | BCLK_DIV8 | (r06 & MS); - r07 |= SR_12KHZ; - break; -#endif - - case 16000: - r06 = REG_CLOCK_GEN | CLKSEL_MCLK | MCLK_DIV3 | BCLK_DIV8 | (r06 & MS); - r07 |= SR_16KHZ; - break; - - case 22050: - r06 = REG_CLOCK_GEN | CLKSEL_PLL | MCLK_DIV4 | BCLK_DIV8 | (r06 & MS); - r07 |= SR_24KHZ; - break; - -#if CODEC_MASTER_MODE - case 24000: - r06 = REG_CLOCK_GEN | CLKSEL_MCLK | MCLK_DIV2 | BCLK_DIV8 | (r06 & MS); - r07 |= SR_24KHZ; - break; -#endif - - case 32000: - r06 = REG_CLOCK_GEN | CLKSEL_MCLK | MCLK_DIV1_5 | BCLK_DIV8 | (r06 & MS); - r07 |= SR_32KHZ; - break; - - case 44100: - r06 = REG_CLOCK_GEN | CLKSEL_PLL | MCLK_DIV2 | BCLK_DIV8 | (r06 & MS); - r07 |= SR_48KHZ; - break; - - case 48000: - r06 = REG_CLOCK_GEN | CLKSEL_MCLK | MCLK_DIV1 | BCLK_DIV8 | (r06 & MS); - r07 |= SR_48KHZ; - break; - - default: - return RT_ERROR; - } - codec_send(r06); - codec_send(r07); - -#if !CODEC_MASTER_MODE - codec_sr_new = sr; -#endif - - return RT_EOK; -} - -FINSH_FUNCTION_EXPORT(vol, Set volume); -FINSH_FUNCTION_EXPORT(eq1, Set EQ1(Cut-off, Gain, Mode)); -FINSH_FUNCTION_EXPORT(eq2, Set EQ2(Center, Gain, Bandwidth)); -FINSH_FUNCTION_EXPORT(eq3, Set EQ3(Center, Gain, Bandwidth)); -FINSH_FUNCTION_EXPORT(eq4, Set EQ4(Center, Gain, Bandwidth)); -FINSH_FUNCTION_EXPORT(eq5, Set EQ5(Cut-off, Gain)); -FINSH_FUNCTION_EXPORT(eq3d, Set 3D(Depth)); -FINSH_FUNCTION_EXPORT(sample_rate, Set sample rate); - -static rt_err_t codec_open(rt_device_t dev, rt_uint16_t oflag) -{ -#if !CODEC_MASTER_MODE - /* enable I2S */ - I2S_Cmd(CODEC_I2S_PORT, ENABLE); -#endif - - return RT_EOK; -} - -static rt_err_t codec_close(rt_device_t dev) -{ -#if CODEC_MASTER_MODE - if (r06 & MS) - { - CODEC_I2S_DMA->CCR &= ~DMA_CCR1_EN; - while ((CODEC_I2S_PORT->SR & SPI_I2S_FLAG_TXE) == 0); - while ((CODEC_I2S_PORT->SR & SPI_I2S_FLAG_BSY) != 0); - CODEC_I2S_PORT->I2SCFGR &= ~SPI_I2SCFGR_I2SE; - - r06 &= ~MS; - codec_send(r06); - - /* remove all data node */ - if (codec.parent.tx_complete != RT_NULL) - { - rt_base_t level = rt_hw_interrupt_disable(); - - do - { - codec.parent.tx_complete(&codec.parent, codec.data_list[codec.read_index].data_ptr); - codec.read_index++; - if (codec.read_index >= DATA_NODE_MAX) - { - codec.read_index = 0; - } - } - while (codec.read_index != codec.put_index); - - rt_hw_interrupt_enable(level); - } - } -#endif - - return RT_EOK; -} - -static rt_err_t codec_control(rt_device_t dev, rt_uint8_t cmd, void *args) -{ - switch (cmd) - { - case CODEC_CMD_RESET: - codec_init(dev); - break; - - case CODEC_CMD_VOLUME: - vol(*((uint16_t*) args)); - break; - - case CODEC_CMD_SAMPLERATE: - sample_rate(*((int*) args)); - break; - - case CODEC_CMD_EQ: - eq((codec_eq_args_t) args); - break; - - case CODEC_CMD_3D: - eq3d(*((uint8_t*) args)); - break; - - default: - return RT_ERROR; - } - return RT_EOK; -} - -static rt_size_t codec_write(rt_device_t dev, rt_off_t pos, - const void* buffer, rt_size_t size) -{ - struct codec_device* device; - struct codec_data_node* node; - rt_uint32_t level; - rt_uint16_t next_index; - - device = (struct codec_device*) dev; - RT_ASSERT(device != RT_NULL); - - next_index = device->put_index + 1; - if (next_index >= DATA_NODE_MAX) - next_index = 0; - - /* check data_list full */ - if (next_index == device->read_index) - { - rt_set_errno(-RT_EFULL); - return 0; - } - - level = rt_hw_interrupt_disable(); - node = &device->data_list[device->put_index]; - device->put_index = next_index; - - /* set node attribute */ - node->data_ptr = (rt_uint16_t*) buffer; - node->data_size = size >> 1; /* size is byte unit, convert to half word unit */ - - next_index = device->read_index + 1; - if (next_index >= DATA_NODE_MAX) - next_index = 0; - - /* check data list whether is empty */ - if (next_index == device->put_index) - { - DMA_Configuration((rt_uint32_t) node->data_ptr, node->data_size); - -#if CODEC_MASTER_MODE - if ((r06 & MS) == 0) - { - CODEC_I2S_PORT->I2SCFGR |= SPI_I2SCFGR_I2SE; - r06 |= MS; - codec_send(r06); - } -#endif - } - rt_hw_interrupt_enable(level); - - return size; -} - -rt_err_t codec_hw_init(void) -{ - rt_device_t dev; - - RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOB | RCC_APB2Periph_GPIOC, ENABLE); - RCC_APB1PeriphClockCmd(CODEC_I2S_RCC_APB1, ENABLE); - RCC_AHBPeriphClockCmd(CODEC_I2S_RCC_AHB, ENABLE); - - NVIC_Configuration(); - GPIO_Configuration(); - I2S_Configuration(I2S_AudioFreq_44k); - - dev = (rt_device_t) &codec; - dev->type = RT_Device_Class_Sound; - dev->rx_indicate = RT_NULL; - dev->tx_complete = RT_NULL; - dev->init = codec_init; - dev->open = codec_open; - dev->close = codec_close; - dev->read = RT_NULL; - dev->write = codec_write; - dev->control = codec_control; - dev->private = RT_NULL; - - /* set read_index and put index to 0 */ - codec.read_index = 0; - codec.put_index = 0; - - /* unselect */ - codec_set_csb(); - - /* register the device */ - return rt_device_register(&codec.parent, "snd", RT_DEVICE_FLAG_WRONLY | RT_DEVICE_FLAG_DMA_TX); -} - -void codec_dma_isr(void) -{ - /* switch to next buffer */ - rt_uint16_t next_index; - void* data_ptr; - - next_index = codec.read_index + 1; - if (next_index >= DATA_NODE_MAX) - next_index = 0; - - /* save current data pointer */ - data_ptr = codec.data_list[codec.read_index].data_ptr; - -#if !CODEC_MASTER_MODE - if (codec_sr_new) - { - I2S_Configuration(codec_sr_new); - I2S_Cmd(CODEC_I2S_PORT, ENABLE); - codec_sr_new = 0; - } -#endif - - codec.read_index = next_index; - if (next_index != codec.put_index) - { - /* enable next dma request */ - DMA_Configuration((rt_uint32_t) codec.data_list[codec.read_index].data_ptr, codec.data_list[codec.read_index].data_size); - -#if CODEC_MASTER_MODE - if ((r06 & MS) == 0) - { - CODEC_I2S_PORT->I2SCFGR |= SPI_I2SCFGR_I2SE; - r06 |= MS; - codec_send(r06); - } -#endif - } - else - { -#if CODEC_MASTER_MODE - if (r06 & MS) - { - CODEC_I2S_DMA->CCR &= ~DMA_CCR1_EN; - while ((CODEC_I2S_PORT->SR & SPI_I2S_FLAG_TXE) == 0); - while ((CODEC_I2S_PORT->SR & SPI_I2S_FLAG_BSY) != 0); - CODEC_I2S_PORT->I2SCFGR &= ~SPI_I2SCFGR_I2SE; - - r06 &= ~MS; - codec_send(r06); - } -#endif - - rt_kprintf("*\n"); - } - - /* notify transmitted complete. */ - if (codec.parent.tx_complete != RT_NULL) - { - codec.parent.tx_complete(&codec.parent, data_ptr); - } -} diff --git a/bsp/stm32_radio/codec.h b/bsp/stm32_radio/codec.h deleted file mode 100644 index f0ba49028a..0000000000 --- a/bsp/stm32_radio/codec.h +++ /dev/null @@ -1,645 +0,0 @@ -#ifndef __CODEC_H__ -#define __CODEC_H__ - -#include - -/* Register Definitions */ -#define REG_SOFTWARE_RESET ((uint16_t)0) -#define REG_POWER_MANAGEMENT1 ((uint16_t)(1 << 9)) -#define REG_POWER_MANAGEMENT2 ((uint16_t)(2 << 9)) -#define REG_POWER_MANAGEMENT3 ((uint16_t)(3 << 9)) -#define REG_AUDIO_INTERFACE ((uint16_t)(4 << 9)) -#define REG_COMPANDING ((uint16_t)(5 << 9)) -#define REG_CLOCK_GEN ((uint16_t)(6 << 9)) -#define REG_ADDITIONAL ((uint16_t)(7 << 9)) -#define REG_GPIO ((uint16_t)(8 << 9)) -#define REG_JACK_DETECT1 ((uint16_t)(9 << 9)) -#define REG_DAC ((uint16_t)(10 << 9)) -#define REG_LEFT_DAC_VOL ((uint16_t)(11 << 9)) -#define REG_RIGHT_DAC_VOL ((uint16_t)(12 << 9)) -#define REG_JACK_DETECT2 ((uint16_t)(13 << 9)) -#define REG_ADC ((uint16_t)(14 << 9)) -#define REG_LEFT_ADC_VOL ((uint16_t)(15 << 9)) -#define REG_RIGHT_ADC_VOL ((uint16_t)(16 << 9)) -#define REG_EQ1 ((uint16_t)(18 << 9)) -#define REG_EQ2 ((uint16_t)(19 << 9)) -#define REG_EQ3 ((uint16_t)(20 << 9)) -#define REG_EQ4 ((uint16_t)(21 << 9)) -#define REG_EQ5 ((uint16_t)(22 << 9)) -#define REG_DAC_LIMITER1 ((uint16_t)(24 << 9)) -#define REG_DAC_LIMITER2 ((uint16_t)(25 << 9)) -#define REG_NOTCH_FILTER1 ((uint16_t)(27 << 9)) -#define REG_NOTCH_FILTER2 ((uint16_t)(28 << 9)) -#define REG_NOTCH_FILTER3 ((uint16_t)(29 << 9)) -#define REG_NOTCH_FILTER4 ((uint16_t)(30 << 9)) -#define REG_ALC1 ((uint16_t)(32 << 9)) -#define REG_ALC2 ((uint16_t)(33 << 9)) -#define REG_ALC3 ((uint16_t)(34 << 9)) -#define REG_NOISE_GATE ((uint16_t)(35 << 9)) -#define REG_PLL_N ((uint16_t)(36 << 9)) -#define REG_PLL_K1 ((uint16_t)(37 << 9)) -#define REG_PLL_K2 ((uint16_t)(38 << 9)) -#define REG_PLL_K3 ((uint16_t)(39 << 9)) -#define REG_3D ((uint16_t)(41 << 9)) -#define REG_BEEP ((uint16_t)(43 << 9)) -#define REG_INPUT ((uint16_t)(44 << 9)) -#define REG_LEFT_PGA_GAIN ((uint16_t)(45 << 9)) -#define REG_RIGHT_PGA_GAIN ((uint16_t)(46 << 9)) -#define REG_LEFT_ADC_BOOST ((uint16_t)(47 << 9)) -#define REG_RIGHT_ADC_BOOST ((uint16_t)(48 << 9)) -#define REG_OUTPUT ((uint16_t)(49 << 9)) -#define REG_LEFT_MIXER ((uint16_t)(50 << 9)) -#define REG_RIGHT_MIXER ((uint16_t)(51 << 9)) -#define REG_LOUT1_VOL ((uint16_t)(52 << 9)) -#define REG_ROUT1_VOL ((uint16_t)(53 << 9)) -#define REG_LOUT2_VOL ((uint16_t)(54 << 9)) -#define REG_ROUT2_VOL ((uint16_t)(55 << 9)) -#define REG_OUT3_MIXER ((uint16_t)(56 << 9)) -#define REG_OUT4_MIXER ((uint16_t)(57 << 9)) - -// R01 REG_POWER_MANAGEMENT1 -#define BUFDCOPEN (1 << 8) -#define OUT4MIXEN (1 << 7) -#define OUT3MIXEN (1 << 6) -#define PLLEN (1 << 5) -#define MICBEN (1 << 4) -#define BIASEN (1 << 3) -#define BUFIOEN (1 << 2) -#define VMIDSEL_OFF (0) -#define VMIDSEL_75K (1) -#define VMIDSEL_300K (2) -#define VMIDSEL_5K (3) - -// R02 REG_POWER_MANAGEMENT2 -#define ROUT1EN (1 << 8) -#define LOUT1EN (1 << 7) -#define SLEEP (1 << 6) -#define BOOSTENR (1 << 5) -#define BOOSTENL (1 << 4) -#define INPPGAENR (1 << 3) -#define INPPGAENL (1 << 2) -#define ADCENR (1 << 1) -#define ADCENL (1) - -// R03 REG_POWER_MANAGEMENT3 -#define OUT4EN (1 << 8) -#define OUT3EN (1 << 7) -#define LOUT2EN (1 << 6) -#define ROUT2EN (1 << 5) -#define RMIXEN (1 << 3) -#define LMIXEN (1 << 2) -#define DACENR (1 << 1) -#define DACENL (1) - -// R04 REG_AUDIO_INTERFACE -#define BCP_NORMAL (0) -#define BCP_INVERTED (1 << 8) -#define LRP_NORMAL (0) -#define LRP_INVERTED (1 << 7) -#define WL_16BITS (0) -#define WL_20BITS (1 << 5) -#define WL_24BITS (2 << 5) // Default value -#define WL_32BITS (3 << 5) -#define FMT_RIGHT_JUSTIFIED (0) -#define FMT_LEFT_JUSTIFIED (1 << 3) -#define FMT_I2S (2 << 3) // Default value -#define FMT_PCM (3 << 3) -#define DACLRSWAP (1 << 2) -#define ADCLRSWAP (1 << 1) -#define MONO (1) - -// R05 REG_COMPANDING -#define WL8 (1 << 5) -#define DAC_COMP_OFF (0) // Default value -#define DAC_COMP_ULAW (2 << 3) -#define DAC_COMP_ALAW (3 << 3) -#define ADC_COMP_OFF (0) // Default value -#define ADC_COMP_ULAW (2 << 1) -#define ADC_COMP_ALAW (3 << 1) -#define LOOPBACK (1) - -// R06 REG_CLOCK_GEN -#define CLKSEL_MCLK (0) -#define CLKSEL_PLL (1 << 8) // Default value -#define MCLK_DIV1 (0) -#define MCLK_DIV1_5 (1 << 5) -#define MCLK_DIV2 (2 << 5) // Default value -#define MCLK_DIV3 (3 << 5) -#define MCLK_DIV4 (4 << 5) -#define MCLK_DIV6 (5 << 5) -#define MCLK_DIV8 (6 << 5) -#define MCLK_DIV12 (7 << 5) -#define BCLK_DIV1 (0) // Default value -#define BCLK_DIV2 (1 << 2) -#define BCLK_DIV4 (2 << 2) -#define BCLK_DIV8 (3 << 2) -#define BCLK_DIV16 (4 << 2) -#define BCLK_DIV32 (5 << 2) -#define MS (1) - -// R07 REG_ADDITIONAL -#define SR_48KHZ (0) // Default value -#define SR_32KHZ (1 << 1) -#define SR_24KHZ (2 << 1) -#define SR_16KHZ (3 << 1) -#define SR_12KHZ (4 << 1) -#define SR_8KHZ (5 << 1) -#define SLOWCLKEN (1) - -// R08 REG_GPIO -#define OPCLK_DIV1 (0) // Default value -#define OPCLK_DIV2 (1 << 4) -#define OPCLK_DIV3 (2 << 4) -#define OPCLK_DIV4 (3 << 4) -#define GPIO1POL_NONINVERTED (0) // Default value -#define GPIO1POL_INVERTED (1 << 3) -#define GPIO1SEL_INPUT (0) // Default value -#define GPIO1SEL_TEMP_OK (2) -#define GPIO1SEL_AMUTE_ACTIVE (3) -#define GPIO1SEL_PLL_CLK_OP (4) -#define GPIO1SEL_PLL_LOCK (5) -#define GPIO1SEL_LOGIC1 (6) -#define GPIO1SEL_LOGIC0 (7) - -// R09 REG_JACK_DETECT1 -#define JD_VMID_EN1 (1 << 8) -#define JD_VMID_EN0 (1 << 7) -#define JD_EN (1 << 6) -#define JD_SEL_GPIO1 (0 << 4) // Default value -#define JD_SEL_GPIO2 (1 << 4) -#define JD_SEL_GPIO3 (2 << 4) - -// R10 REG_DAC -#define SOFTMUTE (1 << 6) -#define DACOSR128 (1 << 3) -#define AMUTE (1 << 2) -#define DACPOLR (1 << 1) -#define DACPOLL (1) - -// R11 & R12 REG_LEFT_DAC_VOL & REG_RIGHT_DAC_VOL -#define DACVU (1 << 8) -#define DACVOL_POS (0) -#define DACVOL_MASK (0xFF) - -// R13 REG_JACK_DETECT2 -#define JD_OUT4_EN1 (1 << 7) -#define JD_OUT3_EN1 (1 << 6) -#define JD_OUT2_EN1 (1 << 5) -#define JD_OUT1_EN1 (1 << 4) -#define JD_OUT4_EN0 (1 << 3) -#define JD_OUT3_EN0 (1 << 2) -#define JD_OUT2_EN0 (1 << 1) -#define JD_OUT1_EN0 (1) - -// R14 REG_ADC -#define HPFEN (1 << 8) -#define HPFAPP (1 << 7) -#define HPFCUT_POS (4) -#define HPFCUT_MASK (7) -#define HPFCUT_0 (0) -#define HPFCUT_1 (1 << 4) -#define HPFCUT_2 (2 << 4) -#define HPFCUT_3 (3 << 4) -#define HPFCUT_4 (4 << 4) -#define HPFCUT_5 (5 << 4) -#define HPFCUT_6 (6 << 4) -#define HPFCUT_7 (7 << 4) -#define ADCOSR128 (1 << 3) -#define ADCRPOL (1 << 1) -#define ADCLPOL (1) - -// R15 & R16 REG_LEFT_ADC_VOL & REG_RIGHT_ADC_VOL -#define ADCVU (1 << 8) -#define ADCVOL_POS (0) -#define ADCVOL_MASK (0xFF) - -// R18 REG_EQ1 -#define EQ3DMODE_ADC (0) -#define EQ3DMODE_DAC (1 << 8) // Default value -#define EQ1C_80HZ (0) -#define EQ1C_105HZ (1 << 5) // Default value -#define EQ1C_135HZ (2 << 5) -#define EQ1C_175HZ (3 << 5) - -// R19 REG_EQ2 -#define EQ2BW_NARROW (0) // Default value -#define EQ2BW_WIDE (1 << 8) -#define EQ2C_230HZ (0) -#define EQ2C_300HZ (1 << 5) // Default value -#define EQ2C_385HZ (2 << 5) -#define EQ2C_500HZ (3 << 5) - -// R20 REG_EQ3 -#define EQ3BW_NARROW (0) // Default value -#define EQ3BW_WIDE (1 << 8) -#define EQ3C_650HZ (0) -#define EQ3C_850HZ (1 << 5) // Default value -#define EQ3C_1_1KHZ (2 << 5) -#define EQ3C_1_4KHZ (3 << 5) - -// R21 REG_EQ4 -#define EQ4BW_NARROW (0) // Default value -#define EQ4BW_WIDE (1 << 8) -#define EQ4C_1_8KHZ (0) -#define EQ4C_2_4KHZ (1 << 5) // Default value -#define EQ4C_3_2KHZ (2 << 5) -#define EQ4C_4_1KHZ (3 << 5) - -// R22 REG_EQ5 -#define EQ5C_5_3KHZ (0) -#define EQ5C_6_9KHZ (1 << 5) // Default value -#define EQ5C_9KHZ (2 << 5) -#define EQ5C_11_7KHZ (3 << 5) - -// R18 - R22 -#define EQC_POS (5) -#define EQC_MASK (3) -#define EQG_POS (0) -#define EQG_MASK (31) - -// R24 REG_DAC_LIMITER1 -#define LIMEN (1 << 8) -#define LIMDCY_POS (4) -#define LIMDCY_MASK (15) -#define LIMDCY_750US (0) -#define LIMDCY_1_5MS (1 << 4) -#define LIMDCY_3MS (2 << 4) -#define LIMDCY_6MS (3 << 4) // Default value -#define LIMDCY_12MS (4 << 4) -#define LIMDCY_24MS (5 << 4) -#define LIMDCY_48MS (6 << 4) -#define LIMDCY_96MS (7 << 4) -#define LIMDCY_192MS (8 << 4) -#define LIMDCY_384MS (9 << 4) -#define LIMDCY_768MS (10 << 4) -#define LIMATK_POS (0) -#define LIMATK_MASK (15) -#define LIMATK_94US (0) -#define LIMATK_188US (1) -#define LIMATK_375US (2) // Default value -#define LIMATK_750US (3) -#define LIMATK_1_5MS (4) -#define LIMATK_3MS (5) -#define LIMATK_6MS (6) -#define LIMATK_12MS (7) -#define LIMATK_24MS (8) -#define LIMATK_48MS (9) -#define LIMATK_96MS (10) -#define LIMATK_192MS (11) - -// R25 REG_DAC_LIMITER2 -#define LIMLVL_POS (4) -#define LIMLVL_MASK (7) -#define LIMLVL_N1DB (0) // Default value -#define LIMLVL_N2DB (1 << 4) -#define LIMLVL_N3DB (2 << 4) -#define LIMLVL_N4DB (3 << 4) -#define LIMLVL_N5DB (4 << 4) -#define LIMLVL_N6DB (5 << 4) -#define LIMBOOST_POS (0) -#define LIMBOOST_MASK (15) -#define LIMBOOST_0DB (0) -#define LIMBOOST_1DB (1) -#define LIMBOOST_2DB (2) -#define LIMBOOST_3DB (3) -#define LIMBOOST_4DB (4) -#define LIMBOOST_5DB (5) -#define LIMBOOST_6DB (6) -#define LIMBOOST_7DB (7) -#define LIMBOOST_8DB (8) -#define LIMBOOST_9DB (9) -#define LIMBOOST_10DB (10) -#define LIMBOOST_11DB (11) -#define LIMBOOST_12DB (12) - -// R27 - R30 REG_NOTCH_FILTER1 - REG_NOTCH_FILTER4 -#define NFU (1 << 8) -#define NFEN (1 << 7) -#define NFA_POS (0) -#define NFA_MASK (127) - -// R32 REG_ALC1 -#define ALCSEL_OFF (0) // Default value -#define ALCSEL_RIGHT_ONLY (1 << 7) -#define ALCSEL_LEFT_ONLY (2 << 7) -#define ALCSEL_BOTH_ON (3 << 7) -#define ALCMAXGAIN_POS (3) -#define ALCMAXGAIN_MASK (7) -#define ALCMAXGAIN_N6_75DB (0) -#define ALCMAXGAIN_N0_75DB (1 << 3) -#define ALCMAXGAIN_5_25DB (2 << 3) -#define ALCMAXGAIN_11_25DB (3 << 3) -#define ALCMAXGAIN_17_25DB (4 << 3) -#define ALCMAXGAIN_23_25DB (5 << 3) -#define ALCMAXGAIN_29_25DB (6 << 3) -#define ALCMAXGAIN_35_25DB (7 << 3) // Default value -#define ALCMINGAIN_POS (0) -#define ALCMINGAIN_MASK (7) -#define ALCMINGAIN_N12DB (0) // Default value -#define ALCMINGAIN_N6DB (1) -#define ALCMINGAIN_0DB (2) -#define ALCMINGAIN_6DB (3) -#define ALCMINGAIN_12DB (4) -#define ALCMINGAIN_18DB (5) -#define ALCMINGAIN_24DB (6) -#define ALCMINGAIN_30DB (7) - -// R33 REG_ALC2 -#define ALCHLD_POS (4) -#define ALCHLD_MASK (15) -#define ALCHLD_0MS (0) // Default value -#define ALCHLD_2_67MS (1 << 4) -#define ALCHLD_5_33MS (2 << 4) -#define ALCHLD_10_67MS (3 << 4) -#define ALCHLD_21_33MS (4 << 4) -#define ALCHLD_42_67MS (5 << 4) -#define ALCHLD_85_33MS (6 << 4) -#define ALCHLD_170_67MS (7 << 4) -#define ALCHLD_341_33MS (8 << 4) -#define ALCHLD_682_67MS (9 << 4) -#define ALCHLD_1_36S (10 << 4) -#define ALCLVL_POS (0) -#define ALCLVL_MASK (15) -#define ALCLVL_N22_5DBFS (0) -#define ALCLVL_N21DBFS (1) -#define ALCLVL_N19_5DBFS (2) -#define ALCLVL_N18DBFS (3) -#define ALCLVL_N16_5DBFS (4) -#define ALCLVL_N15DBFS (5) -#define ALCLVL_N13_5DBFS (6) -#define ALCLVL_N12DBFS (7) -#define ALCLVL_N10_5DBFS (8) -#define ALCLVL_N9DBFS (9) -#define ALCLVL_N7_5DBFS (10) -#define ALCLVL_N6DBFS (11) // Default value -#define ALCLVL_N4_5DBFS (12) -#define ALCLVL_N3DBFS (13) -#define ALCLVL_N1_5DBFS (14) - -// R34 REG_ALC3 -#define ALCMODE_ALC (0) // Default value -#define ALCMODE_LIMITER (1 << 8) -#define ALCDCY_POS (4) -#define ALCDCY_MASK (15) -#define ALCDCY_0 (0) -#define ALCDCY_1 (1 << 4) -#define ALCDCY_2 (2 << 4) -#define ALCDCY_3 (3 << 4) // Default value -#define ALCDCY_4 (4 << 4) -#define ALCDCY_5 (5 << 4) -#define ALCDCY_6 (6 << 4) -#define ALCDCY_7 (7 << 4) -#define ALCDCY_8 (8 << 4) -#define ALCDCY_9 (9 << 4) -#define ALCDCY_10 (10 << 4) -#define ALCATK_POS (0) -#define ALCATK_MASK (15) -#define ALCATK_0 (0) -#define ALCATK_1 (1) -#define ALCATK_2 (2) // Default value -#define ALCATK_3 (3) -#define ALCATK_4 (4) -#define ALCATK_5 (5) -#define ALCATK_6 (6) -#define ALCATK_7 (7) -#define ALCATK_8 (8) -#define ALCATK_9 (9) -#define ALCATK_10 (10) - -// R35 REG_NOISE_GATE -#define NGEN (1 << 3) -#define NGTH_POS (0) -#define NGTH_MASK (7) -#define NGTH_N39DB (0) // Default value -#define NGTH_N45DB (1) -#define NGTH_N51DB (2) -#define NGTH_N57DB (3) -#define NGTH_N63DB (4) -#define NGTH_N69DB (5) -#define NGTH_N75DB (6) -#define NGTH_N81DB (7) - -// R36 REG_PLL_N -#define PLLPRESCALE (1 << 4) -#define PLLN_POS (0) -#define PLLN_MASK (15) - -// R37 - R39 REG_PLL_K1 - REG_PLL_K3 -#define PLLK1_POS (0) -#define PLLK1_MASK (63) -#define PLLK2_POS (0) -#define PLLK2_MASK (511) -#define PLLK3_POS (0) -#define PLLK3_MASK (511) - -// R41 REG_3D -#define DEPTH3D_POS (0) -#define DEPTH3D_MASK (15) -#define DEPTH3D_0 (0) // Default value -#define DEPTH3D_6_67 (1) -#define DEPTH3D_13_33 (2) -#define DEPTH3D_20 (3) -#define DEPTH3D_26_67 (4) -#define DEPTH3D_33_33 (5) -#define DEPTH3D_40 (6) -#define DEPTH3D_46_67 (7) -#define DEPTH3D_53_33 (8) -#define DEPTH3D_60 (9) -#define DEPTH3D_66_67 (10) -#define DEPTH3D_73_33 (11) -#define DEPTH3D_80 (12) -#define DEPTH3D_86_67 (13) -#define DEPTH3D_93_33 (14) -#define DEPTH3D_100 (15) - -// R43 REG_BEEP -#define MUTERPGA2INV (1 << 5) -#define INVROUT2 (1 << 4) -#define BEEPVOL_POS (1) -#define BEEPVOL_MASK (7) -#define BEEPVOL_N15DB (0) -#define BEEPVOL_N12DB (1 << 1) -#define BEEPVOL_N9DB (2 << 1) -#define BEEPVOL_N6DB (3 << 1) -#define BEEPVOL_N3DB (4 << 1) -#define BEEPVOL_0DB (5 << 1) -#define BEEPVOL_3DB (6 << 1) -#define BEEPVOL_6DB (7 << 1) -#define BEEPEN (1) - -// R44 REG_INPUT -#define MBVSEL_0_9AVDD (0) // Default value -#define MBVSEL_0_65AVDD (1 << 8) -#define R2_2INPVGA (1 << 6) -#define RIN2INPVGA (1 << 5) // Default value -#define RIP2INPVGA (1 << 4) // Default value -#define L2_2INPVGA (1 << 2) -#define LIN2INPVGA (1 << 1) // Default value -#define LIP2INPVGA (1) // Default value - -// R45 REG_LEFT_PGA_GAIN -#define INPPGAUPDATE (1 << 8) -#define INPPGAZCL (1 << 7) -#define INPPGAMUTEL (1 << 6) - -// R46 REG_RIGHT_PGA_GAIN -#define INPPGAZCR (1 << 7) -#define INPPGAMUTER (1 << 6) - -// R45 - R46 -#define INPPGAVOL_POS (0) -#define INPPGAVOL_MASK (63) - -// R47 REG_LEFT_ADC_BOOST -#define PGABOOSTL (1 << 8) // Default value -#define L2_2BOOSTVOL_POS (4) -#define L2_2BOOSTVOL_MASK (7) -#define L2_2BOOSTVOL_DISABLED (0) // Default value -#define L2_2BOOSTVOL_N12DB (1 << 4) -#define L2_2BOOSTVOL_N9DB (2 << 4) -#define L2_2BOOSTVOL_N6DB (3 << 4) -#define L2_2BOOSTVOL_N3DB (4 << 4) -#define L2_2BOOSTVOL_0DB (5 << 4) -#define L2_2BOOSTVOL_3DB (6 << 4) -#define L2_2BOOSTVOL_6DB (7 << 4) -#define AUXL2BOOSTVOL_POS (0) -#define AUXL2BOOSTVOL_MASK (7) -#define AUXL2BOOSTVOL_DISABLED (0) // Default value -#define AUXL2BOOSTVOL_N12DB (1) -#define AUXL2BOOSTVOL_N9DB (2) -#define AUXL2BOOSTVOL_N6DB (3) -#define AUXL2BOOSTVOL_N3DB (4) -#define AUXL2BOOSTVOL_0DB (5) -#define AUXL2BOOSTVOL_3DB (6) -#define AUXL2BOOSTVOL_6DB (7) - -// R48 REG_RIGHT_ADC_BOOST -#define PGABOOSTR (1 << 8) // Default value -#define R2_2BOOSTVOL_POS (4) -#define R2_2BOOSTVOL_MASK (7) -#define R2_2BOOSTVOL_DISABLED (0) // Default value -#define R2_2BOOSTVOL_N12DB (1 << 4) -#define R2_2BOOSTVOL_N9DB (2 << 4) -#define R2_2BOOSTVOL_N6DB (3 << 4) -#define R2_2BOOSTVOL_N3DB (4 << 4) -#define R2_2BOOSTVOL_0DB (5 << 4) -#define R2_2BOOSTVOL_3DB (6 << 4) -#define R2_2BOOSTVOL_6DB (7 << 4) -#define AUXR2BOOSTVOL_POS (0) -#define AUXR2BOOSTVOL_MASK (7) -#define AUXR2BOOSTVOL_DISABLED (0) // Default value -#define AUXR2BOOSTVOL_N12DB (1) -#define AUXR2BOOSTVOL_N9DB (2) -#define AUXR2BOOSTVOL_N6DB (3) -#define AUXR2BOOSTVOL_N3DB (4) -#define AUXR2BOOSTVOL_0DB (5) -#define AUXR2BOOSTVOL_3DB (6) -#define AUXR2BOOSTVOL_6DB (7) - -// R49 REG_OUTPUT -#define DACL2RMIX (1 << 6) -#define DACR2LMIX (1 << 5) -#define OUT4BOOST (1 << 4) -#define OUT3BOOST (1 << 3) -#define SPKBOOST (1 << 2) -#define TSDEN (1 << 1) -#define VROI (1) - -// R50 REG_LEFT_MIXER -#define AUXLMIXVOL_POS (6) -#define AUXLMIXVOL_MASK (7) -#define AUXLMIXVOL_N15DB (0) // Default value -#define AUXLMIXVOL_N12DB (1 << 6) -#define AUXLMIXVOL_N9DB (2 << 6) -#define AUXLMIXVOL_N6DB (3 << 6) -#define AUXLMIXVOL_N3DB (4 << 6) -#define AUXLMIXVOL_0DB (5 << 6) -#define AUXLMIXVOL_3DB (6 << 6) -#define AUXLMIXVOL_6DB (7 << 6) -#define AUXL2LMIX (1 << 5) -#define BYPLMIXVOL_POS (2) -#define BYPLMIXVOL_MASK (7) -#define BYPLMIXVOL_N15DB (0) // Default value -#define BYPLMIXVOL_N12DB (1 << 2) -#define BYPLMIXVOL_N9DB (2 << 2) -#define BYPLMIXVOL_N6DB (3 << 2) -#define BYPLMIXVOL_N3DB (4 << 2) -#define BYPLMIXVOL_0DB (5 << 2) -#define BYPLMIXVOL_3DB (6 << 2) -#define BYPLMIXVOL_6DB (7 << 2) -#define BYPL2LMIX (1 << 1) -#define DACL2LMIX (1) - -// R51 REG_RIGHT_MIXER -#define AUXRMIXVOL_POS (6) -#define AUXRMIXVOL_MASK (7) -#define AUXRMIXVOL_N15DB (0) // Default value -#define AUXRMIXVOL_N12DB (1 << 6) -#define AUXRMIXVOL_N9DB (2 << 6) -#define AUXRMIXVOL_N6DB (3 << 6) -#define AUXRMIXVOL_N3DB (4 << 6) -#define AUXRMIXVOL_0DB (5 << 6) -#define AUXRMIXVOL_3DB (6 << 6) -#define AUXRMIXVOL_6DB (7 << 6) -#define AUXR2RMIX (1 << 5) -#define BYPRMIXVOL_POS (2) -#define BYPRMIXVOL_MASK (7) -#define BYPRMIXVOL_N15DB (0) // Default value -#define BYPRMIXVOL_N12DB (1 << 2) -#define BYPRMIXVOL_N9DB (2 << 2) -#define BYPRMIXVOL_N6DB (3 << 2) -#define BYPRMIXVOL_N3DB (4 << 2) -#define BYPRMIXVOL_0DB (5 << 2) -#define BYPRMIXVOL_3DB (6 << 2) -#define BYPRMIXVOL_6DB (7 << 2) -#define BYPR2RMIX (1 << 1) -#define DACR2RMIX (1) - -// R52 - R55 REG_LOUT1_VOL - REG_ROUT2_VOL -#define HPVU (1 << 8) -#define SPKVU (1 << 8) -#define LOUT1ZC (1 << 7) -#define LOUT1MUTE (1 << 6) -#define ROUT1ZC (1 << 7) -#define ROUT1MUTE (1 << 6) -#define LOUT2ZC (1 << 7) -#define LOUT2MUTE (1 << 6) -#define ROUT2ZC (1 << 7) -#define ROUT2MUTE (1 << 6) -#define VOL_POS (0) -#define VOL_MASK (63) - -// R56 REG_OUT3_MIXER -#define OUT3MUTE (1 << 6) -#define OUT4_2OUT3 (1 << 3) -#define BYPL2OUT3 (1 << 2) -#define LMIX2OUT3 (1 << 1) -#define LDAC2OUT3 (1) - -// R57 REG_OUT4_MIXER -#define OUT4MUTE (1 << 6) -#define HALFSIG (1 << 5) -#define LMIX2OUT4 (1 << 4) -#define LDAC2OUT4 (1 << 3) -#define BYPR2OUT4 (1 << 2) -#define RMIX2OUT4 (1 << 1) -#define RDAC2OUT4 (1) - - -/* Device Control Commands */ -#define CODEC_CMD_RESET 0 -#define CODEC_CMD_VOLUME 1 -#define CODEC_CMD_SAMPLERATE 2 -#define CODEC_CMD_EQ 3 -#define CODEC_CMD_3D 4 - -struct codec_eq_args -{ - uint8_t channel; - uint8_t frequency; - uint8_t gain; - uint8_t mode_bandwidth; -}; -typedef struct codec_eq_args* codec_eq_args_t; - -#endif // #ifndef __CODEC_H__ diff --git a/bsp/stm32_radio/device_info.c b/bsp/stm32_radio/device_info.c deleted file mode 100644 index 495df65bbd..0000000000 --- a/bsp/stm32_radio/device_info.c +++ /dev/null @@ -1,239 +0,0 @@ -#include -#include -#include -#include - -#include -#include - -#include - -#ifdef RT_USING_LWIP -#include -#include -#include -#endif - -static struct rtgui_view* device_view = RT_NULL; - -int get_thread_cnt() -{ - int cnt = 0; - struct rt_list_node *list, *node; - extern struct rt_object_information rt_object_container[]; - - list = &rt_object_container[RT_Object_Class_Thread].object_list; - - for (node = list->next; node != list; node = node->next) - { - cnt ++; - } - - return cnt; -} - -const static char *stm32_devname[] = -{ - "STM32 MD", /* 0x410 */ - "STM32 LD", /* 0x412 */ - "STM32 HD", /* 0x414 */ - "Unknown" , /* 0x416 */ - "STM32 CL", /* 0x418 */ -}; - -const static char *stm32_revname[] = -{ - "Rev A", - "Rev B", - "Rev Z", - "Rev Y", - "Rev Unknown" -}; - -/* - * Device Information View - * Device: Win32 or Cortex-M3 etc - * Memory: - * Thread: - * IP Address: - * Gateway: - * DNS: - */ -static rt_bool_t view_event_handler(struct rtgui_widget* widget, struct rtgui_event* event) -{ - switch (event->type) - { - case RTGUI_EVENT_PAINT: - { - struct rtgui_dc* dc; - struct rtgui_rect rect; - char* line; - rt_uint32_t total, used, max_used; - - line = rtgui_malloc(256); - if (line == RT_NULL) return RT_FALSE; - - dc = rtgui_dc_begin_drawing(widget); - if (dc == RT_NULL) - { - rtgui_free(line); - return RT_FALSE; - } - rtgui_widget_get_rect(widget, &rect); - - /* fill background */ - rtgui_dc_fill_rect(dc, &rect); - - rect.y2 = rect.y1 + 18; - - { - rt_uint32_t dev_index, rev_index; - - dev_index = DBGMCU_GetDEVID(); - dev_index = (dev_index - 0x410)/2; - rev_index = DBGMCU_GetREVID(); - switch (rev_index) - { - case 0x1000: - case 0x0000: - rev_index = 0; /* Revision A */ - break; - - case 0x1001: - case 0x2001: - rev_index = 3; /* Revision Z */ - break; - - case 0x2000: - rev_index = 1; /* Revision B */ - break; - case 0x2002: - rev_index = 2; /* Revision Y */ - break; - - default: - rev_index = 4; /* Unknown */ - break; - }; - - /* check device index */ - if (dev_index > 4) dev_index = 3; - - /* draw each information */ - sprintf(line, "É豸: %s %s", - stm32_devname[dev_index], - stm32_revname[rev_index]); - rtgui_dc_draw_text(dc, line, &rect); rect.y1 += 16; rect.y2 += 16; - } - - rt_memory_info(&total, &used, &max_used); - sprintf(line, "ÄÚ´æ: µ±Ç°Ê¹Óà %d ×Ö½Ú", used); - rtgui_dc_draw_text(dc, line, &rect); rect.y1 += 16; rect.y2 += 16; - { - rt_uint16_t rect_width; - rtgui_color_t saved; - - rtgui_rect_t mem_rect = rect; - rtgui_rect_inflate(&mem_rect, -2); - rtgui_dc_draw_rect(dc, &mem_rect); - - rtgui_rect_inflate(&mem_rect, -1); - rect_width = rtgui_rect_width(mem_rect); - - saved = RTGUI_WIDGET_BACKGROUND(widget); - - RTGUI_WIDGET_BACKGROUND(widget) = light_grey; - mem_rect.x2 = mem_rect.x1 + (max_used * rect_width / total); - rtgui_dc_fill_rect(dc, &mem_rect); - - RTGUI_WIDGET_BACKGROUND(widget) = blue; - mem_rect.x2 = mem_rect.x1 + (used * rect_width / total); - rtgui_dc_fill_rect(dc, &mem_rect); - - /* restore color */ - RTGUI_WIDGET_BACKGROUND(widget) = saved; - } - rect.y1 += 18; rect.y2 += 18; - - sprintf(line, "Ïß³ÌÊý: %d", get_thread_cnt()); - rtgui_dc_draw_text(dc, line, &rect); rect.y1 += 16; rect.y2 += 16; - -#ifdef RT_USING_LWIP - { - struct ip_addr ip_addr; - struct _ip_addr - { - rt_uint8_t addr0, addr1, addr2, addr3; - } *addr; - - addr = (struct _ip_addr*)&netif_default->ip_addr.addr; - - sprintf(line, "IPµØÖ· : %d.%d.%d.%d", addr->addr0, addr->addr1, addr->addr2, addr->addr3); - rtgui_dc_draw_text(dc, line, &rect); rect.y1 += 16; rect.y2 += 16; - - addr = (struct _ip_addr*)&netif_default->gw.addr; - sprintf(line, "Íø¹ØµØÖ·: %d.%d.%d.%d", addr->addr0, addr->addr1, addr->addr2, addr->addr3); - rtgui_dc_draw_text(dc, line, &rect); rect.y1 += 16; rect.y2 += 16; - - addr = (struct _ip_addr*)&netif_default->netmask.addr; - sprintf(line, "ÍøÂçÑÚÂë: %d.%d.%d.%d", addr->addr0, addr->addr1, addr->addr2, addr->addr3); - rtgui_dc_draw_text(dc, line, &rect); rect.y1 += 16; rect.y2 += 16; - -#if LWIP_DNS - ip_addr = dns_getserver(0); - addr = (struct _ip_addr*)&ip_addr; - sprintf(line, "DNSµØÖ· : %d.%d.%d.%d", addr->addr0, addr->addr1, addr->addr2, addr->addr3); - rtgui_dc_draw_text(dc, line, &rect); rect.y1 += 16; rect.y2 += 16; -#endif - } -#endif - - rtgui_dc_end_drawing(dc); - rtgui_free(line); - return RT_FALSE; - } - - case RTGUI_EVENT_KBD: - { - struct rtgui_event_kbd* ekbd; - - ekbd = (struct rtgui_event_kbd*)event; - if (ekbd->type == RTGUI_KEYDOWN && ekbd->key == RTGUIK_RETURN) - { - rtgui_workbench_t* workbench; - - workbench = RTGUI_WORKBENCH(RTGUI_WIDGET(device_view)->parent); - rtgui_workbench_remove_view(workbench, device_view); - - rtgui_view_destroy(device_view); - device_view = RT_NULL; - } - } - return RT_FALSE; - } - - /* use parent event handler */ - return rtgui_view_event_handler(widget, event); -} - -rtgui_view_t *device_view_create(rtgui_workbench_t* workbench) -{ - if (device_view != RT_NULL) - { - rtgui_view_show(device_view, RT_FALSE); - } - else - { - /* create a view */ - device_view = rtgui_view_create("Device Info"); - /* set view event handler */ - rtgui_widget_set_event_handler(RTGUI_WIDGET(device_view), view_event_handler); - /* this view can be focused */ - RTGUI_WIDGET(device_view)->flag |= RTGUI_WIDGET_FLAG_FOCUSABLE; - - /* add view to workbench */ - rtgui_workbench_add_view(workbench, device_view); - } - - return device_view; -} diff --git a/bsp/stm32_radio/dm9000.c b/bsp/stm32_radio/dm9000.c deleted file mode 100644 index 7d577d1543..0000000000 --- a/bsp/stm32_radio/dm9000.c +++ /dev/null @@ -1,677 +0,0 @@ -#include -#include "dm9000.h" - -#include -#include "lwipopts.h" -#include "stm32f10x.h" - -// #define DM9000_DEBUG 1 -#if ( DM9000_DEBUG == 1 ) -#define DM9000_TRACE rt_kprintf -#else -#define DM9000_TRACE(...) -#endif - -/* - * DM9000 interrupt line is connected to PF7 - */ -//-------------------------------------------------------- - -#define DM9000_PHY 0x40 /* PHY address 0x01 */ -#define RST_1() GPIO_SetBits(GPIOE,GPIO_Pin_5) -#define RST_0() GPIO_ResetBits(GPIOE,GPIO_Pin_5) - -#define MAX_ADDR_LEN 6 -enum DM9000_PHY_mode -{ - DM9000_10MHD = 0, DM9000_100MHD = 1, - DM9000_10MFD = 4, DM9000_100MFD = 5, - DM9000_AUTO = 8, DM9000_1M_HPNA = 0x10 -}; - -enum DM9000_TYPE -{ - TYPE_DM9000E, - TYPE_DM9000A, - TYPE_DM9000B -}; - -struct rt_dm9000_eth -{ - /* inherit from ethernet device */ - struct eth_device parent; - - enum DM9000_TYPE type; - enum DM9000_PHY_mode mode; - - rt_uint8_t imr_all; - - rt_uint8_t packet_cnt; /* packet I or II */ - rt_uint16_t queue_packet_len; /* queued packet (packet II) */ - - /* interface address info. */ - rt_uint8_t dev_addr[MAX_ADDR_LEN]; /* hw address */ -}; -static struct rt_dm9000_eth dm9000_device; -static struct rt_semaphore sem_ack, sem_lock; - -void rt_dm9000_isr(void); - -static void delay_ms(rt_uint32_t ms) -{ - rt_uint32_t len; - for (; ms > 0; ms --) - for (len = 0; len < 100; len++ ); -} - -/* Read a byte from I/O port */ -rt_inline rt_uint8_t dm9000_io_read(rt_uint16_t reg) -{ - DM9000_IO = reg; - return (rt_uint8_t) DM9000_DATA; -} - -/* Write a byte to I/O port */ -rt_inline void dm9000_io_write(rt_uint16_t reg, rt_uint16_t value) -{ - DM9000_IO = reg; - DM9000_DATA = value; -} - -/* Read a word from phyxcer */ -rt_inline rt_uint16_t phy_read(rt_uint16_t reg) -{ - rt_uint16_t val; - - /* Fill the phyxcer register into REG_0C */ - dm9000_io_write(DM9000_EPAR, DM9000_PHY | reg); - dm9000_io_write(DM9000_EPCR, 0xc); /* Issue phyxcer read command */ - - delay_ms(100); /* Wait read complete */ - - dm9000_io_write(DM9000_EPCR, 0x0); /* Clear phyxcer read command */ - val = (dm9000_io_read(DM9000_EPDRH) << 8) | dm9000_io_read(DM9000_EPDRL); - - return val; -} - -/* Write a word to phyxcer */ -rt_inline void phy_write(rt_uint16_t reg, rt_uint16_t value) -{ - /* Fill the phyxcer register into REG_0C */ - dm9000_io_write(DM9000_EPAR, DM9000_PHY | reg); - - /* Fill the written data into REG_0D & REG_0E */ - dm9000_io_write(DM9000_EPDRL, (value & 0xff)); - dm9000_io_write(DM9000_EPDRH, ((value >> 8) & 0xff)); - dm9000_io_write(DM9000_EPCR, 0xa); /* Issue phyxcer write command */ - - delay_ms(500); /* Wait write complete */ - - dm9000_io_write(DM9000_EPCR, 0x0); /* Clear phyxcer write command */ -} - -/* Set PHY operationg mode */ -rt_inline void phy_mode_set(rt_uint32_t media_mode) -{ - rt_uint16_t phy_reg4 = 0x01e1, phy_reg0 = 0x1000; - if (!(media_mode & DM9000_AUTO)) - { - switch (media_mode) - { - case DM9000_10MHD: - phy_reg4 = 0x21; - phy_reg0 = 0x0000; - break; - case DM9000_10MFD: - phy_reg4 = 0x41; - phy_reg0 = 0x1100; - break; - case DM9000_100MHD: - phy_reg4 = 0x81; - phy_reg0 = 0x2000; - break; - case DM9000_100MFD: - phy_reg4 = 0x101; - phy_reg0 = 0x3100; - break; - } - phy_write(4, phy_reg4); /* Set PHY media mode */ - phy_write(0, phy_reg0); /* Tmp */ - } - - dm9000_io_write(DM9000_GPCR, 0x01); /* Let GPIO0 output */ - dm9000_io_write(DM9000_GPR, 0x00); /* Enable PHY */ -} - -/* interrupt service routine */ -void rt_dm9000_isr() -{ - rt_uint16_t int_status; - rt_uint16_t last_io; - - last_io = DM9000_IO; - - /* Disable all interrupts */ - dm9000_io_write(DM9000_IMR, IMR_PAR); - - /* Got DM9000 interrupt status */ - int_status = dm9000_io_read(DM9000_ISR); /* Got ISR */ - dm9000_io_write(DM9000_ISR, int_status); /* Clear ISR status */ - - DM9000_TRACE("dm9000 isr: int status %04x\n", int_status); - - /* receive overflow */ - if (int_status & ISR_ROS) - { - rt_kprintf("overflow\n"); - } - - if (int_status & ISR_ROOS) - { - rt_kprintf("overflow counter overflow\n"); - } - - /* Received the coming packet */ - if (int_status & ISR_PRS) - { - /* disable receive interrupt */ - dm9000_device.imr_all = IMR_PAR | IMR_PTM; - - /* a frame has been received */ - eth_device_ready(&(dm9000_device.parent)); - } - - /* Transmit Interrupt check */ - if (int_status & ISR_PTS) - { - /* transmit done */ - int tx_status = dm9000_io_read(DM9000_NSR); /* Got TX status */ - - if (tx_status & (NSR_TX2END | NSR_TX1END)) - { - dm9000_device.packet_cnt --; - if (dm9000_device.packet_cnt > 0) - { - DM9000_TRACE("dm9000 isr: tx second packet\n"); - - /* transmit packet II */ - /* Set TX length to DM9000 */ - dm9000_io_write(DM9000_TXPLL, dm9000_device.queue_packet_len & 0xff); - dm9000_io_write(DM9000_TXPLH, (dm9000_device.queue_packet_len >> 8) & 0xff); - - /* Issue TX polling command */ - dm9000_io_write(DM9000_TCR, TCR_TXREQ); /* Cleared after TX complete */ - } - - /* One packet sent complete */ - rt_sem_release(&sem_ack); - } - } - - /* Re-enable interrupt mask */ - dm9000_io_write(DM9000_IMR, dm9000_device.imr_all); - - DM9000_IO = last_io; -} - -/* RT-Thread Device Interface */ -/* initialize the interface */ -static rt_err_t rt_dm9000_init(rt_device_t dev) -{ - int i, oft, lnk; - rt_uint32_t value; - - /* RESET device */ - dm9000_io_write(DM9000_NCR, NCR_RST); - delay_ms(1000); /* delay 1ms */ - - /* identfy DM9000 */ - value = dm9000_io_read(DM9000_VIDL); - value |= dm9000_io_read(DM9000_VIDH) << 8; - value |= dm9000_io_read(DM9000_PIDL) << 16; - value |= dm9000_io_read(DM9000_PIDH) << 24; - if (value == DM9000_ID) - { - rt_kprintf("dm9000 id: 0x%x\n", value); - } - else - { - return -RT_ERROR; - } - - /* GPIO0 on pre-activate PHY */ - dm9000_io_write(DM9000_GPR, 0x00); /* REG_1F bit0 activate phyxcer */ - dm9000_io_write(DM9000_GPCR, GPCR_GEP_CNTL); /* Let GPIO0 output */ - dm9000_io_write(DM9000_GPR, 0x00); /* Enable PHY */ - - /* Set PHY */ - phy_mode_set(dm9000_device.mode); - - /* Program operating register */ - dm9000_io_write(DM9000_NCR, 0x0); /* only intern phy supported by now */ - dm9000_io_write(DM9000_TCR, 0); /* TX Polling clear */ - dm9000_io_write(DM9000_BPTR, 0x3f); /* Less 3Kb, 200us */ - dm9000_io_write(DM9000_FCTR, FCTR_HWOT(3) | FCTR_LWOT(8)); /* Flow Control : High/Low Water */ - dm9000_io_write(DM9000_FCR, 0x0); /* SH FIXME: This looks strange! Flow Control */ - dm9000_io_write(DM9000_SMCR, 0); /* Special Mode */ - dm9000_io_write(DM9000_NSR, NSR_WAKEST | NSR_TX2END | NSR_TX1END); /* clear TX status */ - dm9000_io_write(DM9000_ISR, 0x0f); /* Clear interrupt status */ - dm9000_io_write(DM9000_TCR2, 0x80); /* Switch LED to mode 1 */ - - /* set mac address */ - for (i = 0, oft = 0x10; i < 6; i++, oft++) - dm9000_io_write(oft, dm9000_device.dev_addr[i]); - /* set multicast address */ - for (i = 0, oft = 0x16; i < 8; i++, oft++) - dm9000_io_write(oft, 0xff); - - /* Activate DM9000 */ - dm9000_io_write(DM9000_RCR, RCR_DIS_LONG | RCR_DIS_CRC | RCR_RXEN); /* RX enable */ - dm9000_io_write(DM9000_IMR, IMR_PAR); - - if (dm9000_device.mode == DM9000_AUTO) - { - while (!(phy_read(1) & 0x20)) - { - /* autonegation complete bit */ - rt_thread_delay(10); - i++; - if (i == 10000) - { - rt_kprintf("could not establish link\n"); - return 0; - } - } - } - - /* see what we've got */ - lnk = phy_read(17) >> 12; - rt_kprintf("operating at "); - switch (lnk) - { - case 1: - rt_kprintf("10M half duplex "); - break; - case 2: - rt_kprintf("10M full duplex "); - break; - case 4: - rt_kprintf("100M half duplex "); - break; - case 8: - rt_kprintf("100M full duplex "); - break; - default: - rt_kprintf("unknown: %d ", lnk); - break; - } - rt_kprintf("mode\n"); - - dm9000_io_write(DM9000_IMR, dm9000_device.imr_all); /* Enable TX/RX interrupt mask */ - - return RT_EOK; -} - -static rt_err_t rt_dm9000_open(rt_device_t dev, rt_uint16_t oflag) -{ - return RT_EOK; -} - -static rt_err_t rt_dm9000_close(rt_device_t dev) -{ - /* RESET devie */ - phy_write(0, 0x8000); /* PHY RESET */ - dm9000_io_write(DM9000_GPR, 0x01); /* Power-Down PHY */ - dm9000_io_write(DM9000_IMR, 0x80); /* Disable all interrupt */ - dm9000_io_write(DM9000_RCR, 0x00); /* Disable RX */ - - return RT_EOK; -} - -static rt_size_t rt_dm9000_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size) -{ - rt_set_errno(-RT_ENOSYS); - return 0; -} - -static rt_size_t rt_dm9000_write (rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size) -{ - rt_set_errno(-RT_ENOSYS); - return 0; -} - -static rt_err_t rt_dm9000_control(rt_device_t dev, rt_uint8_t cmd, void *args) -{ - switch (cmd) - { - case NIOCTL_GADDR: - /* get mac address */ - if (args) rt_memcpy(args, dm9000_device.dev_addr, 6); - else return -RT_ERROR; - break; - - default : - break; - } - - return RT_EOK; -} - -/* ethernet device interface */ -/* transmit packet. */ -rt_err_t rt_dm9000_tx( rt_device_t dev, struct pbuf* p) -{ - DM9000_TRACE("dm9000 tx: %d\n", p->tot_len); - - /* lock DM9000 device */ - rt_sem_take(&sem_lock, RT_WAITING_FOREVER); - - /* disable dm9000a interrupt */ - dm9000_io_write(DM9000_IMR, IMR_PAR); - - /* Move data to DM9000 TX RAM */ - DM9000_outb(DM9000_IO_BASE, DM9000_MWCMD); - - { - /* q traverses through linked list of pbuf's - * This list MUST consist of a single packet ONLY */ - struct pbuf *q; - rt_uint16_t pbuf_index = 0; - rt_uint8_t word[2], word_index = 0; - - q = p; - /* Write data into dm9000a, two bytes at a time - * Handling pbuf's with odd number of bytes correctly - * No attempt to optimize for speed has been made */ - while (q) - { - if (pbuf_index < q->len) - { - word[word_index++] = ((u8_t*)q->payload)[pbuf_index++]; - if (word_index == 2) - { - DM9000_outw(DM9000_DATA_BASE, (word[1] << 8) | word[0]); - word_index = 0; - } - } - else - { - q = q->next; - pbuf_index = 0; - } - } - /* One byte could still be unsent */ - if (word_index == 1) - { - DM9000_outw(DM9000_DATA_BASE, word[0]); - } - } - - if (dm9000_device.packet_cnt == 0) - { - DM9000_TRACE("dm9000 tx: first packet\n"); - - dm9000_device.packet_cnt ++; - /* Set TX length to DM9000 */ - dm9000_io_write(DM9000_TXPLL, p->tot_len & 0xff); - dm9000_io_write(DM9000_TXPLH, (p->tot_len >> 8) & 0xff); - - /* Issue TX polling command */ - dm9000_io_write(DM9000_TCR, TCR_TXREQ); /* Cleared after TX complete */ - } - else - { - DM9000_TRACE("dm9000 tx: second packet\n"); - - dm9000_device.packet_cnt ++; - dm9000_device.queue_packet_len = p->tot_len; - } - - /* enable dm9000a interrupt */ - dm9000_io_write(DM9000_IMR, dm9000_device.imr_all); - - /* unlock DM9000 device */ - rt_sem_release(&sem_lock); - - /* wait ack */ - rt_sem_take(&sem_ack, RT_WAITING_FOREVER); - - DM9000_TRACE("dm9000 tx done\n"); - - return RT_EOK; -} - -/* reception packet. */ -struct pbuf *rt_dm9000_rx(rt_device_t dev) -{ - struct pbuf* p; - rt_uint32_t rxbyte; - - /* init p pointer */ - p = RT_NULL; - - /* lock DM9000 device */ - rt_sem_take(&sem_lock, RT_WAITING_FOREVER); - - /* Check packet ready or not */ - dm9000_io_read(DM9000_MRCMDX); /* Dummy read */ - rxbyte = DM9000_inb(DM9000_DATA_BASE); /* Got most updated data */ - if (rxbyte) - { - rt_uint16_t rx_status, rx_len; - rt_uint16_t* data; - - if (rxbyte > 1) - { - DM9000_TRACE("dm9000 rx: rx error, stop device\n"); - - dm9000_io_write(DM9000_RCR, 0x00); /* Stop Device */ - dm9000_io_write(DM9000_ISR, 0x80); /* Stop INT request */ - } - - /* A packet ready now & Get status/length */ - DM9000_outb(DM9000_IO_BASE, DM9000_MRCMD); - - rx_status = DM9000_inw(DM9000_DATA_BASE); - rx_len = DM9000_inw(DM9000_DATA_BASE); - - DM9000_TRACE("dm9000 rx: status %04x len %d\n", rx_status, rx_len); - - /* allocate buffer */ - p = pbuf_alloc(PBUF_LINK, rx_len, PBUF_RAM); - if (p != RT_NULL) - { - struct pbuf* q; - rt_int32_t len; - - for (q = p; q != RT_NULL; q= q->next) - { - data = (rt_uint16_t*)q->payload; - len = q->len; - - while (len > 0) - { - *data = DM9000_inw(DM9000_DATA_BASE); - data ++; - len -= 2; - } - } - DM9000_TRACE("\n"); - } - else - { - rt_uint16_t dummy; - - rt_kprintf("dm9000 rx: no pbuf\n"); - - /* no pbuf, discard data from DM9000 */ - data = &dummy; - while (rx_len) - { - *data = DM9000_inw(DM9000_DATA_BASE); - rx_len -= 2; - } - } - - if ((rx_status & 0xbf00) || (rx_len < 0x40) - || (rx_len > DM9000_PKT_MAX)) - { - rt_kprintf("rx error: status %04x\n", rx_status); - - if (rx_status & 0x100) - { - rt_kprintf("rx fifo error\n"); - } - if (rx_status & 0x200) - { - rt_kprintf("rx crc error\n"); - } - if (rx_status & 0x8000) - { - rt_kprintf("rx length error\n"); - } - if (rx_len > DM9000_PKT_MAX) - { - rt_kprintf("rx length too big\n"); - - /* RESET device */ - dm9000_io_write(DM9000_NCR, NCR_RST); - rt_thread_delay(1); /* delay 5ms */ - } - - /* it issues an error, release pbuf */ - if (p != RT_NULL) pbuf_free(p); - p = RT_NULL; - } - } - else - { - /* restore receive interrupt */ - dm9000_device.imr_all = IMR_PAR | IMR_PTM | IMR_PRM; - dm9000_io_write(DM9000_IMR, dm9000_device.imr_all); - } - - /* unlock DM9000 device */ - rt_sem_release(&sem_lock); - - return p; -} - -static void RCC_Configuration(void) -{ - /* enable gpiob port clock */ - RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOF | RCC_APB2Periph_GPIOE | RCC_APB2Periph_AFIO, ENABLE); -} - -static void NVIC_Configuration(void) -{ - NVIC_InitTypeDef NVIC_InitStructure; - - /* Enable the EXTI0 Interrupt */ - NVIC_InitStructure.NVIC_IRQChannel = EXTI4_IRQn; - NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1; - NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; - NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; - NVIC_Init(&NVIC_InitStructure); -} - -static void GPIO_Configuration() -{ - GPIO_InitTypeDef GPIO_InitStructure; - EXTI_InitTypeDef EXTI_InitStructure; - - /* configure PE5 as eth RST */ - GPIO_InitStructure.GPIO_Pin = GPIO_Pin_5; - GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP; - GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; - GPIO_Init(GPIOE,&GPIO_InitStructure); - GPIO_SetBits(GPIOE,GPIO_Pin_5); - //RST_1(); - - /* configure PE4 as external interrupt */ - GPIO_InitStructure.GPIO_Pin = GPIO_Pin_4; - GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; - GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IPD; - GPIO_Init(GPIOE, &GPIO_InitStructure); - - /* Connect DM9000 EXTI Line to GPIOE Pin 4 */ - GPIO_EXTILineConfig(GPIO_PortSourceGPIOE, GPIO_PinSource4); - - /* Configure DM9000 EXTI Line to generate an interrupt on falling edge */ - EXTI_InitStructure.EXTI_Line = EXTI_Line4; - EXTI_InitStructure.EXTI_Mode = EXTI_Mode_Interrupt; - EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Rising; - EXTI_InitStructure.EXTI_LineCmd = ENABLE; - EXTI_Init(&EXTI_InitStructure); - - /* Clear DM9000A EXTI line pending bit */ - EXTI_ClearITPendingBit(EXTI_Line4); -} - -void rt_hw_dm9000_init(void) -{ - RCC_Configuration(); - NVIC_Configuration(); - GPIO_Configuration(); - - rt_sem_init(&sem_ack, "tx_ack", 1, RT_IPC_FLAG_FIFO); - rt_sem_init(&sem_lock, "eth_lock", 1, RT_IPC_FLAG_FIFO); - - dm9000_device.type = TYPE_DM9000A; - dm9000_device.mode = DM9000_AUTO; - dm9000_device.packet_cnt = 0; - dm9000_device.queue_packet_len = 0; - - /* - * SRAM Tx/Rx pointer automatically return to start address, - * Packet Transmitted, Packet Received - */ - dm9000_device.imr_all = IMR_PAR | IMR_PTM | IMR_PRM; - - /* set mac address: (only for test) */ - /* oui 00-60-6E DAVICOM SEMICONDUCTOR, INC.*/ - dm9000_device.dev_addr[0] = 0x00; - dm9000_device.dev_addr[1] = 0x60; - dm9000_device.dev_addr[2] = 0x6E; - dm9000_device.dev_addr[3] = 0x11; - dm9000_device.dev_addr[4] = 0x22; - dm9000_device.dev_addr[5] = 0x33; - - dm9000_device.parent.parent.init = rt_dm9000_init; - dm9000_device.parent.parent.open = rt_dm9000_open; - dm9000_device.parent.parent.close = rt_dm9000_close; - dm9000_device.parent.parent.read = rt_dm9000_read; - dm9000_device.parent.parent.write = rt_dm9000_write; - dm9000_device.parent.parent.control = rt_dm9000_control; - dm9000_device.parent.parent.private = RT_NULL; - - dm9000_device.parent.eth_rx = rt_dm9000_rx; - dm9000_device.parent.eth_tx = rt_dm9000_tx; - - eth_device_init(&(dm9000_device.parent), "e0"); -} - -void dm9000(void) -{ - rt_kprintf("\n"); - rt_kprintf("NCR (0x00): %02x\n", dm9000_io_read(DM9000_NCR)); - rt_kprintf("NSR (0x01): %02x\n", dm9000_io_read(DM9000_NSR)); - rt_kprintf("TCR (0x02): %02x\n", dm9000_io_read(DM9000_TCR)); - rt_kprintf("TSRI (0x03): %02x\n", dm9000_io_read(DM9000_TSR1)); - rt_kprintf("TSRII (0x04): %02x\n", dm9000_io_read(DM9000_TSR2)); - rt_kprintf("RCR (0x05): %02x\n", dm9000_io_read(DM9000_RCR)); - rt_kprintf("RSR (0x06): %02x\n", dm9000_io_read(DM9000_RSR)); - rt_kprintf("ORCR (0x07): %02x\n", dm9000_io_read(DM9000_ROCR)); - rt_kprintf("CRR (0x2C): %02x\n", dm9000_io_read(DM9000_CHIPR)); - rt_kprintf("CSCR (0x31): %02x\n", dm9000_io_read(DM9000_CSCR)); - rt_kprintf("RCSSR (0x32): %02x\n", dm9000_io_read(DM9000_RCSSR)); - rt_kprintf("ISR (0xFE): %02x\n", dm9000_io_read(DM9000_ISR)); - rt_kprintf("IMR (0xFF): %02x\n", dm9000_io_read(DM9000_IMR)); - rt_kprintf("\n"); -} - -#ifdef RT_USING_FINSH -#include -FINSH_FUNCTION_EXPORT(dm9000, dm9000 register dump); -#endif diff --git a/bsp/stm32_radio/dm9000.h b/bsp/stm32_radio/dm9000.h deleted file mode 100644 index c99e6b120e..0000000000 --- a/bsp/stm32_radio/dm9000.h +++ /dev/null @@ -1,151 +0,0 @@ -#ifndef __DM9000_H__ -#define __DM9000_H__ - -#define DM9000_IO_BASE 0x6C000000 -#define DM9000_DATA_BASE 0x6C000008 - -#define DM9000_IO (*((volatile rt_uint16_t *) 0x6C000000)) // CMD = 0 -#define DM9000_DATA (*((volatile rt_uint16_t *) 0x6C000008)) // CMD = 1 - -#define DM9000_inb(r) (*(volatile rt_uint8_t *)r) -#define DM9000_outb(r, d) (*(volatile rt_uint8_t *)r = d) -#define DM9000_inw(r) (*(volatile rt_uint16_t *)r) -#define DM9000_outw(r, d) (*(volatile rt_uint16_t *)r = d) - -#define RST_1() GPIO_SetBits(GPIOE,GPIO_Pin_5) -#define RST_0() GPIO_ResetBits(GPIOE,GPIO_Pin_5) - -#define DM9000_ID 0x90000A46 /* DM9000 ID */ -#define DM9000_PKT_MAX 1536 /* Received packet max size */ -#define DM9000_PKT_RDY 0x01 /* Packet ready to receive */ - -#define DM9000_NCR 0x00 -#define DM9000_NSR 0x01 -#define DM9000_TCR 0x02 -#define DM9000_TSR1 0x03 -#define DM9000_TSR2 0x04 -#define DM9000_RCR 0x05 -#define DM9000_RSR 0x06 -#define DM9000_ROCR 0x07 -#define DM9000_BPTR 0x08 -#define DM9000_FCTR 0x09 -#define DM9000_FCR 0x0A -#define DM9000_EPCR 0x0B -#define DM9000_EPAR 0x0C -#define DM9000_EPDRL 0x0D -#define DM9000_EPDRH 0x0E -#define DM9000_WCR 0x0F - -#define DM9000_PAR 0x10 -#define DM9000_MAR 0x16 - -#define DM9000_GPCR 0x1e -#define DM9000_GPR 0x1f -#define DM9000_TRPAL 0x22 -#define DM9000_TRPAH 0x23 -#define DM9000_RWPAL 0x24 -#define DM9000_RWPAH 0x25 - -#define DM9000_VIDL 0x28 -#define DM9000_VIDH 0x29 -#define DM9000_PIDL 0x2A -#define DM9000_PIDH 0x2B - -#define DM9000_CHIPR 0x2C -#define DM9000_TCR2 0x2D -#define DM9000_OTCR 0x2E -#define DM9000_SMCR 0x2F - -#define DM9000_ETCR 0x30 /* early transmit control/status register */ -#define DM9000_CSCR 0x31 /* check sum control register */ -#define DM9000_RCSSR 0x32 /* receive check sum status register */ - -#define DM9000_MRCMDX 0xF0 -#define DM9000_MRCMD 0xF2 -#define DM9000_MRRL 0xF4 -#define DM9000_MRRH 0xF5 -#define DM9000_MWCMDX 0xF6 -#define DM9000_MWCMD 0xF8 -#define DM9000_MWRL 0xFA -#define DM9000_MWRH 0xFB -#define DM9000_TXPLL 0xFC -#define DM9000_TXPLH 0xFD -#define DM9000_ISR 0xFE -#define DM9000_IMR 0xFF - -#define CHIPR_DM9000A 0x19 -#define CHIPR_DM9000B 0x1B - -#define NCR_EXT_PHY (1<<7) -#define NCR_WAKEEN (1<<6) -#define NCR_FCOL (1<<4) -#define NCR_FDX (1<<3) -#define NCR_LBK (3<<1) -#define NCR_RST (1<<0) - -#define NSR_SPEED (1<<7) -#define NSR_LINKST (1<<6) -#define NSR_WAKEST (1<<5) -#define NSR_TX2END (1<<3) -#define NSR_TX1END (1<<2) -#define NSR_RXOV (1<<1) - -#define TCR_TJDIS (1<<6) -#define TCR_EXCECM (1<<5) -#define TCR_PAD_DIS2 (1<<4) -#define TCR_CRC_DIS2 (1<<3) -#define TCR_PAD_DIS1 (1<<2) -#define TCR_CRC_DIS1 (1<<1) -#define TCR_TXREQ (1<<0) - -#define TSR_TJTO (1<<7) -#define TSR_LC (1<<6) -#define TSR_NC (1<<5) -#define TSR_LCOL (1<<4) -#define TSR_COL (1<<3) -#define TSR_EC (1<<2) - -#define RCR_WTDIS (1<<6) -#define RCR_DIS_LONG (1<<5) -#define RCR_DIS_CRC (1<<4) -#define RCR_ALL (1<<3) -#define RCR_RUNT (1<<2) -#define RCR_PRMSC (1<<1) -#define RCR_RXEN (1<<0) - -#define RSR_RF (1<<7) -#define RSR_MF (1<<6) -#define RSR_LCS (1<<5) -#define RSR_RWTO (1<<4) -#define RSR_PLE (1<<3) -#define RSR_AE (1<<2) -#define RSR_CE (1<<1) -#define RSR_FOE (1<<0) - -#define FCTR_HWOT(ot) (( ot & 0xf ) << 4 ) -#define FCTR_LWOT(ot) ( ot & 0xf ) - -#define IMR_PAR (1<<7) -#define IMR_ROOM (1<<3) -#define IMR_ROM (1<<2) -#define IMR_PTM (1<<1) -#define IMR_PRM (1<<0) - -#define ISR_ROOS (1<<3) -#define ISR_ROS (1<<2) -#define ISR_PTS (1<<1) -#define ISR_PRS (1<<0) -#define ISR_CLR_STATUS (ISR_ROOS | ISR_ROS | ISR_PTS | ISR_PRS) - -#define EPCR_REEP (1<<5) -#define EPCR_WEP (1<<4) -#define EPCR_EPOS (1<<3) -#define EPCR_ERPRR (1<<2) -#define EPCR_ERPRW (1<<1) -#define EPCR_ERRE (1<<0) - -#define GPCR_GEP_CNTL (1<<0) - -void rt_hw_dm9000_init(void); - -#endif diff --git a/bsp/stm32_radio/fmt0371/fmt0371.c b/bsp/stm32_radio/fmt0371/fmt0371.c deleted file mode 100644 index dea9e26614..0000000000 --- a/bsp/stm32_radio/fmt0371/fmt0371.c +++ /dev/null @@ -1,209 +0,0 @@ -#include "fmt0371.h" -#include "stm32f10x.h" - -#define FSMC_GPIO_CONFIG - -//static void delay_ms(unsigned int dt) -//{ -// volatile unsigned int u; -// for (u=0;u>8; - LCD_DATA = data; -} - -rt_inline rt_uint16_t LCD_DATA16_READ(void) -{ - rt_uint16_t temp; - temp = (LCD_DATA << 8); - temp |= LCD_DATA; - return temp; -} -#define LCD_WR_CMD(a,b,c) LCD_ADDR = b;LCD_DATA16(c) -#define LCD_WR_REG(a) LCD_ADDR = a -#define LCD_WR_DATA8(a) LCD_DATA = a - -extern void ftm0371_port_init(void); -extern void ftm0371_init(void); - -/* -16λ(R5G6B5) -Äڴ淶Χ -0x02 D7:D0 XÆðʼµØÖ· -0x03 D8:D0 YÆðʼµØÖ· -0x04 D7:D0 X½áÊøµØÖ· -0x05 D8:D0 Y½áÊøµØÖ· -*/ - -#endif // FMT0371_H_INCLUDED diff --git a/bsp/stm32_radio/fsmc_nand.c b/bsp/stm32_radio/fsmc_nand.c deleted file mode 100644 index 2df5d50613..0000000000 --- a/bsp/stm32_radio/fsmc_nand.c +++ /dev/null @@ -1,467 +0,0 @@ -/******************** (C) COPYRIGHT 2008 STMicroelectronics ******************** -* File Name : fsmc_nand.c -* Author : MCD Application Team -* Version : V2.0.3 -* Date : 09/22/2008 -* Description : This file provides a set of functions needed to drive the -* NAND512W3A2 memory mounted on STM3210E-EVAL board. -******************************************************************************** -* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS -* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. -* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, -* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE -* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING -* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ -/* Includes ------------------------------------------------------------------*/ -#include "fsmc_nand.h" - -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ - -#define FSMC_Bank_NAND FSMC_Bank2_NAND -#define Bank_NAND_ADDR Bank2_NAND_ADDR -#define Bank2_NAND_ADDR ((u32)0x70000000) - -/* Private macro -------------------------------------------------------------*/ -#define ROW_ADDRESS (Address.Page + (Address.Block + (Address.Zone * NAND_ZONE_SIZE)) * NAND_BLOCK_SIZE) - -/* Private variables ---------------------------------------------------------*/ -/* Private function prototypes -----------------------------------------------*/ -/* Private functions ---------------------------------------------------------*/ -/******************************************************************************* -* Function Name : FSMC_NAND_Init -* Description : Configures the FSMC and GPIOs to interface with the NAND memory. -* This function must be called before any write/read operation -* on the NAND. -* Input : None -* Output : None -* Return : None -*******************************************************************************/ -void FSMC_NAND_Init(void) -{ - FSMC_NANDInitTypeDef FSMC_NANDInitStructure; - FSMC_NAND_PCCARDTimingInitTypeDef p; - - /*-- FSMC Configuration ------------------------------------------------------*/ - p.FSMC_SetupTime = 0x1; - p.FSMC_WaitSetupTime = 0x3; - p.FSMC_HoldSetupTime = 0x2; - p.FSMC_HiZSetupTime = 0x1; - - FSMC_NANDInitStructure.FSMC_Bank = FSMC_Bank2_NAND; - FSMC_NANDInitStructure.FSMC_Waitfeature = FSMC_Waitfeature_Enable; - FSMC_NANDInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_8b; - FSMC_NANDInitStructure.FSMC_ECC = FSMC_ECC_Enable; - FSMC_NANDInitStructure.FSMC_ECCPageSize = FSMC_ECCPageSize_512Bytes; -// FSMC_NANDInitStructure.FSMC_AddressLowMapping = FSMC_AddressLowMapping_Direct; - FSMC_NANDInitStructure.FSMC_TCLRSetupTime = 0x00; - FSMC_NANDInitStructure.FSMC_TARSetupTime = 0x00; - FSMC_NANDInitStructure.FSMC_CommonSpaceTimingStruct = &p; - FSMC_NANDInitStructure.FSMC_AttributeSpaceTimingStruct = &p; - - FSMC_NANDInit(&FSMC_NANDInitStructure); - - /* FSMC NAND Bank Cmd Test */ - FSMC_NANDCmd(FSMC_Bank2_NAND, ENABLE); -} - -/****************************************************************************** -* Function Name : FSMC_NAND_ReadID -* Description : Reads NAND memory's ID. -* Input : - NAND_ID: pointer to a NAND_IDTypeDef structure which will hold -* the Manufacturer and Device ID. -* Output : None -* Return : None -*******************************************************************************/ -void FSMC_NAND_ReadID(NAND_IDTypeDef* NAND_ID) -{ - u32 data = 0; - - /* Send Command to the command area */ - *(vu8 *)(Bank_NAND_ADDR | CMD_AREA) = 0x90; - *(vu8 *)(Bank_NAND_ADDR | ADDR_AREA) = 0x00; - - /* Sequence to read ID from NAND flash */ - data = *(vu32 *)(Bank_NAND_ADDR | DATA_AREA); - - NAND_ID->Maker_ID = ADDR_1st_CYCLE (data); - NAND_ID->Device_ID = ADDR_2nd_CYCLE (data); - NAND_ID->Third_ID = ADDR_3rd_CYCLE (data); - NAND_ID->Fourth_ID = ADDR_4th_CYCLE (data); -} - -/****************************************************************************** -* Function Name : FSMC_NAND_WriteSmallPage -* Description : This routine is for writing one or several 512 Bytes Page size. -* Input : - pBuffer: pointer on the Buffer containing data to be written -* - Address: First page address -* - NumPageToWrite: Number of page to write -* Output : None -* Return : New status of the NAND operation. This parameter can be: -* - NAND_TIMEOUT_ERROR: when the previous operation generate -* a Timeout error -* - NAND_READY: when memory is ready for the next operation -* And the new status of the increment address operation. It can be: -* - NAND_VALID_ADDRESS: When the new address is valid address -* - NAND_INVALID_ADDRESS: When the new address is invalid address -*******************************************************************************/ -u32 FSMC_NAND_WriteSmallPage(u8 *pBuffer, NAND_ADDRESS Address, u32 NumPageToWrite) -{ - u32 index = 0x00, numpagewritten = 0x00, addressstatus = NAND_VALID_ADDRESS; - u32 status = NAND_READY, size = 2048; - - while((NumPageToWrite != 0x00) && (addressstatus == NAND_VALID_ADDRESS) && (status == NAND_READY)) - { - /* Page write command and address */ - *(vu8 *)(Bank_NAND_ADDR | CMD_AREA) = NAND_CMD_AREA_A; - *(vu8 *)(Bank_NAND_ADDR | CMD_AREA) = NAND_CMD_WRITE0; - - *(vu8 *)(Bank_NAND_ADDR | ADDR_AREA) = ADDR_1st_CYCLE(ROW_ADDRESS); - *(vu8 *)(Bank_NAND_ADDR | ADDR_AREA) = ADDR_2nd_CYCLE(ROW_ADDRESS); - *(vu8 *)(Bank_NAND_ADDR | ADDR_AREA) = ADDR_3rd_CYCLE(ROW_ADDRESS); - *(vu8 *)(Bank_NAND_ADDR | ADDR_AREA) = ADDR_4th_CYCLE(ROW_ADDRESS); - *(vu8 *)(Bank_NAND_ADDR | ADDR_AREA) = ADDR_5fh_CYCLE(ROW_ADDRESS); - - /* Calculate the size */ - size = NAND_PAGE_SIZE + (NAND_PAGE_SIZE * numpagewritten); - - - /* Write data */ - for(; index < size; index++) - { - *(vu8 *)(Bank_NAND_ADDR | DATA_AREA) = pBuffer[index]; - } - - *(vu8 *)(Bank_NAND_ADDR | CMD_AREA) = NAND_CMD_WRITE_TRUE1; - - /* Check status for successful operation */ - status = FSMC_NAND_GetStatus(); - - if(status == NAND_READY) - { - numpagewritten++; - - NumPageToWrite--; - - /* Calculate Next small page Address */ - addressstatus = FSMC_NAND_AddressIncrement(&Address); - } - } - - return (status | addressstatus); -} - -/****************************************************************************** -* Function Name : FSMC_NAND_ReadSmallPage -* Description : This routine is for sequential read from one or several -* 512 Bytes Page size. -* Input : - pBuffer: pointer on the Buffer to fill -* - Address: First page address -* - NumPageToRead: Number of page to read -* Output : None -* Return : New status of the NAND operation. This parameter can be: -* - NAND_TIMEOUT_ERROR: when the previous operation generate -* a Timeout error -* - NAND_READY: when memory is ready for the next operation -* And the new status of the increment address operation. It can be: -* - NAND_VALID_ADDRESS: When the new address is valid address -* - NAND_INVALID_ADDRESS: When the new address is invalid address -*******************************************************************************/ -u32 FSMC_NAND_ReadSmallPage(u8 *pBuffer, NAND_ADDRESS Address, u32 NumPageToRead) -{ - u32 index = 0x00, numpageread = 0x00, addressstatus = NAND_VALID_ADDRESS; - u32 status = NAND_READY, size = 2048, i = 0; - - /* Calculate the size */ - size = NAND_PAGE_SIZE + (NAND_PAGE_SIZE * numpageread); - - while((NumPageToRead != 0x0) && (addressstatus == NAND_VALID_ADDRESS)) - { - /* Page Read command and page address */ - *(vu8 *)(Bank_NAND_ADDR | CMD_AREA) = NAND_CMD_AREA_A; - - *(vu8 *)(Bank_NAND_ADDR | ADDR_AREA) = ADDR_1st_CYCLE(ROW_ADDRESS); - *(vu8 *)(Bank_NAND_ADDR | ADDR_AREA) = ADDR_2nd_CYCLE(ROW_ADDRESS); - *(vu8 *)(Bank_NAND_ADDR | ADDR_AREA) = ADDR_3rd_CYCLE(ROW_ADDRESS); - *(vu8 *)(Bank_NAND_ADDR | ADDR_AREA) = ADDR_4th_CYCLE(ROW_ADDRESS); - *(vu8 *)(Bank_NAND_ADDR | ADDR_AREA) = ADDR_5fh_CYCLE(ROW_ADDRESS); - - *(vu8 *)(Bank_NAND_ADDR | CMD_AREA) = NAND_CMD_AREA_TRUE1; - for(i = 0; i <= 10000; i++); - - /* Get Data into Buffer */ - for(; index < size; index++) - { - pBuffer[index]= *(vu8 *)(Bank_NAND_ADDR | DATA_AREA); - } - - numpageread++; - - NumPageToRead--; - - /* Calculate page address */ - addressstatus = FSMC_NAND_AddressIncrement(&Address); - } - - status = FSMC_NAND_GetStatus(); - - return (status | addressstatus); -} - -/****************************************************************************** -* Function Name : FSMC_NAND_WriteSpareArea -* Description : This routine write the spare area information for the specified -* pages addresses. -* Input : - pBuffer: pointer on the Buffer containing data to be written -* - Address: First page address -* - NumSpareAreaTowrite: Number of Spare Area to write -* Output : None -* Return : New status of the NAND operation. This parameter can be: -* - NAND_TIMEOUT_ERROR: when the previous operation generate -* a Timeout error -* - NAND_READY: when memory is ready for the next operation -* And the new status of the increment address operation. It can be: -* - NAND_VALID_ADDRESS: When the new address is valid address -* - NAND_INVALID_ADDRESS: When the new address is invalid address -*******************************************************************************/ -u32 FSMC_NAND_WriteSpareArea(u8 *pBuffer, NAND_ADDRESS Address, u32 NumSpareAreaTowrite) -{ - u32 index = 0x00, numsparesreawritten = 0x00, addressstatus = NAND_VALID_ADDRESS; - u32 status = NAND_READY, size = 0x00; - - while((NumSpareAreaTowrite != 0x00) && (addressstatus == NAND_VALID_ADDRESS) && (status == NAND_READY)) - { - /* Page write Spare area command and address */ - *(vu8 *)(Bank_NAND_ADDR | CMD_AREA) = NAND_CMD_AREA_C; - *(vu8 *)(Bank_NAND_ADDR | CMD_AREA) = NAND_CMD_WRITE0; - - *(vu8 *)(Bank_NAND_ADDR | ADDR_AREA) = ADDR_1st_CYCLE(ROW_ADDRESS); - *(vu8 *)(Bank_NAND_ADDR | ADDR_AREA) = ADDR_2nd_CYCLE(ROW_ADDRESS); - *(vu8 *)(Bank_NAND_ADDR | ADDR_AREA) = ADDR_3rd_CYCLE(ROW_ADDRESS); - *(vu8 *)(Bank_NAND_ADDR | ADDR_AREA) = ADDR_4th_CYCLE(ROW_ADDRESS); - *(vu8 *)(Bank_NAND_ADDR | ADDR_AREA) = ADDR_5fh_CYCLE(ROW_ADDRESS); - /* Calculate the size */ - size = NAND_SPARE_AREA_SIZE + (NAND_SPARE_AREA_SIZE * numsparesreawritten); - - /* Write the data */ - for(; index < size; index++) - { - *(vu8 *)(Bank_NAND_ADDR | DATA_AREA) = pBuffer[index]; - } - - *(vu8 *)(Bank_NAND_ADDR | CMD_AREA) = NAND_CMD_WRITE_TRUE1; - - /* Check status for successful operation */ - status = FSMC_NAND_GetStatus(); - - if(status == NAND_READY) - { - numsparesreawritten++; - - NumSpareAreaTowrite--; - - /* Calculate Next page Address */ - addressstatus = FSMC_NAND_AddressIncrement(&Address); - } - } - - return (status | addressstatus); -} - -/****************************************************************************** -* Function Name : FSMC_NAND_ReadSpareArea -* Description : This routine read the spare area information from the specified -* pages addresses. -* Input : - pBuffer: pointer on the Buffer to fill -* - Address: First page address -* - NumSpareAreaToRead: Number of Spare Area to read -* Output : None -* Return : New status of the NAND operation. This parameter can be: -* - NAND_TIMEOUT_ERROR: when the previous operation generate -* a Timeout error -* - NAND_READY: when memory is ready for the next operation -* And the new status of the increment address operation. It can be: -* - NAND_VALID_ADDRESS: When the new address is valid address -* - NAND_INVALID_ADDRESS: When the new address is invalid address -*******************************************************************************/ -u32 FSMC_NAND_ReadSpareArea(u8 *pBuffer, NAND_ADDRESS Address, u32 NumSpareAreaToRead) -{ - u32 numsparearearead = 0x00, index = 0x00, addressstatus = NAND_VALID_ADDRESS; - u32 status = NAND_READY, size = 0x00; - - while((NumSpareAreaToRead != 0x0) && (addressstatus == NAND_VALID_ADDRESS)) - { - /* Page Read command and page address */ - *(vu8 *)(Bank_NAND_ADDR | CMD_AREA) = NAND_CMD_AREA_C; - - *(vu8 *)(Bank_NAND_ADDR | ADDR_AREA) = ADDR_1st_CYCLE(ROW_ADDRESS); - *(vu8 *)(Bank_NAND_ADDR | ADDR_AREA) = ADDR_2nd_CYCLE(ROW_ADDRESS); - *(vu8 *)(Bank_NAND_ADDR | ADDR_AREA) = ADDR_3rd_CYCLE(ROW_ADDRESS); - *(vu8 *)(Bank_NAND_ADDR | ADDR_AREA) = ADDR_4th_CYCLE(ROW_ADDRESS); - *(vu8 *)(Bank_NAND_ADDR | ADDR_AREA) = ADDR_5fh_CYCLE(ROW_ADDRESS); - - *(vu8 *)(Bank_NAND_ADDR | CMD_AREA) = NAND_CMD_AREA_TRUE1; - - /* Data Read */ - size = NAND_SPARE_AREA_SIZE + (NAND_SPARE_AREA_SIZE * numsparearearead); - - /* Get Data into Buffer */ - for ( ; index < size; index++) - { - pBuffer[index] = *(vu8 *)(Bank_NAND_ADDR | DATA_AREA); - } - - numsparearearead++; - - NumSpareAreaToRead--; - - /* Calculate page address */ - addressstatus = FSMC_NAND_AddressIncrement(&Address); - } - - status = FSMC_NAND_GetStatus(); - - return (status | addressstatus); -} - -/****************************************************************************** -* Function Name : FSMC_NAND_EraseBlock -* Description : This routine erase complete block from NAND FLASH -* Input : - Address: Any address into block to be erased -* Output : None -* Return : New status of the NAND operation. This parameter can be: -* - NAND_TIMEOUT_ERROR: when the previous operation generate -* a Timeout error -* - NAND_READY: when memory is ready for the next operation -*******************************************************************************/ -u32 FSMC_NAND_EraseBlock(NAND_ADDRESS Address) -{ - *(vu8 *)(Bank_NAND_ADDR | CMD_AREA) = NAND_CMD_ERASE0; - - *(vu8 *)(Bank_NAND_ADDR | ADDR_AREA) = ADDR_1st_CYCLE(ROW_ADDRESS); - *(vu8 *)(Bank_NAND_ADDR | ADDR_AREA) = ADDR_2nd_CYCLE(ROW_ADDRESS); - *(vu8 *)(Bank_NAND_ADDR | ADDR_AREA) = ADDR_3rd_CYCLE(ROW_ADDRESS); - *(vu8 *)(Bank_NAND_ADDR | ADDR_AREA) = ADDR_4th_CYCLE(ROW_ADDRESS); - *(vu8 *)(Bank_NAND_ADDR | ADDR_AREA) = ADDR_5fh_CYCLE(ROW_ADDRESS); - - *(vu8 *)(Bank_NAND_ADDR | CMD_AREA) = NAND_CMD_ERASE1; - - return (FSMC_NAND_GetStatus()); -} - -/****************************************************************************** -* Function Name : FSMC_NAND_Reset -* Description : This routine reset the NAND FLASH -* Input : None -* Output : None -* Return : NAND_READY -*******************************************************************************/ -u32 FSMC_NAND_Reset(void) -{ - *(vu8 *)(Bank_NAND_ADDR | CMD_AREA) = NAND_CMD_RESET; - - return (NAND_READY); -} - -/****************************************************************************** -* Function Name : FSMC_NAND_GetStatus -* Description : Get the NAND operation status -* Input : None -* Output : None -* Return : New status of the NAND operation. This parameter can be: -* - NAND_TIMEOUT_ERROR: when the previous operation generate -* a Timeout error -* - NAND_READY: when memory is ready for the next operation -*******************************************************************************/ -u32 FSMC_NAND_GetStatus(void) -{ - u32 timeout = 0x1000000, status = NAND_READY; - - status = FSMC_NAND_ReadStatus(); - - /* Wait for a NAND operation to complete or a TIMEOUT to occur */ - while ((status != NAND_READY) &&( timeout != 0x00)) - { - status = FSMC_NAND_ReadStatus(); - timeout --; - } - - if(timeout == 0x00) - { - status = NAND_TIMEOUT_ERROR; - } - - /* Return the operation status */ - return (status); -} -/****************************************************************************** -* Function Name : FSMC_NAND_ReadStatus -* Description : Reads the NAND memory status using the Read status command -* Input : None -* Output : None -* Return : The status of the NAND memory. This parameter can be: -* - NAND_BUSY: when memory is busy -* - NAND_READY: when memory is ready for the next operation -* - NAND_ERROR: when the previous operation gererates error -*******************************************************************************/ -u32 FSMC_NAND_ReadStatus(void) -{ - u32 data = 0x00, status = NAND_BUSY; - - /* Read status operation ------------------------------------ */ - *(vu8 *)(Bank_NAND_ADDR | CMD_AREA) = NAND_CMD_STATUS; - data = *(vu8 *)(Bank_NAND_ADDR); - - if((data & NAND_ERROR) == NAND_ERROR) - { - status = NAND_ERROR; - } - else if((data & NAND_READY) == NAND_READY) - { - status = NAND_READY; - } - else - { - status = NAND_BUSY; - } - - return (status); -} - -/****************************************************************************** -* Function Name : NAND_AddressIncrement -* Description : Increment the NAND memory address -* Input : - Address: address to be incremented. -* Output : None -* Return : The new status of the increment address operation. It can be: -* - NAND_VALID_ADDRESS: When the new address is valid address -* - NAND_INVALID_ADDRESS: When the new address is invalid address -*******************************************************************************/ -u32 FSMC_NAND_AddressIncrement(NAND_ADDRESS* Address) -{ - u32 status = NAND_VALID_ADDRESS; - - Address->Page++; - - if(Address->Page == NAND_BLOCK_SIZE) - { - Address->Page = 0; - Address->Block++; - - if(Address->Block == NAND_ZONE_SIZE) - { - Address->Block = 0; - Address->Zone++; - - if(Address->Zone == NAND_MAX_ZONE) - { - status = NAND_INVALID_ADDRESS; - } - } - } - - return (status); -} - -/******************* (C) COPYRIGHT 2008 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/fsmc_nand.h b/bsp/stm32_radio/fsmc_nand.h deleted file mode 100644 index 9fa06239ed..0000000000 --- a/bsp/stm32_radio/fsmc_nand.h +++ /dev/null @@ -1,106 +0,0 @@ -/******************** (C) COPYRIGHT 2008 STMicroelectronics ******************** -* File Name : fsmc_nand.h -* Author : MCD Application Team -* Version : V2.0.3 -* Date : 09/22/2008 -* Description : Header for fsmc_nand.c file. -******************************************************************************** -* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS -* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. -* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, -* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE -* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING -* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __FSMC_NAND_H -#define __FSMC_NAND_H - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x.h" - -/* Exported types ------------------------------------------------------------*/ -typedef struct -{ - u8 Maker_ID; - u8 Device_ID; - u8 Third_ID; - u8 Fourth_ID; -}NAND_IDTypeDef; - -typedef struct -{ - u16 Zone; - u16 Block; - u16 Page; -} NAND_ADDRESS; - -/* Exported constants --------------------------------------------------------*/ -/* NAND Area definition for STM3210E-EVAL Board RevD */ -#define CMD_AREA (u32)(1<<16) /* A16 = CLE high */ -#define ADDR_AREA (u32)(1<<17) /* A17 = ALE high */ - -#define DATA_AREA ((u32)0x00000000) - -/* FSMC NAND memory command */ -#define NAND_CMD_AREA_A ((u8)0x00) -#define NAND_CMD_AREA_B ((u8)0x01) -#define NAND_CMD_AREA_C ((u8)0x50) -#define NAND_CMD_AREA_TRUE1 ((u8)0x30) - -#define NAND_CMD_WRITE0 ((u8)0x80) -#define NAND_CMD_WRITE_TRUE1 ((u8)0x10) - -#define NAND_CMD_ERASE0 ((u8)0x60) -#define NAND_CMD_ERASE1 ((u8)0xD0) - -#define NAND_CMD_READID ((u8)0x90) -#define NAND_CMD_STATUS ((u8)0x70) -#define NAND_CMD_LOCK_STATUS ((u8)0x7A) -#define NAND_CMD_RESET ((u8)0xFF) - -/* NAND memory status */ -#define NAND_VALID_ADDRESS ((u32)0x00000100) -#define NAND_INVALID_ADDRESS ((u32)0x00000200) -#define NAND_TIMEOUT_ERROR ((u32)0x00000400) -#define NAND_BUSY ((u32)0x00000000) -#define NAND_ERROR ((u32)0x00000001) -#define NAND_READY ((u32)0x00000040) - -/* FSMC NAND memory parameters */ -//#define NAND_PAGE_SIZE ((u16)0x0200) /* 512 bytes per page w/o Spare Area */ -//#define NAND_BLOCK_SIZE ((u16)0x0020) /* 32x512 bytes pages per block */ -//#define NAND_ZONE_SIZE ((u16)0x0400) /* 1024 Block per zone */ -//#define NAND_SPARE_AREA_SIZE ((u16)0x0010) /* last 16 bytes as spare area */ -//#define NAND_MAX_ZONE ((u16)0x0004) /* 4 zones of 1024 block */ - -/* FSMC NAND memory parameters */ -#define NAND_PAGE_SIZE ((u16)0x0800) /* 2K bytes per page w/o Spare Area */ -#define NAND_BLOCK_SIZE ((u16)0x0040) /* 64x2K bytes pages per block */ -#define NAND_ZONE_SIZE ((u16)0x0400) /* 1024 Block per zone */ -#define NAND_SPARE_AREA_SIZE ((u16)0x0040) /* last 64 bytes as spare area */ -#define NAND_MAX_ZONE ((u16)0x0002) /* 1 zones of 2048 block */ - -/* FSMC NAND memory address computation */ -#define ADDR_1st_CYCLE(ADDR) (u8)((ADDR)& 0xFF) /* 1st addressing cycle */ -#define ADDR_2nd_CYCLE(ADDR) (u8)(((ADDR)& 0xFF00) >> 8) /* 2nd addressing cycle */ -#define ADDR_3rd_CYCLE(ADDR) (u8)(((ADDR)& 0xFF0000) >> 16) /* 3rd addressing cycle */ -#define ADDR_4th_CYCLE(ADDR) (u8)(((ADDR)& 0xFF000000) >> 24) /* 4th addressing cycle */ -#define ADDR_5fh_CYCLE(ADDR) (u8)(((ADDR)& 0xFF00000000) >> 32) /* 4th addressing cycle */ -/* Exported macro ------------------------------------------------------------*/ -/* Exported functions ------------------------------------------------------- */ -void FSMC_NAND_Init(void); -void FSMC_NAND_ReadID(NAND_IDTypeDef* NAND_ID); -u32 FSMC_NAND_WriteSmallPage(u8 *pBuffer, NAND_ADDRESS Address, u32 NumPageToWrite); -u32 FSMC_NAND_ReadSmallPage (u8 *pBuffer, NAND_ADDRESS Address, u32 NumPageToRead); -u32 FSMC_NAND_WriteSpareArea(u8 *pBuffer, NAND_ADDRESS Address, u32 NumSpareAreaTowrite); -u32 FSMC_NAND_ReadSpareArea(u8 *pBuffer, NAND_ADDRESS Address, u32 NumSpareAreaToRead); -u32 FSMC_NAND_EraseBlock(NAND_ADDRESS Address); -u32 FSMC_NAND_Reset(void); -u32 FSMC_NAND_GetStatus(void); -u32 FSMC_NAND_ReadStatus(void); -u32 FSMC_NAND_AddressIncrement(NAND_ADDRESS* Address); - -#endif /* __FSMC_NAND_H */ - -/******************* (C) COPYRIGHT 2008 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/fsmc_sram.c b/bsp/stm32_radio/fsmc_sram.c deleted file mode 100644 index 538308d1bd..0000000000 --- a/bsp/stm32_radio/fsmc_sram.c +++ /dev/null @@ -1,74 +0,0 @@ -/******************** (C) COPYRIGHT 2008 STMicroelectronics ******************** -* File Name : fsmc_sram.c -* Author : MCD Application Team -* Version : V2.0.3 -* Date : 09/22/2008 -* Description : This file provides a set of functions needed to drive the -* IS61WV51216BLL SRAM memory mounted on STM3210E-EVAL board. -******************************************************************************** -* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS -* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. -* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, -* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE -* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING -* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ -#include "stm32f10x.h" -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ -#define Bank1_SRAM3_ADDR ((u32)0x68000000) - -/* Private macro -------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/* Private function prototypes -----------------------------------------------*/ -/* Private functions ---------------------------------------------------------*/ - -/******************************************************************************* -* Function Name : FSMC_SRAM_Init -* Description : Configures the FSMC and GPIOs to interface with the SRAM memory. -* This function must be called before any write/read operation -* on the SRAM. -* Input : None -* Output : None -* Return : None -*******************************************************************************/ -void FSMC_SRAM_Init(void) -{ - FSMC_NORSRAMInitTypeDef FSMC_NORSRAMInitStructure; - FSMC_NORSRAMTimingInitTypeDef p; - - /*-- FSMC Configuration ------------------------------------------------------*/ - p.FSMC_AddressSetupTime = 0; - p.FSMC_AddressHoldTime = 0; - p.FSMC_DataSetupTime = 2; - p.FSMC_BusTurnAroundDuration = 0; - p.FSMC_CLKDivision = 0; - p.FSMC_DataLatency = 0; - p.FSMC_AccessMode = FSMC_AccessMode_A; - - FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM3; - FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable; - FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_SRAM; - FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b; - FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable; - FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low; - FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable; - FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState; - FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable; - FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable; - FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable; - FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable; - FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p; - FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p; - - FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure); - - FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM4; - FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure); - - /* Enable FSMC Bank1_SRAM Bank */ - FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM3, ENABLE); - FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM4, ENABLE); -} - -/******************* (C) COPYRIGHT 2008 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/http.c b/bsp/stm32_radio/http.c deleted file mode 100644 index 7afb1b7d42..0000000000 --- a/bsp/stm32_radio/http.c +++ /dev/null @@ -1,671 +0,0 @@ -/* - * http client for RT-Thread - */ -#include "http.h" - -#include - -#include -#include - -const char _http_get[] = "GET %s HTTP/1.0\r\nHost: %s:%d\r\nUser-Agent: RT-Thread HTTP Agent\r\n\r\n"; -const char _shoutcast_get[] = "GET %s HTTP/1.0\r\nHost: %s:%d\r\nUser-Agent: RT-Thread HTTP Agent\r\nIcy-MetaData: 1\r\nConnection: close\r\n\r\n"; - -extern long int strtol(const char *nptr, char **endptr, int base); - -// -// This function will parse the Content-Length header line and return the file size -// -int http_parse_content_length(char *mime_buf) -{ - char *line; - - line = strstr(mime_buf, "CONTENT-LENGTH:"); - line += strlen("CONTENT-LENGTH:"); - - // Advance past any whitepace characters - while((*line == ' ') || (*line == '\t')) line++; - - return (int)strtol(line, RT_NULL, 10); -} - -// -// This function will parse the initial response header line and return 0 for a "200 OK", -// or return the error code in the event of an error (such as 404 - not found) -// -int http_is_error_header(char *mime_buf) -{ - char *line; - int i; - int code; - - line = strstr(mime_buf, "HTTP/1."); - line += strlen("HTTP/1."); - - // Advance past minor protocol version number - line++; - - // Advance past any whitespace characters - while((*line == ' ') || (*line == '\t')) line++; - - // Terminate string after status code - for(i = 0; ((line[i] != ' ') && (line[i] != '\t')); i++); - line[i] = '\0'; - - code = (int)strtol(line, RT_NULL, 10); - if( code == 200 ) - return 0; - else - return code; -} - -int shoutcast_is_error_header(char *mime_buf) -{ - char *line; - int i; - int code; - - line = strstr(mime_buf, "ICY"); - line += strlen("ICY"); - - // Advance past minor protocol version number - line++; - - // Advance past any whitespace characters - while((*line == ' ') || (*line == '\t')) line++; - - // Terminate string after status code - for(i = 0; ((line[i] != ' ') && (line[i] != '\t')); i++); - line[i] = '\0'; - - code = (int)strtol(line, RT_NULL, 10); - if( code == 200 ) - return 0; - else - return code; -} - -// -// When a request has been sent, we can expect mime headers to be -// before the data. We need to read exactly to the end of the headers -// and no more data. This readline reads a single char at a time. -// -int http_read_line( int socket, char * buffer, int size ) -{ - char * ptr = buffer; - int count = 0; - int rc; - - // Keep reading until we fill the buffer. - while ( count < size ) - { - rc = recv( socket, ptr, 1, 0 ); - if ( rc <= 0 ) return rc; - - if ((*ptr == '\n')) - { - ptr ++; - count++; - break; - } - - // increment after check for cr. Don't want to count the cr. - count++; - ptr++; - } - - // Terminate string - *ptr = '\0'; - - // return how many bytes read. - return count; -} - -/* - * resolve server address - * @param server the server sockaddress - * @param url the input URL address, for example, http://www.rt-thread.org/index.html - * @param host_addr the buffer pointer to save server host address - * @param request the pointer to point the request url, for example, /index.html - * - * @return 0 on resolve server address OK, others failed - */ -int http_resolve_address(struct sockaddr_in *server, const char * url, char *host_addr, char** request) -{ - char *ptr; - char port[6] = "80"; /* default port of 80(HTTP) */ - int i = 0, is_domain; - struct hostent *hptr; - - /* strip http: */ - ptr = strchr(url, ':'); - if (ptr != NULL) - { - url = ptr + 1; - } - - /* URL must start with double forward slashes. */ - if((url[0] != '/') || (url[1] != '/' )) return -1; - - url += 2; is_domain = 0; - i = 0; - /* allow specification of port in URL like http://www.server.net:8080/ */ - while (*url) - { - if (*url == '/') break; - if (*url == ':') - { - unsigned char w; - for (w = 0; w < 5 && url[w + 1] != '/' && url[w + 1] != '\0'; w ++) - port[w] = url[w + 1]; - - /* get port ok */ - port[w] = '\0'; - url += w + 1; - break; - } - - if ((*url < '0' || *url > '9') && *url != '.') - is_domain = 1; - host_addr[i++] = *url; - url ++; - } - *request = (char*)url; - - /* get host addr ok. */ - host_addr[i] = '\0'; - - if (is_domain) - { - /* resolve the host name. */ - hptr = gethostbyname(host_addr); - if(hptr == 0) - { - rt_kprintf("HTTP: failed to resolve domain '%s'\n", host_addr); - return -1; - } - memcpy(&server->sin_addr, *hptr->h_addr_list, sizeof(server->sin_addr)); - } - else - { - inet_aton(host_addr, (struct in_addr*)&(server->sin_addr)); - } - /* set the port */ - server->sin_port = htons((int) strtol(port, NULL, 10)); - server->sin_family = AF_INET; - - return 0; -} - -// -// This is the main HTTP client connect work. Makes the connection -// and handles the protocol and reads the return headers. Needs -// to leave the stream at the start of the real data. -// -static int http_connect(struct http_session* session, - struct sockaddr_in * server, char *host_addr, const char *url) -{ - int socket_handle; - int peer_handle; - int rc; - char mimeBuffer[100]; - - if((socket_handle = socket( PF_INET, SOCK_STREAM, IPPROTO_TCP )) < 0) - { - rt_kprintf( "HTTP: SOCKET FAILED\n" ); - return -1; - } - - peer_handle = connect( socket_handle, (struct sockaddr *) server, sizeof(*server)); - if ( peer_handle < 0 ) - { - rt_kprintf( "HTTP: CONNECT FAILED %i\n", peer_handle ); - return -1; - } - - { - char *buf; - rt_uint32_t length; - - buf = rt_malloc (512); - if (*url) - length = rt_snprintf(buf, 512, _http_get, url, host_addr, server->sin_port); - else - length = rt_snprintf(buf, 512, _http_get, "/", host_addr, server->sin_port); - - rc = send(peer_handle, buf, length, 0); - rt_kprintf("HTTP request:\n%s", buf); - - /* release buffer */ - rt_free(buf); - } - - // We now need to read the header information - while ( 1 ) - { - int i; - - // read a line from the header information. - rc = http_read_line( peer_handle, mimeBuffer, 100 ); - rt_kprintf(">> %s\n", mimeBuffer); - - if ( rc < 0 ) return rc; - - // End of headers is a blank line. exit. - if (rc == 0) break; - if ((rc == 2) && (mimeBuffer[0] == '\r')) break; - - // Convert mimeBuffer to upper case, so we can do string comps - for(i = 0; i < strlen(mimeBuffer); i++) - mimeBuffer[i] = toupper(mimeBuffer[i]); - - if(strstr(mimeBuffer, "HTTP/1.")) // First line of header, contains status code. Check for an error code - { - rc = http_is_error_header(mimeBuffer); - if(rc) - { - rt_kprintf("HTTP: status code = %d!\n", rc); - return -rc; - } - } - - if(strstr(mimeBuffer, "CONTENT-LENGTH:")) - { - session->size = http_parse_content_length(mimeBuffer); - rt_kprintf("size = %d\n", session->size); - } - } - - // We've sent the request, and read the headers. SockHandle is - // now at the start of the main data read for a file io read. - return peer_handle; -} - -struct http_session* http_session_open(char* url) -{ - int peer_handle = 0; - struct sockaddr_in server; - char *request, host_addr[32]; - struct http_session* session; - - session = (struct http_session*) rt_malloc(sizeof(struct http_session)); - if(session == RT_NULL) return RT_NULL; - - session->size = 0; - session->position = 0; - - /* Check valid IP address and URL */ - if(http_resolve_address(&server, url, &host_addr[0], &request) != 0) - { - rt_free(session); - return RT_NULL; - } - - // Now we connect and initiate the transfer by sending a - // request header to the server, and receiving the response header - if((peer_handle = http_connect(session, &server, host_addr, request)) < 0) - { - rt_kprintf("HTTP: failed to connect to '%s'!\n", host_addr); - rt_free(session); - return RT_NULL; - } - - // http connect returns valid socket. Save in handle list. - session->socket = peer_handle; - - /* open successfully */ - return session; -} - -rt_size_t http_session_read(struct http_session* session, rt_uint8_t *buffer, rt_size_t length) -{ - int bytesRead = 0; - int totalRead = 0; - int left = length; - - // Read until: there is an error, we've read "size" bytes or the remote - // side has closed the connection. - do - { - bytesRead = recv(session->socket, buffer + totalRead, left, 0); - if(bytesRead <= 0) break; - - left -= bytesRead; - totalRead += bytesRead; - } while(left); - - return totalRead; -} - -rt_off_t http_session_seek(struct http_session* session, rt_off_t offset, int mode) -{ - switch(mode) - { - case SEEK_SET: - session->position = offset; - break; - - case SEEK_CUR: - session->position += offset; - break; - - case SEEK_END: - session->position = session->size + offset; - break; - } - - return session->position; -} - -int http_session_close(struct http_session* session) -{ - lwip_close(session->socket); - rt_free(session); - - return 0; -} - -// -// This is the main HTTP client connect work. Makes the connection -// and handles the protocol and reads the return headers. Needs -// to leave the stream at the start of the real data. -// -static int shoutcast_connect(struct shoutcast_session* session, - struct sockaddr_in* server, char* host_addr, const char* url) -{ - int socket_handle; - int peer_handle; - int rc; - char mimeBuffer[256]; - - if((socket_handle = socket( PF_INET, SOCK_STREAM, IPPROTO_TCP )) < 0) - { - rt_kprintf( "ICY: SOCKET FAILED\n" ); - return -1; - } - - peer_handle = connect( socket_handle, (struct sockaddr *) server, sizeof(*server)); - if ( peer_handle < 0 ) - { - rt_kprintf( "ICY: CONNECT FAILED %i\n", peer_handle ); - return -1; - } - - { - char *buf; - rt_uint32_t length; - - buf = rt_malloc (512); - if (*url) - length = rt_snprintf(buf, 512, _shoutcast_get, url, host_addr, ntohs(server->sin_port)); - else - length = rt_snprintf(buf, 512, _shoutcast_get, "/", host_addr, ntohs(server->sin_port)); - - rc = send(peer_handle, buf, length, 0); - rt_kprintf("SHOUTCAST request:\n%s", buf); - - /* release buffer */ - rt_free(buf); - } - - /* read the header information */ - while ( 1 ) - { - // read a line from the header information. - rc = http_read_line(peer_handle, mimeBuffer, 100); - rt_kprintf(">>%s", mimeBuffer); - - if ( rc < 0 ) return rc; - - // End of headers is a blank line. exit. - if (rc == 0) break; - if ((rc == 2) && (mimeBuffer[0] == '\r')) break; - - if(strstr(mimeBuffer, "ICY")) // First line of header, contains status code. Check for an error code - { - rc = shoutcast_is_error_header(mimeBuffer); - if(rc) - { - rt_kprintf("ICY: status code = %d!\n", rc); - return -rc; - } - } - - if (strstr(mimeBuffer, "HTTP/1.")) - { - rc = http_is_error_header(mimeBuffer); - if(rc) - { - rt_kprintf("HTTP: status code = %d!\n", rc); - return -rc; - } - } - - if (strstr(mimeBuffer, "icy-name:")) - { - /* get name */ - char* name; - - name = mimeBuffer + strlen("icy-name:"); - session->station_name = rt_strdup(name); - rt_kprintf("station name: %s\n", session->station_name); - } - - if (strstr(mimeBuffer, "icy-br:")) - { - /* get bitrate */ - session->bitrate = strtol(mimeBuffer + strlen("icy-br:"), RT_NULL, 10); - rt_kprintf("bitrate: %d\n", session->bitrate); - } - - if (strstr(mimeBuffer, "icy-metaint:")) - { - /* get metaint */ - session->metaint = strtol(mimeBuffer + strlen("icy-metaint:"), RT_NULL, 10); - rt_kprintf("metaint: %d\n", session->metaint); - } - - if (strstr(mimeBuffer, "content-type:")) - { - /* check content-type */ - if (strstr(mimeBuffer, "audio/mpeg") == RT_NULL) - { - rt_kprintf("ICY content is not audio/mpeg.\n"); - return -1; - } - } - - if (strstr(mimeBuffer, "Content-Type:")) - { - /* check content-type */ - if (strstr(mimeBuffer, "audio/mpeg") == RT_NULL) - { - rt_kprintf("ICY content is not audio/mpeg.\n"); - return -1; - } - } - } - - // We've sent the request, and read the headers. SockHandle is - // now at the start of the main data read for a file io read. - return peer_handle; -} - -struct shoutcast_session* shoutcast_session_open(char* url) -{ - int peer_handle = 0; - struct sockaddr_in server; - char *request, host_addr[32]; - struct shoutcast_session* session; - - session = (struct shoutcast_session*) rt_malloc(sizeof(struct shoutcast_session)); - if(session == RT_NULL) return RT_NULL; - - session->metaint = 0; - session->current_meta_chunk = 0; - session->bitrate = 0; - session->station_name = RT_NULL; - - /* Check valid IP address and URL */ - if(http_resolve_address(&server, url, &host_addr[0], &request) != 0) - { - rt_free(session); - return RT_NULL; - } - - rt_kprintf("connect to: %s...\n", host_addr); - - // Now we connect and initiate the transfer by sending a - // request header to the server, and receiving the response header - if((peer_handle = shoutcast_connect(session, &server, host_addr, request)) < 0) - { - rt_kprintf("SHOUTCAST: failed to connect to '%s'!\n", host_addr); - if (session->station_name != RT_NULL) - rt_free(session->station_name); - rt_free(session); - return RT_NULL; - } - - // http connect returns valid socket. Save in handle list. - session->socket = peer_handle; - - /* open successfully */ - return session; -} - -rt_size_t shoutcast_session_read(struct shoutcast_session* session, rt_uint8_t *buffer, rt_size_t length) -{ - int bytesRead = 0; - int totalRead = 0; - int left = length; - static rt_uint32_t first_meta_size = 0; - - // Read until: there is an error, we've read "size" bytes or the remote - // side has closed the connection. - do - { - bytesRead = recv(session->socket, buffer + totalRead, left, 0); - if(bytesRead <= 0) - { - rt_kprintf("no data on recv, len %d,err %d\n", bytesRead, - lwip_get_error(session->socket)); - break; - } - - left -= bytesRead; - totalRead += bytesRead; - } while(left); - - /* handle meta */ - if (first_meta_size > 0) - { - /* skip meta data */ - memmove(&buffer[0], &buffer[first_meta_size], totalRead - first_meta_size); - - // rt_kprintf("remove meta: len %d\n", first_meta_size); - - totalRead = totalRead - first_meta_size; - first_meta_size = 0; - session->current_meta_chunk = totalRead; - } - else - { - if (session->current_meta_chunk + totalRead == session->metaint) - { - rt_uint8_t meta_data; - recv(session->socket, &meta_data, 1, 0); - - /* remove meta data in next packet */ - first_meta_size = meta_data * 16; - session->current_meta_chunk = 0; - - // rt_kprintf("get meta: len %d\n", first_meta_size); - } - else if (session->current_meta_chunk + totalRead > session->metaint) - { - int meta_length, next_chunk_length; - - // rt_kprintf("c: %d, total: %d, m: %d\n", session->current_meta_chunk, totalRead, session->metaint); - - /* get the length of meta data */ - meta_length = buffer[session->metaint - session->current_meta_chunk] * 16; - next_chunk_length = totalRead - (session->metaint - session->current_meta_chunk) - - (meta_length + 1); - - // rt_kprintf("l: %d, n: %d\n", meta_length, next_chunk_length); - - /* skip meta data */ - memmove(&buffer[session->metaint - session->current_meta_chunk], - &buffer[session->metaint - session->current_meta_chunk + meta_length + 1], - next_chunk_length); - - /* set new current meta chunk */ - session->current_meta_chunk = next_chunk_length; - totalRead = totalRead - (meta_length + 1); - } - else - { - session->current_meta_chunk += totalRead; - } - } - - return totalRead; -} - -rt_off_t shoutcast_session_seek(struct shoutcast_session* session, rt_off_t offset, int mode) -{ - /* not support seek yet */ - return 0; -} - -int shoutcast_session_close(struct shoutcast_session* session) -{ - lwip_close(session->socket); - if (session->station_name != RT_NULL) - rt_free(session->station_name); - rt_free(session); - - return 0; -} - -#include -void http_test(char* url) -{ - struct http_session* session; - char buffer[80]; - rt_size_t length; - - session = http_session_open(url); - if (session == RT_NULL) - { - rt_kprintf("open http session failed\n"); - return; - } - - do - { - rt_memset(buffer, 0, sizeof(buffer)); - length = http_session_read(session, (rt_uint8_t*)buffer, sizeof(buffer)); - - rt_kprintf(buffer);rt_kprintf("\n"); - } while (length > 0); - - http_session_close(session); -} -FINSH_FUNCTION_EXPORT(http_test, http client test); - -void shoutcast_test(char* url) -{ - struct shoutcast_session* session; - - session = shoutcast_session_open(url); - if (session == RT_NULL) - { - rt_kprintf("open shoutcast session failed\n"); - return; - } - - shoutcast_session_close(session); -} -FINSH_FUNCTION_EXPORT(shoutcast_test, shoutcast client test); - diff --git a/bsp/stm32_radio/http.h b/bsp/stm32_radio/http.h deleted file mode 100644 index 45be693b2b..0000000000 --- a/bsp/stm32_radio/http.h +++ /dev/null @@ -1,39 +0,0 @@ -#ifndef __HTTP_H__ -#define __HTTP_H__ - -#include - -struct http_session -{ - char* user_agent; - int socket; - - /* size of http file */ - rt_size_t size; - rt_off_t position; -}; - -struct shoutcast_session -{ - int socket; - - /* shoutcast name and bitrate */ - char* station_name; - int bitrate; - - /* size of meta data */ - rt_size_t metaint; - rt_size_t current_meta_chunk; -}; - -struct http_session* http_session_open(char* url); -rt_size_t http_session_read(struct http_session* session, rt_uint8_t *buffer, rt_size_t length); -rt_off_t http_session_seek(struct http_session* session, rt_off_t offset, int mode); -int http_session_close(struct http_session* session); - -struct shoutcast_session* shoutcast_session_open(char* url); -rt_size_t shoutcast_session_read(struct shoutcast_session* session, rt_uint8_t *buffer, rt_size_t length); -rt_off_t shoutcast_session_seek(struct shoutcast_session* session, rt_off_t offset, int mode); -int shoutcast_session_close(struct shoutcast_session* session); - -#endif diff --git a/bsp/stm32_radio/ili9325/ili9325.c b/bsp/stm32_radio/ili9325/ili9325.c deleted file mode 100644 index c8cf1a513c..0000000000 --- a/bsp/stm32_radio/ili9325/ili9325.c +++ /dev/null @@ -1,508 +0,0 @@ -#include "stm32f10x.h" -#include "ili9325.h" - -/* LCD Registers */ -#define R0 0x00 -#define R1 0x01 -#define R2 0x02 -#define R3 0x03 -#define R4 0x04 -#define R5 0x05 -#define R6 0x06 -#define R7 0x07 -#define R8 0x08 -#define R9 0x09 -#define R10 0x0A -#define R12 0x0C -#define R13 0x0D -#define R14 0x0E -#define R15 0x0F -#define R16 0x10 -#define R17 0x11 -#define R18 0x12 -#define R19 0x13 -#define R20 0x14 -#define R21 0x15 -#define R22 0x16 -#define R23 0x17 -#define R24 0x18 -#define R25 0x19 -#define R26 0x1A -#define R27 0x1B -#define R28 0x1C -#define R29 0x1D -#define R30 0x1E -#define R31 0x1F -#define R32 0x20 -#define R33 0x21 -#define R34 0x22 -#define R36 0x24 -#define R37 0x25 -#define R40 0x28 -#define R41 0x29 -#define R43 0x2B -#define R45 0x2D -#define R48 0x30 -#define R49 0x31 -#define R50 0x32 -#define R51 0x33 -#define R52 0x34 -#define R53 0x35 -#define R54 0x36 -#define R55 0x37 -#define R56 0x38 -#define R57 0x39 -#define R59 0x3B -#define R60 0x3C -#define R61 0x3D -#define R62 0x3E -#define R63 0x3F -#define R64 0x40 -#define R65 0x41 -#define R66 0x42 -#define R67 0x43 -#define R68 0x44 -#define R69 0x45 -#define R70 0x46 -#define R71 0x47 -#define R72 0x48 -#define R73 0x49 -#define R74 0x4A -#define R75 0x4B -#define R76 0x4C -#define R77 0x4D -#define R78 0x4E -#define R79 0x4F -#define R80 0x50 -#define R81 0x51 -#define R82 0x52 -#define R83 0x53 -#define R96 0x60 -#define R97 0x61 -#define R106 0x6A -#define R118 0x76 -#define R128 0x80 -#define R129 0x81 -#define R130 0x82 -#define R131 0x83 -#define R132 0x84 -#define R133 0x85 -#define R134 0x86 -#define R135 0x87 -#define R136 0x88 -#define R137 0x89 -#define R139 0x8B -#define R140 0x8C -#define R141 0x8D -#define R143 0x8F -#define R144 0x90 -#define R145 0x91 -#define R146 0x92 -#define R147 0x93 -#define R148 0x94 -#define R149 0x95 -#define R150 0x96 -#define R151 0x97 -#define R152 0x98 -#define R153 0x99 -#define R154 0x9A -#define R157 0x9D -#define R192 0xC0 -#define R193 0xC1 -#define R229 0xE5 - -/* LCD color */ -#define White 0xFFFF -#define Black 0x0000 -#define Grey 0xF7DE -#define Blue 0x001F -#define Blue2 0x051F -#define Red 0xF800 -#define Magenta 0xF81F -#define Green 0x07E0 -#define Cyan 0x7FFF -#define Yellow 0xFFE0 - -static u16 DeviceCode; - -/******************************************************************************* -* Function Name : LCD_FSMCConfig -* Description : Configures the Parallel interface (FSMC) for LCD(Parallel mode) -* Input : None -* Output : None -* Return : None -*******************************************************************************/ -static void LCD_FSMCConfig(void) -{ - FSMC_NORSRAMInitTypeDef FSMC_NORSRAMInitStructure; - FSMC_NORSRAMTimingInitTypeDef p; - - /*-- FSMC Configuration ------------------------------------------------------*/ - /*----------------------- SRAM Bank 4 ----------------------------------------*/ - /* FSMC_Bank1_NORSRAM4 configuration */ - p.FSMC_AddressSetupTime = 0; - p.FSMC_AddressHoldTime = 0; - p.FSMC_DataSetupTime = 2; - p.FSMC_BusTurnAroundDuration = 0; - p.FSMC_CLKDivision = 0; - p.FSMC_DataLatency = 0; - p.FSMC_AccessMode = FSMC_AccessMode_A; - - /* Color LCD configuration ------------------------------------ - LCD configured as follow: - - Data/Address MUX = Disable - - Memory Type = SRAM - - Data Width = 16bit - - Write Operation = Enable - - Extended Mode = Enable - - Asynchronous Wait = Disable */ - FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM2; - FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable; - FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_SRAM; - FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b; - FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable; - FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low; - FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable; - FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState; - FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable; - FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable; - FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable; - FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable; - FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p; - FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p; - - FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure); - FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM2, ENABLE); -} - -/******************************************************************************* -* Function Name : ili9325_WriteReg -* Description : Writes to the selected LCD register. -* Input : - LCD_Reg: address of the selected register. -* - LCD_RegValue: value to write to the selected register. -* Output : None -* Return : None -*******************************************************************************/ -void ili9325_WriteReg(u8 LCD_Reg,u16 LCD_RegValue) -{ - /* Write 16-bit Index, then Write Reg */ - ili9325_REG = LCD_Reg; - /* Write 16-bit Reg */ - ili9325_RAM = LCD_RegValue; -} - -/******************************************************************************* -* Function Name : LCD_ReadReg -* Description : Reads the selected LCD Register. -* Input : None -* Output : None -* Return : LCD Register Value. -*******************************************************************************/ -u16 LCD_ReadReg(u8 LCD_Reg) -{ - /* Write 16-bit Index (then Read Reg) */ - ili9325_REG = LCD_Reg; - /* Read 16-bit Reg */ - return (ili9325_RAM); -} - -/******************************************************************************* -* Function Name : ili9325_WriteRAM_Prepare -* Description : Prepare to write to the LCD RAM. -* Input : None -* Output : None -* Return : None -*******************************************************************************/ -void ili9325_WriteRAM_Prepare(void) -{ - ili9325_REG = R34; -} - -/******************************************************************************* -* Function Name : ili9325_WriteRAM -* Description : Writes to the LCD RAM. -* Input : - RGB_Code: the pixel color in RGB mode (5-6-5). -* Output : None -* Return : None -*******************************************************************************/ -void ili9325_WriteRAM(u16 RGB_Code) -{ - /* Write 16-bit GRAM Reg */ - ili9325_RAM = RGB_Code; -} - -/* ¶ÁÈ¡Ö¸¶¨µØÖ·µÄGRAM */ -unsigned short ili9325_ReadGRAM(unsigned short x,unsigned short y) -{ - unsigned short temp; - ili9325_SetCursor(x,y); - ili9325_REG = R34; - /* dummy read */ - temp = ili9325_RAM; - temp = ili9325_RAM; - return temp; -} - -void rt_kprintf(const char *fmt, ...); -#define printf rt_kprintf -void ili9325_Initializtion(void) -{ - volatile unsigned int i; - LCD_FSMCConfig(); - - DeviceCode = LCD_ReadReg(0x0000); - - /* DeviceCode check */ - if( (DeviceCode != 0x9325) && (DeviceCode != 0x9328) && (DeviceCode != 0x7783) ) - { - printf("Invalid LCD ID:%08X\r\n",DeviceCode); - printf("Please check you hardware."); - while(1); - } - - if (DeviceCode==0x9325||DeviceCode==0x9328) - { - ili9325_WriteReg(0x00e7,0x0010); - ili9325_WriteReg(0x0000,0x0001); //start internal osc -#if defined(_ILI_REVERSE_DIRECTION_) - ili9325_WriteReg(0x0001,0x0000); //Reverse Display -#else - ili9325_WriteReg(0x0001,0x0100); // -#endif - ili9325_WriteReg(0x0002,0x0700); //power on sequence - /* [5:4]-ID1~ID0 [3]-AM-1´¹Ö±-0ˮƽ */ - ili9325_WriteReg(0x0003,(1<<12)|(1<<5)|(0<<4) | (1<<3) ); - ili9325_WriteReg(0x0004,0x0000); - ili9325_WriteReg(0x0008,0x0207); - ili9325_WriteReg(0x0009,0x0000); - ili9325_WriteReg(0x000a,0x0000); //display setting - ili9325_WriteReg(0x000c,0x0001); //display setting - ili9325_WriteReg(0x000d,0x0000); //0f3c - ili9325_WriteReg(0x000f,0x0000); - //Power On sequence // - ili9325_WriteReg(0x0010,0x0000); - ili9325_WriteReg(0x0011,0x0007); - ili9325_WriteReg(0x0012,0x0000); - ili9325_WriteReg(0x0013,0x0000); - for (i=50000; i>0; i--); - for (i=50000; i>0; i--); - ili9325_WriteReg(0x0010,0x1590); - ili9325_WriteReg(0x0011,0x0227); - for (i=50000; i>0; i--); - for (i=50000; i>0; i--); - ili9325_WriteReg(0x0012,0x009c); - for (i=50000; i>0; i--); - for (i=50000; i>0; i--); - ili9325_WriteReg(0x0013,0x1900); - ili9325_WriteReg(0x0029,0x0023); - ili9325_WriteReg(0x002b,0x000e); - for (i=50000; i>0; i--); - for (i=50000; i>0; i--); - ili9325_WriteReg(0x0020,0x0000); - ili9325_WriteReg(0x0021,0x0000); - for (i=50000; i>0; i--); - for (i=50000; i>0; i--); - ili9325_WriteReg(0x0030,0x0007); - ili9325_WriteReg(0x0031,0x0707); - ili9325_WriteReg(0x0032,0x0006); - ili9325_WriteReg(0x0035,0x0704); - ili9325_WriteReg(0x0036,0x1f04); - ili9325_WriteReg(0x0037,0x0004); - ili9325_WriteReg(0x0038,0x0000); - ili9325_WriteReg(0x0039,0x0706); - ili9325_WriteReg(0x003c,0x0701); - ili9325_WriteReg(0x003d,0x000f); - for (i=50000; i>0; i--); - for (i=50000; i>0; i--); - ili9325_WriteReg(0x0050,0x0000); - ili9325_WriteReg(0x0051,0x00ef); - ili9325_WriteReg(0x0052,0x0000); - ili9325_WriteReg(0x0053,0x013f); -#if defined(_ILI_REVERSE_DIRECTION_) - ili9325_WriteReg(0x0060,0x2700); -#else - ili9325_WriteReg(0x0060,0xA700); -#endif - ili9325_WriteReg(0x0061,0x0001); - ili9325_WriteReg(0x006a,0x0000); - ili9325_WriteReg(0x0080,0x0000); - ili9325_WriteReg(0x0081,0x0000); - ili9325_WriteReg(0x0082,0x0000); - ili9325_WriteReg(0x0083,0x0000); - ili9325_WriteReg(0x0084,0x0000); - ili9325_WriteReg(0x0085,0x0000); - ili9325_WriteReg(0x0090,0x0010); - ili9325_WriteReg(0x0092,0x0000); - ili9325_WriteReg(0x0093,0x0003); - ili9325_WriteReg(0x0095,0x0110); - ili9325_WriteReg(0x0097,0x0000); - ili9325_WriteReg(0x0098,0x0000); - //display on sequence - ili9325_WriteReg(0x0007,0x0133); - ili9325_WriteReg(0x0020,0x0000); - ili9325_WriteReg(0x0021,0x0000); - } - else if(DeviceCode==0x7783) - { - // Start Initial Sequence - ili9325_WriteReg(0x00FF,0x0001); - ili9325_WriteReg(0x00F3,0x0008); - ili9325_WriteReg(0x0001,0x0100); - ili9325_WriteReg(0x0002,0x0700); - ili9325_WriteReg(0x0003,0x1030); //0x1030 - ili9325_WriteReg(0x0008,0x0302); - ili9325_WriteReg(0x0008,0x0207); - ili9325_WriteReg(0x0009,0x0000); - ili9325_WriteReg(0x000A,0x0000); - ili9325_WriteReg(0x0010,0x0000); //0x0790 - ili9325_WriteReg(0x0011,0x0005); - ili9325_WriteReg(0x0012,0x0000); - ili9325_WriteReg(0x0013,0x0000); - for (i=50000; i>0; i--); - for (i=50000; i>0; i--); - ili9325_WriteReg(0x0010,0x12B0); - for (i=50000; i>0; i--); - for (i=50000; i>0; i--); - ili9325_WriteReg(0x0011,0x0007); - for (i=50000; i>0; i--); - for (i=50000; i>0; i--); - ili9325_WriteReg(0x0012,0x008B); - for (i=50000; i>0; i--); - for (i=50000; i>0; i--); - ili9325_WriteReg(0x0013,0x1700); - for (i=50000; i>0; i--); - for (i=50000; i>0; i--); - ili9325_WriteReg(0x0029,0x0022); - - //################# void Gamma_Set(void) ####################// - ili9325_WriteReg(0x0030,0x0000); - ili9325_WriteReg(0x0031,0x0707); - ili9325_WriteReg(0x0032,0x0505); - ili9325_WriteReg(0x0035,0x0107); - ili9325_WriteReg(0x0036,0x0008); - ili9325_WriteReg(0x0037,0x0000); - ili9325_WriteReg(0x0038,0x0202); - ili9325_WriteReg(0x0039,0x0106); - ili9325_WriteReg(0x003C,0x0202); - ili9325_WriteReg(0x003D,0x0408); - for (i=50000; i>0; i--); - for (i=50000; i>0; i--); - - - ili9325_WriteReg(0x0050,0x0000); - ili9325_WriteReg(0x0051,0x00EF); - ili9325_WriteReg(0x0052,0x0000); - ili9325_WriteReg(0x0053,0x013F); - ili9325_WriteReg(0x0060,0xA700); - ili9325_WriteReg(0x0061,0x0001); - ili9325_WriteReg(0x0090,0x0033); - ili9325_WriteReg(0x002B,0x000B); - ili9325_WriteReg(0x0007,0x0133); - for (i=50000; i>0; i--); - for (i=50000; i>0; i--); - } - - - ili9325_Clear( Blue ); -} - -/**************************************************************************** -* Ãû ³Æ£ºvoid ili9325_SetCursor(u16 x,u16 y) -* ¹¦ ÄÜ£ºÉèÖÃÆÁÄ»×ù±ê -* Èë¿Ú²ÎÊý£ºx ÐÐ×ù±ê -* y ÁÐ×ù±ê -* ³ö¿Ú²ÎÊý£ºÎÞ -* ˵ Ã÷£º -* µ÷Ó÷½·¨£ºili9325_SetCursor(10,10); -****************************************************************************/ -void ili9325_SetCursor(u16 x,u16 y) -{ - ili9325_WriteReg(R32,x); /* 0-239 */ - ili9325_WriteReg(R33,y); /* 0-319 */ -} - -/**************************************************************************** -* Ãû ³Æ£ºvoid ili9325_SetWindows(u16 StartX,u16 StartY,u16 EndX,u16 EndY) -* ¹¦ ÄÜ£ºÉèÖô°¿ÚÇøÓò -* Èë¿Ú²ÎÊý£ºStartX ÐÐÆðʼ×ù±ê -* StartY ÁÐÆðʼ×ù±ê -* EndX ÐнáÊø×ù±ê -* EndY ÁнáÊø×ù±ê -* ³ö¿Ú²ÎÊý£ºÎÞ -* ˵ Ã÷£º -* µ÷Ó÷½·¨£ºili9325_SetWindows(0,0,100,100)£» -****************************************************************************/ -void ili9325_SetWindows(u16 StartX,u16 StartY,u16 EndX,u16 EndY) -{ - ili9325_SetCursor(StartX,StartY); - ili9325_WriteReg(0x0050, StartX); - ili9325_WriteReg(0x0052, StartY); - ili9325_WriteReg(0x0051, EndX); - ili9325_WriteReg(0x0053, EndY); -} - -/**************************************************************************** -* Ãû ³Æ£ºvoid ili9325_Clear(u16 dat) -* ¹¦ ÄÜ£º½«ÆÁÄ»Ìî³ä³ÉÖ¸¶¨µÄÑÕÉ«£¬ÈçÇåÆÁ£¬ÔòÌî³ä 0xffff -* Èë¿Ú²ÎÊý£ºdat Ìî³äÖµ -* ³ö¿Ú²ÎÊý£ºÎÞ -* ˵ Ã÷£º -* µ÷Ó÷½·¨£ºili9325_Clear(0xffff); -****************************************************************************/ -void ili9325_Clear(u16 Color) -{ - u32 index=0; - ili9325_SetCursor(0,0); - ili9325_WriteRAM_Prepare(); /* Prepare to write GRAM */ - for (index=0; index<76800; index++) - { - ili9325_RAM=Color; - } -} - -/**************************************************************************** -* Ãû ³Æ£ºvoid ili9325_DrawPicture(u16 StartX,u16 StartY,u16 EndX,u16 EndY,u16 *pic) -* ¹¦ ÄÜ£ºÔÚÖ¸¶¨×ù±ê·¶Î§ÏÔʾһ¸±Í¼Æ¬ -* Èë¿Ú²ÎÊý£ºStartX ÐÐÆðʼ×ù±ê -* StartY ÁÐÆðʼ×ù±ê -* EndX ÐнáÊø×ù±ê -* EndY ÁнáÊø×ù±ê - pic ͼƬͷָÕë -* ³ö¿Ú²ÎÊý£ºÎÞ -* ˵ Ã÷£ºÍ¼Æ¬È¡Ä£¸ñʽΪˮƽɨÃ裬16λÑÕɫģʽ -* µ÷Ó÷½·¨£ºili9325_DrawPicture(0,0,100,100,(u16*)demo); -****************************************************************************/ -void ili9325_DrawPicture(u16 StartX,u16 StartY,u16 EndX,u16 EndY,u16 *pic) -{ - u16 i; - ili9325_SetWindows(StartX,StartY,EndX,EndY); - ili9325_SetCursor(StartX,StartY); - - ili9325_WriteRAM_Prepare(); - for (i=0; i<(EndX*EndY); i++) - { - ili9325_WriteRAM(*pic++); - } -} - - -/**************************************************************************** -* Ãû ³Æ£ºu16 ili9325_BGR2RGB(u16 c) -* ¹¦ ÄÜ£ºRRRRRGGGGGGBBBBB ¸ÄΪ BBBBBGGGGGGRRRRR ¸ñʽ -* Èë¿Ú²ÎÊý£ºc BRG ÑÕÉ«Öµ -* ³ö¿Ú²ÎÊý£ºRGB ÑÕÉ«Öµ -* ˵ Ã÷£ºÄÚ²¿º¯Êýµ÷Óà -* µ÷Ó÷½·¨£º -****************************************************************************/ -unsigned short ili9325_BGR2RGB(unsigned short c) -{ - u16 r, g, b, rgb; - - b = (c>>0) & 0x1f; - g = (c>>5) & 0x3f; - r = (c>>11) & 0x1f; - - rgb = (b<<11) + (g<<5) + (r<<0); - - return( rgb ); -} diff --git a/bsp/stm32_radio/ili9325/ili9325.h b/bsp/stm32_radio/ili9325/ili9325.h deleted file mode 100644 index 540f91ebec..0000000000 --- a/bsp/stm32_radio/ili9325/ili9325.h +++ /dev/null @@ -1,23 +0,0 @@ -#ifndef ILI9325_H_INCLUDED -#define ILI9325_H_INCLUDED - -extern void ili9325_Initializtion(void); -extern void ili9325_SetCursor(u16 x,u16 y); -extern void ili9325_Clear(u16 Color); - -extern unsigned short ili9325_BGR2RGB(unsigned short c); - -extern void ili9325_WriteRAM_Prepare(void); -extern void ili9325_WriteRAM(u16 RGB_Code); -extern unsigned short ili9325_ReadGRAM(unsigned short x,unsigned short y); -extern void ili9325_WriteReg(u8 LCD_Reg,u16 LCD_RegValue); - -/* If LCD Display in wrong dirction uncomment this option*/ -#define _ILI_REVERSE_DIRECTION_ - -/* LCD is connected to the FSMC_Bank1_NOR/SRAM2 and NE2 is used as ship select signal */ -/* RS <==> A2 */ -#define ili9325_REG (*((volatile unsigned short *) 0x64000000)) /* RS = 0 */ -#define ili9325_RAM (*((volatile unsigned short *) 0x64000008)) /* RS = 1 */ - -#endif diff --git a/bsp/stm32_radio/info.c b/bsp/stm32_radio/info.c deleted file mode 100644 index de5ad25fa4..0000000000 --- a/bsp/stm32_radio/info.c +++ /dev/null @@ -1,91 +0,0 @@ -#include -#include -#include - -#include -#include - -#include "network.xpm" - -static rtgui_image_t *rtt_image = RT_NULL; -static rtgui_image_t *network_image = RT_NULL; -static rtgui_image_t *usb_image = RT_NULL; -static rtgui_image_t *power_image = RT_NULL; - -static rt_bool_t view_event_handler(struct rtgui_widget* widget, struct rtgui_event* event) -{ - if (event->type == RTGUI_EVENT_PAINT) - { - struct rtgui_dc* dc; - struct rtgui_rect rect; - - dc = rtgui_dc_begin_drawing(widget); - if (dc == RT_NULL) return RT_FALSE; - rtgui_widget_get_rect(widget, &rect); - - rtgui_dc_fill_rect(dc, &rect); - rtgui_dc_draw_hline(dc, rect.x1, rect.x2, rect.y2 - 1); - - /* draw RT-Thread logo */ - rtt_image = rtgui_image_create_from_file("hdc", - "/resource/RTT.hdc", RT_FALSE); - if (rtt_image != RT_NULL) - { - rtgui_image_blit(rtt_image, dc, &rect); - rtgui_image_destroy(rtt_image); - - rtt_image = RT_NULL; - } - - if (network_image != RT_NULL) - { - rect.x1 = rect.x2 - (network_image->w + 2); - rtgui_image_blit(network_image, dc, &rect); - } - - rtgui_dc_end_drawing(dc); - - return RT_FALSE; - } - - return rtgui_view_event_handler(widget, event); -} - -static void info_entry(void* parameter) -{ - rt_mq_t mq; - struct rtgui_view* view; - struct rtgui_workbench* workbench; - - mq = rt_mq_create("qInfo", 256, 4, RT_IPC_FLAG_FIFO); - rtgui_thread_register(rt_thread_self(), mq); - - network_image = rtgui_image_create_from_mem("xpm", - (rt_uint8_t*)network_xpm, sizeof(network_xpm), RT_TRUE); - workbench = rtgui_workbench_create("info", "workbench"); - if (workbench == RT_NULL) return; - - view = rtgui_view_create("view"); - RTGUI_WIDGET_BACKGROUND(RTGUI_WIDGET(view)) = white; - rtgui_widget_set_event_handler(RTGUI_WIDGET(view), view_event_handler); - - rtgui_workbench_add_view(workbench, view); - - rtgui_view_show(view, RT_FALSE); - - rtgui_workbench_event_loop(workbench); - - rtgui_thread_deregister(rt_thread_self()); - rt_mq_delete(mq); -} - -void info_init() -{ - rt_thread_t tid; - - tid = rt_thread_create("info", - info_entry, RT_NULL, - 2048, 25, 10); - - if (tid != RT_NULL) rt_thread_startup(tid); -} diff --git a/bsp/stm32_radio/key.c b/bsp/stm32_radio/key.c deleted file mode 100644 index 8fcfc58a2b..0000000000 --- a/bsp/stm32_radio/key.c +++ /dev/null @@ -1,139 +0,0 @@ -#include -#include - -#include -#include - -/* -key_enter PF11 -key_down PG15 -key_up PG11 -key_right PG14 -key_left PG13 -*/ -#define key_enter_GETVALUE() GPIO_ReadInputDataBit(GPIOF,GPIO_Pin_11) -#define key_down_GETVALUE() GPIO_ReadInputDataBit(GPIOG,GPIO_Pin_15) -#define key_up_GETVALUE() GPIO_ReadInputDataBit(GPIOG,GPIO_Pin_11) -#define key_right_GETVALUE() GPIO_ReadInputDataBit(GPIOG,GPIO_Pin_14) -#define key_left_GETVALUE() GPIO_ReadInputDataBit(GPIOG,GPIO_Pin_13) - -/* from remote.c */ -extern void rem_start(void); -extern void rem_encoder(struct rtgui_event_kbd * p); -extern unsigned int rem_mode; -/* from remote.c */ - -static void GPIO_Configuration(void) -{ - GPIO_InitTypeDef GPIO_InitStructure; - - /* init gpio configuration */ - RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOG | RCC_APB2Periph_GPIOE,ENABLE); - - GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IPU; - GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; - GPIO_InitStructure.GPIO_Pin = GPIO_Pin_11 | GPIO_Pin_13 | GPIO_Pin_14 | GPIO_Pin_15; - GPIO_Init(GPIOG,&GPIO_InitStructure); - - GPIO_InitStructure.GPIO_Pin = GPIO_Pin_11; - GPIO_Init(GPIOF,&GPIO_InitStructure); - - /* PE2 LED */ - GPIO_InitStructure.GPIO_Pin = GPIO_Pin_2; - GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP; - GPIO_Init(GPIOE,&GPIO_InitStructure); - GPIO_SetBits(GPIOE,GPIO_Pin_2); -} - -static void key_thread_entry(void *parameter) -{ - rt_time_t next_delay; - struct rtgui_event_kbd kbd_event; - - GPIO_Configuration(); - /* start remote */ - rem_start(); - - /* init keyboard event */ - RTGUI_EVENT_KBD_INIT(&kbd_event); - kbd_event.mod = RTGUI_KMOD_NONE; - kbd_event.unicode = 0; - - while (1) - { - next_delay = 10; - kbd_event.key = RTGUIK_UNKNOWN; - kbd_event.type = RTGUI_KEYDOWN; - - if( rem_mode== 2 ) - { - rem_encoder(&kbd_event); - } - - if ( key_enter_GETVALUE() == 0 ) - { - rt_thread_delay( next_delay*4 ); - if (key_enter_GETVALUE() == 0) - { - /* HOME key */ - rt_kprintf("key_home\n"); - kbd_event.key = RTGUIK_HOME; - } - else - { - rt_kprintf("key_enter\n"); - kbd_event.key = RTGUIK_RETURN; - } - } - - if ( key_down_GETVALUE() == 0 ) - { - rt_kprintf("key_down\n"); - kbd_event.key = RTGUIK_DOWN; - } - - if ( key_up_GETVALUE() == 0 ) - { - rt_kprintf("key_up\n"); - kbd_event.key = RTGUIK_UP; - } - - if ( key_right_GETVALUE() == 0 ) - { - rt_kprintf("key_right\n"); - kbd_event.key = RTGUIK_RIGHT; - } - - if ( key_left_GETVALUE() == 0 ) - { - rt_kprintf("key_left\n"); - kbd_event.key = RTGUIK_LEFT; - } - - if (kbd_event.key != RTGUIK_UNKNOWN) - { - /* post down event */ - rtgui_server_post_event(&(kbd_event.parent), sizeof(kbd_event)); - - next_delay = 10; - /* delay to post up event */ - rt_thread_delay(next_delay); - - /* post up event */ - kbd_event.type = RTGUI_KEYUP; - rtgui_server_post_event(&(kbd_event.parent), sizeof(kbd_event)); - } - - /* wait next key press */ - rt_thread_delay(next_delay); - } -} - -static rt_thread_t key_tid; -void rt_hw_key_init(void) -{ - key_tid = rt_thread_create("key", - key_thread_entry, RT_NULL, - 768, 30, 5); - if (key_tid != RT_NULL) rt_thread_startup(key_tid); -} diff --git a/bsp/stm32_radio/lcd.c b/bsp/stm32_radio/lcd.c deleted file mode 100644 index e95528a767..0000000000 --- a/bsp/stm32_radio/lcd.c +++ /dev/null @@ -1,463 +0,0 @@ -#include "stm32f10x.h" -#include "rtthread.h" -#include "board.h" -#include -#include -#include -#include - -#if (LCD_VERSION == 1) -#include "fmt0371/FMT0371.h" -#endif - -#if (LCD_VERSION == 2) -#include "ili9325/ili9325.h" -#endif - -rt_err_t rt_hw_lcd_init(void); -void rt_hw_lcd_update(rtgui_rect_t *rect); -rt_uint8_t * rt_hw_lcd_get_framebuffer(void); -void rt_hw_lcd_set_pixel(rtgui_color_t *c, rt_base_t x, rt_base_t y); -void rt_hw_lcd_get_pixel(rtgui_color_t *c, rt_base_t x, rt_base_t y); -void rt_hw_lcd_draw_hline(rtgui_color_t *c, rt_base_t x1, rt_base_t x2, rt_base_t y); -void rt_hw_lcd_draw_vline(rtgui_color_t *c, rt_base_t x, rt_base_t y1, rt_base_t y2); -void rt_hw_lcd_draw_raw_hline(rt_uint8_t *pixels, rt_base_t x1, rt_base_t x2, rt_base_t y); - -struct rtgui_graphic_driver _rtgui_lcd_driver = -{ - "lcd", - 2, - 240, - 320, - rt_hw_lcd_update, - rt_hw_lcd_get_framebuffer, - rt_hw_lcd_set_pixel, - rt_hw_lcd_get_pixel, - rt_hw_lcd_draw_hline, - rt_hw_lcd_draw_vline, - rt_hw_lcd_draw_raw_hline -}; - -extern void info_init(void); -extern void player_init(void); -void radio_rtgui_init(void) -{ - rtgui_rect_t rect; - - rtgui_system_server_init(); - - /* register dock panel */ - rect.x1 = 0; - rect.y1 = 0; - rect.x2 = 240; - rect.y2 = 25; - rtgui_panel_register("info", &rect); - - /* register main panel */ - rect.x1 = 0; - rect.y1 = 25; - rect.x2 = 320; - rect.y2 = 320; - rtgui_panel_register("main", &rect); - rtgui_panel_set_default_focused("main"); - - rt_hw_lcd_init(); - - info_init(); - player_init(); -} - -#if (LCD_VERSION == 1) -void rt_hw_lcd_update(rtgui_rect_t *rect) -{ - /* nothing for none-DMA mode driver */ -} - -rt_uint8_t * rt_hw_lcd_get_framebuffer(void) -{ - return RT_NULL; /* no framebuffer driver */ -} - -void rt_hw_lcd_set_pixel(rtgui_color_t *c, rt_base_t x, rt_base_t y) -{ - unsigned short p; - - /* get color pixel */ - p = rtgui_color_to_565p(*c); - - /* set X point */ - LCD_ADDR = 0x02; - LCD_DATA = x; - - /* set Y point */ - LCD_ADDR = 0x03; - LCD_DATA16(y); - - /* write pixel */ - LCD_ADDR = 0x0E; - LCD_DATA16(p); -} - -void rt_hw_lcd_get_pixel(rtgui_color_t *c, rt_base_t x, rt_base_t y) -{ - /* set X point */ - LCD_ADDR = 0x02; - LCD_DATA = x; - - /* set Y point */ - LCD_ADDR = 0x03; - LCD_DATA16( y ); - - /* read pixel */ - LCD_ADDR = 0x0F; - /* dummy read */ - x = LCD_DATA; - - *c = rtgui_color_from_565p( LCD_DATA16_READ() ); -} - -void rt_hw_lcd_draw_hline(rtgui_color_t *c, rt_base_t x1, rt_base_t x2, rt_base_t y) -{ - unsigned short p; - - /* get color pixel */ - p = rtgui_color_to_565p(*c); - - /* set X point */ - LCD_ADDR = 0x02; - LCD_DATA = x1; - - /* set Y point */ - LCD_ADDR = 0x03; - LCD_DATA16( y ); - - /* write pixel */ - LCD_ADDR = 0x0E; - while (x1 < x2) - { - LCD_DATA16(p); - x1 ++; - } -} - -void rt_hw_lcd_draw_vline(rtgui_color_t *c, rt_base_t x, rt_base_t y1, rt_base_t y2) -{ - unsigned short p; - - /* get color pixel */ - p = rtgui_color_to_565p(*c); - - /* set X point */ - LCD_ADDR = 0x02; - LCD_DATA = x; - - while (y1 < y2) - { - /* set Y point */ - LCD_ADDR = 0x03; - LCD_DATA16( y1 ); - - /* write pixel */ - LCD_ADDR = 0x0E; - LCD_DATA16(p); - - y1 ++; - } -} - -void rt_hw_lcd_draw_raw_hline(rt_uint8_t *pixels, rt_base_t x1, rt_base_t x2, rt_base_t y) -{ - rt_uint16_t *ptr; - - /* get pixel */ - ptr = (rt_uint16_t*) pixels; - - /* set X point */ - LCD_ADDR = 0x02; - LCD_DATA = x1; - - /* set Y point */ - LCD_ADDR = 0x03; - LCD_DATA16( y ); - - /* write pixel */ - LCD_ADDR = 0x0E; - while (x1 < x2) - { - LCD_DATA16(*ptr); - x1 ++; - ptr ++; - } -} - -rt_err_t rt_hw_lcd_init(void) -{ - GPIO_InitTypeDef GPIO_InitStructure; - - RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOF,ENABLE); - GPIO_InitStructure.GPIO_Pin = GPIO_Pin_9; - GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP; - GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; - GPIO_Init(GPIOF,&GPIO_InitStructure); - GPIO_SetBits(GPIOF,GPIO_Pin_9); - - ftm0371_port_init(); - ftm0371_init(); - - //LCD GRAM test - { - unsigned int test_x; - unsigned int test_y; - unsigned short temp; - - rt_kprintf("\r\nLCD GRAM test...."); - - //write - temp = 0; - for( test_y=0; test_y<320; test_y++) - { - /* set X point */ - LCD_ADDR = 0x02; - LCD_DATA = 0; - - /* set Y point */ - LCD_ADDR = 0x03; - LCD_DATA16( test_y ); - - /* write pixel */ - LCD_ADDR = 0x0E; - for(test_x=0; test_x<240; test_x++) - { - LCD_DATA16(temp++); - } - } - - temp = 0; - for( test_y=0; test_y<320; test_y++) - { - /* set X point */ - LCD_ADDR = 0x02; - LCD_DATA = 0; - - /* set Y point */ - LCD_ADDR = 0x03; - LCD_DATA16( test_y ); - - /* write pixel */ - LCD_ADDR = 0x0f; - /* dummy read */ - test_x = LCD_DATA; - for(test_x=0; test_x<240; test_x++) - { - if ( LCD_DATA16_READ() != temp++) - { - rt_kprintf(" LCD GRAM ERR!!"); - while(1); - } - } - } - rt_kprintf(" TEST PASS!\r\n"); - }//LCD GRAM TEST - -#ifndef DRIVER_TEST - /* add lcd driver into graphic driver */ - rtgui_graphic_driver_add(&_rtgui_lcd_driver); -#endif - - return RT_EOK; -} - -#include - -void hline(rt_base_t x1, rt_base_t x2, rt_base_t y, rt_uint32_t pixel) -{ - rt_hw_lcd_draw_hline(&pixel, x1, x2, y); -} -FINSH_FUNCTION_EXPORT(hline, draw a hline); - -void vline(int x, int y1, int y2, rt_uint32_t pixel) -{ - rt_hw_lcd_draw_vline(&pixel, x, y1, y2); -} -FINSH_FUNCTION_EXPORT(vline, draw a vline); - -void cls() -{ - rt_size_t index; - rtgui_color_t white = RTGUI_RGB(0xff, 0xff, 0xff); - - for (index = 0; index < 320; index ++) - rt_hw_lcd_draw_hline(&white, 0, 240, index); -} -FINSH_FUNCTION_EXPORT(cls, clear screen); -#endif - -#if (LCD_VERSION == 2) -void rt_hw_lcd_update(rtgui_rect_t *rect) -{ - /* nothing for none-DMA mode driver */ -} - -rt_uint8_t * rt_hw_lcd_get_framebuffer(void) -{ - return RT_NULL; /* no framebuffer driver */ -} - -/* ÉèÖÃÏñËصã ÑÕÉ«,X,Y */ -void rt_hw_lcd_set_pixel(rtgui_color_t *c, rt_base_t x, rt_base_t y) -{ - unsigned short p; - - /* get color pixel */ - p = rtgui_color_to_565p(*c); - ili9325_SetCursor(x,y); - - ili9325_WriteRAM_Prepare(); - ili9325_RAM = p ; -} - -/* »ñÈ¡ÏñËصãÑÕÉ« */ -void rt_hw_lcd_get_pixel(rtgui_color_t *c, rt_base_t x, rt_base_t y) -{ - unsigned short p; - p = ili9325_BGR2RGB( ili9325_ReadGRAM(x,y) ); - *c = rtgui_color_from_565p(p); -} - -/* »­Ë®Æ½Ïß */ -void rt_hw_lcd_draw_hline(rtgui_color_t *c, rt_base_t x1, rt_base_t x2, rt_base_t y) -{ - unsigned short p; - - /* get color pixel */ - p = rtgui_color_to_565p(*c); - - /* [5:4]-ID~ID0 [3]-AM-1´¹Ö±-0ˮƽ */ - ili9325_WriteReg(0x0003,(1<<12)|(1<<5)|(1<<4) | (0<<3) ); - - ili9325_SetCursor(x1, y); - ili9325_WriteRAM_Prepare(); /* Prepare to write GRAM */ - while (x1 < x2) - { - ili9325_RAM = p ; - x1++; - } -} - -/* ´¹Ö±Ïß */ -void rt_hw_lcd_draw_vline(rtgui_color_t *c, rt_base_t x, rt_base_t y1, rt_base_t y2) -{ - unsigned short p; - - /* get color pixel */ - p = rtgui_color_to_565p(*c); - - /* [5:4]-ID~ID0 [3]-AM-1´¹Ö±-0ˮƽ */ - ili9325_WriteReg(0x0003,(1<<12)|(1<<5)|(0<<4) | (1<<3) ); - - ili9325_SetCursor(x, y1); - ili9325_WriteRAM_Prepare(); /* Prepare to write GRAM */ - while (y1 < y2) - { - ili9325_RAM = p ; - y1++; - } -} - -/* ?? */ -void rt_hw_lcd_draw_raw_hline(rt_uint8_t *pixels, rt_base_t x1, rt_base_t x2, rt_base_t y) -{ - rt_uint16_t *ptr; - - /* get pixel */ - ptr = (rt_uint16_t*) pixels; - - /* [5:4]-ID~ID0 [3]-AM-1´¹Ö±-0ˮƽ */ - ili9325_WriteReg(0x0003,(1<<12)|(1<<5)|(1<<4) | (0<<3) ); - - ili9325_SetCursor(x1, y); - ili9325_WriteRAM_Prepare(); /* Prepare to write GRAM */ - while (x1 < x2) - { - ili9325_RAM = *ptr ; - x1 ++; - ptr ++; - } -} - -rt_err_t rt_hw_lcd_init(void) -{ - GPIO_InitTypeDef GPIO_InitStructure; - - RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOF,ENABLE); - GPIO_InitStructure.GPIO_Pin = GPIO_Pin_9; - GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP; - GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; - GPIO_Init(GPIOF,&GPIO_InitStructure); - GPIO_SetBits(GPIOF,GPIO_Pin_9); - - ili9325_Initializtion(); - - /* LCD GRAM TEST */ - { - unsigned short temp; - unsigned int test_x; - unsigned int test_y; - - rt_kprintf("\r\nLCD GRAM test...."); - - /* write */ - temp=0; - /* [5:4]-ID~ID0 [3]-AM-1´¹Ö±-0ˮƽ */ - ili9325_WriteReg(0x0003,(1<<12)|(1<<5)|(1<<4) | (0<<3) ); - ili9325_SetCursor(0,0); - ili9325_WriteRAM_Prepare(); - for(test_y=0; test_y<76800; test_y++) - { - ili9325_RAM = temp++ ; - } - - /* read */ - temp=0; - for(test_y=0; test_y<320; test_y++) - { - for(test_x=0; test_x<240; test_x++) - { - if( ili9325_BGR2RGB( ili9325_ReadGRAM(test_x,test_y) ) != temp++) - { - rt_kprintf(" LCD GRAM ERR!!"); - while(1); - } - } - } - rt_kprintf(" TEST PASS!\r\n"); - }/* LCD GRAM TEST */ - -#ifndef DRIVER_TEST - /* add lcd driver into graphic driver */ - rtgui_graphic_driver_add(&_rtgui_lcd_driver); -#endif - - return RT_EOK; -} - -#include - -void hline(rt_base_t x1, rt_base_t x2, rt_base_t y, rt_uint32_t pixel) -{ - rt_hw_lcd_draw_hline(&pixel, x1, x2, y); -} -FINSH_FUNCTION_EXPORT(hline, draw a hline); - -void vline(int x, int y1, int y2, rt_uint32_t pixel) -{ - rt_hw_lcd_draw_vline(&pixel, x, y1, y2); -} -FINSH_FUNCTION_EXPORT(vline, draw a vline); - -void cls() -{ - ili9325_Clear(0x051F); -} -FINSH_FUNCTION_EXPORT(cls, clear screen); -#endif diff --git a/bsp/stm32_radio/lcd.h b/bsp/stm32_radio/lcd.h deleted file mode 100644 index 7c1bf6c6de..0000000000 --- a/bsp/stm32_radio/lcd.h +++ /dev/null @@ -1,20 +0,0 @@ -/* - * File : lcd.h - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2006 - 2009, RT-Thread Development Team - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rt-thread.org/license/LICENSE - * - * Change Logs: - * Date Author Notes - * 2009-10-16 Bernard first version - */ - -#ifndef __LCD_HW_H__ -#define __LCD_HW_H__ - -rt_err_t rt_hw_lcd_init(void); - -#endif diff --git a/bsp/stm32_radio/libwma/SOURCES b/bsp/stm32_radio/libwma/SOURCES deleted file mode 100644 index 967577d0db..0000000000 --- a/bsp/stm32_radio/libwma/SOURCES +++ /dev/null @@ -1,3 +0,0 @@ -wmadeci.c -wmafixed.c -bitstream.c diff --git a/bsp/stm32_radio/libwma/asf.h b/bsp/stm32_radio/libwma/asf.h deleted file mode 100644 index 8cae8fae1d..0000000000 --- a/bsp/stm32_radio/libwma/asf.h +++ /dev/null @@ -1,24 +0,0 @@ -#ifndef _ASF_H -#define _ASF_H - -#include - -/* ASF codec IDs */ -#define ASF_CODEC_ID_WMAV1 0x160 -#define ASF_CODEC_ID_WMAV2 0x161 - -struct asf_waveformatex_s { - uint32_t packet_size; - int audiostream; - uint16_t codec_id; - uint16_t channels; - uint32_t rate; - uint32_t bitrate; - uint16_t blockalign; - uint16_t bitspersample; - uint16_t datalen; - uint8_t data[6]; -}; -typedef struct asf_waveformatex_s asf_waveformatex_t; - -#endif diff --git a/bsp/stm32_radio/libwma/asm_arm.h b/bsp/stm32_radio/libwma/asm_arm.h deleted file mode 100644 index 163dc3aefb..0000000000 --- a/bsp/stm32_radio/libwma/asm_arm.h +++ /dev/null @@ -1,39 +0,0 @@ -/******************************************************************** - * * - * THIS FILE IS PART OF THE OggVorbis 'TREMOR' CODEC SOURCE CODE. * - * * - * USE, DISTRIBUTION AND REPRODUCTION OF THIS LIBRARY SOURCE IS * - * GOVERNED BY A BSD-STYLE SOURCE LICENSE INCLUDED WITH THIS SOURCE * - * IN 'COPYING'. PLEASE READ THESE TERMS BEFORE DISTRIBUTING. * - * * - * THE OggVorbis 'TREMOR' SOURCE CODE IS (C) COPYRIGHT 1994-2002 * - * BY THE Xiph.Org FOUNDATION http://www.xiph.org/ * - * * - ******************************************************************** - - function: arm7 and later wide math functions - - ********************************************************************/ - -#ifndef __ASM_ARM_H__ -#define __ASM_ARM_H__ - -int32_t MULT32(int32_t x, int32_t y); -int32_t MULT31(int32_t x, int32_t y); -int32_t MULT31_SHIFT15(int32_t x, int32_t y); - -#define MB() - -void XPROD32(int32_t a, int32_t b, - int32_t t, int32_t v, - int32_t *x, int32_t *y); -void XPROD31(int32_t a, int32_t b, - int32_t t, int32_t v, - int32_t *x, int32_t *y); -void XNPROD31(int32_t a, int32_t b, - int32_t t, int32_t v, - int32_t *x, int32_t *y); - -int32_t CLIP_TO_15(int32_t x); - -#endif diff --git a/bsp/stm32_radio/libwma/bswap.h b/bsp/stm32_radio/libwma/bswap.h deleted file mode 100644 index 33377cfcba..0000000000 --- a/bsp/stm32_radio/libwma/bswap.h +++ /dev/null @@ -1,150 +0,0 @@ -/** - * @file bswap.h - * byte swap. - */ - -#ifndef __BSWAP_H__ -#define __BSWAP_H__ - -#ifdef HAVE_BYTESWAP_H -#include -#else - -#ifdef ROCKBOX -#include "codecs.h" - -/* rockbox' optimised inline functions */ -#define bswap_16(x) swap16(x) -#define bswap_32(x) swap32(x) - -static inline uint64_t ByteSwap64(uint64_t x) -{ - union { - uint64_t ll; - struct { - uint32_t l,h; - } l; - } r; - r.l.l = bswap_32 (x); - r.l.h = bswap_32 (x>>32); - return r.ll; -} -#define bswap_64(x) ByteSwap64(x) - -#elif defined(ARCH_X86) -static inline unsigned short ByteSwap16(unsigned short x) -{ - __asm("xchgb %b0,%h0" : - "=q" (x) : - "0" (x)); - return x; -} -#define bswap_16(x) ByteSwap16(x) - -static inline unsigned int ByteSwap32(unsigned int x) -{ -#if __CPU__ > 386 - __asm("bswap %0": - "=r" (x) : -#else - __asm("xchgb %b0,%h0\n" - " rorl $16,%0\n" - " xchgb %b0,%h0": - "=q" (x) : -#endif - "0" (x)); - return x; -} -#define bswap_32(x) ByteSwap32(x) - -static inline unsigned long long int ByteSwap64(unsigned long long int x) -{ - register union { __extension__ uint64_t __ll; - uint32_t __l[2]; } __x; - asm("xchgl %0,%1": - "=r"(__x.__l[0]),"=r"(__x.__l[1]): - "0"(bswap_32((unsigned long)x)),"1"(bswap_32((unsigned long)(x>>32)))); - return __x.__ll; -} -#define bswap_64(x) ByteSwap64(x) - -#elif defined(ARCH_SH4) - -static inline uint16_t ByteSwap16(uint16_t x) { - __asm__("swap.b %0,%0":"=r"(x):"0"(x)); - return x; -} - -static inline uint32_t ByteSwap32(uint32_t x) { - __asm__( - "swap.b %0,%0\n" - "swap.w %0,%0\n" - "swap.b %0,%0\n" - :"=r"(x):"0"(x)); - return x; -} - -#define bswap_16(x) ByteSwap16(x) -#define bswap_32(x) ByteSwap32(x) - -static inline uint64_t ByteSwap64(uint64_t x) -{ - union { - uint64_t ll; - struct { - uint32_t l,h; - } l; - } r; - r.l.l = bswap_32 (x); - r.l.h = bswap_32 (x>>32); - return r.ll; -} -#define bswap_64(x) ByteSwap64(x) - -#else - -#define bswap_16(x) (((x) & 0x00ff) << 8 | ((x) & 0xff00) >> 8) - - -// code from bits/byteswap.h (C) 1997, 1998 Free Software Foundation, Inc. -#define bswap_32(x) \ - ((((x) & 0xff000000) >> 24) | (((x) & 0x00ff0000) >> 8) | \ - (((x) & 0x0000ff00) << 8) | (((x) & 0x000000ff) << 24)) - -static inline uint64_t ByteSwap64(uint64_t x) -{ - union { - uint64_t ll; - uint32_t l[2]; - } w, r; - w.ll = x; - r.l[0] = bswap_32 (w.l[1]); - r.l[1] = bswap_32 (w.l[0]); - return r.ll; -} -#define bswap_64(x) ByteSwap64(x) - -#endif /* !ARCH_X86 */ - -#endif /* !HAVE_BYTESWAP_H */ - -// be2me ... BigEndian to MachineEndian -// le2me ... LittleEndian to MachineEndian - -#ifdef WORDS_BIGENDIAN -#define be2me_16(x) (x) -#define be2me_32(x) (x) -#define be2me_64(x) (x) -#define le2me_16(x) bswap_16(x) -#define le2me_32(x) bswap_32(x) -#define le2me_64(x) bswap_64(x) -#else -#define be2me_16(x) bswap_16(x) -#define be2me_32(x) bswap_32(x) -#define be2me_64(x) bswap_64(x) -#define le2me_16(x) (x) -#define le2me_32(x) (x) -#define le2me_64(x) (x) -#endif - -#endif /* __BSWAP_H__ */ diff --git a/bsp/stm32_radio/libwma/codeclib.h b/bsp/stm32_radio/libwma/codeclib.h deleted file mode 100644 index a144bd4ae5..0000000000 --- a/bsp/stm32_radio/libwma/codeclib.h +++ /dev/null @@ -1,79 +0,0 @@ -/*************************************************************************** - * __________ __ ___. - * Open \______ \ ____ ____ | | _\_ |__ _______ ___ - * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / - * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < - * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ - * \/ \/ \/ \/ \/ - * $Id: codeclib.h 19704 2009-01-07 09:53:46Z zagor $ - * - * Copyright (C) 2005 Dave Chapman - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version 2 - * of the License, or (at your option) any later version. - * - * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY - * KIND, either express or implied. - * - ****************************************************************************/ - -#ifndef __CODECLIB_H__ -#define __CODECLIB_H__ -#include "ffmpeg_config.h" -// #include "codecs.h" -// #include - -extern struct codec_api *ci; -extern size_t mem_ptr; -extern size_t bufsize; -extern unsigned char* mp3buf; /* The actual MP3 buffer from Rockbox */ -extern unsigned char* mallocbuf; /* The free space after the codec in the codec buffer */ -extern unsigned char* filebuf; /* The rest of the MP3 buffer */ - -/* Standard library functions that are used by the codecs follow here */ - -/* Get these functions 'out of the way' of the standard functions. Not doing - * so confuses the cygwin linker, and maybe others. These functions need to - * be implemented elsewhere */ -#define malloc(x) codec_malloc(x) -#define calloc(x,y) codec_calloc(x,y) -#define realloc(x,y) codec_realloc(x,y) -#define free(x) codec_free(x) -#define alloca(x) __builtin_alloca(x) - -void* codec_malloc(size_t size); -void* codec_calloc(size_t nmemb, size_t size); -void* codec_realloc(void* ptr, size_t size); -void codec_free(void* ptr); - -void *memcpy(void *dest, const void *src, size_t n); -void *memset(void *s, int c, size_t n); -int memcmp(const void *s1, const void *s2, size_t n); -void *memmove(void *s1, const void *s2, size_t n); - -size_t strlen(const char *s); -char *strcpy(char *dest, const char *src); -char *strcat(char *dest, const char *src); -int strcmp(const char *, const char *); - -void qsort(void *base, size_t nmemb, size_t size, int(*compar)(const void *, const void *)); - -#define abs(x) ((x)>0?(x):-(x)) -#define labs(x) abs(x) - -/*MDCT library functions*/ - -extern void mdct_backward(int n, int32_t *in, int32_t *out); - -#if defined(CPU_ARM) && (ARM_ARCH == 4) -/* optimised unsigned integer division for ARMv4, in IRAM */ -unsigned udiv32_arm(unsigned a, unsigned b); -#define UDIV32(a, b) udiv32_arm(a, b) -#else -/* default */ -#define UDIV32(a, b) (a / b) -#endif - -#endif diff --git a/bsp/stm32_radio/libwma/ffmpeg_config.h b/bsp/stm32_radio/libwma/ffmpeg_config.h deleted file mode 100644 index df704690bd..0000000000 --- a/bsp/stm32_radio/libwma/ffmpeg_config.h +++ /dev/null @@ -1,23 +0,0 @@ -/* Automatically generated by configure - do not modify */ -#ifndef _FFMPEG_CONFIG_H -#define _FFMPEG_CONFIG_H -// #include "codecs.h" - -#ifdef CPU_ARM -#define CONFIG_ALIGN 1 -#endif - -#ifdef ROCKBOX_BIG_ENDIAN -#define WORDS_BIGENDIAN -#endif - -#include -#include -#include - -#define inline __inline -typedef unsigned long long uint64_t; - -#define DEBUGF(fmt, ...) - -#endif diff --git a/bsp/stm32_radio/libwma/libwma.make b/bsp/stm32_radio/libwma/libwma.make deleted file mode 100644 index 066856c456..0000000000 --- a/bsp/stm32_radio/libwma/libwma.make +++ /dev/null @@ -1,18 +0,0 @@ -# __________ __ ___. -# Open \______ \ ____ ____ | | _\_ |__ _______ ___ -# Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / -# Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < -# Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ -# \/ \/ \/ \/ \/ -# $Id: libwma.make 20151 2009-03-01 09:04:15Z amiconn $ -# - -# libwma -WMALIB := $(CODECDIR)/libwma.a -WMALIB_SRC := $(call preprocess, $(APPSDIR)/codecs/libwma/SOURCES) -WMALIB_OBJ := $(call c2obj, $(WMALIB_SRC)) -OTHER_SRC += $(WMALIB_SRC) - -$(WMALIB): $(WMALIB_OBJ) - $(SILENT)$(shell rm -f $@) - $(call PRINTS,AR $(@F))$(AR) rcs $@ $^ >/dev/null diff --git a/bsp/stm32_radio/libwma/mdct2.c b/bsp/stm32_radio/libwma/mdct2.c deleted file mode 100644 index d80b61837f..0000000000 --- a/bsp/stm32_radio/libwma/mdct2.c +++ /dev/null @@ -1,375 +0,0 @@ -/******************************************************************** - * * - * THIS FILE IS PART OF THE OggVorbis 'TREMOR' CODEC SOURCE CODE. * - * * - * USE, DISTRIBUTION AND REPRODUCTION OF THIS LIBRARY SOURCE IS * - * GOVERNED BY A BSD-STYLE SOURCE LICENSE INCLUDED WITH THIS SOURCE * - * IN 'COPYING'. PLEASE READ THESE TERMS BEFORE DISTRIBUTING. * - * * - * THE OggVorbis 'TREMOR' SOURCE CODE IS (C) COPYRIGHT 1994-2002 * - * BY THE Xiph.Org FOUNDATION http://www.xiph.org/ * - * * - ******************************************************************** - - function: normalized modified discrete cosine transform - power of two length transform only [64 <= n ] - - - Original algorithm adapted long ago from _The use of multirate filter - banks for coding of high quality digital audio_, by T. Sporer, - K. Brandenburg and B. Edler, collection of the European Signal - Processing Conference (EUSIPCO), Amsterdam, June 1992, Vol.1, pp - 211-214 - - The below code implements an algorithm that no longer looks much like - that presented in the paper, but the basic structure remains if you - dig deep enough to see it. - - This module DOES NOT INCLUDE code to generate/apply the window - function. Everybody has their own weird favorite including me... I - happen to like the properties of y=sin(.5PI*sin^2(x)), but others may - vehemently disagree. - - ********************************************************************/ - -/*Tremor IMDCT adapted for use with libwmai*/ - - -#include "mdct2.h" -#include "mdct_lookup.h" -#include "codeclib.h" -#include "asm_arm.h" - -extern void mdct_butterfly_32(int32_t *x); -extern void mdct_butterfly_generic_loop(int32_t *x1, int32_t *x2, - const int32_t *T0, int step, - const int32_t *Ttop); - -static inline void mdct_butterfly_generic(int32_t *x,int points, int step) -{ - mdct_butterfly_generic_loop(x + points, x + (points>>1), sincos_lookup0, step, sincos_lookup0+1024); -} - -static inline void mdct_butterflies(int32_t *x,int points,int shift) -{ - int stages=8-shift; - int i,j; - - for(i=0;--stages>0;i++) - { - for(j=0;j<(1<>i)*j,points>>i,4<<(i+shift)); - } - - for(j=0;j>8]|(bitrev[(x&0x0f0)>>4]<<4)|(((int)bitrev[x&0x00f])<<8); -} - -static inline void mdct_bitreverse(int32_t *x,int n,int step,int shift) -{ - int bit = 0; - int32_t *w0 = x; - int32_t *w1 = x = w0+(n>>1); - const int32_t *T = (step>=4)?(sincos_lookup0+(step>>1)):sincos_lookup1; - const int32_t *Ttop = T+1024; - int32_t r2; - - do - { - int32_t r3 = bitrev12(bit++); - int32_t *x0 = x + ((r3 ^ 0xfff)>>shift) -1; - int32_t *x1 = x + (r3>>shift); - - register int32_t r0 = x0[0] + x1[0]; - register int32_t r1 = x1[1] - x0[1]; - - XPROD32( r0, r1, T[1], T[0], &r2, &r3 ); - T+=step; - - w1 -= 4; - - r0 = (x0[1] + x1[1])>>1; - r1 = (x0[0] - x1[0])>>1; - w0[0] = r0 + r2; - w0[1] = r1 + r3; - w1[2] = r0 - r2; - w1[3] = r3 - r1; - - r3 = bitrev12(bit++); - x0 = x + ((r3 ^ 0xfff)>>shift) -1; - x1 = x + (r3>>shift); - - r0 = x0[0] + x1[0]; - r1 = x1[1] - x0[1]; - - XPROD32( r0, r1, T[1], T[0], &r2, &r3 ); - T+=step; - - r0 = (x0[1] + x1[1])>>1; - r1 = (x0[0] - x1[0])>>1; - w0[2] = r0 + r2; - w0[3] = r1 + r3; - w1[0] = r0 - r2; - w1[1] = r3 - r1; - - w0 += 4; - } - while(T>shift) -1; - int32_t *x1 = x + (r3>>shift); - - register int32_t r0 = x0[0] + x1[0]; - register int32_t r1 = x1[1] - x0[1]; - - T-=step; - XPROD32( r0, r1, T[0], T[1], &r2, &r3 ); - - w1 -= 4; - - r0 = (x0[1] + x1[1])>>1; - r1 = (x0[0] - x1[0])>>1; - w0[0] = r0 + r2; - w0[1] = r1 + r3; - w1[2] = r0 - r2; - w1[3] = r3 - r1; - - r3 = bitrev12(bit++); - x0 = x + ((r3 ^ 0xfff)>>shift) -1; - x1 = x + (r3>>shift); - - r0 = x0[0] + x1[0]; - r1 = x1[1] - x0[1]; - - T-=step; - XPROD32( r0, r1, T[0], T[1], &r2, &r3 ); - - r0 = (x0[1] + x1[1])>>1; - r1 = (x0[0] - x1[0])>>1; - w0[2] = r0 + r2; - w0[3] = r1 + r3; - w1[0] = r0 - r2; - w1[1] = r3 - r1; - - w0 += 4; - } - while(w0>1; - int n4=n>>2; - int32_t *iX; - int32_t *oX; - const int32_t *T; - const int32_t *V; - int shift; - int step; - for (shift=6;!(n&(1<=in+n4); - do - { - oX-=4; - XPROD31( iX[4], iX[6], T[1], T[0], &oX[2], &oX[3] ); - T-=step; - XPROD31( iX[0], iX[2], T[1], T[0], &oX[0], &oX[1] ); - T-=step; - iX-=8; - } - while(iX>=in); - - iX = in+n2-8; - oX = out+n2+n4; - T = sincos_lookup0; - - do - { - T+=step; - XNPROD31( iX[6], iX[4], T[0], T[1], &oX[0], &oX[1] ); - T+=step; - XNPROD31( iX[2], iX[0], T[0], T[1], &oX[2], &oX[3] ); - iX-=8; - oX+=4; - } - while(iX>=in+n4); - do - { - T-=step; - XNPROD31( iX[6], iX[4], T[1], T[0], &oX[0], &oX[1] ); - T-=step; - XNPROD31( iX[2], iX[0], T[1], T[0], &oX[2], &oX[3] ); - iX-=8; - oX+=4; - } - while(iX>=in); - - mdct_butterflies(out+n2,n2,shift); - mdct_bitreverse(out,n,step,shift); - /* rotate + window */ - - step>>=2; - { - int32_t *oX1=out+n2+n4; - int32_t *oX2=out+n2+n4; - int32_t *iX =out; - - switch(step) - { - default: - { - T=(step>=4)?(sincos_lookup0+(step>>1)):sincos_lookup1; - do - { - oX1-=4; - XPROD31( iX[0], -iX[1], T[0], T[1], &oX1[3], &oX2[0] ); - T+=step; - XPROD31( iX[2], -iX[3], T[0], T[1], &oX1[2], &oX2[1] ); - T+=step; - XPROD31( iX[4], -iX[5], T[0], T[1], &oX1[1], &oX2[2] ); - T+=step; - XPROD31( iX[6], -iX[7], T[0], T[1], &oX1[0], &oX2[3] ); - T+=step; - oX2+=4; - iX+=8; - } - while(iX>1; - t1 = (*T++)>>1; - do - { - oX1-=4; - - t0 += (v0 = (*V++)>>1); - t1 += (v1 = (*V++)>>1); - XPROD31( iX[0], -iX[1], t0, t1, &oX1[3], &oX2[0] ); - v0 += (t0 = (*T++)>>1); - v1 += (t1 = (*T++)>>1); - XPROD31( iX[2], -iX[3], v0, v1, &oX1[2], &oX2[1] ); - t0 += (v0 = (*V++)>>1); - t1 += (v1 = (*V++)>>1); - XPROD31( iX[4], -iX[5], t0, t1, &oX1[1], &oX2[2] ); - v0 += (t0 = (*T++)>>1); - v1 += (t1 = (*T++)>>1); - XPROD31( iX[6], -iX[7], v0, v1, &oX1[0], &oX2[3] ); - - oX2+=4; - iX+=8; - } - while(iX>2); - t1 += (q1 = (v1-t1)>>2); - XPROD31( iX[0], -iX[1], t0, t1, &oX1[3], &oX2[0] ); - t0 = v0-q0; - t1 = v1-q1; - XPROD31( iX[2], -iX[3], t0, t1, &oX1[2], &oX2[1] ); - - t0 = *T++; - t1 = *T++; - v0 += (q0 = (t0-v0)>>2); - v1 += (q1 = (t1-v1)>>2); - XPROD31( iX[4], -iX[5], v0, v1, &oX1[1], &oX2[2] ); - v0 = t0-q0; - v1 = t1-q1; - XPROD31( iX[6], -iX[7], v0, v1, &oX1[0], &oX2[3] ); - - oX2+=4; - iX+=8; - } - while(iXoX2); - } -} diff --git a/bsp/stm32_radio/libwma/mdct2.h b/bsp/stm32_radio/libwma/mdct2.h deleted file mode 100644 index 2458b408b9..0000000000 --- a/bsp/stm32_radio/libwma/mdct2.h +++ /dev/null @@ -1,75 +0,0 @@ -/******************************************************************** - * * - * THIS FILE IS PART OF THE OggVorbis 'TREMOR' CODEC SOURCE CODE. * - * * - * USE, DISTRIBUTION AND REPRODUCTION OF THIS LIBRARY SOURCE IS * - * GOVERNED BY A BSD-STYLE SOURCE LICENSE INCLUDED WITH THIS SOURCE * - * IN 'COPYING'. PLEASE READ THESE TERMS BEFORE DISTRIBUTING. * - * * - * THE OggVorbis 'TREMOR' SOURCE CODE IS (C) COPYRIGHT 1994-2002 * - * BY THE Xiph.Org FOUNDATION http://www.xiph.org/ * - * * - ******************************************************************** - - function: modified discrete cosine transform prototypes - - ********************************************************************/ - -#ifndef _OGG_mdct_H_ -#define _OGG_mdct_H_ - -#include "ffmpeg_config.h" - -#ifdef _LOW_ACCURACY_ -# define X(n) (((((n)>>22)+1)>>1) - ((((n)>>22)+1)>>9)) -# //define LOOKUP_T const unsigned char -#else -# define X(n) (n) -# //define LOOKUP_T const ogg_int32_t -#endif - -// #include -#include "asm_arm.h" -// #include "asm_mcf5249.h" -// #include "codeclib_misc.h" - -#ifndef ICONST_ATTR_TREMOR_WINDOW -#define ICONST_ATTR_TREMOR_WINDOW ICONST_ATTR -#endif - -#ifndef ICODE_ATTR_TREMOR_MDCT -#define ICODE_ATTR_TREMOR_MDCT ICODE_ATTR -#endif - -#ifndef ICODE_ATTR_TREMOR_NOT_MDCT -#define ICODE_ATTR_TREMOR_NOT_MDCT ICODE_ATTR -#endif - - - -#ifdef _LOW_ACCURACY_ -#define cPI3_8 (0x0062) -#define cPI2_8 (0x00b5) -#define cPI1_8 (0x00ed) -#else -#define cPI3_8 (0x30fbc54d) -#define cPI2_8 (0x5a82799a) -#define cPI1_8 (0x7641af3d) -#endif - - -extern void mdct_backward(int n, int32_t *in, int32_t *out); - -#endif - - - - - - - - - - - - diff --git a/bsp/stm32_radio/libwma/mdct_arm.S b/bsp/stm32_radio/libwma/mdct_arm.S deleted file mode 100644 index 99320e8134..0000000000 --- a/bsp/stm32_radio/libwma/mdct_arm.S +++ /dev/null @@ -1,415 +0,0 @@ -cPI3_8 EQU 0x30fbc54d -cPI2_8 EQU 0x5a82799a -cPI1_8 EQU 0x7641af3d - - AREA |.text|, CODE, READONLY, ALIGN=2 - THUMB - REQUIRE8 - PRESERVE8 - -mdct_butterfly_8 PROC - add r9, r5, r1 ; x4 + x0 - sub r5, r5, r1 ; x4 - x0 - add r7, r6, r2 ; x5 + x1 - sub r6, r6, r2 ; x5 - x1 - add r8, r10, r3 ; x6 + x2 - sub r10, r10, r3 ; x6 - x2 - add r12, r11, r4 ; x7 + x3 - sub r11, r11, r4 ; x7 - x3 - - add r1, r10, r6 ; y0 = (x6 - x2) + (x5 - x1) - sub r2, r11, r5 ; y1 = (x7 - x3) - (x4 - x0) - sub r3, r10, r6 ; y2 = (x6 - x2) - (x5 - x1) - add r4, r11, r5 ; y3 = (x7 - x3) + (x4 - x0) - sub r5, r8, r9 ; y4 = (x6 + x2) - (x4 + x0) - sub r6, r12, r7 ; y5 = (x7 + x3) - (x5 + x1) - add r10, r8, r9 ; y6 = (x6 + x2) + (x4 + x0) - add r11, r12, r7 ; y7 = (x7 + x3) + (x5 + x1) - stmia r0, {r1, r2, r3, r4, r5, r6, r10, r11} - - bx lr - - ENDP - -mdct_butterfly_16 PROC - str lr, [sp, #-4]! - add r1, r0, #8*4 - - ldmia r0, {r2, r3, r4, r5} - ldmia r1, {r6, r7, r8, r9} - add r6, r6, r2 ; y8 = x8 + x0 - rsb r2, r6, r2, lsl #1 ; x0 - x8 - add r7, r7, r3 ; y9 = x9 + x1 - rsb r3, r7, r3, lsl #1 ; x1 - x9 - add r8, r8, r4 ; y10 = x10 + x2 - sub r11, r8, r4, lsl #1 ; x10 - x2 - add r9, r9, r5 ; y11 = x11 + x3 - rsb r10, r9, r5, lsl #1 ; x3 - x11 - - stmia r1!, {r6, r7, r8, r9} - - add r2, r2, r3 ; (x0 - x8) + (x1 - x9) - rsb r3, r2, r3, lsl #1 ; (x1 - x9) - (x0 - x8) - - ldr r12, =cPI2_8 - smull r8, r5, r12, r2 - smull r8, r6, r12, r3 - mov r5, r5, lsl #1 - mov r6, r6, lsl #1 - - stmia r0!, {r5, r6, r10, r11} - - ldmia r0, {r2, r3, r4, r5} - ldmia r1, {r6, r7, r8, r9} - add r6, r6, r2 ; y12 = x12 + x4 - sub r2, r6, r2, lsl #1 ; x12 - x4 - add r7, r7, r3 ; y13 = x13 + x5 - sub r3, r7, r3, lsl #1 ; x13 - x5 - add r8, r8, r4 ; y10 = x14 + x6 - sub r10, r8, r4, lsl #1 ; x14 - x6 - add r9, r9, r5 ; y11 = x15 + x7 - sub r11, r9, r5, lsl #1 ; x15 - x7 - - stmia r1, {r6, r7, r8, r9} - - sub r2, r2, r3 ; (x12 - x4) - (x13 - x5) - add r3, r2, r3, lsl #1 ; (x12 - x4) + (x13 - x5) - - smull r8, r5, r12, r2 - smull r8, r6, r12, r3 - mov r5, r5, lsl #1 - mov r6, r6, lsl #1 - ; no stmia here, r5, r6, r10, r11 are passed to mdct_butterfly_8 - - sub r0, r0, #4*4 - ldmia r0, {r1, r2, r3, r4} - bl mdct_butterfly_8 - add r0, r0, #8*4 - ldmia r0, {r1, r2, r3, r4, r5, r6, r10, r11} - bl mdct_butterfly_8 - - ldr pc, [sp], #4 - - ENDP - -mdct_butterfly_32 PROC - EXPORT mdct_butterfly_32 - - stmdb sp!, {r4-r11, lr} - - add r1, r0, #16*4 - - ldmia r0, {r2, r3, r4, r5} - ldmia r1, {r6, r7, r8, r9} - add r6, r6, r2 ; y16 = x16 + x0 - rsb r2, r6, r2, lsl #1 ; x0 - x16 - add r7, r7, r3 ; y17 = x17 + x1 - rsb r3, r7, r3, lsl #1 ; x1 - x17 - add r8, r8, r4 ; y18 = x18 + x2 - rsb r4, r8, r4, lsl #1 ; x2 - x18 - add r9, r9, r5 ; y19 = x19 + x3 - rsb r5, r9, r5, lsl #1 ; x3 - x19 - - stmia r1!, {r6, r7, r8, r9} - - ldr r12, =cPI1_8 - ldr lr, =cPI3_8 - smull r10, r6, r12, r2 - rsb r2, r2, #0 - smlal r10, r6, lr, r3 - smull r10, r7, r12, r3 - smlal r10, r7, lr, r2 - mov r6, r6, lsl #1 - mov r7, r7, lsl #1 - - add r4, r4, r5 ; (x3 - x19) + (x2 - x18) - rsb r5, r4, r5, lsl #1 ; (x3 - x19) - (x2 - x18) - - ldr r11, =cPI2_8 - smull r10, r8, r4, r11 - smull r10, r9, r5, r11 - mov r8, r8, lsl #1 - mov r9, r9, lsl #1 - - stmia r0!, {r6, r7, r8, r9} - - ldmia r0, {r2, r3, r4, r5} - ldmia r1, {r6, r7, r8, r9} - add r6, r6, r2 ; y20 = x20 + x4 - rsb r2, r6, r2, lsl #1 ; x4 - x20 - add r7, r7, r3 ; y21 = x21 + x5 - rsb r3, r7, r3, lsl #1 ; x5 - x21 - add r8, r8, r4 ; y22 = x22 + x6 - sub r4, r8, r4, lsl #1 ; x22 - x6 - add r9, r9, r5 ; y23 = x23 + x7 - rsb r5, r9, r5, lsl #1 ; x7 - x23 - - stmia r1!, {r6, r7, r8, r9} - - smull r10, r6, lr, r2 - rsb r2, r2, #0 - smlal r10, r6, r12, r3 - smull r10, r7, lr, r3 - smlal r10, r7, r12, r2 - mov r6, r6, lsl #1 - mov r7, r7, lsl #1 - - mov r8, r5 - mov r9, r4 - stmia r0!, {r6, r7, r8, r9} - - ldmia r0, {r2, r3, r4, r5} - ldmia r1, {r6, r7, r8, r9} - add r6, r6, r2 ; y24 = x24 + x8 - sub r2, r6, r2, lsl #1 ; x24 - x8 - add r7, r7, r3 ; y25 = x25 + x9 - sub r3, r7, r3, lsl #1 ; x25 - x9 - add r8, r8, r4 ; y26 = x26 + x10 - sub r4, r8, r4, lsl #1 ; x26 - x10 - add r9, r9, r5 ; y27 = x27 + x11 - sub r5, r9, r5, lsl #1 ; x27 - x11 - - stmia r1!, {r6, r7, r8, r9} - - smull r10, r7, lr, r3 - rsb r3, r3, #0 - smlal r10, r7, r12, r2 - smull r10, r6, r12, r3 - smlal r10, r6, lr, r2 - mov r6, r6, lsl #1 - mov r7, r7, lsl #1 - - sub r4, r4, r5 ; (x26 - x10) - (x27 - x11) - add r5, r4, r5, lsl #1 ; (x26 - x10) + (x27 - x11) - - ldr r11, =cPI2_8 - smull r10, r8, r11, r4 - smull r10, r9, r11, r5 - mov r8, r8, lsl #1 - mov r9, r9, lsl #1 - - stmia r0!, {r6, r7, r8, r9} - - ldmia r0, {r2, r3, r4, r5} - ldmia r1, {r6, r7, r8, r9} - add r6, r6, r2 ; y28 = x28 + x12 - sub r2, r6, r2, lsl #1 ; x28 - x12 - add r7, r7, r3 ; y29 = x29 + x13 - sub r3, r7, r3, lsl #1 ; x29 - x13 - add r8, r8, r4 ; y30 = x30 + x14 - sub r4, r8, r4, lsl #1 ; x30 - x14 - add r9, r9, r5 ; y31 = x31 + x15 - sub r5, r9, r5, lsl #1 ; x31 - x15 - - stmia r1, {r6, r7, r8, r9} - - smull r10, r7, r12, r3 - rsb r3, r3, #0 - smlal r10, r7, lr, r2 - smull r10, r6, lr, r3 - smlal r10, r6, r12, r2 - mov r6, r6, lsl #1 - mov r7, r7, lsl #1 - - mov r8, r4 - mov r9, r5 - stmia r0, {r6, r7, r8, r9} - - sub r0, r0, #12*4 - str r0, [sp, #-4]! - bl mdct_butterfly_16 - - ldr r0, [sp], #4 - add r0, r0, #16*4 - bl mdct_butterfly_16 - - ldmia sp!, {r4-r11, pc} - - ENDP - - ; mdct_butterfly_generic_loop(x1, x2, T0, step, Ttop) -mdct_butterfly_generic_loop PROC - EXPORT mdct_butterfly_generic_loop - stmdb sp!, {r4-r11, lr} - str r2, [sp, #-4] - ldr r4, [sp, #36] - -label_1 - ldmdb r0, {r6, r7, r8, r9} - ldmdb r1, {r10, r11, r12, r14} - - add r6, r6, r10 - sub r10, r6, r10, lsl #1 - add r7, r7, r11 - rsb r11, r7, r11, lsl #1 - add r8, r8, r12 - sub r12, r8, r12, lsl #1 - add r9, r9, r14 - rsb r14, r9, r14, lsl #1 - - stmdb r0!, {r6, r7, r8, r9} - - ldmia r2, {r6, r7} - smull r5, r8, r6, r14 - rsb r14, r14, #0 - smlal r5, r8, r7, r12 - smull r5, r9, r6, r12 - smlal r5, r9, r7, r14 - - mov r8, r8, lsl #1 - mov r9, r9, lsl #1 - stmdb r1!, {r8, r9} - add r2, r2, r3, lsl #2 - - ldmia r2, {r6, r7} - smull r5, r8, r6, r11 - rsb r11, r11, #0 - smlal r5, r8, r7, r10 - smull r5, r9, r6, r10 - smlal r5, r9, r7, r11 - - mov r8, r8, lsl #1 - mov r9, r9, lsl #1 - stmdb r1!, {r8, r9} - add r2, r2, r3, lsl #2 - - cmp r2, r4 - blo label_1 - - ldr r4, [sp, #-4] - -label_2 - ldmdb r0, {r6, r7, r8, r9} - ldmdb r1, {r10, r11, r12, r14} - - add r6, r6, r10 - sub r10, r6, r10, lsl #1 - add r7, r7, r11 - sub r11, r7, r11, lsl #1 - add r8, r8, r12 - sub r12, r8, r12, lsl #1 - add r9, r9, r14 - sub r14, r9, r14, lsl #1 - - stmdb r0!, {r6, r7, r8, r9} - - ldmia r2, {r6, r7} - smull r5, r9, r6, r14 - rsb r14, r14, #0 - smlal r5, r9, r7, r12 - smull r5, r8, r6, r12 - smlal r5, r8, r7, r14 - - mov r8, r8, lsl #1 - mov r9, r9, lsl #1 - stmdb r1!, {r8, r9} - sub r2, r2, r3, lsl #2 - - ldmia r2, {r6, r7} - smull r5, r9, r6, r11 - rsb r11, r11, #0 - smlal r5, r9, r7, r10 - smull r5, r8, r6, r10 - smlal r5, r8, r7, r11 - - mov r8, r8, lsl #1 - mov r9, r9, lsl #1 - stmdb r1!, {r8, r9} - sub r2, r2, r3, lsl #2 - - cmp r2, r4 - bhi label_2 - - ldr r4, [sp, #36] - -label_3 - ldmdb r0, {r6, r7, r8, r9} - ldmdb r1, {r10, r11, r12, r14} - - add r6, r6, r10 - rsb r10, r6, r10, lsl #1 - add r7, r7, r11 - rsb r11, r7, r11, lsl #1 - add r8, r8, r12 - rsb r12, r8, r12, lsl #1 - add r9, r9, r14 - rsb r14, r9, r14, lsl #1 - - stmdb r0!, {r6, r7, r8, r9} - - ldmia r2, {r6, r7} - smull r5, r8, r6, r12 - rsb r12, r12, #0 - smlal r5, r8, r7, r14 - smull r5, r9, r6, r14 - smlal r5, r9, r7, r12 - - mov r8, r8, lsl #1 - mov r9, r9, lsl #1 - stmdb r1!, {r8, r9} - add r2, r2, r3, lsl #2 - - ldmia r2, {r6, r7} - smull r5, r8, r6, r10 - rsb r10, r10, #0 - smlal r5, r8, r7, r11 - smull r5, r9, r6, r11 - smlal r5, r9, r7, r10 - - mov r8, r8, lsl #1 - mov r9, r9, lsl #1 - stmdb r1!, {r8, r9} - add r2, r2, r3, lsl #2 - - cmp r2, r4 - blo label_3 - - ldr r4, [sp, #-4] - -label_4 - ldmdb r0, {r6, r7, r8, r9} - ldmdb r1, {r10, r11, r12, r14} - - add r6, r6, r10 - sub r10, r6, r10, lsl #1 - add r7, r7, r11 - rsb r11, r7, r11, lsl #1 - add r8, r8, r12 - sub r12, r8, r12, lsl #1 - add r9, r9, r14 - rsb r14, r9, r14, lsl #1 - - stmdb r0!, {r6, r7, r8, r9} - - ldmia r2, {r6, r7} - smull r5, r9, r6, r12 - smlal r5, r9, r7, r14 - rsb r12, r12, #0 - smull r5, r8, r6, r14 - smlal r5, r8, r7, r12 - - mov r8, r8, lsl #1 - mov r9, r9, lsl #1 - stmdb r1!, {r8, r9} - sub r2, r2, r3, lsl #2 - - ldmia r2, {r6, r7} - smull r5, r9, r6, r10 - rsb r10, r10, #0 - smlal r5, r9, r7, r11 - smull r5, r8, r6, r11 - smlal r5, r8, r7, r10 - - mov r8, r8, lsl #1 - mov r9, r9, lsl #1 - stmdb r1!, {r8, r9} - sub r2, r2, r3, lsl #2 - - cmp r2, r4 - bhi label_4 - - ldmia sp!, {r4-r11, pc} - - ENDP - - END diff --git a/bsp/stm32_radio/libwma/mdct_lookup.h b/bsp/stm32_radio/libwma/mdct_lookup.h deleted file mode 100644 index 45cee5f60e..0000000000 --- a/bsp/stm32_radio/libwma/mdct_lookup.h +++ /dev/null @@ -1,544 +0,0 @@ -/******************************************************************** - * * - * THIS FILE IS PART OF THE OggVorbis 'TREMOR' CODEC SOURCE CODE. * - * * - * USE, DISTRIBUTION AND REPRODUCTION OF THIS LIBRARY SOURCE IS * - * GOVERNED BY A BSD-STYLE SOURCE LICENSE INCLUDED WITH THIS SOURCE * - * IN 'COPYING'. PLEASE READ THESE TERMS BEFORE DISTRIBUTING. * - * * - * THE OggVorbis 'TREMOR' SOURCE CODE IS (C) COPYRIGHT 1994-2002 * - * BY THE Xiph.Org FOUNDATION http://www.xiph.org/ * - * * - ******************************************************************** - - function: sin,cos lookup tables - - ********************************************************************/ - - - - - - - -/* {sin(2*i*PI/4096), cos(2*i*PI/4096)}, with i = 0 to 512 */ -static const int32_t sincos_lookup0[1026] = { - X(0x00000000), X(0x7fffffff), X(0x003243f5), X(0x7ffff621), - X(0x006487e3), X(0x7fffd886), X(0x0096cbc1), X(0x7fffa72c), - X(0x00c90f88), X(0x7fff6216), X(0x00fb5330), X(0x7fff0943), - X(0x012d96b1), X(0x7ffe9cb2), X(0x015fda03), X(0x7ffe1c65), - X(0x01921d20), X(0x7ffd885a), X(0x01c45ffe), X(0x7ffce093), - X(0x01f6a297), X(0x7ffc250f), X(0x0228e4e2), X(0x7ffb55ce), - X(0x025b26d7), X(0x7ffa72d1), X(0x028d6870), X(0x7ff97c18), - X(0x02bfa9a4), X(0x7ff871a2), X(0x02f1ea6c), X(0x7ff75370), - X(0x03242abf), X(0x7ff62182), X(0x03566a96), X(0x7ff4dbd9), - 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X(0x4869e665), X(0x698c246c), X(0x48935397), X(0x696fac78), - X(0x48bcb599), X(0x69532442), X(0x48e60c62), X(0x69368bce), - X(0x490f57ee), X(0x6919e320), X(0x49389836), X(0x68fd2a3d), - X(0x4961cd33), X(0x68e06129), X(0x498af6df), X(0x68c387e9), - X(0x49b41533), X(0x68a69e81), X(0x49dd282a), X(0x6889a4f6), - X(0x4a062fbd), X(0x686c9b4b), X(0x4a2f2be6), X(0x684f8186), - X(0x4a581c9e), X(0x683257ab), X(0x4a8101de), X(0x68151dbe), - X(0x4aa9dba2), X(0x67f7d3c5), X(0x4ad2a9e2), X(0x67da79c3), - X(0x4afb6c98), X(0x67bd0fbd), X(0x4b2423be), X(0x679f95b7), - X(0x4b4ccf4d), X(0x67820bb7), X(0x4b756f40), X(0x676471c0), - X(0x4b9e0390), X(0x6746c7d8), X(0x4bc68c36), X(0x67290e02), - X(0x4bef092d), X(0x670b4444), X(0x4c177a6e), X(0x66ed6aa1), - X(0x4c3fdff4), X(0x66cf8120), X(0x4c6839b7), X(0x66b187c3), - X(0x4c9087b1), X(0x66937e91), X(0x4cb8c9dd), X(0x6675658c), - X(0x4ce10034), X(0x66573cbb), X(0x4d092ab0), X(0x66390422), - X(0x4d31494b), X(0x661abbc5), X(0x4d595bfe), X(0x65fc63a9), - X(0x4d8162c4), X(0x65ddfbd3), X(0x4da95d96), X(0x65bf8447), - X(0x4dd14c6e), X(0x65a0fd0b), X(0x4df92f46), X(0x65826622), - X(0x4e210617), X(0x6563bf92), X(0x4e48d0dd), X(0x6545095f), - X(0x4e708f8f), X(0x6526438f), X(0x4e984229), X(0x65076e25), - X(0x4ebfe8a5), X(0x64e88926), X(0x4ee782fb), X(0x64c99498), - X(0x4f0f1126), X(0x64aa907f), X(0x4f369320), X(0x648b7ce0), - X(0x4f5e08e3), X(0x646c59bf), X(0x4f857269), X(0x644d2722), - X(0x4faccfab), X(0x642de50d), X(0x4fd420a4), X(0x640e9386), - X(0x4ffb654d), X(0x63ef3290), X(0x50229da1), X(0x63cfc231), - X(0x5049c999), X(0x63b0426d), X(0x5070e92f), X(0x6390b34a), - X(0x5097fc5e), X(0x637114cc), X(0x50bf031f), X(0x635166f9), - X(0x50e5fd6d), X(0x6331a9d4), X(0x510ceb40), X(0x6311dd64), - X(0x5133cc94), X(0x62f201ac), X(0x515aa162), X(0x62d216b3), - X(0x518169a5), X(0x62b21c7b), X(0x51a82555), X(0x6292130c), - X(0x51ced46e), X(0x6271fa69), X(0x51f576ea), X(0x6251d298), - X(0x521c0cc2), X(0x62319b9d), X(0x524295f0), X(0x6211557e), - X(0x5269126e), X(0x61f1003f), X(0x528f8238), X(0x61d09be5), - X(0x52b5e546), X(0x61b02876), X(0x52dc3b92), X(0x618fa5f7), - X(0x53028518), X(0x616f146c), X(0x5328c1d0), X(0x614e73da), - X(0x534ef1b5), X(0x612dc447), X(0x537514c2), X(0x610d05b7), - X(0x539b2af0), X(0x60ec3830), X(0x53c13439), X(0x60cb5bb7), - X(0x53e73097), X(0x60aa7050), X(0x540d2005), X(0x60897601), - X(0x5433027d), X(0x60686ccf), X(0x5458d7f9), X(0x604754bf), - X(0x547ea073), X(0x60262dd6), X(0x54a45be6), X(0x6004f819), - X(0x54ca0a4b), X(0x5fe3b38d), X(0x54efab9c), X(0x5fc26038), - X(0x55153fd4), X(0x5fa0fe1f), X(0x553ac6ee), X(0x5f7f8d46), - X(0x556040e2), X(0x5f5e0db3), X(0x5585adad), X(0x5f3c7f6b), - X(0x55ab0d46), X(0x5f1ae274), X(0x55d05faa), X(0x5ef936d1), - X(0x55f5a4d2), X(0x5ed77c8a), X(0x561adcb9), X(0x5eb5b3a2), - X(0x56400758), X(0x5e93dc1f), X(0x566524aa), X(0x5e71f606), - X(0x568a34a9), X(0x5e50015d), X(0x56af3750), X(0x5e2dfe29), - X(0x56d42c99), X(0x5e0bec6e), X(0x56f9147e), X(0x5de9cc33), - X(0x571deefa), X(0x5dc79d7c), X(0x5742bc06), X(0x5da5604f), - X(0x57677b9d), X(0x5d8314b1), X(0x578c2dba), X(0x5d60baa7), - X(0x57b0d256), X(0x5d3e5237), X(0x57d5696d), X(0x5d1bdb65), - X(0x57f9f2f8), X(0x5cf95638), X(0x581e6ef1), X(0x5cd6c2b5), - X(0x5842dd54), X(0x5cb420e0), X(0x58673e1b), X(0x5c9170bf), - X(0x588b9140), X(0x5c6eb258), X(0x58afd6bd), X(0x5c4be5b0), - X(0x58d40e8c), X(0x5c290acc), X(0x58f838a9), X(0x5c0621b2), - X(0x591c550e), X(0x5be32a67), X(0x594063b5), X(0x5bc024f0), - X(0x59646498), X(0x5b9d1154), X(0x598857b2), X(0x5b79ef96), - X(0x59ac3cfd), X(0x5b56bfbd), X(0x59d01475), X(0x5b3381ce), - X(0x59f3de12), X(0x5b1035cf), X(0x5a1799d1), X(0x5aecdbc5), - X(0x5a3b47ab), X(0x5ac973b5), X(0x5a5ee79a), X(0x5aa5fda5), - X(0x5a82799a), X(0x5a82799a) - }; - - /* {sin((2*i+1)*PI/4096), cos((2*i+1)*PI/4096)}, with i = 0 to 511 */ -static const int32_t sincos_lookup1[1024] = { - X(0x001921fb), X(0x7ffffd88), X(0x004b65ee), X(0x7fffe9cb), - X(0x007da9d4), X(0x7fffc251), X(0x00afeda8), X(0x7fff8719), - X(0x00e23160), X(0x7fff3824), X(0x011474f6), X(0x7ffed572), - X(0x0146b860), X(0x7ffe5f03), X(0x0178fb99), X(0x7ffdd4d7), - X(0x01ab3e97), X(0x7ffd36ee), X(0x01dd8154), X(0x7ffc8549), - X(0x020fc3c6), X(0x7ffbbfe6), X(0x024205e8), X(0x7ffae6c7), - X(0x027447b0), X(0x7ff9f9ec), X(0x02a68917), X(0x7ff8f954), - X(0x02d8ca16), X(0x7ff7e500), X(0x030b0aa4), X(0x7ff6bcf0), - X(0x033d4abb), X(0x7ff58125), X(0x036f8a51), X(0x7ff4319d), - X(0x03a1c960), X(0x7ff2ce5b), X(0x03d407df), X(0x7ff1575d), - X(0x040645c7), X(0x7fefcca4), X(0x04388310), X(0x7fee2e30), - X(0x046abfb3), X(0x7fec7c02), X(0x049cfba7), X(0x7feab61a), - X(0x04cf36e5), X(0x7fe8dc78), X(0x05017165), X(0x7fe6ef1c), - X(0x0533ab20), X(0x7fe4ee06), X(0x0565e40d), X(0x7fe2d938), - X(0x05981c26), X(0x7fe0b0b1), X(0x05ca5361), X(0x7fde7471), - X(0x05fc89b8), X(0x7fdc247a), X(0x062ebf22), X(0x7fd9c0ca), - X(0x0660f398), X(0x7fd74964), X(0x06932713), X(0x7fd4be46), - X(0x06c5598a), X(0x7fd21f72), X(0x06f78af6), X(0x7fcf6ce8), - X(0x0729bb4e), X(0x7fcca6a7), X(0x075bea8c), X(0x7fc9ccb2), - X(0x078e18a7), X(0x7fc6df08), X(0x07c04598), X(0x7fc3dda9), - X(0x07f27157), X(0x7fc0c896), X(0x08249bdd), X(0x7fbd9fd0), - X(0x0856c520), X(0x7fba6357), X(0x0888ed1b), X(0x7fb7132b), - X(0x08bb13c5), X(0x7fb3af4e), X(0x08ed3916), X(0x7fb037bf), - X(0x091f5d06), X(0x7facac7f), X(0x09517f8f), X(0x7fa90d8e), - X(0x0983a0a7), X(0x7fa55aee), X(0x09b5c048), X(0x7fa1949e), - X(0x09e7de6a), X(0x7f9dbaa0), X(0x0a19fb04), X(0x7f99ccf4), - X(0x0a4c1610), X(0x7f95cb9a), X(0x0a7e2f85), X(0x7f91b694), - X(0x0ab0475c), X(0x7f8d8de1), X(0x0ae25d8d), X(0x7f895182), - X(0x0b147211), X(0x7f850179), X(0x0b4684df), X(0x7f809dc5), - X(0x0b7895f0), X(0x7f7c2668), X(0x0baaa53b), X(0x7f779b62), - X(0x0bdcb2bb), X(0x7f72fcb4), X(0x0c0ebe66), X(0x7f6e4a5e), - X(0x0c40c835), X(0x7f698461), X(0x0c72d020), X(0x7f64aabf), - X(0x0ca4d620), X(0x7f5fbd77), X(0x0cd6da2d), X(0x7f5abc8a), - X(0x0d08dc3f), X(0x7f55a7fa), X(0x0d3adc4e), X(0x7f507fc7), - X(0x0d6cda53), X(0x7f4b43f2), X(0x0d9ed646), X(0x7f45f47b), - X(0x0dd0d01f), X(0x7f409164), X(0x0e02c7d7), X(0x7f3b1aad), - X(0x0e34bd66), X(0x7f359057), X(0x0e66b0c3), X(0x7f2ff263), - X(0x0e98a1e9), X(0x7f2a40d2), X(0x0eca90ce), X(0x7f247ba5), - X(0x0efc7d6b), X(0x7f1ea2dc), X(0x0f2e67b8), X(0x7f18b679), - X(0x0f604faf), X(0x7f12b67c), X(0x0f923546), X(0x7f0ca2e7), - X(0x0fc41876), X(0x7f067bba), X(0x0ff5f938), X(0x7f0040f6), - X(0x1027d784), X(0x7ef9f29d), X(0x1059b352), X(0x7ef390ae), - X(0x108b8c9b), X(0x7eed1b2c), X(0x10bd6356), X(0x7ee69217), - X(0x10ef377d), X(0x7edff570), X(0x11210907), X(0x7ed94538), - X(0x1152d7ed), X(0x7ed28171), X(0x1184a427), X(0x7ecbaa1a), - X(0x11b66dad), X(0x7ec4bf36), X(0x11e83478), X(0x7ebdc0c6), - X(0x1219f880), X(0x7eb6aeca), X(0x124bb9be), X(0x7eaf8943), - X(0x127d7829), X(0x7ea85033), X(0x12af33ba), X(0x7ea1039b), - X(0x12e0ec6a), X(0x7e99a37c), X(0x1312a230), X(0x7e922fd6), - X(0x13445505), X(0x7e8aa8ac), X(0x137604e2), X(0x7e830dff), - X(0x13a7b1bf), X(0x7e7b5fce), X(0x13d95b93), X(0x7e739e1d), - X(0x140b0258), X(0x7e6bc8eb), X(0x143ca605), X(0x7e63e03b), - X(0x146e4694), X(0x7e5be40c), X(0x149fe3fc), X(0x7e53d462), - X(0x14d17e36), X(0x7e4bb13c), X(0x1503153a), X(0x7e437a9c), - X(0x1534a901), X(0x7e3b3083), X(0x15663982), X(0x7e32d2f4), - X(0x1597c6b7), X(0x7e2a61ed), X(0x15c95097), X(0x7e21dd73), - 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-#define fixed32 int32_t -#define fixed64 int64_t diff --git a/bsp/stm32_radio/libwma/wma_arm.S b/bsp/stm32_radio/libwma/wma_arm.S deleted file mode 100644 index 73f8e11c17..0000000000 --- a/bsp/stm32_radio/libwma/wma_arm.S +++ /dev/null @@ -1,96 +0,0 @@ - AREA |.text|, CODE, READONLY, ALIGN=2 - THUMB - REQUIRE8 - PRESERVE8 - -MULT32 PROC - EXPORT MULT32 - MOV r2,r0 - SMULL r1,r0,r2,r1 - BX lr - ENDP - -MULT31 PROC - EXPORT MULT31 - SMULL r2,r1,r0,r1 - LSL r0,r1,#1 - BX lr - ENDP - -MULT31_SHIFT15 PROC - EXPORT MULT31_SHIFT15 - - SMULL r2,r1,r0,r1 - LSRS r0,r2,#15 - ADC r0,r0,r1,LSL #17 - BX lr - - ENDP - -XPROD32 PROC - EXPORT XPROD32 - - PUSH {r4,r5,lr} - SMULL lr,r12,r0,r2 - SMLAL lr,r12,r1,r3 - RSB lr,r0,#0 - SMULL r2,r0,r1,r2 - SMLAL r2,r0,lr,r3 - LDR r4,[sp,#0xc] - LDR r5,[sp,#0x10] - STR r12,[r4,#0] - STR r0,[r5,#0] - POP {r4,r5,pc} - - ENDP - -XPROD31 PROC - EXPORT XPROD31 - - PUSH {r4,r5,lr} - SMULL lr,r12,r0,r2 - SMLAL lr,r12,r1,r3 - RSB lr,r0,#0 - SMULL r2,r0,r1,r2 - SMLAL r2,r0,lr,r3 - LDR r4,[sp,#0xc] - LDR r5,[sp,#0x10] - LSL r1,r12,#1 - LSL r0,r0,#1 - STR r1,[r4,#0] - STR r0,[r5,#0] - POP {r4,r5,pc} - - ENDP - -XNPROD31 PROC - EXPORT XNPROD31 - - PUSH {r4-r6,lr} - SMULL r4,r12,r0,r2 - RSB lr,r1,#0 - SMLAL r4,r12,lr,r3 - SMULL lr,r2,r1,r2 - SMLAL lr,r2,r0,r3 - LDR r5,[sp,#0x10] - LDR r6,[sp,#0x14] - LSL r0,r12,#1 - STR r0,[r5,#0] - LSL r0,r2,#1 - STR r0,[r6,#0] - POP {r4-r6,pc} - - ENDP - -CLIP_TO_15 PROC - EXPORT CLIP_TO_15 - - SUBS r1, r0, #0x8000 - MOVPL r0, #0x7f00 - ORRPL r0, r0, #0xff - ADDS r1, r0, #0x8000 - MOVMI r0,#0x8000 - BX lr - ENDP - - END diff --git a/bsp/stm32_radio/libwma/wmabitstream.c b/bsp/stm32_radio/libwma/wmabitstream.c deleted file mode 100644 index ba66b9ec48..0000000000 --- a/bsp/stm32_radio/libwma/wmabitstream.c +++ /dev/null @@ -1,271 +0,0 @@ -/* - * Common bit i/o utils - * Copyright (c) 2000, 2001 Fabrice Bellard. - * Copyright (c) 2002-2004 Michael Niedermayer - * - * This file is part of FFmpeg. - * - * FFmpeg is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * FFmpeg is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with FFmpeg; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA - * - * alternative bitstream reader & writer by Michael Niedermayer - */ - -/** - * @file bitstream.c - * bitstream api. - */ - -#include "wmabitstream.h" -#include "codeclib.h" - -/** - * Same as av_mallocz_static(), but does a realloc. - * - * @param[in] ptr The block of memory to reallocate. - * @param[in] size The requested size. - * @return Block of memory of requested size. - * @deprecated. Code which uses ff_realloc_static is broken/missdesigned - * and should correctly use static arrays - */ -attribute_deprecated void *ff_realloc_static(void *ptr, unsigned int size); - - -const uint8_t ff_sqrt_tab[128]={ - 0, 1, 1, 1, 2, 2, 2, 2, 2, 3, 3, 3, 3, 3, 3, 3, 4, 4, 4, 4, 4, 4, 4, 4, 4, 5, 5, 5, 5, 5, 5, 5, - 5, 5, 5, 5, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, - 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, - 9, 9, 9, 9,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,11,11,11,11,11,11,11 -}; - -const uint8_t ff_log2_tab[256]={ - 0,0,1,1,2,2,2,2,3,3,3,3,3,3,3,3,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4, - 5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5, - 6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6, - 6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6, - 7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7, - 7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7, - 7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7, - 7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7 -}; - - -void align_put_bits(PutBitContext *s) -{ -#ifdef ALT_BITSTREAM_WRITER - put_bits(s,( - s->index) & 7,0); -#else - put_bits(s,s->bit_left & 7,0); -#endif -} - -void ff_put_string(PutBitContext * pbc, char *s, int put_zero) -{ - while(*s){ - put_bits(pbc, 8, *s); - s++; - } - if(put_zero) - put_bits(pbc, 8, 0); -} - -/* VLC decoding */ - -//#define DEBUG_VLC - -#define GET_DATA(v, table, i, wrap, size) \ -{\ - const uint8_t *ptr = (const uint8_t *)table + i * wrap;\ - switch(size) {\ - case 1:\ - v = *(const uint8_t *)ptr;\ - break;\ - case 2:\ - v = *(const uint16_t *)ptr;\ - break;\ - default:\ - v = *(const uint32_t *)ptr;\ - break;\ - }\ -} - - -static int alloc_table(VLC *vlc, int size) -{ - int index; - index = vlc->table_size; - vlc->table_size += size; - if (vlc->table_size > vlc->table_allocated) { - DEBUGF("Tried to allocate past the end of a Huffman table: %d/%d\n", - vlc->table_allocated, vlc->table_allocated+(1 << vlc->bits)); - vlc->table_allocated += (1 << vlc->bits); - if (!vlc->table) - return -1; - } - return index; -} - -static int build_table(VLC *vlc, int table_nb_bits, - int nb_codes, - const void *bits, int bits_wrap, int bits_size, - const void *codes, int codes_wrap, int codes_size, - uint32_t code_prefix, int n_prefix) -{ - int i, j, k, n, table_size, table_index, nb, n1, index, code_prefix2; - uint32_t code; - int flags = 0; - VLC_TYPE (*table)[2]; - - table_size = 1 << table_nb_bits; - table_index = alloc_table(vlc, table_size); -#ifdef DEBUG_VLC - printf("new table index=%d size=%d code_prefix=%x n=%d\n", - table_index, table_size, code_prefix, n_prefix); -#endif - if (table_index < 0) - return -1; - table = &vlc->table[table_index]; - - for(i=0;i=32 ? 0xffffffff : (uint32_t)(1 << n_prefix)-1); - else - code_prefix2= code >> n; - if (n > 0 && (int)code_prefix2 == (int)code_prefix) { - if (n <= table_nb_bits) { - /* no need to add another table */ - j = (code << (table_nb_bits - n)) & (table_size - 1); - nb = 1 << (table_nb_bits - n); - for(k=0;k> n_prefix) + (k<> ((flags & INIT_VLC_LE) ? n_prefix : n)) & ((1 << table_nb_bits) - 1); -#ifdef DEBUG_VLC - av_log(NULL, 0,"%4x: n=%d (subtable)\n", - j, n); -#endif - /* compute table size */ - n1 = -table[j][1]; //bits - if (n > n1) - n1 = n; - table[j][1] = -n1; //bits - } - } - } - - /* second pass : fill auxillary tables recursively */ - for(i=0;i table_nb_bits) { - n = table_nb_bits; - table[i][1] = -n; //bits - } - index = build_table(vlc, n, nb_codes, - bits, bits_wrap, bits_size, - codes, codes_wrap, codes_size, - (flags & INIT_VLC_LE) ? (code_prefix | (i << n_prefix)) : ((code_prefix << table_nb_bits) | i), - n_prefix + table_nb_bits); - if (index < 0) - return -1; - /* note: realloc has been done, so reload tables */ - table = &vlc->table[table_index]; - table[i][0] = index; //code - } - } - return table_index; -} - - -/* Build VLC decoding tables suitable for use with get_vlc(). - - 'nb_bits' set thee decoding table size (2^nb_bits) entries. The - bigger it is, the faster is the decoding. But it should not be too - big to save memory and L1 cache. '9' is a good compromise. - - 'nb_codes' : number of vlcs codes - - 'bits' : table which gives the size (in bits) of each vlc code. - - 'codes' : table which gives the bit pattern of of each vlc code. - - 'xxx_wrap' : give the number of bytes between each entry of the - 'bits' or 'codes' tables. - - 'xxx_size' : gives the number of bytes of each entry of the 'bits' - or 'codes' tables. - - 'wrap' and 'size' allows to use any memory configuration and types - (byte/word/long) to store the 'bits' and 'codes' tables. - - 'use_static' should be set to 1 for tables, which should be freed - with av_free_static(), 0 if free_vlc() will be used. -*/ -int init_vlc(VLC *vlc, int nb_bits, int nb_codes, - const void *bits, int bits_wrap, int bits_size, - const void *codes, int codes_wrap, int codes_size, - int flags) -{ - - vlc->bits = nb_bits; - vlc->table_size = 0; - -#ifdef DEBUG_VLC - printf("build table nb_codes=%d\n", nb_codes); -#endif - - if (build_table(vlc, nb_bits, nb_codes, - bits, bits_wrap, bits_size, - codes, codes_wrap, codes_size, - 0, 0) < 0) { - //av_free(vlc->table); - return -1; - } - /* return flags to block gcc warning while allowing us to keep - * consistent with ffmpeg's function parameters - */ - return flags; -} - - diff --git a/bsp/stm32_radio/libwma/wmabitstream.h b/bsp/stm32_radio/libwma/wmabitstream.h deleted file mode 100644 index 77ccff695e..0000000000 --- a/bsp/stm32_radio/libwma/wmabitstream.h +++ /dev/null @@ -1,989 +0,0 @@ -/* - * copyright (c) 2004 Michael Niedermayer - * - * This file is part of FFmpeg. - * - * FFmpeg is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * FFmpeg is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with FFmpeg; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA - */ - -/** - * @file bitstream.h - * bitstream api header. - */ - -#ifndef BITSTREAM_H -#define BITSTREAM_H - -#define av_always_inline inline -#define attribute_deprecated - -#include -#include "ffmpeg_config.h" -#include - -#include "bswap.h" - -extern const uint8_t ff_log2_tab[256]; - - -/*misc utility functions added to make it compile */ -static inline int av_log2(unsigned int v) -{ - int n; - - n = 0; - if (v & 0xffff0000) { - v >>= 16; - n += 16; - } - if (v & 0xff00) { - v >>= 8; - n += 8; - } - n += ff_log2_tab[v]; - - return n; -} - - -//#include "log.h" - -#if defined(ALT_BITSTREAM_READER_LE) && !defined(ALT_BITSTREAM_READER) -#define ALT_BITSTREAM_READER -#endif - -//#define ALT_BITSTREAM_WRITER -//#define ALIGNED_BITSTREAM_WRITER -#if !defined(LIBMPEG2_BITSTREAM_READER) && !defined(A32_BITSTREAM_READER) && !defined(ALT_BITSTREAM_READER) -# ifdef ARCH_ARMV4L -# define A32_BITSTREAM_READER -# else -#define ALT_BITSTREAM_READER -//#define LIBMPEG2_BITSTREAM_READER -//#define A32_BITSTREAM_READER -# endif -#endif -#define LIBMPEG2_BITSTREAM_READER_HACK //add BERO - -extern const uint8_t ff_reverse[256]; - -#if defined(ARCH_X86) -// avoid +32 for shift optimization (gcc should do that ...) -static inline int32_t NEG_SSR32( int32_t a, int8_t s){ - asm ("sarl %1, %0\n\t" - : "+r" (a) - : "ic" ((uint8_t)(-s)) - ); - return a; -} -static inline uint32_t NEG_USR32(uint32_t a, int8_t s){ - asm ("shrl %1, %0\n\t" - : "+r" (a) - : "ic" ((uint8_t)(-s)) - ); - return a; -} -#else -# define NEG_SSR32(a,s) ((( int32_t)(a))>>(32-(s))) -# define NEG_USR32(a,s) (((uint32_t)(a))>>(32-(s))) -#endif - -/* bit output */ - -/* buf and buf_end must be present and used by every alternative writer. */ -typedef struct PutBitContext { -#ifdef ALT_BITSTREAM_WRITER - uint8_t *buf, *buf_end; - int index; -#else - uint32_t bit_buf; - int bit_left; - uint8_t *buf, *buf_ptr, *buf_end; -#endif -} PutBitContext; - -static inline void init_put_bits(PutBitContext *s, uint8_t *buffer, int buffer_size) -{ - if(buffer_size < 0) { - buffer_size = 0; - buffer = NULL; - } - - s->buf = buffer; - s->buf_end = s->buf + buffer_size; -#ifdef ALT_BITSTREAM_WRITER - s->index=0; - ((uint32_t*)(s->buf))[0]=0; -// memset(buffer, 0, buffer_size); -#else - s->buf_ptr = s->buf; - s->bit_left=32; - s->bit_buf=0; -#endif -} - -/* return the number of bits output */ -static inline int put_bits_count(PutBitContext *s) -{ -#ifdef ALT_BITSTREAM_WRITER - return s->index; -#else - return (s->buf_ptr - s->buf) * 8 + 32 - s->bit_left; -#endif -} - -/* pad the end of the output stream with zeros */ -static inline void flush_put_bits(PutBitContext *s) -{ -#ifdef ALT_BITSTREAM_WRITER - align_put_bits(s); -#else - s->bit_buf<<= s->bit_left; - while (s->bit_left < 32) { - /* XXX: should test end of buffer */ - *s->buf_ptr++=s->bit_buf >> 24; - s->bit_buf<<=8; - s->bit_left+=8; - } - s->bit_left=32; - s->bit_buf=0; -#endif -} - -void align_put_bits(PutBitContext *s); -void ff_put_string(PutBitContext * pbc, char *s, int put_zero); - -/* bit input */ -/* buffer, buffer_end and size_in_bits must be present and used by every reader */ -typedef struct GetBitContext { - const uint8_t *buffer, *buffer_end; -#ifdef ALT_BITSTREAM_READER - int index; -#elif defined LIBMPEG2_BITSTREAM_READER - uint8_t *buffer_ptr; - uint32_t cache; - int bit_count; -#elif defined A32_BITSTREAM_READER - uint32_t *buffer_ptr; - uint32_t cache0; - uint32_t cache1; - int bit_count; -#endif - int size_in_bits; -} GetBitContext; - -#define VLC_TYPE int16_t - -typedef struct VLC { - int bits; - VLC_TYPE (*table)[2]; ///< code, bits - int table_size, table_allocated; -} VLC; - -typedef struct RL_VLC_ELEM { - int16_t level; - int8_t len; - uint8_t run; -} RL_VLC_ELEM; - -#if defined(ARCH_SPARC) || defined(ARCH_ARMV4L) || defined(ARCH_MIPS) || defined(ARCH_BFIN) -#define UNALIGNED_STORES_ARE_BAD -#endif - -/* used to avoid missaligned exceptions on some archs (alpha, ...) */ -#if defined(ARCH_X86) || defined(CPU_COLDFIRE) -# define unaligned16(a) (*(const uint16_t*)(a)) -# define unaligned32(a) (*(const uint32_t*)(a)) -# define unaligned64(a) (*(const uint64_t*)(a)) -#else -# ifdef __GNUC__ -# define unaligned(x) \ -static inline uint##x##_t unaligned##x(const void *v) { \ - struct Unaligned { \ - uint##x##_t i; \ - } __attribute__((packed)); \ - \ - return ((const struct Unaligned *) v)->i; \ -} -# elif defined(__DECC) -# define unaligned(x) \ -static inline uint##x##_t unaligned##x(const void *v) { \ - return *(const __unaligned uint##x##_t *) v; \ -} -# else -# define unaligned(x) \ -static inline uint##x##_t unaligned##x(const void *v) { \ - return *(const uint##x##_t *) v; \ -} -# endif -unaligned(16) -unaligned(32) -unaligned(64) -#undef unaligned -#endif /* defined(ARCH_X86) */ - -#ifndef ALT_BITSTREAM_WRITER -static inline void put_bits(PutBitContext *s, int n, unsigned int value) -{ - unsigned int bit_buf; - int bit_left; - - // printf("put_bits=%d %x\n", n, value); - // assert(n == 32 || value < (1U << n)); - - bit_buf = s->bit_buf; - bit_left = s->bit_left; - - // printf("n=%d value=%x cnt=%d buf=%x\n", n, value, bit_cnt, bit_buf); - /* XXX: optimize */ - if (n < bit_left) { - bit_buf = (bit_buf<> (n - bit_left); -#ifdef UNALIGNED_STORES_ARE_BAD - if (3 & (intptr_t) s->buf_ptr) { - s->buf_ptr[0] = bit_buf >> 24; - s->buf_ptr[1] = bit_buf >> 16; - s->buf_ptr[2] = bit_buf >> 8; - s->buf_ptr[3] = bit_buf ; - } else -#endif - *(uint32_t *)s->buf_ptr = be2me_32(bit_buf); - //printf("bitbuf = %08x\n", bit_buf); - s->buf_ptr+=4; - bit_left+=32 - n; - bit_buf = value; - } - - s->bit_buf = bit_buf; - s->bit_left = bit_left; -} -#endif - - -#ifdef ALT_BITSTREAM_WRITER -static inline void put_bits(PutBitContext *s, int n, unsigned int value) -{ -# ifdef ALIGNED_BITSTREAM_WRITER -# if defined(ARCH_X86) - asm volatile( - "movl %0, %%ecx \n\t" - "xorl %%eax, %%eax \n\t" - "shrdl %%cl, %1, %%eax \n\t" - "shrl %%cl, %1 \n\t" - "movl %0, %%ecx \n\t" - "shrl $3, %%ecx \n\t" - "andl $0xFFFFFFFC, %%ecx \n\t" - "bswapl %1 \n\t" - "orl %1, (%2, %%ecx) \n\t" - "bswapl %%eax \n\t" - "addl %3, %0 \n\t" - "movl %%eax, 4(%2, %%ecx) \n\t" - : "=&r" (s->index), "=&r" (value) - : "r" (s->buf), "r" (n), "0" (s->index), "1" (value<<(-n)) - : "%eax", "%ecx" - ); -# else - int index= s->index; - uint32_t *ptr= ((uint32_t *)s->buf)+(index>>5); - - value<<= 32-n; - - ptr[0] |= be2me_32(value>>(index&31)); - ptr[1] = be2me_32(value<<(32-(index&31))); -//if(n>24) printf("%d %d\n", n, value); - index+= n; - s->index= index; -# endif -# else //ALIGNED_BITSTREAM_WRITER -# if defined(ARCH_X86) - asm volatile( - "movl $7, %%ecx \n\t" - "andl %0, %%ecx \n\t" - "addl %3, %%ecx \n\t" - "negl %%ecx \n\t" - "shll %%cl, %1 \n\t" - "bswapl %1 \n\t" - "movl %0, %%ecx \n\t" - "shrl $3, %%ecx \n\t" - "orl %1, (%%ecx, %2) \n\t" - "addl %3, %0 \n\t" - "movl $0, 4(%%ecx, %2) \n\t" - : "=&r" (s->index), "=&r" (value) - : "r" (s->buf), "r" (n), "0" (s->index), "1" (value) - : "%ecx" - ); -# else - int index= s->index; - uint32_t *ptr= (uint32_t*)(((uint8_t *)s->buf)+(index>>3)); - - ptr[0] |= be2me_32(value<<(32-n-(index&7) )); - ptr[1] = 0; -//if(n>24) printf("%d %d\n", n, value); - index+= n; - s->index= index; -# endif -# endif //!ALIGNED_BITSTREAM_WRITER -} -#endif - - -static inline uint8_t* pbBufPtr(PutBitContext *s) -{ -#ifdef ALT_BITSTREAM_WRITER - return s->buf + (s->index>>3); -#else - return s->buf_ptr; -#endif -} - -/** - * - * PutBitContext must be flushed & aligned to a byte boundary before calling this. - */ -static inline void skip_put_bytes(PutBitContext *s, int n){ - // assert((put_bits_count(s)&7)==0); -#ifdef ALT_BITSTREAM_WRITER - FIXME may need some cleaning of the buffer - s->index += n<<3; -#else - // assert(s->bit_left==32); - s->buf_ptr += n; -#endif -} - -/** - * skips the given number of bits. - * must only be used if the actual values in the bitstream dont matter - */ -static inline void skip_put_bits(PutBitContext *s, int n){ -#ifdef ALT_BITSTREAM_WRITER - s->index += n; -#else - s->bit_left -= n; - s->buf_ptr-= s->bit_left>>5; - s->bit_left &= 31; -#endif -} - -/** - * Changes the end of the buffer. - */ -static inline void set_put_bits_buffer_size(PutBitContext *s, int size){ - s->buf_end= s->buf + size; -} - -/* Bitstream reader API docs: -name - abritary name which is used as prefix for the internal variables - -gb - getbitcontext - -OPEN_READER(name, gb) - loads gb into local variables - -CLOSE_READER(name, gb) - stores local vars in gb - -UPDATE_CACHE(name, gb) - refills the internal cache from the bitstream - after this call at least MIN_CACHE_BITS will be available, - -GET_CACHE(name, gb) - will output the contents of the internal cache, next bit is MSB of 32 or 64 bit (FIXME 64bit) - -SHOW_UBITS(name, gb, num) - will return the next num bits - -SHOW_SBITS(name, gb, num) - will return the next num bits and do sign extension - -SKIP_BITS(name, gb, num) - will skip over the next num bits - note, this is equivalent to SKIP_CACHE; SKIP_COUNTER - -SKIP_CACHE(name, gb, num) - will remove the next num bits from the cache (note SKIP_COUNTER MUST be called before UPDATE_CACHE / CLOSE_READER) - -SKIP_COUNTER(name, gb, num) - will increment the internal bit counter (see SKIP_CACHE & SKIP_BITS) - -LAST_SKIP_CACHE(name, gb, num) - will remove the next num bits from the cache if it is needed for UPDATE_CACHE otherwise it will do nothing - -LAST_SKIP_BITS(name, gb, num) - is equivalent to SKIP_LAST_CACHE; SKIP_COUNTER - -for examples see get_bits, show_bits, skip_bits, get_vlc -*/ - -static inline int unaligned32_be(const void *v) -{ -#ifdef CONFIG_ALIGN - const uint8_t *p=v; - return (((p[0]<<8) | p[1])<<16) | (p[2]<<8) | (p[3]); -#else - return be2me_32( unaligned32(v)); //original -#endif -} - -static inline int unaligned32_le(const void *v) -{ -#ifdef CONFIG_ALIGN - const uint8_t *p=v; - return (((p[3]<<8) | p[2])<<16) | (p[1]<<8) | (p[0]); -#else - return le2me_32( unaligned32(v)); //original -#endif -} - -#ifdef ALT_BITSTREAM_READER -# define MIN_CACHE_BITS 25 - -# define OPEN_READER(name, gb)\ - int name##_index= (gb)->index;\ - int name##_cache= 0;\ - -# define CLOSE_READER(name, gb)\ - (gb)->index= name##_index;\ - -# ifdef ALT_BITSTREAM_READER_LE -# define UPDATE_CACHE(name, gb)\ - name##_cache= unaligned32_le( ((const uint8_t *)(gb)->buffer)+(name##_index>>3) ) >> (name##_index&0x07);\ - -# define SKIP_CACHE(name, gb, num)\ - name##_cache >>= (num); -# else -# define UPDATE_CACHE(name, gb)\ - name##_cache= unaligned32_be( ((const uint8_t *)(gb)->buffer)+(name##_index>>3) ) << (name##_index&0x07);\ - -# define SKIP_CACHE(name, gb, num)\ - name##_cache <<= (num); -# endif - -// FIXME name? -# define SKIP_COUNTER(name, gb, num)\ - name##_index += (num);\ - -# define SKIP_BITS(name, gb, num)\ - {\ - SKIP_CACHE(name, gb, num)\ - SKIP_COUNTER(name, gb, num)\ - }\ - -# define LAST_SKIP_BITS(name, gb, num) SKIP_COUNTER(name, gb, num) -# define LAST_SKIP_CACHE(name, gb, num) ; - -# ifdef ALT_BITSTREAM_READER_LE -# define SHOW_UBITS(name, gb, num)\ - ((name##_cache) & (NEG_USR32(0xffffffff,num))) - -# define SHOW_SBITS(name, gb, num)\ - NEG_SSR32((name##_cache)<<(32-(num)), num) -# else -# define SHOW_UBITS(name, gb, num)\ - NEG_USR32(name##_cache, num) - -# define SHOW_SBITS(name, gb, num)\ - NEG_SSR32(name##_cache, num) -# endif - -# define GET_CACHE(name, gb)\ - ((uint32_t)name##_cache) - -static inline int get_bits_count(GetBitContext *s){ - return s->index; -} - -static inline void skip_bits_long(GetBitContext *s, int n){ - s->index += n; -} - -#elif defined LIBMPEG2_BITSTREAM_READER -//libmpeg2 like reader - -# define MIN_CACHE_BITS 17 - -# define OPEN_READER(name, gb)\ - int name##_bit_count=(gb)->bit_count;\ - int name##_cache= (gb)->cache;\ - uint8_t * name##_buffer_ptr=(gb)->buffer_ptr;\ - -# define CLOSE_READER(name, gb)\ - (gb)->bit_count= name##_bit_count;\ - (gb)->cache= name##_cache;\ - (gb)->buffer_ptr= name##_buffer_ptr;\ - -#ifdef LIBMPEG2_BITSTREAM_READER_HACK - -# define UPDATE_CACHE(name, gb)\ - if(name##_bit_count >= 0){\ - name##_cache+= (int)be2me_16(*(uint16_t*)name##_buffer_ptr) << name##_bit_count;\ - name##_buffer_ptr += 2;\ - name##_bit_count-= 16;\ - }\ - -#else - -# define UPDATE_CACHE(name, gb)\ - if(name##_bit_count >= 0){\ - name##_cache+= ((name##_buffer_ptr[0]<<8) + name##_buffer_ptr[1]) << name##_bit_count;\ - name##_buffer_ptr+=2;\ - name##_bit_count-= 16;\ - }\ - -#endif - -# define SKIP_CACHE(name, gb, num)\ - name##_cache <<= (num);\ - -# define SKIP_COUNTER(name, gb, num)\ - name##_bit_count += (num);\ - -# define SKIP_BITS(name, gb, num)\ - {\ - SKIP_CACHE(name, gb, num)\ - SKIP_COUNTER(name, gb, num)\ - }\ - -# define LAST_SKIP_BITS(name, gb, num) SKIP_BITS(name, gb, num) -# define LAST_SKIP_CACHE(name, gb, num) SKIP_CACHE(name, gb, num) - -# define SHOW_UBITS(name, gb, num)\ - NEG_USR32(name##_cache, num) - -# define SHOW_SBITS(name, gb, num)\ - NEG_SSR32(name##_cache, num) - -# define GET_CACHE(name, gb)\ - ((uint32_t)name##_cache) - -static inline int get_bits_count(GetBitContext *s){ - return (s->buffer_ptr - s->buffer)*8 - 16 + s->bit_count; -} - -static inline void skip_bits_long(GetBitContext *s, int n){ - OPEN_READER(re, s) - re_bit_count += n; - re_buffer_ptr += 2*(re_bit_count>>4); - re_bit_count &= 15; - re_cache = ((re_buffer_ptr[-2]<<8) + re_buffer_ptr[-1]) << (16+re_bit_count); - UPDATE_CACHE(re, s) - CLOSE_READER(re, s) -} - -#elif defined A32_BITSTREAM_READER - -# define MIN_CACHE_BITS 32 - -# define OPEN_READER(name, gb)\ - int name##_bit_count=(gb)->bit_count;\ - uint32_t name##_cache0= (gb)->cache0;\ - uint32_t name##_cache1= (gb)->cache1;\ - uint32_t * name##_buffer_ptr=(gb)->buffer_ptr;\ - -# define CLOSE_READER(name, gb)\ - (gb)->bit_count= name##_bit_count;\ - (gb)->cache0= name##_cache0;\ - (gb)->cache1= name##_cache1;\ - (gb)->buffer_ptr= name##_buffer_ptr;\ - -# define UPDATE_CACHE(name, gb)\ - if(name##_bit_count > 0){\ - const uint32_t next= be2me_32( *name##_buffer_ptr );\ - name##_cache0 |= NEG_USR32(next,name##_bit_count);\ - name##_cache1 |= next<buffer_ptr - s->buffer)*8 - 32 + s->bit_count; -} - -static inline void skip_bits_long(GetBitContext *s, int n){ - OPEN_READER(re, s) - re_bit_count += n; - re_buffer_ptr += re_bit_count>>5; - re_bit_count &= 31; - re_cache0 = be2me_32( re_buffer_ptr[-1] ) << re_bit_count; - re_cache1 = 0; - UPDATE_CACHE(re, s) - CLOSE_READER(re, s) -} - -#endif - -/** - * read mpeg1 dc style vlc (sign bit + mantisse with no MSB). - * if MSB not set it is negative - * @param n length in bits - * @author BERO - */ -static inline int get_xbits(GetBitContext *s, int n){ - register int sign; - register int32_t cache; - OPEN_READER(re, s) - UPDATE_CACHE(re, s) - cache = GET_CACHE(re,s); - sign=(~cache)>>31; - LAST_SKIP_BITS(re, s, n) - CLOSE_READER(re, s) - return (NEG_USR32(sign ^ cache, n) ^ sign) - sign; -} - -static inline int get_sbits(GetBitContext *s, int n){ - register int tmp; - OPEN_READER(re, s) - UPDATE_CACHE(re, s) - tmp= SHOW_SBITS(re, s, n); - LAST_SKIP_BITS(re, s, n) - CLOSE_READER(re, s) - return tmp; -} - -/** - * reads 1-17 bits. - * Note, the alt bitstream reader can read up to 25 bits, but the libmpeg2 reader can't - */ -static inline unsigned int get_bits(GetBitContext *s, int n){ - register int tmp; - OPEN_READER(re, s) - UPDATE_CACHE(re, s) - tmp= SHOW_UBITS(re, s, n); - LAST_SKIP_BITS(re, s, n) - CLOSE_READER(re, s) - return tmp; -} - -/** - * shows 1-17 bits. - * Note, the alt bitstream reader can read up to 25 bits, but the libmpeg2 reader can't - */ -static inline unsigned int show_bits(GetBitContext *s, int n){ - register int tmp; - OPEN_READER(re, s) - UPDATE_CACHE(re, s) - tmp= SHOW_UBITS(re, s, n); -// CLOSE_READER(re, s) - return tmp; -} - -static inline void skip_bits(GetBitContext *s, int n){ - //Note gcc seems to optimize this to s->index+=n for the ALT_READER :)) - OPEN_READER(re, s) - UPDATE_CACHE(re, s) - LAST_SKIP_BITS(re, s, n) - CLOSE_READER(re, s) -} - -static inline unsigned int get_bits1(GetBitContext *s){ -#ifdef ALT_BITSTREAM_READER - int index= s->index; - uint8_t result= s->buffer[ index>>3 ]; -#ifdef ALT_BITSTREAM_READER_LE - result>>= (index&0x07); - result&= 1; -#else - result<<= (index&0x07); - result>>= 8 - 1; -#endif - index++; - s->index= index; - - return result; -#else - return get_bits(s, 1); -#endif -} - -static inline unsigned int show_bits1(GetBitContext *s){ - return show_bits(s, 1); -} - -static inline void skip_bits1(GetBitContext *s){ - skip_bits(s, 1); -} - -/** - * reads 0-32 bits. - */ -static inline unsigned int get_bits_long(GetBitContext *s, int n){ - if(n<=17) return get_bits(s, n); - else{ -#ifdef ALT_BITSTREAM_READER_LE - int ret= get_bits(s, 16); - return ret | (get_bits(s, n-16) << 16); -#else - int ret= get_bits(s, 16) << (n-16); - return ret | get_bits(s, n-16); -#endif - } -} - -/** - * shows 0-32 bits. - */ -static inline unsigned int show_bits_long(GetBitContext *s, int n){ - if(n<=17) return show_bits(s, n); - else{ - GetBitContext gb= *s; - int ret= get_bits_long(s, n); - *s= gb; - return ret; - } -} - -/* -static inline int check_marker(GetBitContext *s, const char *msg) -{ - int bit= get_bits1(s); - if(!bit) - av_log(NULL, AV_LOG_INFO, "Marker bit missing %s\n", msg); - - return bit; -} -*/ -/** - * init GetBitContext. - * @param buffer bitstream buffer, must be FF_INPUT_BUFFER_PADDING_SIZE bytes larger then the actual read bits - * because some optimized bitstream readers read 32 or 64 bit at once and could read over the end - * @param bit_size the size of the buffer in bits - */ -static inline void init_get_bits(GetBitContext *s, - const uint8_t *buffer, int bit_size) -{ - int buffer_size= (bit_size+7)>>3; - if(buffer_size < 0 || bit_size < 0) { - buffer_size = bit_size = 0; - buffer = NULL; - } - - s->buffer= buffer; - s->size_in_bits= bit_size; - s->buffer_end= buffer + buffer_size; -#ifdef ALT_BITSTREAM_READER - s->index=0; -#elif defined LIBMPEG2_BITSTREAM_READER - s->buffer_ptr = (uint8_t*)((intptr_t)buffer&(~1)); - s->bit_count = 16 + 8*((intptr_t)buffer&1); - skip_bits_long(s, 0); -#elif defined A32_BITSTREAM_READER - s->buffer_ptr = (uint32_t*)((intptr_t)buffer&(~3)); - s->bit_count = 32 + 8*((intptr_t)buffer&3); - skip_bits_long(s, 0); -#endif -} - -static inline void align_get_bits(GetBitContext *s) -{ - int n= (-get_bits_count(s)) & 7; - if(n) skip_bits(s, n); -} - -int init_vlc(VLC *vlc, int nb_bits, int nb_codes, - const void *bits, int bits_wrap, int bits_size, - const void *codes, int codes_wrap, int codes_size, - int flags); -#define INIT_VLC_USE_STATIC 1 -#define INIT_VLC_LE 2 -void free_vlc(VLC *vlc); - -/** - * - * if the vlc code is invalid and max_depth=1 than no bits will be removed - * if the vlc code is invalid and max_depth>1 than the number of bits removed - * is undefined - */ -#define GET_VLC(code, name, gb, table, bits, max_depth)\ -{\ - int n, index, nb_bits;\ -\ - index= SHOW_UBITS(name, gb, bits);\ - code = table[index][0];\ - n = table[index][1];\ -\ - if(max_depth > 1 && n < 0){\ - LAST_SKIP_BITS(name, gb, bits)\ - UPDATE_CACHE(name, gb)\ -\ - nb_bits = -n;\ -\ - index= SHOW_UBITS(name, gb, nb_bits) + code;\ - code = table[index][0];\ - n = table[index][1];\ - if(max_depth > 2 && n < 0){\ - LAST_SKIP_BITS(name, gb, nb_bits)\ - UPDATE_CACHE(name, gb)\ -\ - nb_bits = -n;\ -\ - index= SHOW_UBITS(name, gb, nb_bits) + code;\ - code = table[index][0];\ - n = table[index][1];\ - }\ - }\ - SKIP_BITS(name, gb, n)\ -} - -#define GET_RL_VLC(level, run, name, gb, table, bits, max_depth, need_update)\ -{\ - int n, index, nb_bits;\ -\ - index= SHOW_UBITS(name, gb, bits);\ - level = table[index].level;\ - n = table[index].len;\ -\ - if(max_depth > 1 && n < 0){\ - SKIP_BITS(name, gb, bits)\ - if(need_update){\ - UPDATE_CACHE(name, gb)\ - }\ -\ - nb_bits = -n;\ -\ - index= SHOW_UBITS(name, gb, nb_bits) + level;\ - level = table[index].level;\ - n = table[index].len;\ - }\ - run= table[index].run;\ - SKIP_BITS(name, gb, n)\ -} - - -/** - * parses a vlc code, faster then get_vlc() - * @param bits is the number of bits which will be read at once, must be - * identical to nb_bits in init_vlc() - * @param max_depth is the number of times bits bits must be read to completely - * read the longest vlc code - * = (max_vlc_length + bits - 1) / bits - */ -static av_always_inline int get_vlc2(GetBitContext *s, VLC_TYPE (*table)[2], - int bits, int max_depth) -{ - int code; - - OPEN_READER(re, s) - UPDATE_CACHE(re, s) - - GET_VLC(code, re, s, table, bits, max_depth) - - CLOSE_READER(re, s) - return code; -} - -//#define TRACE - -#ifdef TRACE -static inline void print_bin(int bits, int n){ - int i; - - for(i=n-1; i>=0; i--){ - av_log(NULL, AV_LOG_DEBUG, "%d", (bits>>i)&1); - } - for(i=n; i<24; i++) - av_log(NULL, AV_LOG_DEBUG, " "); -} - -static inline int get_bits_trace(GetBitContext *s, int n, char *file, const char *func, int line){ - int r= get_bits(s, n); - - print_bin(r, n); - av_log(NULL, AV_LOG_DEBUG, "%5d %2d %3d bit @%5d in %s %s:%d\n", r, n, r, get_bits_count(s)-n, file, func, line); - return r; -} -static inline int get_vlc_trace(GetBitContext *s, VLC_TYPE (*table)[2], int bits, int max_depth, char *file, const char *func, int line){ - int show= show_bits(s, 24); - int pos= get_bits_count(s); - int r= get_vlc2(s, table, bits, max_depth); - int len= get_bits_count(s) - pos; - int bits2= show>>(24-len); - - print_bin(bits2, len); - - av_log(NULL, AV_LOG_DEBUG, "%5d %2d %3d vlc @%5d in %s %s:%d\n", bits2, len, r, pos, file, func, line); - return r; -} -static inline int get_xbits_trace(GetBitContext *s, int n, char *file, const char *func, int line){ - int show= show_bits(s, n); - int r= get_xbits(s, n); - - print_bin(show, n); - av_log(NULL, AV_LOG_DEBUG, "%5d %2d %3d xbt @%5d in %s %s:%d\n", show, n, r, get_bits_count(s)-n, file, func, line); - return r; -} - -#define get_bits(s, n) get_bits_trace(s, n, __FILE__, __PRETTY_FUNCTION__, __LINE__) -#define get_bits1(s) get_bits_trace(s, 1, __FILE__, __PRETTY_FUNCTION__, __LINE__) -#define get_xbits(s, n) get_xbits_trace(s, n, __FILE__, __PRETTY_FUNCTION__, __LINE__) -#define get_vlc(s, vlc) get_vlc_trace(s, (vlc)->table, (vlc)->bits, 3, __FILE__, __PRETTY_FUNCTION__, __LINE__) -#define get_vlc2(s, tab, bits, max) get_vlc_trace(s, tab, bits, max, __FILE__, __PRETTY_FUNCTION__, __LINE__) - -#define tprintf(p, ...) av_log(p, AV_LOG_DEBUG, __VA_ARGS__) - -#else //TRACE -#define tprintf(p, ...) {} -#endif - -static inline int decode012(GetBitContext *gb){ - int n; - n = get_bits1(gb); - if (n == 0) - return 0; - else - return get_bits1(gb) + 1; -} - -#endif /* BITSTREAM_H */ diff --git a/bsp/stm32_radio/libwma/wmadata.h b/bsp/stm32_radio/libwma/wmadata.h deleted file mode 100644 index 29a2418a66..0000000000 --- a/bsp/stm32_radio/libwma/wmadata.h +++ /dev/null @@ -1,2609 +0,0 @@ -/* - * WMA compatible decoder - * copyright (c) 2002 The FFmpeg Project - * - * This file is part of FFmpeg. - * - * FFmpeg is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * FFmpeg is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with FFmpeg; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA - */ - -/** - * @file wmadata.h - * Various WMA tables. - */ - -static const uint16_t wma_critical_freqs[25] = { - 100, 200, 300, 400, 510, 630, 770, 920, - 1080, 1270, 1480, 1720, 2000, 2320, 2700, 3150, - 3700, 4400, 5300, 6400, 7700, 9500, 12000, 15500, - 24500, -}; - -/* first value is number of bands */ -static const uint8_t exponent_band_22050[3][25] = { - { 10, 4, 8, 4, 8, 8, 12, 20, 24, 24, 16, }, - { 14, 4, 8, 8, 4, 12, 12, 16, 24, 16, 20, 24, 32, 40, 36, }, - { 23, 4, 4, 4, 8, 4, 4, 8, 8, 8, 8, 8, 12, 12, 16, 16, 24, 24, 32, 44, 48, 60, 84, 72, }, -}; - -static const uint8_t exponent_band_32000[3][25] = { - { 11, 4, 4, 8, 4, 4, 12, 16, 24, 20, 28, 4, }, - { 15, 4, 8, 4, 4, 8, 8, 16, 20, 12, 20, 20, 28, 40, 56, 8, }, - { 16, 8, 4, 8, 8, 12, 16, 20, 24, 40, 32, 32, 44, 56, 80, 112, 16, }, -}; - -static const uint8_t exponent_band_44100[3][25] = { - { 12, 4, 4, 4, 4, 4, 8, 8, 8, 12, 16, 20, 36, }, - { 15, 4, 8, 4, 8, 8, 4, 8, 8, 12, 12, 12, 24, 28, 40, 76, }, - { 17, 4, 8, 8, 4, 12, 12, 8, 8, 24, 16, 20, 24, 32, 40, 60, 80, 152, }, -}; - -static const uint16_t hgain_huffcodes[37] = { - 0x00003, 0x002e7, 0x00001, 0x005cd, 0x0005d, 0x005c9, 0x0005e, 0x00003, - 0x00016, 0x0000b, 0x00001, 0x00006, 0x00001, 0x00006, 0x00004, 0x00005, - 0x00004, 0x00007, 0x00003, 0x00007, 0x00004, 0x0000a, 0x0000a, 0x00002, - 0x00003, 0x00000, 0x00005, 0x00002, 0x0005f, 0x00004, 0x00003, 0x00002, - 0x005c8, 0x000b8, 0x005ca, 0x005cb, 0x005cc, -}; - -static const uint8_t hgain_huffbits[37] = { - 10, 12, 10, 13, 9, 13, 9, 8, - 7, 5, 5, 4, 4, 3, 3, 3, - 4, 3, 4, 4, 5, 5, 6, 8, - 7, 10, 8, 10, 9, 8, 9, 9, - 13, 10, 13, 13, 13, -}; - -static const fixed32 lsp_codebook[NB_LSP_COEFS][16] = { -{0x1fcc2,0x1fabd,0x1f8c7,0x1f66d,0x1f34c,0x1eef1,0x1e83e,0x1dca6,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0}, -{0x1f8fc,0x1f5f9,0x1f328,0x1f025,0x1ecd8,0x1e8fc,0x1e46f,0x1df1b,0x1d87c,0x1d047,0x1c6b5,0x1bb8f,0x1add8,0x19c0e,0x18220,0x154ca}, -{0x1e6ae,0x1dd65,0x1d58e,0x1cd3b,0x1c439,0x1ba69,0x1af5e,0x1a32c,0x195c4,0x18498,0x16fd2,0x156ea,0x13de4,0x11f63,0xf7ae,0xbd90}, -{0x1c4fa,0x1ada0,0x19976,0x1891d,0x17986,0x1697f,0x15858,0x145fd,0x1316b,0x11900,0xfcfa,0xdf55,0xbe63,0x9902,0x6e83,0x2e05}, -{0x16f2d,0x15205,0x135f3,0x11b14,0x10170,0xe743,0xcdec,0xb504,0x9ab2,0x7f86,0x6296,0x4565,0x24e2,0x90,0xffffd52f,0xffffa172}, -{0xffbc,0xd786,0xb521,0x943e,0x7876,0x5ea3,0x44ad,0x2bf0,0x1274,0xfffff829,0xfffe9981,0xffffbfab,0xffffa0bb,0xffff7d3f,0xffff59e3,0xffff3269}, -{0x43e1,0x102a,0xffffe94a,0xffffc9fa,0xffffb076,0xffff9a6b,0xffff871c,0xffff7555,0xffff62b4,0xffff4f81,0xffff3bf4,0xffff25f7,0xffff0c0f,0xfffeef53,0xfffecb7e,0xfffe9fb3}, -{0xffff75ea,0xffff4325,0xffff1da2,0xfffefd23,0xfffeddb9,0xfffebb51,0xfffe945f,0xfffe6131,0xfffee5fe,0xfffed5ba,0xfffec442,0xfffeb224,0xfffe9f95,0xfffe880e,0xfffe6c7a,0xfffe54c1}, -{0xffff9d2e,0xffff709e,0xffff5489,0xffff3d5e,0xffff295b,0xffff1761,0xffff06a2,0xfffef68a,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0}, -{0xfffe7045,0xfffe572f,0xfffe45ea,0xfffe38af,0xfffe2d8f,0xfffe2347,0xfffe18df,0xfffe0d42,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0} -}; - -static const uint32_t scale_huffcodes[121] = { - 0x3ffe8, 0x3ffe6, 0x3ffe7, 0x3ffe5, 0x7fff5, 0x7fff1, 0x7ffed, 0x7fff6, - 0x7ffee, 0x7ffef, 0x7fff0, 0x7fffc, 0x7fffd, 0x7ffff, 0x7fffe, 0x7fff7, - 0x7fff8, 0x7fffb, 0x7fff9, 0x3ffe4, 0x7fffa, 0x3ffe3, 0x1ffef, 0x1fff0, - 0x0fff5, 0x1ffee, 0x0fff2, 0x0fff3, 0x0fff4, 0x0fff1, 0x07ff6, 0x07ff7, - 0x03ff9, 0x03ff5, 0x03ff7, 0x03ff3, 0x03ff6, 0x03ff2, 0x01ff7, 0x01ff5, - 0x00ff9, 0x00ff7, 0x00ff6, 0x007f9, 0x00ff4, 0x007f8, 0x003f9, 0x003f7, - 0x003f5, 0x001f8, 0x001f7, 0x000fa, 0x000f8, 0x000f6, 0x00079, 0x0003a, - 0x00038, 0x0001a, 0x0000b, 0x00004, 0x00000, 0x0000a, 0x0000c, 0x0001b, - 0x00039, 0x0003b, 0x00078, 0x0007a, 0x000f7, 0x000f9, 0x001f6, 0x001f9, - 0x003f4, 0x003f6, 0x003f8, 0x007f5, 0x007f4, 0x007f6, 0x007f7, 0x00ff5, - 0x00ff8, 0x01ff4, 0x01ff6, 0x01ff8, 0x03ff8, 0x03ff4, 0x0fff0, 0x07ff4, - 0x0fff6, 0x07ff5, 0x3ffe2, 0x7ffd9, 0x7ffda, 0x7ffdb, 0x7ffdc, 0x7ffdd, - 0x7ffde, 0x7ffd8, 0x7ffd2, 0x7ffd3, 0x7ffd4, 0x7ffd5, 0x7ffd6, 0x7fff2, - 0x7ffdf, 0x7ffe7, 0x7ffe8, 0x7ffe9, 0x7ffea, 0x7ffeb, 0x7ffe6, 0x7ffe0, - 0x7ffe1, 0x7ffe2, 0x7ffe3, 0x7ffe4, 0x7ffe5, 0x7ffd7, 0x7ffec, 0x7fff4, - 0x7fff3, -}; - -static const uint8_t scale_huffbits[121] = { - 18, 18, 18, 18, 19, 19, 19, 19, - 19, 19, 19, 19, 19, 19, 19, 19, - 19, 19, 19, 18, 19, 18, 17, 17, - 16, 17, 16, 16, 16, 16, 15, 15, - 14, 14, 14, 14, 14, 14, 13, 13, - 12, 12, 12, 11, 12, 11, 10, 10, - 10, 9, 9, 8, 8, 8, 7, 6, - 6, 5, 4, 3, 1, 4, 4, 5, - 6, 6, 7, 7, 8, 8, 9, 9, - 10, 10, 10, 11, 11, 11, 11, 12, - 12, 13, 13, 13, 14, 14, 16, 15, - 16, 15, 18, 19, 19, 19, 19, 19, - 19, 19, 19, 19, 19, 19, 19, 19, - 19, 19, 19, 19, 19, 19, 19, 19, - 19, 19, 19, 19, 19, 19, 19, 19, - 19, -}; - -static const uint32_t coef0_huffcodes[666] = { - 0x00258, 0x0003d, 0x00000, 0x00005, 0x00008, 0x00008, 0x0000c, 0x0001b, - 0x0001f, 0x00015, 0x00024, 0x00032, 0x0003a, 0x00026, 0x0002c, 0x0002f, - 0x0004a, 0x0004d, 0x00061, 0x00070, 0x00073, 0x00048, 0x00052, 0x0005a, - 0x0005d, 0x0006e, 0x00099, 0x0009e, 0x000c1, 0x000ce, 0x000e4, 0x000f0, - 0x00093, 0x0009e, 0x000a2, 0x000a1, 0x000b8, 0x000d2, 0x000d3, 0x0012e, - 0x00130, 0x000de, 0x0012d, 0x0019b, 0x001e4, 0x00139, 0x0013a, 0x0013f, - 0x0014f, 0x0016d, 0x001a2, 0x0027c, 0x0027e, 0x00332, 0x0033c, 0x0033f, - 0x0038b, 0x00396, 0x003c5, 0x00270, 0x0027c, 0x0025a, 0x00395, 0x00248, - 0x004bd, 0x004fb, 0x00662, 0x00661, 0x0071b, 0x004e6, 0x004ff, 0x00666, - 0x0071c, 0x0071a, 0x0071f, 0x00794, 0x00536, 0x004e2, 0x0078e, 0x004ee, - 0x00518, 0x00535, 0x004fb, 0x0078d, 0x00530, 0x00680, 0x0068f, 0x005cb, - 0x00965, 0x006a6, 0x00967, 0x0097f, 0x00682, 0x006ae, 0x00cd0, 0x00e28, - 0x00f13, 0x00f1f, 0x009f5, 0x00cd3, 0x00f11, 0x00926, 0x00964, 0x00f32, - 0x00f12, 0x00f30, 0x00966, 0x00d0b, 0x00a68, 0x00b91, 0x009c7, 0x00b73, - 0x012fa, 0x0131d, 0x013f9, 0x01ca0, 0x0199c, 0x01c7a, 0x0198c, 0x01248, - 0x01c74, 0x01c64, 0x0139e, 0x012fd, 0x00a77, 0x012fc, 0x01c7b, 0x012ca, - 0x014cc, 0x014d2, 0x014e3, 0x014dc, 0x012dc, 0x03344, 0x02598, 0x0263c, - 0x0333b, 0x025e6, 0x01a1c, 0x01e3c, 0x014e2, 0x033d4, 0x01a11, 0x03349, - 0x03cce, 0x014e1, 0x01a34, 0x0273e, 0x02627, 0x0273f, 0x038ee, 0x03971, - 0x03c67, 0x03c61, 0x0333d, 0x038c2, 0x0263f, 0x038cd, 0x02638, 0x02e41, - 0x0351f, 0x03348, 0x03c66, 0x03562, 0x02989, 0x027d5, 0x0333c, 0x02e4f, - 0x0343b, 0x02ddf, 0x04bc8, 0x029c0, 0x02e57, 0x04c72, 0x025b7, 0x03547, - 0x03540, 0x029d3, 0x04c45, 0x025bb, 0x06600, 0x04c73, 0x04bce, 0x0357b, - 0x029a6, 0x029d2, 0x0263e, 0x0298a, 0x07183, 0x06602, 0x07958, 0x04b66, - 0x0537d, 0x05375, 0x04fe9, 0x04b67, 0x0799f, 0x04bc9, 0x051fe, 0x06a3b, - 0x05bb6, 0x04fa8, 0x0728f, 0x05376, 0x0492c, 0x0537e, 0x0795a, 0x06a3c, - 0x0e515, 0x07887, 0x0683a, 0x051f9, 0x051fd, 0x0cc6a, 0x06a8a, 0x0cc6d, - 0x05bb3, 0x0683b, 0x051fc, 0x05378, 0x0728e, 0x07886, 0x05bb7, 0x0f2a4, - 0x0795b, 0x0683c, 0x09fc1, 0x0683d, 0x0b752, 0x09678, 0x0a3e8, 0x06ac7, - 0x051f0, 0x0b759, 0x06af3, 0x04b6b, 0x0f2a0, 0x0f2ad, 0x096c3, 0x0e518, - 0x0b75c, 0x0d458, 0x0cc6b, 0x0537c, 0x067aa, 0x04fea, 0x0343a, 0x0cc71, - 0x0967f, 0x09fc4, 0x096c2, 0x0e516, 0x0f2a1, 0x0d45c, 0x0d45d, 0x0d45e, - 0x12fb9, 0x0967e, 0x1982f, 0x09883, 0x096c4, 0x0b753, 0x12fb8, 0x0f2a8, - 0x1ca21, 0x096c5, 0x0e51a, 0x1ca27, 0x12f3c, 0x0d471, 0x0f2aa, 0x0b75b, - 0x12fbb, 0x0f2a9, 0x0f2ac, 0x0d45a, 0x0b74f, 0x096c8, 0x16e91, 0x096ca, - 0x12fbf, 0x0d0a7, 0x13103, 0x0d516, 0x16e99, 0x12cbd, 0x0a3ea, 0x19829, - 0x0b755, 0x29ba7, 0x1ca28, 0x29ba5, 0x16e93, 0x1982c, 0x19828, 0x25994, - 0x0a3eb, 0x1ca29, 0x16e90, 0x1ca25, 0x1982d, 0x1ca26, 0x16e9b, 0x0b756, - 0x0967c, 0x25997, 0x0b75f, 0x198d3, 0x0b757, 0x19a2a, 0x0d45b, 0x0e517, - 0x1ca24, 0x1ca23, 0x1ca22, 0x0b758, 0x16e97, 0x0cd14, 0x13100, 0x00007, - 0x0003b, 0x0006b, 0x00097, 0x00138, 0x00125, 0x00173, 0x00258, 0x00335, - 0x0028e, 0x004c6, 0x00715, 0x00729, 0x004ef, 0x00519, 0x004ed, 0x00532, - 0x0068c, 0x00686, 0x00978, 0x00e5d, 0x00e31, 0x009f4, 0x00b92, 0x012f8, - 0x00d06, 0x00a67, 0x00d44, 0x00a76, 0x00d59, 0x012cd, 0x01c78, 0x01c75, - 0x0199f, 0x0198f, 0x01c67, 0x014c6, 0x01c79, 0x01c76, 0x00b94, 0x00d1b, - 0x01e32, 0x01e31, 0x01ab0, 0x01a05, 0x01aa1, 0x0333a, 0x025e5, 0x02626, - 0x03541, 0x03544, 0x03421, 0x03546, 0x02e55, 0x02e56, 0x0492d, 0x02dde, - 0x0299b, 0x02ddc, 0x0357a, 0x0249c, 0x0668b, 0x1c77f, 0x1ca20, 0x0d45f, - 0x09886, 0x16e9a, 0x0f2a7, 0x0b751, 0x0a3ee, 0x0cf59, 0x0cf57, 0x0b754, - 0x0d0a6, 0x16e98, 0x0b760, 0x06ac6, 0x0a3f0, 0x12fbe, 0x13104, 0x0f2a5, - 0x0a3ef, 0x0d472, 0x12cba, 0x1982e, 0x16e9c, 0x1c77e, 0x198d0, 0x13105, - 0x16e92, 0x0b75d, 0x0d459, 0x0001a, 0x000c0, 0x0016c, 0x003cd, 0x00350, - 0x0067b, 0x0051e, 0x006a9, 0x009f4, 0x00b72, 0x00d09, 0x01249, 0x01e3d, - 0x01ca1, 0x01a1f, 0x01721, 0x01a8a, 0x016e8, 0x03347, 0x01a35, 0x0249d, - 0x0299a, 0x02596, 0x02e4e, 0x0298b, 0x07182, 0x04c46, 0x025ba, 0x02e40, - 0x027d6, 0x04fe8, 0x06607, 0x05310, 0x09884, 0x072e1, 0x06a3d, 0x04b6a, - 0x04c7a, 0x06603, 0x04c7b, 0x03428, 0x06605, 0x09664, 0x09fc0, 0x071de, - 0x06601, 0x05bb2, 0x09885, 0x0a3e2, 0x1c61f, 0x12cbb, 0x0b750, 0x0cf58, - 0x0967d, 0x25995, 0x668ad, 0x0b75a, 0x09fc2, 0x0537f, 0x0b75e, 0x13fae, - 0x12fbc, 0x00031, 0x001c4, 0x004c5, 0x005b8, 0x00cf4, 0x0096f, 0x00d46, - 0x01e57, 0x01a04, 0x02625, 0x03346, 0x028f9, 0x04c47, 0x072e0, 0x04b69, - 0x03420, 0x07957, 0x06639, 0x0799e, 0x07959, 0x07881, 0x04b68, 0x09fc3, - 0x09fd6, 0x0cc70, 0x0a3f1, 0x12cbe, 0x0e30e, 0x0e51b, 0x06af2, 0x12cbc, - 0x1c77d, 0x0f2ab, 0x12fbd, 0x1aa2f, 0x0a3ec, 0x0d473, 0x05377, 0x0a3e9, - 0x1982b, 0x0e300, 0x12f3f, 0x0cf5f, 0x096c0, 0x38c3c, 0x16e94, 0x16e95, - 0x12f3d, 0x29ba4, 0x29ba6, 0x1c77c, 0x6a8ba, 0x3545c, 0x33457, 0x668ac, - 0x6a8bb, 0x16e9d, 0x0e519, 0x25996, 0x12f3e, 0x00036, 0x0033e, 0x006ad, - 0x00d03, 0x012c8, 0x0124a, 0x03c42, 0x03ccd, 0x06606, 0x07880, 0x06852, - 0x06a3a, 0x05bb4, 0x0f2a2, 0x09fc7, 0x12cb9, 0x0cc6c, 0x0a6e8, 0x096c1, - 0x0004a, 0x00355, 0x012f9, 0x014e8, 0x01abe, 0x025b6, 0x0492e, 0x09fc6, - 0x051ff, 0x0cc6f, 0x096cb, 0x0d071, 0x198d1, 0x12cb8, 0x38c3d, 0x13faf, - 0x096c9, 0x0009d, 0x00539, 0x012ce, 0x0341f, 0x029c1, 0x04b33, 0x0a3e3, - 0x0d070, 0x16e96, 0x0b763, 0x000a0, 0x009ce, 0x038cc, 0x0343d, 0x051fa, - 0x09888, 0x12fba, 0x000df, 0x00a75, 0x029a7, 0x09fc5, 0x0e301, 0x0967b, - 0x001e7, 0x012c9, 0x051fb, 0x09889, 0x0f2a6, 0x0016f, 0x01cb9, 0x0cf5a, - 0x12cbf, 0x09679, 0x00272, 0x01a15, 0x0967a, 0x003cb, 0x025f6, 0x0b762, - 0x0028d, 0x03c60, 0x0cf5e, 0x00352, 0x03ccc, 0x0072f, 0x07186, 0x004ec, - 0x05379, 0x0068e, 0x09887, 0x006a7, 0x06af1, 0x00e29, 0x0cf5b, 0x00f31, - 0x0d470, 0x009c6, 0x013fb, 0x13102, 0x019a5, 0x13101, 0x01983, 0x01c65, - 0x0124f, 0x014c7, 0x01726, 0x01abf, 0x03304, 0x02624, 0x03c41, 0x027d7, - 0x02ddd, 0x02e54, 0x0343c, 0x06604, 0x07181, 0x0663a, 0x04fa9, 0x0663b, - 0x05311, 0x0537a, 0x06839, 0x05bb5, 0x0492f, 0x06af0, 0x096c7, 0x0cc6e, - 0x0537b, 0x0cf5c, 0x0cf56, 0x198d2, 0x0cf5d, 0x0a3ed, 0x0f2a3, 0x1982a, - 0x0b761, 0x096c6, -}; - -static const uint8_t coef0_huffbits[666] = { - 11, 6, 2, 3, 4, 5, 5, 5, - 5, 6, 6, 6, 6, 7, 7, 7, - 7, 7, 7, 7, 7, 8, 8, 8, - 8, 8, 8, 8, 8, 8, 8, 8, - 9, 9, 9, 9, 9, 9, 9, 9, - 9, 9, 9, 9, 9, 10, 10, 10, - 10, 10, 10, 10, 10, 10, 10, 10, - 10, 10, 10, 11, 11, 11, 10, 11, - 11, 11, 11, 11, 11, 11, 11, 11, - 11, 11, 11, 11, 12, 12, 11, 12, - 12, 12, 12, 11, 12, 12, 12, 12, - 12, 12, 12, 12, 12, 12, 12, 12, - 12, 12, 12, 12, 12, 13, 13, 12, - 12, 12, 13, 13, 13, 13, 13, 13, - 13, 13, 13, 13, 13, 13, 13, 14, - 13, 13, 13, 13, 13, 13, 13, 14, - 14, 14, 14, 14, 14, 14, 14, 14, - 14, 14, 14, 13, 14, 14, 14, 14, - 14, 14, 14, 14, 14, 14, 14, 14, - 14, 14, 14, 14, 14, 14, 14, 15, - 15, 14, 14, 15, 15, 15, 14, 15, - 15, 15, 15, 15, 15, 15, 15, 15, - 15, 15, 15, 15, 15, 15, 15, 15, - 15, 15, 14, 15, 15, 15, 15, 16, - 16, 16, 15, 16, 15, 15, 16, 16, - 16, 16, 15, 16, 16, 16, 15, 16, - 16, 15, 16, 16, 16, 16, 16, 16, - 16, 16, 16, 16, 15, 15, 16, 16, - 15, 16, 16, 16, 17, 17, 17, 16, - 16, 17, 16, 16, 16, 16, 17, 16, - 17, 17, 16, 16, 15, 15, 15, 16, - 17, 16, 17, 16, 16, 17, 17, 17, - 17, 17, 17, 16, 17, 17, 17, 16, - 17, 17, 16, 17, 17, 17, 16, 17, - 17, 16, 16, 17, 17, 17, 18, 17, - 17, 17, 17, 17, 18, 18, 17, 17, - 17, 19, 17, 19, 18, 17, 17, 18, - 17, 17, 18, 17, 17, 17, 18, 17, - 17, 18, 17, 17, 17, 17, 17, 16, - 17, 17, 17, 17, 18, 16, 17, 4, - 6, 8, 9, 9, 10, 10, 10, 10, - 11, 11, 11, 11, 12, 12, 12, 12, - 12, 12, 12, 12, 12, 13, 13, 13, - 13, 13, 13, 13, 13, 13, 13, 13, - 13, 13, 13, 14, 13, 13, 13, 13, - 13, 13, 14, 14, 14, 14, 14, 14, - 15, 15, 15, 15, 15, 15, 16, 15, - 15, 15, 15, 15, 15, 17, 17, 17, - 16, 18, 16, 17, 17, 16, 16, 17, - 17, 18, 17, 16, 17, 17, 17, 16, - 17, 17, 18, 17, 18, 17, 17, 17, - 18, 17, 17, 5, 8, 10, 10, 11, - 11, 12, 12, 12, 13, 13, 14, 13, - 13, 14, 14, 14, 14, 14, 14, 15, - 15, 15, 15, 15, 15, 15, 15, 15, - 15, 15, 15, 16, 16, 15, 16, 16, - 15, 15, 15, 15, 15, 16, 16, 15, - 15, 16, 16, 17, 17, 18, 17, 16, - 17, 18, 19, 17, 16, 16, 17, 17, - 17, 6, 9, 11, 12, 12, 13, 13, - 13, 14, 14, 14, 15, 15, 15, 16, - 15, 15, 15, 15, 15, 15, 16, 16, - 16, 16, 17, 18, 16, 16, 16, 18, - 17, 16, 17, 18, 17, 17, 16, 17, - 17, 16, 17, 16, 17, 18, 18, 18, - 17, 19, 19, 17, 20, 19, 18, 19, - 20, 18, 16, 18, 17, 7, 10, 12, - 13, 13, 14, 14, 14, 15, 15, 16, - 16, 16, 16, 16, 18, 16, 17, 17, - 8, 11, 13, 14, 14, 15, 16, 16, - 16, 16, 17, 17, 17, 18, 18, 17, - 17, 8, 12, 14, 15, 15, 15, 17, - 17, 18, 17, 9, 12, 14, 15, 16, - 16, 17, 9, 13, 15, 16, 16, 17, - 9, 13, 16, 16, 16, 10, 13, 16, - 18, 17, 10, 14, 17, 10, 14, 17, - 11, 14, 16, 11, 14, 11, 15, 12, - 16, 12, 16, 12, 16, 12, 16, 12, - 17, 13, 13, 17, 13, 17, 13, 13, - 14, 14, 14, 14, 14, 14, 14, 15, - 15, 15, 15, 15, 15, 15, 16, 15, - 16, 16, 16, 16, 16, 16, 17, 16, - 16, 16, 16, 17, 16, 17, 16, 17, - 17, 17, -}; - -static const uint32_t coef1_huffcodes[555] = { - 0x00115, 0x00002, 0x00001, 0x00000, 0x0000d, 0x00007, 0x00013, 0x0001d, - 0x00008, 0x0000c, 0x00023, 0x0002b, 0x0003f, 0x00017, 0x0001b, 0x00043, - 0x00049, 0x00050, 0x00055, 0x00054, 0x00067, 0x00064, 0x0007b, 0x0002d, - 0x00028, 0x0002a, 0x00085, 0x00089, 0x0002b, 0x00035, 0x00090, 0x00091, - 0x00094, 0x00088, 0x000c1, 0x000c6, 0x000f2, 0x000e3, 0x000c5, 0x000e2, - 0x00036, 0x000f0, 0x000a7, 0x000cd, 0x000fb, 0x00059, 0x00116, 0x00103, - 0x00108, 0x0012b, 0x0012d, 0x00188, 0x0012e, 0x0014c, 0x001c3, 0x00187, - 0x001e7, 0x0006f, 0x00094, 0x00069, 0x001e6, 0x001ca, 0x00147, 0x00195, - 0x000a7, 0x00213, 0x00209, 0x00303, 0x00295, 0x00289, 0x0028c, 0x0028d, - 0x00312, 0x00330, 0x0029b, 0x00308, 0x00328, 0x0029a, 0x0025e, 0x003c5, - 0x00384, 0x0039f, 0x00397, 0x00296, 0x0032e, 0x00332, 0x003c6, 0x003e6, - 0x0012d, 0x000d1, 0x00402, 0x000dd, 0x00161, 0x0012b, 0x00127, 0x0045d, - 0x00601, 0x004ab, 0x0045f, 0x00410, 0x004bf, 0x00528, 0x0045c, 0x00424, - 0x00400, 0x00511, 0x00618, 0x0073d, 0x0063a, 0x00614, 0x0073c, 0x007c0, - 0x007cf, 0x00802, 0x00966, 0x00964, 0x00951, 0x008a0, 0x00346, 0x00803, - 0x00a52, 0x0024a, 0x007c1, 0x0063f, 0x00126, 0x00406, 0x00789, 0x008a2, - 0x00960, 0x00967, 0x00c05, 0x00c70, 0x00c79, 0x00a5d, 0x00c26, 0x00c4d, - 0x00372, 0x008a5, 0x00c08, 0x002c5, 0x00f11, 0x00cc4, 0x00f8e, 0x00e16, - 0x00496, 0x00e77, 0x00f9c, 0x00c25, 0x00f1e, 0x00c27, 0x00f1f, 0x00e17, - 0x00ccd, 0x00355, 0x00c09, 0x00c78, 0x00f90, 0x00521, 0x00357, 0x00356, - 0x0068e, 0x00f9d, 0x00c04, 0x00e58, 0x00a20, 0x00a2c, 0x00c4c, 0x0052f, - 0x00f8d, 0x01178, 0x01053, 0x01097, 0x0180f, 0x0180d, 0x012fb, 0x012aa, - 0x0202a, 0x00a40, 0x018ed, 0x01ceb, 0x01455, 0x018e3, 0x012a1, 0x00354, - 0x00353, 0x00f1c, 0x00c7b, 0x00c37, 0x0101d, 0x012cb, 0x01142, 0x0197d, - 0x01095, 0x01e3b, 0x0186b, 0x00588, 0x01c2a, 0x014b8, 0x01e3a, 0x018ec, - 0x01f46, 0x012fa, 0x00a53, 0x01ce8, 0x00a55, 0x01c29, 0x0117b, 0x01052, - 0x012a0, 0x00589, 0x00950, 0x01c2b, 0x00a50, 0x0208b, 0x0180e, 0x02027, - 0x02556, 0x01e20, 0x006e7, 0x01c28, 0x0197a, 0x00684, 0x020a2, 0x01f22, - 0x03018, 0x039cf, 0x03e25, 0x02557, 0x0294c, 0x028a6, 0x00d11, 0x028a9, - 0x02979, 0x00d46, 0x00a56, 0x039ce, 0x030cc, 0x0329a, 0x0149d, 0x0510f, - 0x0451c, 0x02028, 0x03299, 0x01ced, 0x014b9, 0x00f85, 0x00c7a, 0x01800, - 0x00341, 0x012ca, 0x039c8, 0x0329d, 0x00d0d, 0x03e20, 0x05144, 0x00d45, - 0x030d0, 0x0186d, 0x030d5, 0x00d0f, 0x00d40, 0x04114, 0x020a1, 0x0297f, - 0x03e24, 0x032f1, 0x04047, 0x030d4, 0x028a8, 0x00d0e, 0x0451d, 0x04044, - 0x0297e, 0x04042, 0x030d2, 0x030cf, 0x03e21, 0x03e26, 0x028a5, 0x0451a, - 0x00d48, 0x01a16, 0x00d44, 0x04518, 0x0149b, 0x039ca, 0x01498, 0x0403d, - 0x0451b, 0x0149c, 0x032f3, 0x030cb, 0x08073, 0x03e22, 0x0529a, 0x020aa, - 0x039cc, 0x0738a, 0x06530, 0x07389, 0x06193, 0x08071, 0x04043, 0x030ce, - 0x05147, 0x07388, 0x05145, 0x08072, 0x04521, 0x00d47, 0x0297c, 0x030cd, - 0x030ca, 0x0000b, 0x0000c, 0x00083, 0x000e4, 0x00048, 0x00102, 0x001cc, - 0x001f5, 0x00097, 0x0020b, 0x00124, 0x00453, 0x00627, 0x00639, 0x00605, - 0x00517, 0x001b8, 0x00663, 0x00667, 0x007c3, 0x00823, 0x00961, 0x00963, - 0x00e5a, 0x00e59, 0x00a2b, 0x00cbf, 0x00292, 0x00a2d, 0x007d0, 0x00953, - 0x00cc5, 0x00f84, 0x004ab, 0x014a7, 0x0068a, 0x0117a, 0x0052e, 0x01442, - 0x0052c, 0x00c77, 0x00f8f, 0x004aa, 0x01094, 0x01801, 0x012c4, 0x0297b, - 0x00952, 0x01f19, 0x006a5, 0x01149, 0x012c5, 0x01803, 0x022f2, 0x0329b, - 0x04520, 0x0149e, 0x00d13, 0x01f16, 0x01ce9, 0x0101c, 0x006e6, 0x039c9, - 0x06191, 0x07c8e, 0x06192, 0x0ca63, 0x039cd, 0x06190, 0x06884, 0x06885, - 0x07382, 0x00d49, 0x00d41, 0x0450c, 0x0149a, 0x030d1, 0x08077, 0x03e23, - 0x01a15, 0x0e701, 0x0e702, 0x08079, 0x0822a, 0x0a218, 0x07887, 0x0403f, - 0x0520b, 0x0529b, 0x0e700, 0x04519, 0x00007, 0x000e0, 0x000d0, 0x0039b, - 0x003e5, 0x00163, 0x0063e, 0x007c9, 0x00806, 0x00954, 0x01044, 0x01f44, - 0x0197c, 0x01f45, 0x00a51, 0x01f47, 0x00951, 0x0052d, 0x02291, 0x0092f, - 0x00a54, 0x00d12, 0x0297d, 0x00d0c, 0x01499, 0x0329e, 0x032f0, 0x02025, - 0x039c6, 0x00a57, 0x03e46, 0x00d42, 0x0738b, 0x05146, 0x04046, 0x08078, - 0x0510e, 0x07886, 0x02904, 0x04156, 0x04157, 0x06032, 0x030d3, 0x08bce, - 0x04040, 0x0403e, 0x0a414, 0x10457, 0x08075, 0x06887, 0x07c8f, 0x039c7, - 0x07387, 0x08070, 0x08bcf, 0x1482a, 0x10456, 0x1482b, 0x01a17, 0x06886, - 0x0450d, 0x00013, 0x0006b, 0x00615, 0x0080b, 0x0082b, 0x00952, 0x00e5b, - 0x018e2, 0x0186c, 0x01f18, 0x0329f, 0x00d43, 0x03e29, 0x05140, 0x05141, - 0x0ca62, 0x06033, 0x03c42, 0x03e28, 0x0450f, 0x0a21a, 0x07384, 0x0a219, - 0x0e703, 0x0a21b, 0x01a14, 0x07383, 0x045e6, 0x0007a, 0x0012c, 0x00ccc, - 0x0068f, 0x01802, 0x00a52, 0x00953, 0x04045, 0x01a20, 0x0451f, 0x000a4, - 0x00735, 0x01cec, 0x02029, 0x020a3, 0x0451e, 0x00069, 0x00c24, 0x02024, - 0x032f2, 0x05142, 0x00196, 0x00523, 0x000a6, 0x0197b, 0x0030b, 0x0092e, - 0x003e9, 0x03e27, 0x00160, 0x05143, 0x00652, 0x04041, 0x00734, 0x028a7, - 0x0080f, 0x01483, 0x0097c, 0x00340, 0x0068b, 0x00522, 0x01054, 0x01096, - 0x01f17, 0x0202b, 0x01cea, 0x020a0, 0x02978, 0x02026, 0x0297a, 0x039cb, - 0x03e2b, 0x0149f, 0x0329c, 0x07385, 0x08074, 0x0450e, 0x03e2a, 0x05149, - 0x08076, 0x07386, 0x05148, -}; - -static const uint8_t coef1_huffbits[555] = { - 9, 5, 2, 4, 4, 5, 5, 5, - 6, 6, 6, 6, 6, 7, 7, 7, - 7, 7, 7, 7, 7, 7, 7, 8, - 8, 8, 8, 8, 8, 8, 8, 8, - 8, 8, 8, 8, 8, 8, 8, 8, - 9, 8, 8, 8, 8, 9, 9, 9, - 9, 9, 9, 9, 9, 9, 9, 9, - 9, 10, 10, 10, 9, 9, 9, 9, - 10, 10, 10, 10, 10, 10, 10, 10, - 10, 10, 10, 10, 10, 10, 10, 10, - 10, 10, 10, 10, 10, 10, 10, 10, - 11, 11, 11, 11, 11, 11, 11, 11, - 11, 11, 11, 11, 11, 11, 11, 11, - 11, 11, 11, 11, 11, 11, 11, 11, - 11, 12, 12, 12, 12, 12, 12, 12, - 12, 12, 11, 11, 11, 11, 11, 12, - 12, 12, 12, 12, 12, 12, 12, 12, - 13, 12, 12, 12, 12, 12, 12, 12, - 13, 12, 12, 12, 12, 12, 12, 12, - 12, 13, 12, 12, 12, 13, 13, 13, - 13, 12, 12, 12, 12, 12, 12, 13, - 12, 13, 13, 13, 13, 13, 13, 13, - 14, 14, 13, 13, 13, 13, 13, 13, - 13, 12, 12, 12, 13, 13, 13, 13, - 13, 13, 13, 13, 13, 13, 13, 13, - 13, 13, 14, 13, 14, 13, 13, 13, - 13, 13, 14, 13, 14, 14, 13, 14, - 14, 13, 14, 13, 13, 14, 14, 13, - 14, 14, 14, 14, 14, 14, 14, 14, - 14, 15, 14, 14, 14, 14, 15, 15, - 15, 14, 14, 13, 13, 12, 12, 13, - 13, 13, 14, 14, 15, 14, 15, 15, - 14, 13, 14, 15, 15, 15, 14, 14, - 14, 14, 15, 14, 14, 15, 15, 15, - 14, 15, 14, 14, 14, 14, 14, 15, - 15, 16, 15, 15, 15, 14, 15, 15, - 15, 15, 14, 14, 16, 14, 15, 14, - 14, 15, 15, 15, 15, 16, 15, 14, - 15, 15, 15, 16, 15, 15, 14, 14, - 14, 4, 7, 8, 8, 9, 9, 9, - 9, 10, 10, 11, 11, 11, 11, 11, - 11, 12, 11, 11, 11, 12, 12, 12, - 12, 12, 12, 12, 12, 12, 11, 12, - 12, 12, 13, 13, 13, 13, 13, 13, - 13, 12, 12, 13, 13, 13, 13, 14, - 14, 13, 14, 13, 13, 13, 14, 14, - 15, 15, 14, 13, 13, 13, 14, 14, - 15, 15, 15, 16, 14, 15, 17, 17, - 15, 15, 15, 15, 15, 14, 16, 14, - 16, 16, 16, 16, 16, 16, 15, 15, - 17, 15, 16, 15, 6, 8, 10, 10, - 10, 11, 11, 11, 12, 12, 13, 13, - 13, 13, 14, 13, 14, 13, 14, 14, - 14, 14, 14, 15, 15, 14, 14, 14, - 14, 14, 14, 15, 15, 15, 15, 16, - 15, 15, 16, 15, 15, 15, 14, 16, - 15, 15, 18, 17, 16, 17, 15, 14, - 15, 16, 16, 19, 17, 19, 16, 17, - 15, 7, 10, 11, 12, 12, 12, 12, - 13, 13, 13, 14, 15, 14, 15, 15, - 16, 15, 14, 14, 15, 16, 15, 16, - 16, 16, 16, 15, 15, 7, 11, 12, - 13, 13, 14, 14, 15, 15, 15, 8, - 11, 13, 14, 14, 15, 9, 12, 14, - 14, 15, 9, 13, 10, 13, 10, 14, - 10, 14, 11, 15, 11, 15, 11, 14, - 12, 15, 12, 13, 13, 13, 13, 13, - 13, 14, 13, 14, 14, 14, 14, 14, - 14, 15, 14, 15, 16, 15, 14, 15, - 16, 15, 15, -}; - -static const uint32_t coef2_huffcodes[1336] = { - 0x003e6, 0x000f6, 0x00000, 0x00002, 0x00006, 0x0000f, 0x0001b, 0x00028, - 0x00039, 0x0003f, 0x0006b, 0x00076, 0x000b7, 0x000e8, 0x000ef, 0x00169, - 0x001a7, 0x001d4, 0x001dc, 0x002c4, 0x00349, 0x00355, 0x00391, 0x003dc, - 0x00581, 0x005b2, 0x00698, 0x0070c, 0x00755, 0x0073a, 0x00774, 0x007cf, - 0x00b0a, 0x00b66, 0x00d2e, 0x00d5e, 0x00e1b, 0x00eac, 0x00e5a, 0x00f7e, - 0x00fa1, 0x0163e, 0x01a37, 0x01a52, 0x01c39, 0x01ab3, 0x01d5f, 0x01cb6, - 0x01f52, 0x01dd9, 0x02c04, 0x02c2e, 0x02c2d, 0x02c23, 0x03467, 0x034a3, - 0x0351b, 0x03501, 0x03a5d, 0x0351c, 0x03875, 0x03dea, 0x0397b, 0x039db, - 0x03df1, 0x039d8, 0x03bb4, 0x0580a, 0x0584d, 0x05842, 0x05b13, 0x058ea, - 0x0697d, 0x06a06, 0x068cc, 0x06ac7, 0x06a96, 0x072f4, 0x07543, 0x072b4, - 0x07d20, 0x0b003, 0x073b5, 0x07be6, 0x0d180, 0x07bd1, 0x07cb8, 0x07d06, - 0x07d25, 0x0d2f2, 0x0d19a, 0x0d334, 0x0e1dc, 0x0d529, 0x0d584, 0x0e1d2, - 0x0e5e3, 0x0eec4, 0x0e564, 0x0fa49, 0x16001, 0x0eedc, 0x0f7fa, 0x1a32c, - 0x16131, 0x16003, 0x0f9c8, 0x1ef80, 0x1d2a0, 0x1aa4b, 0x0f7ce, 0x1abfe, - 0x1aa50, 0x1a458, 0x1a816, 0x1cae4, 0x1d2fe, 0x1d52e, 0x1aa4c, 0x2c245, - 0x1d2a1, 0x1a35d, 0x1ca1b, 0x1d5d8, 0x1f531, 0x1ca1c, 0x1f389, 0x1f4af, - 0x3a5e7, 0x351fb, 0x2c24b, 0x34bce, 0x2c24d, 0x2c249, 0x2c24a, 0x72dfc, - 0x357ef, 0x35002, 0x3a5e6, 0x39431, 0x5843b, 0x34a77, 0x58431, 0x3a5f3, - 0x3a5dd, 0x3e5e5, 0x356bd, 0x3976e, 0x6a3d2, 0x3500d, 0x694c4, 0x580bd, - 0x3e5e8, 0x74b95, 0x34a6e, 0x3977c, 0x39432, 0x5b0d2, 0x6a3d8, 0x580b8, - 0x5b0cb, 0x5b0d7, 0x72dee, 0x72ded, 0x72dec, 0x74b9c, 0x3977f, 0x72dea, - 0x74b9e, 0x7be7d, 0x580bf, 0x5b0d5, 0x7cba8, 0x74b91, 0x3e5dd, 0xb6171, - 0xd46b3, 0xd46b9, 0x7cba1, 0x74b9f, 0x72de1, 0xe59f5, 0x3e5eb, 0x00004, - 0x00015, 0x00038, 0x00075, 0x000e8, 0x001d3, 0x00347, 0x0039c, 0x00690, - 0x0074a, 0x00b60, 0x00e93, 0x00f74, 0x0163d, 0x01a5a, 0x01d24, 0x01cbe, - 0x01f4b, 0x03468, 0x03562, 0x03947, 0x03e82, 0x05804, 0x05b12, 0x05803, - 0x0696d, 0x06a9e, 0x0697c, 0x06978, 0x06afb, 0x074b2, 0x072f5, 0x073c0, - 0x07541, 0x06944, 0x074b7, 0x070d3, 0x07ba9, 0x0b0b1, 0x0d1af, 0x0e1dd, - 0x0e5e2, 0x0e1a3, 0x0eec3, 0x1612f, 0x0e961, 0x0eeda, 0x0e78e, 0x0fa48, - 0x1612c, 0x0e511, 0x0e565, 0x0e953, 0x1aa4a, 0x0e59d, 0x1d52c, 0x1a811, - 0x1cae7, 0x1abfc, 0x1d52d, 0x1cacf, 0x1cf05, 0x2c254, 0x34a72, 0x1f4ac, - 0x3976b, 0x34a71, 0x2c6d9, 0x2d873, 0x34a6a, 0x357e7, 0x3464c, 0x3e5f5, - 0x58433, 0x1f53a, 0x3500a, 0x357ea, 0x34a73, 0x3942f, 0x357e5, 0x39775, - 0x694cd, 0x39772, 0x7cba5, 0x6a3ef, 0x35483, 0x74b98, 0x5b0c1, 0x39770, - 0x3a5d7, 0x39433, 0x39434, 0x694ce, 0x580be, 0x3e5ff, 0x6a3ec, 0xb616f, - 0xd46b1, 0x6a3d1, 0x72de5, 0x74b6e, 0x72de9, 0x3e700, 0xd46b6, 0x6a3e9, - 0x74b69, 0xe5675, 0xd46b8, 0x7cbaa, 0x3a5d1, 0x0000c, 0x0003c, 0x000eb, - 0x001f1, 0x003a4, 0x006a8, 0x007d5, 0x00d43, 0x00e77, 0x016c5, 0x01cb1, - 0x02c5d, 0x03a55, 0x03a56, 0x03e51, 0x03bb5, 0x05b0a, 0x06a9f, 0x074b8, - 0x07d28, 0x0d187, 0x0d40e, 0x0d52e, 0x0d425, 0x0eae3, 0x0e1d3, 0x1612e, - 0x0e59e, 0x0eec2, 0x0e578, 0x0e51a, 0x0e579, 0x0e515, 0x0e960, 0x0d183, - 0x0d220, 0x0d2cb, 0x0e512, 0x16c3e, 0x16002, 0x16c42, 0x1cae9, 0x3461a, - 0x1d2fa, 0x1a308, 0x1a849, 0x1cf07, 0x1f38f, 0x34b65, 0x2c253, 0x1ef9e, - 0x1cbc3, 0x1cbc1, 0x2c255, 0x1f384, 0x58435, 0x2c5cd, 0x3a5f7, 0x2c252, - 0x3959c, 0x2c6d8, 0x3a5d3, 0x6ad78, 0x6a3f2, 0x7cba9, 0xb6176, 0x72deb, - 0x39764, 0x3e5f6, 0x3a5d8, 0x74a8c, 0x6a3e6, 0x694d1, 0x6ad79, 0x1a4592, - 0xe59fb, 0x7cbb3, 0x5b0cd, 0x00017, 0x000b5, 0x002c3, 0x005b7, 0x00b1c, - 0x00e5c, 0x0163f, 0x01ab2, 0x01efa, 0x0348a, 0x0396e, 0x058da, 0x06963, - 0x06a30, 0x072cd, 0x073cf, 0x07ce7, 0x0d2ca, 0x0d2d8, 0x0e764, 0x0e794, - 0x16008, 0x16167, 0x1617e, 0x1aa49, 0x1a30b, 0x1a813, 0x2c6da, 0x1a580, - 0x1cbc2, 0x0f9ca, 0x1617f, 0x1d2fe, 0x0f7fc, 0x16c40, 0x0e513, 0x0eec5, - 0x0f7c3, 0x1d508, 0x1a81e, 0x1d2fd, 0x39430, 0x35486, 0x3e5fd, 0x2c24c, - 0x2c75a, 0x34a74, 0x3a5f4, 0x3464d, 0x694ca, 0x3a5f1, 0x1d509, 0x1d5c0, - 0x34648, 0x3464e, 0x6a3d5, 0x6a3e8, 0x6a3e7, 0x5b0c3, 0x2c248, 0x1f38a, - 0x3a5f2, 0x6a3e5, 0x00029, 0x00168, 0x0058c, 0x00b67, 0x00f9d, 0x01c3d, - 0x01cbf, 0x02c20, 0x0351d, 0x03df6, 0x06af9, 0x072b5, 0x0b1d7, 0x0b0b2, - 0x0d40a, 0x0d52b, 0x0e952, 0x0e797, 0x163c3, 0x1c3a0, 0x1f386, 0x1ca21, - 0x34655, 0x2c247, 0x1f53b, 0x2c250, 0x2c24f, 0x1f385, 0x1ef5d, 0x1cf15, - 0x1caea, 0x1ab0a, 0x1cf19, 0x1f53d, 0x1d5c2, 0x1d2fb, 0x1ef58, 0x34a78, - 0x357ec, 0x1f533, 0x3a5e1, 0x694d2, 0x58482, 0x3a5ee, 0x2c6dc, 0x357eb, - 0x5b0c4, 0x39778, 0x6a3e1, 0x7cbb4, 0x3a5e1, 0x74b68, 0x3a5ef, 0x3a5d2, - 0x39424, 0x72de2, 0xe59f6, 0xe59f7, 0x3e702, 0x3e5ec, 0x1f38b, 0x0003b, - 0x001f0, 0x00777, 0x00fa8, 0x01cb2, 0x02d84, 0x03a57, 0x03dd6, 0x06917, - 0x06a11, 0x07d07, 0x0eae2, 0x0e796, 0x0f9c9, 0x0f7fb, 0x16166, 0x16160, - 0x1ab1b, 0x1abfa, 0x2d87b, 0x1d2f7, 0x39768, 0x1f38c, 0x34653, 0x34651, - 0x6a3d9, 0x35001, 0x3abbd, 0x38742, 0x39426, 0x34a76, 0x3a5ec, 0x34a75, - 0x35000, 0x35488, 0x1cf10, 0x2c6db, 0x357ed, 0x357e8, 0x357e9, 0x3a5f0, - 0x694c2, 0xb6178, 0x72df5, 0x39425, 0x3942b, 0x74b6d, 0x74b6f, 0xb6177, - 0xb6179, 0x74b6a, 0xb6172, 0x58487, 0x3e5ee, 0x3e5ed, 0x72df2, 0x72df4, - 0x7cbae, 0x6a3ca, 0x70e86, 0x34bcf, 0x6a3c8, 0x00059, 0x00384, 0x00d5b, - 0x01c38, 0x03560, 0x0395b, 0x0584e, 0x06964, 0x073cd, 0x0b1e7, 0x0e798, - 0x0e78d, 0x0fa43, 0x1a848, 0x1a32f, 0x1aa4e, 0x3464a, 0x1f4ab, 0x1f38d, - 0x3a5eb, 0x3a5d4, 0x3548a, 0x6a3c7, 0x5b0d0, 0x6a3c5, 0x7cbb0, 0x694cb, - 0x3a5e5, 0x3e5e2, 0x3942c, 0x2d872, 0x1f4ae, 0x3a5d5, 0x694d3, 0x58481, - 0x35009, 0x39774, 0x58432, 0xb616c, 0x5b0db, 0x3548b, 0xb6174, 0x1d5d95, - 0xb004c, 0x7cbb2, 0x3a5e5, 0x74a8f, 0xe59f9, 0x72df6, 0xe59fd, 0x7cbad, - 0xd427d, 0x72cff, 0x3977a, 0x5b0d9, 0xb616d, 0xb616b, 0x1a4593, 0x7cbaf, - 0x5b0da, 0x00071, 0x003eb, 0x01603, 0x02c6c, 0x03961, 0x068c8, 0x06a31, - 0x072bd, 0x0d2c2, 0x0e51b, 0x0e5e6, 0x1abfb, 0x1d2ff, 0x1cae5, 0x1ef5c, - 0x1ef5e, 0x1cf13, 0x34a6d, 0x3976d, 0xb616a, 0x3e5f2, 0x6a3c4, 0xb6169, - 0x3e5dc, 0x580b9, 0x74b99, 0x75764, 0x58434, 0x3a5d9, 0x6945a, 0x69459, - 0x3548c, 0x3a5e9, 0x69457, 0x72df1, 0x6945e, 0x6a35e, 0x3e701, 0xb6168, - 0x5b0dd, 0x3a5de, 0x6a3c2, 0xd4278, 0x6a3cc, 0x72dfd, 0xb6165, 0x16009a, - 0x7cbb1, 0xd427c, 0xb6162, 0xe765e, 0x1cecbe, 0x7cbb6, 0x69454, 0xb6160, - 0xd427a, 0x1d5d96, 0xb1d6d, 0xe59f4, 0x72de8, 0x3a5db, 0x0007a, 0x006ae, - 0x01c3c, 0x03aba, 0x058e9, 0x072cc, 0x0d2dd, 0x0d22d, 0x0eec1, 0x0eedb, - 0x1d2a2, 0x1ef5b, 0x357e2, 0x3abbf, 0x1d2f9, 0x35004, 0x3a5dc, 0x351fc, - 0x3976c, 0x6a3c6, 0x6a3cb, 0x3e5ea, 0xe59f3, 0x6a3ce, 0x69452, 0xe59f0, - 0x74b90, 0xd4279, 0xd427b, 0x7cbb5, 0x5b0c5, 0x3a5e3, 0x3a5e2, 0x000d0, - 0x00775, 0x01efe, 0x03dd5, 0x0728c, 0x07cb9, 0x0e1a2, 0x0ea85, 0x0eed8, - 0x1a30a, 0x1aa4f, 0x3a5df, 0x35008, 0x3a5e0, 0x3e5f4, 0x3e5f7, 0xb1d6c, - 0x5843e, 0x34a70, 0x72df8, 0x74b6b, 0xd427f, 0x72df0, 0x5b0bf, 0x5b0c0, - 0xd46b0, 0x72def, 0xe59f8, 0x162e64, 0xb1d6f, 0x3a5e0, 0x39427, 0x69166, - 0x6a3e2, 0x6a3e3, 0x74a8d, 0xd427e, 0x1d5d97, 0xd46b4, 0x5b0d8, 0x6a3d3, - 0x000e0, 0x00b63, 0x034cc, 0x06a33, 0x073c9, 0x0e1a0, 0x0f7fd, 0x0f9cc, - 0x1617d, 0x1caeb, 0x1f4a9, 0x3abb3, 0x69450, 0x39420, 0x39777, 0x3e5e0, - 0x6a3d4, 0x6a3ed, 0xb6166, 0xe59f1, 0xb1d6e, 0xe5676, 0x6a3ea, 0xe5674, - 0xb6163, 0xd46b7, 0x7cba6, 0xd46ba, 0x1d5d94, 0xb6164, 0x6a3f1, 0x7cba2, - 0x69451, 0x72dfa, 0xd46bb, 0x72df7, 0x74b94, 0x1cecbf, 0xe59fa, 0x16009b, - 0x6a3e4, 0x000e6, 0x00e94, 0x03876, 0x070ef, 0x0d52a, 0x16015, 0x16014, - 0x1abf9, 0x1cf17, 0x34a79, 0x34650, 0x3e705, 0x6a3d0, 0x58430, 0x74b9d, - 0x7be7e, 0x5b0be, 0x39773, 0x6a3de, 0x000fb, 0x00f7b, 0x03dd7, 0x07bd0, - 0x0e59c, 0x0f9cd, 0x1cf18, 0x1d2ff, 0x34a7a, 0x39429, 0x3500c, 0x72de0, - 0x69456, 0x7be7c, 0xd46b5, 0xd46b2, 0x6a3dd, 0x001a2, 0x0163b, 0x06913, - 0x0b016, 0x0fa42, 0x1a32d, 0x1cf06, 0x34a7c, 0x34a7d, 0xb6161, 0x35481, - 0x3e5fa, 0x7cba0, 0x7be7f, 0x7cba3, 0x7cba7, 0x5b0d3, 0x72de6, 0x6a3dc, - 0x001a9, 0x01ab4, 0x06a34, 0x0d46a, 0x16130, 0x1ef5f, 0x1f532, 0x1f536, - 0x3942e, 0x58436, 0x6a3db, 0x6945b, 0x001c9, 0x01ca0, 0x0728b, 0x0eed9, - 0x1f539, 0x1ca1d, 0x39765, 0x39766, 0x58439, 0x6945d, 0x39767, 0x001d3, - 0x01f2c, 0x07bfc, 0x16161, 0x34652, 0x3a5ed, 0x3548d, 0x58438, 0x6a3da, - 0x002c1, 0x02c5e, 0x0d335, 0x1ab1a, 0x2d874, 0x35006, 0x35484, 0x5b0cc, - 0x74b9a, 0x72df3, 0x6a3d6, 0x002da, 0x034b3, 0x0d5ae, 0x1caee, 0x2d871, - 0x357e3, 0x74b97, 0x72df9, 0x580ba, 0x5b0d4, 0x0034d, 0x0354e, 0x0f750, - 0x1cbc0, 0x3a5e7, 0x3a5e4, 0x00385, 0x03a58, 0x16c41, 0x2c5cf, 0x3e5e1, - 0x74b6c, 0xe5677, 0x6a3df, 0x00390, 0x03e50, 0x163c2, 0x2d876, 0x35482, - 0x5b0d6, 0x5843a, 0x0039f, 0x0585e, 0x1a583, 0x3500f, 0x74b93, 0x39771, - 0x003e4, 0x06912, 0x16c43, 0x357e1, 0x0058a, 0x0696f, 0x1f538, 0x5b0c9, - 0x6a3cf, 0x005b6, 0x06af8, 0x1f534, 0x58483, 0x6a3e0, 0x00695, 0x07d02, - 0x1cae8, 0x58485, 0x006a2, 0x0754a, 0x357ee, 0x3977b, 0x00748, 0x074b2, - 0x34a7b, 0x00729, 0x0b1e0, 0x34649, 0x3e5e3, 0x0073d, 0x0d2c4, 0x3e5e6, - 0x007bb, 0x0b099, 0x39762, 0x5b0ce, 0x6945f, 0x007d1, 0x0d5ab, 0x39779, - 0x007d3, 0x0d52f, 0x39763, 0x6945c, 0x00b1a, 0x0d2c5, 0x35489, 0x00d23, - 0x0eaed, 0x3e5f8, 0x00d32, 0x16016, 0x3e5fb, 0x00d41, 0x0e768, 0x3a5ed, - 0x00e1f, 0x16017, 0x58027, 0x00ead, 0x0fa07, 0x69455, 0x00e54, 0x1612b, - 0x00e55, 0x1a581, 0x00f78, 0x1a32b, 0x580bc, 0x6a3ee, 0x00f79, 0x1abfd, - 0x00f95, 0x1ab18, 0x6a3f0, 0x01637, 0x1aa4d, 0x0162d, 0x1f53c, 0x6a3f3, - 0x01a31, 0x1a810, 0x39769, 0x01a50, 0x1caef, 0x01a36, 0x1a32e, 0x01a67, - 0x1f38e, 0x01a85, 0x1ef59, 0x01aa6, 0x1ef83, 0x01d51, 0x2c012, 0x01d53, - 0x2d879, 0x01d5e, 0x35005, 0x01cba, 0x1cf04, 0x69453, 0x01d2d, 0x351ff, - 0x01f2d, 0x2d86f, 0x01f29, 0x35007, 0x02c22, 0x351fa, 0x02c03, 0x3a5ec, - 0x02c5f, 0x3a5eb, 0x02c58, 0x34a6b, 0x03469, 0x356be, 0x02c59, 0x34a6c, - 0x0346a, 0x3a5ea, 0x034bd, 0x034bf, 0x356bf, 0x0386a, 0x03ab9, 0x5843f, - 0x0386b, 0x3a5f5, 0x03a4b, 0x39421, 0x03aa4, 0x3a5e9, 0x03a5a, 0x03960, - 0x3977e, 0x03de9, 0x03958, 0x03df7, 0x039e1, 0x3e5e4, 0x0395f, 0x69458, - 0x03e91, 0x03df2, 0x39428, 0x058f2, 0x03e80, 0x6a3c3, 0x03e93, 0x694c0, - 0x058b8, 0x5b0ca, 0x0584f, 0x694c1, 0x058f1, 0x068d6, 0x06a10, 0x06ac3, - 0x06a32, 0x070d2, 0x06911, 0x074b1, 0x07494, 0x06ad4, 0x06ad6, 0x072b8, - 0x06afa, 0x074b3, 0x07540, 0x073ce, 0x0b005, 0x074b3, 0x07495, 0x074b9, - 0x0d336, 0x07bff, 0x07763, 0x073c8, 0x07d29, 0x0b622, 0x0d221, 0x0d181, - 0x0b1d1, 0x074b8, 0x0b1d0, 0x0d19b, 0x0d2c3, 0x0b172, 0x0d2dc, 0x0b623, - 0x0d5aa, 0x0d426, 0x0d182, 0x0e795, 0x0e1d1, 0x0d337, 0x0e96c, 0x0e5e4, - 0x0e514, 0x0eaee, 0x16000, 0x0e767, 0x0e1a1, 0x0e78f, 0x16004, 0x0f7c2, - 0x0e799, 0x0e5e7, 0x0e566, 0x0e769, 0x0f751, 0x0eede, 0x0fa06, 0x16005, - 0x0fa9f, 0x1a5e6, 0x0e766, 0x1636f, 0x0eedd, 0x0eec0, 0x1a309, 0x1ceca, - 0x163cd, 0x0f9cb, 0x0eedf, 0x1a582, 0x1612d, 0x0e5e5, 0x1abf8, 0x1a30c, - 0x1ca1f, 0x163cc, 0x1a35c, 0x1ca1e, 0x1aa51, 0x163ac, 0x1a84e, 0x1a53f, - 0x1cf16, 0x1d2fc, 0x1a5b3, 0x1ab19, 0x1a81f, 0x1d5c3, 0x16c3f, 0x1d5c1, - 0x1d2fc, 0x1f4aa, 0x1a812, 0x1f535, 0x1cf12, 0x1a817, 0x1617c, 0x1ab0b, - 0x1d2f8, 0x1ef82, 0x2d87a, 0x1d52f, 0x1f530, 0x1aa48, 0x35487, 0x1d2fd, - 0x1f4ad, 0x1cf11, 0x3461b, 0x35485, 0x1ca20, 0x1caed, 0x1cae6, 0x1abff, - 0x3464f, 0x34a6f, 0x1ef81, 0x3464b, 0x39d96, 0x1f383, 0x1f537, 0x1cf14, - 0x2c5ce, 0x3500e, 0x2c251, 0x1caec, 0x1f387, 0x34654, 0x357e4, 0x2d878, - 0x3500b, 0x35480, 0x3a5e8, 0x3548e, 0x34b64, 0x1f4a8, 0x35003, 0x3e5df, - 0x2d870, 0x357e6, 0x3e5f0, 0x1ef5a, 0x3a5ea, 0x1f388, 0x3e703, 0x2c24e, - 0x3a5e2, 0x351fd, 0x2c6dd, 0x3e704, 0x351fe, 0x2d875, 0x5b0c7, 0x3976a, - 0x3a5e6, 0x39423, 0x58480, 0x2c246, 0x3a5e3, 0x2d877, 0x3e5f1, 0x3abbe, - 0x58489, 0x3e5f9, 0x357e0, 0x3abbc, 0x5b0c6, 0x69167, 0x69165, 0x3e5e9, - 0x39422, 0x3976f, 0x3977d, 0x3e5de, 0x6a3c9, 0x58b98, 0x3a5f6, 0x3a5d0, - 0x58486, 0x6a3c1, 0x3e5fc, 0x5b0dc, 0x3548f, 0x3942d, 0x694c9, 0x58484, - 0x3a5e8, 0x74b9b, 0x74b96, 0x694d0, 0x58488, 0x3a5e4, 0x3942a, 0x72ec2, - 0x39776, 0x5b0d1, 0x5b0cf, 0x3a5d6, 0xe59fc, 0x5b0c8, 0x3e5e7, 0x7cbb7, - 0x70e87, 0x7cbab, 0x5b0c2, 0x694c3, 0x74a8e, 0x3e5f3, 0x6a3cd, 0x72dfe, - 0x73b2e, 0x72ec0, 0x694c5, 0x58437, 0x694c8, 0x72dff, 0x39435, 0x5843d, - 0x6a3d7, 0x72ec1, 0xd22c8, 0x694cf, 0xb6173, 0x3e5fe, 0x580bb, 0xe59f2, - 0xb616e, 0xb6175, 0x3a5da, 0x5b0bd, 0x694cc, 0x5843c, 0x694c7, 0x74b92, - 0x72ec3, 0x694c6, 0xb6170, 0x7cbac, 0xb1733, 0x7cba4, 0xb6167, 0x72de7, - 0x72de4, 0x6a3c0, 0x3e5ef, 0x162e65, 0x72de3, 0x72dfb, 0x6a35f, 0x6a3eb, -}; - -static const uint8_t coef2_huffbits[1336] = { - 11, 9, 2, 3, 4, 4, 5, 6, - 6, 7, 7, 8, 8, 8, 9, 9, - 9, 9, 10, 10, 10, 10, 11, 11, - 11, 11, 11, 11, 11, 12, 12, 12, - 12, 12, 12, 12, 12, 12, 13, 13, - 13, 13, 13, 13, 13, 13, 13, 14, - 14, 14, 14, 14, 14, 14, 14, 14, - 14, 14, 14, 14, 14, 15, 15, 15, - 15, 15, 15, 15, 15, 15, 15, 15, - 15, 15, 15, 15, 15, 16, 15, 16, - 16, 16, 16, 16, 16, 16, 16, 16, - 16, 16, 16, 16, 16, 16, 16, 16, - 17, 17, 17, 17, 17, 17, 17, 17, - 17, 17, 17, 18, 17, 17, 17, 17, - 17, 17, 17, 18, 18, 17, 17, 18, - 17, 17, 18, 17, 18, 18, 18, 18, - 19, 18, 18, 18, 18, 18, 18, 20, - 18, 18, 18, 19, 19, 18, 19, 18, - 19, 19, 18, 19, 19, 18, 19, 19, - 19, 19, 18, 19, 19, 19, 19, 19, - 19, 19, 20, 20, 20, 19, 19, 20, - 19, 20, 19, 19, 20, 19, 19, 20, - 20, 20, 20, 19, 20, 21, 19, 3, - 5, 7, 8, 9, 9, 10, 11, 11, - 12, 12, 12, 13, 13, 13, 13, 14, - 14, 14, 14, 15, 15, 15, 15, 15, - 15, 15, 15, 15, 15, 15, 16, 16, - 15, 15, 15, 15, 16, 16, 16, 16, - 17, 16, 17, 17, 16, 17, 17, 17, - 17, 17, 17, 16, 17, 17, 17, 17, - 18, 17, 17, 18, 18, 18, 18, 18, - 19, 18, 18, 18, 18, 18, 18, 19, - 19, 18, 18, 18, 18, 19, 18, 19, - 19, 19, 20, 19, 18, 19, 19, 19, - 19, 19, 19, 19, 19, 19, 19, 20, - 20, 19, 20, 19, 20, 19, 20, 19, - 19, 21, 20, 20, 19, 4, 7, 8, - 10, 11, 11, 12, 12, 13, 13, 14, - 14, 14, 14, 15, 15, 15, 15, 15, - 16, 16, 16, 16, 16, 16, 16, 17, - 17, 17, 17, 17, 17, 17, 16, 16, - 16, 16, 17, 17, 17, 17, 18, 18, - 18, 17, 17, 18, 18, 18, 18, 18, - 18, 18, 18, 18, 19, 18, 18, 18, - 19, 18, 19, 19, 19, 20, 20, 20, - 19, 19, 19, 19, 19, 19, 19, 21, - 21, 20, 19, 5, 8, 10, 11, 12, - 13, 13, 13, 14, 14, 15, 15, 15, - 15, 16, 16, 16, 16, 16, 17, 17, - 17, 17, 17, 17, 17, 17, 18, 17, - 18, 17, 17, 17, 17, 17, 17, 17, - 17, 17, 17, 17, 19, 18, 19, 18, - 18, 18, 18, 18, 19, 18, 17, 17, - 18, 18, 19, 19, 19, 19, 18, 18, - 18, 19, 6, 9, 11, 12, 13, 13, - 14, 14, 14, 15, 15, 16, 16, 16, - 16, 16, 16, 17, 17, 17, 18, 18, - 18, 18, 18, 18, 18, 18, 18, 18, - 18, 17, 18, 18, 17, 18, 18, 18, - 18, 18, 18, 19, 19, 18, 18, 18, - 19, 19, 19, 20, 19, 19, 18, 19, - 19, 20, 21, 21, 19, 19, 18, 6, - 10, 12, 13, 14, 14, 14, 15, 15, - 15, 16, 16, 17, 17, 17, 17, 17, - 17, 17, 18, 18, 19, 18, 18, 18, - 19, 18, 18, 18, 19, 18, 18, 18, - 18, 18, 18, 18, 18, 18, 18, 18, - 19, 20, 20, 19, 19, 19, 19, 20, - 20, 19, 20, 19, 19, 19, 20, 20, - 20, 19, 19, 18, 19, 7, 10, 12, - 13, 14, 15, 15, 15, 16, 16, 17, - 17, 17, 17, 17, 17, 18, 18, 18, - 18, 19, 18, 19, 19, 19, 20, 19, - 18, 19, 19, 18, 18, 19, 19, 19, - 18, 19, 19, 20, 19, 18, 20, 21, - 20, 20, 19, 19, 21, 20, 21, 20, - 20, 20, 19, 19, 20, 20, 21, 20, - 19, 7, 11, 13, 14, 15, 15, 15, - 16, 16, 17, 17, 17, 17, 18, 18, - 18, 18, 18, 19, 20, 19, 19, 20, - 19, 19, 19, 19, 19, 19, 19, 19, - 18, 18, 19, 20, 19, 19, 19, 20, - 19, 19, 19, 20, 19, 20, 20, 21, - 20, 20, 20, 21, 22, 20, 19, 20, - 20, 21, 20, 21, 20, 19, 8, 11, - 13, 14, 15, 16, 16, 16, 17, 17, - 17, 18, 18, 18, 18, 18, 19, 18, - 19, 19, 19, 19, 21, 19, 19, 21, - 19, 20, 20, 20, 19, 18, 18, 8, - 12, 14, 15, 16, 16, 16, 16, 17, - 17, 17, 19, 18, 18, 19, 19, 20, - 19, 18, 20, 19, 20, 20, 19, 19, - 20, 20, 21, 21, 20, 19, 19, 19, - 19, 19, 19, 20, 21, 20, 19, 19, - 8, 12, 14, 15, 16, 16, 17, 17, - 17, 18, 18, 18, 19, 19, 19, 19, - 19, 19, 20, 21, 20, 21, 19, 21, - 20, 20, 20, 20, 21, 20, 19, 20, - 19, 20, 20, 20, 19, 22, 21, 21, - 19, 9, 12, 14, 15, 16, 17, 17, - 17, 18, 18, 18, 19, 19, 19, 19, - 20, 19, 19, 19, 9, 13, 15, 16, - 17, 17, 18, 18, 18, 19, 18, 20, - 19, 20, 20, 20, 19, 9, 13, 15, - 16, 17, 17, 18, 18, 18, 20, 18, - 19, 20, 20, 20, 20, 19, 20, 19, - 9, 13, 15, 16, 17, 18, 18, 18, - 19, 19, 19, 19, 10, 14, 16, 17, - 18, 18, 19, 19, 19, 19, 19, 10, - 14, 16, 17, 18, 18, 18, 19, 19, - 10, 14, 16, 17, 18, 18, 18, 19, - 19, 20, 19, 10, 14, 16, 18, 18, - 18, 19, 20, 19, 19, 10, 14, 17, - 18, 18, 18, 10, 15, 17, 18, 19, - 19, 21, 19, 11, 15, 17, 18, 18, - 19, 19, 11, 15, 17, 18, 19, 19, - 11, 15, 17, 18, 11, 15, 18, 19, - 19, 11, 15, 18, 19, 19, 11, 16, - 18, 19, 11, 15, 18, 19, 11, 16, - 18, 12, 16, 18, 19, 12, 16, 19, - 12, 16, 19, 19, 19, 12, 16, 19, - 12, 16, 19, 19, 12, 16, 18, 12, - 16, 19, 12, 17, 19, 12, 17, 19, - 12, 17, 19, 12, 17, 19, 13, 17, - 13, 17, 13, 17, 19, 19, 13, 17, - 13, 17, 19, 13, 17, 13, 18, 19, - 13, 17, 19, 13, 18, 13, 17, 13, - 18, 13, 18, 13, 18, 13, 18, 13, - 18, 13, 18, 14, 18, 19, 14, 18, - 14, 18, 14, 18, 14, 18, 14, 19, - 14, 19, 14, 18, 14, 18, 14, 18, - 14, 19, 14, 14, 18, 14, 14, 19, - 14, 18, 14, 19, 14, 19, 14, 15, - 19, 15, 15, 15, 15, 19, 15, 19, - 15, 15, 19, 15, 15, 19, 15, 19, - 15, 19, 15, 19, 15, 15, 15, 15, - 15, 15, 15, 15, 15, 15, 15, 16, - 15, 15, 15, 16, 16, 16, 15, 16, - 16, 16, 16, 16, 16, 16, 16, 16, - 16, 16, 16, 16, 16, 16, 16, 16, - 16, 16, 16, 17, 16, 16, 16, 17, - 17, 16, 17, 17, 16, 17, 17, 17, - 17, 17, 17, 17, 17, 17, 17, 17, - 17, 17, 17, 17, 17, 17, 17, 18, - 17, 17, 17, 17, 17, 17, 17, 17, - 18, 17, 17, 18, 17, 17, 17, 17, - 18, 18, 17, 17, 17, 17, 17, 17, - 17, 18, 17, 18, 18, 17, 17, 17, - 18, 18, 18, 17, 18, 17, 18, 18, - 18, 18, 18, 18, 18, 18, 18, 17, - 18, 18, 18, 18, 19, 18, 18, 18, - 18, 18, 18, 18, 18, 18, 18, 18, - 18, 18, 18, 18, 18, 18, 18, 19, - 18, 18, 19, 18, 18, 18, 19, 18, - 19, 18, 18, 19, 18, 18, 19, 19, - 19, 19, 19, 18, 19, 18, 19, 18, - 19, 19, 18, 18, 19, 19, 19, 19, - 19, 19, 19, 19, 19, 19, 18, 19, - 19, 19, 19, 19, 18, 19, 19, 19, - 19, 19, 19, 19, 19, 19, 19, 20, - 19, 19, 19, 19, 21, 19, 19, 20, - 19, 20, 19, 19, 19, 19, 19, 20, - 20, 20, 19, 19, 19, 20, 19, 19, - 19, 20, 20, 19, 20, 19, 19, 21, - 20, 20, 19, 19, 19, 19, 19, 19, - 20, 19, 20, 20, 20, 20, 20, 20, - 20, 19, 19, 21, 20, 20, 19, 19, -}; - -static const uint32_t coef3_huffcodes[1072] = { - 0x001b2, 0x00069, 0x00000, 0x00004, 0x00006, 0x0000e, 0x00014, 0x00019, - 0x00016, 0x0002b, 0x00030, 0x0003d, 0x0003c, 0x0005a, 0x0005f, 0x0006d, - 0x0007e, 0x0005f, 0x0007f, 0x000b6, 0x000bc, 0x000d8, 0x000f2, 0x000fe, - 0x000bc, 0x000fc, 0x00161, 0x0016e, 0x00174, 0x00176, 0x001a2, 0x001e3, - 0x001f3, 0x00174, 0x0017a, 0x001ea, 0x002a8, 0x002c4, 0x002e6, 0x00314, - 0x00346, 0x00367, 0x003e9, 0x002e5, 0x002ee, 0x003d6, 0x00555, 0x00554, - 0x00557, 0x005c3, 0x005d6, 0x006e0, 0x0062f, 0x006e2, 0x00799, 0x00789, - 0x007fa, 0x005ce, 0x007fe, 0x005ec, 0x007cc, 0x007af, 0x00aa7, 0x00b19, - 0x00b94, 0x00b85, 0x00b9f, 0x00c48, 0x00c45, 0x00dd8, 0x00c4c, 0x00c4b, - 0x00d99, 0x00d1f, 0x00dc2, 0x00f95, 0x00fa2, 0x00bb5, 0x00b9f, 0x00f5d, - 0x00bbf, 0x00f47, 0x0154a, 0x00fd5, 0x00f45, 0x00f7f, 0x0160d, 0x01889, - 0x01757, 0x01722, 0x018b3, 0x0172d, 0x01a39, 0x01a18, 0x01bb3, 0x01b30, - 0x01e63, 0x0173c, 0x01b35, 0x01723, 0x01e80, 0x01fee, 0x01761, 0x01ffc, - 0x01f7f, 0x02c7c, 0x01fa1, 0x0177b, 0x01755, 0x0175a, 0x01fa6, 0x02eab, - 0x0310a, 0x02c69, 0x03669, 0x03127, 0x03103, 0x02e43, 0x03662, 0x03165, - 0x03124, 0x0313b, 0x03111, 0x03668, 0x0343b, 0x03c52, 0x03efc, 0x02e6c, - 0x03fda, 0x03ef8, 0x02e7b, 0x03ee2, 0x03cc5, 0x03d72, 0x058c0, 0x03df8, - 0x02ea9, 0x03e7e, 0x0556d, 0x05c82, 0x03d71, 0x03e7b, 0x03c42, 0x058d7, - 0x03f4e, 0x06200, 0x03d70, 0x05cb2, 0x05c96, 0x05cb0, 0x03f45, 0x05cb1, - 0x02e6d, 0x03110, 0x02f68, 0x05c90, 0x07ca6, 0x07c88, 0x06204, 0x062c8, - 0x078a6, 0x07986, 0x079d5, 0x0b1ad, 0x07989, 0x0b079, 0x05cdd, 0x0aad4, - 0x05de8, 0x07dcd, 0x07987, 0x05d67, 0x05d99, 0x0b91d, 0x07cf1, 0x05d9b, - 0x079d7, 0x0b07b, 0x05c85, 0x05d9a, 0x07dcc, 0x07ebf, 0x07dce, 0x07dfb, - 0x07ec0, 0x07d1a, 0x07a07, 0x05c84, 0x0c471, 0x07cf2, 0x0baef, 0x0b9d2, - 0x05deb, 0x07bd6, 0x0b845, 0x05d98, 0x0b91a, 0x0bae8, 0x0c4e0, 0x0dc31, - 0x0f93d, 0x0bbce, 0x0d1d2, 0x0f7a9, 0x0d9b9, 0x0bbcb, 0x0b900, 0x0aad7, - 0x0babd, 0x0c4e1, 0x0f46f, 0x0c588, 0x0c58b, 0x160e6, 0x0bbcf, 0x0bac3, - 0x0f945, 0x0f7a3, 0x0d1c1, 0x0fb8e, 0x0f7a4, 0x0fb8c, 0x0f40c, 0x0c473, - 0x0fd72, 0x0bbcd, 0x0fffa, 0x0f940, 0x0bbc9, 0x0f7a8, 0x1a1ed, 0x0bbc5, - 0x1f26f, 0x163fd, 0x160c7, 0x1a1f5, 0x0f947, 0x163fc, 0x154b3, 0x0fff6, - 0x163f6, 0x160e9, 0x1a1f0, 0x0bab9, 0x0baba, 0x17086, 0x0b903, 0x0fd75, - 0x0f308, 0x176f3, 0x163ff, 0x0fd7d, 0x1bb78, 0x163fb, 0x188db, 0x1a1f7, - 0x154b2, 0x172fd, 0x163f4, 0x1bb73, 0x172ff, 0x0babc, 0x0f97d, 0x1a1f3, - 0x1bb6d, 0x1ffd5, 0x1a1f4, 0x1f272, 0x17380, 0x17382, 0x1ffe7, 0x0bac8, - 0x0bbc4, 0x188d3, 0x160e0, 0x0fd7b, 0x1725f, 0x172f5, 0x1bb79, 0x1fad9, - 0x1f269, 0x188d0, 0x0bac4, 0x0bac5, 0x31185, 0x188d2, 0x188cc, 0x31187, - 0x3e7fe, 0x188d1, 0x1bb6c, 0x1f268, 0x1fad2, 0x1ffd9, 0x1a1ea, 0x1bb68, - 0x1facb, 0x3fdb2, 0x1e81a, 0x188ce, 0x172fb, 0x1a1ef, 0x1face, 0x1bb70, - 0x0bac1, 0x1bb6b, 0x172f8, 0x1bb66, 0x1ffdf, 0x1bb6a, 0x1ffd7, 0x1f266, - 0x176f8, 0x37653, 0x1fa7e, 0x31182, 0x1fac8, 0x2c7e3, 0x370ee, 0x176ec, - 0x176e9, 0x2e4bc, 0x160c5, 0x3765a, 0x3ce9c, 0x17373, 0x176e8, 0x188d4, - 0x176f1, 0x176ef, 0x37659, 0x1bb7c, 0x1ffde, 0x176f2, 0x3118b, 0x2c7d4, - 0x37651, 0x5ce9f, 0x37650, 0x31191, 0x3f4f6, 0x3f4f5, 0x7a06c, 0x1fac1, - 0x5c97b, 0x2c7e0, 0x79d3a, 0x3e7fd, 0x2c7df, 0x3f4f0, 0x7a06d, 0x376c1, - 0x79d3b, 0x00004, 0x00014, 0x00059, 0x000ab, 0x000b8, 0x00177, 0x001f5, - 0x001f2, 0x00315, 0x003fc, 0x005bd, 0x0062d, 0x006e8, 0x007dd, 0x00b04, - 0x007cd, 0x00b1e, 0x00d1e, 0x00f15, 0x00f3b, 0x00f41, 0x01548, 0x018b0, - 0x0173b, 0x01884, 0x01a1c, 0x01bb4, 0x01f25, 0x017b5, 0x0176d, 0x01ef8, - 0x02e73, 0x03107, 0x03125, 0x03105, 0x02e49, 0x03ce8, 0x03ef9, 0x03e5e, - 0x02e72, 0x03471, 0x03fd9, 0x0623f, 0x078a0, 0x06867, 0x05cb3, 0x06272, - 0x068ec, 0x06e9a, 0x079d4, 0x06e98, 0x0b1aa, 0x06e1a, 0x07985, 0x068ee, - 0x06e9b, 0x05c88, 0x0b1ac, 0x07dfa, 0x05d65, 0x07cf0, 0x07cbf, 0x0c475, - 0x160eb, 0x1bb7e, 0x0f7a6, 0x1fedd, 0x160e3, 0x0fffb, 0x0fb8d, 0x0fff9, - 0x0d1c0, 0x0c58c, 0x1a1e9, 0x0bab8, 0x0f5cf, 0x0fff5, 0x376c5, 0x1a1ec, - 0x160ed, 0x1fede, 0x1fac9, 0x1a1eb, 0x1f224, 0x176ee, 0x0fd79, 0x17080, - 0x17387, 0x1bb7a, 0x1ffe9, 0x176f7, 0x17385, 0x17781, 0x2c7d5, 0x17785, - 0x1ffe3, 0x163f5, 0x1fac2, 0x3e7f9, 0x3118d, 0x3fdb1, 0x1ffe2, 0x1f226, - 0x3118a, 0x2c7d9, 0x31190, 0x3118c, 0x3f4f3, 0x1bb7f, 0x1bb72, 0x31184, - 0xb92f4, 0x3e7fb, 0x6e1d9, 0x1faca, 0x62300, 0x3fdb8, 0x3d037, 0x3e7fc, - 0x62301, 0x3f4f2, 0x1f26a, 0x0000e, 0x00063, 0x000f8, 0x001ee, 0x00377, - 0x003f7, 0x006e3, 0x005cc, 0x00b05, 0x00dd2, 0x00fd4, 0x0172e, 0x0172a, - 0x01e23, 0x01f2d, 0x01763, 0x01769, 0x0176c, 0x02e75, 0x03104, 0x02ec1, - 0x03e58, 0x0583f, 0x03f62, 0x03f44, 0x058c5, 0x0623c, 0x05cf4, 0x07bd7, - 0x05d9d, 0x0aad2, 0x05d66, 0x0b1a9, 0x0b078, 0x07cfe, 0x0b918, 0x0c46f, - 0x0b919, 0x0b847, 0x06e1b, 0x0b84b, 0x0aad8, 0x0fd74, 0x172f4, 0x17081, - 0x0f97c, 0x1f273, 0x0f7a0, 0x0fd7c, 0x172f7, 0x0fd7a, 0x1bb77, 0x172fe, - 0x1f270, 0x0fd73, 0x1bb7b, 0x1a1bc, 0x1bb7d, 0x0bbc3, 0x172f6, 0x0baeb, - 0x0fb8f, 0x3f4f4, 0x3fdb4, 0x376c8, 0x3e7fa, 0x1ffd0, 0x62303, 0xb92f5, - 0x1f261, 0x31189, 0x3fdb5, 0x2c7db, 0x376c9, 0x1fad6, 0x1fad1, 0x00015, - 0x000f0, 0x002e0, 0x0058e, 0x005d7, 0x00c4d, 0x00fa1, 0x00bdb, 0x01756, - 0x01f70, 0x02c19, 0x0313c, 0x0370f, 0x03cc0, 0x02ea8, 0x058c6, 0x058c7, - 0x02eb7, 0x058d0, 0x07d18, 0x0aa58, 0x0b848, 0x05d9e, 0x05d6c, 0x0b84c, - 0x0c589, 0x0b901, 0x163f8, 0x0bac9, 0x0b9c5, 0x0f93c, 0x188d8, 0x0bbc7, - 0x160ec, 0x0fd6f, 0x188d9, 0x160ea, 0x0f7a7, 0x0f944, 0x0baab, 0x0dc3a, - 0x188cf, 0x176fb, 0x2c7d8, 0x2c7d7, 0x1bb75, 0x5ce9e, 0x62302, 0x370ed, - 0x176f4, 0x1ffd1, 0x370ef, 0x3f4f8, 0x376c7, 0x1ffe1, 0x376c6, 0x176ff, - 0x6e1d8, 0x176f6, 0x17087, 0x0f5cd, 0x00035, 0x001a0, 0x0058b, 0x00aac, - 0x00b9a, 0x0175f, 0x01e22, 0x01e8c, 0x01fb2, 0x0310b, 0x058d1, 0x0552e, - 0x05c27, 0x0686e, 0x07ca7, 0x0c474, 0x0dc33, 0x07bf2, 0x05de9, 0x07a35, - 0x0baaa, 0x0b9eb, 0x0fb95, 0x0b9b8, 0x17381, 0x1f262, 0x188cd, 0x17088, - 0x172fa, 0x0f7a2, 0x1fad3, 0x0bac0, 0x3765c, 0x1fedf, 0x1f225, 0x1fad4, - 0x2c7da, 0x5ce9d, 0x3e7f8, 0x1e203, 0x188d7, 0x00054, 0x002c0, 0x007a1, - 0x00f78, 0x01b36, 0x01fa3, 0x0313a, 0x03436, 0x0343a, 0x07d1d, 0x07bd8, - 0x05cdf, 0x0b846, 0x0b189, 0x0d9b8, 0x0fff8, 0x0d9be, 0x0c58a, 0x05dea, - 0x0d1d3, 0x160e4, 0x1f26b, 0x188da, 0x1e202, 0x2c7d2, 0x163fe, 0x31193, - 0x17782, 0x376c2, 0x2c7d1, 0x3fdb0, 0x3765d, 0x2c7d0, 0x1fad0, 0x1e201, - 0x188dd, 0x2c7e2, 0x37657, 0x37655, 0x376c4, 0x376c0, 0x176ea, 0x0006f, - 0x003cf, 0x00dd5, 0x01f23, 0x02c61, 0x02ed0, 0x05d54, 0x0552d, 0x07883, - 0x0b1a8, 0x0b91c, 0x0babf, 0x0b902, 0x0f7aa, 0x0f7a5, 0x1a1e8, 0x1ffd6, - 0x0babe, 0x1a1bf, 0x163f3, 0x1ffd8, 0x1fad7, 0x1f275, 0x1ffdc, 0x0007d, - 0x005bc, 0x01549, 0x02a99, 0x03def, 0x06273, 0x079d6, 0x07d1b, 0x0aad3, - 0x0d0fc, 0x2c7dd, 0x188d6, 0x0bac2, 0x2c7e1, 0x1bb76, 0x1a1bd, 0x31186, - 0x0fd78, 0x1a1be, 0x31183, 0x3fdb6, 0x3f4f1, 0x37652, 0x1fad5, 0x3f4f9, - 0x3e7ff, 0x5ce9c, 0x3765b, 0x31188, 0x17372, 0x000bd, 0x0078b, 0x01f21, - 0x03c43, 0x03ded, 0x0aad6, 0x07ec1, 0x0f942, 0x05c86, 0x17089, 0x0babb, - 0x1ffe8, 0x2c7de, 0x1f26e, 0x1fac4, 0x3f4f7, 0x37656, 0x1fa7d, 0x376c3, - 0x3fdb3, 0x3118f, 0x1fac6, 0x000f8, 0x007ed, 0x01efd, 0x03e7a, 0x05c91, - 0x0aad9, 0x0baec, 0x0dc32, 0x0f46e, 0x1e200, 0x176fa, 0x3765e, 0x3fdb7, - 0x2c7d6, 0x3fdb9, 0x37654, 0x37658, 0x3118e, 0x1ffdb, 0x000f6, 0x00c43, - 0x03106, 0x068ef, 0x0b84d, 0x0b188, 0x0bbcc, 0x1f264, 0x1bb69, 0x17386, - 0x1fac0, 0x00171, 0x00f39, 0x03e41, 0x068ed, 0x0d9bc, 0x0f7a1, 0x1bb67, - 0x1ffdd, 0x176f9, 0x001b9, 0x00f7d, 0x03f63, 0x0d0fd, 0x0b9ea, 0x188dc, - 0x1fac3, 0x1a1f2, 0x31192, 0x1ffe4, 0x001f6, 0x01754, 0x06865, 0x0f309, - 0x160e5, 0x176f5, 0x3765f, 0x1facc, 0x001e9, 0x01a1a, 0x06201, 0x0f105, - 0x176f0, 0x002df, 0x01756, 0x05d6d, 0x163fa, 0x176ed, 0x00342, 0x02e40, - 0x0d0ff, 0x17082, 0x003cd, 0x02a98, 0x0fffc, 0x2c7dc, 0x1fa7f, 0x003fe, - 0x03764, 0x0fffd, 0x176fc, 0x1fac5, 0x002f7, 0x02ed1, 0x0fb97, 0x0058a, - 0x02edc, 0x0bbc8, 0x005d4, 0x0623d, 0x160e8, 0x0062e, 0x05830, 0x163f9, - 0x006eb, 0x06205, 0x1f274, 0x007de, 0x062c9, 0x1f265, 0x005c9, 0x05cde, - 0x1ffd3, 0x005d4, 0x07988, 0x007ce, 0x0b849, 0x00b1b, 0x05c89, 0x1fac7, - 0x00b93, 0x05c83, 0x00b9e, 0x0f14f, 0x00c4a, 0x0b9c7, 0x00dd4, 0x0c470, - 0x1f271, 0x00f38, 0x0fb96, 0x176eb, 0x00fa0, 0x163f7, 0x00bb2, 0x0b91b, - 0x00bbe, 0x0f102, 0x00f44, 0x0f946, 0x1facd, 0x00f79, 0x0d9bd, 0x0154d, - 0x0bbc6, 0x00fd2, 0x160e7, 0x0172b, 0x188cb, 0x0175e, 0x0fd76, 0x0175c, - 0x1bb71, 0x0189f, 0x1a1ee, 0x01f24, 0x1a1f6, 0x01ba7, 0x0bbca, 0x01f7d, - 0x0ffff, 0x01f2e, 0x1bb65, 0x01bb5, 0x172f9, 0x01fef, 0x1f26c, 0x01f3e, - 0x0fd77, 0x01762, 0x1bb6e, 0x01ef9, 0x172fc, 0x01fa0, 0x02ab7, 0x02e4a, - 0x1f267, 0x01fb3, 0x1ffda, 0x02e42, 0x03101, 0x17780, 0x0313d, 0x03475, - 0x17784, 0x03126, 0x1facf, 0x03c51, 0x17783, 0x03e40, 0x1ffe5, 0x03663, - 0x1ffe0, 0x03e8f, 0x1f26d, 0x0343c, 0x03cc1, 0x176fd, 0x03e45, 0x02ec0, - 0x03f61, 0x03dee, 0x03fd8, 0x0583e, 0x02e45, 0x03e59, 0x03d02, 0x05ce8, - 0x05568, 0x176fe, 0x02f69, 0x1fad8, 0x058c1, 0x05c83, 0x1ffe6, 0x06271, - 0x06e1c, 0x062c7, 0x068e1, 0x0552f, 0x06864, 0x06866, 0x06e99, 0x05cbc, - 0x07ca5, 0x078a1, 0x05c82, 0x07dcf, 0x0623b, 0x0623e, 0x068e8, 0x07a36, - 0x05d9c, 0x0b077, 0x07cf3, 0x07a34, 0x07ca4, 0x07d19, 0x079d2, 0x07d1c, - 0x07bd9, 0x0b84a, 0x0fb94, 0x0aad5, 0x0dc30, 0x07bf3, 0x0baee, 0x0b07a, - 0x0c472, 0x0b91e, 0x0d9ba, 0x05d9f, 0x0d0fe, 0x0b9c6, 0x05c87, 0x0f14e, - 0x0baed, 0x0b92e, 0x0f103, 0x0b9c4, 0x0fb91, 0x0d9bb, 0x0b1ab, 0x0c58d, - 0x0fffe, 0x0f93b, 0x0f941, 0x0baea, 0x0b91f, 0x0f5cc, 0x0d9bf, 0x0f943, - 0x0f104, 0x1f260, 0x0fb92, 0x0f93f, 0x0f3a6, 0x0bac7, 0x0f7ab, 0x0bac6, - 0x17383, 0x0fd6d, 0x0bae9, 0x0fd6e, 0x1e74f, 0x188ca, 0x1f227, 0x0fb93, - 0x0fb90, 0x0fff7, 0x17085, 0x17083, 0x160e1, 0x17084, 0x0f93e, 0x160e2, - 0x160c6, 0x1a1f1, 0x1bb6f, 0x17384, 0x0fd70, 0x1f263, 0x188d5, 0x173a6, - 0x0f5ce, 0x163f2, 0x0fd71, 0x1ffd2, 0x160c4, 0x1ffd4, 0x2c7d3, 0x1bb74, -}; - -static const uint8_t coef3_huffbits[1072] = { - 9, 7, 2, 3, 4, 4, 5, 5, - 6, 6, 6, 6, 7, 7, 7, 7, - 7, 8, 8, 8, 8, 8, 8, 8, - 9, 9, 9, 9, 9, 9, 9, 9, - 9, 10, 10, 10, 10, 10, 10, 10, - 10, 10, 10, 11, 11, 11, 11, 11, - 11, 11, 11, 11, 11, 11, 11, 11, - 11, 12, 11, 12, 12, 12, 12, 12, - 12, 12, 12, 12, 12, 12, 12, 12, - 12, 12, 12, 12, 12, 13, 13, 13, - 13, 13, 13, 13, 13, 13, 13, 13, - 13, 13, 13, 13, 13, 13, 13, 13, - 13, 14, 13, 14, 14, 13, 14, 13, - 13, 14, 14, 14, 14, 14, 14, 14, - 14, 14, 14, 14, 14, 14, 14, 14, - 14, 14, 14, 14, 14, 14, 14, 15, - 14, 14, 15, 14, 14, 15, 15, 15, - 15, 15, 15, 15, 15, 15, 14, 15, - 15, 15, 15, 15, 15, 15, 15, 15, - 15, 14, 15, 15, 15, 15, 15, 15, - 15, 15, 15, 16, 15, 16, 16, 16, - 16, 15, 15, 16, 16, 16, 16, 16, - 15, 16, 16, 16, 15, 16, 15, 15, - 16, 15, 16, 16, 16, 16, 16, 16, - 16, 16, 16, 16, 16, 16, 16, 16, - 16, 17, 16, 17, 16, 17, 17, 16, - 17, 16, 17, 16, 16, 17, 17, 17, - 16, 17, 16, 16, 17, 16, 17, 16, - 17, 17, 16, 16, 17, 17, 17, 17, - 17, 17, 17, 17, 16, 17, 17, 16, - 17, 17, 17, 17, 17, 17, 17, 17, - 16, 18, 17, 17, 17, 17, 17, 17, - 17, 17, 17, 17, 17, 17, 16, 17, - 17, 17, 17, 17, 17, 17, 17, 17, - 17, 17, 17, 17, 17, 17, 17, 18, - 17, 17, 17, 17, 18, 17, 17, 18, - 19, 17, 17, 17, 18, 17, 17, 17, - 18, 18, 18, 17, 17, 17, 18, 17, - 17, 17, 17, 17, 17, 17, 17, 17, - 18, 18, 18, 18, 18, 18, 18, 18, - 18, 18, 17, 18, 18, 18, 18, 17, - 18, 18, 18, 17, 17, 18, 18, 18, - 18, 19, 18, 18, 19, 19, 20, 18, - 19, 18, 19, 19, 18, 19, 20, 18, - 19, 4, 6, 7, 8, 9, 9, 9, - 10, 10, 10, 11, 11, 11, 11, 12, - 12, 12, 12, 12, 12, 13, 13, 13, - 13, 13, 13, 13, 13, 14, 14, 14, - 14, 14, 14, 14, 14, 14, 14, 14, - 14, 14, 14, 15, 15, 15, 15, 15, - 15, 15, 15, 15, 16, 15, 15, 15, - 15, 16, 16, 15, 16, 16, 15, 16, - 17, 17, 17, 17, 17, 16, 16, 16, - 16, 16, 17, 17, 17, 16, 18, 17, - 17, 17, 18, 17, 17, 18, 17, 17, - 17, 17, 17, 18, 17, 18, 18, 18, - 17, 17, 18, 19, 18, 18, 17, 17, - 18, 18, 18, 18, 19, 17, 17, 18, - 20, 19, 19, 18, 19, 18, 19, 19, - 19, 19, 17, 5, 7, 9, 10, 10, - 11, 11, 12, 12, 12, 13, 13, 13, - 13, 13, 14, 14, 14, 14, 14, 15, - 14, 15, 15, 15, 15, 15, 16, 16, - 16, 16, 16, 16, 16, 16, 16, 16, - 16, 16, 15, 16, 16, 17, 17, 17, - 16, 17, 17, 17, 17, 17, 17, 17, - 17, 17, 17, 17, 17, 17, 17, 16, - 16, 19, 18, 18, 19, 17, 19, 20, - 17, 18, 18, 18, 18, 18, 18, 6, - 8, 10, 11, 12, 12, 12, 13, 13, - 13, 14, 14, 14, 14, 15, 15, 15, - 15, 15, 15, 16, 16, 16, 16, 16, - 16, 17, 17, 17, 16, 16, 17, 17, - 17, 17, 17, 17, 17, 16, 16, 16, - 17, 18, 18, 18, 17, 19, 19, 18, - 18, 17, 18, 19, 18, 17, 18, 18, - 19, 18, 17, 17, 6, 9, 11, 12, - 13, 13, 13, 14, 14, 14, 15, 15, - 15, 15, 15, 16, 16, 16, 16, 16, - 16, 17, 16, 17, 17, 17, 17, 17, - 17, 17, 18, 17, 18, 17, 17, 18, - 18, 19, 19, 17, 17, 7, 10, 12, - 13, 13, 14, 14, 14, 14, 15, 16, - 16, 16, 16, 16, 16, 16, 16, 16, - 16, 17, 17, 17, 17, 18, 17, 18, - 18, 18, 18, 18, 18, 18, 18, 17, - 17, 18, 18, 18, 18, 18, 18, 7, - 10, 12, 13, 14, 15, 15, 15, 15, - 16, 16, 17, 17, 17, 17, 17, 17, - 17, 17, 17, 17, 18, 17, 17, 8, - 11, 13, 14, 15, 15, 15, 15, 16, - 16, 18, 17, 17, 18, 17, 17, 18, - 17, 17, 18, 18, 19, 18, 18, 19, - 19, 19, 18, 18, 18, 8, 11, 13, - 14, 15, 16, 16, 16, 16, 17, 17, - 17, 18, 17, 18, 19, 18, 18, 18, - 18, 18, 18, 8, 12, 14, 15, 15, - 16, 16, 16, 17, 17, 18, 18, 18, - 18, 18, 18, 18, 18, 17, 9, 12, - 14, 15, 16, 16, 17, 17, 17, 17, - 18, 9, 12, 14, 15, 16, 17, 17, - 17, 18, 9, 13, 15, 16, 17, 17, - 18, 17, 18, 17, 9, 13, 15, 16, - 17, 18, 18, 18, 10, 13, 15, 16, - 18, 10, 14, 16, 17, 18, 10, 14, - 16, 17, 10, 14, 16, 18, 18, 10, - 14, 16, 18, 18, 11, 15, 16, 11, - 15, 17, 11, 15, 17, 11, 15, 17, - 11, 15, 17, 11, 15, 17, 12, 16, - 17, 12, 15, 12, 16, 12, 16, 18, - 12, 16, 12, 16, 12, 16, 12, 16, - 17, 12, 16, 18, 12, 17, 13, 16, - 13, 16, 13, 16, 18, 13, 16, 13, - 17, 13, 17, 13, 17, 13, 17, 13, - 17, 13, 17, 13, 17, 13, 17, 13, - 16, 13, 17, 13, 17, 13, 17, 14, - 17, 14, 17, 14, 17, 14, 14, 14, - 17, 14, 17, 14, 14, 18, 14, 14, - 18, 14, 18, 14, 18, 14, 17, 14, - 17, 14, 17, 14, 14, 18, 14, 15, - 15, 15, 14, 15, 15, 14, 15, 15, - 15, 18, 15, 18, 15, 15, 17, 15, - 15, 15, 15, 15, 15, 15, 15, 15, - 15, 15, 16, 15, 15, 15, 15, 16, - 16, 16, 16, 16, 15, 15, 15, 15, - 16, 16, 16, 16, 16, 16, 16, 16, - 16, 16, 16, 16, 16, 16, 16, 16, - 16, 16, 16, 16, 16, 16, 16, 16, - 16, 16, 16, 16, 16, 17, 16, 16, - 16, 17, 16, 16, 16, 17, 17, 17, - 17, 17, 16, 17, 17, 17, 17, 16, - 16, 16, 17, 17, 17, 17, 16, 17, - 17, 17, 17, 17, 17, 17, 17, 17, - 17, 17, 17, 17, 17, 17, 18, 17, -}; - -static const uint32_t coef4_huffcodes[476] = { - 0x00f01, 0x0001e, 0x00000, 0x00004, 0x00006, 0x0000d, 0x0000a, 0x00017, - 0x0001d, 0x00017, 0x0002c, 0x00031, 0x00039, 0x0003e, 0x00039, 0x0005a, - 0x00066, 0x00070, 0x0007b, 0x00070, 0x00077, 0x000af, 0x000c9, 0x000f2, - 0x000f4, 0x000b2, 0x000e3, 0x0015b, 0x0015d, 0x00181, 0x0019d, 0x001e3, - 0x001c5, 0x002b5, 0x002db, 0x00338, 0x003c3, 0x003cc, 0x003f0, 0x002cd, - 0x003fa, 0x003a1, 0x005b4, 0x00657, 0x007ab, 0x0074d, 0x0074c, 0x00ac1, - 0x00ac5, 0x0076b, 0x00ca8, 0x00f04, 0x00f00, 0x00fe3, 0x00f3c, 0x00f10, - 0x00f39, 0x00fe6, 0x00e26, 0x00e90, 0x016c5, 0x01827, 0x01954, 0x015c5, - 0x01958, 0x01f8a, 0x01c4a, 0x02b0f, 0x02b41, 0x02b0e, 0x033c6, 0x03050, - 0x01c4f, 0x02d88, 0x0305c, 0x03c18, 0x02b4f, 0x02cc2, 0x03a47, 0x05680, - 0x0569d, 0x06442, 0x06443, 0x06446, 0x0656e, 0x06444, 0x07120, 0x0748a, - 0x0c1ba, 0x07e22, 0x07aa6, 0x07f25, 0x07aa7, 0x07e20, 0x0c11b, 0x0c118, - 0x07aa5, 0x0ad0a, 0x0f389, 0x19ebb, 0x0caad, 0x0fe42, 0x0fe40, 0x16c34, - 0x2b4e5, 0x33d65, 0x16c30, 0x1e7ae, 0x1e25c, 0x18370, 0x1e703, 0x19eba, - 0x16c37, 0x0e234, 0x16c6e, 0x00004, 0x0002a, 0x00061, 0x00075, 0x000cb, - 0x000ff, 0x00190, 0x001eb, 0x001d1, 0x002b9, 0x00307, 0x00339, 0x0033f, - 0x003fb, 0x003b4, 0x0060c, 0x00679, 0x00645, 0x0067d, 0x0078a, 0x007e3, - 0x00749, 0x00ac4, 0x00ad2, 0x00ae3, 0x00c10, 0x00c16, 0x00ad1, 0x00cf4, - 0x00fe2, 0x01586, 0x00e9d, 0x019f1, 0x01664, 0x01e26, 0x01d38, 0x02b4d, - 0x033c5, 0x01fc2, 0x01fc3, 0x01d28, 0x03c1d, 0x0598e, 0x0f094, 0x07aa4, - 0x0ad38, 0x0ac0c, 0x0c11a, 0x079ea, 0x0c881, 0x0fe44, 0x0b635, 0x0ac0d, - 0x0b61e, 0x05987, 0x07121, 0x0f382, 0x0f387, 0x0e237, 0x0fe47, 0x0f383, - 0x0f091, 0x0f385, 0x0e233, 0x182ee, 0x19eb8, 0x1663e, 0x0f093, 0x00014, - 0x00058, 0x00159, 0x00167, 0x00300, 0x003d4, 0x005b5, 0x0079d, 0x0076a, - 0x00b67, 0x00b60, 0x00f05, 0x00cf0, 0x00f17, 0x00e95, 0x01822, 0x01913, - 0x016c2, 0x0182f, 0x01959, 0x01fcb, 0x01e27, 0x01c40, 0x033c7, 0x01e7b, - 0x01c49, 0x02d89, 0x01e23, 0x01660, 0x03f12, 0x02cc6, 0x033e1, 0x05b34, - 0x0609a, 0x06569, 0x07488, 0x07e21, 0x0cf5f, 0x0712c, 0x0389d, 0x067cf, - 0x07f28, 0x1663f, 0x33d67, 0x1663d, 0x1e25d, 0x3c1ab, 0x15c44, 0x16c36, - 0x0001f, 0x000ec, 0x00323, 0x005b2, 0x0079f, 0x00ac2, 0x00f16, 0x00e9e, - 0x01956, 0x01e0f, 0x019ea, 0x01666, 0x02b89, 0x02b02, 0x02d8c, 0x03c1b, - 0x03c19, 0x032b5, 0x03f9c, 0x02ccf, 0x03897, 0x05b35, 0x0ad02, 0x07f29, - 0x06441, 0x03884, 0x07888, 0x0784e, 0x06568, 0x0c1bb, 0x05986, 0x067cc, - 0x0fe49, 0x0fe48, 0x0c1bc, 0x0fe41, 0x18371, 0x1663c, 0x0e231, 0x0711e, - 0x0ad09, 0x0f092, 0x0002d, 0x001db, 0x00781, 0x00c1a, 0x00f55, 0x01580, - 0x01ea8, 0x02d9b, 0x032af, 0x03f16, 0x03c1c, 0x07834, 0x03c45, 0x0389c, - 0x067ce, 0x06445, 0x0c1b9, 0x07889, 0x07f3a, 0x0784f, 0x07f2b, 0x0ad0b, - 0x0f090, 0x0c11d, 0x0e94e, 0x0711f, 0x0e9f1, 0x0f38e, 0x079e9, 0x0ad03, - 0x0f09b, 0x0caae, 0x0fe46, 0x2b4e6, 0x0e9f0, 0x19eb6, 0x67ac1, 0x67ac0, - 0x33d66, 0x0f388, 0x00071, 0x003a0, 0x00ca9, 0x01829, 0x01d39, 0x02b43, - 0x02cc4, 0x06554, 0x0f09a, 0x0b61f, 0x067cd, 0x0711c, 0x0b636, 0x07f2a, - 0x0b634, 0x0c11f, 0x0cf5e, 0x0b61d, 0x0f06b, 0x0caab, 0x0c1be, 0x0e94c, - 0x0f099, 0x182ed, 0x0e94f, 0x0c119, 0x0e232, 0x2b4e4, 0x0f38a, 0x19eb4, - 0x1e25f, 0x0e94d, 0x000b7, 0x00785, 0x016cc, 0x03051, 0x033c4, 0x0656f, - 0x03891, 0x0711d, 0x0caaf, 0x0f097, 0x07489, 0x0f098, 0x0c880, 0x0caaa, - 0x0f386, 0x19eb7, 0x16c6f, 0x0f384, 0x182e8, 0x182e9, 0x0e230, 0x1e700, - 0x33d62, 0x33d63, 0x33d64, 0x16c33, 0x0e216, 0x000fd, 0x00c15, 0x01665, - 0x03c4a, 0x07f3b, 0x07896, 0x0c11c, 0x0e215, 0x16c32, 0x0f38b, 0x0f38d, - 0x182ea, 0x1e701, 0x712df, 0x15c46, 0x00194, 0x00fe0, 0x03f13, 0x0748b, - 0x0f096, 0x0cf80, 0x1e25e, 0xe25bd, 0x33d61, 0x16c31, 0x001f9, 0x01912, - 0x05710, 0x0f3d0, 0x0c1bf, 0x00301, 0x01e24, 0x0ad08, 0x003cd, 0x01c41, - 0x0c1bd, 0x00563, 0x03a52, 0x0f3d1, 0x00570, 0x02cce, 0x0e217, 0x0067b, - 0x0655d, 0x0074b, 0x06447, 0x00c12, 0x074fb, 0x00f08, 0x0b61c, 0x00e22, - 0x0fe43, 0x016c7, 0x01836, 0x019f2, 0x01c43, 0x01d3f, 0x01fcf, 0x02b4c, - 0x0304c, 0x032b6, 0x03a46, 0x05607, 0x03f17, 0x02cc5, 0x0609b, 0x0655c, - 0x07e23, 0x067c1, 0x07f26, 0x07f27, 0x0f095, 0x0e9f3, 0x0cf81, 0x0c11e, - 0x0caac, 0x0f38f, 0x0e9f2, 0x074fa, 0x0e236, 0x0fe45, 0x1c428, 0x0e235, - 0x182ef, 0x19eb5, 0x0f3d6, 0x182ec, 0x16c35, 0x0f38c, 0x2b4e7, 0x15c47, - 0xe25bc, 0x1e702, 0x1c4b6, 0x0e25a, 0x3c1aa, 0x15c45, 0x1c429, 0x19eb9, - 0x1e7af, 0x182eb, 0x1e0d4, 0x3896e, -}; - -static const uint8_t coef4_huffbits[476] = { - 12, 6, 2, 3, 4, 4, 5, 5, - 5, 6, 6, 6, 6, 6, 7, 7, - 7, 7, 7, 8, 8, 8, 8, 8, - 8, 9, 9, 9, 9, 9, 9, 9, - 10, 10, 10, 10, 10, 10, 10, 11, - 10, 11, 11, 11, 11, 12, 12, 12, - 12, 12, 12, 12, 12, 12, 12, 12, - 12, 12, 13, 13, 13, 13, 13, 13, - 13, 13, 14, 14, 14, 14, 14, 14, - 14, 14, 14, 14, 14, 15, 15, 15, - 15, 15, 15, 15, 15, 15, 16, 16, - 16, 15, 15, 15, 15, 15, 16, 16, - 15, 16, 16, 17, 16, 16, 16, 17, - 18, 18, 17, 17, 17, 17, 17, 17, - 17, 17, 17, 4, 6, 7, 8, 8, - 8, 9, 9, 10, 10, 10, 10, 10, - 10, 11, 11, 11, 11, 11, 11, 11, - 12, 12, 12, 12, 12, 12, 12, 12, - 12, 13, 13, 13, 14, 13, 14, 14, - 14, 13, 13, 14, 14, 16, 16, 15, - 16, 16, 16, 15, 16, 16, 16, 16, - 16, 16, 16, 16, 16, 17, 16, 16, - 16, 16, 17, 17, 17, 18, 16, 5, - 8, 9, 10, 10, 10, 11, 11, 12, - 12, 12, 12, 12, 12, 13, 13, 13, - 13, 13, 13, 13, 13, 14, 14, 13, - 14, 14, 13, 14, 14, 15, 14, 15, - 15, 15, 16, 15, 16, 16, 15, 15, - 15, 18, 18, 18, 17, 18, 17, 17, - 6, 9, 10, 11, 11, 12, 12, 13, - 13, 13, 13, 14, 14, 14, 14, 14, - 14, 14, 14, 15, 15, 15, 16, 15, - 15, 15, 15, 15, 15, 16, 16, 15, - 16, 16, 16, 16, 17, 18, 17, 16, - 16, 16, 7, 10, 11, 12, 12, 13, - 13, 14, 14, 14, 14, 15, 14, 15, - 15, 15, 16, 15, 15, 15, 15, 16, - 16, 16, 17, 16, 17, 16, 15, 16, - 16, 16, 16, 18, 17, 17, 19, 19, - 18, 16, 7, 11, 12, 13, 14, 14, - 15, 15, 16, 16, 15, 16, 16, 15, - 16, 16, 16, 16, 16, 16, 16, 17, - 16, 17, 17, 16, 17, 18, 16, 17, - 17, 17, 8, 11, 13, 14, 14, 15, - 15, 16, 16, 16, 16, 16, 16, 16, - 16, 17, 17, 16, 17, 17, 17, 17, - 18, 18, 18, 17, 17, 8, 12, 14, - 14, 15, 15, 16, 17, 17, 16, 16, - 17, 17, 20, 17, 9, 12, 14, 16, - 16, 16, 17, 21, 18, 17, 9, 13, - 15, 16, 16, 10, 13, 16, 10, 14, - 16, 11, 15, 16, 11, 15, 17, 11, - 15, 12, 15, 12, 16, 12, 16, 13, - 16, 13, 13, 13, 14, 14, 13, 14, - 14, 14, 15, 15, 14, 15, 15, 15, - 15, 15, 15, 15, 16, 17, 16, 16, - 16, 16, 17, 16, 17, 16, 18, 17, - 17, 17, 16, 17, 17, 16, 18, 17, - 21, 17, 18, 17, 18, 17, 18, 17, - 17, 17, 17, 19, -}; - -static const uint32_t coef5_huffcodes[435] = { - 0x00347, 0x0000b, 0x00001, 0x00001, 0x0000c, 0x00004, 0x00010, 0x00015, - 0x0001f, 0x0000b, 0x00023, 0x00026, 0x00029, 0x00035, 0x00037, 0x00001, - 0x00015, 0x0001a, 0x0001d, 0x0001c, 0x0001e, 0x0004e, 0x00049, 0x00051, - 0x00078, 0x00004, 0x00000, 0x00008, 0x0000d, 0x0007b, 0x00005, 0x00032, - 0x00095, 0x00091, 0x00096, 0x000a1, 0x000d9, 0x00003, 0x00019, 0x00061, - 0x00066, 0x00060, 0x00017, 0x0000e, 0x00063, 0x001a0, 0x001b7, 0x001e6, - 0x001e7, 0x001b6, 0x00018, 0x001e8, 0x00038, 0x00031, 0x00005, 0x0003d, - 0x00027, 0x001ea, 0x0001a, 0x000c5, 0x000f9, 0x000ff, 0x000db, 0x00250, - 0x000fc, 0x0025c, 0x00008, 0x00075, 0x003d7, 0x003d3, 0x001b0, 0x0007c, - 0x003ca, 0x00036, 0x00189, 0x004a6, 0x004a2, 0x004fb, 0x000c0, 0x0007f, - 0x0009a, 0x00311, 0x0006e, 0x0009b, 0x0068c, 0x006c0, 0x00484, 0x00012, - 0x000c3, 0x0094f, 0x00979, 0x009f9, 0x00d09, 0x00da6, 0x00da8, 0x00901, - 0x000c1, 0x00373, 0x00d08, 0x009fa, 0x00d8b, 0x00d85, 0x00d86, 0x000df, - 0x006e2, 0x000ce, 0x00f24, 0x009fe, 0x001f7, 0x007c1, 0x000cf, 0x009fc, - 0x009ff, 0x00d89, 0x00da9, 0x009fd, 0x001f8, 0x01a36, 0x0128c, 0x0129d, - 0x01a37, 0x00196, 0x003ea, 0x00f8b, 0x00d93, 0x01e45, 0x01e58, 0x01e4b, - 0x01e59, 0x013f1, 0x00309, 0x00265, 0x00308, 0x0243a, 0x027e1, 0x00f89, - 0x00324, 0x03cbc, 0x03c86, 0x03695, 0x0243c, 0x0243b, 0x0243e, 0x01e4a, - 0x003a5, 0x03468, 0x03428, 0x03c84, 0x027e0, 0x025e2, 0x01880, 0x00197, - 0x00325, 0x03cb7, 0x0791e, 0x007ec, 0x06c75, 0x004c8, 0x04bc7, 0x004c6, - 0x00983, 0x0481e, 0x01b53, 0x0251b, 0x01b58, 0x00984, 0x04fa8, 0x03cbb, - 0x00f8a, 0x00322, 0x0346a, 0x0243d, 0x00326, 0x03469, 0x0481f, 0x0481d, - 0x00746, 0x09032, 0x01b50, 0x01d13, 0x0d8e4, 0x0481b, 0x06c74, 0x0796b, - 0x07969, 0x00985, 0x0d8e3, 0x00986, 0x00fa2, 0x01301, 0x06c7c, 0x00987, - 0x03cb8, 0x0f4af, 0x00e88, 0x1b1c0, 0x00fce, 0x033eb, 0x03f6a, 0x03f69, - 0x00fcf, 0x0791f, 0x004c9, 0x04871, 0x00fcd, 0x00982, 0x00fcc, 0x00fa3, - 0x01d12, 0x0796c, 0x01b47, 0x00321, 0x0796a, 0x0d8e2, 0x04872, 0x04873, - 0x0000e, 0x00014, 0x0000a, 0x000a0, 0x00012, 0x0007d, 0x001a2, 0x0003b, - 0x0025f, 0x000dd, 0x0027c, 0x00343, 0x00368, 0x0036b, 0x0003e, 0x001fa, - 0x00485, 0x001b3, 0x0007f, 0x001b1, 0x0019e, 0x004ba, 0x007ad, 0x00339, - 0x00066, 0x007a4, 0x00793, 0x006c6, 0x0007e, 0x000f1, 0x00372, 0x009fb, - 0x00d83, 0x00d8a, 0x00947, 0x009f4, 0x001d0, 0x01b09, 0x01b4b, 0x007ec, - 0x003e1, 0x000ca, 0x003ec, 0x02539, 0x04fa9, 0x01b57, 0x03429, 0x03d2a, - 0x00d97, 0x003a7, 0x00dc0, 0x00d96, 0x00dc1, 0x007eb, 0x03cba, 0x00c43, - 0x00c41, 0x01b52, 0x007ef, 0x00323, 0x03cb9, 0x03c83, 0x007d0, 0x007ed, - 0x06c7f, 0x09033, 0x03f6c, 0x36383, 0x1e95d, 0x06c78, 0x00747, 0x01b51, - 0x00022, 0x00016, 0x00039, 0x00252, 0x00079, 0x00486, 0x00338, 0x00369, - 0x00d88, 0x00026, 0x00d87, 0x00f4b, 0x00d82, 0x00027, 0x001e1, 0x01a15, - 0x007c7, 0x012f0, 0x001e0, 0x006d0, 0x01a16, 0x01e44, 0x01e5f, 0x03690, - 0x00d90, 0x00c42, 0x00daf, 0x00d92, 0x00f80, 0x00cfb, 0x0342f, 0x0487f, - 0x01b46, 0x07968, 0x00d95, 0x00d91, 0x01b55, 0x03f68, 0x04bc6, 0x03cbd, - 0x00f81, 0x00320, 0x00069, 0x000fe, 0x006d5, 0x0033f, 0x000de, 0x007c6, - 0x01e40, 0x00d94, 0x00f88, 0x03c8e, 0x03694, 0x00dae, 0x00dad, 0x00267, - 0x003a6, 0x00327, 0x0487e, 0x007ee, 0x00749, 0x004c7, 0x03692, 0x01b56, - 0x00fd1, 0x07a56, 0x06c77, 0x09031, 0x00748, 0x06c7a, 0x0796d, 0x033ea, - 0x06c76, 0x00fd0, 0x36382, 0x1e417, 0x00745, 0x04faf, 0x0d8e1, 0x03f6b, - 0x1e95c, 0x04fad, 0x0009e, 0x004bd, 0x0067c, 0x01b08, 0x003eb, 0x01b45, - 0x03691, 0x0d8e5, 0x07904, 0x00981, 0x007ea, 0x019f4, 0x06c7d, 0x04fab, - 0x04fac, 0x06c7e, 0x01300, 0x06c7b, 0x0006f, 0x003f7, 0x03c85, 0x004c4, - 0x0001e, 0x006e1, 0x03693, 0x01b44, 0x00241, 0x01e46, 0x0019d, 0x00266, - 0x004bb, 0x02538, 0x007ac, 0x01b54, 0x00902, 0x04870, 0x00da7, 0x00900, - 0x00185, 0x06c79, 0x006e3, 0x003e9, 0x01e94, 0x003ed, 0x003f2, 0x0342e, - 0x0346b, 0x0251a, 0x004c5, 0x01881, 0x0481c, 0x01b59, 0x03c87, 0x04fae, - 0x007e9, 0x03f6d, 0x0f20a, 0x09030, 0x04faa, 0x0d8e6, 0x03f6f, 0x0481a, - 0x03f6e, 0x1e416, 0x0d8e7, -}; - -static const uint8_t coef5_huffbits[435] = { - 10, 4, 2, 4, 4, 5, 5, 5, - 5, 6, 6, 6, 6, 6, 6, 7, - 7, 7, 7, 7, 7, 7, 7, 7, - 7, 8, 8, 8, 8, 7, 8, 8, - 8, 8, 8, 8, 8, 9, 9, 9, - 9, 9, 9, 9, 9, 9, 9, 9, - 9, 9, 10, 9, 10, 10, 10, 10, - 10, 9, 10, 10, 10, 10, 10, 10, - 10, 10, 11, 11, 10, 10, 11, 11, - 10, 11, 11, 11, 11, 11, 12, 12, - 12, 12, 12, 12, 11, 11, 11, 12, - 12, 12, 12, 12, 12, 12, 12, 12, - 12, 12, 12, 12, 12, 12, 12, 13, - 13, 13, 12, 12, 13, 13, 13, 12, - 12, 12, 12, 12, 13, 13, 13, 13, - 13, 14, 14, 14, 14, 13, 13, 13, - 13, 13, 14, 14, 14, 14, 14, 14, - 15, 14, 14, 14, 14, 14, 14, 13, - 14, 14, 14, 14, 14, 14, 15, 14, - 15, 14, 15, 15, 15, 15, 15, 15, - 16, 15, 15, 14, 15, 16, 15, 14, - 14, 15, 14, 14, 15, 14, 15, 15, - 15, 16, 15, 17, 16, 15, 15, 15, - 15, 16, 16, 16, 16, 17, 15, 16, - 14, 16, 16, 17, 16, 16, 16, 16, - 16, 15, 15, 15, 16, 16, 16, 16, - 17, 15, 15, 15, 15, 16, 15, 15, - 4, 7, 8, 8, 9, 9, 9, 10, - 10, 10, 10, 10, 10, 10, 11, 11, - 11, 11, 11, 11, 11, 11, 11, 12, - 12, 11, 11, 11, 12, 12, 12, 12, - 12, 12, 12, 12, 13, 13, 13, 13, - 12, 13, 14, 14, 15, 15, 14, 14, - 14, 14, 14, 14, 14, 15, 14, 14, - 14, 15, 15, 15, 14, 14, 15, 15, - 15, 16, 16, 18, 17, 15, 15, 15, - 6, 9, 10, 10, 11, 11, 12, 12, - 12, 13, 12, 12, 12, 13, 13, 13, - 13, 13, 13, 13, 13, 13, 13, 14, - 14, 14, 14, 14, 14, 14, 14, 15, - 15, 15, 14, 14, 15, 16, 15, 14, - 14, 15, 7, 10, 11, 12, 13, 13, - 13, 14, 14, 14, 14, 14, 14, 14, - 14, 15, 15, 15, 15, 15, 14, 15, - 16, 15, 15, 16, 15, 15, 15, 16, - 15, 16, 18, 17, 15, 15, 16, 16, - 17, 15, 8, 11, 13, 13, 14, 15, - 14, 16, 15, 16, 15, 15, 15, 15, - 15, 15, 17, 15, 9, 12, 14, 15, - 10, 13, 14, 15, 10, 13, 11, 14, - 11, 14, 11, 15, 12, 15, 12, 12, - 13, 15, 13, 14, 13, 14, 14, 14, - 14, 14, 15, 15, 15, 15, 14, 15, - 15, 16, 16, 16, 15, 16, 16, 15, - 16, 17, 16, -}; - -static const uint16_t levels0[60] = { -317, 92, 62, 60, 19, 17, 10, 7, - 6, 5, 5, 3, 3, 3, 2, 2, - 2, 2, 2, 2, 2, 1, 2, 2, - 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, -}; - -static const uint16_t levels1[40] = { -311, 91, 61, 28, 10, 6, 5, 2, - 2, 2, 2, 2, 2, 2, 2, 1, - 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, -}; - -static const uint16_t levels2[340] = { -181,110, 78, 63, 61, 62, 60, 61, - 33, 41, 41, 19, 17, 19, 12, 11, - 9, 11, 10, 6, 8, 7, 6, 4, - 5, 5, 4, 4, 3, 4, 3, 5, - 3, 4, 3, 3, 3, 3, 3, 3, - 2, 2, 4, 2, 3, 2, 3, 3, - 2, 2, 2, 2, 2, 2, 2, 2, - 3, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 1, 2, 1, 2, 2, - 2, 2, 1, 2, 1, 1, 1, 2, - 2, 1, 2, 1, 2, 2, 2, 2, - 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, -}; - -static const uint16_t levels3[180] = { -351,122, 76, 61, 41, 42, 24, 30, - 22, 19, 11, 9, 10, 8, 5, 5, - 4, 5, 5, 3, 3, 3, 3, 3, - 3, 3, 2, 2, 3, 2, 2, 2, - 3, 3, 2, 2, 2, 3, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 1, 1, - 2, 2, 1, 2, 1, 2, 2, 2, - 2, 2, 2, 1, 2, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 2, - 2, 1, 2, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, -}; - -static const uint16_t levels4[70] = { -113, 68, 49, 42, 40, 32, 27, 15, - 10, 5, 3, 3, 3, 3, 2, 2, - 2, 2, 2, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, -}; - -static const uint16_t levels5[40] = { -214, 72, 42, 40, 18, 4, 4, 2, - 2, 2, 2, 2, 1, 1, 2, 1, - 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, -}; - -static const CoefVLCTable coef_vlcs[6] = { - { - sizeof(coef0_huffbits), coef0_huffcodes, coef0_huffbits, levels0, - }, - { - sizeof(coef1_huffbits), coef1_huffcodes, coef1_huffbits, levels1, - }, - { - sizeof(coef2_huffbits), coef2_huffcodes, coef2_huffbits, levels2, - }, - { - sizeof(coef3_huffbits), coef3_huffcodes, coef3_huffbits, levels3, - }, - { - sizeof(coef4_huffbits), coef4_huffcodes, coef4_huffbits, levels4, - }, - { - sizeof(coef5_huffbits), coef5_huffcodes, coef5_huffbits, levels5, - }, -}; - -/*table of the values of 10^(index*.05)*/ -const fixed64 pow_table[] = - { 0x199a, 0x1cb9, 0x203a, 0x2429, 0x2893, 0x2d86, 0x3314, 0x3950, 0x404e, - 0x4827, 0x50f4, 0x5ad5, 0x65ea, 0x725a, 0x804e, 0x8ff6, 0xa186, 0xb53c, - 0xcb59, 0xe429, 0x10000LL,0x11f3dLL,0x14249LL,0x1699cLL,0x195bcLL, - 0x1c73dLL,0x1fec9LL,0x23d1dLL,0x2830bLL,0x2d182LL, 0x3298bLL,0x38c53LL, - 0x3fb28LL,0x47783LL,0x5030aLL,0x59f98LL,0x64f40LL,0x71457LL,0x7f17bLL, - 0x8e99aLL,0xa0000LL,0xb385eLL,0xc96d9LL,0xe2019LL,0xfd954LL,0x11c865LL, - 0x13f3dfLL,0x166320LL,0x191e6eLL,0x1c2f10LL,0x1f9f6eLL,0x237b39LL, - 0x27cf8bLL,0x2cab1aLL,0x321e65LL,0x383bf0LL,0x3f1882LL,0x46cb6aLL, - 0x4f6eceLL,0x592006LL,0x640000LL,0x7033acLL,0x7de47eLL,0x8d40f6LL, - 0x9e7d44LL,0xb1d3f4LL,0xc786b7LL,0xdfdf43LL,0xfb304bLL,0x119d69aLL, - 0x13c3a4eLL,0x162d03aLL,0x18e1b70LL,0x1beaf00LL,0x1f52feeLL, - 0x2325760LL,0x276f514LL,0x2c3f220LL,0x31a5408LL,0x37b403cLL,0x3e80000LL, - 0x46204b8LL,0x4eaece8LL,0x58489a0LL,0x630e4a8LL,0x6f24788LL,0x7cb4328LL, - 0x8beb8a0LL,0x9cfe2f0LL,0xb026200LL,0xc5a4710LL,0xddc2240LL,0xf8d1260LL, - 0x1172d600LL,0x1393df60LL,0x15f769c0LL,0x18a592c0LL,0x1ba77540LL, - 0x1f074840LL,0x22d08280LL,0x27100000LL,0x2bd42f40LL,0x312d4100LL, - 0x372d6000LL,0x3de8ee80LL,0x4576cb80LL,0x4df09f80LL,0x57733600LL, - 0x621edd80LL,0x6e17d480LL,0x7b86c700LL,0x8a995700LL,0x9b82b800LL, - 0xae7c5c00LL,0xc3c6b900LL,0xdbaa2200LL,0xf677bc00LL,0x1148a9400LL, - 0x13648d200LL,0x15c251800LL,0x186a00000LL,0x1b649d800LL,0x1ebc48a00LL, - 0x227c5c000LL,0x26b195000LL,0x2b6a3f000LL,0x30b663c00LL,0x36a801c00LL, - 0x3d534a400LL,0x44cee4800LL,0x4d343c800LL,0x569fd6000LL,0x6131b2800LL, - 0x6d0db9800LL,0x7a5c33800LL,0x894a55000LL,0x9a0ad6000LL,0xacd69d000LL, - 0xc1ed84000LL,0xd9972f000LL,0xf42400000LL,0x111ee28000LL,0x1335ad6000LL, - 0x158db98000LL,0x182efd4000LL,0x1b22676000LL,0x1e71fe6000LL, - 0x2229014000LL,0x26540e8000LL,0x2b014f0000LL,0x3040a5c000LL, - 0x3623e60000LL,0x3cbf0fc000LL,0x4428940000LL,0x4c79a08000LL, - 0x55ce758000LL,0x6046c58000LL,0x6c06220000LL,0x7934728000LL, - 0x87fe7d0000LL,0x9896800000LL,0xab34d90000LL,0xc018c60000LL, - 0xd7893f0000LL,0xf1d5e40000LL,0x10f580a0000LL,0x13073f00000LL, - 0x1559a0c0000LL,0x17f48900000LL,0x1ae0d160000LL,0x1e286780000LL, - 0x21d66fc0000LL,0x25f769c0000LL,0x2a995c80000LL,0x2fcc0440000LL, - 0x35a10940000LL,0x3c2c3b80000LL,0x4383d500000LL,0x4bc0c780000LL, - 0x54ff0e80000LL,0x5f5e1000000LL,0x6b010780000LL,0x780f7c00000LL, - 0x86b5c800000LL,0x9725ae00000LL,0xa9970600000LL,0xbe487500000LL, - 0xd5804700000LL,0xef8d5a00000LL,0x10cc82e00000LL,0x12d940c00000LL, - 0x152605c00000LL,0x17baa2200000LL,0x1a9fd9c00000LL,0x1ddf82a00000LL, - 0x2184a5c00000LL,0x259ba5400000LL,0x2a3265400000LL,0x2f587cc00000LL, - 0x351f69000000LL,0x3b9aca000000LL,0x42e0a4800000LL,0x4b09ad800000LL, - 0x54319d000000LL,0x5e778d000000LL,0x69fe64000000LL,0x76ed49800000LL, - 0x85702c000000LL,0x95b858000000LL,0xa7fd1c000000LL,0xbc7c87000000LL, - 0xd37c3a000000LL,0xed4a55000000LL,0x10a3e82000000LL,0x12abb1a000000LL, - 0x14f2e7a000000LL,0x1781474000000LL,0x1a5f7f4000000LL,0x1d974de000000LL, - 0x2133a18000000LL - }; - -/* 10^(index/16). We'll need to accomidate negative indicies too. - The algorithm sort of implies that there should be 128 values starting at -60, - however this has not been confirmed. More values may be needed. -*/ -const fixed32 pow_10_to_yover16[] = -{ - /*60 negative indicies (-60 to -1)*/ - 0xc, 0xd, 0x10, 0x12, 0x15, 0x18, 0x1c, 0x20, 0x25, 0x2b, 0x31, 0x39, 0x42, - 0x4c, 0x57, 0x65, 0x75, 0x87, 0x9b, 0xb3, 0xcf, 0xef, 0x114, 0x13f, 0x171, - 0x1aa, 0x1eb, 0x238, 0x28f, 0x2f5, 0x36a, 0x3f1, 0x48d, 0x542, 0x612, 0x703, - 0x818, 0x959, 0xacc, 0xc77, 0xe65, 0x10a0, 0x1333, 0x162b, 0x199a, 0x1d90, - 0x2223, 0x276c, 0x2d86, 0x3492, 0x3cb5, 0x461b, 0x50f4, 0x5d7c, 0x6bf4, - 0x7caa, 0x8ff6, 0xa63e, 0xbff9, 0xddb0, - /*non-negative indicies (0-68)*/ - 0x10000, 0x127a0, 0x15562, 0x18a39, 0x1c73d, 0x20db4, 0x25f12, 0x2bd09, - 0x3298b, 0x3a6d9, 0x4378b, 0x4dea3, 0x59f98, 0x67e6b, 0x77fbb, 0x8a8de, - 0xa0000, 0xb8c3e, 0xd55d1, 0xf6636, 0x11c865, 0x148906, 0x17b6b7, 0x1b625b, - 0x1f9f6e, 0x248475, 0x2a2b6e, 0x30b25e, 0x383bf0, 0x40f02b, 0x4afd4b, - 0x5698b0, 0x640000, 0x737a6b, 0x855a26, 0x99fe1e, 0xb1d3f4, 0xcd5a3e, - 0xed232b, 0x111d78b, 0x13c3a4f, 0x16d2c94, 0x1a5b24e, 0x1e6f7b0, 0x2325761, - 0x28961b3, 0x2ede4eb, 0x361f6de, 0x3e80000, 0x482c830, 0x535857d, 0x603ed31, - 0x6f24787, 0x8058668, 0x9435fab, 0xab26b6d, 0xc5a4715, 0xe43bdc4, - 0x1078f70c, 0x1305acdd, 0x15f769cb, 0x195dd0fa, 0x1d4af12d, 0x21d3a4ab, - 0x27100000, 0x2d1bd1e1, 0x341736de, 0x3c2743e8, 0x4576cb4a -}; - -const fixed32 pow_a_table[] = -{ - 0x1004,0x1008,0x100c,0x1010,0x1014,0x1018,0x101c,0x1021,0x1025,0x1029,0x102d, - 0x1031,0x1036,0x103a,0x103e,0x1043,0x1047,0x104b,0x1050,0x1054,0x1059,0x105d, - 0x1062,0x1066,0x106b,0x106f,0x1074,0x1078,0x107d,0x1082,0x1086,0x108b,0x1090, - 0x1095,0x1099,0x109e,0x10a3,0x10a8,0x10ad,0x10b2,0x10b7,0x10bc,0x10c1,0x10c6, - 0x10cb,0x10d0,0x10d5,0x10da,0x10df,0x10e5,0x10ea,0x10ef,0x10f5,0x10fa,0x10ff, - 0x1105,0x110a,0x1110,0x1115,0x111b,0x1120,0x1126,0x112c,0x1131,0x1137,0x113d, - 0x1143,0x1149,0x114f,0x1155,0x115a,0x1161,0x1167,0x116d,0x1173,0x1179,0x117f, - 0x1186,0x118c,0x1192,0x1199,0x119f,0x11a6,0x11ac,0x11b3,0x11b9,0x11c0,0x11c7, - 0x11ce,0x11d4,0x11db,0x11e2,0x11e9,0x11f0,0x11f8,0x11ff,0x1206,0x120d,0x1215, - 0x121c,0x1223,0x122b,0x1233,0x123a,0x1242,0x124a,0x1251,0x1259,0x1261,0x1269, - 0x1271,0x127a,0x1282,0x128a,0x1293,0x129b,0x12a4,0x12ac,0x12b5,0x12be,0x12c7, - 0x12d0,0x12d9,0x12e2,0x12eb,0x12f4,0x12fe,0x1307 -}; - - -/* 32.32 unsigned fixed format */ -/* This is a table of exponent values for an IEEE SP float. Theres never anything less then about index 115 - * making the size of this table fairly ridiculous. - */ - - -const fixed64 lsp_pow_e_table[] = -{ - 0xb504f30000000000LL, 0x9837f00000000000LL, 0x8000000000000000LL, 0x6ba27e8000000000LL, 0x5a82798000000000LL, - 0x4c1bf80000000000LL, 0x4000000000000000LL, 0x35d13f4000000000LL, 0x2d413cc000000000LL, 0x260dfc0000000000LL, - 0x2000000000000000LL, 0x1ae89fa000000000LL, 0x16a09e6000000000LL, 0x1306fe0000000000LL, 0x1000000000000000LL, - 0xd744fd000000000LL, 0xb504f3000000000LL, 0x9837f0000000000LL, 0x800000000000000LL, 0x6ba27e800000000LL, - 0x5a8279800000000LL, 0x4c1bf8000000000LL, 0x400000000000000LL, 0x35d13f400000000LL, 0x2d413cc00000000LL, - 0x260dfc000000000LL, 0x200000000000000LL, 0x1ae89fa00000000LL, 0x16a09e600000000LL, 0x1306fe000000000LL, - 0x100000000000000LL, 0xd744fd00000000LL, 0xb504f300000000LL, 0x9837f000000000LL, 0x80000000000000LL, - 0x6ba27e80000000LL, 0x5a827980000000LL, 0x4c1bf800000000LL, 0x40000000000000LL, 0x35d13f40000000LL, - 0x2d413cc0000000LL, 0x260dfc00000000LL, 0x20000000000000LL, 0x1ae89fa0000000LL, 0x16a09e60000000LL, - 0x1306fe00000000LL, 0x10000000000000LL, 0xd744fd0000000LL, 0xb504f30000000LL, 0x9837f00000000LL, - 0x8000000000000LL, 0x6ba27e8000000LL, 0x5a82798000000LL, 0x4c1bf80000000LL, 0x4000000000000LL, - 0x35d13f4000000LL, 0x2d413cc000000LL, 0x260dfc0000000LL, 0x2000000000000LL, 0x1ae89fa000000LL, - 0x16a09e6000000LL, 0x1306fe0000000LL, 0x1000000000000LL, 0xd744fd000000LL, 0xb504f3000000LL, - 0x9837f0000000LL, 0x800000000000LL, 0x6ba27e800000LL, 0x5a8279800000LL, 0x4c1bf8000000LL, - 0x400000000000LL, 0x35d13f400000LL, 0x2d413cc00000LL, 0x260dfc000000LL, 0x200000000000LL, - 0x1ae89fa00000LL, 0x16a09e600000LL, 0x1306fe000000LL, 0x100000000000LL, 0xd744fd00000LL, - 0xb504f300000LL, 0x9837f000000LL, 0x80000000000LL, 0x6ba27e80000LL, 0x5a827980000LL, - 0x4c1bf800000LL, 0x40000000000LL, 0x35d13f40000LL, 0x2d413cc0000LL, 0x260dfc00000LL, - 0x20000000000LL, 0x1ae89fa0000LL, 0x16a09e60000LL, 0x1306fe00000LL, 0x10000000000LL, - 0xd744fd0000LL, 0xb504f30000LL, 0x9837f00000LL, 0x8000000000LL, 0x6ba27e8000LL, - 0x5a82798000LL, 0x4c1bf80000LL, 0x4000000000LL, 0x35d13f4000LL, 0x2d413cc000LL, - 0x260dfc0000LL, 0x2000000000LL, 0x1ae89fa000LL, 0x16a09e6000LL, 0x1306fe0000LL, - 0x1000000000LL, 0xd744fd000LL, 0xb504f3000LL, 0x9837f0000LL, 0x800000000LL, - 0x6ba27e800LL, 0x5a8279800LL, 0x4c1bf8000LL, 0x400000000LL, 0x35d13f400LL, - 0x2d413cc00LL, 0x260dfc000LL, 0x200000000LL, 0x1ae89fa00LL, 0x16a09e600LL, - 0x1306fe000LL, 0x100000000LL, 0xd744fd00LL, 0xb504f300LL, 0x9837f000LL, - 0x80000000LL, 0x6ba27e80LL, 0x5a827980LL, 0x4c1bf800LL, 0x40000000LL, - 0x35d13f40LL, 0x2d413cc0LL, 0x260dfc00LL, 0x20000000LL, 0x1ae89fa0LL, - 0x16a09e60LL, 0x1306fe00LL, 0x10000000LL, 0xd744fd0LL, 0xb504f30LL, - 0x9837f00LL, 0x8000000LL, 0x6ba27e8LL, 0x5a82798LL, 0x4c1bf80LL, - 0x4000000LL, 0x35d13f4LL, 0x2d413ccLL, 0x260dfc0LL, 0x2000000LL, - 0x1ae89faLL, 0x16a09e6LL, 0x1306fe0LL, 0x1000000LL, 0xd744fdLL, - 0xb504f3LL, 0x9837f0LL, 0x800000LL, 0x6ba27eLL, 0x5a8279LL, - 0x4c1bf8LL, 0x400000LL, 0x35d13fLL, 0x2d413cLL, 0x260dfcLL, - 0x200000LL, 0x1ae89fLL, 0x16a09eLL, 0x1306feLL, 0x100000LL, - 0xd744fLL, 0xb504fLL, 0x9837fLL, 0x80000LL, 0x6ba27LL, - 0x5a827LL, 0x4c1bfLL, 0x40000LL, 0x35d13LL, 0x2d413LL, - 0x260dfLL, 0x20000LL, 0x1ae89LL, 0x16a09LL, 0x1306fLL, - 0x10000LL, 0xd744LL, 0xb504LL, 0x9837LL, 0x8000LL, - 0x6ba2LL, 0x5a82LL, 0x4c1bLL, 0x4000LL, 0x35d1LL, - 0x2d41LL, 0x260dLL, 0x2000LL, 0x1ae8LL, 0x16a0LL, - 0x1306LL, 0x1000LL, 0xd74LL, 0xb50LL, 0x983LL, - 0x800LL, 0x6baLL, 0x5a8LL, 0x4c1LL, 0x400LL, - 0x35dLL, 0x2d4LL, 0x260LL, 0x200LL, 0x1aeLL, - 0x16aLL, 0x130LL, 0x100LL, 0xd7LL, 0xb5LL, - 0x98LL, 0x80LL, 0x6bLL, 0x5aLL, 0x4cLL, - 0x40LL, 0x35LL, 0x2dLL, 0x26LL, 0x20LL, - 0x1aLL, 0x16LL, 0x13LL, 0x10LL, 0xdLL, - 0xbLL, 0x9LL, 0x8LL, 0x6LL, 0x5LL, - 0x4LL, 0x4LL, 0x3LL, 0x2LL, 0x2LL, - 0x2LL, 0x1LL, 0x1LL, 0x1LL, 0x1LL, - 0x0LL -}; - -/* table of exp noise values multiplied by 16 in order to reduce rounding error */ -fixed32 noisetable_exp[] = -{ - 0x5, 0xfffffa2e, 0xc2c, 0xb47, 0xffffaebe, 0xfffffa63, 0xfffff7ff, 0x16bd, - 0xffffe704, 0xffffe34e, 0x71ee, 0x396e, 0xffff8bfd, 0x3b4, 0x562f, 0xffffc362, - 0x5327, 0xffffae19, 0x6cb4, 0x26b0, 0x87c4, 0x21dc, 0x8017, 0x1db0, - 0xffffe49e, 0xffffb162, 0xffffc808, 0xffffafea, 0xfffffe80, 0xfffffeb8, 0xffff8b6e, 0xffffc7a1, - 0x3f46, 0x5e8, 0x374f, 0xffff8fba, 0x87fd, 0x21e7, 0xffff9198, 0x78a0, - 0x7f7c, 0x864f, 0xffffca94, 0x42a7, 0xfffffcd6, 0xffffb916, 0x247a, 0x5679, - 0x8d9f, 0xffffb350, 0xffff9592, 0xffffcf73, 0x552d, 0xffffeb8c, 0x8622, 0xffff8091, - 0x238, 0x3ee8, 0x5c2f, 0x6e25, 0xffffe5cb, 0x86a1, 0xffffa8ca, 0xfe2, - 0x5dac, 0x2da2, 0x5ad1, 0xffffa94f, 0x729, 0xfffffdc0, 0xffff825c, 0x8bcd, - 0xffff7d05, 0xffff7d9e, 0xffffb5b6, 0x58a3, 0xffff8a3f, 0xffffd9c0, 0xffff8142, 0x596f, - 0x78aa, 0x2694, 0x78f5, 0xffff8a84, 0x43b3, 0x498a, 0xffffdfe5, 0xffffbba9, - 0xffff7228, 0xffff72c9, 0xfffff174, 0xffff9a76, 0x64d5, 0x221c, 0x88dd, 0xffffd319, - 0xfffffe14, 0xfffff99f, 0xffff8ba4, 0x6e34, 0x6cc, 0x3208, 0xfffffb14, 0x6670, - 0xffffd5ff, 0xffffa502, 0x641d, 0xffff75b6, 0xec2, 0xffffedf2, 0xffffb925, 0xffffe271, - 0xffffb727, 0xffff7450, 0xfffff421, 0x89e7, 0xfffff635, 0xffffa841, 0xffffda00, 0xffffc94e, - 0xef9, 0x28cc, 0xffffd477, 0xffff82b9, 0x2a7, 0xffff7540, 0x24c2, 0x4349, - 0xffffdf34, 0xdf7, 0x323d, 0xffffbce7, 0x29c5, 0x4700, 0x10b0, 0x1eb6, - 0x1172, 0x84be, 0xffffcee4, 0xffffe7bd, 0x1166, 0xffff7df0, 0xffffe115, 0x2383, - 0x23a0, 0x784a, 0x6f8e, 0xffff9043, 0x2b66, 0xffffc79e, 0xffff8966, 0xffffbfac, - 0x5fb1, 0xffffb183, 0x3602, 0x3d19, 0xffff7df4, 0x3ffe, 0xffffc919, 0x5ac7, - 0xffffa3e8, 0xfffff2ea, 0x47b9, 0xffffe344, 0x12f0, 0xffffc4e8, 0xfffff3fc, 0xffffcacd, - 0xffffd23b, 0x893a, 0x5e82, 0xffff8d36, 0x50e0, 0x49a6, 0x29dd, 0x16fa, - 0x451d, 0x8315, 0xffffe455, 0x749, 0x8624, 0x2fe5, 0x3ab5, 0xffffb4f1, - 0x72d, 0xffffccdf, 0x2b05, 0xffffa816, 0xffff9570, 0xffffd2e7, 0xffffa6ac, 0x2fc2, - 0xae4, 0x4c93, 0xfffffce1, 0xffffdb9f, 0x8102, 0x6bb1, 0xffffd5bf, 0xffff80e0, - 0xffffd70e, 0x568f, 0xc12, 0xffff9823, 0x700c, 0xffffa1aa, 0xffffa86c, 0xffffd303, - 0xffffbe7a, 0x38c9, 0xffff9f18, 0xffffcd7a, 0xffff8d75, 0x6955, 0xffffe70a, 0xffffbf49, - 0xffffc423, 0x31f, 0xffffe44a, 0x118a, 0xffffebfa, 0xffffedec, 0xffffee42, 0xffffd865, - 0xffff9b30, 0xffff8759, 0xffff827c, 0xffffbc26, 0xfffffb02, 0xffff8bee, 0xffffe6c2, 0x72f3, - 0xffffc2c9, 0xffff74ff, 0x2434, 0x1eb4, 0x11c9, 0x61c1, 0xffffa964, 0x89a3, - 0x6a43, 0x3d7f, 0xffffd09f, 0x14d8, 0x37bc, 0xfffffc31, 0xffffdb03, 0xfffff4e1, - 0x5547, 0xffffdc87, 0xffff929a, 0x73cc, 0x246f, 0x194e, 0xffffb4ce, 0x86b5, - 0x2f57, 0x7f05, 0x252b, 0xffff9b05, 0x5b7a, 0x164, 0x57cf, 0x7f86, - 0x5421, 0xffffa478, 0xffffbbda, 0x1b3c, 0xfffff4cb, 0xffffda7e, 0x5d8e, 0x1957, - 0xffffb3a7, 0x1979, 0xffff8ddd, 0xffffd7b9, 0xfffff028, 0xffff8c90, 0x476a, 0x6be6, - 0x419e, 0xfffffd2d, 0x8294, 0xffffc931, 0xffffe1ab, 0xffffdd4f, 0x46f0, 0x1930, - 0x4e5e, 0x8429, 0xffffde0a, 0xffff8e69, 0x2972, 0x387f, 0x3dd8, 0xffffbcc6, - 0x121b, 0x6d3d, 0x1fa4, 0xffffa3ea, 0xffffbbef, 0xffffcbd2, 0xffffbe04, 0xffffb424, - 0xffff7533, 0x70cd, 0x2370, 0x4822, 0xffff756e, 0xffffbe8c, 0x4131, 0x1ead, - 0x47de, 0xffffed53, 0xffff917e, 0x5f93, 0xffffe264, 0xffffde05, 0xffff9dc3, 0xffffc1d9, - 0xffff9b25, 0x3ade, 0xfffff9b7, 0xffffac80, 0x239e, 0xffffb980, 0xffffc9a4, 0x788c, - 0xffffbb6d, 0x3bb7, 0x6483, 0xffffeac0, 0x25ea, 0xffffbdfc, 0x333d, 0x8c0d, - 0x6d9a, 0xffffafe8, 0xffff8a74, 0x6067, 0xffff8642, 0x1a64, 0xfffff921, 0x3f3b, - 0xae4, 0x5112, 0x43a4, 0x1573, 0xffffc977, 0xffffa3b4, 0x21be, 0xffff96df, - 0xfffff035, 0x473b, 0xffff8d26, 0xb75, 0xffffecdc, 0x4455, 0x47d5, 0xffff7581, - 0xeca, 0xffffb3fe, 0xffff9f6a, 0xffffea15, 0xffffb9c3, 0x5516, 0xffffb654, 0x7f91, - 0x80b, 0xffff96b7, 0x2b60, 0x36b7, 0xffffc581, 0x285b, 0xffffa002, 0xffffc7e5, - 0x4965, 0xffff94d4, 0xffff764b, 0x1cd2, 0x5599, 0xffffd272, 0xffffcbfb, 0xffffae6d, - 0xffffd496, 0x3183, 0xffffe4f5, 0xffffa59f, 0x43df, 0x4569, 0xffffb185, 0x1d56, - 0xffff933a, 0xffff7a2c, 0x38d0, 0xffffb815, 0x5203, 0xfffffd89, 0xffff93ea, 0xffffa4dd, - 0x1f13, 0xffffad7d, 0xffffff4f, 0xffffe13c, 0xffffd60a, 0x8c88, 0x8276, 0xffffeaaf, - 0xffff8a66, 0xffff7888, 0xffff91e9, 0x8bdf, 0xdcf, 0xfffff282, 0xffffe91b, 0x1eb1, - 0x6fc, 0xffff81f6, 0x1617, 0xffffad02, 0xffffafaf, 0x60d5, 0x6f2b, 0x4e8b, - 0x2347, 0x3257, 0x29cf, 0x86c4, 0x75b3, 0x7745, 0xfffffcc7, 0x49cd, - 0x558f, 0xffff7c7a, 0x52e1, 0xffff7626, 0x7690, 0xffffb357, 0xffff7dbf, 0xffffa1ee, - 0xffffa874, 0xffff846f, 0xffffab72, 0x5cef, 0xffffb0cf, 0xffff8c24, 0xffff8e10, 0xffffe200, - 0x2a45, 0xfffff883, 0x5155, 0x37c9, 0xad6, 0x1ed9, 0x79e2, 0x1f4c, - 0x45f8, 0x48ec, 0xffffa331, 0x34a1, 0xffffc7b0, 0x2eb5, 0x5dc, 0x4cdd, - 0x4e5c, 0xffffa7c7, 0x3b08, 0x2776, 0x2e1a, 0x788d, 0x162b, 0x1fa7, - 0x466c, 0x5ca2, 0xfffff3ac, 0xffffa62f, 0xfffffd4c, 0x5f48, 0x779, 0x2a5e, - 0xffffe14e, 0x196, 0xffffaba1, 0x404c, 0xffffdc5b, 0x238f, 0x274, 0xffffa5c6, - 0xffff9e2b, 0x6201, 0xfffff195, 0xfffff3b0, 0x2285, 0xffffc7f0, 0xffffdff4, 0xffffc43d, - 0xffffac57, 0xffffb7a6, 0xffffe88c, 0xffffd3ac, 0xffffbb5c, 0x2cbd, 0x44d6, 0x5e30, - 0xffffeb53, 0x6d8b, 0xffff7f8b, 0xffff99a3, 0xffff7a4e, 0xffffbc82, 0x6a49, 0xfffff220, - 0xffffeaca, 0x4146, 0x8d72, 0xffffdcb7, 0xffffe2f3, 0xfffff736, 0x557f, 0x13fd, - 0x66a, 0x5d9, 0x29ee, 0xffffda1e, 0xd38, 0xffffe70f, 0xffffbbd7, 0xffffe1ee, - 0x4a0d, 0x502e, 0xffff8c37, 0xffffaccc, 0xffffdd0b, 0xffff7401, 0x3a89, 0x73b4, - 0x71b7, 0x5b43, 0xffff9baf, 0x4d76, 0x25f, 0x7f97, 0xffffcb71, 0x6b4c, - 0xffffe999, 0x3fd5, 0xffffd40b, 0x3f0d, 0xffffc17b, 0x3de9, 0x87f7, 0x6446, - 0x5be, 0xffffd88a, 0x7d05, 0xfffffe16, 0x467e, 0x1454, 0xffffca4e, 0xffffa047, - 0xffff92ac, 0xffffddc9, 0x72a9, 0xffffc902, 0x3605, 0xe47, 0x280c, 0x7662, - 0x609d, 0xffffae0a, 0x78e0, 0xffffa02a, 0x1c87, 0xfffff91b, 0xffff7792, 0xffff745e, - 0xffff8097, 0xffff8583, 0xffffe7e4, 0x61a5, 0x36a8, 0x7fe7, 0xffffaecc, 0xffff90f7, - 0x5ad9, 0x7e2f, 0xffffffca, 0x75c7, 0x7134, 0xffffd7fe, 0x3c22, 0x314c, - 0x7c97, 0x2068, 0xffff7926, 0x3e7c, 0x6926, 0x67f9, 0x3e28, 0x7c65, - 0x76b9, 0x25cf, 0x1039, 0xffffdf97, 0x8779, 0xffffe8fd, 0xffff9f74, 0x770a, - 0x8a50, 0xffffd241, 0xffffddee, 0x5aab, 0xffffc97f, 0x4572, 0x3276, 0xffffe7ec, - 0xffff8cc2, 0x6331, 0xfffffedf, 0x3b86, 0x3038, 0xffffd628, 0x2645, 0xffff737c, - 0x72fe, 0xffff8474, 0x23fb, 0x78f, 0x194c, 0x95a, 0xffff91d0, 0xffff8014, - 0x56e9, 0x2efe, 0xffffae5b, 0x614, 0xffffca3d, 0xffffd77e, 0x73e1, 0x35f7, - 0x71f3, 0xffff9279, 0xffffe6f3, 0x404b, 0x548d, 0x32a3, 0xc11, 0x637a, - 0xffff7605, 0x2ba8, 0xffff8f35, 0x8157, 0x423f, 0xffff9711, 0xffffb980, 0xffffb4b1, - 0x3494, 0xffffc9dd, 0x6c43, 0x563f, 0x52c, 0xffff9680, 0x8b7a, 0xffffcf49, - 0xffffa40b, 0x6daf, 0xffff840e, 0x29cd, 0xffffbf5c, 0x68b7, 0xffffedf3, 0xffffe329, - 0xfffff634, 0x8619, 0x33bc, 0x28b4, 0x5ed8, 0xffffcfbb, 0x883a, 0xfffffdf6, - 0xffffb980, 0x7bac, 0xfffffd6d, 0x418f, 0x4a25, 0xffffbed3, 0x4272, 0xffffef42, - 0x800f, 0x78e3, 0x82c8, 0x24e1, 0xffffcfa3, 0xffffb385, 0x86b, 0x645b, - 0x38aa, 0x6a22, 0xffffc21b, 0x60f0, 0x9b6, 0x912, 0x7621, 0xffff94cc, - 0xffffd5c9, 0xfffffdb5, 0xffffd93a, 0x2a11, 0xffff8b3d, 0xffffc0d2, 0xffffa00f, 0xffffe965, - 0xfffffa0f, 0xffffbfa9, 0x5e78, 0xffff925b, 0xffffeac8, 0xffffd5af, 0xffffba37, 0x395a, - 0xffffdc75, 0xfffffdf2, 0xffff7c7b, 0xffff89a3, 0x3766, 0xffffe8a9, 0x7118, 0x399e, - 0xffff7ff5, 0xffffac9a, 0xffff7d74, 0xffffa5d2, 0x4c27, 0x787f, 0x586, 0x7ce4, - 0xffffb38e, 0xffffb93d, 0x240d, 0x5a90, 0xffffb448, 0xffff8e29, 0xffffbc06, 0x3bf3, - 0xffffda90, 0xffffb78d, 0xffffc747, 0xffffa5c0, 0xffffe2dd, 0x7fbd, 0x8946, 0xffff8d50, - 0x2451, 0x18f9, 0xffffc1d4, 0xffffb689, 0xffffc37b, 0xffffbe2f, 0xffffbe9e, 0x8117, - 0x7050, 0xfffff504, 0x2b9, 0x464f, 0x298d, 0x2367, 0xffffe8c3, 0x79f1, - 0x4e38, 0x5cc8, 0x2928, 0xffffb486, 0x7cd6, 0xffffdbd9, 0xfffff110, 0xffffeff7, - 0x19b8, 0xffffeb99, 0xffff847c, 0xffff7612, 0xffffd542, 0x2966, 0xffff8ce2, 0x38fe, - 0xffffdeaa, 0x5238, 0x67c4, 0xffffa5e7, 0x4e6d, 0xffffd82e, 0x5973, 0x351b, - 0x74e8, 0xffffafcd, 0x66dd, 0x20e4, 0x609d, 0xffffade3, 0x509f, 0xffffa21f, - 0x2cce, 0x54c2, 0x1953, 0x85ce, 0x6bee, 0x3222, 0x6ff6, 0x3773, - 0x5a64, 0xffffe40f, 0xffffc6df, 0x3556, 0x80a9, 0xffff76c5, 0x495b, 0x1ae4, - 0xffffca33, 0x31f2, 0x833e, 0x89c3, 0x5f43, 0xffffbee7, 0x3ab2, 0x87af, - 0x4c74, 0xffff810b, 0xffffbed0, 0x6795, 0xffff785c, 0xffffbc0b, 0x520e, 0x4348, - 0xe03, 0x4541, 0x2557, 0xffff9110, 0x4044, 0x1947, 0x4dab, 0xcbe, - 0x3f72, 0x4507, 0xffffa362, 0xffffc20b, 0x6c1b, 0x27c7, 0xffff9bf2, 0x6506, - 0xffff89cc, 0x5c3e, 0x4509, 0x409a, 0xffff98db, 0x1674, 0xffff9324, 0x7328, - 0xffff99cf, 0xcd8, 0x730a, 0x14b9, 0x672d, 0xffffd620, 0x1dd8, 0x3bec, - 0xffff94b6, 0xffffb689, 0x7dfd, 0x3ffd, 0xffff9cb6, 0x3560, 0xffffbaf8, 0xffff8604, - 0x8795, 0xffff7aec, 0x66a5, 0x6a0b, 0x564b, 0xffff8d00, 0xffffed20, 0x11b8, - 0xffffdc27, 0x595d, 0xffffddf0, 0xfffffc70, 0xffffd5bf, 0x6714, 0xffffaf69, 0xdb2, - 0x3786, 0xffffbf9d, 0x7ca7, 0x5a53, 0xffff7c6a, 0xffff8465, 0xffffe4c6, 0xffffa238, - 0xffff7f9b, 0x6887, 0x3838, 0x7115, 0x5bce, 0xeae, 0x47c, 0xffffd54a, - 0xffffb9d5, 0x6183, 0x9c3, 0xbd5, 0xffffe217, 0x8237, 0x51d7, 0x52fe, - 0x6424, 0xffffb192, 0xffff7ebb, 0xffffd373, 0xffff9cf7, 0x390b, 0xffffa473, 0x8953, - 0xffff90c9, 0x594a, 0xc6e, 0x32ba, 0xffffae73, 0x86c7, 0xffffd7a0, 0xffffa82e, - 0x8d66, 0xffffabcf, 0xffff84d0, 0x3a84, 0xffffe8bd, 0x4948, 0x3f2a, 0xfffff4e5, - 0xffffb0bd, 0x4961, 0xffffd95b, 0xffffd96c, 0xffffce34, 0x57ff, 0xffffdf08, 0x2330, - 0xffffa8c7, 0x24cb, 0x740a, 0xffffdbcf, 0xffffad36, 0x306f, 0xffffa30b, 0xffffc488, - 0xffff8022, 0x464a, 0x6f00, 0xffffb419, 0xffff8450, 0x2ddb, 0x2731, 0x63fd, - 0x2946, 0x5c28, 0xffffb064, 0xffffb277, 0x1e0f, 0x6d71, 0xffff7ff3, 0xfffffb02, - 0xf2a, 0xffffd69c, 0x638, 0xffffe8ff, 0xffffbd7e, 0xffffb26f, 0xffffe153, 0xffff9879, - 0xffff849c, 0x1f73, 0xffff9b21, 0x2bb1, 0xffffa95b, 0xffffd582, 0xffffdbfa, 0xd2c, - 0xffffa86f, 0x2ab3, 0xffff9d78, 0x1074, 0xffffbcb5, 0x3990, 0xffffe869, 0xffffb422, - 0x2dc8, 0xffffca25, 0xffffcfe8, 0xaf1, 0xffff82c8, 0x36a, 0x2f4e, 0xfffffdcd, - 0x77fa, 0xffffad4f, 0xffffa54a, 0x50b9, 0x6eab, 0x5178, 0x8982, 0xffffe4dd, - 0xffff9a82, 0x45a2, 0x784e, 0xffffbd6e, 0x5019, 0xffffcc5c, 0x8009, 0x5d96, - 0xffffac8d, 0xffff8ec9, 0x4c, 0x4222, 0xfffffa7f, 0x3227, 0x67ea, 0xffffe679, - 0x3dc8, 0xffffb5b5, 0x1424, 0x3e4a, 0xfffff175, 0xffffaf4b, 0x4657, 0x1374, - 0xffff7233, 0x7190, 0x332, 0xaf0, 0x68c0, 0xffff85ad, 0xffffd0af, 0x2b1, - 0xffff8d54, 0x1f99, 0xffffe8d5, 0xffffc30b, 0x2877, 0xffff9d40, 0xffff8852, 0xffffb01a, - 0x4b32, 0x3279, 0xffff9099, 0x5f4f, 0xffffe08c, 0xffff9fe0, 0xffff9ecc, 0xfffff557, - 0xfffffc25, 0xffffa719, 0xffff920a, 0x62ac, 0xfffff11d, 0x152d, 0xfffff5d6, 0x5223, - 0xfffff438, 0xffff73f3, 0x34e1, 0x49a9, 0x6a73, 0x2ad3, 0x1f51, 0x824, - 0x1bc9, 0x5170, 0x552d, 0x52b5, 0xfffff12a, 0xffffec44, 0x7924, 0x5294, - 0xb63, 0x822f, 0xffff9afd, 0x7e29, 0x2d91, 0x42ad, 0xfffff589, 0xfffff6e9, - 0x2792, 0x4269, 0xffff9639, 0xffff726f, 0x4074, 0xffffa179, 0x8a6b, 0xffffb431, - 0x850f, 0xffff903f, 0x6b22, 0x738, 0x16a0, 0xffff917f, 0x8a5a, 0xb61, - 0xffffcce6, 0x6369, 0xffffb671, 0x66c0, 0x68e6, 0x41aa, 0x2fc3, 0x2382, - 0xffffabd5, 0x62c, 0x5041, 0xffff9903, 0x846b, 0x86f6, 0x8111, 0x15c, - 0x62ed, 0xfffff411, 0x517c, 0xffffbb6d, 0x8256, 0x141e, 0xfffffd31, 0x8777, - 0xffffabbe, 0x4eb5, 0xffffbae4, 0x75a2, 0x2bfc, 0xffff799f, 0x26bd, 0x2296, - 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0x11e, 0xffffdcb5, 0xffff934b, 0xfffff44a, 0xffffd194, 0xffffe03b, 0x5841, 0xffffd49a, - 0x26f3, 0xfffffc5a, 0x8d0e, 0x6441, 0x2fc5, 0xffffed7a, 0xffffe739, 0xffffd2ff, - 0xffffb541, 0xffff8f9e, 0x807, 0xffff8e7d, 0xffff85b9, 0xffff8fc7, 0x778a, 0x8451, - 0xffffa75f, 0xffffe5b1, 0x2aeb, 0x7fe6, 0xffffc2b3, 0x8534, 0x268a, 0x6711, - 0xffff8cf8, 0xffffd800, 0xffff7913, 0x7c1b, 0x4e76, 0xffffde5d, 0x1545, 0xfffff355, - 0xffffc1bb, 0x398c, 0xffff798a, 0xffffdc27, 0x40ed, 0xfffff8fc, 0xfffff918, 0x7ef5, - 0x5182, 0x8369, 0x47af, 0xffffd6d5, 0xffff7e09, 0xffffa12e, 0x5363, 0xffffce2c, - 0xffffdc79, 0xfffff095, 0xffff7760, 0x4905, 0xffffd192, 0xffff9ca8, 0x39dc, 0xffffd67b, - 0x680, 0xffffb5a4, 0xffffd7d7, 0xffffb5a5, 0x7fcd, 0x7305, 0xffff8e3b, 0x179d, - 0xffffebf4, 0xffffad3c, 0xffff791f, 0xffffb513, 0x7d2e, 0x361f, 0x1a0f, 0xffffd336, - 0xffff7531, 0xffff73ec, 0x8acc, 0x85bf, 0xffff8a29, 0xd3c, 0x392, 0x4482, - 0x7272, 0xffff8403, 0x7d3e, 0xfffff055, 0x6ae2, 0xffffc5b3, 0x74ac, 0x30f6, - 0xfffff4bd, 0x19ba, 0xffffc488, 0xffffeec2, 0x877, 0xa9d, 0xfc1, 0x57a0, - 0x4879, 0x175a, 0xffffa0c0, 0x533, 0x8765, 0x2d23, 0x7ae9, 0x1d9e, - 0x16b2, 0x58c4, 0xffffe64f, 0xffff79ba, 0x68cd, 0x5c30, 0xffffb8e0, 0xffffc5d1, - 0xfffff04f, 0x5fec, 0x19ca, 0xffff8c02, 0x15ab, 0x8897, 0xffffebeb, 0x70d7, - 0x1662, 0x8c83, 0x8bc8, 0x21c8, 0xffffa728, 0x6513, 0xffff92f4, 0xffffadb2, - 0x7a29, 0xffffe450, 0x2136, 0xffffc6db, 0x26e, 0x8221, 0x3097, 0x5883, - 0xffffa134, 0x8284, 0xffffa6d9, 0x1c76, 0xffff8524, 0x164e, 0xffffa415, 0xffff841e, - 0x309d, 0xffffd4e1, 0xffff99a3, 0x4e11, 0xffff90a2, 0x51bf, 0xffffec39, 0xffff9073, - 0xe4e, 0xffff7a6a, 0x26b0, 0x64e4, 0x1a95, 0xffffeed3, 0x8049, 0x67b0, - 0x23e0, 0xffffb836, 0xf72, 0x2c0f, 0xffffacff, 0xffffa183, 0x87b8, 0xffff7e3a, - 0xffffef41, 0xffff796e, 0xfffffd33, 0x4c73, 0xffffd590, 0xffffdfac, 0xfffff5fb, 0xffff9594, - 0xffffba62, 0xffffa2d2, 0x496a, 0x1501, 0xffff9a7a, 0xffffc542, 0xffff8a89, 0xffffdda6, - 0xffff7f5e, 0xffffbf34, 0xffffe1e1, 0xffffb26c, 0xffffe9c3, 0x67cc, 0xffffb506, 0x6416, - 0x454, 0x3724, 0xffff9c3d, 0x2f27, 0x45cb, 0x670f, 0xffff7969, 0xffffdc9e, - 0xffff87e1, 0x1948, 0xfffffe4e, 0x1fdd, 0xffffe119, 0x5c64, 0xffffc383, 0x1062, - 0x6828, 0x6dd8, 0x2238, 0x12d5, 0xffffd611, 0xffff8739, 0x137a, 0x52c6, - 0x441c, 0xffffc74c, 0xffffee23, 0x583a, 0xffffd369, 0x3c68, 0xffff99a0, 0xffffb914, - 0xffffbe62, 0xffffcd86, 0x1438, 0xffffe64d, 0x53da, 0x2358, 0x89f6, 0x6e04, - 0x459f, 0xffffb2a5, 0xffffdaf4, 0xfffface2, 0x6673, 0xfffff8df, 0x594d, 0xffffeedd, - 0xffffa520, 0xffff8687, 0x70b0, 0x5dba, 0xffffe645, 0x3bbc, 0xffff8028, 0xffffea28, - 0xffffc7ba, 0x36ca, 0x7c40, 0x34ce, 0xffff7a62, 0x10bf, 0x5ee1, 0xffff98ab, - 0x10be, 0x3b49, 0x8c53, 0x8386, 0xffff7a09, 0xffff7a77, 0xffff7acd, 0x2cc4, - 0xffff93aa, 0x574, 0xffffc3ed, 0x2586, 0xffffeca4, 0x750e, 0xffffb075, 0x6308, - 0x67ac, 0xffffc8a3, 0x49c1, 0xfffff006, 0x89c9, 0x4f36, 0x3909, 0xffffd5d0, - 0xffffe4c1, 0xffff7a19, 0xffff8552, 0x7a2b, 0xffff9d63, 0x88e9, 0xfffffde4, 0x190a, - 0xffff826f, 0xffffecd9, 0x1983, 0xffffe551, 0xffff92e2, 0x2c5c, 0xffffd03c, 0x4adf, - 0x6865, 0xffff7e20, 0xffffea03, 0x841d, 0x4e37, 0x3d59, 0x3171, 0x673a, - 0x1afc, 0xffffa098, 0xffffde36, 0xfffffbbd, 0x47a5, 0x65be, 0x3738, 0x2beb, - 0x3e11, 0x6cff, 0x8da8, 0x22a6, 0xffffdf4a, 0x1151, 0xffffc349, 0x3485, - 0xffffee00, 0xffff864e, 0x865, 0x5989, 0x4145, 0xffff8999, 0xffff835e, 0xffffc2ad, - 0x2f00, 0xffffdc98, 0x7dfe, 0xffffc2fe, 0x1234, 0xfffff5da, 0xffffd55c, 0x119e, - 0xffff7dc3, 0xffffb27e, 0x7aae, 0xffff7b34, 0xffffde8e, 0x797, 0xffffab7e, 0xffffe6ce, - 0x7685, 0x600f, 0x7285, 0x6045, 0xffffe2f4, 0x69e7, 0xffffdfd8, 0x14a, - 0xffffda78, 0xffffabc0, 0x89c3, 0xffffbeac, 0xc37, 0x6df4, 0xffffe0d2, 0xffffc632, - 0xffffa62e, 0xffff8d46, 0xffff78fa, 0x3003, 0xfffff74e, 0x42a9, 0xffffe8d6, 0xffff7863, - 0x6a8e, 0xffff8696, 0x1844, 0xffffa06f, 0xd36, 0xffffd8d8, 0xffffe27c, 0x387e, - 0x30fb, 0xfffff762, 0x808a, 0x2d5b, 0x6717, 0xffffff14, 0x845b, 0xffff9586, - 0x68b, 0xffffe56f, 0xffff96b9, 0x6295, 0xffffb26c, 0x2a02, 0xfffffd8b, 0x6b98, - 0xffff8ca4, 0x501a, 0x5f44, 0xffffa9ac, 0xffffa063, 0xffff9030, 0xffff80d2, 0xffffcd8c, - 0x4c8c, 0xffffc0f8, 0x397, 0x819c, 0x767c, 0x7d99, 0xfffff123, 0x1b50, - 0x2c29, 0xffffd70f, 0xffffcca8, 0xffffa017, 0xfffff2b7, 0xffff74f0, 0xffffa9ed, 0x233b, - 0x1516, 0xffffbb9f, 0xffff97bc, 0x23c4, 0xfffff299, 0x7db1, 0xa52, 0xffff9161, - 0xffff8541, 0xffff75a7, 0xe20, 0x7dd3, 0xffffcc27, 0xffff9e5e, 0xffffe9ee, 0xb6e, - 0xffffe271, 0xffffe9e6, 0x6d72, 0xfffffd38, 0xffffa167, 0x6246, 0x83b, 0xffffa571, - 0xaeb, 0xffff8759, 0xffffa37f, 0xffffea7c, 0x6061, 0x8b6c, 0xffffb904, 0xffff88ea, - 0xffffa8f7, 0xffffd266, 0xffffa1bf, 0x343a, 0x6f9c, 0xffffd56b, 0x37ef, 0xffff8566, - 0x4eb7, 0xffffd9b3, 0xffffd22e, 0x8af7, 0x1d78, 0xfffff575, 0x391e, 0x4836, - 0xffffeaf1, 0xffff89a2, 0x6ac6, 0x611f, 0x8458, 0x2af6, 0x588f, 0x8e5, - 0x8bf6, 0xffffac56, 0x35d8, 0x6e0, 0x371b, 0xffff7743, 0xffffc693, 0x146c, - 0xffff80e3, 0xffffb207, 0xffffe58c, 0xffff8e50, 0xffffb07b, 0xfffff121, 0xffff9b54, 0x5dd4, - 0x700d, 0xffffe8a8, 0xffffdc38, 0xffffe745, 0x3734, 0x1db6, 0xffff8353, 0xffff7e3b, - 0x8eb, 0x6019, 0x2c5c, 0xffff8bd0, 0x8a7f, 0x7bc1, 0xfffff710, 0x4002, - 0x3650, 0xffffce4a, 0xffff7cce, 0xb70, 0x359a, 0x3013, 0x362, 0xffffa441, - 0x5b8e, 0xfffffe99, 0xffff7813, 0x7fdf, 0xffff8fc1, 0x5912, 0xffff8122, 0xfffff92a, - 0xffff8c22, 0x46a0, 0x5d05, 0xffffc4c0, 0xffffbc37, 0xffff9f62, 0x3103, 0xfffffb57, - 0xffffdf3b, 0xffffbde0, 0xffffe2fd, 0xffffcb24, 0x7291, 0xffffc112, 0x305d, 0x60f4, - 0xffffc8ae, 0xffff7574, 0xffffe0d9, 0xe58, 0xfffffeba, 0x66e, 0xffff8463, 0x8643, - 0xffffa427, 0x405e, 0xffffa5f5, 0xffffcb8f, 0xffffb04c, 0xffff79aa, 0x1a22, 0xffff896c, - 0xffff7d81, 0x7bda, 0x6989, 0x3996, 0x870e, 0x3a69, 0x3b4a, 0xffff9e08, - 0x2c97, 0x7ebd, 0xffffbf71, 0x1973, 0xffffdf6b, 0xffffbad9, 0x196a, 0x81e8, - 0x1c4, 0x61c5, 0x76e9, 0x25c5, 0x5131, 0xffff9e6e, 0xffff9637, 0xffff7d1a, - 0x5111, 0xffffff97, 0xffff8424, 0xffffbf3b, 0xffffb4f9, 0x2eaf, 0x7b44, 0x409e, - 0xffffe706, 0x1099, 0x328c, 0x401c, 0x2e7, 0x5b34, 0xffffd2f2, 0xffff9853, - 0xffff7804, 0xfffff344, 0xfffff283, 0x8ce9, 0xffff8fc2, 0xfffff155, 0xffffe2fe, 0xffff9d35, - 0x846f, 0xffffe3cf, 0x53f2, 0x67e4, 0xffffb405, 0xffff9c2a, 0x69a7, 0xfffff279, - 0xffffcd7b, 0xffffe05c, 0x5f40, 0x7110, 0x5c7d, 0xffffc8b4, 0xffffb97c, 0xfffffd3e, - 0x6b8f, 0xffffa8f4, 0xffffe8d7, 0xffffee7e, 0xa4e, 0xffff8a06, 0x4499, 0x65, - 0xffff9c0e, 0xffffdb63, 0xffff9123, 0x1fdb, 0x424a, 0xffffecca, 0xffffbde3, 0xb4, - 0xffffd7b7, 0xffffbb82, 0xffffa8bb, 0xffffcf0c, 0x1c1, 0xffff87e5, 0xfffff7cc, 0xffffc4dd, - 0xfffff3f1, 0x86c6, 0x3063, 0xffffbf8c, 0x2ddf, 0x7a9, 0x3d41, 0xfffff150, - 0xffff9224, 0xffffe905, 0xffffbd32, 0x76c2, 0x4021, 0xffff86cd, 0xffff895a, 0xffffd092, - 0x3b93, 0xffffbf5b, 0xffffe7f1, 0x44e, 0x7e09, 0x514f, 0xffffdae2, 0xffff8ae4, - 0xffffd626, 0x8cf6, 0xffffc1e5, 0xffff8d3e, 0xffffc16c, 0x5b5, 0xffff8d48, 0x264a, - 0x6750, 0x5f3f, 0x442e, 0xfffff88b, 0xffffe7d2, 0x73ce, 0xffffffac, 0x3302, - 0x5125, 0x590c, 0xffffe068, 0xffffb765, 0x473d, 0xffffd9cc, 0x9ae, 0x3ae0, - 0xffffdd98, 0x4346, 0xbe1, 0x506e, 0xffffe5dd, 0xffff8b4d, 0x6ac3, 0x89a1, - 0x229b, 0xffffa8bf, 0xffffb463, 0xffffb8aa, 0xffffb1bb, 0xffff8205, 0x76ba, 0x1117, - 0xffffae9e, 0xddf, 0xffffaf93, 0x1661, 0x490b, 0xffff798e, 0x4d5f, 0xffffbca8, - 0x13c4, 0x814a, 0x8340, 0xfffffe42, 0xffffc27f, 0xb42, 0xffffbeae, 0x39a3, - 0x5caa, 0xffffd38d, 0x2dba, 0xfffffe91, 0x5451, 0x768d, 0x827a, 0xffffbf93, - 0x5ff2, 0xffffeaa2, 0xffffb0fc, 0x677a, 0xffff758a, 0xffffbcc6, 0xffff9166, 0xffff9b70, - 0xffffa468, 0x36bf, 0xffffbf31, 0x2f3d, 0xffffd890, 0xfffff4af, 0x3b4b, 0xffffc047, - 0xffff98b3, 0xffffea02, 0xffff9ed7, 0x45b0, 0x8c73, 0xffffa371, 0xfffff4fa, 0xffffe309, - 0x3fce, 0x3020, 0x7e45, 0x40bb, 0x506c, 0x63a1, 0x52cd, 0xffff7a93, - 0x3108, 0xffffbf0a, 0xffffe87a, 0xffff782f, 0xffffcb8e, 0x3e37, 0x619a, 0xfffff75a, - 0xffffeb8a, 0x621f, 0xffff87fb, 0x594b, 0x70ee, 0x519c, 0xfffffa39, 0x540b, - 0xffff9ea8, 0x5321, 0xffff9ba2, 0xffff8804, 0x1049, 0x6249, 0xffffc186, 0x6915, - 0x45ba, 0xffffc569, 0x1275, 0x1141, 0xffff7d0c, 0xfffff6a0, 0xc88, 0xffffd0cf, - 0x5493, 0xffffca10, 0x8ba5, 0x5479, 0x56a5, 0xffff72c4, 0xffffc49a, 0x1f28, - 0x26e2, 0x1842, 0x5690, 0xffff8ee0, 0xffff7d53, 0x1896, 0xffffbaf2, 0x724a, - 0xffffc881, 0x2913, 0xffff8e93, 0x1318, 0x288c, 0xffff985d, 0x70ef, 0xffffaa46, - 0x114b, 0x5357, 0x36e9, 0xffff8651, 0xffffb4bb, 0xffffd3a5, 0xffffe071, 0xffffbc9d, - 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0xffffcb3d, 0x2af8, 0xffffb770, 0x8b27, 0xffffcd03, 0x8615, 0xffff7dd4, 0xffff7494, - 0x7f51, 0xffffdf3d, 0xffffbc52, 0xffffa686, 0xffffe0e6, 0xffffd409, 0xffffcd88, 0x5d0f, - 0x6c9c, 0x77ed, 0x69e2, 0x30b8, 0xffff894c, 0xffffe9c1, 0xffffa2b0, 0xffffff92, - 0xffffeecb, 0xffff7486, 0xfffff3a4, 0x4b1a, 0x15cf, 0xffffd171, 0xffffce83, 0xffffb1f3, - 0x2d8f, 0xffffa1a2, 0xffff90d0, 0x10a2, 0x4e89, 0xffff730e, 0xffffb689, 0x8bf3, - 0xffffc917, 0x3a3c, 0x28c6, 0x7a05, 0xffffc793, 0xffff944b, 0xffff8c4f, 0x13b6, - 0x6540, 0x3b3c, 0x1b68, 0xa31, 0xfffffce2, 0xffffa0f0, 0x4d63, 0xa6, - 0x290, 0xffff7f48, 0xffffb06c, 0x5986, 0xffffe2e9, 0xffffe281, 0x6fd1, 0xffff9467, - 0xffffa53c, 0xffffda9c, 0xfffffb90, 0x8a9b, 0x55f2, 0x646f, 0x517f, 0xa33, - 0x1a6, 0xffff8fda, 0xffff890b, 0xffff81f3, 0xffffaac7, 0xffffd83a, 0x7f, 0x2782, - 0x6083, 0xfffff711, 0xffffe8c7, 0x5553, 0x55b7, 0x4d1, 0x56e4, 0xffff8f89, - 0xffffbab6, 0xfffff28b, 0x232b, 0x5139, 0xbe4, 0x3b5e, 0xffffa73f, 0xffffdf16, - 0xcce, 0x5e29, 0xca2, 0xffffd78f, 0xffff861d, 0xffff8ef5, 0x63a9, 0x3d30, - 0xffffb006, 0xffffa007, 0x4596, 0x2801, 0x4936, 0x2816, 0x3f0a, 0xffff92c9, - 0x145, 0x4f85, 0x2c8, 0xc72, 0x36a8, 0xffff81cf, 0xffffeffc, 0xffffde3f, - 0xffffd5f2, 0x5692, 0x60d4, 0x4861, 0x339d, 0x6449, 0xffffdd43, 0xffff8c56, - 0xffffeb4d, 0xffff98b3, 0xfffff4cf, 0x455a, 0xffffb995, 0xffffce66, 0x1dce, 0x1f3e, - 0xffff92ea, 0xfffff303, 0x5783, 0x4aae, 0x29e6, 0xc20, 0x78b9, 0xffff878d, - 0x637, 0xffffb102, 0xffff7e5e, 0x6193, 0x5e68, 0xffffd7d8, 0x654c, 0xffffe71d, - 0xfffff721, 0x339e, 0xffff7e57, 0x5529, 0xfffffcf2, 0xffffe584, 0x26cf, 0xffffce2b, - 0xffffff6b, 0x6600, 0xffffe4e1, 0xffffb27a, 0xffff7760, 0xffff8f2d, 0xffffb0b8, 0xffffc68b, - 0x6907, 0x1110, 0xffffef9b, 0x27, 0xb8d, 0x2872, 0xffffc27e, 0x1bfd, - 0x123a, 0xffffdb77, 0xffffa828, 0x4f0a, 0x6fd6, 0xffff7358, 0xffffafee, 0xffffc050, - 0xffffc121, 0x2dc7, 0xffffe42c, 0x8dbf, 0x2698, 0x7efd, 0xffff98d6, 0xffff9eea, - 0xffffec08, 0x16a3, 0xd9f, 0x6ccb, 0xffff7e32, 0xffff7561, 0x6907, 0x651b, - 0xffff9d8d, 0xffff826f, 0x5a7e, 0x7a70, 0xffff9108, 0x54c, 0x84d0, 0x4a6e, - 0xffffc829, 0x5726, 0xffff9518, 0xffffeb06, 0xdcf, 0x143d, 0x385a, 0xffff8005, - 0xfffff2a7, 0xffffcd4e, 0xffff8b6d, 0xffffec7a, 0x536b, 0xffff8148, 0xffff7ff7, 0x3098, - 0x6fd7, 0x6a8c, 0xffff83fd, 0x52ca, 0x8cc1, 0x251c, 0x3fd6, 0xffffd96c, - 0x26de, 0x710, 0xffff9146, 0xffff9808, 0xffff790a, 0x46c7, 0xffff9cf3, 0x290d, - 0xffffe6b9, 0xffff9078, 0xffff75f7, 0x678a, 0xfffff708, 0x26f2, 0xfffff7aa, 0x583f, - 0x2e8f, 0xffffb64c, 0xffffc0bc, 0xffffa35b, 0x264a, 0xffffc82c, 0xcfc, 0x7d89, - 0x11e0, 0xffffce25, 0xffff9499, 0xffff7aa5, 0xe3c, 0xac7, 0x81c5, 0x7159, - 0x8c01, 0xb5c, 0xfffffc6c, 0xffffa6c9, 0x8249, 0x7524, 0xffff735e, 0xffffce06, - 0x10c7, 0x6334, 0xffff7b8d, 0xffffa314, 0xffffce5d, 0x4f8f, 0x3a7e, 0x277f, - 0x17b8, 0x8cd8, 0xffff9909, 0xffffc891, 0x5de9, 0xffffc012, 0x54d6, 0xffff8015, - 0xffff90d5, 0x15d, 0x703e, 0x3236, 0xffffdd2d, 0xffffca7a, 0x43c6, 0xb61, - 0x6fd2, 0x336c, 0xffff9509, 0xffffa109, 0x17f4, 0x18a4, 0x38d9, 0x6b5e, - 0xffffe932, 0x1fee, 0xffffd6a5, 0xffffeb7f, 0x5284, 0x1655, 0x15c9, 0x1fc6, - 0x6cd5, 0xffffa187, 0x60f5, 0x7248, 0xffff814d, 0xd14, 0x884e, 0xffff8616, - 0xffffab6c, 0x8c75, 0x1005, 0x57fc, 0xffff9c74, 0x84f, 0xffffb6a1, 0xffffd988, - 0xffff7530, 0x782, 0xffffa7be, 0xffff9cf5, 0x1497, 0xffffd560, 0xffffe680, 0xffffdf92, - 0x2ead, 0x8694, 0xffff9c30, 0x3b22, 0xa82, 0x1f5d, 0xffffba52, 0x5743, - 0xffffb4ee, 0xffffd01e, 0x119a, 0xffff7eff, 0x86da, 0x3771, 0xffffbc56, 0xffff89e1, - 0x483, 0xffffdbd8, 0xffffc090, 0x225, 0xac3, 0x4c86, 0x26f7, 0xfffff1fa, - 0xffff76a6, 0x2bb6, 0x6553, 0xffffb0ba, 0x1b0e, 0x4f6f, 0xffffc8f3, 0x787f, - 0x8416, 0x392, 0x18cd, 0xffff8c51, 0xffffb50d, 0xfffff2e8, 0x74bb, 0xffffc84a, - 0xffffca8d, 0xffff8508, 0xfffff79a, 0x5867, 0xffffbde9, 0xffffc76c, 0x5966, 0xffffa1a3, - 0x3ef6, 0xffffaf76, 0xffffb2a6, 0x62b4, 0xffffaf21, 0x1f61, 0xffff8de2, 0x6ae4, - 0x1711, 0x2848, 0xffffc6e4, 0xfffff285, 0xffffce37, 0xfffff33d, 0x10fa, 0x14a2, - 0x8c4b, 0x56d5, 0x6170, 0x2ce9, 0x10d8, 0x350e, 0x3e1e, 0xffffa4e0, - 0x5090, 0x8035, 0x43bb, 0xffffc129, 0x1cdb, 0x7cf4, 0x5897, 0xffffe38a, - 0xfffffda4, 0xffff8f8f, 0x1711, 0x73fe, 0x641b, 0x24f7, 0x53da, 0x3e9d, - 0xffffdd78, 0xffff857b, 0x34e7, 0x7881, 0xffffecc8, 0x80b8, 0xffffd388, 0xffffe600, - 0xffffea29, 0xffffecc9, 0xffff8b09, 0xfffffb67, 0xffffa4ea, 0x6e11, 0x631b, 0x332, - 0xffffcdfd, 0x1236, 0xaf1, 0x720, 0x2ab7, 0xffffa89c, 0xffffeab4, 0x65c1, - 0xffffff40, 0x203b, 0x2c2, 0x4c30, 0xffff94df, 0xffffe58b, 0x71fa, 0xffff8350, - 0xffff888f, 0x33d, 0xffffa878, 0x3d07, 0x199c, 0x644b, 0x5d3d, 0x2c5, - 0x783b, 0x855d, 0xfffffe0f, 0x29cf, 0x4bcf, 0x2631, 0xfffff8a4, 0xffffdd94, - 0x1d61, 0xfffffafc, 0xffff7e05, 0x24a0, 0xffff8a5a, 0x262a, 0x5c5b, 0x229f, - 0xffffe6a8, 0xffffcde6, 0xffffa684, 0x178, 0x37cf, 0x534, 0x190a, 0x86d9, - 0xffffd70b, 0xdf9, 0x8a0d, 0x7218, 0xfffff793, 0x420e, 0xffffa733, 0x811f, - 0xffffa1b0, 0x8cfc, 0xffffb39f, 0xffffb277, 0x8c8d, 0x188, 0x4b59, 0x660c, - 0xffffc5c1, 0xffffc2c9, 0xffffe996, 0x2fd7, 0x1650, 0x6209, 0xffffa6a9, 0x4c28, - 0x7291, 0x587e, 0x4ef5, 0xffffaa02, 0xffffb81c, 0xc34, 0xffff79d4, 0xbe0, - 0x6bc9, 0x49c7, 0xffffb6eb, 0x120a, 0x455f, 0xffffa242, 0x19e1, 0x5b62, - 0x5cec, 0xffff8be5, 0xfffff857, 0xffffc764, 0xa02, 0xffff8856, 0x702c, 0xffff7b18, - 0xffff85d1, 0xdb3, 0x6296, 0x3ef2, 0x55a0, 0xffffe47a, 0x3213, 0xffffdcb1, - 0x2a00, 0x2c6d, 0xfffff530, 0x77d2, 0xfffff051, 0xffff82cc, 0xffffe0f7, 0x603e, - 0xffffcdcf, 0x3ee8, 0xffff9788, 0x4ee3, 0xffff8a08, 0x44d7, 0xffffae63, 0xffffa7bc, - 0x151e, 0x5de1, 0xffffe129, 0x7ec1, 0xffff82e1, 0x7a8a, 0xffff7c0f, 0x866a, - 0x1c48, 0x63fd, 0xfffffdf7, 0x681d, 0xffffeb26, 0x6d6c, 0xfffff7b5, 0x63e, - 0xffffcbab, 0xffffedcd, 0xffffe5d6, 0x4967, 0x834b, 0x28eb, 0x6365, 0x7e4b, - 0xffffd7aa, 0xffff759e, 0x5cad, 0x22f6, 0xffffa019, 0xffff7a60, 0xffffb158, 0xffff9830, - 0xffff88fa, 0x5381, 0xffff9edf, 0xffffb70e, 0xffffb5e0, 0x28b9, 0xffffd778, 0x4aa9, - 0x1029, 0x4de8, 0x85a, 0xffffa5af, 0xffff9598, 0x694a, 0x442f, 0xffffc325, - 0x1646, 0x40b4, 0x51b0, 0x50c4, 0xfffff810, 0x6afc, 0x1611, 0x7c33, - 0x2c36, 0xffffadd9, 0xffffff75, 0xffffa472, 0x2a6f, 0x1ea3, 0x5389, 0x42ec, - 0xffff7734, 0x10df, 0x7e19, 0xffffbe25, 0x45dc, 0x52d1, 0xffff7b84, 0xfffff9d9, - 0x202c, 0x6f8c, 0xffff96b0, 0x4581, 0x13a9, 0x7c2c, 0x2c73, 0x456a, - 0xffff90d7, 0xffff918e, 0x4daf, 0xffff883f, 0x292d, 0xffffd140, 0x4599, 0x7022, - 0x6e51, 0x6fd8, 0xffffcc81, 0x55a, 0xffffb012, 0xffff8234, 0xffff8e12, 0xffff866e, - 0xffff82ab, 0x3a12, 0x77f1, 0xffff8e5c, 0xffffb9db, 0x8114, 0xffffb4d1, 0xffffaa27, - 0xffffef2b, 0x512b, 0xfffff599, 0x2614, 0xffffec61, 0x2e53, 0xffffe14a, 0x8762, - 0x15ea, 0xffffa04a, 0xa9c, 0x3db3, 0xffff9da7, 0x1ba7, 0x6f1, 0x7046, - 0x40d8, 0x2807, 0xfffff498, 0x4003, 0xb8b, 0x80d9, 0xffffc968, 0xffffb091, - 0x6a11, 0x575d, 0xffffbd30, 0x59b7, 0xffffec68, 0x3bc3, 0xffff9852, 0x8d97, - 0x3bdd, 0xffff7b05, 0x3a08, 0x796a, 0xffffde73, 0x23d7, 0xffff937c, 0xffff8364, - 0x2c86, 0xfffff529, 0xffffb941, 0x4f9f, 0x300a, 0xffffb69a, 0xffff8ae2, 0xffff76f4, - 0x6281, 0xffff7a7f, 0xffff8cae, 0x6a9b, 0xffffc3e3, 0x6b24, 0x1a7f, 0xffffbbaa, - 0xffff9898, 0xfffff100, 0xffff9a77, 0xfffffeb5, 0x8062, 0x26f6, 0x72a6, 0x82a8, - 0xffff8d48, 0xffffad0b, 0xffff78ed, 0x39d9, 0xffff8cbd, 0xffffe4fb, 0xffff73d3, 0xffff8749, - 0xffff7787, 0x186d, 0xffff8a66, 0xffffd430, 0x675d, 0x6208, 0x1e0a, 0xffffd207, - 0x7627, 0x272d, 0xffffe162, 0xffff7f78, 0xffff97cd, 0xffffe52f, 0xffff9648, 0xffffbde7, - 0x4a2, 0xffffab13, 0x408e, 0xffffaf5a, 0xfffffccf, 0xffffcaee, 0x3ce9, 0xffff9f86, - 0xffffbdf6, 0x6f7d, 0x1ac0, 0xffff7d8f, 0xffffb5f4, 0x15d5, 0xffffb317, 0xffff8d69, - 0xffffd179, 0xffff9256, 0xffffaed4, 0xfffffd69, 0xffffe67c, 0x8a5d, 0xffffb985, 0x7bd5, - 0x1eaa, 0xffff7ea6, 0x7a6, 0xffffcc73, 0x45fe, 0xffff9312, 0xffff8963, 0xffffcd75, - 0x3534, 0x29af, 0xffffa890, 0xffff81d1, 0x3c3a, 0xffffcbc4, 0x43ba, 0x320c, - 0x70c6, 0x2ec5, 0x189d, 0xffff768f, 0xfffffcf4, 0x3ea8, 0x8212, 0xffffabef, - 0xffffc162, 0x22d4, 0x5755, 0xffffc5a0, 0x87f4, 0xffffb7da, 0xffffa9f3, 0x6eb4, - 0x1abc, 0x5caf, 0x3043, 0x4be4, 0x557b, 0x18e5, 0x2499, 0x7f, - 0xffffcd2d, 0xffffd93e, 0x3af4, 0xffff8c49, 0xffffc5a9, 0xffffb1ba, 0xffff9c0c, 0x18ba, - 0x2cbe, 0xffff8efc, 0xffffa34b, 0x3b05, 0x49d, 0xffffe7b4, 0xffffd9de, 0xfffff909, - 0x5f8, 0x3651, 0xffff7d02, 0x5eda, 0xffffb6f3, 0xffffaa6d, 0x201e, 0xffffc0d0, - 0xd3c, 0x11dd, 0x8c01, 0xfffff81f, 0x84fb, 0xffffe312, 0x7cdc, 0x6d33, - 0xffff8b40, 0x79af, 0xfffff0d5, 0xffffe4ee, 0x73a8, 0x20e6, 0xffff927f, 0x8592, - 0xffffb092, 0x5012, 0x76b, 0xffffa971, 0x8ba1, 0xffffb512, 0x22f3, 0x8ae3, - 0x4217, 0x70e6, 0xffff8854, 0xffffa794, 0x69dd, 0xffffea58, 0x30f6, 0xffffa42d, - 0xffff9908, 0x5e1e, 0x2fd4, 0x329, 0x775a, 0xffff95b2, 0xffffa71e, 0xde7, - 0x2e22, 0x776e, 0x16d4, 0xffff8616, 0xffffb167, 0xffff85b5, 0x57da, 0x72eb, - 0xffffbaf7, 0xffffc299, 0x59ef, 0xfae, 0x1907, 0x4adb, 0x7242, 0x5bd3, - 0x189e, 0x5ad4, 0xffff8e3c, 0xffffedaa, 0xbe0, 0xffffffdc, 0xd45, 0x2ef8, - 0xffff7cd2, 0xffffaddd, 0x685a, 0x832e, 0xffffcf75, 0xffffd4dd, 0xbd6, 0x149f, - 0x3cdb, 0x7691, 0xffffc1e2, 0xffffa1c4, 0x7548, 0xffffa014, 0xffffe53b, 0xfffff6f1, - 0xffffeecb, 0xffffa681, 0xffffafc8, 0x6811, 0x875b, 0x1578, 0xffffdcbe, 0xffff8206, - 0x483f, 0xffff7c5c, 0xffffbf83, 0x2b71, 0x7789, 0xffff733b, 0xffffe5d4, 0x5b88, - 0x7751, 0xffffc109, 0x4a86, 0x7284, 0x67d8, 0x28d4, 0xffffa41e, 0xffff7baf, - 0x761d, 0xffffff5a, 0x3e9e, 0x4e25, 0x2a7a, 0xfffff846, 0xffff873f, 0x43a9, - 0xffffeeea, 0xffff840b, 0x716f, 0xffffacf0, 0x5da3, 0xffffb902, 0xffffaf05, 0x4b57, - 0x73da, 0xffff956d, 0x4cf1, 0x7716, 0x33dd, 0x464, 0xffffeb6c, 0x4007, - 0xfffff3b4, 0x1fe3, 0x721, 0xffffe758, 0xffffabb3, 0x19d8, 0xffffbc97, 0xffff751d, - 0x7cc7, 0xffffb5e3, 0xffff8625, 0x8590, 0xffff8fb2, 0x168b, 0x8a88, 0x5368, - 0x7a0a, 0xffffff50, 0xffff7c26, 0x2c26, 0x5a95, 0xffffd991, 0x19e2, 0xffff7a6d, - 0x3e4b, 0x2e49, 0x4b7a, 0xffffcaf0, 0xffffff91, 0x1fc2, 0x4ed5, 0xfffff2a5, - 0xffffcc85, 0x52ac, 0xffffcef3, 0x13ae, 0xffff7590, 0x4c03, 0x860a, 0x1715, - 0xfffff3b6, 0x3e42, 0xec, 0x5e30, 0x7f7b, 0xffff8325, 0xffffcc59, 0x3c5a, - 0x1730, 0xffff84b9, 0x543c, 0xffffc431, 0x210c, 0xffffff67, 0x3247, 0x78fa, - 0x6646, 0xffffb35a, 0xffffebe6, 0x74d8, 0xffff7d83, 0x696b, 0x2502, 0xffff898c, - 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0x7134, 0x1b66, 0xfffffed6, 0xfffffffb, 0x2f5d, 0xffffc33f, 0xffffb63a, 0x17aa, - 0xffffb6c7, 0xffffb5dd, 0x9a7, 0xffffb6ee, 0xffffce02, 0x4f50, 0xefc, 0xffffe4de, - 0xffff9e9b, 0xffffd397, 0xffffabfb, 0x771d, 0x7313, 0xffff8f5d, 0xbc, 0xffffa767, - 0xffff7a43, 0x1a04, 0x7e99, 0x5029, 0x2c61, 0xffffcf61, 0x6e6f, 0xffff8786, - 0x832e, 0xfffff079, 0x76f0, 0x6720, 0xb72, 0xffffc9bb, 0xffffb384, 0x8b40, - 0x4f6f, 0xffff9c0e, 0xffff7248, 0x8721, 0xffffb61c, 0x3264, 0x4af3, 0x26fa, - 0xffff78cb, 0x3f99, 0x519b, 0x3d38, 0xffff9e3c, 0x6363, 0xfffff082, 0x61, - 0x80e3, 0x882c, 0x1ad9, 0xfffff42c, 0xffffe5d7, 0xffff78aa, 0x7f81, 0x6333, - 0xe4b, 0x99, 0xfffff37c, 0xffffd8b0, 0x5f1f, 0xffffa399, 0x2fe4, 0x413f, - 0x2fb, 0x2d48, 0xffff9550, 0xffffd960, 0x8c72, 0xffff83f3, 0x3d50, 0x85ec, - 0xffffb965, 0x1cdd, 0xffff8626, 0xffffa6c0, 0xffffa058, 0xffffb314, 0x77c1, 0xffffa6dc, - 0x73d6, 0xffffbbbb, 0xfffffbf9, 0xffffcf13, 0xffffd10c, 0x8c3e, 0x5f5c, 0x4af5, - 0xffffd141, 0xffffd407, 0xffffc119, 0xffff86b0, 0xffffb16c, 0xfffff4f1, 0x404a, 0x6bab, - 0xffff9021, 0xffffd5f5, 0xffff87b0, 0xfffffb85, 0xffffbc33, 0x3ef, 0x16dd, 0xfffffc0a, - 0x346, 0xf7b, 0xffffb212, 0xffffe5b9, 0x1c45, 0x5a37, 0xffff8f95, 0xffffccda, - 0x11d2, 0xffff74a0, 0x52c1, 0xfffff70b, 0xffff90dd, 0x5ab1, 0x3ecb, 0x70d0, - 0x8ac4, 0xedb, 0x1091, 0xffff874d, 0xffffdce4, 0x4603, 0x157f, 0x4db, - 0xffffb596, 0x5604, 0xffff7a31, 0xffffe7e6, 0x3bc2, 0x1ec0, 0x861, 0xffffbb57, - 0xfffff94b, 0xffff9fb4, 0xffffea52, 0xfffff479, 0xffff9909, 0xffffa95f, 0xffffa074, 0x8889, - 0x198b, 0x56f4, 0x3423, 0x8241, 0xffffe3ff, 0xffff881a, 0x4e97, 0xffffcf1b, - 0xffffa603, 0x3957, 0xfffff6d5, 0xfffff0b2, 0x8464, 0x1f13, 0xffffe04e, 0x3ed2, - 0x1636, 0x19df, 0xffff9d9c, 0xffffb4af, 0xffff764e, 0x787f, 0x42a6, 0xffffda01, - 0x5a29, 0x8d78, 0x5fae, 0xffffe92e, 0xfffff130, 0x7c51, 0xffffbf50, 0xffffb867, - 0x2ddf, 0xffffb349, 0xffffd0e9, 0x6b0b, 0x6d50, 0xffffd468, 0xffffa3b0, 0xffff97d8, - 0x1960, 0xffffdbbb, 0xffffa4af, 0xffffbd37, 0x2ef3, 0x2437, 0xffffd17e, 0x13e5, - 0x54e0, 0xffffc59f, 0x22bb, 0xffff780f, 0x6239, 0xffff7d96, 0xffffda9d, 0x6e34, - 0xfffface6, 0x295a, 0x2719, 0xffffda03, 0xffffabc0, 0x23a3, 0x1cf2, 0xffffaa50, - 0xfffff1aa, 0x6565, 0x75b1, 0xffffc795, 0xffffb3d6, 0xffffac07, 0xffff8ab8, 0xffffe135, - 0x6be2, 0xffff9a21, 0x66be, 0x1ede, 0xffff9b45, 0xffffddb2, 0x19d9, 0xffff9a42, - 0x1470, 0xfffffd5c, 0x1e7e, 0x6407, 0x6ab4, 0x9cd, 0x1ce7, 0x7246, - 0xffffcc0e, 0x334a, 0x8d32, 0xffffdd26, 0xffff876d, 0x5f42, 0xffffce4d, 0x746f, - 0x23a2, 0xffffbddd, 0x1b98, 0xffffc9e3, 0xffff921c, 0xffffb30e, 0x3477, 0xffffa587, - 0x4067, 0x18a0, 0x361e, 0xffd, 0xffff880f, 0xffffef9a, 0xffffce51, 0x3ed, - 0x139b, 0x4957, 0xffffc1b0, 0x5718, 0x4e72, 0x898c, 0x1e76, 0xfffffc63, - 0x5a7e, 0x3388, 0xffff8b15, 0x8c3, 0x42ed, 0xffff9b9a, 0x1fff, 0xfffff544, - 0x66a4, 0xffff7c9f, 0xf3d, 0x8823, 0xffffab00, 0x8d96, 0xffff9a08, 0x16d3, - 0x55a3, 0xffffc3a3, 0x5f6e, 0xffffa6c2, 0xffff982e, 0xffffe233, 0x3b85, 0x4b3b, - 0xfffff53f, 0x31d2, 0x58f0, 0x8345, 0xffffb052, 0x8516, 0x1013, 0x3e91, - 0xffffdf3d, 0xffffb256, 0xffff8937, 0x7307, 0x6544, 0xffff9898, 0x26fc, 0x7aaa, - 0x5d8c, 0x45c4, 0x8168, 0xffffe0d2, 0xffffa15f, 0xffff8c32, 0x23e2, 0x2f6d, - 0x4e73, 0x5b19, 0xfffff7a0, 0x1530, 0x8a57, 0x5994, 0x7668, 0x8658, - 0x7810, 0x5ae5, 0xffffdd59, 0xffffe2e3, 0x6ade, 0xffff84ab, 0x2286, 0x3324, - 0x34d6, 0x6fa3, 0xffff9c8c, 0x1649, 0xffff9152, 0xffffde80, 0x140c, 0xffffe31f, - 0xffffab3a, 0x85b6, 0x870d, 0x21cd, 0x33ee, 0xffff8aa8, 0xffffcb20, 0x584, - 0xffffcdb5, 0x4b6c, 0x4b54, 0x559c, 0xffffc9b9, 0xffffc227, 0xffff93ec, 0xffffaf9c, - 0x2314, 0x4cd1, 0xffff9b8a, 0xffffa7f7, 0xffffe946, 0x6412, 0x8698, 0xfffff049, - 0xffffe24f, 0xffffbc02, 0xfffff5dc, 0x248b, 0xffffa1a1, 0xfffff591, 0x17f8, 0x7c7f, - 0x2a38, 0xffffc4b7, 0x50f4, 0x4567, 0xffffe9b3, 0x1139, 0xffffdc63, 0xffffaf43, - 0xffff921e, 0x38b5, 0x6f7c, 0x7e35, 0x4cb7, 0xffffdbdb, 0xfffffc86, 0x14e0, - 0xffffb500, 0xffff8fd7, 0xffffc44e, 0xffffe8ae, 0x615, 0x73de, 0x513c, 0xffff8c2d, - 0xffffa65e, 0x733b, 0xffffaa1a, 0xffff9823, 0x390f, 0x81e5, 0x6388, 0x2547, - 0x618c, 0xffffc2b5, 0xfe5, 0x61cf, 0xffff8162, 0xffff8c51, 0x8872, 0x5eae, - 0x5a61, 0xffffab35, 0xffff790b, 0xffff894f, 0xffff7e7f, 0x2ef3, 0xffffa954, 0xffff94a3, - 0xffffec89, 0xffffe3e7, 0x886c, 0xffff9f5c, 0x6429, 0x5828, 0xffffb33b, 0x38d4, - 0x3fb6, 0xffffe5df, 0x5e4, 0xffffa316, 0xffffdea1, 0xffffefe5, 0xbb0, 0xf7c, - 0xfffff415, 0x7f2, 0xfffff4ab, 0x8d31, 0xffffb9b1, 0xffffbbdd, 0xffffc868, 0xfffff245, - 0xffff91ae, 0x62db, 0xffffd076, 0xffffc4c5, 0x5575, 0x43af, 0xffffe6f3, 0x7cc1, - 0x6c8b, 0xffffb56c, 0xffffe101, 0xfffffe07, 0xffff8a88, 0xffff9931, 0xfffff933, 0xffffd4bd, - 0x355e, 0xffffd3df, 0x1e2d, 0x5b90, 0x6ce5, 0xffffff81, 0x5d0e, 0x514b, - 0xffffa086, 0x1caf, 0x300d, 0xffffc1e2, 0x357c, 0x2820, 0x4be, 0xffff9c0b, - 0x2e68, 0xffffb03b, 0x8ab1, 0x2aed, 0x3cc8, 0xffffa250, 0xffffca57, 0xffff8fe0, - 0xffffbc0e, 0xffffa87c, 0x3681, 0xffffff03, 0x6f96, 0xfffff6e8, 0x3818, 0xffff91eb, - 0x460a, 0xffffc57c, 0x23bf, 0xffffa010, 0x6ae0, 0x38fa, 0x6c95, 0xffffe509, - 0x2594, 0xffff892e, 0xffffd6fd, 0x4dbf, 0xffff7bca, 0x595b, 0x5265, 0xffff722c, - 0xffff9bbe, 0x6f1b, 0xffffa0d6, 0xffffb61d, 0xfffff32c, 0xac6, 0xffff8448, 0x37b3, - 0xffffb59c, 0x6132, 0xffff820a, 0xffffb87e, 0x7e80, 0xffffddb7, 0xffff84db, 0xffff868b, - 0x1498, 0x5ece, 0x4761, 0xffffbe71, 0xffff7b6f, 0x2492, 0x6b0e, 0xfffffcba, - 0xa45, 0xd5d, 0x361d, 0xf45, 0x82fe, 0xffffd7cf, 0xffffc64e, 0xffff8ad6, - 0xffffb43b, 0xfffff00e, 0xffff7b5b, 0xffff9858, 0x3756, 0xffffe97b, 0x6167, 0x52b9, - 0xfffffc14, 0x4bf6, 0x2c11, 0x5c7b, 0x75fc, 0xfffff1b7, 0x47f4, 0xffffc8ca, - 0x5fbc, 0xc3f, 0xffff9e06, 0xffffb109, 0xffff791e, 0x6661, 0x8942, 0xffff92b4, - 0xd4f, 0x15a8, 0x625d, 0x3878, 0xffff9a70, 0x636b, 0xffffad1a, 0xfffffc36, - 0x1abe, 0xfffff303, 0x4b0a, 0xffffe7cc, 0xffff904c, 0xffffe288, 0x5acd, 0xfffff71e, - 0x3252, 0xce1, 0x2db2, 0xffffc97a, 0xfffff8e7, 0xffffbb28, 0x7a7d, 0x6ed5, - 0xffffae7d, 0x8dbe, 0xffff744e, 0xffff8e03, 0x6cb, 0x86a7, 0xffffdc22, 0xffffd8fb, - 0xffffd18d, 0x4626, 0x8c87, 0xffffc3ae, 0xffffb882, 0x689a, 0x3791, 0xffffc0a0, - 0x7223, 0x3c, 0x8fe, 0xffff9ecf, 0xffffd89a, 0xffff7e2d, 0xffffa145, 0x56e7, - 0xfffffb34, 0x480c, 0xffffb7b6, 0x4d54, 0xffffc5f6, 0xffffde25, 0x4d3e, 0x7302, - 0xffffdb67, 0x4fb7, 0xfffffb02, 0x8765, 0xffffab7b, 0xda7, 0xffffb04f, 0xffffc9e5, - 0x15b6, 0x2718, 0xffffc98c, 0xffffe2eb, 0x8011, 0x8b74, 0x7aa7, 0xa1a, - 0x5d48, 0xffff9ffa, 0x1d7, 0xffffef63, 0xffff9746, 0x7c5b, 0xffff816e, 0x6c68, - 0x156f, 0x85b8, 0x16bc, 0xffffc689, 0xffff8006, 0xffffe2ec, 0xfffff102, 0xffffeb7d, - 0x8956, 0xfffff640, 0x4713, 0x7bad, 0x41bb, 0xffff9f79, 0x3691, 0xffff7b9d, - 0x7ca6, 0x5c98, 0x81e4, 0xffff9084, 0x7825, 0x543a, 0xffff8b4b, 0xffffd2f9, - 0xffff7f0a, 0xffff7655, 0x665e, 0xffffd3df, 0xffff8b05, 0x2da3, 0x2c10, 0x4dcf, - 0x23e0, 0x4e27, 0x5fb6, 0x82f3, 0xffffe5cb, 0x6d98, 0xffff9691, 0xa4a, - 0x3f51, 0x2573, 0x894c, 0xffff8107, 0x5091, 0xffffe034, 0x83db, 0x2029, - 0xffff8d63, 0x6ee6, 0xffff92d2, 0xfffffe7e, 0x5f72, 0x6704, 0xffffd1f6, 0x4d40, - 0xffffb1f6, 0x2766, 0x4b84, 0x7e47, 0x728a, 0x51f7, 0xffff9a48, 0x1149, - 0xffffc964, 0x456f, 0xffffa797, 0x6112, 0xffff7e4c, 0xffffea92, 0x8a8b, 0xffffc9bf, - 0xffffbc0c, 0x6591, 0xffffd69c, 0xffffe54f, 0xffff7adb, 0x581b, 0xffffad1f, 0xffff9607, - 0x3e51, 0xffffe644, 0x80a4, 0x272e, 0xffffd8d5, 0x4c15, 0x639a, 0x7345, - 0xffff7d10, 0x1f97, 0xffffe213, 0xffffcd19, 0xffffb907, 0x7196, 0x348c, 0xffffcd02, - 0xffffc4b0, 0xfffff3d3, 0x56d5, 0xffff7712, 0x2415, 0x19c9, 0xffffaa34, 0x5be0, - 0xffffbe3d, 0x3edb, 0xffff7ba6, 0xffff8704, 0xffff9b22, 0xffff7398, 0x1ad2, 0x2b12, - 0xfffffa9e, 0x82a0, 0x289f, 0x20c1, 0xffffa302, 0xffff8bac, 0x5528, 0x5b36, - 0xffff9f0e, 0x300, 0x76ab, 0xe31, 0x54dc, 0x14c2, 0xfffff3f7, 0xffff9727, - 0xffffb8a1, 0xfffffd6c, 0x668c, 0x12ce, 0x5e2b, 0x837f, 0x79d9, 0xffff9f2c, - 0xffffe8c0, 0x5569, 0xffffa931, 0xffff9828, 0x5447, 0xe70, 0xffffc612, 0xffffbdc8, - 0xffff8100, 0xffff948f, 0xffffd762, 0x165, 0x7caf, 0xffffe5ba, 0xffffd76a, 0x1b3f, - 0xffffbace, 0x75b9, 0x266, 0x3be3, 0xffffb139, 0xffffdf94, 0x2528, 0xffff85e5, - 0x63ec, 0xffffea79, 0x784, 0x12c5, 0xffffcf6d, 0xffff941e, 0xffffd6c0, 0xffffe17c, - 0xffffde73, 0x317d, 0xffff7430, 0x2eea, 0x2d4d, 0xffff7937, 0xfffffb7c, 0xffff802d, - 0xffff902a, 0xfffff7d6, 0xffffbdb7, 0xffffdf44, 0xffffd10a, 0xffffc6a9, 0x36fe, 0xffffc98c, - 0xffff732c, 0xffffe42e, 0xffffd1e4, 0x6c5e, 0xffffa8ab, 0x7624, 0xffffdd12, 0xffffaf68, - 0x4d98, 0x5f15, 0x865d, 0xffff8d23, 0x5266, 0x276c, 0x295e, 0x1d29, - 0x5e0b, 0x772f, 0x2942, 0x459e, 0xffffe4eb, 0xffff73dd, 0xffffd004, 0xffff886f, - 0xffffcaf9, 0x18e0, 0xc66, 0xffffd08d, 0xffff7a9f, 0xffffd290, 0x88d8, 0xffff7c4b, - 0xffff86dd, 0xe4c, 0x15ef, 0xffff99f5, 0xffffde0e, 0x44db, 0x6855, 0x29de, - 0x3458, 0xffffc7a8, 0xffffdc32, 0xffffb3ec, 0x6e1b, 0xffff8dfd, 0x86a6, 0x685d, - 0xffffee8d, 0xffff92e9, 0xffffc182, 0xfffff271, 0x39d5, 0xffff86a2, 0xffff7472, 0xffffecba, - 0xffffd44d, 0xffff7fef, 0xffffd860, 0xffffeb6d, 0x3822, 0xffff91b2, 0xffffe1ea, 0x657f, - 0xffff98be, 0x7c56, 0xffffe379, 0x1286, 0xfffff440, 0xffffefd4, 0xffffc00c, 0xffffef9d, - 0xffffbb0a, 0xffffe423, 0x717a, 0xffff8177, 0xffffc56c, 0xffff87c0, 0x389, 0xffffbd6f, - 0x6a85, 0x6072, 0xffff8991, 0x6768, 0xffffb310, 0x55a0, 0x3566, 0xffffa763, - 0x6ad8, 0xffffecf0, 0x6e47, 0x460f, 0xffff74c3, 0xffffa827, 0xffff8ed2, 0x63a8, - 0x6785, 0xffff9ab6, 0x8721, 0xffffb48d, 0xffff8e1d, 0x1b24, 0x4cad, 0x32a8, - 0xffffa063, 0x3cc6, 0x3f51, 0x27c7, 0x32e2, 0xffff9cf7, 0xffffeca9, 0x6a39, - 0x58fa, 0x305d, 0xffffb237, 0xffff8301, 0x2b29, 0x4d40, 0xbfb, 0xffffea6f, - 0x15a1, 0xffffcc4f, 0xffffc735, 0xffffdaca, 0x26e5, 0xffff9e2f, 0xffffc05a, 0xffff8cf2, - 0x7a37, 0x4531, 0xfffffa02, 0xffffb210, 0x8633, 0x4f0f, 0x754, 0xffffed54, - 0xffff8740, 0x59d2, 0xffff767e, 0xffff855a, 0x3d85, 0x71b9, 0x72cd, 0x4d3b, - 0x78a1, 0xffffa6c1, 0x6c3e, 0xffff9317, 0x2926, 0x119a, 0x44d2, 0xffffb033, - 0xffff935e, 0xffffc224, 0x4ba1, 0xffffdba2, 0xffffb9b7, 0x17e4, 0xffff8b75, 0x2f37, - 0xffff73b2, 0xffffcc5c, 0xffff88bc, 0x213a, 0x47b0, 0x13d5, 0x3ca1, 0x51a7, - 0x2e56, 0xffffc38a, 0x7f7a, 0xffffe80b, 0xffff8832, 0x7270, 0xffff8f10, 0xffff7ca1, - 0x6c56, 0x8390, 0xffffb0bf, 0xffff9200, 0x6bbb, 0x46c8, 0xfffff4db, 0x2ab3, - 0xffffa2c1, 0x7288, 0xfffff4a6, 0x5ec3, 0x7c3, 0xffff81af, 0x3cc2, 0x28f7, - 0x4a58, 0xfffff026, 0x7ff0, 0xfffffc62, 0xffff9148, 0xd8f, 0x185, 0x59f4, - 0x1caa, 0x39dd, 0x3787, 0x4a31, 0xffffed74, 0x4336, 0xffffa9ea, 0x4646, - 0xffffd6f7, 0x175a, 0xffffe833, 0xffff95e8, 0xffff79ef, 0x7509, 0x68b8, 0x5445, - 0xffffe6a9, 0x49e4, 0xee4, 0x5e83, 0xffff9812, 0xffff9b80, 0xffffcd5b, 0xffff905e, - 0x6959, 0x38cf, 0xffffbce0, 0x758b, 0x3d88, 0xffffc47d, 0xffff86ca, 0x1c6a, - 0x10f2, 0x2934, 0xffffeb47, 0xffffa621, 0xfffff453, 0x8822, 0xffffd84d, 0x88a8, - 0xffff7738, 0x2211, 0x278b, 0xffffb4fd, 0x4a25, 0x24a1, 0xffff9982, 0x4316, - 0x1f4, 0xffffec51, 0xffffaf4d, 0xfffff10f, 0x452d, 0xffffed98, 0xffff89e2, 0xffff9770, - 0xffff7393, 0x2e9a, 0xffffa805, 0x870c, 0xffffb79d, 0xffffdcb9, 0x190f, 0xffffaf36, - 0xffffae0b, 0x35a8, 0xffffcb81, 0x49b6, 0x5b81, 0xffffad9f, 0x4b00, 0x59f6, - 0xbcf, 0x2bf6, 0xffff83b9, 0x56a, 0x478b, 0xfffff9a6, 0xffffefb1, 0xd52, - 0xffff977e, 0xfffffde7, 0x2281, 0x486b, 0xffff7a45, 0x38, 0xffffa31e, 0x545b, - 0x5f67, 0x759e, 0x7227, 0x4710, 0xffffda15, 0xffffde83, 0xffffb16f, 0x445a, - 0xffffb2a9, 0xffffe77a, 0x8ff, 0x136f, 0xffffaa07, 0xffff739c, 0x16f8, 0xffffd05a, - 0x1bc1, 0xffffbd49, 0x6534, 0xffff8187, 0x30d6, 0xffff7c5a, 0x8038, 0xffffc927, - 0x81d3, 0x6e7, 0x7d71, 0x5eed, 0x2dbc, 0x7779, 0x49d9, 0xffffa59c, - 0xffff7c2e, 0xffff7a46, 0x1461, 0xffffcbc6, 0x47cd, 0x6df4, 0xffff9c8b, 0xffffba56, - 0xffffc1aa, 0xffffe2c4, 0xffffb8b3, 0x354f, 0xffffba6f, 0x7e32, 0x88d2, 0x1dda, - 0x65c3, 0xffff7a23, 0xffffa941, 0x772d, 0xffffa8e4, 0x6cac, 0x6006, 0xffff8cc0, - 0x2c22, 0xffff8f93, 0xffffd510, 0x4ac1, 0xffffcac2, 0xffffbfc5, 0xffff772e, 0xffffd90e, - 0xffffc04b, 0x1858, 0xffffdb53, 0x4730, 0xffff87ca, 0xfffff776, 0xb2b, 0x5f04, - 0xffff7deb, 0xffffafc4, 0x273c, 0xffffa9ad, 0x2f96, 0x1df3, 0xffff99ab, 0x3ccb, - 0x8cb2, 0x69c, 0xffffb855, 0xffffa904, 0x8a40, 0x1b30, 0xffffbfe7, 0x8a23, - 0x70f8, 0x57da, 0xffff75fe, 0x2214, 0x2be1, 0xffff990b, 0xffff9394, 0xffffe908, - 0xffffb2c4, 0xffffa067, 0xfffff7c6, 0xffff97cd, 0xffff7498, 0x3af8, 0x1241, 0x10e3, - 0xffffa621, 0xfffff296, 0x698e, 0xffffa28b, 0xffff9084, 0x12cf, 0xffffb1f9, 0x4359, - 0x336c, 0xffffcf1e, 0xffffa763, 0x80bf, 0x4019, 0x47d5, 0xffffec7a, 0xffff83f6, - 0xffffd75a, 0xffffb050, 0xffff9104, 0xfffffb14, 0xffffd821, 0xffff8b8d, 0xffffb3fd, 0xffffebb6, - 0x124e, 0xffffd263, 0xffff7eab, 0xb78, 0xffffb115, 0xffffa4e5, 0xffffe296, 0x1f8, - 0xffffdd28, 0x3378, 0xffff9498, 0x3617, 0xffffb7c3, 0xffffe507, 0xffffe6ae, 0x47b2, - 0x18a5, 0xffff77c3, 0xffffa734, 0xffffc105, 0xffff8925, 0x7add, 0xfffffab0, 0xffffe3ec, - 0x39d4, 0x74ba, 0x56ea, 0xffffebec, 0xffff8e36, 0x3b63, 0x931, 0xfffff745, - 0x81c5, 0x368d, 0xffffbca4, 0xffff80b1, 0xffffe01f, 0xfffff52c, 0xffffacf4, 0x486f, - 0xffffc5e0, 0xfffffaae, 0x10d4, 0x5ea8, 0x4832, 0x38b4, 0x6894, 0x6002, - 0xffffdf3b, 0xffffa4a1, 0xffffe890, 0xffffb7b1, 0x3fee, 0x3c88, 0x1b52, 0xffff8883, - 0x1f6c, 0xfffff5ac, 0xffffc0cb, 0xac9, 0xcd4, 0x14f7, 0xffffa823, 0x21e2, - 0xffff8831, 0x5526, 0xffffc6a1, 0x4551, 0xffffa492, 0xffff9837, 0xffffa222, 0xffffde9d, - 0x1efc, 0xffffec4e, 0xffffd75b, 0x3268, 0xffffc8d6, 0xffff7a3f, 0x4c9b, 0xffff86a0, - 0x45e3, 0xffffddfb, 0xffff806b, 0x7aef, 0xffffcfa4, 0x30ef, 0x7f2b, 0xffffa3bf, - 0x46d7, 0xfffff316, 0x3720, 0x6dd9, 0xffffdb02, 0xffffbc61, 0xffffdd72, 0x81b9, - 0x1bf4, 0xffffb670, 0xffffcd6c, 0x37d8, 0xffffbd23, 0x4df6, 0xfffff2eb, 0xfffff687, - 0x8b59, 0xffff909b, 0x34cd, 0xffffc786, 0x143b, 0x8570, 0xffffc38e, 0x965, - 0xffffd3a1, 0xffffac12, 0xffffbb63, 0xffffe93f, 0x12d2, 0xffffe053, 0x3b2b, 0x4bcd, - 0x52f2, 0xfffff538, 0xffffb301, 0xf71, 0xffffb774, 0xffffd5ba, 0xffffbe11, 0x1121, - 0xffffa83d, 0x1a5a, 0x1ce, 0x8a49, 0xffffccb0, 0x82d2, 0xffffb440, 0xffff8a82, - 0xffff91fe, 0xffff8bad, 0x3e1d, 0x5005, 0xffffb167, 0xffff8f02, 0x1a0b, 0xffffc6d1, - 0x6303, 0xffffb2fe, 0xffffae6b, 0x507c, 0xffff907f, 0xffffeecd, 0xffff801b, 0x7b03, - 0xffffe69a, 0xffff8454, 0xffff8110, 0x2195, 0x60df, 0xffffe944, 0xffff7ac8, 0x21d, - 0x798, 0xffffed4d, 0xffff78b9, 0x36fa, 0xffff7616, 0xffffbf0e, 0x32c0, 0xffffcc92, - 0x294d, 0x819b, 0x2413, 0xffffaa63, 0x7ae7, 0xffff72bb, 0x6505, 0xfffff0e8, - 0x7b0f, 0xffff7b00, 0xffff8a4b, 0xffff8f23, 0x2336, 0xffffe49d, 0xffff9a9c, 0x478d, - 0xffffc085, 0x6059, 0xffffd216, 0xffff9e9b, 0x5e49, 0xffff7f3e, 0x6038, 0x6ad9, - 0xffffc10b, 0xffffd364, 0xffff7ecc, 0x6fef, 0xffff7809, 0xffffc298, 0x835f, 0xffffb70d, - 0xffffbc76, 0xffffc2fa, 0x1779, 0x247d, 0xffffdbe8, 0xffffb8de, 0xffffb96f, 0xffff81ff, - 0xffffbea1, 0xffffa830, 0xffff7fcd, 0xfffff310, 0x51fe, 0x65dd, 0xffff9f9f, 0xffffc799, - 0xffff8390, 0xffffd9da, 0xffffbb03, 0xffffb886, 0x6e67, 0x5799, 0x677b, 0x45ad, - 0xffff934b, 0x70b5, 0x44d0, 0x2f7e, 0xffff7568, 0x15b2, 0xffffbb0d, 0x7bf6, - 0x2605, 0x2b90, 0x4916, 0xffff9cd0, 0xffffaef8, 0xffffe9ab, 0x7fbe, 0xffffac1a, - 0x846, 0xffffc2d1, 0xffffbfba, 0x7699, 0xffffbfb5, 0xffffdef6, 0xffffbfed, 0x2d29, - 0xffffee6e, 0xffffb0c7, 0x8879, 0x8584, 0x3415, 0xffffc2e9, 0xffffc15a, 0xffffa8c4, - 0x3d0c, 0x31ab, 0xffffc3e1, 0xffff8bd4, 0x2ce5, 0x409c, 0x4243, 0xfffff9ce, - 0xffffecff, 0x27c6, 0xffffcddf, 0x6137, 0xffff96f2, 0xffff8d64, 0xffff9537, 0x8566, - 0xffffdf03, 0x6ef9, 0x7ada, 0x1413, 0x46e4, 0xfd7, 0x2c50, 0x7295, - 0xffff8827, 0x8938, 0x3392, 0xffffe413, 0x6e09, 0xffff811b, 0xffffba76, 0xffffc622, - 0x4554, 0xffffba5e, 0x6476, 0xffffb6f3, 0x2589, 0xffffcb99, 0x121a, 0x7e6d, - 0xffffd01a, 0x5bb5, 0xfffff271, 0x5031, 0x528d, 0x63f7, 0x7e28, 0xffffec61, - 0x18e, 0x1915, 0xffffaa49, 0xfffffd82, 0x6e94, 0x80c3, 0xfffff9b9, 0xffff9231, - 0x2b46, 0xffffb3c1, 0x8ef, 0x220e, 0xffffa349, 0x3649, 0x8397, 0xffff981d, - 0x6ad9, 0xffffaee7, 0x1fa9, 0xffffab33, 0x1e07, 0x7698, 0x7732, 0xffffe853, - 0xffff7232, 0x4f9f, 0xffffcbbf, 0xffff7feb, 0x68ce, 0xffffbdf9, 0x17d4, 0x2ee8, - 0x12c4, 0x8112, 0xffffb67d, 0x4914, 0xffffd9a2, 0xffff9e22, 0x74c8, 0xffffd9d8, - 0x5ed2, 0xc27, 0x3957, 0x39ca, 0xffffae61, 0x4edd, 0x15d8, 0x50b9, - 0x5077, 0xffff9787, 0x421a, 0xffff7ec0, 0xffffb93c, 0xffff922c, 0x867f, 0x855c, - 0xffff91fc, 0xffff8bc5, 0xffff8a93, 0x3e3f, 0xffff7c92, 0x772f, 0xffffaedc, 0x474e, - 0xffffb582, 0x135b, 0xffffb468, 0xfffff11d, 0x6298, 0x43bd, 0xffff9698, 0x43e1, - 0xffffc5a7, 0xfffffed5, 0xffffd9be, 0x4176, 0x322d, 0x6eef, 0xffffbdda, 0xffffce75, - 0xffff990d, 0x1857, 0xffffe0bc, 0x639e, 0xffffb5de, 0xfffffa1b, 0x70c8, 0x3404, - 0xffffd256, 0xffffd016, 0x7b8b, 0x69ad, 0x843c, 0xffffe02d, 0xffff7409, 0x4bc2, - 0xffffa87d, 0xffff7408, 0xffffd4d3, 0x27a2, 0xffff74a7, 0xffffc225, 0xffffc7a1, 0xffffcaa1, - 0x3a52, 0x2fe3, 0x36c3, 0x4f3c, 0xffffb5b5, 0x1ec0, 0xffffac64, 0x5f2c, - 0x1f24, 0xffff9dbf, 0x482e, 0x384b, 0xffffb6ca, 0x1acf, 0x66d6, 0x2652, - 0xffffd61d, 0xffff88fc, 0xffff7bed, 0x1862, 0xffffcf25, 0xffffb8e2, 0xffff9823, 0x526f, - 0xffff8e92, 0x6309, 0x4888, 0xffffe6f9, 0x631, 0xffffd94a, 0x1cd3, 0xffffa01b, - 0x43d8, 0x2793, 0x6557, 0x794b, 0x1383, 0x269, 0x1240, 0xffffe15c, - 0x69c5, 0xffffe7b1, 0x8d62, 0x2ecc, 0x7ab3, 0xffff7c8a, 0xffff7d9c, 0x7270, - 0x5c06, 0x7667, 0x1006, 0x7c60, 0x53af, 0xffff8990, 0x4bf4, 0x7183, - 0x2675, 0x30f1, 0x2478, 0x6124, 0xffff8265, 0x116e, 0xffffab22, 0xffffda7e, - 0xffff8517, 0x89fc, 0xffff7a6e, 0xffffb9f7, 0xffffd29e, 0xffffa22b, 0x461, 0xffff8708, - 0x1bcb, 0x7e6d, 0xffffc54a, 0x5d4d, 0x88a1, 0xffffdf3b, 0x1d91, 0x12b6, - 0xffffeb16, 0xffffe8ea, 0x30f0, 0xffff7427, 0xffff7d09, 0xfffff64e, 0xffff8896, 0xffffa354, - 0xfffff72e, 0xffff81d9, 0xffff996c, 0xffff74a4, 0xffffc3cf, 0xfffff2d2, 0xffffbf2c, 0xffff741d, - 0xffffd89c, 0xffffc38a, 0xffffde7d, 0x5f1c, 0xffffb1bb, 0xffffa21f, 0xffffb38e, 0x8236, - 0xfffff3ed, 0xffffce5d, 0x585e, 0xffffbe23, 0xffff8372, 0xffffaf4d, 0x3fcf, 0x3927, - 0x5dda, 0xffffa074, 0xf76, 0x6969, 0x4196, 0x875e, 0xffffb681, 0x35bc, - 0xffffbf70, 0x15af, 0xfffff405, 0x8b2a, 0x6d4c, 0x218d, 0x89bc, 0xffff9efe, - 0xffffc56b, 0xffff942b, 0xffff8aa0, 0x4739, 0x6f8f, 0xffff8a85, 0x6c68, 0xffff958c, - 0xffff9507, 0xffff9771, 0x3fb7, 0xffff8354, 0x6186, 0xffff90d7, 0x1520, 0xffffe018, - 0x3b58, 0x411d, 0xffffdc5f, 0x1ecd, 0xc86, 0xffffa92a, 0xffffeaa6, 0x73a, - 0x3def, 0x58de, 0x4933, 0x675d, 0x5e3, 0x25e2, 0x3eb, 0x714d, - 0xa3a, 0xffff8420, 0xffffcb78, 0xffff887a, 0xffff7747, 0xffffff76, 0x280b, 0x2abd, - 0xffffbdcd, 0x7dc1, 0xffffac20, 0xffffc30a, 0xffff7238, 0x27f3, 0xffffce4b, 0x398d, - 0x4244, 0x3750, 0xffffc875, 0xffffc657, 0xffff9c8c, 0x3779, 0x55ce, 0x49d2, - 0xfffff9b4, 0xffffd3a7, 0xffffade9, 0x3b41, 0x681f, 0xffff8812, 0xffff7a5a, 0xffffc989, - 0x49e6, 0x3783, 0xffffb5f4, 0x70ba, 0xffffbf48, 0x8933, 0x3314, 0x2047, - 0x111e, 0xffffd1e0, 0xffffea38, 0xffff779e, 0xffffabe9, 0xffffe109, 0xffff9c1c, 0x3fdd, - 0x157b, 0x2726, 0x480, 0xffff7635, 0xffffb05d, 0xffff82de, 0xcec, 0xfffff7d9, - 0xffffb171, 0x45f9, 0x8a9f, 0x1d04, 0x1b06, 0x80b, 0x39a9, 0xfffff58c, - 0x274c, 0x1abd, 0xffff7ae0, 0xffffc2a1, 0xffffce98, 0xffff9427, 0xffffa278, 0xffff8c58, - 0x31d6, 0x6f95, 0xef0, 0xffffd311, 0xffff95a0, 0x7c0b, 0xffffaf59, 0x934, - 0x73b3, 0xffff98df, 0xffffa574, 0x6069, 0xffffead8, 0x671f, 0x5c9f, 0x4354, - 0x23dc, 0x1c3f, 0xffffbc97, 0x22d2, 0xffffdd4e, 0x1239, 0x3af3, 0xffffefad, - 0x6121, 0xffffd1e6, 0x66da, 0xffffcc0a, 0x63ea, 0xfffffc17, 0xffffc2d6, 0xffffa0f2, - 0xffffc2d3, 0xffffa772, 0x4b13, 0xffffcfba, 0xffffee11, 0x6561, 0x38cc, 0xffffabbe, - 0xffffe3f2, 0x4c6b, 0xfffff7ef, 0x6373, 0xffffeed8, 0x34cf, 0x59d9, 0x2699, - 0xffffd7fa, 0xfffffa92, 0xffffac49, 0x62d7, 0x6daa, 0x4ab3, 0xffffaf00, 0xffffce18, - 0xffff7e6c, 0x118, 0x72fe, 0xffff874a, 0x645, 0x2d6f, 0xffffa91f, 0x7443, - 0xffff82ca, 0x553f, 0xffffb391, 0xffff83c6, 0x581a, 0x4124, 0x4d68, 0x5981, - 0x40c2, 0xffff925c, 0x10e3, 0xffff957f, 0x7b13, 0xffff9008, 0x3563, 0xffffb7d3, - 0xffff8c80, 0x8508, 0x8a7e, 0xffffd76b, 0x5321, 0x39bb, 0xffffe271, 0xffffa6fa, - 0x758e, 0x3092, 0xffffd014, 0x2666, 0xffff745f, 0xffffb06f, 0xffff861c, 0xffffe4c9, - 0x306f, 0xffffc98f, 0xffff950b, 0x2139, 0x7698, 0xffff9796, 0x1df5, 0xfffff0f9, - 0x112c, 0x467a, 0x211b, 0x4469, 0x168f, 0x38b7, 0x2007, 0x2908, - 0x24, 0x280e, 0x5051, 0xffffb28f, 0x4c68, 0x836a, 0xffffea37, 0xffff9080, - 0xffff95e1, 0xffffe897, 0xffffcabd, 0xffff87dc, 0x88c2, 0x4507, 0xffff8a98, 0x405f, - 0x52c8, 0xffffc450, 0x204a, 0xffff8690, 0xffffec68, 0x28a5, 0xffffdb3c, 0xffffa42c, - 0x13e2, 0xffffb958, 0x595d, 0x4eae, 0xffff8001, 0xffff7f70, 0x4a8c, 0x748b, - 0xffffb9ea, 0xffff87ba, 0x4a61, 0xa72, 0xfffffc5b, 0xffff9428, 0xfffff71c, 0xffffa0d7, - 0xffffd5c7, 0xffffcd3f, 0xffff77eb, 0xfffff986, 0xffff92c6, 0x57a0, 0xffffe759, 0x815c, - 0xffff8cb3, 0xffffcdc4, 0x6a3f, 0x1a8, 0xffff7840, 0x60bd, 0xffffb606, 0xffff8946, - 0xffffebc2, 0xffffaae5, 0xffffce9d, 0xffffca7c, 0xffff761c, 0x3ffb, 0xffffc9e6, 0xffff94b5, - 0xffff7888, 0x63fc, 0xffff8da1, 0xffffd969, 0x21b0, 0x47be, 0x39e9, 0xffffee2b, - 0xffffbc45, 0x82a2, 0x243d, 0x75bc, 0xffff88cf, 0x8c54, 0xffffb154, 0xffffa214, - 0xffffb8bb, 0x8a04, 0xffff87de, 0x8cd6, 0xffffd8d3, 0xffffc81e, 0xffffdf1c, 0xffffb674, - 0x5782, 0xffffa361, 0xffffcd7b, 0xffffe9d7, 0xffff9bbf, 0xffffcae9, 0xffffeab3, 0xffffd75e, - 0xfffffab2, 0xd68, 0x8288, 0x5177, 0x5f43, 0xffffeebd, 0xffffc78f, 0xffff72d2, - 0x812, 0x752a, 0xffffc8ce, 0xfffff6d2, 0xdb9, 0x6b64, 0x3527, 0xfffff063, - 0x79be, 0x6579, 0xffffe19c, 0x226f, 0xffff9529, 0x1eb8, 0x8747, 0x41e2, - 0xffffde27, 0x46e7, 0x86bf, 0xffffa714, 0xffff93c7, 0xffffe02a, 0xffffc1e6, 0x36de, - 0xffffc76e, 0x43ed, 0x65a, 0x6cf4, 0x57f3, 0x4916, 0xffffecae, 0x7ca7, - 0x5c09, 0x48f0, 0xffffb23e, 0xffffaecc, 0xffffa88b, 0xffff7d10, 0x87c4, 0x669f, - 0x56c2, 0x43d, 0x8c6b, 0xfffff478, 0x87cb, 0xffffd0f4, 0xffffa7a1, 0x25e7, - 0x5a3d, 0x1df, 0xfffff384, 0x3438, 0x1ce8, 0x800, 0xffff8048, 0xffffad8a, - 0xffff9d72, 0xffff73f5, 0x818d, 0x420a, 0xffffae9d, 0xffffc332, 0xffffbe39, 0xffffce52, - 0x5b09, 0xffff8635, 0x1157, 0xffffb3d7, 0x33d1, 0xffff8149, 0xffffbe1d, 0xffffff1d, - 0xe7c, 0xa66, 0xffff8167, 0x191d, 0x1beb, 0xffff82ec, 0xffffa8a3, 0xffff78af, - 0x52ca, 0xffff7862, 0x7c41, 0x8b97, 0xffffbe29, 0xffffcaac, 0x7279, 0x893c, - 0x3b70, 0x7947, 0xffffed3c, 0xffffe6e8, 0x3dcb, 0x1d01, 0x88cf, 0xffffb5ae, - 0xffffa7ef, 0xffffece8, 0xfffffb0a, 0x1c20, 0x3691, 0x4f, 0x40aa, 0xffffebe0, - 0x5fa0, 0x38, 0x44dd, 0xffff8ab5, 0x2c13, 0xffffd8b8, 0xffff9f3d, 0x8815, - 0x8683, 0x6a60, 0x1a12, 0xffffa788, 0x5215, 0xffffcc46, 0xffff75bd, 0xffff8c9d, - 0x2871, 0xffff889e, 0xffff9608, 0x8d91, 0x8c85, 0xffffc2ee, 0x458b, 0x48e7, - 0x1d47, 0xffffe974, 0xffffa020, 0xffffe1fd, 0x6f80, 0x8264, 0x885, 0x4317, - 0xffffd135, 0x89c9, 0xffffb412, 0xffff7b42, 0x5b21, 0x5a98, 0xffffbc39, 0x16c0, - 0xffff7c6e, 0x286b, 0x1996, 0xffffd5e6, 0x5fb3, 0xffff950f, 0xe62, 0x215d, - 0x2328, 0xffff7dc1, 0xffffacb9, 0x1483, 0x3da9, 0x74e7, 0x410e, 0x8253, - 0x4216, 0x1ff1, 0x4d3a, 0x3771, 0x817a, 0xffff73f2, 0x624e, 0xffffff16, - 0x3dc5, 0x1384, 0x377c, 0xf2, 0x4bf2, 0xffff74f7, 0x3060, 0x728d, - 0x2aee, 0x7273, 0xffff8fbf, 0x1106, 0xffff89df, 0xffffc920, 0x3582, 0x25fd, - 0xffffce73, 0xffffe0f1, 0x6219, 0xffffadc3, 0xfe9, 0xffff837f, 0xffff9048, 0x781f, - 0xffffb93b, 0x189f, 0xfffffb71, 0x16d2, 0xf5e, 0xffffb0bf, 0x62f8, 0x51e2, - 0x2c58, 0x5d59, 0xffffc837, 0x161a, 0xffffa164, 0x39c, 0x10a3, 0xffff79f8, - 0xfffffd31, 0xffffb4e3, 0xffffc92d, 0x6f16, 0xffffab27, 0xfffff0ba, 0x1be7, 0xffffb0a9, - 0xffffe906, 0x3a70, 0xffffaf42, 0x8b55, 0xffffa625, 0xffffca7e, 0xffff7fdb, 0x4078, - 0x5d41, 0x7798, 0xfffff767, 0xffff964e, 0xffffd7df, 0xffffa537, 0x3b4a, 0x35d0, - 0x5ba2, 0xffffd3b1, 0xffffb2e2, 0xffffd0e7, 0x3602, 0x72f1, 0xffff8dcc, 0xffff7ade, - 0xffffb1ee, 0xffffafa9, 0xffffdad2, 0xffffea6a, 0x6667, 0xffff941e, 0xfffff259, 0xfffff365, - 0x15be, 0x1280, 0xfffffcab, 0x8bb6, 0xffffbf10, 0xffffb64d, 0x408f, 0xfffff18a, - 0xffff9956, 0xffffa946, 0x71e3, 0xffffe7e8, 0xffff7ddc, 0xfffff570, 0x1c0f, 0xffffc10d, - 0x6e81, 0x367d, 0x2846, 0x635e, 0xffff74fc, 0x4b36, 0xfffff47b, 0x8b6b, - 0x7d7, 0xffffeb07, 0xfffff577, 0xffffb507, 0x42a5, 0x733c, 0xffffe9a2, 0xffffe885, - 0xfffff77a, 0xd37, 0x5f47, 0xffffc515, 0xfffffd88, 0xffffeb05, 0xffffcb7f, 0xffffa183, - 0x63df, 0x896f, 0x7fd9, 0x5f5, 0xffffc008, 0x29ac, 0x360e, 0x259d, - 0x7d1, 0xfffff226, 0x3d55, 0xffffabfd, 0x54b4, 0x3085, 0x59a1, 0x8a1e, - 0xffff85f4, 0xffffef3e, 0x49e5, 0xffffe51a, 0xfffffe96, 0xffffdea7, 0x328a, 0xffffa638, - 0x4ced, 0xffffb2d8, 0xffffec06, 0x854b, 0x46a, 0xfffff0e7, 0x8922, 0x8266, - 0x280a, 0x68a6, 0x5210, 0x6a2, 0x4142, 0xffffca2d, 0xffff9e3b, 0x5dd5, - 0xffffe648, 0xffffaac4, 0x22d9, 0xfffff89e, 0x4059, 0xffffab1f, 0xffffd230, 0xffff8d23, - 0x6cf, 0x6067, 0xffffed0e, 0xffff74f8, 0x58ee, 0xffff964e, 0xffffe204, 0x5e81, - 0xffff9d1e, 0xffffa77a, 0xffffef8a, 0xffff8f01, 0xffff7694, 0x6c0b, 0x7293, 0x72b2, - 0xffffa48b, 0xffffeb04, 0x1953, 0x1d, 0xffff888f, 0xffff7b0a, 0xffffa134, 0x7fe3, - 0xffffacc2, 0x471, 0x999, 0x4397, 0xfffff6a0, 0x7af2, 0xffffaac9, 0xffffe255, - 0x1170, 0xffffaaec, 0x2b92, 0xffff96a5, 0xffffd8b4, 0x3e4a, 0x44b0, 0xffffefdf, - 0xffffc299, 0xffff7360, 0xffff7ec4, 0x4be8, 0x2e91, 0xffffc8dc, 0xffffb89a, 0xffff8894, - 0xffff9818, 0xffffb4a1, 0x669, 0x892, 0x8c52, 0xffffe05d, 0x6fc3, 0xffff861c, - 0x19f4, 0x876d, 0x2260, 0xffff873f, 0x363e, 0xfffff093, 0x1434, 0x840b, - 0x648b, 0xffff8ebb, 0x1a62, 0x604e, 0x5874, 0x4304, 0x6f7e, 0xffff8c56, - 0x603b, 0xffffbaa1, 0xffffe654, 0xffff7ea9, 0xffff9791, 0xffffc749, 0xffffa7d9, 0x11e6, - 0xffffa58d, 0x6995, 0x4a1c, 0x362e, 0xffff9be4, 0x8266, 0x304, 0xffffbe5c, - 0xffffb4e6, 0xffffa022, 0xffff821f, 0x1170, 0xffff8639, 0xffffcbf0, 0x2364, 0x6c9a, - 0xffff8726, 0xffff9417, 0xffffea48, 0xffffb072, 0x5f33, 0x4896, 0xffff7762, 0x65e9, - 0xfffffd0a, 0x57f, 0x3b2c, 0xffff751d, 0xffff8c1f, 0xffffef92, 0x7117, 0xffffed28, - 0x8b9f, 0x764b, 0xfffff95d, 0xffff8346, 0xffffada7, 0xffffcd90, 0xffffa794, 0x22f6, - 0x5821, 0x2a57, 0xffff7575, 0xffffc0a9, 0xffffc11c, 0xffff954c, 0x921, 0xffffb22e, - 0x6fa4, 0x5f18, 0xffffcc0d, 0xffffd4eb, 0xffff8fd0, 0xffffd740, 0xffffc4d2, 0x5b17, - 0x7391, 0xffffdc3a, 0xffff923d, 0x4572, 0xffffaf19, 0xffffc9fb, 0xd70, 0x4c5d, - 0xffffb57d, 0x7eda, 0x60ce, 0x3db6, 0x6478, 0xffff81ca, 0xffff8e3f, 0xffffae43, - 0x8aad, 0xffff76a0, 0x2d2d, 0xffffc6ed, 0x89c4, 0xfffff0bd, 0xfffff634, 0xffff86cc, - 0x8934, 0x5c28, 0xfffff07a, 0xffffc810, 0xffffc4d5, 0xffff931a, 0x6cc1, 0xffff820d, - 0x4ad9, 0xffffe2ec, 0x5400, 0xffffce27, 0xffffa35b, 0xfffffa9a, 0xffffc984, 0x29db, - 0x198b, 0xb84, 0xffff7987, 0x43fc, 0x475f, 0x432d, 0xffffe7cc, 0xffff9245, - 0xffffef67, 0x60c2, 0xffffa260, 0x3a6a, 0x6739, 0x6685, 0x1b66, 0xa0, - 0xffff76b4, 0x2f5f, 0x8857, 0xffffa00d, 0xffff8549, 0x203e, 0x841f, 0x28a6, - 0x4193, 0xffffa1d6, 0x798f, 0x5d16, 0x279b, 0x9b1, 0xffffd61c, 0xffff9bce, - 0x3ecd, 0xffffc062, 0xffffac02, 0xffffac45, 0x150e, 0x7e22, 0xffffc92e, 0xffffe529, - 0x60da, 0x3950, 0x3d86, 0x1575, 0x182f, 0x7ee7, 0xffff8da9, 0x1a01, - 0x2e85, 0x7cd5, 0xffff8cc0, 0xffff730f, 0xffff8fe1, 0xffffeb15, 0x3bb7, 0x2d60, - 0xfffffaa0, 0xffffbd0f, 0x33b2, 0xffffd0be, 0xffffc2df, 0xffff7f81, 0x6400, 0xffffd43b, - 0xffffc823, 0x418c, 0xd2f, 0xffffa895, 0x8c3c, 0xffffbaeb, 0x7f05, 0xffffa145, - 0x660d, 0xffffa464, 0xfffff7ba, 0x8a12, 0x5b5a, 0xffffc222, 0xffff999e, 0xffffe91a, - 0x1bd9, 0xffffb0f5, 0x8202, 0x7319, 0xffff877a, 0xffff97b7, 0xffffc451, 0xffffa669, - 0x34b1, 0xffffbcda, 0xffffb333, 0x76fa, 0x4fb3, 0x1bfa, 0x8822, 0xffffcd78, - 0xffff7440, 0xfffffb6c, 0xffffb200, 0x4f19, 0x33ed, 0xffffb977, 0x26b, 0xfffff89d, - 0xffffa1de, 0x61ec, 0x1d9c, 0xffff76c0, 0xffffb7c1, 0xfffff027, 0x700c, 0xffff841a, - 0xfffffd62, 0xffff8baf, 0x4562, 0x7eab, 0x2ac8, 0xffffca3d, 0x6a8c, 0xffffc5c5, - 0xffff76cf, 0x454e, 0x44b2, 0x2e49, 0x551c, 0x4b86, 0x734c, 0xffff9db0, - 0x1d8, 0xffff9219, 0xffffe716, 0xffff7e4f, 0xffffcad7, 0x208, 0xffffa001, 0xffffe587, - 0xffffeed7, 0xffffc27b, 0xffffc41d, 0x4531, 0x7ee, 0xffff755f, 0xa10, 0x1d02, - 0xffff75fe, 0xffff9543, 0x237f, 0xffffabf2, 0xd2, 0xae9, 0x2785, 0xffff85c8, - 0xffff9b84, 0xffffc2d6, 0xffffe149, 0x28ae, 0xffff75f9, 0xffff9667, 0x5647, 0x76e9, - 0xfffff7f3, 0xffffa9ae, 0xffffc163, 0xffff8412, 0xfaf, 0x1cde, 0xffff888f, 0xffff7e2f, - 0xffffd400, 0xffff8602, 0x37de, 0xffffb80c, 0xffffd2e9, 0x11ba, 0xffffb448, 0xffff9253, - 0x603a, 0x71c9, 0x4d23, 0x48c7, 0xffffc84d, 0xffffe1fb, 0x47db, 0x1877, - 0x45af, 0xfffff561, 0xffffd599, 0x7c57, 0xffff8cd4, 0xffffbc8b, 0x61db, 0x37a0, - 0x1544, 0xffffca6a, 0x8d85, 0x768f, 0xffff897a, 0xffff923c, 0xffffecde, 0xfffff499, - 0x100c, 0x5097, 0x8dd1, 0x1d2c, 0xffffd766, 0x31a3, 0xffff9f7e, 0x31e8, - 0x2744, 0x8dad, 0xffffd73e, 0x33ab, 0x3fed, 0xfffff38c, 0xffffe07f, 0x7827, - 0xfffffc55, 0x6531, 0x526b, 0x2399, 0x3c8c, 0x4633, 0xffffaafa, 0x11da, - 0xfffffca9, 0xffff7c90, 0x4499, 0x3445, 0x12c4, 0x2210, 0xffffe1e1, 0x431b, - 0x45da, 0xffff72cf, 0xffffdae7, 0x6ee7, 0xffffb843, 0x7930, 0xfffffc7c, 0xffffda3e, - 0xffff89d1, 0x8d06, 0xe73, 0xffff82c9, 0xffffeeb8, 0xffffc7dc, 0x3e13, 0xffff9f2f, - 0xffff7e2a, 0xffff7eaf, 0x6cb0, 0x5077, 0xc26, 0xffff9fcb, 0xffff7e45, 0x1bc3, - 0x6cd7, 0x800e, 0x333f, 0xffffef38, 0x3294, 0x38c5, 0xffff9860, 0x7fe2, - 0x1846, 0xffffc870, 0x8798, 0xffffa794, 0x3433, 0x70a5, 0xffffe031, 0xffffbd5a, - 0x626c, 0xfffff816, 0x7b1, 0x83fc, 0xffff9362, 0x306, 0x7587, 0xffffdb69, - 0xffff89e4, 0x1da2, 0x5532, 0xfffffd49, 0xffffba57, 0xffff8941, 0xc84, 0x6b89, - 0xffffecd4, 0x2578, 0x8a3e, 0xffffbd94, 0xffff8bc6, 0x7a73, 0x5cfc, 0xffffa543, - 0x4605, 0xffffbde5, 0x8cfe, 0x150b, 0xffffd23e, 0xffffa042, 0xffff7b69, 0xfffff168, - 0x1c44, 0xffff72f5, 0xfffff3c2, 0xfffff9ed, 0xffffeca1, 0x2d48, 0xffff9bce, 0x272b, - 0xffffc260, 0xffff929d, 0x3cb9, 0x5c11, 0x5d4, 0xffff8ad7, 0x6aa9, 0xfffffb80, - 0x572b, 0x2cbd, 0x5e8a, 0xffffb586, 0xfffff8e7, 0x6f5b, 0x28ce, 0x11a, - 0x71f5, 0xfffff744, 0x1be2, 0xffff95cd, 0x6cef, 0xffffc7f6, 0x1ac3, 0x8c96, - 0xffff760f, 0xffffa1ba, 0x370, 0x3277, 0xffff817a, 0xffffcee6, 0x195e, 0xffff7ccb, - 0xffffca7b, 0xffff9d90, 0x540e, 0x6725, 0xffff75a3, 0x48a5, 0xffffada6, 0xfffffdad, - 0x32e4, 0x1e1e, 0xffffe0eb, 0xffffed3c, 0xfd, 0xffff9fbf, 0x4878, 0x8dbc, - 0x3ef3, 0xfffffcd0, 0x80e5, 0x77b5, 0x8b4b, 0x7003, 0xffffb759, 0x8938, - 0x4a57, 0xca9, 0x6783, 0x27ee, 0x2c7a, 0xffff8bf7, 0xffffe754, 0x2a23, - 0x60ea, 0xffffc6bc, 0xffffb024, 0x34b2, 0xffffe44f, 0x2f16, 0x3df3, 0x883c, - 0x3eb1, 0xffff81dd, 0x5e00, 0x7ae1, 0x62bc, 0xffffcb8d, 0xffffd0eb, 0x457f, - 0x6bb3, 0x72a2, 0xffffb521, 0xffff7d69, 0xffffd032, 0x4d2, 0xffff9dcb, 0xfffffd7d, - 0x44d, 0x3c01, 0x34ed, 0xfffff07f, 0x74a6, 0x894, 0x524d, 0xdb3, - 0xcb3, 0xffff9661, 0xffff9d9a, 0xffffdae6, 0xffffd8df, 0xffffe241, 0x14a9, 0xffff79ad, - 0x1d71, 0x17e9, 0xffffcee6, 0x58cc, 0xffffa52b, 0x7b08, 0xec7, 0x5a66, - 0xffff7f3c, 0xffffc522, 0x210d, 0x109c, 0x162d, 0x4654, 0xfffffee4, 0x1b68, - 0x7e7b, 0xffffb804, 0xffff9c77, 0xffffa259, 0xfffffcdc, 0xffffb126, 0x6f3e, 0x597e, - 0xffff8c8b, 0xffffb09a, 0x4d39, 0x8bc3, 0x1208, 0x63f, 0x7e6a, 0x3bb1, - 0x8dd9, 0x4cac, 0xffff803c, 0xffff9d29, 0xffffa2d6, 0x1a9a, 0x16fe, 0xffffc6c9, - 0x6ff1, 0xffffb441, 0xffffbdc5, 0xfcd, 0xffffe445, 0xffffa0f3, 0xffffef93, 0xffffdd4e, - 0x3fe8, 0x40a2, 0xffffeac0, 0x6f7d, 0xffff83d1, 0x459e, 0x6eee, 0x7da, - 0xffff9f26, 0xffff9da6, 0xffffb81c, 0x25c8, 0x32a6, 0x2351, 0xffff7450, 0xffff90f0, - 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0xffff8488, 0x773a, 0x6c60, 0xffffa9c9, 0x6d4a, 0xfffffe96, 0xffffe0e0, 0x1bef, - 0xffffde02, 0xaae, 0xffff9a10, 0x557, 0x4da9, 0x867c, 0x1741, 0x42f8, - 0xffffd09b, 0xffffd2d1, 0xffffe212, 0xfffff266, 0x45ed, 0xffffe717, 0x6837, 0x76c1, - 0xfffffef7, 0x5baf, 0xffffbee3, 0xffff830d, 0xffffb4fa, 0x372b, 0xffffb440, 0xffff8e7e, - 0xffffa00d, 0xffffbb90, 0xffff92d7, 0xffffa723, 0xffffe18b, 0xfffffbe0, 0xffffdf88, 0xffff76d1, - 0xffffd2af, 0x3a01, 0x8c46, 0xfffff48e, 0xffff8ada, 0xffffb3f4, 0x46ba, 0xffffa696, - 0x4a04, 0x8cf1, 0x362f, 0xffffc320, 0x73d2, 0xffffa00f, 0xfffff6ad, 0x7269, - 0x695e, 0x4812, 0x3b16, 0x6442, 0xffffa02b, 0xffffc2c0, 0xffffe410, 0xffffb923, - 0x6012, 0xffffdcd3, 0xffffbdfe, 0xffff97be, 0x6ad6, 0xffffe081, 0xffff97e9, 0xffff8adf, - 0xd9e, 0xffff7e8f, 0xffffc9c6, 0x6a7e, 0x53b9, 0xffff7fb5, 0x8314, 0xffff81f5, - 0x1d86, 0x3e5d, 0xfffffd9d, 0x201e, 0xffffde6d, 0x2055, 0x7317, 0x167c, - 0xffffcfa0, 0xffff9bbc, 0xffffa8e0, 0x2d83, 0x5a8d, 0xffffb0bd, 0x3926, 0x669f, - 0x4b9e, 0x6345, 0x2c7, 0xffff91c9, 0xffff745a, 0x5091, 0x56a3, 0x6e45, - 0x31ac, 0xffff9847, 0xffffbb04, 0x617c, 0x1374, 0x8dd7, 0xffffe142, 0xffffeb42, - 0x9d4, 0xffff8b2d, 0x84fc, 0x3b6, 0x604a, 0xffffd453, 0xffffd691, 0xffff7927, - 0xc47, 0x169d, 0x70bb, 0x10d4, 0x6b25, 0xffff8965, 0xffffc874, 0xffff7571, - 0x2165, 0xffffbb50, 0xffff7623, 0xffffab6f, 0xfffff47a, 0xffffb87b, 0x14d1, 0xffffff82, - 0xffffe1b8, 0xf6b, 0xffff74f4, 0xffffefb6, 0xffff88c0, 0x2eec, 0xffffade2, 0xffffdcd2, - 0xffffb1cc, 0x334f, 0xffffc569, 0xffff8414, 0x8070, 0x7bfa, 0x8992, 0xffffcc6d, - 0xffffa65a, 0x251f, 0x8bbf, 0x2463, 0xffff74d2, 0xfffff0cf, 0xffffde9a, 0x4f4a, - 0xffff8446, 0xffffa4e2, 0x808a, 0xfffffadd, 0x723e, 0xffffd82d, 0x1f14, 0x8c71, - 0xffffdc75, 0x6c3c, 0x4435, 0x472f, 0xffff7252, 0x22e5, 0x19c0, 0x88aa, - 0xffffd423, 0xffff8758, 0x2758, 0xffffd33d, 0xffffe1bb, 0x83b3, 0x8535, 0xaa5, - 0x7864, 0x6b59, 0x2ab7, 0x7e5b, 0x6df6, 0x6f3e, 0xffff908a, 0xffffb6d4, - 0x4eca, 0xffffa83f, 0xffffff3f, 0xffff7a6a, 0xffff74aa, 0x37e9, 0xffff8a5e, 0xfffff391, - 0xffffc4c1, 0x36fb, 0x21e2, 0x623d, 0xffff7306, 0xfffff202, 0x39cb, 0xffffcd47, - 0x13b6, 0x630e, 0xffffa3e6, 0xffffeb86, 0x5eb8, 0xffff73c0, 0xfffffa42, 0x49fb, - 0xffffed95, 0x718f, 0xffff7e6a, 0x1914, 0xffffa5e9, 0x8cf1, 0x2ae3, 0xfffff9e8, - 0xffffec23, 0x697d, 0x5ab9, 0x77f0, 0xfffff222, 0x5ff0, 0xffffa34d, 0x82bc, - 0x5950, 0x13c1, 0x5a9b, 0x570c, 0x4992, 0x405c, 0x3ecd, 0xfffff886, - 0x1362, 0x1704, 0xffff87b3, 0xffffe31c, 0x7e6c, 0x27e7, 0x355a, 0xffff84c4, - 0xffffe078, 0xffffc000, 0xffffd37a, 0x2690, 0x130d, 0xffffd22b, 0xffffa6c1, 0x12dd, - 0x36db, 0x5507, 0xffff8c14, 0xffffb616, 0x71ab, 0xffffd884, 0xffff7ed4, 0x1871, - 0x212a, 0xffff8acf, 0x353, 0x3bca, 0x7cfc, 0xffff7a5d, 0x5990, 0x4bb, - 0xffff7606, 0x6328, 0x386, 0xffffd02b, 0xffffe3b6, 0xfffff0bb, 0x4b6f, 0x8dc, - 0xfffff3ea, 0x169c, 0x3ed8, 0xffffa125, 0x3c69, 0xfffffedb, 0x6c9b, 0x17de, - 0xffffb5f8, 0xef6, 0xfffffbc6, 0xffff82b9, 0xffff7a4e, 0x6193, 0x6994, 0xffffe6b5, - 0xffffdb01, 0x5c14, 0x68a8, 0x26a4, 0xffffb021, 0x7bcc, 0xffff9f05, 0x814, - 0x162c, 0xffffb3e7, 0x2c53, 0xffffc8e1, 0x6920, 0xffff7254, 0x6d49, 0xffffb4c2, - 0xffffcaca, 0xffffe1cd, 0xffffd576, 0xffffbad8, 0xffffc4db, 0xffff7f6b, 0x758b, 0x1f19, - 0x4407, 0x3b61, 0xffffa2ea, 0xfffff403, 0x26b, 0x6789, 0x5ca7, 0x3b3, - 0x458b, 0xffffd823, 0xffff83b7, 0x2dc6, 0xffffbd8d, 0xffff7964, 0x77a3, 0x18bd, - 0x7ada, 0xffffc92e, 0x32e2, 0xffffe36a, 0xffff79db, 0x6ca2, 0xffffafdb, 0xffffba78, - 0x23cb, 0xffffc5ad, 0xffffe3f4, 0x89d5, 0x86ee, 0x13ca, 0xfffff25b, 0x3ebb, - 0x680d, 0x628a, 0xffffce21, 0x44c, 0xffff7532, 0xffff72a6, 0xffff88d5, 0x8599, - 0xffffe7cf, 0xffffbeed, 0xffffbcf5, 0x675c, 0x481d, 0x6ac3, 0xffffc0ae, 0x4ce4, - 0x46ef, 0x2b3f, 0x47fd, 0x35f4, 0xc48, 0x3038, 0x7b9b, 0x302d, - 0xffff85f4, 0x6652, 0xffff7f44, 0xffffec9b, 0xffffedd2, 0x2863, 0x2faa, 0x8cf1, - 0xffffc4e8, 0xcb3, 0xffff925c, 0xffffc9c0, 0xffffad2f, 0x5eb1, 0x5697, 0x66bd, - 0xffff8080, 0xffff98b1, 0x2955, 0xffffcdbd, 0xffffd6d8, 0xffff84a6, 0xffffe29c, 0xffff9edd, - 0x391f, 0x625c, 0xffff8094, 0xffffbad3, 0xffff8b97, 0x7d06, 0xffffadce, 0x1036, - 0xffffcbd0, 0x3027, 0xfffff405, 0x3104, 0xffffd411, 0x614d, 0x426b, 0x410, - 0x3524, 0xffffddf3, 0x3c3b, 0x7663, 0x4d40, 0x7c3e, 0xffffa330, 0xffffbd4a, - 0xffffce53, 0x989, 0xffffddc9, 0xffff92ed, 0x4449, 0xffffa2d2, 0xfffff261, 0x5c84, - 0xfffff447, 0xfffff6c6, 0x4520, 0xffffa40d, 0xffffd253, 0xffffbf75, 0xffffaeea, 0x8c96, - 0xffff7c66, 0xffffc745, 0x572b, 0x5167, 0xffffdc8a, 0x46cc, 0x5b66, 0xffffd61c, - 0x3fc6, 0x7a63, 0xffffc4d8, 0xffffe8b4, 0xffffdc6a, 0x6f63, 0xffffd716, 0xffffbb46, - 0x7426, 0xffff7dde, 0x26f1, 0xffffcd18, 0x1776, 0x4d89, 0x20c5, 0x6457, - 0x371c, 0xffff8c94, 0xffff72e4, 0x7cc, 0x835b, 0xffffb776, 0xffff93e1, 0xffff83cd, - 0x7241, 0xffffcfc4, 0xffffbda6, 0x63f0, 0xffffaa19, 0x7cf5, 0xffff8f8d, 0x1942, - 0xffff87ae, 0x4e6d, 0xffff78d5, 0x6e8c, 0x3539, 0xffffc063, 0x73c, 0x76dc, - 0xfffff8ff, 0xffffb5a1, 0x19bf, 0xffff7694, 0xf15, 0xfffff136, 0xffff82b9, 0xffffcc83, - 0xffff88a4, 0xffffc7e0, 0xffff7256, 0xffffe068, 0x25b4, 0xffffed48, 0xffff8d7d, 0x5f8c, - 0x1892, 0xffffd1e5, 0xffff7417, 0x7ecc, 0xfffffb74, 0x8c0c, 0x4758, 0xffffc7d7, - 0xffffe764, 0xfffffe29, 0xffff88fa, 0xffffe66d, 0xffffdeb4, 0x2f2d, 0x646b, 0xffffce8c, - 0x3769, 0x3912, 0xffffe6fb, 0xffffc166, 0xffffce02, 0x4dc7, 0x80b5, 0xffffc70d, - 0xffffc36a, 0x30ea, 0x7441, 0x5fe4, 0xffff7812, 0xffffe92e, 0xffffcc86, 0xffffe27b, - 0x49e2, 0x71c0, 0xffffab47, 0xffff9c51, 0x7377, 0xfffffc50, 0x7be0, 0x13e0, - 0xffffe5f2, 0x2db1, 0x2610, 0xffff8258, 0xffff978f, 0x282b, 0x395, 0x1031, - 0xffffb66c, 0xffff749b, 0xffffbf6f, 0xffffa7e1, 0x12f1, 0xffffcfa7, 0xfffff7fd, 0x6a21, - 0x8a4d, 0x4ff5, 0x71be, 0x8096, 0x5502, 0x4f40, 0x81c5, 0x5a75, - 0xffff8d39, 0x1bc0, 0xffff7827, 0xa59, 0xffff9929, 0x8db3, 0x5df1, 0xfffff7b2, - 0x420a, 0x6544, 0x6509, 0x7451, 0x1e7f, 0x4f76, 0x315a, 0x3620, - 0x5091, 0x4403, 0xffffd3e4, 0x5c0c, 0x80c2, 0x36c4, 0x5107, 0xffff943d, - 0x6452, 0xffffad40, 0xffff9b98, 0x58ab, 0x27b3, 0xffff8be9, 0xffffa656, 0xffffa5f8, - 0xffffbd22, 0xffff73fd, 0x2758, 0xffffa764, 0x62ed, 0xffff90c5, 0x1e51, 0xffff897b, - 0xffff82b3, 0x2d25, 0x76ad, 0xffff7f02, 0xfffffa89, 0x2d4f, 0x2ab, 0x5685, - 0x8ce1, 0xfffff7de, 0x5522, 0xffffbc64, 0xffff9e79, 0xffffef8b, 0xffff84f0, 0xffff933c, - 0x102e, 0x8bc, 0x5a44, 0xfffffe4f, 0xffffaed9, 0x7aee, 0xffffa2ae, 0x12e0, - 0x7c7b, 0x3a66, 0xffffb1f5, 0xffffa575, 0x3bf3, 0xffffe14f, 0xffffedca, 0xfffffb3d, - 0xffff8279, 0x296b, 0x8bc7, 0xc1b, 0xffffea63, 0x65cd, 0xffffa851, 0x878f, - 0xe37, 0x501a, 0x581c, 0x16c3, 0x6279, 0xffff9e12, 0xfffffc2c, 0x7d4c, - 0x4c95, 0xffffced3, 0xffff8b07, 0xffff87b0, 0xffffa928, 0x6ce2, 0xffff8bc1, 0xffff7fab, - 0x5249, 0xffffbf8f, 0x8074, 0x1ab9, 0xffffe2ed, 0xffffebbb, 0xfffffd25, 0x474f, - 0xffffe439, 0xffffe258, 0xffffb947, 0xfffffa1b, 0xffff90ea, 0x8134, 0x6eed, 0xffffc392, - 0xffff934a, 0xffffb921, 0xd9a, 0x6581, 0x37f2, 0xffffe672, 0xffffafd9, 0x30eb, - 0xffffa08e, 0xffffa39d, 0xffff9657, 0x26d0, 0xffffb97f, 0x5df, 0xffff9257, 0x3a34, - 0xfffffd43, 0xffffc367, 0x8bf0, 0x186, 0x1692, 0x5420, 0x7d2c, 0x83dd, - 0x4ad1, 0xfffffc05, 0x67a4, 0x7b06, 0xffffacd2, 0x7c2, 0x4f9a, 0x586a, - 0xffffdacd, 0xfffff2e4, 0xffffa666, 0xffffa2f2, 0xffffdd98, 0x50ec, 0xffffec94, 0xffffe01d, - 0xffffe6a5, 0x2b32, 0xffff9128, 0xffffba30, 0xffff82ba, 0xffffe9fc, 0xffffe738, 0x20fa, - 0x3c1b, 0xffffce2f, 0x533, 0x8bdf, 0x79be, 0xffff86e9, 0x82cf, 0xffffab3e, - 0x591d, 0xfffffeb2, 0xffff7424, 0x8932, 0xffffe0f9, 0xffff9d92, 0xffff7b20, 0x2495, - 0x879d, 0x85a3, 0x6f1f, 0x1cf2, 0x1220, 0x65c2, 0xffffc751, 0xffffa10f, - 0xffffa5df, 0xffffd1fd, 0xffffac41, 0xffff73d2, 0xffffc38e, 0xffffa17a, 0xffff9f58, 0x6600, - 0xffff95d8, 0x8400, 0x38dc, 0xffff9844, 0xffff9378, 0x5fdc, 0x3ed8, 0xb4b, - 0xffffb1fd, 0xffff72a1, 0x6313, 0x3acb, 0xffffd03c, 0xffffe6bb, 0x59f7, 0x5a17, - 0x20c2, 0xffffddc9, 0x60e0, 0xffffb1ff, 0x7867, 0xffffad34, 0x8cb0, 0xffff89ed, - 0xffff9cf1, 0x57ed, 0x186b, 0x85bb, 0x1ed9, 0xffffd073, 0x755, 0x39d, - 0xffffe507, 0x5144, 0x3bdd, 0xffff748f, 0x5a22, 0x2f8c, 0xffffe210, 0xffff8285, - 0x2ffa, 0x17c1, 0x11b5, 0xffffa5ff, 0x3950, 0x6b7f, 0xffffc962, 0xfffff345, - 0x80c6, 0xffffbb45, 0xffffac73, 0xffff941e, 0xffff9774, 0xffffe733, 0x35cb, 0xffffb0e4, - 0x8a90, 0x296d, 0xffffea99, 0xffffb292, 0x3778, 0xffffff27, 0x3422, 0x2bd4, - 0xffffb0ac, 0xffffda12, 0x3f00, 0x36ed, 0x38ec, 0xffff9a13, 0xffff9d40, 0x5ec5, - 0x5a1b, 0x5a7d, 0xffffccab, 0xfffffcd1, 0xffffa33b, 0xffff9848, 0x31d8, 0x2224, - 0x2eb0, 0xffffa658, 0xffff9e76, 0xffffd97a, 0x65a8, 0xffff8029, 0xf42, 0x2c21 -}; - diff --git a/bsp/stm32_radio/libwma/wmadec.h b/bsp/stm32_radio/libwma/wmadec.h deleted file mode 100644 index c0295b08ae..0000000000 --- a/bsp/stm32_radio/libwma/wmadec.h +++ /dev/null @@ -1,149 +0,0 @@ -/* - * WMA compatible decoder - * Copyright (c) 2002 The FFmpeg Project. - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#ifndef _WMADEC_H -#define _WMADEC_H - -#include "asf.h" -#include "wmabitstream.h" /* For GetBitContext */ -#include "types.h" - -//#define TRACE -/* size of blocks */ -#define BLOCK_MIN_BITS 7 -#define BLOCK_MAX_BITS 11 -#define BLOCK_MAX_SIZE (1 << BLOCK_MAX_BITS) - -#define BLOCK_NB_SIZES (BLOCK_MAX_BITS - BLOCK_MIN_BITS + 1) - -/* XXX: find exact max size */ -#define HIGH_BAND_MAX_SIZE 16 - -#define NB_LSP_COEFS 10 - -/* XXX: is it a suitable value ? */ -#define MAX_CODED_SUPERFRAME_SIZE 16384 - -#define M_PI 3.14159265358979323846 - -#define M_PI_F 0x3243f // in fixed 32 format -#define TWO_M_PI_F 0x6487f //in fixed 32 - -#define MAX_CHANNELS 2 - -#define NOISE_TAB_SIZE 8192 - -#define LSP_POW_BITS 7 - -/*define IRAM for targets with 48k/80k IRAM split*/ -#ifndef IBSS_ATTR_WMA_LARGE_IRAM -#if (CONFIG_CPU == PP5022) || (CONFIG_CPU == PP5024) -/* PP5022/24 and MCF5250 have 128KB of IRAM, but only PP5022+ have 80KB allocated for codecs */ -#define IBSS_ATTR_WMA_LARGE_IRAM IBSS_ATTR -#else -/* other PP's and MCF5249 have 96KB of IRAM */ -#define IBSS_ATTR_WMA_LARGE_IRAM -#endif -#endif - -typedef struct WMADecodeContext -{ - GetBitContext gb; - - int nb_block_sizes; /* number of block sizes */ - - int sample_rate; - int nb_channels; - int bit_rate; - int version; /* 1 = 0x160 (WMAV1), 2 = 0x161 (WMAV2) */ - int block_align; - int use_bit_reservoir; - int use_variable_block_len; - int use_exp_vlc; /* exponent coding: 0 = lsp, 1 = vlc + delta */ - int use_noise_coding; /* true if perceptual noise is added */ - int byte_offset_bits; - VLC exp_vlc; - int exponent_sizes[BLOCK_NB_SIZES]; - uint16_t exponent_bands[BLOCK_NB_SIZES][25]; - int high_band_start[BLOCK_NB_SIZES]; /* index of first coef in high band */ - int coefs_start; /* first coded coef */ - int coefs_end[BLOCK_NB_SIZES]; /* max number of coded coefficients */ - int exponent_high_sizes[BLOCK_NB_SIZES]; - int exponent_high_bands[BLOCK_NB_SIZES][HIGH_BAND_MAX_SIZE]; - VLC hgain_vlc; - - /* coded values in high bands */ - int high_band_coded[MAX_CHANNELS][HIGH_BAND_MAX_SIZE]; - int high_band_values[MAX_CHANNELS][HIGH_BAND_MAX_SIZE]; - - /* there are two possible tables for spectral coefficients */ - VLC coef_vlc[2]; - uint16_t *run_table[2]; - uint16_t *level_table[2]; - /* frame info */ - int frame_len; /* frame length in samples */ - int frame_len_bits; /* frame_len = 1 << frame_len_bits */ - - /* block info */ - int reset_block_lengths; - int block_len_bits; /* log2 of current block length */ - int next_block_len_bits; /* log2 of next block length */ - int prev_block_len_bits; /* log2 of prev block length */ - int block_len; /* block length in samples */ - int block_num; /* block number in current frame */ - int block_pos; /* current position in frame */ - uint8_t ms_stereo; /* true if mid/side stereo mode */ - uint8_t channel_coded[MAX_CHANNELS]; /* true if channel is coded */ - int exponents_bsize[MAX_CHANNELS]; // log2 ratio frame/exp. length - fixed32 exponents[MAX_CHANNELS][BLOCK_MAX_SIZE]; - fixed32 max_exponent[MAX_CHANNELS]; - int16_t coefs1[MAX_CHANNELS][BLOCK_MAX_SIZE]; - fixed32 (*coefs)[MAX_CHANNELS][BLOCK_MAX_SIZE]; - fixed32 *windows[BLOCK_NB_SIZES]; - /* output buffer for one frame and the last for IMDCT windowing */ - fixed32 (*frame_out)[MAX_CHANNELS][BLOCK_MAX_SIZE*2]; - - /* last frame info */ - uint8_t last_superframe[MAX_CODED_SUPERFRAME_SIZE + 4]; /* padding added */ - int last_bitoffset; - int last_superframe_len; - fixed32 *noise_table; - int noise_index; - fixed32 noise_mult; /* XXX: suppress that and integrate it in the noise array */ - /* lsp_to_curve tables */ - fixed32 lsp_cos_table[BLOCK_MAX_SIZE]; - fixed64 lsp_pow_e_table[256]; - fixed32 lsp_pow_m_table1[(1 << LSP_POW_BITS)]; - fixed32 lsp_pow_m_table2[(1 << LSP_POW_BITS)]; - - /* State of current superframe decoding */ - int bit_offset; - int nb_frames; - int current_frame; - -#ifdef TRACE - int frame_count; -#endif -} WMADecodeContext; - -int wma_decode_init(WMADecodeContext* s, asf_waveformatex_t *wfx); -int wma_decode_superframe_init(WMADecodeContext* s, const uint8_t *buf, int buf_size); -int wma_decode_superframe_frame(WMADecodeContext* s, int32_t *samples, const uint8_t *buf, int buf_size); - -#endif diff --git a/bsp/stm32_radio/libwma/wmadeci.c b/bsp/stm32_radio/libwma/wmadeci.c deleted file mode 100644 index 1f0758b377..0000000000 --- a/bsp/stm32_radio/libwma/wmadeci.c +++ /dev/null @@ -1,1586 +0,0 @@ -/* - * WMA compatible decoder - * Copyright (c) 2002 The FFmpeg Project. - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -/** - * @file wmadec.c - * WMA compatible decoder. - */ - -//#include -#include "codeclib.h" -#include "asf.h" -#include "wmadec.h" -#include "wmafixed.h" -#include "wmabitstream.h" - -#define VLCBITS 7 /*7 is the lowest without glitching*/ -#define VLCMAX ((22+VLCBITS-1)/VLCBITS) - -#define EXPVLCBITS 7 -#define EXPMAX ((19+EXPVLCBITS-1)/EXPVLCBITS) - -#define HGAINVLCBITS 9 -#define HGAINMAX ((13+HGAINVLCBITS-1)/HGAINVLCBITS) - -typedef struct CoefVLCTable -{ - int n; /* total number of codes */ - const uint32_t *huffcodes; /* VLC bit values */ - const uint8_t *huffbits; /* VLC bit size */ - const uint16_t *levels; /* table to build run/level tables */ -} CoefVLCTable; - -static void wma_lsp_to_curve_init(WMADecodeContext *s, int frame_len); - -fixed32 coefsarray[MAX_CHANNELS][BLOCK_MAX_SIZE] ; -/*decode and window into IRAM on targets with at least 80KB of codec IRAM*/ -fixed32 frame_out_buf[MAX_CHANNELS][BLOCK_MAX_SIZE * 2] ; - -//static variables that replace malloced stuff -fixed32 stat0[2048], stat1[1024], stat2[512], stat3[256], stat4[128]; //these are the MDCT reconstruction windows - -uint16_t *runtabarray[2], *levtabarray[2]; //these are VLC lookup tables - -uint16_t runtab0[1336], runtab1[1336], levtab0[1336], levtab1[1336]; //these could be made smaller since only one can be 1336 - -#define VLCBUF1SIZE 4598 -#define VLCBUF2SIZE 3574 -#define VLCBUF3SIZE 360 -#define VLCBUF4SIZE 540 - -/*putting these in IRAM actually makes PP slower*/ - -VLC_TYPE vlcbuf1[VLCBUF1SIZE][2]; -VLC_TYPE vlcbuf2[VLCBUF2SIZE][2]; -VLC_TYPE vlcbuf3[VLCBUF3SIZE][2]; -VLC_TYPE vlcbuf4[VLCBUF4SIZE][2]; - -#include "wmadata.h" - -/* - * Helper functions for wma_window. - * - * - */ - -#ifdef CPU_ARM -static inline -void vector_fmul_add_add(fixed32 *dst, const fixed32 *data, - const fixed32 *window, int n) -{ - /* Block sizes are always power of two */ - asm volatile ( - "0:" - "ldmia %[d]!, {r0, r1};" - "ldmia %[w]!, {r4, r5};" - /* consume the first data and window value so we can use those - * registers again */ - "smull r8, r9, r0, r4;" - "ldmia %[dst], {r0, r4};" - "add r0, r0, r9, lsl #1;" /* *dst=*dst+(r9<<1)*/ - "smull r8, r9, r1, r5;" - "add r1, r4, r9, lsl #1;" - "stmia %[dst]!, {r0, r1};" - "subs %[n], %[n], #2;" - "bne 0b;" - : [d] "+r" (data), [w] "+r" (window), [dst] "+r" (dst), [n] "+r" (n) - : : "r0", "r1", "r4", "r5", "r8", "r9", "memory", "cc"); -} - -static inline -void vector_fmul_reverse(fixed32 *dst, const fixed32 *src0, const fixed32 *src1, - int len) -{ - /* Block sizes are always power of two */ - asm volatile ( - "add %[s1], %[s1], %[n], lsl #2;" - "0:" - "ldmia %[s0]!, {r0, r1};" - "ldmdb %[s1]!, {r4, r5};" - "smull r8, r9, r0, r5;" - "mov r0, r9, lsl #1;" - "smull r8, r9, r1, r4;" - "mov r1, r9, lsl #1;" - "stmia %[dst]!, {r0, r1};" - "subs %[n], %[n], #2;" - "bne 0b;" - : [s0] "+r" (src0), [s1] "+r" (src1), [dst] "+r" (dst), [n] "+r" (len) - : : "r0", "r1", "r4", "r5", "r8", "r9", "memory", "cc"); -} - -#elif defined(CPU_COLDFIRE) - -static inline -void vector_fmul_add_add(fixed32 *dst, const fixed32 *data, - const fixed32 *window, int n) -{ - /* Block sizes are always power of two. Smallest block is always way bigger - * than four too.*/ - asm volatile ( - "0:" - "movem.l (%[d]), %%d0-%%d3;" - "movem.l (%[w]), %%d4-%%d5/%%a0-%%a1;" - "mac.l %%d0, %%d4, %%acc0;" - "mac.l %%d1, %%d5, %%acc1;" - "mac.l %%d2, %%a0, %%acc2;" - "mac.l %%d3, %%a1, %%acc3;" - "lea.l (16, %[d]), %[d];" - "lea.l (16, %[w]), %[w];" - "movclr.l %%acc0, %%d0;" - "movclr.l %%acc1, %%d1;" - "movclr.l %%acc2, %%d2;" - "movclr.l %%acc3, %%d3;" - "movem.l (%[dst]), %%d4-%%d5/%%a0-%%a1;" - "add.l %%d4, %%d0;" - "add.l %%d5, %%d1;" - "add.l %%a0, %%d2;" - "add.l %%a1, %%d3;" - "movem.l %%d0-%%d3, (%[dst]);" - "lea.l (16, %[dst]), %[dst];" - "subq.l #4, %[n];" - "jne 0b;" - : [d] "+a" (data), [w] "+a" (window), [dst] "+a" (dst), [n] "+d" (n) - : : "d0", "d1", "d2", "d3", "d4", "d5", "a0", "a1", "memory", "cc"); -} - -static inline -void vector_fmul_reverse(fixed32 *dst, const fixed32 *src0, const fixed32 *src1, - int len) -{ - /* Block sizes are always power of two. Smallest block is always way bigger - * than four too.*/ - asm volatile ( - "lea.l (-16, %[s1], %[n]*4), %[s1];" - "0:" - "movem.l (%[s0]), %%d0-%%d3;" - "movem.l (%[s1]), %%d4-%%d5/%%a0-%%a1;" - "mac.l %%d0, %%a1, %%acc0;" - "mac.l %%d1, %%a0, %%acc1;" - "mac.l %%d2, %%d5, %%acc2;" - "mac.l %%d3, %%d4, %%acc3;" - "lea.l (16, %[s0]), %[s0];" - "lea.l (-16, %[s1]), %[s1];" - "movclr.l %%acc0, %%d0;" - "movclr.l %%acc1, %%d1;" - "movclr.l %%acc2, %%d2;" - "movclr.l %%acc3, %%d3;" - "movem.l %%d0-%%d3, (%[dst]);" - "lea.l (16, %[dst]), %[dst];" - "subq.l #4, %[n];" - "jne 0b;" - : [s0] "+a" (src0), [s1] "+a" (src1), [dst] "+a" (dst), [n] "+d" (len) - : : "d0", "d1", "d2", "d3", "d4", "d5", "a0", "a1", "memory", "cc"); -} - -#else - -static inline void vector_fmul_add_add(fixed32 *dst, const fixed32 *src0, const fixed32 *src1, int len){ - int i; - for(i=0; ioutput; - int block_len, bsize, n; - - /* left part */ - /*previous block was larger, so we'll use the size of the current block to set the window size*/ - if (s->block_len_bits <= s->prev_block_len_bits) { - block_len = s->block_len; - bsize = s->frame_len_bits - s->block_len_bits; - - vector_fmul_add_add(out, in, s->windows[bsize], block_len); - - } else { - /*previous block was smaller or the same size, so use it's size to set the window length*/ - block_len = 1 << s->prev_block_len_bits; - /*find the middle of the two overlapped blocks, this will be the first overlapped sample*/ - n = (s->block_len - block_len) / 2; - bsize = s->frame_len_bits - s->prev_block_len_bits; - - vector_fmul_add_add(out+n, in+n, s->windows[bsize], block_len); - - memcpy(out+n+block_len, in+n+block_len, n*sizeof(fixed32)); - } - /* Advance to the end of the current block and prepare to window it for the next block. - * Since the window function needs to be reversed, we do it backwards starting with the - * last sample and moving towards the first - */ - out += s->block_len; - in += s->block_len; - - /* right part */ - if (s->block_len_bits <= s->next_block_len_bits) { - block_len = s->block_len; - bsize = s->frame_len_bits - s->block_len_bits; - - vector_fmul_reverse(out, in, s->windows[bsize], block_len); - - } else { - block_len = 1 << s->next_block_len_bits; - n = (s->block_len - block_len) / 2; - bsize = s->frame_len_bits - s->next_block_len_bits; - - memcpy(out, in, n*sizeof(fixed32)); - - vector_fmul_reverse(out+n, in+n, s->windows[bsize], block_len); - - memset(out+n+block_len, 0, n*sizeof(fixed32)); - } - } - - -/* XXX: use same run/length optimization as mpeg decoders */ -static void init_coef_vlc(VLC *vlc, - uint16_t **prun_table, uint16_t **plevel_table, - const CoefVLCTable *vlc_table, int tab) -{ - int n = vlc_table->n; - const uint8_t *table_bits = vlc_table->huffbits; - const uint32_t *table_codes = vlc_table->huffcodes; - const uint16_t *levels_table = vlc_table->levels; - uint16_t *run_table, *level_table; - const uint16_t *p; - int i, l, j, level; - - init_vlc(vlc, VLCBITS, n, table_bits, 1, 1, table_codes, 4, 4, 0); - - run_table = runtabarray[tab]; - level_table= levtabarray[tab]; - - p = levels_table; - i = 2; - level = 1; - while (i < n) - { - l = *p++; - for(j=0;jmono*/ - s->channel_coded[0]=0; - s->channel_coded[1]=0; - s->ms_stereo=0; - - s->sample_rate = wfx->rate; - s->nb_channels = wfx->channels; - s->bit_rate = wfx->bitrate; - s->block_align = wfx->blockalign; - - s->coefs = &coefsarray; - s->frame_out = &frame_out_buf; - - if (wfx->codec_id == ASF_CODEC_ID_WMAV1) { - s->version = 1; - } else if (wfx->codec_id == ASF_CODEC_ID_WMAV2 ) { - s->version = 2; - } else { - /*one of those other wma flavors that don't have GPLed decoders */ - return -1; - } - - /* extract flag infos */ - flags1 = 0; - flags2 = 0; - extradata = wfx->data; - if (s->version == 1 && wfx->datalen >= 4) { - flags1 = extradata[0] | (extradata[1] << 8); - flags2 = extradata[2] | (extradata[3] << 8); - }else if (s->version == 2 && wfx->datalen >= 6){ - flags1 = extradata[0] | (extradata[1] << 8) | - (extradata[2] << 16) | (extradata[3] << 24); - flags2 = extradata[4] | (extradata[5] << 8); - } - s->use_exp_vlc = flags2 & 0x0001; - s->use_bit_reservoir = flags2 & 0x0002; - s->use_variable_block_len = flags2 & 0x0004; - - /* compute MDCT block size */ - if (s->sample_rate <= 16000){ - s->frame_len_bits = 9; - }else if (s->sample_rate <= 22050 || - (s->sample_rate <= 32000 && s->version == 1)){ - s->frame_len_bits = 10; - }else{ - s->frame_len_bits = 11; - } - s->frame_len = 1 << s->frame_len_bits; - if (s->use_variable_block_len) - { - int nb_max, nb; - nb = ((flags2 >> 3) & 3) + 1; - if ((s->bit_rate / s->nb_channels) >= 32000) - { - nb += 2; - } - nb_max = s->frame_len_bits - BLOCK_MIN_BITS; //max is 11-7 - if (nb > nb_max) - nb = nb_max; - s->nb_block_sizes = nb + 1; - } - else - { - s->nb_block_sizes = 1; - } - - /* init rate dependant parameters */ - s->use_noise_coding = 1; - high_freq = itofix64(s->sample_rate) >> 1; - - /* if version 2, then the rates are normalized */ - sample_rate1 = s->sample_rate; - if (s->version == 2) - { - if (sample_rate1 >= 44100) - sample_rate1 = 44100; - else if (sample_rate1 >= 22050) - sample_rate1 = 22050; - else if (sample_rate1 >= 16000) - sample_rate1 = 16000; - else if (sample_rate1 >= 11025) - sample_rate1 = 11025; - else if (sample_rate1 >= 8000) - sample_rate1 = 8000; - } - - { - fixed64 tmp, tmp2; - fixed64 tim, tmpi; - - tmp = itofix64(s->bit_rate); - tmp2 = itofix64(s->nb_channels * s->sample_rate); - bps = fixdiv64(tmp, tmp2); - tim = bps * s->frame_len; - tmpi = fixdiv64(tim,itofix64(8)); - s->byte_offset_bits = av_log2(fixtoi64(tmpi+0x8000)) + 2; - } - - /* compute high frequency value and choose if noise coding should - be activated */ - bps1 = bps; - if (s->nb_channels == 2) - bps1 = fixmul32(bps,0x1999a); - if (sample_rate1 == 44100) - { - if (bps1 >= 0x9c29) - s->use_noise_coding = 0; - else - high_freq = fixmul32(high_freq,0x6666); - } - else if (sample_rate1 == 22050) - { - if (bps1 >= 0x128f6) - s->use_noise_coding = 0; - else if (bps1 >= 0xb852) - high_freq = fixmul32(high_freq,0xb333); - else - high_freq = fixmul32(high_freq,0x999a); - } - else if (sample_rate1 == 16000) - { - if (bps > 0x8000) - high_freq = fixmul32(high_freq,0x8000); - else - high_freq = fixmul32(high_freq,0x4ccd); - } - else if (sample_rate1 == 11025) - { - high_freq = fixmul32(high_freq,0xb333); - } - else if (sample_rate1 == 8000) - { - if (bps <= 0xa000) - { - high_freq = fixmul32(high_freq,0x8000); - } - else if (bps > 0xc000) - { - s->use_noise_coding = 0; - } - else - { - high_freq = fixmul32(high_freq,0xa666); - } - } - else - { - if (bps >= 0xcccd) - { - high_freq = fixmul32(high_freq,0xc000); - } - else if (bps >= 0x999a) - { - high_freq = fixmul32(high_freq,0x999a); - } - else - { - high_freq = fixmul32(high_freq,0x8000); - } - } - - /* compute the scale factor band sizes for each MDCT block size */ - { - int a, b, pos, lpos, k, block_len, i, j, n; - const uint8_t *table; - - fixed32 tmp1, tmp2; - - if (s->version == 1) - { - s->coefs_start = 3; - } - else - { - s->coefs_start = 0; - } - for(k = 0; k < s->nb_block_sizes; ++k) - { - block_len = s->frame_len >> k; - - if (s->version == 1) - { - lpos = 0; - for(i=0;i<25;++i) - { - a = wma_critical_freqs[i]; - b = s->sample_rate; - pos = ((block_len * 2 * a) + (b >> 1)) / b; - if (pos > block_len) - pos = block_len; - s->exponent_bands[0][i] = pos - lpos; - if (pos >= block_len) - { - ++i; - break; - } - lpos = pos; - } - s->exponent_sizes[0] = i; - } - else - { - /* hardcoded tables */ - table = NULL; - a = s->frame_len_bits - BLOCK_MIN_BITS - k; - if (a < 3) - { - if (s->sample_rate >= 44100) - table = exponent_band_44100[a]; - else if (s->sample_rate >= 32000) - table = exponent_band_32000[a]; - else if (s->sample_rate >= 22050) - table = exponent_band_22050[a]; - } - if (table) - { - n = *table++; - for(i=0;iexponent_bands[k][i] = table[i]; - s->exponent_sizes[k] = n; - } - else - { - j = 0; - lpos = 0; - for(i=0;i<25;++i) - { - a = wma_critical_freqs[i]; - b = s->sample_rate; - pos = ((block_len * 2 * a) + (b << 1)) / (4 * b); - pos <<= 2; - if (pos > block_len) - pos = block_len; - if (pos > lpos) - s->exponent_bands[k][j++] = pos - lpos; - if (pos >= block_len) - break; - lpos = pos; - } - s->exponent_sizes[k] = j; - } - } - - /* max number of coefs */ - s->coefs_end[k] = (s->frame_len - ((s->frame_len * 9) / 100)) >> k; - /* high freq computation */ - - tmp1 = high_freq*2; /* high_freq is a fixed32!*/ - tmp2 = itofix32(s->sample_rate>>1); - s->high_band_start[k] = fixtoi32( fixdiv32(tmp1, tmp2) * (block_len>>1) +0x8000); - - /* - s->high_band_start[k] = (int)((block_len * 2 * high_freq) / - s->sample_rate + 0.5);*/ - - n = s->exponent_sizes[k]; - j = 0; - pos = 0; - for(i=0;iexponent_bands[k][i]; - end = pos; - if (start < s->high_band_start[k]) - start = s->high_band_start[k]; - if (end > s->coefs_end[k]) - end = s->coefs_end[k]; - if (end > start) - s->exponent_high_bands[k][j++] = end - start; - } - s->exponent_high_sizes[k] = j; - } - } - - /*Not using the ffmpeg IMDCT anymore*/ - - /* mdct_init_global(); - - for(i = 0; i < s->nb_block_sizes; ++i) - { - ff_mdct_init(&s->mdct_ctx[i], s->frame_len_bits - i + 1, 1); - - } - */ - - /*ffmpeg uses malloc to only allocate as many window sizes as needed. However, we're really only interested in the worst case memory usage. - * In the worst case you can have 5 window sizes, 128 doubling up 2048 - * Smaller windows are handled differently. - * Since we don't have malloc, just statically allocate this - */ - temp[0] = stat0; - temp[1] = stat1; - temp[2] = stat2; - temp[3] = stat3; - temp[4] = stat4; - - /* init MDCT windows : simple sinus window */ - for(i = 0; i < s->nb_block_sizes; i++) - { - int n, j; - fixed32 alpha; - n = 1 << (s->frame_len_bits - i); - //window = av_malloc(sizeof(fixed32) * n); - window = temp[i]; - - //fixed32 n2 = itofix32(n<<1); //2x the window length - //alpha = fixdiv32(M_PI_F, n2); //PI / (2x Window length) == PI<<(s->frame_len_bits - i+1) - - //alpha = M_PI_F>>(s->frame_len_bits - i+1); - alpha = (1<<15)>>(s->frame_len_bits - i+1); /* this calculates 0.5/(2*n) */ - for(j=0;jwindows[i] = window; - } - - s->reset_block_lengths = 1; - - if (s->use_noise_coding) - { - /* init the noise generator */ - if (s->use_exp_vlc) - { - s->noise_mult = 0x51f; - s->noise_table = noisetable_exp; - } - else - { - s->noise_mult = 0xa3d; - /* LSP values are simply 2x the EXP values */ - for (i=0;inoise_table = noisetable_exp; - } - - s->hgain_vlc.table = vlcbuf4; - s->hgain_vlc.table_allocated = VLCBUF4SIZE; - init_vlc(&s->hgain_vlc, HGAINVLCBITS, sizeof(hgain_huffbits), - hgain_huffbits, 1, 1, - hgain_huffcodes, 2, 2, 0); - } - - if (s->use_exp_vlc) - { - - s->exp_vlc.table = vlcbuf3; - s->exp_vlc.table_allocated = VLCBUF3SIZE; - - init_vlc(&s->exp_vlc, EXPVLCBITS, sizeof(scale_huffbits), - scale_huffbits, 1, 1, - scale_huffcodes, 4, 4, 0); - } - else - { - wma_lsp_to_curve_init(s, s->frame_len); - } - - /* choose the VLC tables for the coefficients */ - coef_vlc_table = 2; - if (s->sample_rate >= 32000) - { - if (bps1 < 0xb852) - coef_vlc_table = 0; - else if (bps1 < 0x128f6) - coef_vlc_table = 1; - } - - runtabarray[0] = runtab0; runtabarray[1] = runtab1; - levtabarray[0] = levtab0; levtabarray[1] = levtab1; - - s->coef_vlc[0].table = vlcbuf1; - s->coef_vlc[0].table_allocated = VLCBUF1SIZE; - s->coef_vlc[1].table = vlcbuf2; - s->coef_vlc[1].table_allocated = VLCBUF2SIZE; - - - init_coef_vlc(&s->coef_vlc[0], &s->run_table[0], &s->level_table[0], - &coef_vlcs[coef_vlc_table * 2], 0); - init_coef_vlc(&s->coef_vlc[1], &s->run_table[1], &s->level_table[1], - &coef_vlcs[coef_vlc_table * 2 + 1], 1); - - s->last_superframe_len = 0; - s->last_bitoffset = 0; - - return 0; -} - - -/* compute x^-0.25 with an exponent and mantissa table. We use linear - interpolation to reduce the mantissa table size at a small speed - expense (linear interpolation approximately doubles the number of - bits of precision). */ -static inline fixed32 pow_m1_4(WMADecodeContext *s, fixed32 x) -{ - union { - float f; - unsigned int v; - } u, t; - unsigned int e, m; - fixed32 a, b; - - u.f = fixtof64(x); - e = u.v >> 23; - m = (u.v >> (23 - LSP_POW_BITS)) & ((1 << LSP_POW_BITS) - 1); - /* build interpolation scale: 1 <= t < 2. */ - t.v = ((u.v << LSP_POW_BITS) & ((1 << 23) - 1)) | (127 << 23); - a = s->lsp_pow_m_table1[m]; - b = s->lsp_pow_m_table2[m]; - - /* lsp_pow_e_table contains 32.32 format */ - /* TODO: Since we're unlikely have value that cover the whole - * IEEE754 range, we probably don't need to have all possible exponents */ - - return (lsp_pow_e_table[e] * (a + fixmul32(b, ftofix32(t.f))) >>32); -} - -static void wma_lsp_to_curve_init(WMADecodeContext *s, int frame_len) -{ - fixed32 a, b, temp, temp2; - int i, ix = 0; - - // wdel = fixdiv32(M_PI_F, itofix32(frame_len)); - temp = fixdiv32(itofix32(1), itofix32(frame_len)); - for (i=0; ilsp_cos_table[i] = temp2>>3; - - } - /* NOTE: these two tables are needed to avoid two operations in - pow_m1_4 */ - b = itofix32(1); - - /*double check this later*/ - for(i=(1 << LSP_POW_BITS) - 1;i>=0;i--) - { - // m = (1 << LSP_POW_BITS) + i; - a = pow_a_table[ix++]<<4; - s->lsp_pow_m_table1[i] = 2 * a - b; - s->lsp_pow_m_table2[i] = b - a; - b = a; - } - -} - -/* NOTE: We use the same code as Vorbis here */ -/* XXX: optimize it further with SSE/3Dnow */ -static void wma_lsp_to_curve(WMADecodeContext *s, - fixed32 *out, - fixed32 *val_max_ptr, - int n, - fixed32 *lsp) -{ - int i, j; - fixed32 p, q, w, v, val_max, temp, temp2; - - val_max = 0; - for(i=0;ilsp_cos_table[i]; - - for (j=1;j>9; /* p/q end up as 16.16 */ - v = pow_m1_4(s, v); - if (v > val_max) - val_max = v; - out[i] = v; - } - - *val_max_ptr = val_max; -} - -/* decode exponents coded with LSP coefficients (same idea as Vorbis) */ -static void decode_exp_lsp(WMADecodeContext *s, int ch) -{ - fixed32 lsp_coefs[NB_LSP_COEFS]; - int val, i; - - for (i = 0; i < NB_LSP_COEFS; ++i) - { - if (i == 0 || i >= 8) - val = get_bits(&s->gb, 3); - else - val = get_bits(&s->gb, 4); - lsp_coefs[i] = lsp_codebook[i][val]; - } - - wma_lsp_to_curve(s, - s->exponents[ch], - &s->max_exponent[ch], - s->block_len, - lsp_coefs); -} - -/* decode exponents coded with VLC codes */ -static int decode_exp_vlc(WMADecodeContext *s, int ch) -{ - int last_exp, n, code; - const uint16_t *ptr, *band_ptr; - fixed32 v, max_scale; - fixed32 *q,*q_end; - - /*accommodate the 60 negative indices */ - const fixed32 *pow_10_to_yover16_ptr = &pow_10_to_yover16[61]; - - band_ptr = s->exponent_bands[s->frame_len_bits - s->block_len_bits]; - ptr = band_ptr; - q = s->exponents[ch]; - q_end = q + s->block_len; - max_scale = 0; - - - if (s->version == 1) //wmav1 only - { - last_exp = get_bits(&s->gb, 5) + 10; - /* XXX: use a table */ - v = pow_10_to_yover16_ptr[last_exp]; - max_scale = v; - n = *ptr++; - do - { - *q++ = v; - } - while (--n); - } else { - last_exp = 36; - } - - while (q < q_end) - { - code = get_vlc2(&s->gb, s->exp_vlc.table, EXPVLCBITS, EXPMAX); - if (code < 0) - { - return -1; - } - /* NOTE: this offset is the same as MPEG4 AAC ! */ - last_exp += code - 60; - /* XXX: use a table */ - v = pow_10_to_yover16_ptr[last_exp]; - if (v > max_scale) - { - max_scale = v; - } - n = *ptr++; - do - { - *q++ = v; - - } - while (--n); - } - - s->max_exponent[ch] = max_scale; - return 0; -} - -/* return 0 if OK. return 1 if last block of frame. return -1 if - unrecorrable error. */ -static int wma_decode_block(WMADecodeContext *s, int32_t *scratch_buffer) -{ - int n, v, a, ch, code, bsize; - int coef_nb_bits, total_gain; - int nb_coefs[MAX_CHANNELS]; - fixed32 mdct_norm; - - /*DEBUGF("***decode_block: %d (%d samples of %d in frame)\n", s->block_num, s->block_len, s->frame_len);*/ - - /* compute current block length */ - if (s->use_variable_block_len) - { - n = av_log2(s->nb_block_sizes - 1) + 1; - - if (s->reset_block_lengths) - { - s->reset_block_lengths = 0; - v = get_bits(&s->gb, n); - if (v >= s->nb_block_sizes) - { - return -2; - } - s->prev_block_len_bits = s->frame_len_bits - v; - v = get_bits(&s->gb, n); - if (v >= s->nb_block_sizes) - { - return -3; - } - s->block_len_bits = s->frame_len_bits - v; - } - else - { - /* update block lengths */ - s->prev_block_len_bits = s->block_len_bits; - s->block_len_bits = s->next_block_len_bits; - } - v = get_bits(&s->gb, n); - - if (v >= s->nb_block_sizes) - { - // rb->splash(HZ*4, "v was %d", v); //5, 7 - return -4; //this is it - } - else{ - //rb->splash(HZ, "passed v block (%d)!", v); - } - s->next_block_len_bits = s->frame_len_bits - v; - } - else - { - /* fixed block len */ - s->next_block_len_bits = s->frame_len_bits; - s->prev_block_len_bits = s->frame_len_bits; - s->block_len_bits = s->frame_len_bits; - } - /* now check if the block length is coherent with the frame length */ - s->block_len = 1 << s->block_len_bits; - - if ((s->block_pos + s->block_len) > s->frame_len) - { - return -5; //oddly 32k sample from tracker fails here - } - - if (s->nb_channels == 2) - { - s->ms_stereo = get_bits1(&s->gb); - } - v = 0; - for (ch = 0; ch < s->nb_channels; ++ch) - { - a = get_bits1(&s->gb); - s->channel_coded[ch] = a; - v |= a; - } - /* if no channel coded, no need to go further */ - /* XXX: fix potential framing problems */ - if (!v) - { - goto next; - } - - bsize = s->frame_len_bits - s->block_len_bits; - - /* read total gain and extract corresponding number of bits for - coef escape coding */ - total_gain = 1; - for(;;) - { - a = get_bits(&s->gb, 7); - total_gain += a; - if (a != 127) - { - break; - } - } - - if (total_gain < 15) - coef_nb_bits = 13; - else if (total_gain < 32) - coef_nb_bits = 12; - else if (total_gain < 40) - coef_nb_bits = 11; - else if (total_gain < 45) - coef_nb_bits = 10; - else - coef_nb_bits = 9; - - /* compute number of coefficients */ - n = s->coefs_end[bsize] - s->coefs_start; - - for(ch = 0; ch < s->nb_channels; ++ch) - { - nb_coefs[ch] = n; - } - /* complex coding */ - if (s->use_noise_coding) - { - - for(ch = 0; ch < s->nb_channels; ++ch) - { - if (s->channel_coded[ch]) - { - int i, n, a; - n = s->exponent_high_sizes[bsize]; - for(i=0;igb); - s->high_band_coded[ch][i] = a; - /* if noise coding, the coefficients are not transmitted */ - if (a) - nb_coefs[ch] -= s->exponent_high_bands[bsize][i]; - } - } - } - for(ch = 0; ch < s->nb_channels; ++ch) - { - if (s->channel_coded[ch]) - { - int i, n, val, code; - - n = s->exponent_high_sizes[bsize]; - val = (int)0x80000000; - for(i=0;ihigh_band_coded[ch][i]) - { - if (val == (int)0x80000000) - { - val = get_bits(&s->gb, 7) - 19; - } - else - { - //code = get_vlc(&s->gb, &s->hgain_vlc); - code = get_vlc2(&s->gb, s->hgain_vlc.table, HGAINVLCBITS, HGAINMAX); - if (code < 0) - { - return -6; - } - val += code - 18; - } - s->high_band_values[ch][i] = val; - } - } - } - } - } - - /* exponents can be reused in short blocks. */ - if ((s->block_len_bits == s->frame_len_bits) || get_bits1(&s->gb)) - { - for(ch = 0; ch < s->nb_channels; ++ch) - { - if (s->channel_coded[ch]) - { - if (s->use_exp_vlc) - { - if (decode_exp_vlc(s, ch) < 0) - { - return -7; - } - } - else - { - decode_exp_lsp(s, ch); - } - s->exponents_bsize[ch] = bsize; - } - } - } - - /* parse spectral coefficients : just RLE encoding */ - for(ch = 0; ch < s->nb_channels; ++ch) - { - if (s->channel_coded[ch]) - { - VLC *coef_vlc; - int level, run, sign, tindex; - int16_t *ptr, *eptr; - const int16_t *level_table, *run_table; - - /* special VLC tables are used for ms stereo because - there is potentially less energy there */ - tindex = (ch == 1 && s->ms_stereo); - coef_vlc = &s->coef_vlc[tindex]; - run_table = s->run_table[tindex]; - level_table = s->level_table[tindex]; - /* XXX: optimize */ - ptr = &s->coefs1[ch][0]; - eptr = ptr + nb_coefs[ch]; - memset(ptr, 0, s->block_len * sizeof(int16_t)); - - for(;;) - { - code = get_vlc2(&s->gb, coef_vlc->table, VLCBITS, VLCMAX); - //code = get_vlc(&s->gb, coef_vlc); - if (code < 0) - { - return -8; - } - if (code == 1) - { - /* EOB */ - break; - } - else if (code == 0) - { - /* escape */ - level = get_bits(&s->gb, coef_nb_bits); - /* NOTE: this is rather suboptimal. reading - block_len_bits would be better */ - run = get_bits(&s->gb, s->frame_len_bits); - } - else - { - /* normal code */ - run = run_table[code]; - level = level_table[code]; - } - sign = get_bits1(&s->gb); - if (!sign) - level = -level; - ptr += run; - if (ptr >= eptr) - { - break; - } - *ptr++ = level; - - - /* NOTE: EOB can be omitted */ - if (ptr >= eptr) - break; - } - } - if (s->version == 1 && s->nb_channels >= 2) - { - align_get_bits(&s->gb); - } - } - - { - int n4 = s->block_len >> 1; - - - mdct_norm = 0x10000>>(s->block_len_bits-1); - - if (s->version == 1) - { - mdct_norm *= fixtoi32(fixsqrt32(itofix32(n4))); - } - } - - - /* finally compute the MDCT coefficients */ - for(ch = 0; ch < s->nb_channels; ++ch) - { - if (s->channel_coded[ch]) - { - int16_t *coefs1; - fixed32 *exponents; - fixed32 *coefs, atemp; - fixed64 mult; - fixed64 mult1; - fixed32 noise, temp1, temp2, mult2; - int i, j, n, n1, last_high_band, esize; - fixed32 exp_power[HIGH_BAND_MAX_SIZE]; - - //total_gain, coefs1, mdctnorm are lossless - - coefs1 = s->coefs1[ch]; - exponents = s->exponents[ch]; - esize = s->exponents_bsize[ch]; - coefs = (*(s->coefs))[ch]; - n=0; - - /* - * The calculation of coefs has a shift right by 2 built in. This - * prepares samples for the Tremor IMDCT which uses a slightly - * different fixed format then the ffmpeg one. If the old ffmpeg - * imdct is used, each shift storing into coefs should be reduced - * by 1. - * See SVN logs for details. - */ - - - if (s->use_noise_coding) - { - /*TODO: mult should be converted to 32 bit to speed up noise coding*/ - - mult = fixdiv64(pow_table[total_gain+20],Fixed32To64(s->max_exponent[ch])); - mult = mult* mdct_norm; - mult1 = mult; - - /* very low freqs : noise */ - for(i = 0;i < s->coefs_start; ++i) - { - *coefs++ = fixmul32( (fixmul32(s->noise_table[s->noise_index], - exponents[i<>esize])>>4),Fixed32From64(mult1)) >>2; - s->noise_index = (s->noise_index + 1) & (NOISE_TAB_SIZE - 1); - } - - n1 = s->exponent_high_sizes[bsize]; - - /* compute power of high bands */ - exponents = s->exponents[ch] +(s->high_band_start[bsize]<exponent_high_bands[s->frame_len_bits - - s->block_len_bits][j]; - if (s->high_band_coded[ch][j]) - { - fixed32 e2, v; - e2 = 0; - for(i = 0;i < n; ++i) - { - /*v is normalized later on so its fixed format is irrelevant*/ - v = exponents[i<>esize]>>4; - e2 += fixmul32(v, v)>>3; - } - exp_power[j] = e2/n; /*n is an int...*/ - last_high_band = j; - } - exponents += n<exponents[ch] + (s->coefs_start<high_band_start[bsize] - - s->coefs_start; - } - else - { - n = s->exponent_high_bands[s->frame_len_bits - - s->block_len_bits][j]; - } - if (j >= 0 && s->high_band_coded[ch][j]) - { - /* use noise with specified power */ - fixed32 tmp = fixdiv32(exp_power[j],exp_power[last_high_band]); - - /*mult1 is 48.16, pow_table is 48.16*/ - mult1 = fixmul32(fixsqrt32(tmp), - pow_table[s->high_band_values[ch][j]+20]) >> 16; - - /*this step has a fairly high degree of error for some reason*/ - mult1 = fixdiv64(mult1,fixmul32(s->max_exponent[ch],s->noise_mult)); - mult1 = mult1*mdct_norm>>PRECISION; - for(i = 0;i < n; ++i) - { - noise = s->noise_table[s->noise_index]; - s->noise_index = (s->noise_index + 1) & (NOISE_TAB_SIZE - 1); - *coefs++ = fixmul32((fixmul32(exponents[i<>esize],noise)>>4), - Fixed32From64(mult1)) >>2; - - } - exponents += n<noise_table[s->noise_index]; - s->noise_index = (s->noise_index + 1) & (NOISE_TAB_SIZE - 1); - - /*don't forget to renormalize the noise*/ - temp1 = (((int32_t)*coefs1++)<<16) + (noise>>4); - temp2 = fixmul32(exponents[i<>esize], mult>>18); - *coefs++ = fixmul32(temp1, temp2); - } - exponents += n<block_len - s->coefs_end[bsize]; - mult2 = fixmul32(mult>>16,exponents[((-1<>esize]) ; - for (i = 0; i < n; ++i) - { - /*renormalize the noise product and then reduce to 14.18 precison*/ - *coefs++ = fixmul32(s->noise_table[s->noise_index],mult2) >>6; - - s->noise_index = (s->noise_index + 1) & (NOISE_TAB_SIZE - 1); - } - } - else - { - /*Noise coding not used, simply convert from exp to fixed representation*/ - - fixed32 mult3 = (fixed32)(fixdiv64(pow_table[total_gain+20], - Fixed32To64(s->max_exponent[ch]))); - mult3 = fixmul32(mult3, mdct_norm); - - /*zero the first 3 coefficients for WMA V1, does nothing otherwise*/ - for(i=0; icoefs_start; i++) - *coefs++=0; - - n = nb_coefs[ch]; - - /* XXX: optimize more, unrolling this loop in asm - might be a good idea */ - - for(i = 0;i < n; ++i) - { - /*ffmpeg imdct needs 15.17, while tremor 14.18*/ - atemp = (coefs1[i] * mult3)>>2; - *coefs++=fixmul32(atemp,exponents[i<>esize]); - } - n = s->block_len - s->coefs_end[bsize]; - memset(coefs, 0, n*sizeof(fixed32)); - } - } - } - - - - if (s->ms_stereo && s->channel_coded[1]) - { - fixed32 a, b; - int i; - fixed32 (*coefs)[MAX_CHANNELS][BLOCK_MAX_SIZE] = (s->coefs); - - /* nominal case for ms stereo: we do it before mdct */ - /* no need to optimize this case because it should almost - never happen */ - if (!s->channel_coded[0]) - { - memset((*(s->coefs))[0], 0, sizeof(fixed32) * s->block_len); - s->channel_coded[0] = 1; - } - - for(i = 0; i < s->block_len; ++i) - { - a = (*coefs)[0][i]; - b = (*coefs)[1][i]; - (*coefs)[0][i] = a + b; - (*coefs)[1][i] = a - b; - } - } - - for(ch = 0; ch < s->nb_channels; ++ch) - { - if (s->channel_coded[ch]) - { - int n4, index; - - n4 = s->block_len >>1; - - /*faster IMDCT from Vorbis*/ - mdct_backward( (1 << (s->block_len_bits+1)), (int32_t*)(*(s->coefs))[ch], (int32_t*)scratch_buffer); - - /*slower but more easily understood IMDCT from FFMPEG*/ - //ff_imdct_calc(&s->mdct_ctx[bsize], - // output, - // (*(s->coefs))[ch]); - - - /* add in the frame */ - index = (s->frame_len / 2) + s->block_pos - n4; - wma_window(s, scratch_buffer, &((*s->frame_out)[ch][index])); - - /* specific fast case for ms-stereo : add to second - channel if it is not coded */ - if (s->ms_stereo && !s->channel_coded[1]) - { - wma_window(s, scratch_buffer, &((*s->frame_out)[1][index])); - } - } - } -next: - /* update block number */ - ++s->block_num; - s->block_pos += s->block_len; - if (s->block_pos >= s->frame_len) - { - return 1; - } - else - { - return 0; - } -} - -/* decode a frame of frame_len samples */ -static int wma_decode_frame(WMADecodeContext *s, int32_t *samples) -{ - int ret, i, n, ch, incr; - int32_t *ptr; - fixed32 *iptr; - - /* read each block */ - s->block_num = 0; - s->block_pos = 0; - - - for(;;) - { - ret = wma_decode_block(s, samples); - if (ret < 0) - { - DEBUGF("wma_decode_block failed with code %d\n", ret); - return -1; - } - if (ret) - { - break; - } - } - - /* return frame with full 30-bit precision */ - n = s->frame_len; - incr = s->nb_channels; - for(ch = 0; ch < s->nb_channels; ++ch) - { - ptr = samples + ch; - iptr = &((*s->frame_out)[ch][0]); - - for (i=0;iframe_out)[ch][0]), &((*s->frame_out)[ch][s->frame_len]), - s->frame_len * sizeof(fixed32)); - } - - return 0; -} - -/* Initialise the superframe decoding */ - -int wma_decode_superframe_init(WMADecodeContext* s, - const uint8_t *buf, /*input*/ - int buf_size) -{ - if (buf_size==0) - { - s->last_superframe_len = 0; - return 0; - } - - s->current_frame = 0; - - init_get_bits(&s->gb, buf, buf_size*8); - - if (s->use_bit_reservoir) - { - /* read super frame header */ - skip_bits(&s->gb, 4); /* super frame index */ - s->nb_frames = get_bits(&s->gb, 4); - - if (s->last_superframe_len == 0) - s->nb_frames --; - else if (s->nb_frames == 0) - s->nb_frames++; - - s->bit_offset = get_bits(&s->gb, s->byte_offset_bits + 3); - } else { - s->nb_frames = 1; - } - - return 1; -} - - -/* Decode a single frame in the current superframe - return -1 if - there was a decoding error, or the number of samples decoded. -*/ -int wma_decode_superframe_frame(WMADecodeContext* s, - int32_t* samples, /*output*/ - const uint8_t *buf, /*input*/ - int buf_size) -{ - int pos, len; - uint8_t *q; - int done = 0; - if ((s->use_bit_reservoir) && (s->current_frame == 0)) - { - if (s->last_superframe_len > 0) - { - /* add s->bit_offset bits to last frame */ - if ((s->last_superframe_len + ((s->bit_offset + 7) >> 3)) > - MAX_CODED_SUPERFRAME_SIZE) - { - DEBUGF("superframe size too large error\n"); - goto fail; - } - q = s->last_superframe + s->last_superframe_len; - len = s->bit_offset; - while (len > 7) - { - *q++ = (get_bits)(&s->gb, 8); - len -= 8; - } - if (len > 0) - { - *q++ = (get_bits)(&s->gb, len) << (8 - len); - } - - /* XXX: s->bit_offset bits into last frame */ - init_get_bits(&s->gb, s->last_superframe, MAX_CODED_SUPERFRAME_SIZE*8); - /* skip unused bits */ - if (s->last_bitoffset > 0) - skip_bits(&s->gb, s->last_bitoffset); - - /* this frame is stored in the last superframe and in the - current one */ - if (wma_decode_frame(s, samples) < 0) - { - goto fail; - } - done = 1; - } - - /* read each frame starting from s->bit_offset */ - pos = s->bit_offset + 4 + 4 + s->byte_offset_bits + 3; - init_get_bits(&s->gb, buf + (pos >> 3), (MAX_CODED_SUPERFRAME_SIZE - (pos >> 3))*8); - len = pos & 7; - if (len > 0) - skip_bits(&s->gb, len); - - s->reset_block_lengths = 1; - } - - /* If we haven't decoded a frame yet, do it now */ - if (!done) - { - if (wma_decode_frame(s, samples) < 0) - { - goto fail; - } - } - - s->current_frame++; - - if ((s->use_bit_reservoir) && (s->current_frame == s->nb_frames)) - { - /* we copy the end of the frame in the last frame buffer */ - pos = get_bits_count(&s->gb) + ((s->bit_offset + 4 + 4 + s->byte_offset_bits + 3) & ~7); - s->last_bitoffset = pos & 7; - pos >>= 3; - len = buf_size - pos; - if (len > MAX_CODED_SUPERFRAME_SIZE || len < 0) - { - DEBUGF("superframe size too large error after decoding\n"); - goto fail; - } - s->last_superframe_len = len; - memcpy(s->last_superframe, buf + pos, len); - } - - return s->frame_len; - -fail: - /* when error, we reset the bit reservoir */ - - s->last_superframe_len = 0; - return -1; -} diff --git a/bsp/stm32_radio/libwma/wmafixed.c b/bsp/stm32_radio/libwma/wmafixed.c deleted file mode 100644 index e68aaa0e7b..0000000000 --- a/bsp/stm32_radio/libwma/wmafixed.c +++ /dev/null @@ -1,231 +0,0 @@ -/**************************************************************************** - * __________ __ ___. - * Open \______ \ ____ ____ | | _\_ |__ _______ ___ - * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / - * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < - * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ - * \/ \/ \/ \/ \/ - * - * Copyright (C) 2007 Michael Giacomelli - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version 2 - * of the License, or (at your option) any later version. - * - * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY - * KIND, either express or implied. - * - ****************************************************************************/ - -#include "wmadec.h" -#include "wmafixed.h" -// #include - -fixed64 IntTo64(int x){ - fixed64 res = 0; - unsigned char *p = (unsigned char *)&res; - -#ifdef ROCKBOX_BIG_ENDIAN - p[5] = x & 0xff; - p[4] = (x & 0xff00)>>8; - p[3] = (x & 0xff0000)>>16; - p[2] = (x & 0xff000000)>>24; -#else - p[2] = x & 0xff; - p[3] = (x & 0xff00)>>8; - p[4] = (x & 0xff0000)>>16; - p[5] = (x & 0xff000000)>>24; -#endif - return res; -} - -int IntFrom64(fixed64 x) -{ - int res = 0; - unsigned char *p = (unsigned char *)&x; - -#ifdef ROCKBOX_BIG_ENDIAN - res = p[5] | (p[4]<<8) | (p[3]<<16) | (p[2]<<24); -#else - res = p[2] | (p[3]<<8) | (p[4]<<16) | (p[5]<<24); -#endif - return res; -} - -fixed32 Fixed32From64(fixed64 x) -{ - return x & 0xFFFFFFFF; -} - -fixed64 Fixed32To64(fixed32 x) -{ - return (fixed64)x; -} - -/* - Not performance senstitive code here -*/ -fixed64 fixmul64byfixed(fixed64 x, fixed32 y) -{ - //return x * y; - return (x * y); - // return (fixed64) fixmul32(Fixed32From64(x),y); -} - -fixed32 fixdiv32(fixed32 x, fixed32 y) -{ - fixed64 temp; - - if(x == 0) - return 0; - if(y == 0) - return 0x7fffffff; - temp = x; - temp <<= PRECISION; - return (fixed32)(temp / y); -} - -fixed64 fixdiv64(fixed64 x, fixed64 y) -{ - fixed64 temp; - - if(x == 0) - return 0; - if(y == 0) - return 0x07ffffffffffffffLL; - temp = x; - temp <<= PRECISION64; - return (fixed64)(temp / y); -} - -fixed32 fixsqrt32(fixed32 x) -{ - unsigned long r = 0, s, v = (unsigned long)x; - -#define STEP(k) s = r + (1 << k * 2); r >>= 1; \ - if (s <= v) { v -= s; r |= (1 << k * 2); } - - STEP(15); - STEP(14); - STEP(13); - STEP(12); - STEP(11); - STEP(10); - STEP(9); - STEP(8); - STEP(7); - STEP(6); - STEP(5); - STEP(4); - STEP(3); - STEP(2); - STEP(1); - STEP(0); - - return (fixed32)(r << (PRECISION / 2)); -} - -/* Inverse gain of circular cordic rotation in s0.31 format. */ -static const long cordic_circular_gain = 0xb2458939; /* 0.607252929 */ - -/* Table of values of atan(2^-i) in 0.32 format fractions of pi where pi = 0xffffffff / 2 */ -static const unsigned long atan_table[] = { - 0x1fffffff, /* +0.785398163 (or pi/4) */ - 0x12e4051d, /* +0.463647609 */ - 0x09fb385b, /* +0.244978663 */ - 0x051111d4, /* +0.124354995 */ - 0x028b0d43, /* +0.062418810 */ - 0x0145d7e1, /* +0.031239833 */ - 0x00a2f61e, /* +0.015623729 */ - 0x00517c55, /* +0.007812341 */ - 0x0028be53, /* +0.003906230 */ - 0x00145f2e, /* +0.001953123 */ - 0x000a2f98, /* +0.000976562 */ - 0x000517cc, /* +0.000488281 */ - 0x00028be6, /* +0.000244141 */ - 0x000145f3, /* +0.000122070 */ - 0x0000a2f9, /* +0.000061035 */ - 0x0000517c, /* +0.000030518 */ - 0x000028be, /* +0.000015259 */ - 0x0000145f, /* +0.000007629 */ - 0x00000a2f, /* +0.000003815 */ - 0x00000517, /* +0.000001907 */ - 0x0000028b, /* +0.000000954 */ - 0x00000145, /* +0.000000477 */ - 0x000000a2, /* +0.000000238 */ - 0x00000051, /* +0.000000119 */ - 0x00000028, /* +0.000000060 */ - 0x00000014, /* +0.000000030 */ - 0x0000000a, /* +0.000000015 */ - 0x00000005, /* +0.000000007 */ - 0x00000002, /* +0.000000004 */ - 0x00000001, /* +0.000000002 */ - 0x00000000, /* +0.000000001 */ - 0x00000000, /* +0.000000000 */ -}; - - -/* - Below here functions do not use standard fixed precision! -*/ - -/** - * Implements sin and cos using CORDIC rotation. - * - * @param phase has range from 0 to 0xffffffff, representing 0 and - * 2*pi respectively. - * @param cos return address for cos - * @return sin of phase, value is a signed value from LONG_MIN to LONG_MAX, - * representing -1 and 1 respectively. - * - * Gives at least 24 bits precision (last 2-8 bits or so are probably off) - */ -long fsincos(unsigned long phase, fixed32 *cos) -{ - int32_t x, x1, y, y1; - unsigned long z, z1; - int i; - - /* Setup initial vector */ - x = cordic_circular_gain; - y = 0; - z = phase; - - /* The phase has to be somewhere between 0..pi for this to work right */ - if (z < 0xffffffff / 4) { - /* z in first quadrant, z += pi/2 to correct */ - x = -x; - z += 0xffffffff / 4; - } else if (z < 3 * (0xffffffff / 4)) { - /* z in third quadrant, z -= pi/2 to correct */ - z -= 0xffffffff / 4; - } else { - /* z in fourth quadrant, z -= 3pi/2 to correct */ - x = -x; - z -= 3 * (0xffffffff / 4); - } - - /* Each iteration adds roughly 1-bit of extra precision */ - for (i = 0; i < 31; i++) { - x1 = x >> i; - y1 = y >> i; - z1 = atan_table[i]; - - /* Decided which direction to rotate vector. Pivot point is pi/2 */ - if (z >= 0xffffffff / 4) { - x -= y1; - y += x1; - z -= z1; - } else { - x += y1; - y -= x1; - z += z1; - } - } - - if (cos) - *cos = x; - - return y; -} diff --git a/bsp/stm32_radio/libwma/wmafixed.h b/bsp/stm32_radio/libwma/wmafixed.h deleted file mode 100644 index fb31cf8bfa..0000000000 --- a/bsp/stm32_radio/libwma/wmafixed.h +++ /dev/null @@ -1,144 +0,0 @@ -/**************************************************************************** - * __________ __ ___. - * Open \______ \ ____ ____ | | _\_ |__ _______ ___ - * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / - * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < - * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ - * \/ \/ \/ \/ \/ - * - * Copyright (C) 2007 Michael Giacomelli - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version 2 - * of the License, or (at your option) any later version. - * - * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY - * KIND, either express or implied. - * - ****************************************************************************/ - -/* fixed precision code. We use a combination of Sign 15.16 and Sign.31 - precision here. - - The WMA decoder does not always follow this convention, and occasionally - renormalizes values to other formats in order to maximize precision. - However, only the two precisions above are provided in this file. - -*/ - -#include "types.h" - -#define PRECISION 16 -#define PRECISION64 16 - - -#define fixtof64(x) (float)((float)(x) / (float)(1 << PRECISION64)) //does not work on int64_t! -#define ftofix32(x) ((fixed32)((x) * (float)(1 << PRECISION) + ((x) < 0 ? -0.5 : 0.5))) -#define itofix64(x) (IntTo64(x)) -#define itofix32(x) ((x) << PRECISION) -#define fixtoi32(x) ((x) >> PRECISION) -#define fixtoi64(x) (IntFrom64(x)) - - -/*fixed functions*/ - -fixed64 IntTo64(int x); -int IntFrom64(fixed64 x); -fixed32 Fixed32From64(fixed64 x); -fixed64 Fixed32To64(fixed32 x); -fixed64 fixmul64byfixed(fixed64 x, fixed32 y); -fixed32 fixdiv32(fixed32 x, fixed32 y); -fixed64 fixdiv64(fixed64 x, fixed64 y); -fixed32 fixsqrt32(fixed32 x); -long fsincos(unsigned long phase, fixed32 *cos); - -#ifdef CPU_ARM - -/*Sign-15.16 format */ - -#define fixmul32(x, y) \ - ({ int32_t __hi; \ - uint32_t __lo; \ - int32_t __result; \ - asm ("smull %0, %1, %3, %4\n\t" \ - "movs %0, %0, lsr %5\n\t" \ - "adc %2, %0, %1, lsl %6" \ - : "=&r" (__lo), "=&r" (__hi), "=r" (__result) \ - : "%r" (x), "r" (y), \ - "M" (PRECISION), "M" (32 - PRECISION) \ - : "cc"); \ - __result; \ - }) - -#define fixmul32b(x, y) \ - ({ int32_t __hi; \ - uint32_t __lo; \ - int32_t __result; \ - asm ("smull %0, %1, %3, %4\n\t" \ - "movs %2, %1, lsl #1" \ - : "=&r" (__lo), "=&r" (__hi), "=r" (__result) \ - : "%r" (x), "r" (y) \ - : "cc"); \ - __result; \ - }) - -#elif defined(CPU_COLDFIRE) - -static inline int32_t fixmul32(int32_t x, int32_t y) -{ -#if PRECISION != 16 -#warning Coldfire fixmul32() only works for PRECISION == 16 -#endif - int32_t t1; - asm ( - "mac.l %[x], %[y], %%acc0 \n" /* multiply */ - "mulu.l %[y], %[x] \n" /* get lower half, avoid emac stall */ - "movclr.l %%acc0, %[t1] \n" /* get higher half */ - "lsr.l #1, %[t1] \n" - "move.w %[t1], %[x] \n" - "swap %[x] \n" - : [t1] "=&d" (t1), [x] "+d" (x) - : [y] "d" (y) - ); - return x; -} - -static inline int32_t fixmul32b(int32_t x, int32_t y) -{ - asm ( - "mac.l %[x], %[y], %%acc0 \n" /* multiply */ - "movclr.l %%acc0, %[x] \n" /* get higher half */ - : [x] "+d" (x) - : [y] "d" (y) - ); - return x; -} - -#else - -static inline fixed32 fixmul32(fixed32 x, fixed32 y) -{ - fixed64 temp; - temp = x; - temp *= y; - - temp >>= PRECISION; - - return (fixed32)temp; -} - -static inline fixed32 fixmul32b(fixed32 x, fixed32 y) -{ - fixed64 temp; - - temp = x; - temp *= y; - - temp >>= 31; //16+31-16 = 31 bits - - return (fixed32)temp; -} - -#endif - diff --git a/bsp/stm32_radio/mp3.c b/bsp/stm32_radio/mp3.c deleted file mode 100644 index a9ac94fef8..0000000000 --- a/bsp/stm32_radio/mp3.c +++ /dev/null @@ -1,626 +0,0 @@ -#include -#include -#include -#include - -#include "board.h" -#include "netbuffer.h" -#include "player_ui.h" -#include "player_bg.h" -#include "codec.h" - -#define MP3_AUDIO_BUF_SZ (5 * 1024) -#ifndef MIN -#define MIN(x, y) ((x) < (y)? (x) : (y)) -#endif - -rt_uint8_t mp3_fd_buffer[MP3_AUDIO_BUF_SZ]; -int current_sample_rate = 0; - -struct mp3_decoder -{ - /* mp3 information */ - HMP3Decoder decoder; - MP3FrameInfo frame_info; - rt_uint32_t frames; - - /* mp3 file descriptor */ - rt_size_t (*fetch_data)(void* parameter, rt_uint8_t *buffer, rt_size_t length); - void* fetch_parameter; - - /* mp3 read session */ - rt_uint8_t *read_buffer, *read_ptr; - rt_int32_t read_offset; - rt_uint32_t bytes_left, bytes_left_before_decoding; - - /* audio device */ - rt_device_t snd_device; -}; - -static rt_err_t mp3_decoder_tx_done(rt_device_t dev, void *buffer) -{ - /* release memory block */ - sbuf_release(buffer); - - return RT_EOK; -} - -void mp3_decoder_init(struct mp3_decoder* decoder) -{ - RT_ASSERT(decoder != RT_NULL); - - /* init read session */ - decoder->read_ptr = RT_NULL; - decoder->bytes_left_before_decoding = decoder->bytes_left = 0; - decoder->frames = 0; - - // decoder->read_buffer = rt_malloc(MP3_AUDIO_BUF_SZ); - decoder->read_buffer = &mp3_fd_buffer[0]; - if (decoder->read_buffer == RT_NULL) return; - - decoder->decoder = MP3InitDecoder(); - - /* open audio device */ - decoder->snd_device = rt_device_find("snd"); - if (decoder->snd_device != RT_NULL) - { - /* set tx complete call back function */ - rt_device_set_tx_complete(decoder->snd_device, mp3_decoder_tx_done); - rt_device_open(decoder->snd_device, RT_DEVICE_OFLAG_WRONLY); - } -} - -void mp3_decoder_detach(struct mp3_decoder* decoder) -{ - RT_ASSERT(decoder != RT_NULL); - - /* close audio device */ - if (decoder->snd_device != RT_NULL) - rt_device_close(decoder->snd_device); - - /* release mp3 decoder */ - MP3FreeDecoder(decoder->decoder); -} - -struct mp3_decoder* mp3_decoder_create() -{ - struct mp3_decoder* decoder; - - /* allocate object */ - decoder = (struct mp3_decoder*) rt_malloc (sizeof(struct mp3_decoder)); - if (decoder != RT_NULL) - { - mp3_decoder_init(decoder); - } - - return decoder; -} - -void mp3_decoder_delete(struct mp3_decoder* decoder) -{ - RT_ASSERT(decoder != RT_NULL); - - /* de-init mp3 decoder object */ - mp3_decoder_detach(decoder); - /* release this object */ - rt_free(decoder); -} - -rt_uint32_t current_offset = 0; -static rt_int32_t mp3_decoder_fill_buffer(struct mp3_decoder* decoder) -{ - rt_size_t bytes_read; - rt_size_t bytes_to_read; - - // rt_kprintf("left: %d. refilling inbuffer...\n", decoder->bytes_left); - if (decoder->bytes_left > 0) - { - // better: move unused rest of buffer to the start - rt_memmove(decoder->read_buffer, decoder->read_ptr, decoder->bytes_left); - } - - bytes_to_read = (MP3_AUDIO_BUF_SZ - decoder->bytes_left) & ~(512 - 1); - - bytes_read = decoder->fetch_data(decoder->fetch_parameter, - (rt_uint8_t *)(decoder->read_buffer + decoder->bytes_left), - bytes_to_read); - - if (bytes_read != 0) - { - decoder->read_ptr = decoder->read_buffer; - decoder->read_offset = 0; - decoder->bytes_left = decoder->bytes_left + bytes_read; - return 0; - } - else - { - rt_kprintf("can't read more data\n"); - return -1; - } -} - -int mp3_decoder_run(struct mp3_decoder* decoder) -{ - int err; - rt_uint16_t* buffer; - rt_uint32_t delta; - - RT_ASSERT(decoder != RT_NULL); - - if (player_is_playing() != RT_TRUE) return -1; - - if ((decoder->read_ptr == RT_NULL) || decoder->bytes_left < 2*MAINBUF_SIZE) - { - if(mp3_decoder_fill_buffer(decoder) != 0) - return -1; - } - - // rt_kprintf("read offset: 0x%08x\n", decoder->read_ptr - decoder->read_buffer); - decoder->read_offset = MP3FindSyncWord(decoder->read_ptr, decoder->bytes_left); - if (decoder->read_offset < 0) - { - /* discard this data */ - rt_kprintf("outof sync, byte left: %d\n", decoder->bytes_left); - - decoder->bytes_left = 0; - return 0; - } - - decoder->read_ptr += decoder->read_offset; - delta = decoder->read_offset; - decoder->bytes_left -= decoder->read_offset; - if (decoder->bytes_left < 1024) - { - /* fill more data */ - if(mp3_decoder_fill_buffer(decoder) != 0) - return -1; - } - - /* get a decoder buffer */ - buffer = (rt_uint16_t*)sbuf_alloc(); - decoder->bytes_left_before_decoding = decoder->bytes_left; - - err = MP3Decode(decoder->decoder, &decoder->read_ptr, - (int*)&decoder->bytes_left, (short*)buffer, 0); - delta += (decoder->bytes_left_before_decoding - decoder->bytes_left); - - current_offset += delta; - if (player_get_mode() != PLAYER_PLAY_RADIO) - player_set_position(current_offset); - - // rt_kprintf("bytes left after decode: %d\n", decoder->bytes_left); - - decoder->frames++; - - if (err != ERR_MP3_NONE) - { - switch (err) - { - case ERR_MP3_INDATA_UNDERFLOW: - rt_kprintf("ERR_MP3_INDATA_UNDERFLOW\n"); - decoder->bytes_left = 0; - if(mp3_decoder_fill_buffer(decoder) != 0) - { - /* release this memory block */ - sbuf_release(buffer); - return -1; - } - break; - - case ERR_MP3_MAINDATA_UNDERFLOW: - /* do nothing - next call to decode will provide more mainData */ - rt_kprintf("ERR_MP3_MAINDATA_UNDERFLOW\n"); - break; - - default: - rt_kprintf("unknown error: %d, left: %d\n", err, decoder->bytes_left); - - // skip this frame - if (decoder->bytes_left > 0) - { - decoder->bytes_left --; - decoder->read_ptr ++; - } - else - { - // TODO - RT_ASSERT(0); - } - break; - } - - /* release this memory block */ - sbuf_release(buffer); - } - else - { - int outputSamps; - /* no error */ - MP3GetLastFrameInfo(decoder->decoder, &decoder->frame_info); - - /* set sample rate */ - if (decoder->frame_info.samprate != current_sample_rate) - { - current_sample_rate = decoder->frame_info.samprate; - rt_device_control(decoder->snd_device, CODEC_CMD_SAMPLERATE, ¤t_sample_rate); - } - - /* write to sound device */ - outputSamps = decoder->frame_info.outputSamps; - if (outputSamps > 0) - { - if (decoder->frame_info.nChans == 1) - { - int i; - for (i = outputSamps - 1; i >= 0; i--) - { - buffer[i * 2] = buffer[i]; - buffer[i * 2 + 1] = buffer[i]; - } - outputSamps *= 2; - } - - rt_device_write(decoder->snd_device, 0, buffer, outputSamps * sizeof(rt_uint16_t)); - } - else - { - /* no output */ - sbuf_release(buffer); - } - } - - return 0; -} - -static int mp3_parse_id3v1(int fd, struct tag_info *info) -{ - lseek(fd, -128, SEEK_END); - read(fd, (char *) mp3_fd_buffer, 128); - - /* ID3v1 */ - if (strncmp("TAG", (char *) mp3_fd_buffer, 3) == 0) - { - strncpy(info->title, (char *) mp3_fd_buffer + 3, MIN(30, sizeof(info->title) - 1)); - strncpy(info->artist, (char *) mp3_fd_buffer + 3 + 30, MIN(30, sizeof(info->artist) - 1)); - return 0; - } - return -1; -} - -static int mp3_parse_id3v2(int fd, struct tag_info *info) -{ - rt_uint32_t p = 0; - - lseek(fd, 0, SEEK_SET); - read(fd, (char *) mp3_fd_buffer, sizeof(mp3_fd_buffer)); - - if (strncmp("ID3", (char *) mp3_fd_buffer, 3) == 0) - { - rt_uint32_t tag_size, frame_size, i; - rt_uint8_t version_major; - int frame_header_size; - - tag_size = ((rt_uint32_t) mp3_fd_buffer[6] << 21) | ((rt_uint32_t) mp3_fd_buffer[7] << 14) | ((rt_uint16_t) mp3_fd_buffer[8] << 7) | mp3_fd_buffer[9]; - info->data_start = tag_size; - version_major = mp3_fd_buffer[3]; - if (version_major >= 3) - { - frame_header_size = 10; - } - else - { - frame_header_size = 6; - } - i = p = 10; - - // iterate through frames - while (p < tag_size) - { - if (version_major >= 3) - { - frame_size = ((rt_uint32_t) mp3_fd_buffer[i + 4] << 24) | ((rt_uint32_t) mp3_fd_buffer[i + 5] << 16) | ((rt_uint16_t) mp3_fd_buffer[i + 6] << 8) | mp3_fd_buffer[i + 7]; - } - else - { - frame_size = ((rt_uint32_t) mp3_fd_buffer[i + 3] << 14) | ((rt_uint16_t) mp3_fd_buffer[i + 4] << 7) | mp3_fd_buffer[i + 5]; - } - if (i + frame_size + frame_header_size + frame_header_size >= sizeof(mp3_fd_buffer)) - { - if (frame_size + frame_header_size > sizeof(mp3_fd_buffer)) - { - lseek(fd, p + frame_size + frame_header_size, SEEK_CUR); - read(fd, (char *) mp3_fd_buffer, sizeof(mp3_fd_buffer)); - p += frame_size + frame_header_size; - i = 0; - continue; - } - else - { - int r = sizeof(mp3_fd_buffer) - i; - memmove(mp3_fd_buffer, mp3_fd_buffer + i, r); - read(fd, (char *) mp3_fd_buffer + r, i); - i = 0; - } - } - - if (strncmp("TT2", (char *) mp3_fd_buffer + i, 3) == 0 || strncmp("TIT2", (char *) mp3_fd_buffer + i, 4) == 0) - { - strncpy(info->title, (char *) mp3_fd_buffer + i + frame_header_size + 1, MIN(frame_size - 1, sizeof(info->title) - 1)); - } - else if (strncmp("TP1", (char *) mp3_fd_buffer + i, 3) == 0 || strncmp("TPE1", (char *) mp3_fd_buffer + i, 4) == 0) - { - strncpy(info->artist, (char *) mp3_fd_buffer + i + frame_header_size + 1, MIN(frame_size - 1, sizeof(info->artist) - 1)); - } - - p += frame_size + frame_header_size; - i += frame_size + frame_header_size; - } - - return 0; - } - - return -1; -} - -/* get mp3 information */ -void mp3_get_info(const char* filename, struct tag_info* info) -{ - int fd; - rt_size_t bytes_read; - int sync_word; - HMP3Decoder decoder; - MP3FrameInfo frame_info; - - if (filename == RT_NULL || info == RT_NULL) return; - - fd = open(filename, O_RDONLY, 0); - if (fd < 0) return; /* can't read file */ - - /* init decoder */ - decoder = MP3InitDecoder(); - - info->data_start = 0; - - /* - * TODO - Add UTF-8 support and fix this. - * - * ID3 v2 is generally useless here, because it - * uses UTF-8 encoding, which we can't handle right now. - * But parsing v2 first is nesessary in order to - * find the correct MP3 frame header location, - * in case of the ID3 v2 tag should be there. - */ -// if (mp3_parse_id3v2(fd, info) < 0) -// { -// // ID3 v2 is not available. Fall back to ID3 v1. -// mp3_parse_id3v1(fd, info); -// } - mp3_parse_id3v2(fd, info); - mp3_parse_id3v1(fd, info); - - lseek(fd, info->data_start, SEEK_SET); - bytes_read = read(fd, (char *) mp3_fd_buffer, sizeof(mp3_fd_buffer)); - - /* get frame information */ - sync_word = MP3FindSyncWord(mp3_fd_buffer, bytes_read); - if (sync_word >= 0) - { - rt_uint32_t p; - short samples_per_frame; - - /* get frame information */ - MP3GetNextFrameInfo(decoder, &frame_info, &mp3_fd_buffer[sync_word]); - - // Try to locate the Xing VBR header. - if (frame_info.version == MPEG1) - { - p = frame_info.nChans == 2 ? 32 : 17; - samples_per_frame = 1152; - } - else - { - p = frame_info.nChans == 2 ? 17 : 9; - samples_per_frame = 576; - } - p += sync_word + 4; - - if (strncmp("Xing", (char *) mp3_fd_buffer + p, 4) == 0 || strncmp("Info", (char *) mp3_fd_buffer + p, 4) == 0) - { - // VBR - if (mp3_fd_buffer[p + 7] & 1 == 1) /* Checks if the frames field exists */ - { - rt_uint32_t frames = ((rt_uint32_t) mp3_fd_buffer[p + 8] << 24) | ((rt_uint32_t) mp3_fd_buffer[p + 9] << 16) | ((rt_uint32_t) mp3_fd_buffer[p + 10] << 8) | (rt_uint32_t) mp3_fd_buffer[p + 11]; - info->duration = frames * samples_per_frame / frame_info.samprate; - info->bit_rate = lseek(fd, 0, SEEK_END) * 8 / info->duration; - } - else - { - // Calculate as CBR - info->duration = lseek(fd, 0, SEEK_END) / (frame_info.bitrate / 8); /* second */ - info->bit_rate = frame_info.bitrate; - } - } - /* - * There're two other rarely used VBR header standards: VBRI & MLLT. - * I can't find any sample with these headers. So I just ignored them. :) - */ - else - { - // CBR - info->duration = lseek(fd, 0, SEEK_END) / (frame_info.bitrate / 8); /* second */ - info->bit_rate = frame_info.bitrate; - } - info->sampling = frame_info.samprate; - } - - /* set current position */ - info->position = 0; - - /* release mp3 decoder */ - MP3FreeDecoder(decoder); - - /* close file */ - close(fd); -} - -#include -rt_size_t fd_fetch(void* parameter, rt_uint8_t *buffer, rt_size_t length) -{ - int fd = (int)parameter; - int read_bytes; - - read_bytes = read(fd, (char*)buffer, length); - if (read_bytes <= 0) return 0; - - return read_bytes; -} - -void mp3(char* filename) -{ - int fd; - struct mp3_decoder* decoder; - extern rt_bool_t is_playing; - - is_playing = RT_TRUE; - fd = open(filename, O_RDONLY, 0); - if (fd >= 0) - { - decoder = mp3_decoder_create(); - if (decoder != RT_NULL) - { - decoder->fetch_data = fd_fetch; - decoder->fetch_parameter = (void*)fd; - - current_offset = 0; - while (mp3_decoder_run(decoder) != -1); - - /* delete decoder object */ - mp3_decoder_delete(decoder); - } - close(fd); - } - is_playing = RT_FALSE; -} -FINSH_FUNCTION_EXPORT(mp3, mp3 decode test); - -#if STM32_EXT_SRAM -/* http mp3 */ -#include "http.h" -static rt_size_t http_fetch(rt_uint8_t* ptr, rt_size_t len, void* parameter) -{ - struct http_session* session = (struct http_session*)parameter; - RT_ASSERT(session != RT_NULL); - - return http_session_read(session, ptr, len); -} - -static void http_close(void* parameter) -{ - struct http_session* session = (struct http_session*)parameter; - RT_ASSERT(session != RT_NULL); - - http_session_close(session); -} - -rt_size_t http_data_fetch(void* parameter, rt_uint8_t *buffer, rt_size_t length) -{ - return net_buf_read(buffer, length); -} - -void http_mp3(char* url) -{ - struct http_session* session; - struct mp3_decoder* decoder; - extern rt_bool_t is_playing; - - is_playing = RT_TRUE; - - session = http_session_open(url); - if (session != RT_NULL) - { - /* start a job to netbuf worker */ - if (net_buf_start_job(http_fetch, http_close, (void*)session) == 0) - { - decoder = mp3_decoder_create(); - if (decoder != RT_NULL) - { - decoder->fetch_data = http_data_fetch; - decoder->fetch_parameter = RT_NULL; - - current_offset = 0; - while (mp3_decoder_run(decoder) != -1); - - /* delete decoder object */ - mp3_decoder_delete(decoder); - } - session = RT_NULL; - } - else - { - /* start job failed, close session */ - http_session_close(session); - } - } -} -FINSH_FUNCTION_EXPORT(http_mp3, http mp3 decode test); - -/* ice mp3 */ -static rt_size_t ice_fetch(rt_uint8_t* ptr, rt_size_t len, void* parameter) -{ - struct shoutcast_session* session = (struct shoutcast_session*)parameter; - RT_ASSERT(session != RT_NULL); - - return shoutcast_session_read(session, ptr, len); -} - -static void ice_close(void* parameter) -{ - struct shoutcast_session* session = (struct shoutcast_session*)parameter; - RT_ASSERT(session != RT_NULL); - - shoutcast_session_close(session); -} - -rt_size_t ice_data_fetch(void* parameter, rt_uint8_t *buffer, rt_size_t length) -{ - return net_buf_read(buffer, length); -} - -void ice_mp3(char* url) -{ - struct shoutcast_session* session; - struct mp3_decoder* decoder; - extern rt_bool_t is_playing; - - is_playing = RT_TRUE; - - session = shoutcast_session_open(url); - if (session != RT_NULL) - { - /* start a job to netbuf worker */ - if (net_buf_start_job(ice_fetch, ice_close, (void*)session) == 0) - { - decoder = mp3_decoder_create(); - if (decoder != RT_NULL) - { - decoder->fetch_data = ice_data_fetch; - decoder->fetch_parameter = RT_NULL; - - current_offset = 0; - while (mp3_decoder_run(decoder) != -1); - - /* delete decoder object */ - mp3_decoder_delete(decoder); - } - session = RT_NULL; - } - else - { - /* start a job failed, close session */ - shoutcast_session_close(session); - } - } -} -FINSH_FUNCTION_EXPORT(ice_mp3, shoutcast mp3 decode test); - -#endif diff --git a/bsp/stm32_radio/mp3.h b/bsp/stm32_radio/mp3.h deleted file mode 100644 index c15011983f..0000000000 --- a/bsp/stm32_radio/mp3.h +++ /dev/null @@ -1,12 +0,0 @@ -#ifndef __MP3_H__ -#define __MP3_H__ - -#include "player_ui.h" - -void mp3_get_info(const char* filename, struct tag_info* info); - -void mp3(char* filename); -void http_mp3(char* url); -void ice_mp3(char* url); - -#endif diff --git a/bsp/stm32_radio/mp3/mp3dec.c b/bsp/stm32_radio/mp3/mp3dec.c deleted file mode 100644 index 9dfef6198d..0000000000 --- a/bsp/stm32_radio/mp3/mp3dec.c +++ /dev/null @@ -1,417 +0,0 @@ -/* ***** BEGIN LICENSE BLOCK ***** - * Version: RCSL 1.0/RPSL 1.0 - * - * Portions Copyright (c) 1995-2002 RealNetworks, Inc. All Rights Reserved. - * - * The contents of this file, and the files included with this file, are - * subject to the current version of the RealNetworks Public Source License - * Version 1.0 (the "RPSL") available at - * http://www.helixcommunity.org/content/rpsl unless you have licensed - * the file under the RealNetworks Community Source License Version 1.0 - * (the "RCSL") available at http://www.helixcommunity.org/content/rcsl, - * in which case the RCSL will apply. You may also obtain the license terms - * directly from RealNetworks. You may not use this file except in - * compliance with the RPSL or, if you have a valid RCSL with RealNetworks - * applicable to this file, the RCSL. Please see the applicable RPSL or - * RCSL for the rights, obligations and limitations governing use of the - * contents of the file. - * - * This file is part of the Helix DNA Technology. RealNetworks is the - * developer of the Original Code and owns the copyrights in the portions - * it created. - * - * This file, and the files included with this file, is distributed and made - * available on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER - * EXPRESS OR IMPLIED, AND REALNETWORKS HEREBY DISCLAIMS ALL SUCH WARRANTIES, - * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, FITNESS - * FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT. - * - * Technology Compatibility Kit Test Suite(s) Location: - * http://www.helixcommunity.org/content/tck - * - * Contributor(s): - * - * ***** END LICENSE BLOCK ***** */ - -/************************************************************************************** - * Fixed-point MP3 decoder - * Jon Recker (jrecker@real.com), Ken Cooke (kenc@real.com) - * June 2003 - * - * mp3dec.c - platform-independent top level MP3 decoder API - **************************************************************************************/ - -#include "string.h" // J.Sz. 21/04/2006 -// #include "hlxclib/string.h" /* for memmove, memcpy (can replace with different implementations if desired) */ -#include "mp3common.h" /* includes mp3dec.h (public API) and internal, platform-independent API */ - -/************************************************************************************** - * Function: MP3InitDecoder - * - * Description: allocate memory for platform-specific data - * clear all the user-accessible fields - * - * Inputs: none - * - * Outputs: none - * - * Return: handle to mp3 decoder instance, 0 if malloc fails - **************************************************************************************/ -HMP3Decoder MP3InitDecoder(void) -{ - MP3DecInfo *mp3DecInfo; - - mp3DecInfo = AllocateBuffers(); - - return (HMP3Decoder)mp3DecInfo; -} - -/************************************************************************************** - * Function: MP3FreeDecoder - * - * Description: free platform-specific data allocated by InitMP3Decoder - * zero out the contents of MP3DecInfo struct - * - * Inputs: valid MP3 decoder instance pointer (HMP3Decoder) - * - * Outputs: none - * - * Return: none - **************************************************************************************/ -void MP3FreeDecoder(HMP3Decoder hMP3Decoder) -{ - MP3DecInfo *mp3DecInfo = (MP3DecInfo *)hMP3Decoder; - - if (!mp3DecInfo) - return; - - FreeBuffers(mp3DecInfo); -} - -/************************************************************************************** - * Function: MP3FindSyncWord - * - * Description: locate the next byte-alinged sync word in the raw mp3 stream - * - * Inputs: buffer to search for sync word - * max number of bytes to search in buffer - * - * Outputs: none - * - * Return: offset to first sync word (bytes from start of buf) - * -1 if sync not found after searching nBytes - **************************************************************************************/ -int MP3FindSyncWord(unsigned char *buf, int nBytes) -{ - int i; - - /* find byte-aligned syncword - need 12 (MPEG 1,2) or 11 (MPEG 2.5) matching bits */ - for (i = 0; i < nBytes - 1; i++) { - if ( (buf[i+0] & SYNCWORDH) == SYNCWORDH && (buf[i+1] & SYNCWORDL) == SYNCWORDL ) - return i; - } - - return -1; -} - -/************************************************************************************** - * Function: MP3FindFreeSync - * - * Description: figure out number of bytes between adjacent sync words in "free" mode - * - * Inputs: buffer to search for next sync word - * the 4-byte frame header starting at the current sync word - * max number of bytes to search in buffer - * - * Outputs: none - * - * Return: offset to next sync word, minus any pad byte (i.e. nSlots) - * -1 if sync not found after searching nBytes - * - * Notes: this checks that the first 22 bits of the next frame header are the - * same as the current frame header, but it's still not foolproof - * (could accidentally find a sequence in the bitstream which - * appears to match but is not actually the next frame header) - * this could be made more error-resilient by checking several frames - * in a row and verifying that nSlots is the same in each case - * since free mode requires CBR (see spec) we generally only call - * this function once (first frame) then store the result (nSlots) - * and just use it from then on - **************************************************************************************/ -static int MP3FindFreeSync(unsigned char *buf, unsigned char firstFH[4], int nBytes) -{ - int offset = 0; - unsigned char *bufPtr = buf; - - /* loop until we either: - * - run out of nBytes (FindMP3SyncWord() returns -1) - * - find the next valid frame header (sync word, version, layer, CRC flag, bitrate, and sample rate - * in next header must match current header) - */ - while (1) { - offset = MP3FindSyncWord(bufPtr, nBytes); - bufPtr += offset; - if (offset < 0) { - return -1; - } else if ( (bufPtr[0] == firstFH[0]) && (bufPtr[1] == firstFH[1]) && ((bufPtr[2] & 0xfc) == (firstFH[2] & 0xfc)) ) { - /* want to return number of bytes per frame, NOT counting the padding byte, so subtract one if padFlag == 1 */ - if ((firstFH[2] >> 1) & 0x01) - bufPtr--; - return bufPtr - buf; - } - bufPtr += 3; - nBytes -= (offset + 3); - }; - - // return -1; Removed KJ -} - -/************************************************************************************** - * Function: MP3GetLastFrameInfo - * - * Description: get info about last MP3 frame decoded (number of sampled decoded, - * sample rate, bitrate, etc.) - * - * Inputs: valid MP3 decoder instance pointer (HMP3Decoder) - * pointer to MP3FrameInfo struct - * - * Outputs: filled-in MP3FrameInfo struct - * - * Return: none - * - * Notes: call this right after calling MP3Decode - **************************************************************************************/ -void MP3GetLastFrameInfo(HMP3Decoder hMP3Decoder, MP3FrameInfo *mp3FrameInfo) -{ - MP3DecInfo *mp3DecInfo = (MP3DecInfo *)hMP3Decoder; - - if (!mp3DecInfo || mp3DecInfo->layer != 3) { - mp3FrameInfo->bitrate = 0; - mp3FrameInfo->nChans = 0; - mp3FrameInfo->samprate = 0; - mp3FrameInfo->bitsPerSample = 0; - mp3FrameInfo->outputSamps = 0; - mp3FrameInfo->layer = 0; - mp3FrameInfo->version = 0; - } else { - mp3FrameInfo->bitrate = mp3DecInfo->bitrate; - mp3FrameInfo->nChans = mp3DecInfo->nChans; - mp3FrameInfo->samprate = mp3DecInfo->samprate; - mp3FrameInfo->bitsPerSample = 16; - mp3FrameInfo->outputSamps = mp3DecInfo->nChans * (int)samplesPerFrameTab[mp3DecInfo->version][mp3DecInfo->layer - 1]; - mp3FrameInfo->layer = mp3DecInfo->layer; - mp3FrameInfo->version = mp3DecInfo->version; - } -} - -/************************************************************************************** - * Function: MP3GetNextFrameInfo - * - * Description: parse MP3 frame header - * - * Inputs: valid MP3 decoder instance pointer (HMP3Decoder) - * pointer to MP3FrameInfo struct - * pointer to buffer containing valid MP3 frame header (located using - * MP3FindSyncWord(), above) - * - * Outputs: filled-in MP3FrameInfo struct - * - * Return: error code, defined in mp3dec.h (0 means no error, < 0 means error) - **************************************************************************************/ -int MP3GetNextFrameInfo(HMP3Decoder hMP3Decoder, MP3FrameInfo *mp3FrameInfo, unsigned char *buf) -{ - MP3DecInfo *mp3DecInfo = (MP3DecInfo *)hMP3Decoder; - - if (!mp3DecInfo) - return ERR_MP3_NULL_POINTER; - - if (UnpackFrameHeader(mp3DecInfo, buf) == -1 || mp3DecInfo->layer != 3) - return ERR_MP3_INVALID_FRAMEHEADER; - - MP3GetLastFrameInfo(mp3DecInfo, mp3FrameInfo); - - return ERR_MP3_NONE; -} - -/************************************************************************************** - * Function: MP3ClearBadFrame - * - * Description: zero out pcm buffer if error decoding MP3 frame - * - * Inputs: mp3DecInfo struct with correct frame size parameters filled in - * pointer pcm output buffer - * - * Outputs: zeroed out pcm buffer - * - * Return: none - **************************************************************************************/ -static void MP3ClearBadFrame(MP3DecInfo *mp3DecInfo, short *outbuf) -{ - int i; - - if (!mp3DecInfo) - return; - - for (i = 0; i < mp3DecInfo->nGrans * mp3DecInfo->nGranSamps * mp3DecInfo->nChans; i++) - outbuf[i] = 0; -} - -/************************************************************************************** - * Function: MP3Decode - * - * Description: decode one frame of MP3 data - * - * Inputs: valid MP3 decoder instance pointer (HMP3Decoder) - * double pointer to buffer of MP3 data (containing headers + mainData) - * number of valid bytes remaining in inbuf - * pointer to outbuf, big enough to hold one frame of decoded PCM samples - * flag indicating whether MP3 data is normal MPEG format (useSize = 0) - * or reformatted as "self-contained" frames (useSize = 1) - * - * Outputs: PCM data in outbuf, interleaved LRLRLR... if stereo - * number of output samples = nGrans * nGranSamps * nChans - * updated inbuf pointer, updated bytesLeft - * - * Return: error code, defined in mp3dec.h (0 means no error, < 0 means error) - * - * Notes: switching useSize on and off between frames in the same stream - * is not supported (bit reservoir is not maintained if useSize on) - **************************************************************************************/ -int MP3Decode(HMP3Decoder hMP3Decoder, unsigned char **inbuf, int *bytesLeft, short *outbuf, int useSize) -{ - int offset, bitOffset, mainBits, gr, ch, fhBytes, siBytes, freeFrameBytes; - int prevBitOffset, sfBlockBits, huffBlockBits; - unsigned char *mainPtr; - MP3DecInfo *mp3DecInfo = (MP3DecInfo *)hMP3Decoder; - - if (!mp3DecInfo) - return ERR_MP3_NULL_POINTER; - - /* unpack frame header */ - fhBytes = UnpackFrameHeader(mp3DecInfo, *inbuf); - if (fhBytes < 0) - return ERR_MP3_INVALID_FRAMEHEADER; /* don't clear outbuf since we don't know size (failed to parse header) */ - *inbuf += fhBytes; - - /* unpack side info */ - siBytes = UnpackSideInfo(mp3DecInfo, *inbuf); - if (siBytes < 0) { - MP3ClearBadFrame(mp3DecInfo, outbuf); - return ERR_MP3_INVALID_SIDEINFO; - } - *inbuf += siBytes; - *bytesLeft -= (fhBytes + siBytes); - - /* if free mode, need to calculate bitrate and nSlots manually, based on frame size */ - if (mp3DecInfo->bitrate == 0 || mp3DecInfo->freeBitrateFlag) { - if (!mp3DecInfo->freeBitrateFlag) { - /* first time through, need to scan for next sync word and figure out frame size */ - mp3DecInfo->freeBitrateFlag = 1; - mp3DecInfo->freeBitrateSlots = MP3FindFreeSync(*inbuf, *inbuf - fhBytes - siBytes, *bytesLeft); - if (mp3DecInfo->freeBitrateSlots < 0) { - MP3ClearBadFrame(mp3DecInfo, outbuf); - return ERR_MP3_FREE_BITRATE_SYNC; - } - freeFrameBytes = mp3DecInfo->freeBitrateSlots + fhBytes + siBytes; - mp3DecInfo->bitrate = (freeFrameBytes * mp3DecInfo->samprate * 8) / (mp3DecInfo->nGrans * mp3DecInfo->nGranSamps); - } - mp3DecInfo->nSlots = mp3DecInfo->freeBitrateSlots + CheckPadBit(mp3DecInfo); /* add pad byte, if required */ - } - - /* useSize != 0 means we're getting reformatted (RTP) packets (see RFC 3119) - * - calling function assembles "self-contained" MP3 frames by shifting any main_data - * from the bit reservoir (in previous frames) to AFTER the sync word and side info - * - calling function should set mainDataBegin to 0, and tell us exactly how large this - * frame is (in bytesLeft) - */ - if (useSize) { - mp3DecInfo->nSlots = *bytesLeft; - if (mp3DecInfo->mainDataBegin != 0 || mp3DecInfo->nSlots <= 0) { - /* error - non self-contained frame, or missing frame (size <= 0), could do loss concealment here */ - MP3ClearBadFrame(mp3DecInfo, outbuf); - return ERR_MP3_INVALID_FRAMEHEADER; - } - - /* can operate in-place on reformatted frames */ - mp3DecInfo->mainDataBytes = mp3DecInfo->nSlots; - mainPtr = *inbuf; - *inbuf += mp3DecInfo->nSlots; - *bytesLeft -= (mp3DecInfo->nSlots); - } else { - /* out of data - assume last or truncated frame */ - if (mp3DecInfo->nSlots > *bytesLeft) { - MP3ClearBadFrame(mp3DecInfo, outbuf); - return ERR_MP3_INDATA_UNDERFLOW; - } - /* fill main data buffer with enough new data for this frame */ - if (mp3DecInfo->mainDataBytes >= mp3DecInfo->mainDataBegin) { - /* adequate "old" main data available (i.e. bit reservoir) */ - memmove(mp3DecInfo->mainBuf, mp3DecInfo->mainBuf + mp3DecInfo->mainDataBytes - mp3DecInfo->mainDataBegin, mp3DecInfo->mainDataBegin); - memcpy(mp3DecInfo->mainBuf + mp3DecInfo->mainDataBegin, *inbuf, mp3DecInfo->nSlots); - - mp3DecInfo->mainDataBytes = mp3DecInfo->mainDataBegin + mp3DecInfo->nSlots; - *inbuf += mp3DecInfo->nSlots; - *bytesLeft -= (mp3DecInfo->nSlots); - mainPtr = mp3DecInfo->mainBuf; - } else { - /* not enough data in bit reservoir from previous frames (perhaps starting in middle of file) */ - memcpy(mp3DecInfo->mainBuf + mp3DecInfo->mainDataBytes, *inbuf, mp3DecInfo->nSlots); - mp3DecInfo->mainDataBytes += mp3DecInfo->nSlots; - *inbuf += mp3DecInfo->nSlots; - *bytesLeft -= (mp3DecInfo->nSlots); - MP3ClearBadFrame(mp3DecInfo, outbuf); - return ERR_MP3_MAINDATA_UNDERFLOW; - } - } - bitOffset = 0; - mainBits = mp3DecInfo->mainDataBytes * 8; - - /* decode one complete frame */ - for (gr = 0; gr < mp3DecInfo->nGrans; gr++) { - for (ch = 0; ch < mp3DecInfo->nChans; ch++) { - /* unpack scale factors and compute size of scale factor block */ - prevBitOffset = bitOffset; - offset = UnpackScaleFactors(mp3DecInfo, mainPtr, &bitOffset, mainBits, gr, ch); - - sfBlockBits = 8*offset - prevBitOffset + bitOffset; - huffBlockBits = mp3DecInfo->part23Length[gr][ch] - sfBlockBits; - mainPtr += offset; - mainBits -= sfBlockBits; - - if (offset < 0 || mainBits < huffBlockBits) { - MP3ClearBadFrame(mp3DecInfo, outbuf); - return ERR_MP3_INVALID_SCALEFACT; - } - - /* decode Huffman code words */ - prevBitOffset = bitOffset; - offset = DecodeHuffman(mp3DecInfo, mainPtr, &bitOffset, huffBlockBits, gr, ch); - if (offset < 0) { - MP3ClearBadFrame(mp3DecInfo, outbuf); - return ERR_MP3_INVALID_HUFFCODES; - } - - mainPtr += offset; - mainBits -= (8*offset - prevBitOffset + bitOffset); - } - /* dequantize coefficients, decode stereo, reorder short blocks */ - if (Dequantize(mp3DecInfo, gr) < 0) { - MP3ClearBadFrame(mp3DecInfo, outbuf); - return ERR_MP3_INVALID_DEQUANTIZE; - } - - /* alias reduction, inverse MDCT, overlap-add, frequency inversion */ - for (ch = 0; ch < mp3DecInfo->nChans; ch++) - if (IMDCT(mp3DecInfo, gr, ch) < 0) { - MP3ClearBadFrame(mp3DecInfo, outbuf); - return ERR_MP3_INVALID_IMDCT; - } - - /* subband transform - if stereo, interleaves pcm LRLRLR */ - if (Subband(mp3DecInfo, outbuf + gr*mp3DecInfo->nGranSamps*mp3DecInfo->nChans) < 0) { - MP3ClearBadFrame(mp3DecInfo, outbuf); - return ERR_MP3_INVALID_SUBBAND; - } - } - return ERR_MP3_NONE; -} diff --git a/bsp/stm32_radio/mp3/mp3tabs.c b/bsp/stm32_radio/mp3/mp3tabs.c deleted file mode 100644 index e4899c74e7..0000000000 --- a/bsp/stm32_radio/mp3/mp3tabs.c +++ /dev/null @@ -1,181 +0,0 @@ -/* ***** BEGIN LICENSE BLOCK ***** - * Version: RCSL 1.0/RPSL 1.0 - * - * Portions Copyright (c) 1995-2002 RealNetworks, Inc. All Rights Reserved. - * - * The contents of this file, and the files included with this file, are - * subject to the current version of the RealNetworks Public Source License - * Version 1.0 (the "RPSL") available at - * http://www.helixcommunity.org/content/rpsl unless you have licensed - * the file under the RealNetworks Community Source License Version 1.0 - * (the "RCSL") available at http://www.helixcommunity.org/content/rcsl, - * in which case the RCSL will apply. You may also obtain the license terms - * directly from RealNetworks. You may not use this file except in - * compliance with the RPSL or, if you have a valid RCSL with RealNetworks - * applicable to this file, the RCSL. Please see the applicable RPSL or - * RCSL for the rights, obligations and limitations governing use of the - * contents of the file. - * - * This file is part of the Helix DNA Technology. RealNetworks is the - * developer of the Original Code and owns the copyrights in the portions - * it created. - * - * This file, and the files included with this file, is distributed and made - * available on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER - * EXPRESS OR IMPLIED, AND REALNETWORKS HEREBY DISCLAIMS ALL SUCH WARRANTIES, - * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, FITNESS - * FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT. - * - * Technology Compatibility Kit Test Suite(s) Location: - * http://www.helixcommunity.org/content/tck - * - * Contributor(s): - * - * ***** END LICENSE BLOCK ***** */ - -/************************************************************************************** - * Fixed-point MP3 decoder - * Jon Recker (jrecker@real.com), Ken Cooke (kenc@real.com) - * June 2003 - * - * mp3tabs.c - platform-independent tables for MP3 decoder (global, read-only) - **************************************************************************************/ - -#include "mp3common.h" - -/* indexing = [version][samplerate index] - * sample rate of frame (Hz) - */ -const int samplerateTab[3][3] = { - {44100, 48000, 32000}, /* MPEG-1 */ - {22050, 24000, 16000}, /* MPEG-2 */ - {11025, 12000, 8000}, /* MPEG-2.5 */ -}; - -/* indexing = [version][layer][bitrate index] - * bitrate (kbps) of frame - * - bitrate index == 0 is "free" mode (bitrate determined on the fly by - * counting bits between successive sync words) - */ -const short bitrateTab[3][3][15] = { - { - /* MPEG-1 */ - { 0, 32, 64, 96,128,160,192,224,256,288,320,352,384,416,448}, /* Layer 1 */ - { 0, 32, 48, 56, 64, 80, 96,112,128,160,192,224,256,320,384}, /* Layer 2 */ - { 0, 32, 40, 48, 56, 64, 80, 96,112,128,160,192,224,256,320}, /* Layer 3 */ - }, - { - /* MPEG-2 */ - { 0, 32, 48, 56, 64, 80, 96,112,128,144,160,176,192,224,256}, /* Layer 1 */ - { 0, 8, 16, 24, 32, 40, 48, 56, 64, 80, 96,112,128,144,160}, /* Layer 2 */ - { 0, 8, 16, 24, 32, 40, 48, 56, 64, 80, 96,112,128,144,160}, /* Layer 3 */ - }, - { - /* MPEG-2.5 */ - { 0, 32, 48, 56, 64, 80, 96,112,128,144,160,176,192,224,256}, /* Layer 1 */ - { 0, 8, 16, 24, 32, 40, 48, 56, 64, 80, 96,112,128,144,160}, /* Layer 2 */ - { 0, 8, 16, 24, 32, 40, 48, 56, 64, 80, 96,112,128,144,160}, /* Layer 3 */ - }, -}; - -/* indexing = [version][layer] - * number of samples in one frame (per channel) - */ -const short samplesPerFrameTab[3][3] = { - {384, 1152, 1152 }, /* MPEG1 */ - {384, 1152, 576 }, /* MPEG2 */ - {384, 1152, 576 }, /* MPEG2.5 */ -}; - -/* layers 1, 2, 3 */ -const short bitsPerSlotTab[3] = {32, 8, 8}; - -/* indexing = [version][mono/stereo] - * number of bytes in side info section of bitstream - */ -const short sideBytesTab[3][2] = { - {17, 32}, /* MPEG-1: mono, stereo */ - { 9, 17}, /* MPEG-2: mono, stereo */ - { 9, 17}, /* MPEG-2.5: mono, stereo */ -}; - -/* indexing = [version][sampleRate][bitRate] - * for layer3, nSlots = floor(samps/frame * bitRate / sampleRate / 8) - * - add one pad slot if necessary - */ -const short slotTab[3][3][15] = { - { - /* MPEG-1 */ - { 0, 104, 130, 156, 182, 208, 261, 313, 365, 417, 522, 626, 731, 835,1044 }, /* 44 kHz */ - { 0, 96, 120, 144, 168, 192, 240, 288, 336, 384, 480, 576, 672, 768, 960 }, /* 48 kHz */ - { 0, 144, 180, 216, 252, 288, 360, 432, 504, 576, 720, 864,1008,1152,1440 }, /* 32 kHz */ - }, - { - /* MPEG-2 */ - { 0, 26, 52, 78, 104, 130, 156, 182, 208, 261, 313, 365, 417, 470, 522 }, /* 22 kHz */ - { 0, 24, 48, 72, 96, 120, 144, 168, 192, 240, 288, 336, 384, 432, 480 }, /* 24 kHz */ - { 0, 36, 72, 108, 144, 180, 216, 252, 288, 360, 432, 504, 576, 648, 720 }, /* 16 kHz */ - }, - { - /* MPEG-2.5 */ - { 0, 52, 104, 156, 208, 261, 313, 365, 417, 522, 626, 731, 835, 940,1044 }, /* 11 kHz */ - { 0, 48, 96, 144, 192, 240, 288, 336, 384, 480, 576, 672, 768, 864, 960 }, /* 12 kHz */ - { 0, 72, 144, 216, 288, 360, 432, 504, 576, 720, 864,1008,1152,1296,1440 }, /* 8 kHz */ - }, -}; - -/* indexing = [version][sampleRate][long (.l) or short (.s) block] - * sfBandTable[v][s].l[cb] = index of first bin in critical band cb (long blocks) - * sfBandTable[v][s].s[cb] = index of first bin in critical band cb (short blocks) - */ -const SFBandTable sfBandTable[3][3] = { - { - /* MPEG-1 (44, 48, 32 kHz) */ - { - { 0, 4, 8, 12, 16, 20, 24, 30, 36, 44, 52, 62, 74, 90,110,134,162,196,238,288,342,418,576 }, - { 0, 4, 8, 12, 16, 22, 30, 40, 52, 66, 84,106,136,192 } - }, - { - { 0, 4, 8, 12, 16, 20, 24, 30, 36, 42, 50, 60, 72, 88,106,128,156,190,230,276,330,384,576 }, - { 0, 4, 8, 12, 16, 22, 28, 38, 50, 64, 80,100,126,192 } - }, - { - { 0, 4, 8, 12, 16, 20, 24, 30, 36, 44, 54, 66, 82,102,126,156,194,240,296,364,448,550,576 }, - { 0, 4, 8, 12, 16, 22, 30, 42, 58, 78,104,138,180,192 } - } - }, - - { - /* MPEG-2 (22, 24, 16 kHz) */ - { - { 0, 6, 12, 18, 24, 30, 36, 44, 54, 66, 80, 96,116,140,168,200,238,284,336,396,464,522,576 }, - { 0, 4, 8, 12, 18, 24, 32, 42, 56, 74,100,132,174,192 } - }, - { - { 0, 6, 12, 18, 24, 30, 36, 44, 54, 66, 80, 96,114,136,162,194,232,278,332,394,464,540,576 }, - { 0, 4, 8, 12, 18, 26, 36, 48, 62, 80,104,136,180,192 } - }, - { - { 0, 6, 12, 18, 24, 30, 36, 44, 54, 66, 80, 96,116,140,168,200,238,284,336,396,464,522,576 }, - { 0, 4, 8, 12, 18, 26, 36, 48, 62, 80,104,134,174,192 } - }, - }, - - { - /* MPEG-2.5 (11, 12, 8 kHz) */ - { - { 0, 6, 12, 18, 24, 30, 36, 44, 54, 66, 80, 96,116,140,168,200,238,284,336,396,464,522,576 }, - { 0, 4, 8, 12, 18, 26, 36, 48, 62, 80,104,134,174,192 } - }, - { - { 0, 6, 12, 18, 24, 30, 36, 44, 54, 66, 80, 96,116,140,168,200,238,284,336,396,464,522,576 }, - { 0, 4, 8, 12, 18, 26, 36, 48, 62, 80,104,134,174,192 } - }, - { - { 0, 12, 24, 36, 48, 60, 72, 88,108,132,160,192,232,280,336,400,476,566,568,570,572,574,576 }, - { 0, 8, 16, 24, 36, 52, 72, 96,124,160,162,164,166,192 } - }, - }, -}; - - diff --git a/bsp/stm32_radio/mp3/pub/LICENSE.txt b/bsp/stm32_radio/mp3/pub/LICENSE.txt deleted file mode 100644 index 12e5372a9f..0000000000 --- a/bsp/stm32_radio/mp3/pub/LICENSE.txt +++ /dev/null @@ -1,30 +0,0 @@ - Copyright (c) 1995-2004 RealNetworks, Inc. All Rights Reserved. - - The contents of this directory, and (except where otherwise - indicated) the directories included within this directory, are - subject to the current version of the RealNetworks Public Source - License (the "RPSL") available at RPSL.txt in this directory, unless - you have licensed the directory under the current version of the - RealNetworks Community Source License (the "RCSL") available at - RCSL.txt in this directory, in which case the RCSL will apply. You - may also obtain the license terms directly from RealNetworks. You - may not use the files in this directory except in compliance with the - RPSL or, if you have a valid RCSL with RealNetworks applicable to - this directory, the RCSL. Please see the applicable RPSL or RCSL for - the rights, obligations and limitations governing use of the contents - of the directory. - - This directory is part of the Helix DNA Technology. RealNetworks is - the developer of the Original Code and owns the copyrights in the - portions it created. - - This directory, and the directories included with this directory, are - distributed and made available on an 'AS IS' basis, WITHOUT WARRANTY - OF ANY KIND, EITHER EXPRESS OR IMPLIED, AND REALNETWORKS HEREBY - DISCLAIMS ALL SUCH WARRANTIES, INCLUDING WITHOUT LIMITATION, ANY - WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, - QUIET ENJOYMENT OR NON-INFRINGEMENT. - - Technology Compatibility Kit Test Suite(s) Location: - http://www.helixcommunity.org/content/tck - diff --git a/bsp/stm32_radio/mp3/pub/RCSL.txt b/bsp/stm32_radio/mp3/pub/RCSL.txt deleted file mode 100644 index a809759a32..0000000000 --- a/bsp/stm32_radio/mp3/pub/RCSL.txt +++ /dev/null @@ -1,948 +0,0 @@ -The RCSL is made up of a base agreement and a few Attachments. - -For Research and Development use, you agree to the terms of the -RCSL R&D License (base RCSL and Attachments A, B, and C) - -For Commercial Use (either distribution or internal commercial -deployment) of the Helix DNA with or without support for RealNetworks' -RealAudio and RealVideo Add-on Technology, you agree to the -terms of the same RCSL R&D license -and execute one or more additional Commercial Use License attachments -. - ------------------------------------------------------------------------- - - - REALNETWORKS COMMUNITY SOURCE LICENSE - -Version 1.2 (Rev. Date: January 22, 2003). - - - RECITALS - -Original Contributor has developed Specifications, Source Code -implementations and Executables of certain Technology; and - -Original Contributor desires to license the Technology to a large -community to facilitate research, innovation and product development -while maintaining compatibility of such products with the Technology as -delivered by Original Contributor; and - -Original Contributor desires to license certain Trademarks for the -purpose of branding products that are compatible with the relevant -Technology delivered by Original Contributor; and - -You desire to license the Technology and possibly certain Trademarks -from Original Contributor on the terms and conditions specified in this -License. - -In consideration for the mutual covenants contained herein, You and -Original Contributor agree as follows: - - - AGREEMENT - -*1. Introduction.* - -The RealNetworks Community Source License ("RCSL") and effective -attachments ("License") may include five distinct licenses: - -i) Research Use license -- License plus Attachments A, B and C only. - -ii) Commercial Use and Trademark License, which may be for Internal -Deployment Use or external distribution, or both -- License plus -Attachments A, B, C, and D. - -iii) Technology Compatibility Kit (TCK) license -- Attachment C. - -iv) Add-On Technology License (Executable) Commercial Use License --Attachment F. - -v) Add-On Technology Source Code Porting and Optimization -License-Attachment G. - -The Research Use license is effective when You click and accept this -License. The TCK is effective when You click and accept this License, -unless otherwise specified in the TCK attachments. The Commercial Use -and Trademark, Add-On Technology License, and the Add-On Technology -Source Code Porting and Optimization licenses must each be signed by You -and Original Contributor to become effective. Once effective, these -licenses and the associated requirements and responsibilities are -cumulative. Capitalized terms used in this License are defined in the -Glossary. - -*2. License Grants.* - -2.1 Original Contributor Grant. - -Subject to Your compliance with Sections 3, 8.10 and Attachment A of -this License, Original Contributor grants to You a worldwide, -royalty-free, non-exclusive license, to the extent of Original -Contributor's Intellectual Property Rights covering the Original Code, -Upgraded Code and Specifications, to do the following: - -(a) Research Use License: - -(i) use, reproduce and modify the Original Code, Upgraded Code and -Specifications to create Modifications and Reformatted Specifications -for Research Use by You; - -(ii) publish and display Original Code, Upgraded Code and Specifications -with, or as part of Modifications, as permitted under Section 3.1(b) below; - -(iii) reproduce and distribute copies of Original Code and Upgraded Code -to Licensees and students for Research Use by You; - -(iv) compile, reproduce and distribute Original Code and Upgraded Code -in Executable form, and Reformatted Specifications to anyone for -Research Use by You. - -(b) Other than the licenses expressly granted in this License, Original -Contributor retains all right, title, and interest in Original Code and -Upgraded Code and Specifications. - -2.2 Your Grants. - -(a) To Other Licensees. You hereby grant to each Licensee a license to -Your Error Corrections and Shared Modifications, of the same scope and -extent as Original Contributor's licenses under Section 2.1 a) above -relative to Research Use and Attachment D relative to Commercial Use. - -(b) To Original Contributor. You hereby grant to Original Contributor a -worldwide, royalty-free, non-exclusive, perpetual and irrevocable -license, to the extent of Your Intellectual Property Rights covering -Your Error Corrections, Shared Modifications and Reformatted -Specifications, to use, reproduce, modify, display and distribute Your -Error Corrections, Shared Modifications and Reformatted Specifications, -in any form, including the right to sublicense such rights through -multiple tiers of distribution. - -(c) Other than the licenses expressly granted in Sections 2.2(a) and (b) -above, and the restrictions set forth in Section 3.1(d)(iv) below, You -retain all right, title, and interest in Your Error Corrections, Shared -Modifications and Reformatted Specifications. - -2.3 Contributor Modifications. - -You may use, reproduce, modify, display and distribute Contributor Error -Corrections, Shared Modifications and Reformatted Specifications, -obtained by You under this License, to the same scope and extent as with -Original Code, Upgraded Code and Specifications. - -2.4 Subcontracting. - -You may deliver the Source Code of Covered Code to other Licensees -having at least a Research Use license, for the sole purpose of -furnishing development services to You in connection with Your rights -granted in this License. All such Licensees must execute appropriate -documents with respect to such work consistent with the terms of this -License, and acknowledging their work-made-for-hire status or assigning -exclusive right to the work product and associated Intellectual Property -Rights to You. - -*3. Requirements and Responsibilities*. - -3.1 Research Use License. - -As a condition of exercising the rights granted under Section 2.1(a) -above, You agree to comply with the following: - -(a) Your Contribution to the Community. All Error Corrections and Shared -Modifications which You create or contribute to are automatically -subject to the licenses granted under Section 2.2 above. You are -encouraged to license all of Your other Modifications under Section 2.2 -as Shared Modifications, but are not required to do so. You agree to -notify Original Contributor of any errors in the Specification. - -(b) Source Code Availability. You agree to provide all Your Error -Corrections to Original Contributor as soon as reasonably practicable -and, in any event, prior to Internal Deployment Use or Commercial Use, -if applicable. Original Contributor may, at its discretion, post Source -Code for Your Error Corrections and Shared Modifications on the -Community Webserver. You may also post Error Corrections and Shared -Modifications on a web-server of Your choice; provided, that You must -take reasonable precautions to ensure that only Licensees have access to -such Error Corrections and Shared Modifications. Such precautions shall -include, without limitation, a password protection scheme limited to -Licensees and a click-on, download certification of Licensee status -required of those attempting to download from the server. An example of -an acceptable certification is attached as Attachment A-2. - -(c) Notices. All Error Corrections and Shared Modifications You create -or contribute to must include a file documenting the additions and -changes You made and the date of such additions and changes. You must -also include the notice set forth in Attachment A-1 in the file header. -If it is not possible to put the notice in a particular Source Code file -due to its structure, then You must include the notice in a location -(such as a relevant directory file), where a recipient would be most -likely to look for such a notice. - -(d) Redistribution. - -(i) Source. Covered Code may be distributed in Source Code form only to -another Licensee (except for students as provided below). You may not -offer or impose any terms on any Covered Code that alter the rights, -requirements, or responsibilities of such Licensee. You may distribute -Covered Code to students for use in connection with their course work -and research projects undertaken at accredited educational institutions. -Such students need not be Licensees, but must be given a copy of the -notice set forth in Attachment A-3 and such notice must also be included -in a file header or prominent location in the Source Code made available -to such students. - -(ii) Executable. You may distribute Executable version(s) of Covered -Code to Licensees and other third parties only for the purpose of -evaluation and comment in connection with Research Use by You and under -a license of Your choice, but which limits use of such Executable -version(s) of Covered Code only to that purpose. - -(iii) Modified Class, Interface and Package Naming. In connection with -Research Use by You only, You may use Original Contributor's class, -Interface and package names only to accurately reference or invoke the -Source Code files You modify. Original Contributor grants to You a -limited license to the extent necessary for such purposes. - -(iv) You expressly agree that any distribution, in whole or in part, of -Modifications developed by You shall only be done pursuant to the terms -and conditions of this License. - -(e) Extensions. - -(i) Covered Code. You may not include any Source Code of Community Code -in any Extensions. You may include the compiled Header Files of -Community Code in an Extension provided that Your use of the Covered -Code, including Heading Files, complies with the Commercial Use License, -the TCK and all other terms of this License. - -(ii) Publication. No later than the date on which You first distribute -such Extension for Commercial Use, You must publish to the industry, on -a non-confidential basis and free of all copyright restrictions with -respect to reproduction and use, an accurate and current specification -for any Extension. In addition, You must make available an appropriate -test suite, pursuant to the same rights as the specification, -sufficiently detailed to allow any third party reasonably skilled in the -technology to produce implementations of the Extension compatible with -the specification. Such test suites must be made available as soon as -reasonably practicable but, in no event, later than ninety (90) days -after Your first Commercial Use of the Extension. You must use -reasonable efforts to promptly clarify and correct the specification and -the test suite upon written request by Original Contributor. - -(iii) Open. You agree to refrain from enforcing any Intellectual -Property Rights You may have covering any interface(s) of Your -Extension, which would prevent the implementation of such interface(s) -by Original Contributor or any Licensee. This obligation does not -prevent You from enforcing any Intellectual Property Right You have that -would otherwise be infringed by an implementation of Your Extension. - -(iv) Interface Modifications and Naming. You may not modify or add to -the GUID space * * "xxxxxxxx-0901-11d1-8B06-00A024406D59" or any other -GUID space designated by Original Contributor. You may not modify any -Interface prefix provided with the Covered Code or any other prefix -designated by Original Contributor.* * - -* * - -(f) You agree that any Specifications provided to You by Original -Contributor are confidential and proprietary information of Original -Contributor. You must maintain the confidentiality of the Specifications -and may not disclose them to any third party without Original -Contributor's prior written consent. You may only use the Specifications -under the terms of this License and only for the purpose of implementing -the terms of this License with respect to Covered Code. You agree not -use, copy or distribute any such Specifications except as provided in -writing by Original Contributor. - -3.2 Commercial Use License. - -You may not make Commercial Use of any Covered Code unless You and -Original Contributor have executed a copy of the Commercial Use and -Trademark License attached as Attachment D. - -*4. Versions of the License.* - -4.1 License Versions. - -Original Contributor may publish revised versions of the License from -time to time. Each version will be given a distinguishing version number. - -4.2 Effect. - -Once a particular version of Covered Code has been provided under a -version of the License, You may always continue to use such Covered Code -under the terms of that version of the License. You may also choose to -use such Covered Code under the terms of any subsequent version of the -License. No one other than Original Contributor has the right to -promulgate License versions. - -4.3 Multiple-Licensed Code. - -Original Contributor may designate portions of the Covered Code as -"Multiple-Licensed." "Multiple-Licensed" means that the Original -Contributor permits You to utilize those designated portions of the -Covered Code under Your choice of this License or the alternative -license(s), if any, specified by the Original Contributor in an -Attachment to this License. - -*5. Disclaimer of Warranty.* - -5.1 COVERED CODE PROVIDED AS IS. - -COVERED CODE IS PROVIDED UNDER THIS LICENSE "AS IS," WITHOUT WARRANTY OF -ANY KIND, EITHER EXPRESS OR IMPLIED, INCLUDING, WITHOUT LIMITATION, -WARRANTIES THAT THE COVERED CODE IS FREE OF DEFECTS, MERCHANTABLE, FIT -FOR A PARTICULAR PURPOSE OR NON-INFRINGING. YOU AGREE TO BEAR THE ENTIRE -RISK IN CONNECTION WITH YOUR USE AND DISTRIBUTION OF COVERED CODE UNDER -THIS LICENSE. THIS DISCLAIMER OF WARRANTY CONSTITUTES AN ESSENTIAL PART -OF THIS LICENSE. NO USE OF ANY COVERED CODE IS AUTHORIZED HEREUNDER -EXCEPT SUBJECT TO THIS DISCLAIMER. - -5.2 Not Designed for High Risk Activities. - -You acknowledge that Original Code, Upgraded Code and Specifications are -not designed or intended for use in high risk activities including, but -not limited to: (i) on-line control of aircraft, air traffic, aircraft -navigation or aircraft communications; or (ii) in the design, -construction, operation or maintenance of any nuclear facility. Original -Contributor disclaims any express or implied warranty of fitness for -such uses. - -*6. Termination.* - -6.1 By You. - -You may terminate this Research Use license at anytime by providing -written notice to Original Contributor. - -6.2 By Original Contributor. - -This License and the rights granted hereunder will terminate: - -(i) automatically if You fail to comply with the terms of this License -and fail to cure such breach within 30 days of receipt of written notice -of the breach; - -(ii) immediately in the event of circumstances specified in Sections 7.1 -and 8.4; or - -(iii) at Original Contributor's discretion upon any action initiated by -You (including by cross-claim or counter claim) alleging that use or -distribution by Original Contributor or any Licensee, of Original Code, -Upgraded Code, Error Corrections, Shared Modifications or Specifications -infringe a patent owned or controlled by You. - -6.3 Effective of Termination. - -Upon termination, You agree to discontinue use of and destroy all copies -of Covered Code in Your possession. All sublicenses to the Covered Code -which You have properly granted shall survive any termination of this -License. Provisions that, by their nature, should remain in effect -beyond the termination of this License shall survive including, without -limitation, Sections 2.2, 3, 5, 7 and 8. - -6.4 No Compensation. - -Each party waives and releases the other from any claim to compensation -or indemnity for permitted or lawful termination of the business -relationship established by this License. - -*7. Liability.* - -7.1 Infringement. Should any of the Original Code, Upgraded Code, TCK or -Specifications ("Materials") become the subject of a claim of -infringement, Original Contributor may, at its sole option, (i) attempt -to procure the rights necessary for You to continue using the Materials, -(ii) modify the Materials so that they are no longer infringing, or -(iii) terminate Your right to use the Materials, immediately upon -written notice, and refund to You the amount, if any, having then -actually been paid by You to Original Contributor for the Original Code, -Upgraded Code and TCK, depreciated on a straight line, five year basis. - -7.2 LIMITATION OF LIABILITY. TO THE FULL EXTENT ALLOWED BY APPLICABLE -LAW, ORIGINAL CONTRIBUTOR'S LIABILITY TO YOU FOR CLAIMS RELATING TO THIS -LICENSE, WHETHER FOR BREACH OR IN TORT, SHALL BE LIMITED TO ONE HUNDRED -PERCENT (100%) OF THE AMOUNT HAVING THEN ACTUALLY BEEN PAID BY YOU TO -ORIGINAL CONTRIBUTOR FOR ALL COPIES LICENSED HEREUNDER OF THE PARTICULAR -ITEMS GIVING RISE TO SUCH CLAIM, IF ANY, DURING THE TWELVE MONTHS -PRECEDING THE CLAIMED BREACH. IN NO EVENT WILL YOU (RELATIVE TO YOUR -SHARED MODIFICATIONS OR ERROR CORRECTIONS) OR ORIGINAL CONTRIBUTOR BE -LIABLE FOR ANY INDIRECT, PUNITIVE, SPECIAL, INCIDENTAL OR CONSEQUENTIAL -DAMAGES IN CONNECTION WITH OR RISING OUT OF THIS LICENSE (INCLUDING, -WITHOUT LIMITATION, LOSS OF PROFITS, USE, DATA, OR OTHER ECONOMIC -ADVANTAGE), HOWEVER IT ARISES AND ON ANY THEORY OF LIABILITY, WHETHER IN -AN ACTION FOR CONTRACT, STRICT LIABILITY OR TORT (INCLUDING NEGLIGENCE) -OR OTHERWISE, WHETHER OR NOT YOU OR ORIGINAL CONTRIBUTOR HAS BEEN -ADVISED OF THE POSSIBILITY OF SUCH DAMAGE AND NOTWITHSTANDING THE -FAILURE OF ESSENTIAL PURPOSE OF ANY REMEDY. - -*8. Miscellaneous.* - -8.1 Trademark. - -You shall not use any Trademark unless You and Original Contributor -execute a copy of the Commercial Use and Trademark License Agreement -attached hereto as Attachment D. Except as expressly provided in the -License, You are granted no right, title or license to, or interest in, -any Trademarks. Whether or not You and Original Contributor enter into -the Trademark License, You agree not to (i) challenge Original -Contributor's ownership or use of Trademarks; (ii) attempt to register -any Trademarks, or any mark or logo substantially similar thereto; or -(iii) incorporate any Trademarks into Your own trademarks, product -names, service marks, company names, or domain names. - -8.2 Integration. - -This License represents the complete agreement concerning the subject -matter hereof. - -8.3 Assignment. - -Original Contributor may assign this License, and its rights and -obligations hereunder, in its sole discretion. You may assign the -Research Use portions of this License and the TCK license to a third -party upon prior written notice to Original Contributor (which may be -provided electronically via the Community Web-Server). You may not -assign the Commercial Use and Trademark license, the Add-On Technology -License, or the Add-On Technology Source Code Porting License, including -by way of merger (regardless of whether You are the surviving entity) or -acquisition, without Original Contributor's prior written consent. - -8.4 Severability. - -If any provision of this License is held to be unenforceable, such -provision shall be reformed only to the extent necessary to make it -enforceable. Notwithstanding the foregoing, if You are prohibited by law -from fully and specifically complying with Sections 2.2 or 3, this -License will immediately terminate and You must immediately discontinue -any use of Covered Code. - -8.5 Governing Law. - -This License shall be governed by the laws of the United States and the -State of Washington, as applied to contracts entered into and to be -performed in Washington between Washington residents. The application of -the United Nations Convention on Contracts for the International Sale of -Goods is expressly excluded. You agree that the state and federal courts -located in Seattle, Washington have exclusive jurisdiction over any -claim relating to the License, including contract and tort claims. - -8.6 Dispute Resolution. - -a) Arbitration. Any dispute arising out of or relating to this License -shall be finally settled by arbitration as set out herein, except that -either party may bring any action, in a court of competent jurisdiction -(which jurisdiction shall be exclusive), with respect to any dispute -relating to such party's Intellectual Property Rights or with respect to -Your compliance with the TCK license. Arbitration shall be administered: -(i) by the American Arbitration Association (AAA), (ii) in accordance -with the rules of the United Nations Commission on International Trade -Law (UNCITRAL) (the "Rules") in effect at the time of arbitration as -modified herein; and (iii) the arbitrator will apply the substantive -laws of Washington and the United States. Judgment upon the award -rendered by the arbitrator may be entered in any court having -jurisdiction to enforce such award. - -b) Arbitration language, venue and damages. All arbitration proceedings -shall be conducted in English by a single arbitrator selected in -accordance with the Rules, who must be fluent in English and be either a -retired judge or practicing attorney having at least ten (10) years -litigation experience and be reasonably familiar with the technology -matters relative to the dispute. Unless otherwise agreed, arbitration -venue shall be in Seattle, Washington. The arbitrator may award monetary -damages only and nothing shall preclude either party from seeking -provisional or emergency relief from a court of competent jurisdiction. -The arbitrator shall have no authority to award damages in excess of -those permitted in this License and any such award in excess is void. -All awards will be payable in U.S. dollars and may include, for the -prevailing party (i) pre-judgment award interest, (ii) reasonable -attorneys' fees incurred in connection with the arbitration, and (iii) -reasonable costs and expenses incurred in enforcing the award. The -arbitrator will order each party to produce identified documents and -respond to no more than twenty-five single question interrogatories. - -8.7 Construction. - -Any law or regulation, which provides that the language of a contract -shall be construed against the drafter, shall not apply to this License. - -8.8 U.S. Government End Users. - -The Covered Code is a "commercial item," as that term is defined in 48 -C.F.R. 2.101 (Oct. 1995), consisting of "commercial computer software" -and "commercial computer software documentation," as such terms are used -in 48 C.F.R. 12.212 (Sept. 1995). Consistent with 48 C.F.R. 12.212 and -48 C.F.R. 227.7202-1 through 227.7202-4 (June 1995), all U.S. Government -End Users acquire Covered Code with only those rights set forth herein. -You agree to pass this notice to our licensees. - -8.9 Marketing Activities. - -Licensee hereby grants Original Contributor a non-exclusive, -non-transferable, limited license to use the Licensee's company name and -logo ("Licensee Marks") in any presentations, press releases, or -marketing materials solely for the purpose of identifying Licensee as a -member of the Helix Community. Licensee shall provide samples of -Licensee Marks to Original Contributor upon request by Original -Contributor. Original Contributor acknowledges that the Licensee Marks -are the trademarks of Licensee. Original Contributor shall not use the -Licensee Marks in a way that may imply that Original Contributor is an -agency or branch of Licensee. Original Contributor understands and -agrees that the use of any Licensee Marks in connection with this -Agreement shall not create any right, title or interest, in, or to the -Licensee Marks or any Licensee trademarks and that all such use and -goodwill associated with any such trademarks will inure to the benefit -of Licensee. Further the Original Contributor will stop usage of the -Licensee Marks upon Licensee's request. - -8.10 Press Announcements. - -You may make press announcements or other public statements regarding -this License without the prior written consent of the Original -Contributor, if Your statement is limited to announcing the licensing of -the Covered Code or the availability of Your Product and its -compatibility with the Covered Code. All other public announcements -regarding this license require the prior written consent of the Original -Contributor. Consent requests are welcome at press@helixcommunity.org. - -8.11 International Use. - -a) Export/Import laws. Covered Code is subject to U.S. export control -laws and may be subject to export or import regulations in other -countries. Each party agrees to comply strictly with all such laws and -regulations and acknowledges their responsibility to obtain such -licenses to export, re-export, or import as may be required. You agree -to pass these obligations to Your licensees. - -b) Intellectual Property Protection. Due to limited intellectual -property protection and enforcement in certain countries, You agree not -to redistribute the Original Code, Upgraded Code, TCK and Specifications -to any country on the list of restricted countries on the Community Web -Server. - -8.12 Language. - -This License is in the English language only, which language shall be -controlling in all respects, and all versions of this License in any -other language shall be for accommodation only and shall not be binding -on the parties to this License. All communications and notices made or -given pursuant to this License, and all documentation and support to be -provided, unless otherwise noted, shall be in the English language. - -PLEASE READ THE TERMS OF THIS LICENSE CAREFULLY. BY CLICKING ON THE -"ACCEPT" BUTTON BELOW YOU ARE ACCEPTING AND AGREEING TO THE TERMS AND -CONDITIONS OF THIS LICENSE WITH REALNETWORKS, INC. IF YOU ARE AGREEING -TO THIS LICENSE ON BEHALF OF A COMPANY, YOU REPRESENT THAT YOU ARE -AUTHORIZED TO BIND THE COMPANY TO SUCH A LICENSE. WHETHER YOU ARE ACTING -ON YOUR OWN BEHALF, OR REPRESENTING A COMPANY, YOU MUST BE OF MAJORITY -AGE AND BE OTHERWISE COMPETENT TO ENTER INTO CONTRACTS. IF YOU DO NOT -MEET THIS CRITERIA OR YOU DO NOT AGREE TO ANY OF THE TERMS AND -CONDITIONS OF THIS LICENSE, CLICK ON THE REJECT BUTTON TO EXIT. - - - GLOSSARY - -1. *"Added Value"* means code which: - -(i) has a principal purpose which is substantially different from that -of the stand-alone Technology; - -(ii) represents a significant functional and value enhancement to the -Technology; - -(iii) operates in conjunction with the Technology; and - -(iv) is not marketed as a technology which replaces or substitutes for -the Technology - -2. "*Applicable Patent Rights*" mean: (a) in the case where Original -Contributor is the grantor of rights, claims of patents that (i) are now -or hereafter acquired, owned by or assigned to Original Contributor and -(ii) are necessarily infringed by using or making the Original Code or -Upgraded Code, including Modifications provided by Original Contributor, -alone and not in combination with other software or hardware; and (b) in -the case where Licensee is the grantor of rights, claims of patents that -(i) are now or hereafter acquired, owned by or assigned to Licensee and -(ii) are infringed (directly or indirectly) by using or making -Licensee's Modifications or Error Corrections, taken alone or in -combination with Covered Code. - -3. "*Application Programming Interfaces (APIs)"* means the interfaces, -associated header files, service provider interfaces, and protocols that -enable a device, application, Operating System, or other program to -obtain services from or make requests of (or provide services in -response to requests from) other programs, and to use, benefit from, or -rely on the resources, facilities, and capabilities of the relevant -programs using the APIs. APIs includes the technical documentation -describing the APIs, the Source Code constituting the API, and any -Header Files used with the APIs. - -4. "*Commercial Use*" means any use (internal or external), copying, -sublicensing or distribution (internal or external), directly or -indirectly of Covered Code by You other than Your Research Use of -Covered Code within Your business or organization or in conjunction with -other Licensees with equivalent Research Use rights. Commercial Use -includes any use of the Covered Code for direct or indirect commercial -or strategic gain, advantage or other business purpose. Any Commercial -Use requires execution of Attachment D by You and Original Contributor. - -5. "*Community Code*" means the Original Code, Upgraded Code, Error -Corrections, Shared Modifications, or any combination thereof. - -6. "*Community Webserver(s)"* means the webservers designated by -Original Contributor for access to the Original Code, Upgraded Code, TCK -and Specifications and for posting Error Corrections and Shared -Modifications. - -7. "*Compliant Covered Code*" means Covered Code that complies with the -requirements of the TCK. - -8. "*Contributor*" means each Licensee that creates or contributes to -the creation of any Error Correction or Shared Modification. - -9. "*Covered Code*" means the Original Code, Upgraded Code, -Modifications, or any combination thereof. - -10. "*Error Correction*" means any change made to Community Code which -conforms to the Specification and corrects the adverse effect of a -failure of Community Code to perform any function set forth in or -required by the Specifications. - -11. "*Executable*" means Covered Code that has been converted from -Source Code to the preferred form for execution by a computer or digital -processor (e.g. binary form). - -12. "*Extension(s)"* means any additional Interfaces developed by or for -You which: (i) are designed for use with the Technology; (ii) constitute -an API for a library of computing functions or services; and (iii) are -disclosed or otherwise made available to third party software developers -for the purpose of developing software which invokes such additional -Interfaces. The foregoing shall not apply to software developed by Your -subcontractors to be exclusively used by You. - -13. "*Header File(s)"* means that portion of the Source Code that -provides the names and types of member functions, data members, class -definitions, and interface definitions necessary to implement the APIs -for the Covered Code. Header Files include, files specifically -designated by Original Contributor as Header Files. Header Files do not -include the code necessary to implement the functionality underlying the -Interface. - -14. *"Helix DNA Server Technology"* means the program(s) that implement -the Helix Universal Server streaming engine for the Technology as -defined in the Specification. - -15. *"Helix DNA Client Technology"* means the Covered Code that -implements the RealOne Player engine as defined in the Specification. - -16. *"Helix DNA Producer Technology"* means the Covered Code that -implements the Helix Producer engine as defined in the Specification. - -17. *"Helix DNA Technology"* means the Helix DNA Server Technology, the -Helix DNA Client Technology, the Helix DNA Producer Technology and other -Helix technologies designated by Original Contributor. - -18. "*Intellectual Property Rights*" means worldwide statutory and -common law rights associated solely with (i) Applicable Patent Rights; -(ii) works of authorship including copyrights, copyright applications, -copyright registrations and "moral rights"; (iii) the protection of -trade and industrial secrets and confidential information; and (iv) -divisions, continuations, renewals, and re-issuances of the foregoing -now existing or acquired in the future. - -19. *"Interface*" means interfaces, functions, properties, class -definitions, APIs, Header Files, GUIDs, V-Tables, and/or protocols -allowing one piece of software, firmware or hardware to communicate or -interoperate with another piece of software, firmware or hardware. - -20. "*Internal Deployment Use*" means use of Compliant Covered Code -(excluding Research Use) within Your business or organization only by -Your employees and/or agents on behalf of Your business or organization, -but not to provide services, including content distribution, to third -parties, subject to execution of Attachment D by You and Original -Contributor, if required. - -21. "*Licensee*" means any party that has entered into and has in effect -a version of this License with Original Contributor. - -22. "*MIME type*" means a description of what type of media or other -content is in a file, including by way of example but not limited to -'audio/x-pn-realaudio-plugin.' - -23. "*Modification(s)"* means (i) any addition to, deletion from and/or -change to the substance and/or structure of the Covered Code, including -Interfaces; (ii) the combination of any Covered Code and any previous -Modifications; (iii) any new file or other representation of computer -program statements that contains any portion of Covered Code; and/or -(iv) any new Source Code implementing any portion of the Specifications. - -24. "*MP3 Patents*" means any patents necessary to make, use or sell -technology implementing any portion of the specification developed by -the Moving Picture Experts Group known as MPEG-1 Audio Layer-3 or MP3, -including but not limited to all past and future versions, profiles, -extensions, parts and amendments relating to the MP3 specification. - -25. "*MPEG-4 Patents*" means any patents necessary to make, use or sell -technology implementing any portion of the specification developed by -the Moving Pictures Experts Group known as MPEG-4, including but not -limited to all past and future versions, profiles, extensions, parts and -amendments relating to the MPEG-4 specification. - -26. "*Original Code*" means the initial Source Code for the Technology -as described on the Community Web Server. - -27. "*Original Contributor*" means RealNetworks, Inc., its affiliates -and its successors and assigns. - -28. "*Original Contributor MIME Type*" means the MIME registry, browser -preferences, or local file/protocol associations invoking any Helix DNA -Client-based application, including the RealOne Player, for playback of -RealAudio, RealVideo, other RealMedia MIME types or datatypes (e.g., -.ram, .rnx, .rpm, .ra, .rm, .rp, .rt, .rf, .prx, .mpe, .rmp, .rmj, .rav, -.rjs, .rmx, .rjt, .rms), and any other Original Contributor-specific or -proprietary MIME types that Original Contributor may introduce in the -future. - -29. "*Personal Use*" means use of Covered Code by an individual solely -for his or her personal, private and non-commercial purposes. An -individual's use of Covered Code in his or her capacity as an officer, -employee, member, independent contractor or agent of a corporation, -business or organization (commercial or non-commercial) does not qualify -as Personal Use. - -30. "*RealMedia File Format*" means the file format designed and -developed by RealNetworks for storing multimedia data and used to store -RealAudio and RealVideo encoded streams. Valid RealMedia File Format -extensions include: .rm, .rmj, .rmc, .rmvb, .rms. - -31. "*RCSL Webpage*" means the RealNetworks Community Source License -webpage located at https://www.helixcommunity.org/content/rcsl or such -other URL that Original Contributor may designate from time to time. - -32. "*Reformatted Specifications*" means any revision to the -Specifications which translates or reformats the Specifications (as for -example in connection with Your documentation) but which does not alter, -subset or superset * *the functional or operational aspects of the -Specifications. - -33. "*Research Use*" means use and distribution of Covered Code only for -Your Personal Use, research or development use and expressly excludes -Internal Deployment Use and Commercial Use. Research Use also includes -use of Covered Code to teach individuals how to use Covered Code. - -34. "*Shared Modifications*" means Modifications that You distribute or -use for a Commercial Use, in addition to any Modifications provided by -You, at Your option, pursuant to Section 2.2, or received by You from a -Contributor pursuant to Section 2.3. - -35. "*Source Code*" means the preferred form of the Covered Code for -making modifications to it, including all modules it contains, plus any -associated interface definition files, scripts used to control -compilation and installation of an Executable, or source code -differential comparisons against either the Original Code or another -well known, available Covered Code of the Contributor's choice. The -Source Code can be in a compressed or archival form, provided the -appropriate decompression or de-archiving software is widely available -for no charge. - -36. "*Specifications*" means the specifications for the Technology and -other documentation, as designated on the Community Web Server, as may -be revised by Original Contributor from time to time. - -37. "*Trademarks*" means Original Contributor's trademarks and logos, -including, but not limited to, RealNetworks, RealAudio, RealVideo, -RealOne, RealSystem, SureStream, Helix, Helix DNA and other trademarks -whether now used or adopted in the future. - -38. "*Technology*" means the technology described in Attachment B, and -Upgrades. - -39. "*Technology Compatibility Kit"* or *"TCK*" means the test programs, -procedures, acceptance criteria and/or other requirements, designated by -Original Contributor for use in verifying compliance of Covered Code -with the Specifications, in conjunction with the Original Code and -Upgraded Code. Original Contributor may, in its sole discretion and from -time to time, revise a TCK to correct errors and/or omissions and in -connection with Upgrades. - -40. "*Upgrade(s)"* means new versions of Technology designated -exclusively by Original Contributor as an "Upgrade" and released by -Original Contributor from time to time under the terms of the License. - -41. "*Upgraded Code*" means the Source Code and/or Executables for -Upgrades, possibly including Modifications made by Contributors. - -42. *"User's Guide"* means the users guide for the TCK which Original -Contributor makes available to You to provide direction in how to run -the TCK and properly interpret the results, as may be revised by -Original Contributor from time to time. - -43. "*You(r)*" means an individual, or a legal entity acting by and -through an individual or individuals, exercising rights either under -this License or under a future version of this License issued pursuant -to Section 4.1. For legal entities, "You(r)" includes any entity that by -majority voting interest controls, is controlled by, or is under common -control with You. - -44. "*Your Products*" means any (i) hardware products You distribute -integrating the Covered Code; (ii) any software products You distribute -with the Covered Code that utilize the APIs of the Covered Code; or -(iii) any services You provide using the Covered Code. - - - ATTACHMENT A - -REQUIRED NOTICES - - - ATTACHMENT A-1 - -REQUIRED IN ALL CASES - -Notice to be included in header file of all Error Corrections and Shared -Modifications: - -Portions Copyright 1994-2003 © RealNetworks, Inc. All rights reserved. - -The contents of this file, and the files included with this file, are -subject to the current version of RealNetworks Community Source License -Version 1.1 (the "License"). You may not use this file except in -compliance with the License executed by both You and RealNetworks. You -may obtain a copy of the License at * -https://www.helixcommunity.org/content/rcsl.* You may also obtain a copy -of the License by contacting RealNetworks directly. Please see the -License for the rights, obligations and limitations governing use of the -contents of the file. - -This file is part of the Helix DNA technology. RealNetworks, Inc., is -the developer of the Original code and owns the copyrights in the -portions it created. - -This file, and the files included with this file, are distributed on an -'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESS OR IMPLIED, -AND REALNETWORKS HEREBY DISCLAIMS ALL SUCH WARRANTIES, INCLUDING WITHOUT -LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR -PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT. - -Contributor(s): - -_______________________________________________ - -Technology Compatibility Kit Test Suite(s) Location: - -________________________________ - - - ATTACHMENT A-2 - -SAMPLE LICENSEE CERTIFICATION - -"By clicking the `Agree' button below, You certify that You are a -Licensee in good standing under the RealNetworks Community Source -License, ("License") and that Your access, use and distribution of code -and information You may obtain at this site is subject to the License. -If You are not a Licensee under the RealNetworks Community Source -License You agree not to download, copy or use the Helix DNA technology. - - - ATTACHMENT A-3 - -REQUIRED STUDENT NOTIFICATION - -"This software and related documentation has been obtained by Your -educational institution subject to the RealNetworks Community Source -License. You have been provided access to the software and related -documentation for use only in connection with your course work and -research activities as a matriculated student of Your educational -institution. Any other use is expressly prohibited. - -THIS SOFTWARE AND RELATED DOCUMENTATION CONTAINS PROPRIETARY MATERIAL OF -REALNETWORKS, INC, WHICH ARE PROTECTED BY VARIOUS INTELLECTUAL PROPERTY -RIGHTS. - -You may not use this file except in compliance with the License. You may -obtain a copy of the License on the web at -https://www.helixcommunity.org/content/rcsl. - -* -* - - - ATTACHMENT B - -Description of Technology - -Helix DNA, which consists of Helix DNA Client, Helix DNA Server and -Helix DNA Producer. - -Description of "Technology" - -Helix DNA Technology v1.0 as described on the Community Web Server. - - - ATTACHMENT C - -TECHNOLOGY COMPATIBILITY KIT LICENSE - -The following license is effective for the *Helix DNA* Technology -Compatibility Kit - as described on the Community Web Server. The -Technology Compatibility Kit(s) for the Technology specified in -Attachment B may be accessed at the Community Web Server. - -1. TCK License. - -1.1 Grants to use TCK - -Subject to the terms and restrictions set forth below and the -RealNetworks Community Source License, and the Research Use license, -Original Contributor grants to You a worldwide, non-exclusive, -non-transferable license, to the extent of Original Contributor's -Intellectual Property Rights in the TCK (without the right to -sublicense), to use the TCK to develop and test Covered Code. - -1.2 TCK Use Restrictions. - -You are not authorized to create derivative works of the TCK or use the -TCK to test any implementation of the Specification that is not Covered -Code. You may not publish Your test results or make claims of -comparative compatibility with respect to other implementations of the -Specification. In consideration for the license grant in Section 1.1 -above You agree not to develop Your own tests that are intended to -validate conformation with the Specification. - -2. Test Results. - -You agree to provide to Original Contributor or the third party test -facility if applicable, Your test results that demonstrate that Covered -Code is Compliant Covered Code and that Original Contributor may publish -or otherwise distribute such test results. - -PLEASE READ THE TERMS OF THIS LICENSE CAREFULLY. BY CLICKING ON THE -"ACCEPT" BUTTON BELOW YOU ARE ACCEPTING AND AGREEING TO THE TERMS AND -CONDITIONS OF THIS LICENSE WITH THE ORIGINAL CONTRIBUTOR, REALNETWORKS, -INC. IF YOU ARE AGREEING TO THIS LICENSE ON BEHALF OF A COMPANY, YOU -REPRESENT THAT YOU ARE AUTHORIZED TO BIND THE COMPANY TO SUCH A LICENSE. -WHETHER YOU ARE ACTING ON YOUR OWN BEHALF, OR REPRESENTING A COMPANY, -YOU MUST BE OF MAJORITY AGE AND BE OTHERWISE COMPETENT TO ENTER INTO -CONTRACTS. IF YOU DO NOT MEET THIS CRITERIA OR YOU DO NOT AGREE TO ANY -OF THE TERMS AND CONDITIONS OF THIS LICENSE, CLICK ON THE REJECT BUTTON -TO EXIT. - -*ACCEPT / REJECT -* - -* -* - -*To agree to the R&D/academic terms of this license, please register - on the site -- -you will then be given a chance to agree to the clickwrap RCSL - -R&D License - -and gain access to the RCSL-licensed source code. To build or deploy -commercial applications based on the RCSL, you will need to agree to the -Commercial Use license attachments -* - - - diff --git a/bsp/stm32_radio/mp3/pub/RPSL.txt b/bsp/stm32_radio/mp3/pub/RPSL.txt deleted file mode 100644 index d040a45205..0000000000 --- a/bsp/stm32_radio/mp3/pub/RPSL.txt +++ /dev/null @@ -1,518 +0,0 @@ -RealNetworks Public Source License Version 1.0 -(Rev. Date October 28, 2002) - -1. General Definitions. This License applies to any program or other work which -RealNetworks, Inc., or any other entity that elects to use this license, -("Licensor") makes publicly available and which contains a notice placed by -Licensor identifying such program or work as "Original Code" and stating that it -is subject to the terms of this RealNetworks Public Source License version 1.0 -(or subsequent version thereof) ("License"). You are not required to accept this -License. However, nothing else grants You permission to use, copy, modify or -distribute the software or its derivative works. These actions are prohibited by -law if You do not accept this License. Therefore, by modifying, copying or -distributing the software (or any work based on the software), You indicate your -acceptance of this License to do so, and all its terms and conditions. In -addition, you agree to the terms of this License by clicking the Accept button -or downloading the software. As used in this License: - -1.1 "Applicable Patent Rights" mean: (a) in the case where Licensor is the -grantor of rights, claims of patents that (i) are now or hereafter acquired, -owned by or assigned to Licensor and (ii) are necessarily infringed by using or -making the Original Code alone and not in combination with other software or -hardware; and (b) in the case where You are the grantor of rights, claims of -patents that (i) are now or hereafter acquired, owned by or assigned to You and -(ii) are infringed (directly or indirectly) by using or making Your -Modifications, taken alone or in combination with Original Code. - -1.2 "Compatible Source License" means any one of the licenses listed on Exhibit -B or at https://www.helixcommunity.org/content/complicense or other licenses -specifically identified by Licensor in writing. Notwithstanding any term to the -contrary in any Compatible Source License, any code covered by any Compatible -Source License that is used with Covered Code must be made readily available in -Source Code format for royalty-free use under the terms of the Compatible Source -License or this License. - -1.3 "Contributor" means any person or entity that creates or contributes to the -creation of Modifications. - -1.4 "Covered Code" means the Original Code, Modifications, the combination of -Original Code and any Modifications, and/or any respective portions thereof. - -1.5 "Deploy" means to use, sublicense or distribute Covered Code other than for -Your internal research and development (R&D) and/or Personal Use, and includes -without limitation, any and all internal use or distribution of Covered Code -within Your business or organization except for R&D use and/or Personal Use, as -well as direct or indirect sublicensing or distribution of Covered Code by You -to any third party in any form or manner. - -1.6 "Derivative Work" means either the Covered Code or any derivative work under -United States copyright law, and including any work containing or including any -portion of the Covered Code or Modifications, either verbatim or with -modifications and/or translated into another language. Derivative Work also -includes any work which combines any portion of Covered Code or Modifications -with code not otherwise governed by the terms of this License. - -1.7 "Externally Deploy" means to Deploy the Covered Code in any way that may be -accessed or used by anyone other than You, used to provide any services to -anyone other than You, or used in any way to deliver any content to anyone other -than You, whether the Covered Code is distributed to those parties, made -available as an application intended for use over a computer network, or used to -provide services or otherwise deliver content to anyone other than You. - -1.8. "Interface" means interfaces, functions, properties, class definitions, -APIs, header files, GUIDs, V-Tables, and/or protocols allowing one piece of -software, firmware or hardware to communicate or interoperate with another piece -of software, firmware or hardware. - -1.9 "Modifications" mean any addition to, deletion from, and/or change to, the -substance and/or structure of the Original Code, any previous Modifications, the -combination of Original Code and any previous Modifications, and/or any -respective portions thereof. When code is released as a series of files, a -Modification is: (a) any addition to or deletion from the contents of a file -containing Covered Code; and/or (b) any new file or other representation of -computer program statements that contains any part of Covered Code. - -1.10 "Original Code" means (a) the Source Code of a program or other work as -originally made available by Licensor under this License, including the Source -Code of any updates or upgrades to such programs or works made available by -Licensor under this License, and that has been expressly identified by Licensor -as such in the header file(s) of such work; and (b) the object code compiled -from such Source Code and originally made available by Licensor under this -License. - -1.11 "Personal Use" means use of Covered Code by an individual solely for his or -her personal, private and non-commercial purposes. An individual's use of -Covered Code in his or her capacity as an officer, employee, member, independent -contractor or agent of a corporation, business or organization (commercial or -non-commercial) does not qualify as Personal Use. - -1.12 "Source Code" means the human readable form of a program or other work that -is suitable for making modifications to it, including all modules it contains, -plus any associated interface definition files, scripts used to control -compilation and installation of an executable (object code). - -1.13 "You" or "Your" means an individual or a legal entity exercising rights -under this License. For legal entities, "You" or "Your" includes any entity -which controls, is controlled by, or is under common control with, You, where -"control" means (a) the power, direct or indirect, to cause the direction or -management of such entity, whether by contract or otherwise, or (b) ownership of -fifty percent (50%) or more of the outstanding shares or beneficial ownership of -such entity. - -2. Permitted Uses; Conditions & Restrictions. Subject to the terms and -conditions of this License, Licensor hereby grants You, effective on the date -You accept this License (via downloading or using Covered Code or otherwise -indicating your acceptance of this License), a worldwide, royalty-free, -non-exclusive copyright license, to the extent of Licensor's copyrights cover -the Original Code, to do the following: - -2.1 You may reproduce, display, perform, modify and Deploy Covered Code, -provided that in each instance: - -(a) You must retain and reproduce in all copies of Original Code the copyright -and other proprietary notices and disclaimers of Licensor as they appear in the -Original Code, and keep intact all notices in the Original Code that refer to -this License; - -(b) You must include a copy of this License with every copy of Source Code of -Covered Code and documentation You distribute, and You may not offer or impose -any terms on such Source Code that alter or restrict this License or the -recipients' rights hereunder, except as permitted under Section 6; - -(c) You must duplicate, to the extent it does not already exist, the notice in -Exhibit A in each file of the Source Code of all Your Modifications, and cause -the modified files to carry prominent notices stating that You changed the files -and the date of any change; - -(d) You must make Source Code of all Your Externally Deployed Modifications -publicly available under the terms of this License, including the license grants -set forth in Section 3 below, for as long as you Deploy the Covered Code or -twelve (12) months from the date of initial Deployment, whichever is longer. You -should preferably distribute the Source Code of Your Deployed Modifications -electronically (e.g. download from a web site); and - -(e) if You Deploy Covered Code in object code, executable form only, You must -include a prominent notice, in the code itself as well as in related -documentation, stating that Source Code of the Covered Code is available under -the terms of this License with information on how and where to obtain such -Source Code. You must also include the Object Code Notice set forth in Exhibit A -in the "about" box or other appropriate place where other copyright notices are -placed, including any packaging materials. - -2.2 You expressly acknowledge and agree that although Licensor and each -Contributor grants the licenses to their respective portions of the Covered Code -set forth herein, no assurances are provided by Licensor or any Contributor that -the Covered Code does not infringe the patent or other intellectual property -rights of any other entity. Licensor and each Contributor disclaim any liability -to You for claims brought by any other entity based on infringement of -intellectual property rights or otherwise. As a condition to exercising the -rights and licenses granted hereunder, You hereby assume sole responsibility to -secure any other intellectual property rights needed, if any. For example, if a -third party patent license is required to allow You to make, use, sell, import -or offer for sale the Covered Code, it is Your responsibility to acquire such -license(s). - -2.3 Subject to the terms and conditions of this License, Licensor hereby grants -You, effective on the date You accept this License (via downloading or using -Covered Code or otherwise indicating your acceptance of this License), a -worldwide, royalty-free, perpetual, non-exclusive patent license under -Licensor's Applicable Patent Rights to make, use, sell, offer for sale and -import the Covered Code, provided that in each instance you comply with the -terms of this License. - -3. Your Grants. In consideration of, and as a condition to, the licenses granted -to You under this License: - -(a) You grant to Licensor and all third parties a non-exclusive, perpetual, -irrevocable, royalty free license under Your Applicable Patent Rights and other -intellectual property rights owned or controlled by You, to make, sell, offer -for sale, use, import, reproduce, display, perform, modify, distribute and -Deploy Your Modifications of the same scope and extent as Licensor's licenses -under Sections 2.1 and 2.2; and - -(b) You grant to Licensor and its subsidiaries a non-exclusive, worldwide, -royalty-free, perpetual and irrevocable license, under Your Applicable Patent -Rights and other intellectual property rights owned or controlled by You, to -make, use, sell, offer for sale, import, reproduce, display, perform, -distribute, modify or have modified (for Licensor and/or its subsidiaries), -sublicense and distribute Your Modifications, in any form and for any purpose, -through multiple tiers of distribution. - -(c) You agree not use any information derived from Your use and review of the -Covered Code, including but not limited to any algorithms or inventions that may -be contained in the Covered Code, for the purpose of asserting any of Your -patent rights, or assisting a third party to assert any of its patent rights, -against Licensor or any Contributor. - -4. Derivative Works. You may create a Derivative Work by combining Covered Code -with other code not otherwise governed by the terms of this License and -distribute the Derivative Work as an integrated product. In each such instance, -You must make sure the requirements of this License are fulfilled for the -Covered Code or any portion thereof, including all Modifications. - -4.1 You must cause any Derivative Work that you distribute, publish or -Externally Deploy, that in whole or in part contains or is derived from the -Covered Code or any part thereof, to be licensed as a whole at no charge to all -third parties under the terms of this License and no other license except as -provided in Section 4.2. You also must make Source Code available for the -Derivative Work under the same terms as Modifications, described in Sections 2 -and 3, above. - -4.2 Compatible Source Licenses. Software modules that have been independently -developed without any use of Covered Code and which contain no portion of the -Covered Code, Modifications or other Derivative Works, but are used or combined -in any way wtih the Covered Code or any Derivative Work to form a larger -Derivative Work, are exempt from the conditions described in Section 4.1 but -only to the extent that: the software module, including any software that is -linked to, integrated with, or part of the same applications as, the software -module by any method must be wholly subject to one of the Compatible Source -Licenses. Notwithstanding the foregoing, all Covered Code must be subject to the -terms of this License. Thus, the entire Derivative Work must be licensed under a -combination of the RPSL (for Covered Code) and a Compatible Source License for -any independently developed software modules within the Derivative Work. The -foregoing requirement applies even if the Compatible Source License would -ordinarily allow the software module to link with, or form larger works with, -other software that is not subject to the Compatible Source License. For -example, although the Mozilla Public License v1.1 allows Mozilla code to be -combined with proprietary software that is not subject to the MPL, if -MPL-licensed code is used with Covered Code the MPL-licensed code could not be -combined or linked with any code not governed by the MPL. The general intent of -this section 4.2 is to enable use of Covered Code with applications that are -wholly subject to an acceptable open source license. You are responsible for -determining whether your use of software with Covered Code is allowed under Your -license to such software. - -4.3 Mere aggregation of another work not based on the Covered Code with the -Covered Code (or with a work based on the Covered Code) on a volume of a storage -or distribution medium does not bring the other work under the scope of this -License. If You deliver the Covered Code for combination and/or integration with -an application previously provided by You (for example, via automatic updating -technology), such combination and/or integration constitutes a Derivative Work -subject to the terms of this License. - -5. Exclusions From License Grant. Nothing in this License shall be deemed to -grant any rights to trademarks, copyrights, patents, trade secrets or any other -intellectual property of Licensor or any Contributor except as expressly stated -herein. No right is granted to the trademarks of Licensor or any Contributor -even if such marks are included in the Covered Code. Nothing in this License -shall be interpreted to prohibit Licensor from licensing under different terms -from this License any code that Licensor otherwise would have a right to -license. Modifications, Derivative Works and/or any use or combination of -Covered Code with other technology provided by Licensor or third parties may -require additional patent licenses from Licensor which Licensor may grant in its -sole discretion. No patent license is granted separate from the Original Code or -combinations of the Original Code with other software or hardware. - -5.1. Trademarks. This License does not grant any rights to use the trademarks or -trade names owned by Licensor ("Licensor Marks" defined in Exhibit C) or to any -trademark or trade name belonging to any Contributor. No Licensor Marks may be -used to endorse or promote products derived from the Original Code other than as -permitted by the Licensor Trademark Policy defined in Exhibit C. - -6. Additional Terms. You may choose to offer, and to charge a fee for, warranty, -support, indemnity or liability obligations and/or other rights consistent with -the scope of the license granted herein ("Additional Terms") to one or more -recipients of Covered Code. However, You may do so only on Your own behalf and -as Your sole responsibility, and not on behalf of Licensor or any Contributor. -You must obtain the recipient's agreement that any such Additional Terms are -offered by You alone, and You hereby agree to indemnify, defend and hold -Licensor and every Contributor harmless for any liability incurred by or claims -asserted against Licensor or such Contributor by reason of any such Additional -Terms. - -7. Versions of the License. Licensor may publish revised and/or new versions of -this License from time to time. Each version will be given a distinguishing -version number. Once Original Code has been published under a particular version -of this License, You may continue to use it under the terms of that version. You -may also choose to use such Original Code under the terms of any subsequent -version of this License published by Licensor. No one other than Licensor has -the right to modify the terms applicable to Covered Code created under this -License. - -8. NO WARRANTY OR SUPPORT. The Covered Code may contain in whole or in part -pre-release, untested, or not fully tested works. The Covered Code may contain -errors that could cause failures or loss of data, and may be incomplete or -contain inaccuracies. You expressly acknowledge and agree that use of the -Covered Code, or any portion thereof, is at Your sole and entire risk. THE -COVERED CODE IS PROVIDED "AS IS" AND WITHOUT WARRANTY, UPGRADES OR SUPPORT OF -ANY KIND AND LICENSOR AND LICENSOR'S LICENSOR(S) (COLLECTIVELY REFERRED TO AS -"LICENSOR" FOR THE PURPOSES OF SECTIONS 8 AND 9) AND ALL CONTRIBUTORS EXPRESSLY -DISCLAIM ALL WARRANTIES AND/OR CONDITIONS, EXPRESS OR IMPLIED, INCLUDING, BUT -NOT LIMITED TO, THE IMPLIED WARRANTIES AND/OR CONDITIONS OF MERCHANTABILITY, OF -SATISFACTORY QUALITY, OF FITNESS FOR A PARTICULAR PURPOSE, OF ACCURACY, OF QUIET -ENJOYMENT, AND NONINFRINGEMENT OF THIRD PARTY RIGHTS. LICENSOR AND EACH -CONTRIBUTOR DOES NOT WARRANT AGAINST INTERFERENCE WITH YOUR ENJOYMENT OF THE -COVERED CODE, THAT THE FUNCTIONS CONTAINED IN THE COVERED CODE WILL MEET YOUR -REQUIREMENTS, THAT THE OPERATION OF THE COVERED CODE WILL BE UNINTERRUPTED OR -ERROR-FREE, OR THAT DEFECTS IN THE COVERED CODE WILL BE CORRECTED. NO ORAL OR -WRITTEN DOCUMENTATION, INFORMATION OR ADVICE GIVEN BY LICENSOR, A LICENSOR -AUTHORIZED REPRESENTATIVE OR ANY CONTRIBUTOR SHALL CREATE A WARRANTY. You -acknowledge that the Covered Code is not intended for use in high risk -activities, including, but not limited to, the design, construction, operation -or maintenance of nuclear facilities, aircraft navigation, aircraft -communication systems, or air traffic control machines in which case the failure -of the Covered Code could lead to death, personal injury, or severe physical or -environmental damage. Licensor disclaims any express or implied warranty of -fitness for such uses. - -9. LIMITATION OF LIABILITY. TO THE EXTENT NOT PROHIBITED BY LAW, IN NO EVENT -SHALL LICENSOR OR ANY CONTRIBUTOR BE LIABLE FOR ANY INCIDENTAL, SPECIAL, -INDIRECT OR CONSEQUENTIAL DAMAGES ARISING OUT OF OR RELATING TO THIS LICENSE OR -YOUR USE OR INABILITY TO USE THE COVERED CODE, OR ANY PORTION THEREOF, WHETHER -UNDER A THEORY OF CONTRACT, WARRANTY, TORT (INCLUDING NEGLIGENCE OR STRICT -LIABILITY), PRODUCTS LIABILITY OR OTHERWISE, EVEN IF LICENSOR OR SUCH -CONTRIBUTOR HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES AND -NOTWITHSTANDING THE FAILURE OF ESSENTIAL PURPOSE OF ANY REMEDY. SOME -JURISDICTIONS DO NOT ALLOW THE LIMITATION OF LIABILITY OF INCIDENTAL OR -CONSEQUENTIAL DAMAGES, SO THIS LIMITATION MAY NOT APPLY TO YOU. In no event -shall Licensor's total liability to You for all damages (other than as may be -required by applicable law) under this License exceed the amount of ten dollars -($10.00). - -10. Ownership. Subject to the licenses granted under this License, each -Contributor retains all rights, title and interest in and to any Modifications -made by such Contributor. Licensor retains all rights, title and interest in and -to the Original Code and any Modifications made by or on behalf of Licensor -("Licensor Modifications"), and such Licensor Modifications will not be -automatically subject to this License. Licensor may, at its sole discretion, -choose to license such Licensor Modifications under this License, or on -different terms from those contained in this License or may choose not to -license them at all. - -11. Termination. - -11.1 Term and Termination. The term of this License is perpetual unless -terminated as provided below. This License and the rights granted hereunder will -terminate: - -(a) automatically without notice from Licensor if You fail to comply with any -term(s) of this License and fail to cure such breach within 30 days of becoming -aware of such breach; - -(b) immediately in the event of the circumstances described in Section 12.5(b); -or - -(c) automatically without notice from Licensor if You, at any time during the -term of this License, commence an action for patent infringement against -Licensor (including by cross-claim or counter claim in a lawsuit); - -(d) upon written notice from Licensor if You, at any time during the term of -this License, commence an action for patent infringement against any third party -alleging that the Covered Code itself (excluding combinations with other -software or hardware) infringes any patent (including by cross-claim or counter -claim in a lawsuit). - -11.2 Effect of Termination. Upon termination, You agree to immediately stop any -further use, reproduction, modification, sublicensing and distribution of the -Covered Code and to destroy all copies of the Covered Code that are in your -possession or control. All sublicenses to the Covered Code which have been -properly granted prior to termination shall survive any termination of this -License. Provisions which, by their nature, should remain in effect beyond the -termination of this License shall survive, including but not limited to Sections -3, 5, 8, 9, 10, 11, 12.2 and 13. No party will be liable to any other for -compensation, indemnity or damages of any sort solely as a result of terminating -this License in accordance with its terms, and termination of this License will -be without prejudice to any other right or remedy of any party. - -12. Miscellaneous. - -12.1 Government End Users. The Covered Code is a "commercial item" as defined in -FAR 2.101. Government software and technical data rights in the Covered Code -include only those rights customarily provided to the public as defined in this -License. This customary commercial license in technical data and software is -provided in accordance with FAR 12.211 (Technical Data) and 12.212 (Computer -Software) and, for Department of Defense purchases, DFAR 252.227-7015 (Technical -Data -- Commercial Items) and 227.7202-3 (Rights in Commercial Computer Software -or Computer Software Documentation). Accordingly, all U.S. Government End Users -acquire Covered Code with only those rights set forth herein. - -12.2 Relationship of Parties. This License will not be construed as creating an -agency, partnership, joint venture or any other form of legal association -between or among You, Licensor or any Contributor, and You will not represent to -the contrary, whether expressly, by implication, appearance or otherwise. - -12.3 Independent Development. Nothing in this License will impair Licensor's -right to acquire, license, develop, have others develop for it, market and/or -distribute technology or products that perform the same or similar functions as, -or otherwise compete with, Modifications, Derivative Works, technology or -products that You may develop, produce, market or distribute. - -12.4 Waiver; Construction. Failure by Licensor or any Contributor to enforce any -provision of this License will not be deemed a waiver of future enforcement of -that or any other provision. Any law or regulation which provides that the -language of a contract shall be construed against the drafter will not apply to -this License. - -12.5 Severability. (a) If for any reason a court of competent jurisdiction finds -any provision of this License, or portion thereof, to be unenforceable, that -provision of the License will be enforced to the maximum extent permissible so -as to effect the economic benefits and intent of the parties, and the remainder -of this License will continue in full force and effect. (b) Notwithstanding the -foregoing, if applicable law prohibits or restricts You from fully and/or -specifically complying with Sections 2 and/or 3 or prevents the enforceability -of either of those Sections, this License will immediately terminate and You -must immediately discontinue any use of the Covered Code and destroy all copies -of it that are in your possession or control. - -12.6 Dispute Resolution. Any litigation or other dispute resolution between You -and Licensor relating to this License shall take place in the Seattle, -Washington, and You and Licensor hereby consent to the personal jurisdiction of, -and venue in, the state and federal courts within that District with respect to -this License. The application of the United Nations Convention on Contracts for -the International Sale of Goods is expressly excluded. - -12.7 Export/Import Laws. This software is subject to all export and import laws -and restrictions and regulations of the country in which you receive the Covered -Code and You are solely responsible for ensuring that You do not export, -re-export or import the Covered Code or any direct product thereof in violation -of any such restrictions, laws or regulations, or without all necessary -authorizations. - -12.8 Entire Agreement; Governing Law. This License constitutes the entire -agreement between the parties with respect to the subject matter hereof. This -License shall be governed by the laws of the United States and the State of -Washington. - -Where You are located in the province of Quebec, Canada, the following clause -applies: The parties hereby confirm that they have requested that this License -and all related documents be drafted in English. Les parties ont exigé -que le présent contrat et tous les documents connexes soient -rédigés en anglais. - - EXHIBIT A. - -"Copyright © 1995-2002 -RealNetworks, Inc. and/or its licensors. All Rights Reserved. - -The contents of this file, and the files included with this file, are subject to -the current version of the RealNetworks Public Source License Version 1.0 (the -"RPSL") available at https://www.helixcommunity.org/content/rpsl unless you have -licensed the file under the RealNetworks Community Source License Version 1.0 -(the "RCSL") available at https://www.helixcommunity.org/content/rcsl, in which -case the RCSL will apply. You may also obtain the license terms directly from -RealNetworks. You may not use this file except in compliance with the RPSL or, -if you have a valid RCSL with RealNetworks applicable to this file, the RCSL. -Please see the applicable RPSL or RCSL for the rights, obligations and -limitations governing use of the contents of the file. - -This file is part of the Helix DNA Technology. RealNetworks is the developer of -the Original code and owns the copyrights in the portions it created. - -This file, and the files included with this file, is distributed and made -available on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESS OR -IMPLIED, AND REALNETWORKS HEREBY DISCLAIMS ALL SUCH WARRANTIES, INCLUDING -WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR -PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT. - -Contributor(s): ____________________________________ - -Technology Compatibility Kit Test -Suite(s) Location (if licensed under the RCSL): ______________________________ - -Object Code Notice: Helix DNA Client technology included. Copyright (c) -RealNetworks, Inc., 1995-2002. All rights reserved. - - - EXHIBIT B - -Compatible Source Licenses for the RealNetworks Public Source License. The -following list applies to the most recent version of the license as of October -25, 2002, unless otherwise indicated. - -* Academic Free License -* Apache Software License -* Apple Public Source License -* Artistic license -* Attribution Assurance Licenses -* BSD license -* Common Public License (1) -* Eiffel Forum License -* GNU General Public License (GPL) (1) -* GNU Library or "Lesser" General Public License (LGPL) (1) -* IBM Public License -* Intel Open Source License -* Jabber Open Source License -* MIT license -* MITRE Collaborative Virtual Workspace License (CVW License) -* Motosoto License -* Mozilla Public License 1.0 (MPL) -* Mozilla Public License 1.1 (MPL) -* Nokia Open Source License -* Open Group Test Suite License -* Python Software Foundation License -* Ricoh Source Code Public License -* Sun Industry Standards Source License (SISSL) -* Sun Public License -* University of Illinois/NCSA Open Source License -* Vovida Software License v. 1.0 -* W3C License -* X.Net License -* Zope Public License -* zlib/libpng license - -(1) Note: because this license contains certain reciprocal licensing terms that -purport to extend to independently developed code, You may be prohibited under -the terms of this otherwise compatible license from using code licensed under -its terms with Covered Code because Covered Code may only be licensed under the -RealNetworks Public Source License. Any attempt to apply non RPSL license terms, -including without limitation the GPL, to Covered Code is expressly forbidden. -You are responsible for ensuring that Your use of Compatible Source Licensed -code does not violate either the RPSL or the Compatible Source License. - -The latest version of this list can be found at: -https://www.helixcommunity.org/content/complicense - - EXHIBIT C - -RealNetworks' Trademark policy. - -RealNetworks defines the following trademarks collectively as "Licensor -Trademarks": "RealNetworks", "RealPlayer", "RealJukebox", "RealSystem", -"RealAudio", "RealVideo", "RealOne Player", "RealMedia", "Helix" or any other -trademarks or trade names belonging to RealNetworks. - -RealNetworks "Licensor Trademark Policy" forbids any use of Licensor Trademarks -except as permitted by and in strict compliance at all times with RealNetworks' -third party trademark usage guidelines which are posted at -http://www.realnetworks.com/info/helixlogo.html. - diff --git a/bsp/stm32_radio/mp3/pub/mp3common.h b/bsp/stm32_radio/mp3/pub/mp3common.h deleted file mode 100644 index ae3bfffb54..0000000000 --- a/bsp/stm32_radio/mp3/pub/mp3common.h +++ /dev/null @@ -1,123 +0,0 @@ -/* ***** BEGIN LICENSE BLOCK ***** - * Version: RCSL 1.0/RPSL 1.0 - * - * Portions Copyright (c) 1995-2002 RealNetworks, Inc. All Rights Reserved. - * - * The contents of this file, and the files included with this file, are - * subject to the current version of the RealNetworks Public Source License - * Version 1.0 (the "RPSL") available at - * http://www.helixcommunity.org/content/rpsl unless you have licensed - * the file under the RealNetworks Community Source License Version 1.0 - * (the "RCSL") available at http://www.helixcommunity.org/content/rcsl, - * in which case the RCSL will apply. You may also obtain the license terms - * directly from RealNetworks. You may not use this file except in - * compliance with the RPSL or, if you have a valid RCSL with RealNetworks - * applicable to this file, the RCSL. Please see the applicable RPSL or - * RCSL for the rights, obligations and limitations governing use of the - * contents of the file. - * - * This file is part of the Helix DNA Technology. RealNetworks is the - * developer of the Original Code and owns the copyrights in the portions - * it created. - * - * This file, and the files included with this file, is distributed and made - * available on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER - * EXPRESS OR IMPLIED, AND REALNETWORKS HEREBY DISCLAIMS ALL SUCH WARRANTIES, - * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, FITNESS - * FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT. - * - * Technology Compatibility Kit Test Suite(s) Location: - * http://www.helixcommunity.org/content/tck - * - * Contributor(s): - * - * ***** END LICENSE BLOCK ***** */ - -/************************************************************************************** - * Fixed-point MP3 decoder - * Jon Recker (jrecker@real.com), Ken Cooke (kenc@real.com) - * June 2003 - * - * mp3common.h - implementation-independent API's, datatypes, and definitions - **************************************************************************************/ - -#ifndef _MP3COMMON_H -#define _MP3COMMON_H - -#include "mp3dec.h" -#include "statname.h" /* do name-mangling for static linking */ - -#define MAX_SCFBD 4 /* max scalefactor bands per channel */ -#define NGRANS_MPEG1 2 -#define NGRANS_MPEG2 1 - -/* 11-bit syncword if MPEG 2.5 extensions are enabled */ -#define SYNCWORDH 0xff -#define SYNCWORDL 0xe0 - -/* 12-bit syncword if MPEG 1,2 only are supported - * #define SYNCWORDH 0xff - * #define SYNCWORDL 0xf0 - */ - -typedef struct _MP3DecInfo { - /* pointers to platform-specific data structures */ - void *FrameHeaderPS; - void *SideInfoPS; - void *ScaleFactorInfoPS; - void *HuffmanInfoPS; - void *DequantInfoPS; - void *IMDCTInfoPS; - void *SubbandInfoPS; - - /* buffer which must be large enough to hold largest possible main_data section */ - unsigned char mainBuf[MAINBUF_SIZE]; - - /* special info for "free" bitrate files */ - int freeBitrateFlag; - int freeBitrateSlots; - - /* user-accessible info */ - int bitrate; - int nChans; - int samprate; - int nGrans; /* granules per frame */ - int nGranSamps; /* samples per granule */ - int nSlots; - int layer; - MPEGVersion version; - - int mainDataBegin; - int mainDataBytes; - - int part23Length[MAX_NGRAN][MAX_NCHAN]; - -} MP3DecInfo; - -typedef struct _SFBandTable { - short l[23]; - short s[14]; -} SFBandTable; - -/* decoder functions which must be implemented for each platform */ -MP3DecInfo *AllocateBuffers(void); -void FreeBuffers(MP3DecInfo *mp3DecInfo); -int CheckPadBit(MP3DecInfo *mp3DecInfo); -int UnpackFrameHeader(MP3DecInfo *mp3DecInfo, unsigned char *buf); -int UnpackSideInfo(MP3DecInfo *mp3DecInfo, unsigned char *buf); -int DecodeHuffman(MP3DecInfo *mp3DecInfo, unsigned char *buf, int *bitOffset, int huffBlockBits, int gr, int ch); -int Dequantize(MP3DecInfo *mp3DecInfo, int gr); -int IMDCT(MP3DecInfo *mp3DecInfo, int gr, int ch); -int UnpackScaleFactors(MP3DecInfo *mp3DecInfo, unsigned char *buf, int *bitOffset, int bitsAvail, int gr, int ch); -int Subband(MP3DecInfo *mp3DecInfo, short *pcmBuf); - -/* mp3tabs.c - global ROM tables */ -extern const int samplerateTab[3][3]; -extern const short bitrateTab[3][3][15]; -extern const short samplesPerFrameTab[3][3]; -extern const short bitsPerSlotTab[3]; -extern const short sideBytesTab[3][2]; -extern const short slotTab[3][3][15]; -extern const SFBandTable sfBandTable[3][3]; - -#endif /* _MP3COMMON_H */ diff --git a/bsp/stm32_radio/mp3/pub/mp3dec.h b/bsp/stm32_radio/mp3/pub/mp3dec.h deleted file mode 100644 index 7262ab9dae..0000000000 --- a/bsp/stm32_radio/mp3/pub/mp3dec.h +++ /dev/null @@ -1,137 +0,0 @@ -/* ***** BEGIN LICENSE BLOCK ***** - * Version: RCSL 1.0/RPSL 1.0 - * - * Portions Copyright (c) 1995-2002 RealNetworks, Inc. All Rights Reserved. - * - * The contents of this file, and the files included with this file, are - * subject to the current version of the RealNetworks Public Source License - * Version 1.0 (the "RPSL") available at - * http://www.helixcommunity.org/content/rpsl unless you have licensed - * the file under the RealNetworks Community Source License Version 1.0 - * (the "RCSL") available at http://www.helixcommunity.org/content/rcsl, - * in which case the RCSL will apply. You may also obtain the license terms - * directly from RealNetworks. You may not use this file except in - * compliance with the RPSL or, if you have a valid RCSL with RealNetworks - * applicable to this file, the RCSL. Please see the applicable RPSL or - * RCSL for the rights, obligations and limitations governing use of the - * contents of the file. - * - * This file is part of the Helix DNA Technology. RealNetworks is the - * developer of the Original Code and owns the copyrights in the portions - * it created. - * - * This file, and the files included with this file, is distributed and made - * available on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER - * EXPRESS OR IMPLIED, AND REALNETWORKS HEREBY DISCLAIMS ALL SUCH WARRANTIES, - * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, FITNESS - * FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT. - * - * Technology Compatibility Kit Test Suite(s) Location: - * http://www.helixcommunity.org/content/tck - * - * Contributor(s): - * - * ***** END LICENSE BLOCK ***** */ - -/************************************************************************************** - * Fixed-point MP3 decoder - * Jon Recker (jrecker@real.com), Ken Cooke (kenc@real.com) - * June 2003 - * - * mp3dec.h - public C API for MP3 decoder - **************************************************************************************/ - -#ifndef _MP3DEC_H -#define _MP3DEC_H - -// Must be moved KJ -//#define __GNUC__ -#define ARM -#define ARM_ADS - -#if defined(_WIN32) && !defined(_WIN32_WCE) -# -#elif defined(_WIN32) && defined(_WIN32_WCE) && defined(ARM) -# -#elif defined(_WIN32) && defined(WINCE_EMULATOR) -# -#elif defined(ARM_ADS) -# -#elif defined(_SYMBIAN) && defined(__WINS__) /* Symbian emulator for Ix86 */ -# -#elif defined(__GNUC__) && defined(ARM) -# -#elif defined(__GNUC__) && defined(__i386__) -# -#elif defined(_OPENWAVE_SIMULATOR) || defined(_OPENWAVE_ARMULATOR) -# -#else -#error No platform defined. See valid options in mp3dec.h -#endif - -#ifdef __cplusplus -extern "C" { -#endif - -/* determining MAINBUF_SIZE: - * max mainDataBegin = (2^9 - 1) bytes (since 9-bit offset) = 511 - * max nSlots (concatenated with mainDataBegin bytes from before) = 1440 - 9 - 4 + 1 = 1428 - * 511 + 1428 = 1939, round up to 1940 (4-byte align) - */ -#define MAINBUF_SIZE 1940 - -#define MAX_NGRAN 2 /* max granules */ -#define MAX_NCHAN 2 /* max channels */ -#define MAX_NSAMP 576 /* max samples per channel, per granule */ - -/* map to 0,1,2 to make table indexing easier */ -typedef enum { - MPEG1 = 0, - MPEG2 = 1, - MPEG25 = 2 -} MPEGVersion; - -typedef void *HMP3Decoder; - -enum { - ERR_MP3_NONE = 0, - ERR_MP3_INDATA_UNDERFLOW = -1, - ERR_MP3_MAINDATA_UNDERFLOW = -2, - ERR_MP3_FREE_BITRATE_SYNC = -3, - ERR_MP3_OUT_OF_MEMORY = -4, - ERR_MP3_NULL_POINTER = -5, - ERR_MP3_INVALID_FRAMEHEADER = -6, - ERR_MP3_INVALID_SIDEINFO = -7, - ERR_MP3_INVALID_SCALEFACT = -8, - ERR_MP3_INVALID_HUFFCODES = -9, - ERR_MP3_INVALID_DEQUANTIZE = -10, - ERR_MP3_INVALID_IMDCT = -11, - ERR_MP3_INVALID_SUBBAND = -12, - - ERR_UNKNOWN = -9999 -}; - -typedef struct _MP3FrameInfo { - int bitrate; - int nChans; - int samprate; - int bitsPerSample; - int outputSamps; - int layer; - int version; -} MP3FrameInfo; - -/* public API */ -HMP3Decoder MP3InitDecoder(void); -void MP3FreeDecoder(HMP3Decoder hMP3Decoder); -int MP3Decode(HMP3Decoder hMP3Decoder, unsigned char **inbuf, int *bytesLeft, short *outbuf, int useSize); - -void MP3GetLastFrameInfo(HMP3Decoder hMP3Decoder, MP3FrameInfo *mp3FrameInfo); -int MP3GetNextFrameInfo(HMP3Decoder hMP3Decoder, MP3FrameInfo *mp3FrameInfo, unsigned char *buf); -int MP3FindSyncWord(unsigned char *buf, int nBytes); - -#ifdef __cplusplus -} -#endif - -#endif /* _MP3DEC_H */ diff --git a/bsp/stm32_radio/mp3/pub/mp3dec.h.bak b/bsp/stm32_radio/mp3/pub/mp3dec.h.bak deleted file mode 100644 index 5cb099dd77..0000000000 --- a/bsp/stm32_radio/mp3/pub/mp3dec.h.bak +++ /dev/null @@ -1,133 +0,0 @@ -/* ***** BEGIN LICENSE BLOCK ***** - * Version: RCSL 1.0/RPSL 1.0 - * - * Portions Copyright (c) 1995-2002 RealNetworks, Inc. All Rights Reserved. - * - * The contents of this file, and the files included with this file, are - * subject to the current version of the RealNetworks Public Source License - * Version 1.0 (the "RPSL") available at - * http://www.helixcommunity.org/content/rpsl unless you have licensed - * the file under the RealNetworks Community Source License Version 1.0 - * (the "RCSL") available at http://www.helixcommunity.org/content/rcsl, - * in which case the RCSL will apply. You may also obtain the license terms - * directly from RealNetworks. You may not use this file except in - * compliance with the RPSL or, if you have a valid RCSL with RealNetworks - * applicable to this file, the RCSL. Please see the applicable RPSL or - * RCSL for the rights, obligations and limitations governing use of the - * contents of the file. - * - * This file is part of the Helix DNA Technology. RealNetworks is the - * developer of the Original Code and owns the copyrights in the portions - * it created. - * - * This file, and the files included with this file, is distributed and made - * available on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER - * EXPRESS OR IMPLIED, AND REALNETWORKS HEREBY DISCLAIMS ALL SUCH WARRANTIES, - * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, FITNESS - * FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT. - * - * Technology Compatibility Kit Test Suite(s) Location: - * http://www.helixcommunity.org/content/tck - * - * Contributor(s): - * - * ***** END LICENSE BLOCK ***** */ - -/************************************************************************************** - * Fixed-point MP3 decoder - * Jon Recker (jrecker@real.com), Ken Cooke (kenc@real.com) - * June 2003 - * - * mp3dec.h - public C API for MP3 decoder - **************************************************************************************/ - -#ifndef _MP3DEC_H -#define _MP3DEC_H - -#if defined(_WIN32) && !defined(_WIN32_WCE) -# -#elif defined(_WIN32) && defined(_WIN32_WCE) && defined(ARM) -# -#elif defined(_WIN32) && defined(WINCE_EMULATOR) -# -#elif defined(ARM_ADS) -# -#elif defined(_SYMBIAN) && defined(__WINS__) /* Symbian emulator for Ix86 */ -# -#elif defined(__GNUC__) && defined(ARM) -# -#elif defined(__GNUC__) && defined(__i386__) -# -#elif defined(_OPENWAVE_SIMULATOR) || defined(_OPENWAVE_ARMULATOR) -# -#else -// J.Sz. 21/04/2006 -#error No platform defined. See valid options in mp3dec.h -#endif - -#ifdef __cplusplus -extern "C" { -#endif - -/* determining MAINBUF_SIZE: - * max mainDataBegin = (2^9 - 1) bytes (since 9-bit offset) = 511 - * max nSlots (concatenated with mainDataBegin bytes from before) = 1440 - 9 - 4 + 1 = 1428 - * 511 + 1428 = 1939, round up to 1940 (4-byte align) - */ -#define MAINBUF_SIZE 1940 - -#define MAX_NGRAN 2 /* max granules */ -#define MAX_NCHAN 2 /* max channels */ -#define MAX_NSAMP 576 /* max samples per channel, per granule */ - -/* map to 0,1,2 to make table indexing easier */ -typedef enum { - MPEG1 = 0, - MPEG2 = 1, - MPEG25 = 2 -} MPEGVersion; - -typedef void *HMP3Decoder; - -enum { - ERR_MP3_NONE = 0, - ERR_MP3_INDATA_UNDERFLOW = -1, - ERR_MP3_MAINDATA_UNDERFLOW = -2, - ERR_MP3_FREE_BITRATE_SYNC = -3, - ERR_MP3_OUT_OF_MEMORY = -4, - ERR_MP3_NULL_POINTER = -5, - ERR_MP3_INVALID_FRAMEHEADER = -6, - ERR_MP3_INVALID_SIDEINFO = -7, - ERR_MP3_INVALID_SCALEFACT = -8, - ERR_MP3_INVALID_HUFFCODES = -9, - ERR_MP3_INVALID_DEQUANTIZE = -10, - ERR_MP3_INVALID_IMDCT = -11, - ERR_MP3_INVALID_SUBBAND = -12, - - ERR_UNKNOWN = -9999 -}; - -typedef struct _MP3FrameInfo { - int bitrate; - int nChans; - int samprate; - int bitsPerSample; - int outputSamps; - int layer; - int version; -} MP3FrameInfo; - -/* public API */ -HMP3Decoder MP3InitDecoder(void); -void MP3FreeDecoder(HMP3Decoder hMP3Decoder); -int MP3Decode(HMP3Decoder hMP3Decoder, unsigned char **inbuf, int *bytesLeft, short *outbuf, int useSize); - -void MP3GetLastFrameInfo(HMP3Decoder hMP3Decoder, MP3FrameInfo *mp3FrameInfo); -int MP3GetNextFrameInfo(HMP3Decoder hMP3Decoder, MP3FrameInfo *mp3FrameInfo, unsigned char *buf); -int MP3FindSyncWord(unsigned char *buf, int nBytes); - -#ifdef __cplusplus -} -#endif - -#endif /* _MP3DEC_H */ diff --git a/bsp/stm32_radio/mp3/pub/mpadecobjfixpt.h b/bsp/stm32_radio/mp3/pub/mpadecobjfixpt.h deleted file mode 100644 index a8a5c40fea..0000000000 --- a/bsp/stm32_radio/mp3/pub/mpadecobjfixpt.h +++ /dev/null @@ -1,108 +0,0 @@ -/* ***** BEGIN LICENSE BLOCK ***** - * Version: RCSL 1.0/RPSL 1.0 - * - * Portions Copyright (c) 1995-2002 RealNetworks, Inc. All Rights Reserved. - * - * The contents of this file, and the files included with this file, are - * subject to the current version of the RealNetworks Public Source License - * Version 1.0 (the "RPSL") available at - * http://www.helixcommunity.org/content/rpsl unless you have licensed - * the file under the RealNetworks Community Source License Version 1.0 - * (the "RCSL") available at http://www.helixcommunity.org/content/rcsl, - * in which case the RCSL will apply. You may also obtain the license terms - * directly from RealNetworks. You may not use this file except in - * compliance with the RPSL or, if you have a valid RCSL with RealNetworks - * applicable to this file, the RCSL. Please see the applicable RPSL or - * RCSL for the rights, obligations and limitations governing use of the - * contents of the file. - * - * This file is part of the Helix DNA Technology. RealNetworks is the - * developer of the Original Code and owns the copyrights in the portions - * it created. - * - * This file, and the files included with this file, is distributed and made - * available on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER - * EXPRESS OR IMPLIED, AND REALNETWORKS HEREBY DISCLAIMS ALL SUCH WARRANTIES, - * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, FITNESS - * FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT. - * - * Technology Compatibility Kit Test Suite(s) Location: - * http://www.helixcommunity.org/content/tck - * - * Contributor(s): - * - * ***** END LICENSE BLOCK ***** */ - -#ifndef _MPADECOBJFIXPT_H_ -#define _MPADECOBJFIXPT_H_ - -#include "mp3dec.h" /* public C API for new MP3 decoder */ - -class CMpaDecObj -{ -public: - CMpaDecObj(); - ~CMpaDecObj(); - - /////////////////////////////////////////////////////////////////////////// - // Function: Init_n - // Purpose: Initialize the mp3 decoder. - // Parameters: pSync a pointer to a syncword - // ulSize the size of the buffer pSync points to - // bUseSize this tells the decoder to use the input frame - // size on the decode instead of calculating - // the frame size. This is necessary when - // our formatted mp3 data (main_data_begin always - // equal to 0). - // - // Returns: returns 1 on success, 0 on failure - /////////////////////////////////////////////////////////////////////////// - int Init_n(unsigned char *pSync, - unsigned long ulSize, - unsigned char bUseSize=0); - - /////////////////////////////////////////////////////////////////////////// - // Function: DecodeFrame_v - // Purpose: Decodes one mp3 frame - // Parameters: pSource pointer to an mp3 frame (at a syncword) - // pulSize size of the buffer pSource points to. It will - // contain the number of mp3 bytes decoded upon - // return. - // pPCM pointer to a buffer to decode into - // pulPCMSize size of the PCM buffer. It will contain the - // number of PCM bytes prodced upon return. - /////////////////////////////////////////////////////////////////////////// - void DecodeFrame_v(unsigned char *pSource, - unsigned long *pulSize, - unsigned char *pPCM, - unsigned long *pulPCMSize); - - // overloaded new version that returns error code in errCode - void DecodeFrame_v(unsigned char *pSource, - unsigned long *pulSize, - unsigned char *pPCM, - unsigned long *pulPCMSize, - int *errCode); - - void GetPCMInfo_v(unsigned long &ulSampRate, - int &nChannels, - int &nBitsPerSample); - - // return number of samples per frame, PER CHANNEL (renderer multiplies this result by nChannels) - int GetSamplesPerFrame_n(); - - void SetTrustPackets(unsigned char bTrust) { m_bTrustPackets = bTrust; } - -private: - void * m_pDec; // generic void ptr - - void * m_pDecL1; // not implemented (could use old Xing mpadecl1.cpp) - void * m_pDecL2; // not implemented (could use old Xing mpadecl2.cpp) - HMP3Decoder m_pDecL3; - - MP3FrameInfo m_lastMP3FrameInfo; - unsigned char m_bUseFrameSize; - unsigned char m_bTrustPackets; -}; - -#endif /* _MPADECOBJFIXPT_H_ */ diff --git a/bsp/stm32_radio/mp3/pub/statname.h b/bsp/stm32_radio/mp3/pub/statname.h deleted file mode 100644 index 518e4c73f9..0000000000 --- a/bsp/stm32_radio/mp3/pub/statname.h +++ /dev/null @@ -1,88 +0,0 @@ -/* ***** BEGIN LICENSE BLOCK ***** - * Version: RCSL 1.0/RPSL 1.0 - * - * Portions Copyright (c) 1995-2002 RealNetworks, Inc. All Rights Reserved. - * - * The contents of this file, and the files included with this file, are - * subject to the current version of the RealNetworks Public Source License - * Version 1.0 (the "RPSL") available at - * http://www.helixcommunity.org/content/rpsl unless you have licensed - * the file under the RealNetworks Community Source License Version 1.0 - * (the "RCSL") available at http://www.helixcommunity.org/content/rcsl, - * in which case the RCSL will apply. You may also obtain the license terms - * directly from RealNetworks. You may not use this file except in - * compliance with the RPSL or, if you have a valid RCSL with RealNetworks - * applicable to this file, the RCSL. Please see the applicable RPSL or - * RCSL for the rights, obligations and limitations governing use of the - * contents of the file. - * - * This file is part of the Helix DNA Technology. RealNetworks is the - * developer of the Original Code and owns the copyrights in the portions - * it created. - * - * This file, and the files included with this file, is distributed and made - * available on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER - * EXPRESS OR IMPLIED, AND REALNETWORKS HEREBY DISCLAIMS ALL SUCH WARRANTIES, - * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, FITNESS - * FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT. - * - * Technology Compatibility Kit Test Suite(s) Location: - * http://www.helixcommunity.org/content/tck - * - * Contributor(s): - * - * ***** END LICENSE BLOCK ***** */ - -/************************************************************************************** - * Fixed-point MP3 decoder - * Jon Recker (jrecker@real.com), Ken Cooke (kenc@real.com) - * June 2003 - * - * statname.h - name mangling macros for static linking - **************************************************************************************/ - -#ifndef _STATNAME_H -#define _STATNAME_H - -/* define STAT_PREFIX to a unique name for static linking - * all the C functions and global variables will be mangled by the preprocessor - * e.g. void FFT(int *fftbuf) becomes void cook_FFT(int *fftbuf) - */ -#define STAT_PREFIX xmp3 - -#define STATCC1(x,y,z) STATCC2(x,y,z) -#define STATCC2(x,y,z) x##y##z - -#ifdef STAT_PREFIX -#define STATNAME(func) STATCC1(STAT_PREFIX, _, func) -#else -#define STATNAME(func) func -#endif - -/* these symbols are common to all implementations */ -#define CheckPadBit STATNAME(CheckPadBit) -#define UnpackFrameHeader STATNAME(UnpackFrameHeader) -#define UnpackSideInfo STATNAME(UnpackSideInfo) -#define AllocateBuffers STATNAME(AllocateBuffers) -#define FreeBuffers STATNAME(FreeBuffers) -#define DecodeHuffman STATNAME(DecodeHuffman) -#define Dequantize STATNAME(Dequantize) -#define IMDCT STATNAME(IMDCT) -#define UnpackScaleFactors STATNAME(UnpackScaleFactors) -#define Subband STATNAME(Subband) - -#define samplerateTab STATNAME(samplerateTab) -#define bitrateTab STATNAME(bitrateTab) -#define samplesPerFrameTab STATNAME(samplesPerFrameTab) -#define bitsPerSlotTab STATNAME(bitsPerSlotTab) -#define sideBytesTab STATNAME(sideBytesTab) -#define slotTab STATNAME(slotTab) -#define sfBandTable STATNAME(sfBandTable) - -/* in your implementation's top-level include file (e.g. real\coder.h) you should - * add new #define sym STATNAME(sym) lines for all the - * additional global functions or variables which your - * implementation uses - */ - -#endif /* _STATNAME_H */ diff --git a/bsp/stm32_radio/mp3/real/LICENSE.txt b/bsp/stm32_radio/mp3/real/LICENSE.txt deleted file mode 100644 index 12e5372a9f..0000000000 --- a/bsp/stm32_radio/mp3/real/LICENSE.txt +++ /dev/null @@ -1,30 +0,0 @@ - Copyright (c) 1995-2004 RealNetworks, Inc. All Rights Reserved. - - The contents of this directory, and (except where otherwise - indicated) the directories included within this directory, are - subject to the current version of the RealNetworks Public Source - License (the "RPSL") available at RPSL.txt in this directory, unless - you have licensed the directory under the current version of the - RealNetworks Community Source License (the "RCSL") available at - RCSL.txt in this directory, in which case the RCSL will apply. You - may also obtain the license terms directly from RealNetworks. You - may not use the files in this directory except in compliance with the - RPSL or, if you have a valid RCSL with RealNetworks applicable to - this directory, the RCSL. Please see the applicable RPSL or RCSL for - the rights, obligations and limitations governing use of the contents - of the directory. - - This directory is part of the Helix DNA Technology. RealNetworks is - the developer of the Original Code and owns the copyrights in the - portions it created. - - This directory, and the directories included with this directory, are - distributed and made available on an 'AS IS' basis, WITHOUT WARRANTY - OF ANY KIND, EITHER EXPRESS OR IMPLIED, AND REALNETWORKS HEREBY - DISCLAIMS ALL SUCH WARRANTIES, INCLUDING WITHOUT LIMITATION, ANY - WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, - QUIET ENJOYMENT OR NON-INFRINGEMENT. - - Technology Compatibility Kit Test Suite(s) Location: - http://www.helixcommunity.org/content/tck - diff --git a/bsp/stm32_radio/mp3/real/RCSL.txt b/bsp/stm32_radio/mp3/real/RCSL.txt deleted file mode 100644 index a809759a32..0000000000 --- a/bsp/stm32_radio/mp3/real/RCSL.txt +++ /dev/null @@ -1,948 +0,0 @@ -The RCSL is made up of a base agreement and a few Attachments. - -For Research and Development use, you agree to the terms of the -RCSL R&D License (base RCSL and Attachments A, B, and C) - -For Commercial Use (either distribution or internal commercial -deployment) of the Helix DNA with or without support for RealNetworks' -RealAudio and RealVideo Add-on Technology, you agree to the -terms of the same RCSL R&D license -and execute one or more additional Commercial Use License attachments -. - ------------------------------------------------------------------------- - - - REALNETWORKS COMMUNITY SOURCE LICENSE - -Version 1.2 (Rev. Date: January 22, 2003). - - - RECITALS - -Original Contributor has developed Specifications, Source Code -implementations and Executables of certain Technology; and - -Original Contributor desires to license the Technology to a large -community to facilitate research, innovation and product development -while maintaining compatibility of such products with the Technology as -delivered by Original Contributor; and - -Original Contributor desires to license certain Trademarks for the -purpose of branding products that are compatible with the relevant -Technology delivered by Original Contributor; and - -You desire to license the Technology and possibly certain Trademarks -from Original Contributor on the terms and conditions specified in this -License. - -In consideration for the mutual covenants contained herein, You and -Original Contributor agree as follows: - - - AGREEMENT - -*1. Introduction.* - -The RealNetworks Community Source License ("RCSL") and effective -attachments ("License") may include five distinct licenses: - -i) Research Use license -- License plus Attachments A, B and C only. - -ii) Commercial Use and Trademark License, which may be for Internal -Deployment Use or external distribution, or both -- License plus -Attachments A, B, C, and D. - -iii) Technology Compatibility Kit (TCK) license -- Attachment C. - -iv) Add-On Technology License (Executable) Commercial Use License --Attachment F. - -v) Add-On Technology Source Code Porting and Optimization -License-Attachment G. - -The Research Use license is effective when You click and accept this -License. The TCK is effective when You click and accept this License, -unless otherwise specified in the TCK attachments. The Commercial Use -and Trademark, Add-On Technology License, and the Add-On Technology -Source Code Porting and Optimization licenses must each be signed by You -and Original Contributor to become effective. Once effective, these -licenses and the associated requirements and responsibilities are -cumulative. Capitalized terms used in this License are defined in the -Glossary. - -*2. License Grants.* - -2.1 Original Contributor Grant. - -Subject to Your compliance with Sections 3, 8.10 and Attachment A of -this License, Original Contributor grants to You a worldwide, -royalty-free, non-exclusive license, to the extent of Original -Contributor's Intellectual Property Rights covering the Original Code, -Upgraded Code and Specifications, to do the following: - -(a) Research Use License: - -(i) use, reproduce and modify the Original Code, Upgraded Code and -Specifications to create Modifications and Reformatted Specifications -for Research Use by You; - -(ii) publish and display Original Code, Upgraded Code and Specifications -with, or as part of Modifications, as permitted under Section 3.1(b) below; - -(iii) reproduce and distribute copies of Original Code and Upgraded Code -to Licensees and students for Research Use by You; - -(iv) compile, reproduce and distribute Original Code and Upgraded Code -in Executable form, and Reformatted Specifications to anyone for -Research Use by You. - -(b) Other than the licenses expressly granted in this License, Original -Contributor retains all right, title, and interest in Original Code and -Upgraded Code and Specifications. - -2.2 Your Grants. - -(a) To Other Licensees. You hereby grant to each Licensee a license to -Your Error Corrections and Shared Modifications, of the same scope and -extent as Original Contributor's licenses under Section 2.1 a) above -relative to Research Use and Attachment D relative to Commercial Use. - -(b) To Original Contributor. You hereby grant to Original Contributor a -worldwide, royalty-free, non-exclusive, perpetual and irrevocable -license, to the extent of Your Intellectual Property Rights covering -Your Error Corrections, Shared Modifications and Reformatted -Specifications, to use, reproduce, modify, display and distribute Your -Error Corrections, Shared Modifications and Reformatted Specifications, -in any form, including the right to sublicense such rights through -multiple tiers of distribution. - -(c) Other than the licenses expressly granted in Sections 2.2(a) and (b) -above, and the restrictions set forth in Section 3.1(d)(iv) below, You -retain all right, title, and interest in Your Error Corrections, Shared -Modifications and Reformatted Specifications. - -2.3 Contributor Modifications. - -You may use, reproduce, modify, display and distribute Contributor Error -Corrections, Shared Modifications and Reformatted Specifications, -obtained by You under this License, to the same scope and extent as with -Original Code, Upgraded Code and Specifications. - -2.4 Subcontracting. - -You may deliver the Source Code of Covered Code to other Licensees -having at least a Research Use license, for the sole purpose of -furnishing development services to You in connection with Your rights -granted in this License. All such Licensees must execute appropriate -documents with respect to such work consistent with the terms of this -License, and acknowledging their work-made-for-hire status or assigning -exclusive right to the work product and associated Intellectual Property -Rights to You. - -*3. Requirements and Responsibilities*. - -3.1 Research Use License. - -As a condition of exercising the rights granted under Section 2.1(a) -above, You agree to comply with the following: - -(a) Your Contribution to the Community. All Error Corrections and Shared -Modifications which You create or contribute to are automatically -subject to the licenses granted under Section 2.2 above. You are -encouraged to license all of Your other Modifications under Section 2.2 -as Shared Modifications, but are not required to do so. You agree to -notify Original Contributor of any errors in the Specification. - -(b) Source Code Availability. You agree to provide all Your Error -Corrections to Original Contributor as soon as reasonably practicable -and, in any event, prior to Internal Deployment Use or Commercial Use, -if applicable. Original Contributor may, at its discretion, post Source -Code for Your Error Corrections and Shared Modifications on the -Community Webserver. You may also post Error Corrections and Shared -Modifications on a web-server of Your choice; provided, that You must -take reasonable precautions to ensure that only Licensees have access to -such Error Corrections and Shared Modifications. Such precautions shall -include, without limitation, a password protection scheme limited to -Licensees and a click-on, download certification of Licensee status -required of those attempting to download from the server. An example of -an acceptable certification is attached as Attachment A-2. - -(c) Notices. All Error Corrections and Shared Modifications You create -or contribute to must include a file documenting the additions and -changes You made and the date of such additions and changes. You must -also include the notice set forth in Attachment A-1 in the file header. -If it is not possible to put the notice in a particular Source Code file -due to its structure, then You must include the notice in a location -(such as a relevant directory file), where a recipient would be most -likely to look for such a notice. - -(d) Redistribution. - -(i) Source. Covered Code may be distributed in Source Code form only to -another Licensee (except for students as provided below). You may not -offer or impose any terms on any Covered Code that alter the rights, -requirements, or responsibilities of such Licensee. You may distribute -Covered Code to students for use in connection with their course work -and research projects undertaken at accredited educational institutions. -Such students need not be Licensees, but must be given a copy of the -notice set forth in Attachment A-3 and such notice must also be included -in a file header or prominent location in the Source Code made available -to such students. - -(ii) Executable. You may distribute Executable version(s) of Covered -Code to Licensees and other third parties only for the purpose of -evaluation and comment in connection with Research Use by You and under -a license of Your choice, but which limits use of such Executable -version(s) of Covered Code only to that purpose. - -(iii) Modified Class, Interface and Package Naming. In connection with -Research Use by You only, You may use Original Contributor's class, -Interface and package names only to accurately reference or invoke the -Source Code files You modify. Original Contributor grants to You a -limited license to the extent necessary for such purposes. - -(iv) You expressly agree that any distribution, in whole or in part, of -Modifications developed by You shall only be done pursuant to the terms -and conditions of this License. - -(e) Extensions. - -(i) Covered Code. You may not include any Source Code of Community Code -in any Extensions. You may include the compiled Header Files of -Community Code in an Extension provided that Your use of the Covered -Code, including Heading Files, complies with the Commercial Use License, -the TCK and all other terms of this License. - -(ii) Publication. No later than the date on which You first distribute -such Extension for Commercial Use, You must publish to the industry, on -a non-confidential basis and free of all copyright restrictions with -respect to reproduction and use, an accurate and current specification -for any Extension. In addition, You must make available an appropriate -test suite, pursuant to the same rights as the specification, -sufficiently detailed to allow any third party reasonably skilled in the -technology to produce implementations of the Extension compatible with -the specification. Such test suites must be made available as soon as -reasonably practicable but, in no event, later than ninety (90) days -after Your first Commercial Use of the Extension. You must use -reasonable efforts to promptly clarify and correct the specification and -the test suite upon written request by Original Contributor. - -(iii) Open. You agree to refrain from enforcing any Intellectual -Property Rights You may have covering any interface(s) of Your -Extension, which would prevent the implementation of such interface(s) -by Original Contributor or any Licensee. This obligation does not -prevent You from enforcing any Intellectual Property Right You have that -would otherwise be infringed by an implementation of Your Extension. - -(iv) Interface Modifications and Naming. You may not modify or add to -the GUID space * * "xxxxxxxx-0901-11d1-8B06-00A024406D59" or any other -GUID space designated by Original Contributor. You may not modify any -Interface prefix provided with the Covered Code or any other prefix -designated by Original Contributor.* * - -* * - -(f) You agree that any Specifications provided to You by Original -Contributor are confidential and proprietary information of Original -Contributor. You must maintain the confidentiality of the Specifications -and may not disclose them to any third party without Original -Contributor's prior written consent. You may only use the Specifications -under the terms of this License and only for the purpose of implementing -the terms of this License with respect to Covered Code. You agree not -use, copy or distribute any such Specifications except as provided in -writing by Original Contributor. - -3.2 Commercial Use License. - -You may not make Commercial Use of any Covered Code unless You and -Original Contributor have executed a copy of the Commercial Use and -Trademark License attached as Attachment D. - -*4. Versions of the License.* - -4.1 License Versions. - -Original Contributor may publish revised versions of the License from -time to time. Each version will be given a distinguishing version number. - -4.2 Effect. - -Once a particular version of Covered Code has been provided under a -version of the License, You may always continue to use such Covered Code -under the terms of that version of the License. You may also choose to -use such Covered Code under the terms of any subsequent version of the -License. No one other than Original Contributor has the right to -promulgate License versions. - -4.3 Multiple-Licensed Code. - -Original Contributor may designate portions of the Covered Code as -"Multiple-Licensed." "Multiple-Licensed" means that the Original -Contributor permits You to utilize those designated portions of the -Covered Code under Your choice of this License or the alternative -license(s), if any, specified by the Original Contributor in an -Attachment to this License. - -*5. Disclaimer of Warranty.* - -5.1 COVERED CODE PROVIDED AS IS. - -COVERED CODE IS PROVIDED UNDER THIS LICENSE "AS IS," WITHOUT WARRANTY OF -ANY KIND, EITHER EXPRESS OR IMPLIED, INCLUDING, WITHOUT LIMITATION, -WARRANTIES THAT THE COVERED CODE IS FREE OF DEFECTS, MERCHANTABLE, FIT -FOR A PARTICULAR PURPOSE OR NON-INFRINGING. YOU AGREE TO BEAR THE ENTIRE -RISK IN CONNECTION WITH YOUR USE AND DISTRIBUTION OF COVERED CODE UNDER -THIS LICENSE. THIS DISCLAIMER OF WARRANTY CONSTITUTES AN ESSENTIAL PART -OF THIS LICENSE. NO USE OF ANY COVERED CODE IS AUTHORIZED HEREUNDER -EXCEPT SUBJECT TO THIS DISCLAIMER. - -5.2 Not Designed for High Risk Activities. - -You acknowledge that Original Code, Upgraded Code and Specifications are -not designed or intended for use in high risk activities including, but -not limited to: (i) on-line control of aircraft, air traffic, aircraft -navigation or aircraft communications; or (ii) in the design, -construction, operation or maintenance of any nuclear facility. Original -Contributor disclaims any express or implied warranty of fitness for -such uses. - -*6. Termination.* - -6.1 By You. - -You may terminate this Research Use license at anytime by providing -written notice to Original Contributor. - -6.2 By Original Contributor. - -This License and the rights granted hereunder will terminate: - -(i) automatically if You fail to comply with the terms of this License -and fail to cure such breach within 30 days of receipt of written notice -of the breach; - -(ii) immediately in the event of circumstances specified in Sections 7.1 -and 8.4; or - -(iii) at Original Contributor's discretion upon any action initiated by -You (including by cross-claim or counter claim) alleging that use or -distribution by Original Contributor or any Licensee, of Original Code, -Upgraded Code, Error Corrections, Shared Modifications or Specifications -infringe a patent owned or controlled by You. - -6.3 Effective of Termination. - -Upon termination, You agree to discontinue use of and destroy all copies -of Covered Code in Your possession. All sublicenses to the Covered Code -which You have properly granted shall survive any termination of this -License. Provisions that, by their nature, should remain in effect -beyond the termination of this License shall survive including, without -limitation, Sections 2.2, 3, 5, 7 and 8. - -6.4 No Compensation. - -Each party waives and releases the other from any claim to compensation -or indemnity for permitted or lawful termination of the business -relationship established by this License. - -*7. Liability.* - -7.1 Infringement. Should any of the Original Code, Upgraded Code, TCK or -Specifications ("Materials") become the subject of a claim of -infringement, Original Contributor may, at its sole option, (i) attempt -to procure the rights necessary for You to continue using the Materials, -(ii) modify the Materials so that they are no longer infringing, or -(iii) terminate Your right to use the Materials, immediately upon -written notice, and refund to You the amount, if any, having then -actually been paid by You to Original Contributor for the Original Code, -Upgraded Code and TCK, depreciated on a straight line, five year basis. - -7.2 LIMITATION OF LIABILITY. TO THE FULL EXTENT ALLOWED BY APPLICABLE -LAW, ORIGINAL CONTRIBUTOR'S LIABILITY TO YOU FOR CLAIMS RELATING TO THIS -LICENSE, WHETHER FOR BREACH OR IN TORT, SHALL BE LIMITED TO ONE HUNDRED -PERCENT (100%) OF THE AMOUNT HAVING THEN ACTUALLY BEEN PAID BY YOU TO -ORIGINAL CONTRIBUTOR FOR ALL COPIES LICENSED HEREUNDER OF THE PARTICULAR -ITEMS GIVING RISE TO SUCH CLAIM, IF ANY, DURING THE TWELVE MONTHS -PRECEDING THE CLAIMED BREACH. IN NO EVENT WILL YOU (RELATIVE TO YOUR -SHARED MODIFICATIONS OR ERROR CORRECTIONS) OR ORIGINAL CONTRIBUTOR BE -LIABLE FOR ANY INDIRECT, PUNITIVE, SPECIAL, INCIDENTAL OR CONSEQUENTIAL -DAMAGES IN CONNECTION WITH OR RISING OUT OF THIS LICENSE (INCLUDING, -WITHOUT LIMITATION, LOSS OF PROFITS, USE, DATA, OR OTHER ECONOMIC -ADVANTAGE), HOWEVER IT ARISES AND ON ANY THEORY OF LIABILITY, WHETHER IN -AN ACTION FOR CONTRACT, STRICT LIABILITY OR TORT (INCLUDING NEGLIGENCE) -OR OTHERWISE, WHETHER OR NOT YOU OR ORIGINAL CONTRIBUTOR HAS BEEN -ADVISED OF THE POSSIBILITY OF SUCH DAMAGE AND NOTWITHSTANDING THE -FAILURE OF ESSENTIAL PURPOSE OF ANY REMEDY. - -*8. Miscellaneous.* - -8.1 Trademark. - -You shall not use any Trademark unless You and Original Contributor -execute a copy of the Commercial Use and Trademark License Agreement -attached hereto as Attachment D. Except as expressly provided in the -License, You are granted no right, title or license to, or interest in, -any Trademarks. Whether or not You and Original Contributor enter into -the Trademark License, You agree not to (i) challenge Original -Contributor's ownership or use of Trademarks; (ii) attempt to register -any Trademarks, or any mark or logo substantially similar thereto; or -(iii) incorporate any Trademarks into Your own trademarks, product -names, service marks, company names, or domain names. - -8.2 Integration. - -This License represents the complete agreement concerning the subject -matter hereof. - -8.3 Assignment. - -Original Contributor may assign this License, and its rights and -obligations hereunder, in its sole discretion. You may assign the -Research Use portions of this License and the TCK license to a third -party upon prior written notice to Original Contributor (which may be -provided electronically via the Community Web-Server). You may not -assign the Commercial Use and Trademark license, the Add-On Technology -License, or the Add-On Technology Source Code Porting License, including -by way of merger (regardless of whether You are the surviving entity) or -acquisition, without Original Contributor's prior written consent. - -8.4 Severability. - -If any provision of this License is held to be unenforceable, such -provision shall be reformed only to the extent necessary to make it -enforceable. Notwithstanding the foregoing, if You are prohibited by law -from fully and specifically complying with Sections 2.2 or 3, this -License will immediately terminate and You must immediately discontinue -any use of Covered Code. - -8.5 Governing Law. - -This License shall be governed by the laws of the United States and the -State of Washington, as applied to contracts entered into and to be -performed in Washington between Washington residents. The application of -the United Nations Convention on Contracts for the International Sale of -Goods is expressly excluded. You agree that the state and federal courts -located in Seattle, Washington have exclusive jurisdiction over any -claim relating to the License, including contract and tort claims. - -8.6 Dispute Resolution. - -a) Arbitration. Any dispute arising out of or relating to this License -shall be finally settled by arbitration as set out herein, except that -either party may bring any action, in a court of competent jurisdiction -(which jurisdiction shall be exclusive), with respect to any dispute -relating to such party's Intellectual Property Rights or with respect to -Your compliance with the TCK license. Arbitration shall be administered: -(i) by the American Arbitration Association (AAA), (ii) in accordance -with the rules of the United Nations Commission on International Trade -Law (UNCITRAL) (the "Rules") in effect at the time of arbitration as -modified herein; and (iii) the arbitrator will apply the substantive -laws of Washington and the United States. Judgment upon the award -rendered by the arbitrator may be entered in any court having -jurisdiction to enforce such award. - -b) Arbitration language, venue and damages. All arbitration proceedings -shall be conducted in English by a single arbitrator selected in -accordance with the Rules, who must be fluent in English and be either a -retired judge or practicing attorney having at least ten (10) years -litigation experience and be reasonably familiar with the technology -matters relative to the dispute. Unless otherwise agreed, arbitration -venue shall be in Seattle, Washington. The arbitrator may award monetary -damages only and nothing shall preclude either party from seeking -provisional or emergency relief from a court of competent jurisdiction. -The arbitrator shall have no authority to award damages in excess of -those permitted in this License and any such award in excess is void. -All awards will be payable in U.S. dollars and may include, for the -prevailing party (i) pre-judgment award interest, (ii) reasonable -attorneys' fees incurred in connection with the arbitration, and (iii) -reasonable costs and expenses incurred in enforcing the award. The -arbitrator will order each party to produce identified documents and -respond to no more than twenty-five single question interrogatories. - -8.7 Construction. - -Any law or regulation, which provides that the language of a contract -shall be construed against the drafter, shall not apply to this License. - -8.8 U.S. Government End Users. - -The Covered Code is a "commercial item," as that term is defined in 48 -C.F.R. 2.101 (Oct. 1995), consisting of "commercial computer software" -and "commercial computer software documentation," as such terms are used -in 48 C.F.R. 12.212 (Sept. 1995). Consistent with 48 C.F.R. 12.212 and -48 C.F.R. 227.7202-1 through 227.7202-4 (June 1995), all U.S. Government -End Users acquire Covered Code with only those rights set forth herein. -You agree to pass this notice to our licensees. - -8.9 Marketing Activities. - -Licensee hereby grants Original Contributor a non-exclusive, -non-transferable, limited license to use the Licensee's company name and -logo ("Licensee Marks") in any presentations, press releases, or -marketing materials solely for the purpose of identifying Licensee as a -member of the Helix Community. Licensee shall provide samples of -Licensee Marks to Original Contributor upon request by Original -Contributor. Original Contributor acknowledges that the Licensee Marks -are the trademarks of Licensee. Original Contributor shall not use the -Licensee Marks in a way that may imply that Original Contributor is an -agency or branch of Licensee. Original Contributor understands and -agrees that the use of any Licensee Marks in connection with this -Agreement shall not create any right, title or interest, in, or to the -Licensee Marks or any Licensee trademarks and that all such use and -goodwill associated with any such trademarks will inure to the benefit -of Licensee. Further the Original Contributor will stop usage of the -Licensee Marks upon Licensee's request. - -8.10 Press Announcements. - -You may make press announcements or other public statements regarding -this License without the prior written consent of the Original -Contributor, if Your statement is limited to announcing the licensing of -the Covered Code or the availability of Your Product and its -compatibility with the Covered Code. All other public announcements -regarding this license require the prior written consent of the Original -Contributor. Consent requests are welcome at press@helixcommunity.org. - -8.11 International Use. - -a) Export/Import laws. Covered Code is subject to U.S. export control -laws and may be subject to export or import regulations in other -countries. Each party agrees to comply strictly with all such laws and -regulations and acknowledges their responsibility to obtain such -licenses to export, re-export, or import as may be required. You agree -to pass these obligations to Your licensees. - -b) Intellectual Property Protection. Due to limited intellectual -property protection and enforcement in certain countries, You agree not -to redistribute the Original Code, Upgraded Code, TCK and Specifications -to any country on the list of restricted countries on the Community Web -Server. - -8.12 Language. - -This License is in the English language only, which language shall be -controlling in all respects, and all versions of this License in any -other language shall be for accommodation only and shall not be binding -on the parties to this License. All communications and notices made or -given pursuant to this License, and all documentation and support to be -provided, unless otherwise noted, shall be in the English language. - -PLEASE READ THE TERMS OF THIS LICENSE CAREFULLY. BY CLICKING ON THE -"ACCEPT" BUTTON BELOW YOU ARE ACCEPTING AND AGREEING TO THE TERMS AND -CONDITIONS OF THIS LICENSE WITH REALNETWORKS, INC. IF YOU ARE AGREEING -TO THIS LICENSE ON BEHALF OF A COMPANY, YOU REPRESENT THAT YOU ARE -AUTHORIZED TO BIND THE COMPANY TO SUCH A LICENSE. WHETHER YOU ARE ACTING -ON YOUR OWN BEHALF, OR REPRESENTING A COMPANY, YOU MUST BE OF MAJORITY -AGE AND BE OTHERWISE COMPETENT TO ENTER INTO CONTRACTS. IF YOU DO NOT -MEET THIS CRITERIA OR YOU DO NOT AGREE TO ANY OF THE TERMS AND -CONDITIONS OF THIS LICENSE, CLICK ON THE REJECT BUTTON TO EXIT. - - - GLOSSARY - -1. *"Added Value"* means code which: - -(i) has a principal purpose which is substantially different from that -of the stand-alone Technology; - -(ii) represents a significant functional and value enhancement to the -Technology; - -(iii) operates in conjunction with the Technology; and - -(iv) is not marketed as a technology which replaces or substitutes for -the Technology - -2. "*Applicable Patent Rights*" mean: (a) in the case where Original -Contributor is the grantor of rights, claims of patents that (i) are now -or hereafter acquired, owned by or assigned to Original Contributor and -(ii) are necessarily infringed by using or making the Original Code or -Upgraded Code, including Modifications provided by Original Contributor, -alone and not in combination with other software or hardware; and (b) in -the case where Licensee is the grantor of rights, claims of patents that -(i) are now or hereafter acquired, owned by or assigned to Licensee and -(ii) are infringed (directly or indirectly) by using or making -Licensee's Modifications or Error Corrections, taken alone or in -combination with Covered Code. - -3. "*Application Programming Interfaces (APIs)"* means the interfaces, -associated header files, service provider interfaces, and protocols that -enable a device, application, Operating System, or other program to -obtain services from or make requests of (or provide services in -response to requests from) other programs, and to use, benefit from, or -rely on the resources, facilities, and capabilities of the relevant -programs using the APIs. APIs includes the technical documentation -describing the APIs, the Source Code constituting the API, and any -Header Files used with the APIs. - -4. "*Commercial Use*" means any use (internal or external), copying, -sublicensing or distribution (internal or external), directly or -indirectly of Covered Code by You other than Your Research Use of -Covered Code within Your business or organization or in conjunction with -other Licensees with equivalent Research Use rights. Commercial Use -includes any use of the Covered Code for direct or indirect commercial -or strategic gain, advantage or other business purpose. Any Commercial -Use requires execution of Attachment D by You and Original Contributor. - -5. "*Community Code*" means the Original Code, Upgraded Code, Error -Corrections, Shared Modifications, or any combination thereof. - -6. "*Community Webserver(s)"* means the webservers designated by -Original Contributor for access to the Original Code, Upgraded Code, TCK -and Specifications and for posting Error Corrections and Shared -Modifications. - -7. "*Compliant Covered Code*" means Covered Code that complies with the -requirements of the TCK. - -8. "*Contributor*" means each Licensee that creates or contributes to -the creation of any Error Correction or Shared Modification. - -9. "*Covered Code*" means the Original Code, Upgraded Code, -Modifications, or any combination thereof. - -10. "*Error Correction*" means any change made to Community Code which -conforms to the Specification and corrects the adverse effect of a -failure of Community Code to perform any function set forth in or -required by the Specifications. - -11. "*Executable*" means Covered Code that has been converted from -Source Code to the preferred form for execution by a computer or digital -processor (e.g. binary form). - -12. "*Extension(s)"* means any additional Interfaces developed by or for -You which: (i) are designed for use with the Technology; (ii) constitute -an API for a library of computing functions or services; and (iii) are -disclosed or otherwise made available to third party software developers -for the purpose of developing software which invokes such additional -Interfaces. The foregoing shall not apply to software developed by Your -subcontractors to be exclusively used by You. - -13. "*Header File(s)"* means that portion of the Source Code that -provides the names and types of member functions, data members, class -definitions, and interface definitions necessary to implement the APIs -for the Covered Code. Header Files include, files specifically -designated by Original Contributor as Header Files. Header Files do not -include the code necessary to implement the functionality underlying the -Interface. - -14. *"Helix DNA Server Technology"* means the program(s) that implement -the Helix Universal Server streaming engine for the Technology as -defined in the Specification. - -15. *"Helix DNA Client Technology"* means the Covered Code that -implements the RealOne Player engine as defined in the Specification. - -16. *"Helix DNA Producer Technology"* means the Covered Code that -implements the Helix Producer engine as defined in the Specification. - -17. *"Helix DNA Technology"* means the Helix DNA Server Technology, the -Helix DNA Client Technology, the Helix DNA Producer Technology and other -Helix technologies designated by Original Contributor. - -18. "*Intellectual Property Rights*" means worldwide statutory and -common law rights associated solely with (i) Applicable Patent Rights; -(ii) works of authorship including copyrights, copyright applications, -copyright registrations and "moral rights"; (iii) the protection of -trade and industrial secrets and confidential information; and (iv) -divisions, continuations, renewals, and re-issuances of the foregoing -now existing or acquired in the future. - -19. *"Interface*" means interfaces, functions, properties, class -definitions, APIs, Header Files, GUIDs, V-Tables, and/or protocols -allowing one piece of software, firmware or hardware to communicate or -interoperate with another piece of software, firmware or hardware. - -20. "*Internal Deployment Use*" means use of Compliant Covered Code -(excluding Research Use) within Your business or organization only by -Your employees and/or agents on behalf of Your business or organization, -but not to provide services, including content distribution, to third -parties, subject to execution of Attachment D by You and Original -Contributor, if required. - -21. "*Licensee*" means any party that has entered into and has in effect -a version of this License with Original Contributor. - -22. "*MIME type*" means a description of what type of media or other -content is in a file, including by way of example but not limited to -'audio/x-pn-realaudio-plugin.' - -23. "*Modification(s)"* means (i) any addition to, deletion from and/or -change to the substance and/or structure of the Covered Code, including -Interfaces; (ii) the combination of any Covered Code and any previous -Modifications; (iii) any new file or other representation of computer -program statements that contains any portion of Covered Code; and/or -(iv) any new Source Code implementing any portion of the Specifications. - -24. "*MP3 Patents*" means any patents necessary to make, use or sell -technology implementing any portion of the specification developed by -the Moving Picture Experts Group known as MPEG-1 Audio Layer-3 or MP3, -including but not limited to all past and future versions, profiles, -extensions, parts and amendments relating to the MP3 specification. - -25. "*MPEG-4 Patents*" means any patents necessary to make, use or sell -technology implementing any portion of the specification developed by -the Moving Pictures Experts Group known as MPEG-4, including but not -limited to all past and future versions, profiles, extensions, parts and -amendments relating to the MPEG-4 specification. - -26. "*Original Code*" means the initial Source Code for the Technology -as described on the Community Web Server. - -27. "*Original Contributor*" means RealNetworks, Inc., its affiliates -and its successors and assigns. - -28. "*Original Contributor MIME Type*" means the MIME registry, browser -preferences, or local file/protocol associations invoking any Helix DNA -Client-based application, including the RealOne Player, for playback of -RealAudio, RealVideo, other RealMedia MIME types or datatypes (e.g., -.ram, .rnx, .rpm, .ra, .rm, .rp, .rt, .rf, .prx, .mpe, .rmp, .rmj, .rav, -.rjs, .rmx, .rjt, .rms), and any other Original Contributor-specific or -proprietary MIME types that Original Contributor may introduce in the -future. - -29. "*Personal Use*" means use of Covered Code by an individual solely -for his or her personal, private and non-commercial purposes. An -individual's use of Covered Code in his or her capacity as an officer, -employee, member, independent contractor or agent of a corporation, -business or organization (commercial or non-commercial) does not qualify -as Personal Use. - -30. "*RealMedia File Format*" means the file format designed and -developed by RealNetworks for storing multimedia data and used to store -RealAudio and RealVideo encoded streams. Valid RealMedia File Format -extensions include: .rm, .rmj, .rmc, .rmvb, .rms. - -31. "*RCSL Webpage*" means the RealNetworks Community Source License -webpage located at https://www.helixcommunity.org/content/rcsl or such -other URL that Original Contributor may designate from time to time. - -32. "*Reformatted Specifications*" means any revision to the -Specifications which translates or reformats the Specifications (as for -example in connection with Your documentation) but which does not alter, -subset or superset * *the functional or operational aspects of the -Specifications. - -33. "*Research Use*" means use and distribution of Covered Code only for -Your Personal Use, research or development use and expressly excludes -Internal Deployment Use and Commercial Use. Research Use also includes -use of Covered Code to teach individuals how to use Covered Code. - -34. "*Shared Modifications*" means Modifications that You distribute or -use for a Commercial Use, in addition to any Modifications provided by -You, at Your option, pursuant to Section 2.2, or received by You from a -Contributor pursuant to Section 2.3. - -35. "*Source Code*" means the preferred form of the Covered Code for -making modifications to it, including all modules it contains, plus any -associated interface definition files, scripts used to control -compilation and installation of an Executable, or source code -differential comparisons against either the Original Code or another -well known, available Covered Code of the Contributor's choice. The -Source Code can be in a compressed or archival form, provided the -appropriate decompression or de-archiving software is widely available -for no charge. - -36. "*Specifications*" means the specifications for the Technology and -other documentation, as designated on the Community Web Server, as may -be revised by Original Contributor from time to time. - -37. "*Trademarks*" means Original Contributor's trademarks and logos, -including, but not limited to, RealNetworks, RealAudio, RealVideo, -RealOne, RealSystem, SureStream, Helix, Helix DNA and other trademarks -whether now used or adopted in the future. - -38. "*Technology*" means the technology described in Attachment B, and -Upgrades. - -39. "*Technology Compatibility Kit"* or *"TCK*" means the test programs, -procedures, acceptance criteria and/or other requirements, designated by -Original Contributor for use in verifying compliance of Covered Code -with the Specifications, in conjunction with the Original Code and -Upgraded Code. Original Contributor may, in its sole discretion and from -time to time, revise a TCK to correct errors and/or omissions and in -connection with Upgrades. - -40. "*Upgrade(s)"* means new versions of Technology designated -exclusively by Original Contributor as an "Upgrade" and released by -Original Contributor from time to time under the terms of the License. - -41. "*Upgraded Code*" means the Source Code and/or Executables for -Upgrades, possibly including Modifications made by Contributors. - -42. *"User's Guide"* means the users guide for the TCK which Original -Contributor makes available to You to provide direction in how to run -the TCK and properly interpret the results, as may be revised by -Original Contributor from time to time. - -43. "*You(r)*" means an individual, or a legal entity acting by and -through an individual or individuals, exercising rights either under -this License or under a future version of this License issued pursuant -to Section 4.1. For legal entities, "You(r)" includes any entity that by -majority voting interest controls, is controlled by, or is under common -control with You. - -44. "*Your Products*" means any (i) hardware products You distribute -integrating the Covered Code; (ii) any software products You distribute -with the Covered Code that utilize the APIs of the Covered Code; or -(iii) any services You provide using the Covered Code. - - - ATTACHMENT A - -REQUIRED NOTICES - - - ATTACHMENT A-1 - -REQUIRED IN ALL CASES - -Notice to be included in header file of all Error Corrections and Shared -Modifications: - -Portions Copyright 1994-2003 © RealNetworks, Inc. All rights reserved. - -The contents of this file, and the files included with this file, are -subject to the current version of RealNetworks Community Source License -Version 1.1 (the "License"). You may not use this file except in -compliance with the License executed by both You and RealNetworks. You -may obtain a copy of the License at * -https://www.helixcommunity.org/content/rcsl.* You may also obtain a copy -of the License by contacting RealNetworks directly. Please see the -License for the rights, obligations and limitations governing use of the -contents of the file. - -This file is part of the Helix DNA technology. RealNetworks, Inc., is -the developer of the Original code and owns the copyrights in the -portions it created. - -This file, and the files included with this file, are distributed on an -'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESS OR IMPLIED, -AND REALNETWORKS HEREBY DISCLAIMS ALL SUCH WARRANTIES, INCLUDING WITHOUT -LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR -PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT. - -Contributor(s): - -_______________________________________________ - -Technology Compatibility Kit Test Suite(s) Location: - -________________________________ - - - ATTACHMENT A-2 - -SAMPLE LICENSEE CERTIFICATION - -"By clicking the `Agree' button below, You certify that You are a -Licensee in good standing under the RealNetworks Community Source -License, ("License") and that Your access, use and distribution of code -and information You may obtain at this site is subject to the License. -If You are not a Licensee under the RealNetworks Community Source -License You agree not to download, copy or use the Helix DNA technology. - - - ATTACHMENT A-3 - -REQUIRED STUDENT NOTIFICATION - -"This software and related documentation has been obtained by Your -educational institution subject to the RealNetworks Community Source -License. You have been provided access to the software and related -documentation for use only in connection with your course work and -research activities as a matriculated student of Your educational -institution. Any other use is expressly prohibited. - -THIS SOFTWARE AND RELATED DOCUMENTATION CONTAINS PROPRIETARY MATERIAL OF -REALNETWORKS, INC, WHICH ARE PROTECTED BY VARIOUS INTELLECTUAL PROPERTY -RIGHTS. - -You may not use this file except in compliance with the License. You may -obtain a copy of the License on the web at -https://www.helixcommunity.org/content/rcsl. - -* -* - - - ATTACHMENT B - -Description of Technology - -Helix DNA, which consists of Helix DNA Client, Helix DNA Server and -Helix DNA Producer. - -Description of "Technology" - -Helix DNA Technology v1.0 as described on the Community Web Server. - - - ATTACHMENT C - -TECHNOLOGY COMPATIBILITY KIT LICENSE - -The following license is effective for the *Helix DNA* Technology -Compatibility Kit - as described on the Community Web Server. The -Technology Compatibility Kit(s) for the Technology specified in -Attachment B may be accessed at the Community Web Server. - -1. TCK License. - -1.1 Grants to use TCK - -Subject to the terms and restrictions set forth below and the -RealNetworks Community Source License, and the Research Use license, -Original Contributor grants to You a worldwide, non-exclusive, -non-transferable license, to the extent of Original Contributor's -Intellectual Property Rights in the TCK (without the right to -sublicense), to use the TCK to develop and test Covered Code. - -1.2 TCK Use Restrictions. - -You are not authorized to create derivative works of the TCK or use the -TCK to test any implementation of the Specification that is not Covered -Code. You may not publish Your test results or make claims of -comparative compatibility with respect to other implementations of the -Specification. In consideration for the license grant in Section 1.1 -above You agree not to develop Your own tests that are intended to -validate conformation with the Specification. - -2. Test Results. - -You agree to provide to Original Contributor or the third party test -facility if applicable, Your test results that demonstrate that Covered -Code is Compliant Covered Code and that Original Contributor may publish -or otherwise distribute such test results. - -PLEASE READ THE TERMS OF THIS LICENSE CAREFULLY. BY CLICKING ON THE -"ACCEPT" BUTTON BELOW YOU ARE ACCEPTING AND AGREEING TO THE TERMS AND -CONDITIONS OF THIS LICENSE WITH THE ORIGINAL CONTRIBUTOR, REALNETWORKS, -INC. IF YOU ARE AGREEING TO THIS LICENSE ON BEHALF OF A COMPANY, YOU -REPRESENT THAT YOU ARE AUTHORIZED TO BIND THE COMPANY TO SUCH A LICENSE. -WHETHER YOU ARE ACTING ON YOUR OWN BEHALF, OR REPRESENTING A COMPANY, -YOU MUST BE OF MAJORITY AGE AND BE OTHERWISE COMPETENT TO ENTER INTO -CONTRACTS. IF YOU DO NOT MEET THIS CRITERIA OR YOU DO NOT AGREE TO ANY -OF THE TERMS AND CONDITIONS OF THIS LICENSE, CLICK ON THE REJECT BUTTON -TO EXIT. - -*ACCEPT / REJECT -* - -* -* - -*To agree to the R&D/academic terms of this license, please register - on the site -- -you will then be given a chance to agree to the clickwrap RCSL - -R&D License - -and gain access to the RCSL-licensed source code. To build or deploy -commercial applications based on the RCSL, you will need to agree to the -Commercial Use license attachments -* - - - diff --git a/bsp/stm32_radio/mp3/real/RPSL.txt b/bsp/stm32_radio/mp3/real/RPSL.txt deleted file mode 100644 index d040a45205..0000000000 --- a/bsp/stm32_radio/mp3/real/RPSL.txt +++ /dev/null @@ -1,518 +0,0 @@ -RealNetworks Public Source License Version 1.0 -(Rev. Date October 28, 2002) - -1. General Definitions. This License applies to any program or other work which -RealNetworks, Inc., or any other entity that elects to use this license, -("Licensor") makes publicly available and which contains a notice placed by -Licensor identifying such program or work as "Original Code" and stating that it -is subject to the terms of this RealNetworks Public Source License version 1.0 -(or subsequent version thereof) ("License"). You are not required to accept this -License. However, nothing else grants You permission to use, copy, modify or -distribute the software or its derivative works. These actions are prohibited by -law if You do not accept this License. Therefore, by modifying, copying or -distributing the software (or any work based on the software), You indicate your -acceptance of this License to do so, and all its terms and conditions. In -addition, you agree to the terms of this License by clicking the Accept button -or downloading the software. As used in this License: - -1.1 "Applicable Patent Rights" mean: (a) in the case where Licensor is the -grantor of rights, claims of patents that (i) are now or hereafter acquired, -owned by or assigned to Licensor and (ii) are necessarily infringed by using or -making the Original Code alone and not in combination with other software or -hardware; and (b) in the case where You are the grantor of rights, claims of -patents that (i) are now or hereafter acquired, owned by or assigned to You and -(ii) are infringed (directly or indirectly) by using or making Your -Modifications, taken alone or in combination with Original Code. - -1.2 "Compatible Source License" means any one of the licenses listed on Exhibit -B or at https://www.helixcommunity.org/content/complicense or other licenses -specifically identified by Licensor in writing. Notwithstanding any term to the -contrary in any Compatible Source License, any code covered by any Compatible -Source License that is used with Covered Code must be made readily available in -Source Code format for royalty-free use under the terms of the Compatible Source -License or this License. - -1.3 "Contributor" means any person or entity that creates or contributes to the -creation of Modifications. - -1.4 "Covered Code" means the Original Code, Modifications, the combination of -Original Code and any Modifications, and/or any respective portions thereof. - -1.5 "Deploy" means to use, sublicense or distribute Covered Code other than for -Your internal research and development (R&D) and/or Personal Use, and includes -without limitation, any and all internal use or distribution of Covered Code -within Your business or organization except for R&D use and/or Personal Use, as -well as direct or indirect sublicensing or distribution of Covered Code by You -to any third party in any form or manner. - -1.6 "Derivative Work" means either the Covered Code or any derivative work under -United States copyright law, and including any work containing or including any -portion of the Covered Code or Modifications, either verbatim or with -modifications and/or translated into another language. Derivative Work also -includes any work which combines any portion of Covered Code or Modifications -with code not otherwise governed by the terms of this License. - -1.7 "Externally Deploy" means to Deploy the Covered Code in any way that may be -accessed or used by anyone other than You, used to provide any services to -anyone other than You, or used in any way to deliver any content to anyone other -than You, whether the Covered Code is distributed to those parties, made -available as an application intended for use over a computer network, or used to -provide services or otherwise deliver content to anyone other than You. - -1.8. "Interface" means interfaces, functions, properties, class definitions, -APIs, header files, GUIDs, V-Tables, and/or protocols allowing one piece of -software, firmware or hardware to communicate or interoperate with another piece -of software, firmware or hardware. - -1.9 "Modifications" mean any addition to, deletion from, and/or change to, the -substance and/or structure of the Original Code, any previous Modifications, the -combination of Original Code and any previous Modifications, and/or any -respective portions thereof. When code is released as a series of files, a -Modification is: (a) any addition to or deletion from the contents of a file -containing Covered Code; and/or (b) any new file or other representation of -computer program statements that contains any part of Covered Code. - -1.10 "Original Code" means (a) the Source Code of a program or other work as -originally made available by Licensor under this License, including the Source -Code of any updates or upgrades to such programs or works made available by -Licensor under this License, and that has been expressly identified by Licensor -as such in the header file(s) of such work; and (b) the object code compiled -from such Source Code and originally made available by Licensor under this -License. - -1.11 "Personal Use" means use of Covered Code by an individual solely for his or -her personal, private and non-commercial purposes. An individual's use of -Covered Code in his or her capacity as an officer, employee, member, independent -contractor or agent of a corporation, business or organization (commercial or -non-commercial) does not qualify as Personal Use. - -1.12 "Source Code" means the human readable form of a program or other work that -is suitable for making modifications to it, including all modules it contains, -plus any associated interface definition files, scripts used to control -compilation and installation of an executable (object code). - -1.13 "You" or "Your" means an individual or a legal entity exercising rights -under this License. For legal entities, "You" or "Your" includes any entity -which controls, is controlled by, or is under common control with, You, where -"control" means (a) the power, direct or indirect, to cause the direction or -management of such entity, whether by contract or otherwise, or (b) ownership of -fifty percent (50%) or more of the outstanding shares or beneficial ownership of -such entity. - -2. Permitted Uses; Conditions & Restrictions. Subject to the terms and -conditions of this License, Licensor hereby grants You, effective on the date -You accept this License (via downloading or using Covered Code or otherwise -indicating your acceptance of this License), a worldwide, royalty-free, -non-exclusive copyright license, to the extent of Licensor's copyrights cover -the Original Code, to do the following: - -2.1 You may reproduce, display, perform, modify and Deploy Covered Code, -provided that in each instance: - -(a) You must retain and reproduce in all copies of Original Code the copyright -and other proprietary notices and disclaimers of Licensor as they appear in the -Original Code, and keep intact all notices in the Original Code that refer to -this License; - -(b) You must include a copy of this License with every copy of Source Code of -Covered Code and documentation You distribute, and You may not offer or impose -any terms on such Source Code that alter or restrict this License or the -recipients' rights hereunder, except as permitted under Section 6; - -(c) You must duplicate, to the extent it does not already exist, the notice in -Exhibit A in each file of the Source Code of all Your Modifications, and cause -the modified files to carry prominent notices stating that You changed the files -and the date of any change; - -(d) You must make Source Code of all Your Externally Deployed Modifications -publicly available under the terms of this License, including the license grants -set forth in Section 3 below, for as long as you Deploy the Covered Code or -twelve (12) months from the date of initial Deployment, whichever is longer. You -should preferably distribute the Source Code of Your Deployed Modifications -electronically (e.g. download from a web site); and - -(e) if You Deploy Covered Code in object code, executable form only, You must -include a prominent notice, in the code itself as well as in related -documentation, stating that Source Code of the Covered Code is available under -the terms of this License with information on how and where to obtain such -Source Code. You must also include the Object Code Notice set forth in Exhibit A -in the "about" box or other appropriate place where other copyright notices are -placed, including any packaging materials. - -2.2 You expressly acknowledge and agree that although Licensor and each -Contributor grants the licenses to their respective portions of the Covered Code -set forth herein, no assurances are provided by Licensor or any Contributor that -the Covered Code does not infringe the patent or other intellectual property -rights of any other entity. Licensor and each Contributor disclaim any liability -to You for claims brought by any other entity based on infringement of -intellectual property rights or otherwise. As a condition to exercising the -rights and licenses granted hereunder, You hereby assume sole responsibility to -secure any other intellectual property rights needed, if any. For example, if a -third party patent license is required to allow You to make, use, sell, import -or offer for sale the Covered Code, it is Your responsibility to acquire such -license(s). - -2.3 Subject to the terms and conditions of this License, Licensor hereby grants -You, effective on the date You accept this License (via downloading or using -Covered Code or otherwise indicating your acceptance of this License), a -worldwide, royalty-free, perpetual, non-exclusive patent license under -Licensor's Applicable Patent Rights to make, use, sell, offer for sale and -import the Covered Code, provided that in each instance you comply with the -terms of this License. - -3. Your Grants. In consideration of, and as a condition to, the licenses granted -to You under this License: - -(a) You grant to Licensor and all third parties a non-exclusive, perpetual, -irrevocable, royalty free license under Your Applicable Patent Rights and other -intellectual property rights owned or controlled by You, to make, sell, offer -for sale, use, import, reproduce, display, perform, modify, distribute and -Deploy Your Modifications of the same scope and extent as Licensor's licenses -under Sections 2.1 and 2.2; and - -(b) You grant to Licensor and its subsidiaries a non-exclusive, worldwide, -royalty-free, perpetual and irrevocable license, under Your Applicable Patent -Rights and other intellectual property rights owned or controlled by You, to -make, use, sell, offer for sale, import, reproduce, display, perform, -distribute, modify or have modified (for Licensor and/or its subsidiaries), -sublicense and distribute Your Modifications, in any form and for any purpose, -through multiple tiers of distribution. - -(c) You agree not use any information derived from Your use and review of the -Covered Code, including but not limited to any algorithms or inventions that may -be contained in the Covered Code, for the purpose of asserting any of Your -patent rights, or assisting a third party to assert any of its patent rights, -against Licensor or any Contributor. - -4. Derivative Works. You may create a Derivative Work by combining Covered Code -with other code not otherwise governed by the terms of this License and -distribute the Derivative Work as an integrated product. In each such instance, -You must make sure the requirements of this License are fulfilled for the -Covered Code or any portion thereof, including all Modifications. - -4.1 You must cause any Derivative Work that you distribute, publish or -Externally Deploy, that in whole or in part contains or is derived from the -Covered Code or any part thereof, to be licensed as a whole at no charge to all -third parties under the terms of this License and no other license except as -provided in Section 4.2. You also must make Source Code available for the -Derivative Work under the same terms as Modifications, described in Sections 2 -and 3, above. - -4.2 Compatible Source Licenses. Software modules that have been independently -developed without any use of Covered Code and which contain no portion of the -Covered Code, Modifications or other Derivative Works, but are used or combined -in any way wtih the Covered Code or any Derivative Work to form a larger -Derivative Work, are exempt from the conditions described in Section 4.1 but -only to the extent that: the software module, including any software that is -linked to, integrated with, or part of the same applications as, the software -module by any method must be wholly subject to one of the Compatible Source -Licenses. Notwithstanding the foregoing, all Covered Code must be subject to the -terms of this License. Thus, the entire Derivative Work must be licensed under a -combination of the RPSL (for Covered Code) and a Compatible Source License for -any independently developed software modules within the Derivative Work. The -foregoing requirement applies even if the Compatible Source License would -ordinarily allow the software module to link with, or form larger works with, -other software that is not subject to the Compatible Source License. For -example, although the Mozilla Public License v1.1 allows Mozilla code to be -combined with proprietary software that is not subject to the MPL, if -MPL-licensed code is used with Covered Code the MPL-licensed code could not be -combined or linked with any code not governed by the MPL. The general intent of -this section 4.2 is to enable use of Covered Code with applications that are -wholly subject to an acceptable open source license. You are responsible for -determining whether your use of software with Covered Code is allowed under Your -license to such software. - -4.3 Mere aggregation of another work not based on the Covered Code with the -Covered Code (or with a work based on the Covered Code) on a volume of a storage -or distribution medium does not bring the other work under the scope of this -License. If You deliver the Covered Code for combination and/or integration with -an application previously provided by You (for example, via automatic updating -technology), such combination and/or integration constitutes a Derivative Work -subject to the terms of this License. - -5. Exclusions From License Grant. Nothing in this License shall be deemed to -grant any rights to trademarks, copyrights, patents, trade secrets or any other -intellectual property of Licensor or any Contributor except as expressly stated -herein. No right is granted to the trademarks of Licensor or any Contributor -even if such marks are included in the Covered Code. Nothing in this License -shall be interpreted to prohibit Licensor from licensing under different terms -from this License any code that Licensor otherwise would have a right to -license. Modifications, Derivative Works and/or any use or combination of -Covered Code with other technology provided by Licensor or third parties may -require additional patent licenses from Licensor which Licensor may grant in its -sole discretion. No patent license is granted separate from the Original Code or -combinations of the Original Code with other software or hardware. - -5.1. Trademarks. This License does not grant any rights to use the trademarks or -trade names owned by Licensor ("Licensor Marks" defined in Exhibit C) or to any -trademark or trade name belonging to any Contributor. No Licensor Marks may be -used to endorse or promote products derived from the Original Code other than as -permitted by the Licensor Trademark Policy defined in Exhibit C. - -6. Additional Terms. You may choose to offer, and to charge a fee for, warranty, -support, indemnity or liability obligations and/or other rights consistent with -the scope of the license granted herein ("Additional Terms") to one or more -recipients of Covered Code. However, You may do so only on Your own behalf and -as Your sole responsibility, and not on behalf of Licensor or any Contributor. -You must obtain the recipient's agreement that any such Additional Terms are -offered by You alone, and You hereby agree to indemnify, defend and hold -Licensor and every Contributor harmless for any liability incurred by or claims -asserted against Licensor or such Contributor by reason of any such Additional -Terms. - -7. Versions of the License. Licensor may publish revised and/or new versions of -this License from time to time. Each version will be given a distinguishing -version number. Once Original Code has been published under a particular version -of this License, You may continue to use it under the terms of that version. You -may also choose to use such Original Code under the terms of any subsequent -version of this License published by Licensor. No one other than Licensor has -the right to modify the terms applicable to Covered Code created under this -License. - -8. NO WARRANTY OR SUPPORT. The Covered Code may contain in whole or in part -pre-release, untested, or not fully tested works. The Covered Code may contain -errors that could cause failures or loss of data, and may be incomplete or -contain inaccuracies. You expressly acknowledge and agree that use of the -Covered Code, or any portion thereof, is at Your sole and entire risk. THE -COVERED CODE IS PROVIDED "AS IS" AND WITHOUT WARRANTY, UPGRADES OR SUPPORT OF -ANY KIND AND LICENSOR AND LICENSOR'S LICENSOR(S) (COLLECTIVELY REFERRED TO AS -"LICENSOR" FOR THE PURPOSES OF SECTIONS 8 AND 9) AND ALL CONTRIBUTORS EXPRESSLY -DISCLAIM ALL WARRANTIES AND/OR CONDITIONS, EXPRESS OR IMPLIED, INCLUDING, BUT -NOT LIMITED TO, THE IMPLIED WARRANTIES AND/OR CONDITIONS OF MERCHANTABILITY, OF -SATISFACTORY QUALITY, OF FITNESS FOR A PARTICULAR PURPOSE, OF ACCURACY, OF QUIET -ENJOYMENT, AND NONINFRINGEMENT OF THIRD PARTY RIGHTS. LICENSOR AND EACH -CONTRIBUTOR DOES NOT WARRANT AGAINST INTERFERENCE WITH YOUR ENJOYMENT OF THE -COVERED CODE, THAT THE FUNCTIONS CONTAINED IN THE COVERED CODE WILL MEET YOUR -REQUIREMENTS, THAT THE OPERATION OF THE COVERED CODE WILL BE UNINTERRUPTED OR -ERROR-FREE, OR THAT DEFECTS IN THE COVERED CODE WILL BE CORRECTED. NO ORAL OR -WRITTEN DOCUMENTATION, INFORMATION OR ADVICE GIVEN BY LICENSOR, A LICENSOR -AUTHORIZED REPRESENTATIVE OR ANY CONTRIBUTOR SHALL CREATE A WARRANTY. You -acknowledge that the Covered Code is not intended for use in high risk -activities, including, but not limited to, the design, construction, operation -or maintenance of nuclear facilities, aircraft navigation, aircraft -communication systems, or air traffic control machines in which case the failure -of the Covered Code could lead to death, personal injury, or severe physical or -environmental damage. Licensor disclaims any express or implied warranty of -fitness for such uses. - -9. LIMITATION OF LIABILITY. TO THE EXTENT NOT PROHIBITED BY LAW, IN NO EVENT -SHALL LICENSOR OR ANY CONTRIBUTOR BE LIABLE FOR ANY INCIDENTAL, SPECIAL, -INDIRECT OR CONSEQUENTIAL DAMAGES ARISING OUT OF OR RELATING TO THIS LICENSE OR -YOUR USE OR INABILITY TO USE THE COVERED CODE, OR ANY PORTION THEREOF, WHETHER -UNDER A THEORY OF CONTRACT, WARRANTY, TORT (INCLUDING NEGLIGENCE OR STRICT -LIABILITY), PRODUCTS LIABILITY OR OTHERWISE, EVEN IF LICENSOR OR SUCH -CONTRIBUTOR HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES AND -NOTWITHSTANDING THE FAILURE OF ESSENTIAL PURPOSE OF ANY REMEDY. SOME -JURISDICTIONS DO NOT ALLOW THE LIMITATION OF LIABILITY OF INCIDENTAL OR -CONSEQUENTIAL DAMAGES, SO THIS LIMITATION MAY NOT APPLY TO YOU. In no event -shall Licensor's total liability to You for all damages (other than as may be -required by applicable law) under this License exceed the amount of ten dollars -($10.00). - -10. Ownership. Subject to the licenses granted under this License, each -Contributor retains all rights, title and interest in and to any Modifications -made by such Contributor. Licensor retains all rights, title and interest in and -to the Original Code and any Modifications made by or on behalf of Licensor -("Licensor Modifications"), and such Licensor Modifications will not be -automatically subject to this License. Licensor may, at its sole discretion, -choose to license such Licensor Modifications under this License, or on -different terms from those contained in this License or may choose not to -license them at all. - -11. Termination. - -11.1 Term and Termination. The term of this License is perpetual unless -terminated as provided below. This License and the rights granted hereunder will -terminate: - -(a) automatically without notice from Licensor if You fail to comply with any -term(s) of this License and fail to cure such breach within 30 days of becoming -aware of such breach; - -(b) immediately in the event of the circumstances described in Section 12.5(b); -or - -(c) automatically without notice from Licensor if You, at any time during the -term of this License, commence an action for patent infringement against -Licensor (including by cross-claim or counter claim in a lawsuit); - -(d) upon written notice from Licensor if You, at any time during the term of -this License, commence an action for patent infringement against any third party -alleging that the Covered Code itself (excluding combinations with other -software or hardware) infringes any patent (including by cross-claim or counter -claim in a lawsuit). - -11.2 Effect of Termination. Upon termination, You agree to immediately stop any -further use, reproduction, modification, sublicensing and distribution of the -Covered Code and to destroy all copies of the Covered Code that are in your -possession or control. All sublicenses to the Covered Code which have been -properly granted prior to termination shall survive any termination of this -License. Provisions which, by their nature, should remain in effect beyond the -termination of this License shall survive, including but not limited to Sections -3, 5, 8, 9, 10, 11, 12.2 and 13. No party will be liable to any other for -compensation, indemnity or damages of any sort solely as a result of terminating -this License in accordance with its terms, and termination of this License will -be without prejudice to any other right or remedy of any party. - -12. Miscellaneous. - -12.1 Government End Users. The Covered Code is a "commercial item" as defined in -FAR 2.101. Government software and technical data rights in the Covered Code -include only those rights customarily provided to the public as defined in this -License. This customary commercial license in technical data and software is -provided in accordance with FAR 12.211 (Technical Data) and 12.212 (Computer -Software) and, for Department of Defense purchases, DFAR 252.227-7015 (Technical -Data -- Commercial Items) and 227.7202-3 (Rights in Commercial Computer Software -or Computer Software Documentation). Accordingly, all U.S. Government End Users -acquire Covered Code with only those rights set forth herein. - -12.2 Relationship of Parties. This License will not be construed as creating an -agency, partnership, joint venture or any other form of legal association -between or among You, Licensor or any Contributor, and You will not represent to -the contrary, whether expressly, by implication, appearance or otherwise. - -12.3 Independent Development. Nothing in this License will impair Licensor's -right to acquire, license, develop, have others develop for it, market and/or -distribute technology or products that perform the same or similar functions as, -or otherwise compete with, Modifications, Derivative Works, technology or -products that You may develop, produce, market or distribute. - -12.4 Waiver; Construction. Failure by Licensor or any Contributor to enforce any -provision of this License will not be deemed a waiver of future enforcement of -that or any other provision. Any law or regulation which provides that the -language of a contract shall be construed against the drafter will not apply to -this License. - -12.5 Severability. (a) If for any reason a court of competent jurisdiction finds -any provision of this License, or portion thereof, to be unenforceable, that -provision of the License will be enforced to the maximum extent permissible so -as to effect the economic benefits and intent of the parties, and the remainder -of this License will continue in full force and effect. (b) Notwithstanding the -foregoing, if applicable law prohibits or restricts You from fully and/or -specifically complying with Sections 2 and/or 3 or prevents the enforceability -of either of those Sections, this License will immediately terminate and You -must immediately discontinue any use of the Covered Code and destroy all copies -of it that are in your possession or control. - -12.6 Dispute Resolution. Any litigation or other dispute resolution between You -and Licensor relating to this License shall take place in the Seattle, -Washington, and You and Licensor hereby consent to the personal jurisdiction of, -and venue in, the state and federal courts within that District with respect to -this License. The application of the United Nations Convention on Contracts for -the International Sale of Goods is expressly excluded. - -12.7 Export/Import Laws. This software is subject to all export and import laws -and restrictions and regulations of the country in which you receive the Covered -Code and You are solely responsible for ensuring that You do not export, -re-export or import the Covered Code or any direct product thereof in violation -of any such restrictions, laws or regulations, or without all necessary -authorizations. - -12.8 Entire Agreement; Governing Law. This License constitutes the entire -agreement between the parties with respect to the subject matter hereof. This -License shall be governed by the laws of the United States and the State of -Washington. - -Where You are located in the province of Quebec, Canada, the following clause -applies: The parties hereby confirm that they have requested that this License -and all related documents be drafted in English. Les parties ont exigé -que le présent contrat et tous les documents connexes soient -rédigés en anglais. - - EXHIBIT A. - -"Copyright © 1995-2002 -RealNetworks, Inc. and/or its licensors. All Rights Reserved. - -The contents of this file, and the files included with this file, are subject to -the current version of the RealNetworks Public Source License Version 1.0 (the -"RPSL") available at https://www.helixcommunity.org/content/rpsl unless you have -licensed the file under the RealNetworks Community Source License Version 1.0 -(the "RCSL") available at https://www.helixcommunity.org/content/rcsl, in which -case the RCSL will apply. You may also obtain the license terms directly from -RealNetworks. You may not use this file except in compliance with the RPSL or, -if you have a valid RCSL with RealNetworks applicable to this file, the RCSL. -Please see the applicable RPSL or RCSL for the rights, obligations and -limitations governing use of the contents of the file. - -This file is part of the Helix DNA Technology. RealNetworks is the developer of -the Original code and owns the copyrights in the portions it created. - -This file, and the files included with this file, is distributed and made -available on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESS OR -IMPLIED, AND REALNETWORKS HEREBY DISCLAIMS ALL SUCH WARRANTIES, INCLUDING -WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR -PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT. - -Contributor(s): ____________________________________ - -Technology Compatibility Kit Test -Suite(s) Location (if licensed under the RCSL): ______________________________ - -Object Code Notice: Helix DNA Client technology included. Copyright (c) -RealNetworks, Inc., 1995-2002. All rights reserved. - - - EXHIBIT B - -Compatible Source Licenses for the RealNetworks Public Source License. The -following list applies to the most recent version of the license as of October -25, 2002, unless otherwise indicated. - -* Academic Free License -* Apache Software License -* Apple Public Source License -* Artistic license -* Attribution Assurance Licenses -* BSD license -* Common Public License (1) -* Eiffel Forum License -* GNU General Public License (GPL) (1) -* GNU Library or "Lesser" General Public License (LGPL) (1) -* IBM Public License -* Intel Open Source License -* Jabber Open Source License -* MIT license -* MITRE Collaborative Virtual Workspace License (CVW License) -* Motosoto License -* Mozilla Public License 1.0 (MPL) -* Mozilla Public License 1.1 (MPL) -* Nokia Open Source License -* Open Group Test Suite License -* Python Software Foundation License -* Ricoh Source Code Public License -* Sun Industry Standards Source License (SISSL) -* Sun Public License -* University of Illinois/NCSA Open Source License -* Vovida Software License v. 1.0 -* W3C License -* X.Net License -* Zope Public License -* zlib/libpng license - -(1) Note: because this license contains certain reciprocal licensing terms that -purport to extend to independently developed code, You may be prohibited under -the terms of this otherwise compatible license from using code licensed under -its terms with Covered Code because Covered Code may only be licensed under the -RealNetworks Public Source License. Any attempt to apply non RPSL license terms, -including without limitation the GPL, to Covered Code is expressly forbidden. -You are responsible for ensuring that Your use of Compatible Source Licensed -code does not violate either the RPSL or the Compatible Source License. - -The latest version of this list can be found at: -https://www.helixcommunity.org/content/complicense - - EXHIBIT C - -RealNetworks' Trademark policy. - -RealNetworks defines the following trademarks collectively as "Licensor -Trademarks": "RealNetworks", "RealPlayer", "RealJukebox", "RealSystem", -"RealAudio", "RealVideo", "RealOne Player", "RealMedia", "Helix" or any other -trademarks or trade names belonging to RealNetworks. - -RealNetworks "Licensor Trademark Policy" forbids any use of Licensor Trademarks -except as permitted by and in strict compliance at all times with RealNetworks' -third party trademark usage guidelines which are posted at -http://www.realnetworks.com/info/helixlogo.html. - diff --git a/bsp/stm32_radio/mp3/real/arm/LICENSE.txt b/bsp/stm32_radio/mp3/real/arm/LICENSE.txt deleted file mode 100644 index 12e5372a9f..0000000000 --- a/bsp/stm32_radio/mp3/real/arm/LICENSE.txt +++ /dev/null @@ -1,30 +0,0 @@ - Copyright (c) 1995-2004 RealNetworks, Inc. All Rights Reserved. - - The contents of this directory, and (except where otherwise - indicated) the directories included within this directory, are - subject to the current version of the RealNetworks Public Source - License (the "RPSL") available at RPSL.txt in this directory, unless - you have licensed the directory under the current version of the - RealNetworks Community Source License (the "RCSL") available at - RCSL.txt in this directory, in which case the RCSL will apply. You - may also obtain the license terms directly from RealNetworks. You - may not use the files in this directory except in compliance with the - RPSL or, if you have a valid RCSL with RealNetworks applicable to - this directory, the RCSL. Please see the applicable RPSL or RCSL for - the rights, obligations and limitations governing use of the contents - of the directory. - - This directory is part of the Helix DNA Technology. RealNetworks is - the developer of the Original Code and owns the copyrights in the - portions it created. - - This directory, and the directories included with this directory, are - distributed and made available on an 'AS IS' basis, WITHOUT WARRANTY - OF ANY KIND, EITHER EXPRESS OR IMPLIED, AND REALNETWORKS HEREBY - DISCLAIMS ALL SUCH WARRANTIES, INCLUDING WITHOUT LIMITATION, ANY - WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, - QUIET ENJOYMENT OR NON-INFRINGEMENT. - - Technology Compatibility Kit Test Suite(s) Location: - http://www.helixcommunity.org/content/tck - diff --git a/bsp/stm32_radio/mp3/real/arm/RCSL.txt b/bsp/stm32_radio/mp3/real/arm/RCSL.txt deleted file mode 100644 index a809759a32..0000000000 --- a/bsp/stm32_radio/mp3/real/arm/RCSL.txt +++ /dev/null @@ -1,948 +0,0 @@ -The RCSL is made up of a base agreement and a few Attachments. - -For Research and Development use, you agree to the terms of the -RCSL R&D License (base RCSL and Attachments A, B, and C) - -For Commercial Use (either distribution or internal commercial -deployment) of the Helix DNA with or without support for RealNetworks' -RealAudio and RealVideo Add-on Technology, you agree to the -terms of the same RCSL R&D license -and execute one or more additional Commercial Use License attachments -. - ------------------------------------------------------------------------- - - - REALNETWORKS COMMUNITY SOURCE LICENSE - -Version 1.2 (Rev. Date: January 22, 2003). - - - RECITALS - -Original Contributor has developed Specifications, Source Code -implementations and Executables of certain Technology; and - -Original Contributor desires to license the Technology to a large -community to facilitate research, innovation and product development -while maintaining compatibility of such products with the Technology as -delivered by Original Contributor; and - -Original Contributor desires to license certain Trademarks for the -purpose of branding products that are compatible with the relevant -Technology delivered by Original Contributor; and - -You desire to license the Technology and possibly certain Trademarks -from Original Contributor on the terms and conditions specified in this -License. - -In consideration for the mutual covenants contained herein, You and -Original Contributor agree as follows: - - - AGREEMENT - -*1. Introduction.* - -The RealNetworks Community Source License ("RCSL") and effective -attachments ("License") may include five distinct licenses: - -i) Research Use license -- License plus Attachments A, B and C only. - -ii) Commercial Use and Trademark License, which may be for Internal -Deployment Use or external distribution, or both -- License plus -Attachments A, B, C, and D. - -iii) Technology Compatibility Kit (TCK) license -- Attachment C. - -iv) Add-On Technology License (Executable) Commercial Use License --Attachment F. - -v) Add-On Technology Source Code Porting and Optimization -License-Attachment G. - -The Research Use license is effective when You click and accept this -License. The TCK is effective when You click and accept this License, -unless otherwise specified in the TCK attachments. The Commercial Use -and Trademark, Add-On Technology License, and the Add-On Technology -Source Code Porting and Optimization licenses must each be signed by You -and Original Contributor to become effective. Once effective, these -licenses and the associated requirements and responsibilities are -cumulative. Capitalized terms used in this License are defined in the -Glossary. - -*2. License Grants.* - -2.1 Original Contributor Grant. - -Subject to Your compliance with Sections 3, 8.10 and Attachment A of -this License, Original Contributor grants to You a worldwide, -royalty-free, non-exclusive license, to the extent of Original -Contributor's Intellectual Property Rights covering the Original Code, -Upgraded Code and Specifications, to do the following: - -(a) Research Use License: - -(i) use, reproduce and modify the Original Code, Upgraded Code and -Specifications to create Modifications and Reformatted Specifications -for Research Use by You; - -(ii) publish and display Original Code, Upgraded Code and Specifications -with, or as part of Modifications, as permitted under Section 3.1(b) below; - -(iii) reproduce and distribute copies of Original Code and Upgraded Code -to Licensees and students for Research Use by You; - -(iv) compile, reproduce and distribute Original Code and Upgraded Code -in Executable form, and Reformatted Specifications to anyone for -Research Use by You. - -(b) Other than the licenses expressly granted in this License, Original -Contributor retains all right, title, and interest in Original Code and -Upgraded Code and Specifications. - -2.2 Your Grants. - -(a) To Other Licensees. You hereby grant to each Licensee a license to -Your Error Corrections and Shared Modifications, of the same scope and -extent as Original Contributor's licenses under Section 2.1 a) above -relative to Research Use and Attachment D relative to Commercial Use. - -(b) To Original Contributor. You hereby grant to Original Contributor a -worldwide, royalty-free, non-exclusive, perpetual and irrevocable -license, to the extent of Your Intellectual Property Rights covering -Your Error Corrections, Shared Modifications and Reformatted -Specifications, to use, reproduce, modify, display and distribute Your -Error Corrections, Shared Modifications and Reformatted Specifications, -in any form, including the right to sublicense such rights through -multiple tiers of distribution. - -(c) Other than the licenses expressly granted in Sections 2.2(a) and (b) -above, and the restrictions set forth in Section 3.1(d)(iv) below, You -retain all right, title, and interest in Your Error Corrections, Shared -Modifications and Reformatted Specifications. - -2.3 Contributor Modifications. - -You may use, reproduce, modify, display and distribute Contributor Error -Corrections, Shared Modifications and Reformatted Specifications, -obtained by You under this License, to the same scope and extent as with -Original Code, Upgraded Code and Specifications. - -2.4 Subcontracting. - -You may deliver the Source Code of Covered Code to other Licensees -having at least a Research Use license, for the sole purpose of -furnishing development services to You in connection with Your rights -granted in this License. All such Licensees must execute appropriate -documents with respect to such work consistent with the terms of this -License, and acknowledging their work-made-for-hire status or assigning -exclusive right to the work product and associated Intellectual Property -Rights to You. - -*3. Requirements and Responsibilities*. - -3.1 Research Use License. - -As a condition of exercising the rights granted under Section 2.1(a) -above, You agree to comply with the following: - -(a) Your Contribution to the Community. All Error Corrections and Shared -Modifications which You create or contribute to are automatically -subject to the licenses granted under Section 2.2 above. You are -encouraged to license all of Your other Modifications under Section 2.2 -as Shared Modifications, but are not required to do so. You agree to -notify Original Contributor of any errors in the Specification. - -(b) Source Code Availability. You agree to provide all Your Error -Corrections to Original Contributor as soon as reasonably practicable -and, in any event, prior to Internal Deployment Use or Commercial Use, -if applicable. Original Contributor may, at its discretion, post Source -Code for Your Error Corrections and Shared Modifications on the -Community Webserver. You may also post Error Corrections and Shared -Modifications on a web-server of Your choice; provided, that You must -take reasonable precautions to ensure that only Licensees have access to -such Error Corrections and Shared Modifications. Such precautions shall -include, without limitation, a password protection scheme limited to -Licensees and a click-on, download certification of Licensee status -required of those attempting to download from the server. An example of -an acceptable certification is attached as Attachment A-2. - -(c) Notices. All Error Corrections and Shared Modifications You create -or contribute to must include a file documenting the additions and -changes You made and the date of such additions and changes. You must -also include the notice set forth in Attachment A-1 in the file header. -If it is not possible to put the notice in a particular Source Code file -due to its structure, then You must include the notice in a location -(such as a relevant directory file), where a recipient would be most -likely to look for such a notice. - -(d) Redistribution. - -(i) Source. Covered Code may be distributed in Source Code form only to -another Licensee (except for students as provided below). You may not -offer or impose any terms on any Covered Code that alter the rights, -requirements, or responsibilities of such Licensee. You may distribute -Covered Code to students for use in connection with their course work -and research projects undertaken at accredited educational institutions. -Such students need not be Licensees, but must be given a copy of the -notice set forth in Attachment A-3 and such notice must also be included -in a file header or prominent location in the Source Code made available -to such students. - -(ii) Executable. You may distribute Executable version(s) of Covered -Code to Licensees and other third parties only for the purpose of -evaluation and comment in connection with Research Use by You and under -a license of Your choice, but which limits use of such Executable -version(s) of Covered Code only to that purpose. - -(iii) Modified Class, Interface and Package Naming. In connection with -Research Use by You only, You may use Original Contributor's class, -Interface and package names only to accurately reference or invoke the -Source Code files You modify. Original Contributor grants to You a -limited license to the extent necessary for such purposes. - -(iv) You expressly agree that any distribution, in whole or in part, of -Modifications developed by You shall only be done pursuant to the terms -and conditions of this License. - -(e) Extensions. - -(i) Covered Code. You may not include any Source Code of Community Code -in any Extensions. You may include the compiled Header Files of -Community Code in an Extension provided that Your use of the Covered -Code, including Heading Files, complies with the Commercial Use License, -the TCK and all other terms of this License. - -(ii) Publication. No later than the date on which You first distribute -such Extension for Commercial Use, You must publish to the industry, on -a non-confidential basis and free of all copyright restrictions with -respect to reproduction and use, an accurate and current specification -for any Extension. In addition, You must make available an appropriate -test suite, pursuant to the same rights as the specification, -sufficiently detailed to allow any third party reasonably skilled in the -technology to produce implementations of the Extension compatible with -the specification. Such test suites must be made available as soon as -reasonably practicable but, in no event, later than ninety (90) days -after Your first Commercial Use of the Extension. You must use -reasonable efforts to promptly clarify and correct the specification and -the test suite upon written request by Original Contributor. - -(iii) Open. You agree to refrain from enforcing any Intellectual -Property Rights You may have covering any interface(s) of Your -Extension, which would prevent the implementation of such interface(s) -by Original Contributor or any Licensee. This obligation does not -prevent You from enforcing any Intellectual Property Right You have that -would otherwise be infringed by an implementation of Your Extension. - -(iv) Interface Modifications and Naming. You may not modify or add to -the GUID space * * "xxxxxxxx-0901-11d1-8B06-00A024406D59" or any other -GUID space designated by Original Contributor. You may not modify any -Interface prefix provided with the Covered Code or any other prefix -designated by Original Contributor.* * - -* * - -(f) You agree that any Specifications provided to You by Original -Contributor are confidential and proprietary information of Original -Contributor. You must maintain the confidentiality of the Specifications -and may not disclose them to any third party without Original -Contributor's prior written consent. You may only use the Specifications -under the terms of this License and only for the purpose of implementing -the terms of this License with respect to Covered Code. You agree not -use, copy or distribute any such Specifications except as provided in -writing by Original Contributor. - -3.2 Commercial Use License. - -You may not make Commercial Use of any Covered Code unless You and -Original Contributor have executed a copy of the Commercial Use and -Trademark License attached as Attachment D. - -*4. Versions of the License.* - -4.1 License Versions. - -Original Contributor may publish revised versions of the License from -time to time. Each version will be given a distinguishing version number. - -4.2 Effect. - -Once a particular version of Covered Code has been provided under a -version of the License, You may always continue to use such Covered Code -under the terms of that version of the License. You may also choose to -use such Covered Code under the terms of any subsequent version of the -License. No one other than Original Contributor has the right to -promulgate License versions. - -4.3 Multiple-Licensed Code. - -Original Contributor may designate portions of the Covered Code as -"Multiple-Licensed." "Multiple-Licensed" means that the Original -Contributor permits You to utilize those designated portions of the -Covered Code under Your choice of this License or the alternative -license(s), if any, specified by the Original Contributor in an -Attachment to this License. - -*5. Disclaimer of Warranty.* - -5.1 COVERED CODE PROVIDED AS IS. - -COVERED CODE IS PROVIDED UNDER THIS LICENSE "AS IS," WITHOUT WARRANTY OF -ANY KIND, EITHER EXPRESS OR IMPLIED, INCLUDING, WITHOUT LIMITATION, -WARRANTIES THAT THE COVERED CODE IS FREE OF DEFECTS, MERCHANTABLE, FIT -FOR A PARTICULAR PURPOSE OR NON-INFRINGING. YOU AGREE TO BEAR THE ENTIRE -RISK IN CONNECTION WITH YOUR USE AND DISTRIBUTION OF COVERED CODE UNDER -THIS LICENSE. THIS DISCLAIMER OF WARRANTY CONSTITUTES AN ESSENTIAL PART -OF THIS LICENSE. NO USE OF ANY COVERED CODE IS AUTHORIZED HEREUNDER -EXCEPT SUBJECT TO THIS DISCLAIMER. - -5.2 Not Designed for High Risk Activities. - -You acknowledge that Original Code, Upgraded Code and Specifications are -not designed or intended for use in high risk activities including, but -not limited to: (i) on-line control of aircraft, air traffic, aircraft -navigation or aircraft communications; or (ii) in the design, -construction, operation or maintenance of any nuclear facility. Original -Contributor disclaims any express or implied warranty of fitness for -such uses. - -*6. Termination.* - -6.1 By You. - -You may terminate this Research Use license at anytime by providing -written notice to Original Contributor. - -6.2 By Original Contributor. - -This License and the rights granted hereunder will terminate: - -(i) automatically if You fail to comply with the terms of this License -and fail to cure such breach within 30 days of receipt of written notice -of the breach; - -(ii) immediately in the event of circumstances specified in Sections 7.1 -and 8.4; or - -(iii) at Original Contributor's discretion upon any action initiated by -You (including by cross-claim or counter claim) alleging that use or -distribution by Original Contributor or any Licensee, of Original Code, -Upgraded Code, Error Corrections, Shared Modifications or Specifications -infringe a patent owned or controlled by You. - -6.3 Effective of Termination. - -Upon termination, You agree to discontinue use of and destroy all copies -of Covered Code in Your possession. All sublicenses to the Covered Code -which You have properly granted shall survive any termination of this -License. Provisions that, by their nature, should remain in effect -beyond the termination of this License shall survive including, without -limitation, Sections 2.2, 3, 5, 7 and 8. - -6.4 No Compensation. - -Each party waives and releases the other from any claim to compensation -or indemnity for permitted or lawful termination of the business -relationship established by this License. - -*7. Liability.* - -7.1 Infringement. Should any of the Original Code, Upgraded Code, TCK or -Specifications ("Materials") become the subject of a claim of -infringement, Original Contributor may, at its sole option, (i) attempt -to procure the rights necessary for You to continue using the Materials, -(ii) modify the Materials so that they are no longer infringing, or -(iii) terminate Your right to use the Materials, immediately upon -written notice, and refund to You the amount, if any, having then -actually been paid by You to Original Contributor for the Original Code, -Upgraded Code and TCK, depreciated on a straight line, five year basis. - -7.2 LIMITATION OF LIABILITY. TO THE FULL EXTENT ALLOWED BY APPLICABLE -LAW, ORIGINAL CONTRIBUTOR'S LIABILITY TO YOU FOR CLAIMS RELATING TO THIS -LICENSE, WHETHER FOR BREACH OR IN TORT, SHALL BE LIMITED TO ONE HUNDRED -PERCENT (100%) OF THE AMOUNT HAVING THEN ACTUALLY BEEN PAID BY YOU TO -ORIGINAL CONTRIBUTOR FOR ALL COPIES LICENSED HEREUNDER OF THE PARTICULAR -ITEMS GIVING RISE TO SUCH CLAIM, IF ANY, DURING THE TWELVE MONTHS -PRECEDING THE CLAIMED BREACH. IN NO EVENT WILL YOU (RELATIVE TO YOUR -SHARED MODIFICATIONS OR ERROR CORRECTIONS) OR ORIGINAL CONTRIBUTOR BE -LIABLE FOR ANY INDIRECT, PUNITIVE, SPECIAL, INCIDENTAL OR CONSEQUENTIAL -DAMAGES IN CONNECTION WITH OR RISING OUT OF THIS LICENSE (INCLUDING, -WITHOUT LIMITATION, LOSS OF PROFITS, USE, DATA, OR OTHER ECONOMIC -ADVANTAGE), HOWEVER IT ARISES AND ON ANY THEORY OF LIABILITY, WHETHER IN -AN ACTION FOR CONTRACT, STRICT LIABILITY OR TORT (INCLUDING NEGLIGENCE) -OR OTHERWISE, WHETHER OR NOT YOU OR ORIGINAL CONTRIBUTOR HAS BEEN -ADVISED OF THE POSSIBILITY OF SUCH DAMAGE AND NOTWITHSTANDING THE -FAILURE OF ESSENTIAL PURPOSE OF ANY REMEDY. - -*8. Miscellaneous.* - -8.1 Trademark. - -You shall not use any Trademark unless You and Original Contributor -execute a copy of the Commercial Use and Trademark License Agreement -attached hereto as Attachment D. Except as expressly provided in the -License, You are granted no right, title or license to, or interest in, -any Trademarks. Whether or not You and Original Contributor enter into -the Trademark License, You agree not to (i) challenge Original -Contributor's ownership or use of Trademarks; (ii) attempt to register -any Trademarks, or any mark or logo substantially similar thereto; or -(iii) incorporate any Trademarks into Your own trademarks, product -names, service marks, company names, or domain names. - -8.2 Integration. - -This License represents the complete agreement concerning the subject -matter hereof. - -8.3 Assignment. - -Original Contributor may assign this License, and its rights and -obligations hereunder, in its sole discretion. You may assign the -Research Use portions of this License and the TCK license to a third -party upon prior written notice to Original Contributor (which may be -provided electronically via the Community Web-Server). You may not -assign the Commercial Use and Trademark license, the Add-On Technology -License, or the Add-On Technology Source Code Porting License, including -by way of merger (regardless of whether You are the surviving entity) or -acquisition, without Original Contributor's prior written consent. - -8.4 Severability. - -If any provision of this License is held to be unenforceable, such -provision shall be reformed only to the extent necessary to make it -enforceable. Notwithstanding the foregoing, if You are prohibited by law -from fully and specifically complying with Sections 2.2 or 3, this -License will immediately terminate and You must immediately discontinue -any use of Covered Code. - -8.5 Governing Law. - -This License shall be governed by the laws of the United States and the -State of Washington, as applied to contracts entered into and to be -performed in Washington between Washington residents. The application of -the United Nations Convention on Contracts for the International Sale of -Goods is expressly excluded. You agree that the state and federal courts -located in Seattle, Washington have exclusive jurisdiction over any -claim relating to the License, including contract and tort claims. - -8.6 Dispute Resolution. - -a) Arbitration. Any dispute arising out of or relating to this License -shall be finally settled by arbitration as set out herein, except that -either party may bring any action, in a court of competent jurisdiction -(which jurisdiction shall be exclusive), with respect to any dispute -relating to such party's Intellectual Property Rights or with respect to -Your compliance with the TCK license. Arbitration shall be administered: -(i) by the American Arbitration Association (AAA), (ii) in accordance -with the rules of the United Nations Commission on International Trade -Law (UNCITRAL) (the "Rules") in effect at the time of arbitration as -modified herein; and (iii) the arbitrator will apply the substantive -laws of Washington and the United States. Judgment upon the award -rendered by the arbitrator may be entered in any court having -jurisdiction to enforce such award. - -b) Arbitration language, venue and damages. All arbitration proceedings -shall be conducted in English by a single arbitrator selected in -accordance with the Rules, who must be fluent in English and be either a -retired judge or practicing attorney having at least ten (10) years -litigation experience and be reasonably familiar with the technology -matters relative to the dispute. Unless otherwise agreed, arbitration -venue shall be in Seattle, Washington. The arbitrator may award monetary -damages only and nothing shall preclude either party from seeking -provisional or emergency relief from a court of competent jurisdiction. -The arbitrator shall have no authority to award damages in excess of -those permitted in this License and any such award in excess is void. -All awards will be payable in U.S. dollars and may include, for the -prevailing party (i) pre-judgment award interest, (ii) reasonable -attorneys' fees incurred in connection with the arbitration, and (iii) -reasonable costs and expenses incurred in enforcing the award. The -arbitrator will order each party to produce identified documents and -respond to no more than twenty-five single question interrogatories. - -8.7 Construction. - -Any law or regulation, which provides that the language of a contract -shall be construed against the drafter, shall not apply to this License. - -8.8 U.S. Government End Users. - -The Covered Code is a "commercial item," as that term is defined in 48 -C.F.R. 2.101 (Oct. 1995), consisting of "commercial computer software" -and "commercial computer software documentation," as such terms are used -in 48 C.F.R. 12.212 (Sept. 1995). Consistent with 48 C.F.R. 12.212 and -48 C.F.R. 227.7202-1 through 227.7202-4 (June 1995), all U.S. Government -End Users acquire Covered Code with only those rights set forth herein. -You agree to pass this notice to our licensees. - -8.9 Marketing Activities. - -Licensee hereby grants Original Contributor a non-exclusive, -non-transferable, limited license to use the Licensee's company name and -logo ("Licensee Marks") in any presentations, press releases, or -marketing materials solely for the purpose of identifying Licensee as a -member of the Helix Community. Licensee shall provide samples of -Licensee Marks to Original Contributor upon request by Original -Contributor. Original Contributor acknowledges that the Licensee Marks -are the trademarks of Licensee. Original Contributor shall not use the -Licensee Marks in a way that may imply that Original Contributor is an -agency or branch of Licensee. Original Contributor understands and -agrees that the use of any Licensee Marks in connection with this -Agreement shall not create any right, title or interest, in, or to the -Licensee Marks or any Licensee trademarks and that all such use and -goodwill associated with any such trademarks will inure to the benefit -of Licensee. Further the Original Contributor will stop usage of the -Licensee Marks upon Licensee's request. - -8.10 Press Announcements. - -You may make press announcements or other public statements regarding -this License without the prior written consent of the Original -Contributor, if Your statement is limited to announcing the licensing of -the Covered Code or the availability of Your Product and its -compatibility with the Covered Code. All other public announcements -regarding this license require the prior written consent of the Original -Contributor. Consent requests are welcome at press@helixcommunity.org. - -8.11 International Use. - -a) Export/Import laws. Covered Code is subject to U.S. export control -laws and may be subject to export or import regulations in other -countries. Each party agrees to comply strictly with all such laws and -regulations and acknowledges their responsibility to obtain such -licenses to export, re-export, or import as may be required. You agree -to pass these obligations to Your licensees. - -b) Intellectual Property Protection. Due to limited intellectual -property protection and enforcement in certain countries, You agree not -to redistribute the Original Code, Upgraded Code, TCK and Specifications -to any country on the list of restricted countries on the Community Web -Server. - -8.12 Language. - -This License is in the English language only, which language shall be -controlling in all respects, and all versions of this License in any -other language shall be for accommodation only and shall not be binding -on the parties to this License. All communications and notices made or -given pursuant to this License, and all documentation and support to be -provided, unless otherwise noted, shall be in the English language. - -PLEASE READ THE TERMS OF THIS LICENSE CAREFULLY. BY CLICKING ON THE -"ACCEPT" BUTTON BELOW YOU ARE ACCEPTING AND AGREEING TO THE TERMS AND -CONDITIONS OF THIS LICENSE WITH REALNETWORKS, INC. IF YOU ARE AGREEING -TO THIS LICENSE ON BEHALF OF A COMPANY, YOU REPRESENT THAT YOU ARE -AUTHORIZED TO BIND THE COMPANY TO SUCH A LICENSE. WHETHER YOU ARE ACTING -ON YOUR OWN BEHALF, OR REPRESENTING A COMPANY, YOU MUST BE OF MAJORITY -AGE AND BE OTHERWISE COMPETENT TO ENTER INTO CONTRACTS. IF YOU DO NOT -MEET THIS CRITERIA OR YOU DO NOT AGREE TO ANY OF THE TERMS AND -CONDITIONS OF THIS LICENSE, CLICK ON THE REJECT BUTTON TO EXIT. - - - GLOSSARY - -1. *"Added Value"* means code which: - -(i) has a principal purpose which is substantially different from that -of the stand-alone Technology; - -(ii) represents a significant functional and value enhancement to the -Technology; - -(iii) operates in conjunction with the Technology; and - -(iv) is not marketed as a technology which replaces or substitutes for -the Technology - -2. "*Applicable Patent Rights*" mean: (a) in the case where Original -Contributor is the grantor of rights, claims of patents that (i) are now -or hereafter acquired, owned by or assigned to Original Contributor and -(ii) are necessarily infringed by using or making the Original Code or -Upgraded Code, including Modifications provided by Original Contributor, -alone and not in combination with other software or hardware; and (b) in -the case where Licensee is the grantor of rights, claims of patents that -(i) are now or hereafter acquired, owned by or assigned to Licensee and -(ii) are infringed (directly or indirectly) by using or making -Licensee's Modifications or Error Corrections, taken alone or in -combination with Covered Code. - -3. "*Application Programming Interfaces (APIs)"* means the interfaces, -associated header files, service provider interfaces, and protocols that -enable a device, application, Operating System, or other program to -obtain services from or make requests of (or provide services in -response to requests from) other programs, and to use, benefit from, or -rely on the resources, facilities, and capabilities of the relevant -programs using the APIs. APIs includes the technical documentation -describing the APIs, the Source Code constituting the API, and any -Header Files used with the APIs. - -4. "*Commercial Use*" means any use (internal or external), copying, -sublicensing or distribution (internal or external), directly or -indirectly of Covered Code by You other than Your Research Use of -Covered Code within Your business or organization or in conjunction with -other Licensees with equivalent Research Use rights. Commercial Use -includes any use of the Covered Code for direct or indirect commercial -or strategic gain, advantage or other business purpose. Any Commercial -Use requires execution of Attachment D by You and Original Contributor. - -5. "*Community Code*" means the Original Code, Upgraded Code, Error -Corrections, Shared Modifications, or any combination thereof. - -6. "*Community Webserver(s)"* means the webservers designated by -Original Contributor for access to the Original Code, Upgraded Code, TCK -and Specifications and for posting Error Corrections and Shared -Modifications. - -7. "*Compliant Covered Code*" means Covered Code that complies with the -requirements of the TCK. - -8. "*Contributor*" means each Licensee that creates or contributes to -the creation of any Error Correction or Shared Modification. - -9. "*Covered Code*" means the Original Code, Upgraded Code, -Modifications, or any combination thereof. - -10. "*Error Correction*" means any change made to Community Code which -conforms to the Specification and corrects the adverse effect of a -failure of Community Code to perform any function set forth in or -required by the Specifications. - -11. "*Executable*" means Covered Code that has been converted from -Source Code to the preferred form for execution by a computer or digital -processor (e.g. binary form). - -12. "*Extension(s)"* means any additional Interfaces developed by or for -You which: (i) are designed for use with the Technology; (ii) constitute -an API for a library of computing functions or services; and (iii) are -disclosed or otherwise made available to third party software developers -for the purpose of developing software which invokes such additional -Interfaces. The foregoing shall not apply to software developed by Your -subcontractors to be exclusively used by You. - -13. "*Header File(s)"* means that portion of the Source Code that -provides the names and types of member functions, data members, class -definitions, and interface definitions necessary to implement the APIs -for the Covered Code. Header Files include, files specifically -designated by Original Contributor as Header Files. Header Files do not -include the code necessary to implement the functionality underlying the -Interface. - -14. *"Helix DNA Server Technology"* means the program(s) that implement -the Helix Universal Server streaming engine for the Technology as -defined in the Specification. - -15. *"Helix DNA Client Technology"* means the Covered Code that -implements the RealOne Player engine as defined in the Specification. - -16. *"Helix DNA Producer Technology"* means the Covered Code that -implements the Helix Producer engine as defined in the Specification. - -17. *"Helix DNA Technology"* means the Helix DNA Server Technology, the -Helix DNA Client Technology, the Helix DNA Producer Technology and other -Helix technologies designated by Original Contributor. - -18. "*Intellectual Property Rights*" means worldwide statutory and -common law rights associated solely with (i) Applicable Patent Rights; -(ii) works of authorship including copyrights, copyright applications, -copyright registrations and "moral rights"; (iii) the protection of -trade and industrial secrets and confidential information; and (iv) -divisions, continuations, renewals, and re-issuances of the foregoing -now existing or acquired in the future. - -19. *"Interface*" means interfaces, functions, properties, class -definitions, APIs, Header Files, GUIDs, V-Tables, and/or protocols -allowing one piece of software, firmware or hardware to communicate or -interoperate with another piece of software, firmware or hardware. - -20. "*Internal Deployment Use*" means use of Compliant Covered Code -(excluding Research Use) within Your business or organization only by -Your employees and/or agents on behalf of Your business or organization, -but not to provide services, including content distribution, to third -parties, subject to execution of Attachment D by You and Original -Contributor, if required. - -21. "*Licensee*" means any party that has entered into and has in effect -a version of this License with Original Contributor. - -22. "*MIME type*" means a description of what type of media or other -content is in a file, including by way of example but not limited to -'audio/x-pn-realaudio-plugin.' - -23. "*Modification(s)"* means (i) any addition to, deletion from and/or -change to the substance and/or structure of the Covered Code, including -Interfaces; (ii) the combination of any Covered Code and any previous -Modifications; (iii) any new file or other representation of computer -program statements that contains any portion of Covered Code; and/or -(iv) any new Source Code implementing any portion of the Specifications. - -24. "*MP3 Patents*" means any patents necessary to make, use or sell -technology implementing any portion of the specification developed by -the Moving Picture Experts Group known as MPEG-1 Audio Layer-3 or MP3, -including but not limited to all past and future versions, profiles, -extensions, parts and amendments relating to the MP3 specification. - -25. "*MPEG-4 Patents*" means any patents necessary to make, use or sell -technology implementing any portion of the specification developed by -the Moving Pictures Experts Group known as MPEG-4, including but not -limited to all past and future versions, profiles, extensions, parts and -amendments relating to the MPEG-4 specification. - -26. "*Original Code*" means the initial Source Code for the Technology -as described on the Community Web Server. - -27. "*Original Contributor*" means RealNetworks, Inc., its affiliates -and its successors and assigns. - -28. "*Original Contributor MIME Type*" means the MIME registry, browser -preferences, or local file/protocol associations invoking any Helix DNA -Client-based application, including the RealOne Player, for playback of -RealAudio, RealVideo, other RealMedia MIME types or datatypes (e.g., -.ram, .rnx, .rpm, .ra, .rm, .rp, .rt, .rf, .prx, .mpe, .rmp, .rmj, .rav, -.rjs, .rmx, .rjt, .rms), and any other Original Contributor-specific or -proprietary MIME types that Original Contributor may introduce in the -future. - -29. "*Personal Use*" means use of Covered Code by an individual solely -for his or her personal, private and non-commercial purposes. An -individual's use of Covered Code in his or her capacity as an officer, -employee, member, independent contractor or agent of a corporation, -business or organization (commercial or non-commercial) does not qualify -as Personal Use. - -30. "*RealMedia File Format*" means the file format designed and -developed by RealNetworks for storing multimedia data and used to store -RealAudio and RealVideo encoded streams. Valid RealMedia File Format -extensions include: .rm, .rmj, .rmc, .rmvb, .rms. - -31. "*RCSL Webpage*" means the RealNetworks Community Source License -webpage located at https://www.helixcommunity.org/content/rcsl or such -other URL that Original Contributor may designate from time to time. - -32. "*Reformatted Specifications*" means any revision to the -Specifications which translates or reformats the Specifications (as for -example in connection with Your documentation) but which does not alter, -subset or superset * *the functional or operational aspects of the -Specifications. - -33. "*Research Use*" means use and distribution of Covered Code only for -Your Personal Use, research or development use and expressly excludes -Internal Deployment Use and Commercial Use. Research Use also includes -use of Covered Code to teach individuals how to use Covered Code. - -34. "*Shared Modifications*" means Modifications that You distribute or -use for a Commercial Use, in addition to any Modifications provided by -You, at Your option, pursuant to Section 2.2, or received by You from a -Contributor pursuant to Section 2.3. - -35. "*Source Code*" means the preferred form of the Covered Code for -making modifications to it, including all modules it contains, plus any -associated interface definition files, scripts used to control -compilation and installation of an Executable, or source code -differential comparisons against either the Original Code or another -well known, available Covered Code of the Contributor's choice. The -Source Code can be in a compressed or archival form, provided the -appropriate decompression or de-archiving software is widely available -for no charge. - -36. "*Specifications*" means the specifications for the Technology and -other documentation, as designated on the Community Web Server, as may -be revised by Original Contributor from time to time. - -37. "*Trademarks*" means Original Contributor's trademarks and logos, -including, but not limited to, RealNetworks, RealAudio, RealVideo, -RealOne, RealSystem, SureStream, Helix, Helix DNA and other trademarks -whether now used or adopted in the future. - -38. "*Technology*" means the technology described in Attachment B, and -Upgrades. - -39. "*Technology Compatibility Kit"* or *"TCK*" means the test programs, -procedures, acceptance criteria and/or other requirements, designated by -Original Contributor for use in verifying compliance of Covered Code -with the Specifications, in conjunction with the Original Code and -Upgraded Code. Original Contributor may, in its sole discretion and from -time to time, revise a TCK to correct errors and/or omissions and in -connection with Upgrades. - -40. "*Upgrade(s)"* means new versions of Technology designated -exclusively by Original Contributor as an "Upgrade" and released by -Original Contributor from time to time under the terms of the License. - -41. "*Upgraded Code*" means the Source Code and/or Executables for -Upgrades, possibly including Modifications made by Contributors. - -42. *"User's Guide"* means the users guide for the TCK which Original -Contributor makes available to You to provide direction in how to run -the TCK and properly interpret the results, as may be revised by -Original Contributor from time to time. - -43. "*You(r)*" means an individual, or a legal entity acting by and -through an individual or individuals, exercising rights either under -this License or under a future version of this License issued pursuant -to Section 4.1. For legal entities, "You(r)" includes any entity that by -majority voting interest controls, is controlled by, or is under common -control with You. - -44. "*Your Products*" means any (i) hardware products You distribute -integrating the Covered Code; (ii) any software products You distribute -with the Covered Code that utilize the APIs of the Covered Code; or -(iii) any services You provide using the Covered Code. - - - ATTACHMENT A - -REQUIRED NOTICES - - - ATTACHMENT A-1 - -REQUIRED IN ALL CASES - -Notice to be included in header file of all Error Corrections and Shared -Modifications: - -Portions Copyright 1994-2003 © RealNetworks, Inc. All rights reserved. - -The contents of this file, and the files included with this file, are -subject to the current version of RealNetworks Community Source License -Version 1.1 (the "License"). You may not use this file except in -compliance with the License executed by both You and RealNetworks. You -may obtain a copy of the License at * -https://www.helixcommunity.org/content/rcsl.* You may also obtain a copy -of the License by contacting RealNetworks directly. Please see the -License for the rights, obligations and limitations governing use of the -contents of the file. - -This file is part of the Helix DNA technology. RealNetworks, Inc., is -the developer of the Original code and owns the copyrights in the -portions it created. - -This file, and the files included with this file, are distributed on an -'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESS OR IMPLIED, -AND REALNETWORKS HEREBY DISCLAIMS ALL SUCH WARRANTIES, INCLUDING WITHOUT -LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR -PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT. - -Contributor(s): - -_______________________________________________ - -Technology Compatibility Kit Test Suite(s) Location: - -________________________________ - - - ATTACHMENT A-2 - -SAMPLE LICENSEE CERTIFICATION - -"By clicking the `Agree' button below, You certify that You are a -Licensee in good standing under the RealNetworks Community Source -License, ("License") and that Your access, use and distribution of code -and information You may obtain at this site is subject to the License. -If You are not a Licensee under the RealNetworks Community Source -License You agree not to download, copy or use the Helix DNA technology. - - - ATTACHMENT A-3 - -REQUIRED STUDENT NOTIFICATION - -"This software and related documentation has been obtained by Your -educational institution subject to the RealNetworks Community Source -License. You have been provided access to the software and related -documentation for use only in connection with your course work and -research activities as a matriculated student of Your educational -institution. Any other use is expressly prohibited. - -THIS SOFTWARE AND RELATED DOCUMENTATION CONTAINS PROPRIETARY MATERIAL OF -REALNETWORKS, INC, WHICH ARE PROTECTED BY VARIOUS INTELLECTUAL PROPERTY -RIGHTS. - -You may not use this file except in compliance with the License. You may -obtain a copy of the License on the web at -https://www.helixcommunity.org/content/rcsl. - -* -* - - - ATTACHMENT B - -Description of Technology - -Helix DNA, which consists of Helix DNA Client, Helix DNA Server and -Helix DNA Producer. - -Description of "Technology" - -Helix DNA Technology v1.0 as described on the Community Web Server. - - - ATTACHMENT C - -TECHNOLOGY COMPATIBILITY KIT LICENSE - -The following license is effective for the *Helix DNA* Technology -Compatibility Kit - as described on the Community Web Server. The -Technology Compatibility Kit(s) for the Technology specified in -Attachment B may be accessed at the Community Web Server. - -1. TCK License. - -1.1 Grants to use TCK - -Subject to the terms and restrictions set forth below and the -RealNetworks Community Source License, and the Research Use license, -Original Contributor grants to You a worldwide, non-exclusive, -non-transferable license, to the extent of Original Contributor's -Intellectual Property Rights in the TCK (without the right to -sublicense), to use the TCK to develop and test Covered Code. - -1.2 TCK Use Restrictions. - -You are not authorized to create derivative works of the TCK or use the -TCK to test any implementation of the Specification that is not Covered -Code. You may not publish Your test results or make claims of -comparative compatibility with respect to other implementations of the -Specification. In consideration for the license grant in Section 1.1 -above You agree not to develop Your own tests that are intended to -validate conformation with the Specification. - -2. Test Results. - -You agree to provide to Original Contributor or the third party test -facility if applicable, Your test results that demonstrate that Covered -Code is Compliant Covered Code and that Original Contributor may publish -or otherwise distribute such test results. - -PLEASE READ THE TERMS OF THIS LICENSE CAREFULLY. BY CLICKING ON THE -"ACCEPT" BUTTON BELOW YOU ARE ACCEPTING AND AGREEING TO THE TERMS AND -CONDITIONS OF THIS LICENSE WITH THE ORIGINAL CONTRIBUTOR, REALNETWORKS, -INC. IF YOU ARE AGREEING TO THIS LICENSE ON BEHALF OF A COMPANY, YOU -REPRESENT THAT YOU ARE AUTHORIZED TO BIND THE COMPANY TO SUCH A LICENSE. -WHETHER YOU ARE ACTING ON YOUR OWN BEHALF, OR REPRESENTING A COMPANY, -YOU MUST BE OF MAJORITY AGE AND BE OTHERWISE COMPETENT TO ENTER INTO -CONTRACTS. IF YOU DO NOT MEET THIS CRITERIA OR YOU DO NOT AGREE TO ANY -OF THE TERMS AND CONDITIONS OF THIS LICENSE, CLICK ON THE REJECT BUTTON -TO EXIT. - -*ACCEPT / REJECT -* - -* -* - -*To agree to the R&D/academic terms of this license, please register - on the site -- -you will then be given a chance to agree to the clickwrap RCSL - -R&D License - -and gain access to the RCSL-licensed source code. To build or deploy -commercial applications based on the RCSL, you will need to agree to the -Commercial Use license attachments -* - - - diff --git a/bsp/stm32_radio/mp3/real/arm/RPSL.txt b/bsp/stm32_radio/mp3/real/arm/RPSL.txt deleted file mode 100644 index d040a45205..0000000000 --- a/bsp/stm32_radio/mp3/real/arm/RPSL.txt +++ /dev/null @@ -1,518 +0,0 @@ -RealNetworks Public Source License Version 1.0 -(Rev. Date October 28, 2002) - -1. General Definitions. This License applies to any program or other work which -RealNetworks, Inc., or any other entity that elects to use this license, -("Licensor") makes publicly available and which contains a notice placed by -Licensor identifying such program or work as "Original Code" and stating that it -is subject to the terms of this RealNetworks Public Source License version 1.0 -(or subsequent version thereof) ("License"). You are not required to accept this -License. However, nothing else grants You permission to use, copy, modify or -distribute the software or its derivative works. These actions are prohibited by -law if You do not accept this License. Therefore, by modifying, copying or -distributing the software (or any work based on the software), You indicate your -acceptance of this License to do so, and all its terms and conditions. In -addition, you agree to the terms of this License by clicking the Accept button -or downloading the software. As used in this License: - -1.1 "Applicable Patent Rights" mean: (a) in the case where Licensor is the -grantor of rights, claims of patents that (i) are now or hereafter acquired, -owned by or assigned to Licensor and (ii) are necessarily infringed by using or -making the Original Code alone and not in combination with other software or -hardware; and (b) in the case where You are the grantor of rights, claims of -patents that (i) are now or hereafter acquired, owned by or assigned to You and -(ii) are infringed (directly or indirectly) by using or making Your -Modifications, taken alone or in combination with Original Code. - -1.2 "Compatible Source License" means any one of the licenses listed on Exhibit -B or at https://www.helixcommunity.org/content/complicense or other licenses -specifically identified by Licensor in writing. Notwithstanding any term to the -contrary in any Compatible Source License, any code covered by any Compatible -Source License that is used with Covered Code must be made readily available in -Source Code format for royalty-free use under the terms of the Compatible Source -License or this License. - -1.3 "Contributor" means any person or entity that creates or contributes to the -creation of Modifications. - -1.4 "Covered Code" means the Original Code, Modifications, the combination of -Original Code and any Modifications, and/or any respective portions thereof. - -1.5 "Deploy" means to use, sublicense or distribute Covered Code other than for -Your internal research and development (R&D) and/or Personal Use, and includes -without limitation, any and all internal use or distribution of Covered Code -within Your business or organization except for R&D use and/or Personal Use, as -well as direct or indirect sublicensing or distribution of Covered Code by You -to any third party in any form or manner. - -1.6 "Derivative Work" means either the Covered Code or any derivative work under -United States copyright law, and including any work containing or including any -portion of the Covered Code or Modifications, either verbatim or with -modifications and/or translated into another language. Derivative Work also -includes any work which combines any portion of Covered Code or Modifications -with code not otherwise governed by the terms of this License. - -1.7 "Externally Deploy" means to Deploy the Covered Code in any way that may be -accessed or used by anyone other than You, used to provide any services to -anyone other than You, or used in any way to deliver any content to anyone other -than You, whether the Covered Code is distributed to those parties, made -available as an application intended for use over a computer network, or used to -provide services or otherwise deliver content to anyone other than You. - -1.8. "Interface" means interfaces, functions, properties, class definitions, -APIs, header files, GUIDs, V-Tables, and/or protocols allowing one piece of -software, firmware or hardware to communicate or interoperate with another piece -of software, firmware or hardware. - -1.9 "Modifications" mean any addition to, deletion from, and/or change to, the -substance and/or structure of the Original Code, any previous Modifications, the -combination of Original Code and any previous Modifications, and/or any -respective portions thereof. When code is released as a series of files, a -Modification is: (a) any addition to or deletion from the contents of a file -containing Covered Code; and/or (b) any new file or other representation of -computer program statements that contains any part of Covered Code. - -1.10 "Original Code" means (a) the Source Code of a program or other work as -originally made available by Licensor under this License, including the Source -Code of any updates or upgrades to such programs or works made available by -Licensor under this License, and that has been expressly identified by Licensor -as such in the header file(s) of such work; and (b) the object code compiled -from such Source Code and originally made available by Licensor under this -License. - -1.11 "Personal Use" means use of Covered Code by an individual solely for his or -her personal, private and non-commercial purposes. An individual's use of -Covered Code in his or her capacity as an officer, employee, member, independent -contractor or agent of a corporation, business or organization (commercial or -non-commercial) does not qualify as Personal Use. - -1.12 "Source Code" means the human readable form of a program or other work that -is suitable for making modifications to it, including all modules it contains, -plus any associated interface definition files, scripts used to control -compilation and installation of an executable (object code). - -1.13 "You" or "Your" means an individual or a legal entity exercising rights -under this License. For legal entities, "You" or "Your" includes any entity -which controls, is controlled by, or is under common control with, You, where -"control" means (a) the power, direct or indirect, to cause the direction or -management of such entity, whether by contract or otherwise, or (b) ownership of -fifty percent (50%) or more of the outstanding shares or beneficial ownership of -such entity. - -2. Permitted Uses; Conditions & Restrictions. Subject to the terms and -conditions of this License, Licensor hereby grants You, effective on the date -You accept this License (via downloading or using Covered Code or otherwise -indicating your acceptance of this License), a worldwide, royalty-free, -non-exclusive copyright license, to the extent of Licensor's copyrights cover -the Original Code, to do the following: - -2.1 You may reproduce, display, perform, modify and Deploy Covered Code, -provided that in each instance: - -(a) You must retain and reproduce in all copies of Original Code the copyright -and other proprietary notices and disclaimers of Licensor as they appear in the -Original Code, and keep intact all notices in the Original Code that refer to -this License; - -(b) You must include a copy of this License with every copy of Source Code of -Covered Code and documentation You distribute, and You may not offer or impose -any terms on such Source Code that alter or restrict this License or the -recipients' rights hereunder, except as permitted under Section 6; - -(c) You must duplicate, to the extent it does not already exist, the notice in -Exhibit A in each file of the Source Code of all Your Modifications, and cause -the modified files to carry prominent notices stating that You changed the files -and the date of any change; - -(d) You must make Source Code of all Your Externally Deployed Modifications -publicly available under the terms of this License, including the license grants -set forth in Section 3 below, for as long as you Deploy the Covered Code or -twelve (12) months from the date of initial Deployment, whichever is longer. You -should preferably distribute the Source Code of Your Deployed Modifications -electronically (e.g. download from a web site); and - -(e) if You Deploy Covered Code in object code, executable form only, You must -include a prominent notice, in the code itself as well as in related -documentation, stating that Source Code of the Covered Code is available under -the terms of this License with information on how and where to obtain such -Source Code. You must also include the Object Code Notice set forth in Exhibit A -in the "about" box or other appropriate place where other copyright notices are -placed, including any packaging materials. - -2.2 You expressly acknowledge and agree that although Licensor and each -Contributor grants the licenses to their respective portions of the Covered Code -set forth herein, no assurances are provided by Licensor or any Contributor that -the Covered Code does not infringe the patent or other intellectual property -rights of any other entity. Licensor and each Contributor disclaim any liability -to You for claims brought by any other entity based on infringement of -intellectual property rights or otherwise. As a condition to exercising the -rights and licenses granted hereunder, You hereby assume sole responsibility to -secure any other intellectual property rights needed, if any. For example, if a -third party patent license is required to allow You to make, use, sell, import -or offer for sale the Covered Code, it is Your responsibility to acquire such -license(s). - -2.3 Subject to the terms and conditions of this License, Licensor hereby grants -You, effective on the date You accept this License (via downloading or using -Covered Code or otherwise indicating your acceptance of this License), a -worldwide, royalty-free, perpetual, non-exclusive patent license under -Licensor's Applicable Patent Rights to make, use, sell, offer for sale and -import the Covered Code, provided that in each instance you comply with the -terms of this License. - -3. Your Grants. In consideration of, and as a condition to, the licenses granted -to You under this License: - -(a) You grant to Licensor and all third parties a non-exclusive, perpetual, -irrevocable, royalty free license under Your Applicable Patent Rights and other -intellectual property rights owned or controlled by You, to make, sell, offer -for sale, use, import, reproduce, display, perform, modify, distribute and -Deploy Your Modifications of the same scope and extent as Licensor's licenses -under Sections 2.1 and 2.2; and - -(b) You grant to Licensor and its subsidiaries a non-exclusive, worldwide, -royalty-free, perpetual and irrevocable license, under Your Applicable Patent -Rights and other intellectual property rights owned or controlled by You, to -make, use, sell, offer for sale, import, reproduce, display, perform, -distribute, modify or have modified (for Licensor and/or its subsidiaries), -sublicense and distribute Your Modifications, in any form and for any purpose, -through multiple tiers of distribution. - -(c) You agree not use any information derived from Your use and review of the -Covered Code, including but not limited to any algorithms or inventions that may -be contained in the Covered Code, for the purpose of asserting any of Your -patent rights, or assisting a third party to assert any of its patent rights, -against Licensor or any Contributor. - -4. Derivative Works. You may create a Derivative Work by combining Covered Code -with other code not otherwise governed by the terms of this License and -distribute the Derivative Work as an integrated product. In each such instance, -You must make sure the requirements of this License are fulfilled for the -Covered Code or any portion thereof, including all Modifications. - -4.1 You must cause any Derivative Work that you distribute, publish or -Externally Deploy, that in whole or in part contains or is derived from the -Covered Code or any part thereof, to be licensed as a whole at no charge to all -third parties under the terms of this License and no other license except as -provided in Section 4.2. You also must make Source Code available for the -Derivative Work under the same terms as Modifications, described in Sections 2 -and 3, above. - -4.2 Compatible Source Licenses. Software modules that have been independently -developed without any use of Covered Code and which contain no portion of the -Covered Code, Modifications or other Derivative Works, but are used or combined -in any way wtih the Covered Code or any Derivative Work to form a larger -Derivative Work, are exempt from the conditions described in Section 4.1 but -only to the extent that: the software module, including any software that is -linked to, integrated with, or part of the same applications as, the software -module by any method must be wholly subject to one of the Compatible Source -Licenses. Notwithstanding the foregoing, all Covered Code must be subject to the -terms of this License. Thus, the entire Derivative Work must be licensed under a -combination of the RPSL (for Covered Code) and a Compatible Source License for -any independently developed software modules within the Derivative Work. The -foregoing requirement applies even if the Compatible Source License would -ordinarily allow the software module to link with, or form larger works with, -other software that is not subject to the Compatible Source License. For -example, although the Mozilla Public License v1.1 allows Mozilla code to be -combined with proprietary software that is not subject to the MPL, if -MPL-licensed code is used with Covered Code the MPL-licensed code could not be -combined or linked with any code not governed by the MPL. The general intent of -this section 4.2 is to enable use of Covered Code with applications that are -wholly subject to an acceptable open source license. You are responsible for -determining whether your use of software with Covered Code is allowed under Your -license to such software. - -4.3 Mere aggregation of another work not based on the Covered Code with the -Covered Code (or with a work based on the Covered Code) on a volume of a storage -or distribution medium does not bring the other work under the scope of this -License. If You deliver the Covered Code for combination and/or integration with -an application previously provided by You (for example, via automatic updating -technology), such combination and/or integration constitutes a Derivative Work -subject to the terms of this License. - -5. Exclusions From License Grant. Nothing in this License shall be deemed to -grant any rights to trademarks, copyrights, patents, trade secrets or any other -intellectual property of Licensor or any Contributor except as expressly stated -herein. No right is granted to the trademarks of Licensor or any Contributor -even if such marks are included in the Covered Code. Nothing in this License -shall be interpreted to prohibit Licensor from licensing under different terms -from this License any code that Licensor otherwise would have a right to -license. Modifications, Derivative Works and/or any use or combination of -Covered Code with other technology provided by Licensor or third parties may -require additional patent licenses from Licensor which Licensor may grant in its -sole discretion. No patent license is granted separate from the Original Code or -combinations of the Original Code with other software or hardware. - -5.1. Trademarks. This License does not grant any rights to use the trademarks or -trade names owned by Licensor ("Licensor Marks" defined in Exhibit C) or to any -trademark or trade name belonging to any Contributor. No Licensor Marks may be -used to endorse or promote products derived from the Original Code other than as -permitted by the Licensor Trademark Policy defined in Exhibit C. - -6. Additional Terms. You may choose to offer, and to charge a fee for, warranty, -support, indemnity or liability obligations and/or other rights consistent with -the scope of the license granted herein ("Additional Terms") to one or more -recipients of Covered Code. However, You may do so only on Your own behalf and -as Your sole responsibility, and not on behalf of Licensor or any Contributor. -You must obtain the recipient's agreement that any such Additional Terms are -offered by You alone, and You hereby agree to indemnify, defend and hold -Licensor and every Contributor harmless for any liability incurred by or claims -asserted against Licensor or such Contributor by reason of any such Additional -Terms. - -7. Versions of the License. Licensor may publish revised and/or new versions of -this License from time to time. Each version will be given a distinguishing -version number. Once Original Code has been published under a particular version -of this License, You may continue to use it under the terms of that version. You -may also choose to use such Original Code under the terms of any subsequent -version of this License published by Licensor. No one other than Licensor has -the right to modify the terms applicable to Covered Code created under this -License. - -8. NO WARRANTY OR SUPPORT. The Covered Code may contain in whole or in part -pre-release, untested, or not fully tested works. The Covered Code may contain -errors that could cause failures or loss of data, and may be incomplete or -contain inaccuracies. You expressly acknowledge and agree that use of the -Covered Code, or any portion thereof, is at Your sole and entire risk. THE -COVERED CODE IS PROVIDED "AS IS" AND WITHOUT WARRANTY, UPGRADES OR SUPPORT OF -ANY KIND AND LICENSOR AND LICENSOR'S LICENSOR(S) (COLLECTIVELY REFERRED TO AS -"LICENSOR" FOR THE PURPOSES OF SECTIONS 8 AND 9) AND ALL CONTRIBUTORS EXPRESSLY -DISCLAIM ALL WARRANTIES AND/OR CONDITIONS, EXPRESS OR IMPLIED, INCLUDING, BUT -NOT LIMITED TO, THE IMPLIED WARRANTIES AND/OR CONDITIONS OF MERCHANTABILITY, OF -SATISFACTORY QUALITY, OF FITNESS FOR A PARTICULAR PURPOSE, OF ACCURACY, OF QUIET -ENJOYMENT, AND NONINFRINGEMENT OF THIRD PARTY RIGHTS. LICENSOR AND EACH -CONTRIBUTOR DOES NOT WARRANT AGAINST INTERFERENCE WITH YOUR ENJOYMENT OF THE -COVERED CODE, THAT THE FUNCTIONS CONTAINED IN THE COVERED CODE WILL MEET YOUR -REQUIREMENTS, THAT THE OPERATION OF THE COVERED CODE WILL BE UNINTERRUPTED OR -ERROR-FREE, OR THAT DEFECTS IN THE COVERED CODE WILL BE CORRECTED. NO ORAL OR -WRITTEN DOCUMENTATION, INFORMATION OR ADVICE GIVEN BY LICENSOR, A LICENSOR -AUTHORIZED REPRESENTATIVE OR ANY CONTRIBUTOR SHALL CREATE A WARRANTY. You -acknowledge that the Covered Code is not intended for use in high risk -activities, including, but not limited to, the design, construction, operation -or maintenance of nuclear facilities, aircraft navigation, aircraft -communication systems, or air traffic control machines in which case the failure -of the Covered Code could lead to death, personal injury, or severe physical or -environmental damage. Licensor disclaims any express or implied warranty of -fitness for such uses. - -9. LIMITATION OF LIABILITY. TO THE EXTENT NOT PROHIBITED BY LAW, IN NO EVENT -SHALL LICENSOR OR ANY CONTRIBUTOR BE LIABLE FOR ANY INCIDENTAL, SPECIAL, -INDIRECT OR CONSEQUENTIAL DAMAGES ARISING OUT OF OR RELATING TO THIS LICENSE OR -YOUR USE OR INABILITY TO USE THE COVERED CODE, OR ANY PORTION THEREOF, WHETHER -UNDER A THEORY OF CONTRACT, WARRANTY, TORT (INCLUDING NEGLIGENCE OR STRICT -LIABILITY), PRODUCTS LIABILITY OR OTHERWISE, EVEN IF LICENSOR OR SUCH -CONTRIBUTOR HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES AND -NOTWITHSTANDING THE FAILURE OF ESSENTIAL PURPOSE OF ANY REMEDY. SOME -JURISDICTIONS DO NOT ALLOW THE LIMITATION OF LIABILITY OF INCIDENTAL OR -CONSEQUENTIAL DAMAGES, SO THIS LIMITATION MAY NOT APPLY TO YOU. In no event -shall Licensor's total liability to You for all damages (other than as may be -required by applicable law) under this License exceed the amount of ten dollars -($10.00). - -10. Ownership. Subject to the licenses granted under this License, each -Contributor retains all rights, title and interest in and to any Modifications -made by such Contributor. Licensor retains all rights, title and interest in and -to the Original Code and any Modifications made by or on behalf of Licensor -("Licensor Modifications"), and such Licensor Modifications will not be -automatically subject to this License. Licensor may, at its sole discretion, -choose to license such Licensor Modifications under this License, or on -different terms from those contained in this License or may choose not to -license them at all. - -11. Termination. - -11.1 Term and Termination. The term of this License is perpetual unless -terminated as provided below. This License and the rights granted hereunder will -terminate: - -(a) automatically without notice from Licensor if You fail to comply with any -term(s) of this License and fail to cure such breach within 30 days of becoming -aware of such breach; - -(b) immediately in the event of the circumstances described in Section 12.5(b); -or - -(c) automatically without notice from Licensor if You, at any time during the -term of this License, commence an action for patent infringement against -Licensor (including by cross-claim or counter claim in a lawsuit); - -(d) upon written notice from Licensor if You, at any time during the term of -this License, commence an action for patent infringement against any third party -alleging that the Covered Code itself (excluding combinations with other -software or hardware) infringes any patent (including by cross-claim or counter -claim in a lawsuit). - -11.2 Effect of Termination. Upon termination, You agree to immediately stop any -further use, reproduction, modification, sublicensing and distribution of the -Covered Code and to destroy all copies of the Covered Code that are in your -possession or control. All sublicenses to the Covered Code which have been -properly granted prior to termination shall survive any termination of this -License. Provisions which, by their nature, should remain in effect beyond the -termination of this License shall survive, including but not limited to Sections -3, 5, 8, 9, 10, 11, 12.2 and 13. No party will be liable to any other for -compensation, indemnity or damages of any sort solely as a result of terminating -this License in accordance with its terms, and termination of this License will -be without prejudice to any other right or remedy of any party. - -12. Miscellaneous. - -12.1 Government End Users. The Covered Code is a "commercial item" as defined in -FAR 2.101. Government software and technical data rights in the Covered Code -include only those rights customarily provided to the public as defined in this -License. This customary commercial license in technical data and software is -provided in accordance with FAR 12.211 (Technical Data) and 12.212 (Computer -Software) and, for Department of Defense purchases, DFAR 252.227-7015 (Technical -Data -- Commercial Items) and 227.7202-3 (Rights in Commercial Computer Software -or Computer Software Documentation). Accordingly, all U.S. Government End Users -acquire Covered Code with only those rights set forth herein. - -12.2 Relationship of Parties. This License will not be construed as creating an -agency, partnership, joint venture or any other form of legal association -between or among You, Licensor or any Contributor, and You will not represent to -the contrary, whether expressly, by implication, appearance or otherwise. - -12.3 Independent Development. Nothing in this License will impair Licensor's -right to acquire, license, develop, have others develop for it, market and/or -distribute technology or products that perform the same or similar functions as, -or otherwise compete with, Modifications, Derivative Works, technology or -products that You may develop, produce, market or distribute. - -12.4 Waiver; Construction. Failure by Licensor or any Contributor to enforce any -provision of this License will not be deemed a waiver of future enforcement of -that or any other provision. Any law or regulation which provides that the -language of a contract shall be construed against the drafter will not apply to -this License. - -12.5 Severability. (a) If for any reason a court of competent jurisdiction finds -any provision of this License, or portion thereof, to be unenforceable, that -provision of the License will be enforced to the maximum extent permissible so -as to effect the economic benefits and intent of the parties, and the remainder -of this License will continue in full force and effect. (b) Notwithstanding the -foregoing, if applicable law prohibits or restricts You from fully and/or -specifically complying with Sections 2 and/or 3 or prevents the enforceability -of either of those Sections, this License will immediately terminate and You -must immediately discontinue any use of the Covered Code and destroy all copies -of it that are in your possession or control. - -12.6 Dispute Resolution. Any litigation or other dispute resolution between You -and Licensor relating to this License shall take place in the Seattle, -Washington, and You and Licensor hereby consent to the personal jurisdiction of, -and venue in, the state and federal courts within that District with respect to -this License. The application of the United Nations Convention on Contracts for -the International Sale of Goods is expressly excluded. - -12.7 Export/Import Laws. This software is subject to all export and import laws -and restrictions and regulations of the country in which you receive the Covered -Code and You are solely responsible for ensuring that You do not export, -re-export or import the Covered Code or any direct product thereof in violation -of any such restrictions, laws or regulations, or without all necessary -authorizations. - -12.8 Entire Agreement; Governing Law. This License constitutes the entire -agreement between the parties with respect to the subject matter hereof. This -License shall be governed by the laws of the United States and the State of -Washington. - -Where You are located in the province of Quebec, Canada, the following clause -applies: The parties hereby confirm that they have requested that this License -and all related documents be drafted in English. Les parties ont exigé -que le présent contrat et tous les documents connexes soient -rédigés en anglais. - - EXHIBIT A. - -"Copyright © 1995-2002 -RealNetworks, Inc. and/or its licensors. All Rights Reserved. - -The contents of this file, and the files included with this file, are subject to -the current version of the RealNetworks Public Source License Version 1.0 (the -"RPSL") available at https://www.helixcommunity.org/content/rpsl unless you have -licensed the file under the RealNetworks Community Source License Version 1.0 -(the "RCSL") available at https://www.helixcommunity.org/content/rcsl, in which -case the RCSL will apply. You may also obtain the license terms directly from -RealNetworks. You may not use this file except in compliance with the RPSL or, -if you have a valid RCSL with RealNetworks applicable to this file, the RCSL. -Please see the applicable RPSL or RCSL for the rights, obligations and -limitations governing use of the contents of the file. - -This file is part of the Helix DNA Technology. RealNetworks is the developer of -the Original code and owns the copyrights in the portions it created. - -This file, and the files included with this file, is distributed and made -available on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESS OR -IMPLIED, AND REALNETWORKS HEREBY DISCLAIMS ALL SUCH WARRANTIES, INCLUDING -WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR -PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT. - -Contributor(s): ____________________________________ - -Technology Compatibility Kit Test -Suite(s) Location (if licensed under the RCSL): ______________________________ - -Object Code Notice: Helix DNA Client technology included. Copyright (c) -RealNetworks, Inc., 1995-2002. All rights reserved. - - - EXHIBIT B - -Compatible Source Licenses for the RealNetworks Public Source License. The -following list applies to the most recent version of the license as of October -25, 2002, unless otherwise indicated. - -* Academic Free License -* Apache Software License -* Apple Public Source License -* Artistic license -* Attribution Assurance Licenses -* BSD license -* Common Public License (1) -* Eiffel Forum License -* GNU General Public License (GPL) (1) -* GNU Library or "Lesser" General Public License (LGPL) (1) -* IBM Public License -* Intel Open Source License -* Jabber Open Source License -* MIT license -* MITRE Collaborative Virtual Workspace License (CVW License) -* Motosoto License -* Mozilla Public License 1.0 (MPL) -* Mozilla Public License 1.1 (MPL) -* Nokia Open Source License -* Open Group Test Suite License -* Python Software Foundation License -* Ricoh Source Code Public License -* Sun Industry Standards Source License (SISSL) -* Sun Public License -* University of Illinois/NCSA Open Source License -* Vovida Software License v. 1.0 -* W3C License -* X.Net License -* Zope Public License -* zlib/libpng license - -(1) Note: because this license contains certain reciprocal licensing terms that -purport to extend to independently developed code, You may be prohibited under -the terms of this otherwise compatible license from using code licensed under -its terms with Covered Code because Covered Code may only be licensed under the -RealNetworks Public Source License. Any attempt to apply non RPSL license terms, -including without limitation the GPL, to Covered Code is expressly forbidden. -You are responsible for ensuring that Your use of Compatible Source Licensed -code does not violate either the RPSL or the Compatible Source License. - -The latest version of this list can be found at: -https://www.helixcommunity.org/content/complicense - - EXHIBIT C - -RealNetworks' Trademark policy. - -RealNetworks defines the following trademarks collectively as "Licensor -Trademarks": "RealNetworks", "RealPlayer", "RealJukebox", "RealSystem", -"RealAudio", "RealVideo", "RealOne Player", "RealMedia", "Helix" or any other -trademarks or trade names belonging to RealNetworks. - -RealNetworks "Licensor Trademark Policy" forbids any use of Licensor Trademarks -except as permitted by and in strict compliance at all times with RealNetworks' -third party trademark usage guidelines which are posted at -http://www.realnetworks.com/info/helixlogo.html. - diff --git a/bsp/stm32_radio/mp3/real/arm/asmmisc.s b/bsp/stm32_radio/mp3/real/arm/asmmisc.s deleted file mode 100644 index d5492cdae3..0000000000 --- a/bsp/stm32_radio/mp3/real/arm/asmmisc.s +++ /dev/null @@ -1,69 +0,0 @@ -;/* ***** BEGIN LICENSE BLOCK ***** -; * Version: RCSL 1.0/RPSL 1.0 -; * -; * Portions Copyright (c) 1995-2002 RealNetworks, Inc. All Rights Reserved. -; * -; * The contents of this file, and the files included with this file, are -; * subject to the current version of the RealNetworks Public Source License -; * Version 1.0 (the "RPSL") available at -; * http://www.helixcommunity.org/content/rpsl unless you have licensed -; * the file under the RealNetworks Community Source License Version 1.0 -; * (the "RCSL") available at http://www.helixcommunity.org/content/rcsl, -; * in which case the RCSL will apply. You may also obtain the license terms -; * directly from RealNetworks. You may not use this file except in -; * compliance with the RPSL or, if you have a valid RCSL with RealNetworks -; * applicable to this file, the RCSL. Please see the applicable RPSL or -; * RCSL for the rights, obligations and limitations governing use of the -; * contents of the file. -; * -; * This file is part of the Helix DNA Technology. RealNetworks is the -; * developer of the Original Code and owns the copyrights in the portions -; * it created. -; * -; * This file, and the files included with this file, is distributed and made -; * available on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER -; * EXPRESS OR IMPLIED, AND REALNETWORKS HEREBY DISCLAIMS ALL SUCH WARRANTIES, -; * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, FITNESS -; * FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT. -; * -; * Technology Compatibility Kit Test Suite(s) Location: -; * http://www.helixcommunity.org/content/tck -; * -; * Contributor(s): -; * -; * ***** END LICENSE BLOCK ***** */ - - - AREA |.text|, CODE, READONLY - THUMB - REQUIRE8 - PRESERVE8 -; int xmp3_MULSHIFT32(int x, int y) - EXPORT xmp3_MULSHIFT32 - EXPORT xmp3_FASTABS - -;.cpu cortex-m3 -;.fpu softvfp -;.syntax unified -;.thumb -;.text - - ; .global xmp3_MULSHIFT32 - ; .thumb_func -xmp3_MULSHIFT32 PROC - smull r2, r0, r1, r0 -; mov pc, lr // KJ changed to BX for Cortex - BX lr - ENDP - - ;.global xmp3_FASTABS - ;.thumb_func -xmp3_FASTABS PROC - mov r1, r0 - mov r0, #0x0 - eor r0, r1, r1, asr # 31 - sub r0, r0, r1, asr # 31 - bx lr - ENDP - - END \ No newline at end of file diff --git a/bsp/stm32_radio/mp3/real/arm/asmpoly.s b/bsp/stm32_radio/mp3/real/arm/asmpoly.s deleted file mode 100644 index 711d562791..0000000000 --- a/bsp/stm32_radio/mp3/real/arm/asmpoly.s +++ /dev/null @@ -1,428 +0,0 @@ -# * -# * Version: RCSL 1.0/RPSL 1.0 -# * -# * Portions Copyright (c) 1995-2002 RealNetworks, Inc. All Rights Reserved. -# * -# * The contents of this file, and the files included with this file, are -# * subject to the current version of the RealNetworks Public Source License -# * Version 1.0 (the "RPSL") available at -# * http://www.helixcommunity.org/content/rpsl unless you have licensed -# * the file under the RealNetworks Community Source License Version 1.0 -# * (the "RCSL") available at http://www.helixcommunity.org/content/rcsl, -# * in which case the RCSL will apply. You may also obtain the license terms -# * directly from RealNetworks. You may not use this file except in -# * compliance with the RPSL or, if you have a valid RCSL with RealNetworks -# * applicable to this file, the RCSL. Please see the applicable RPSL or -# * RCSL for the rights, obligations and limitations governing use of the -# * contents of the file. -# * -# * This file is part of the Helix DNA Technology. RealNetworks is the -# * developer of the Original Code and owns the copyrights in the portions -# * it created. -# * -# * This file, and the files included with this file, is distributed and made -# * available on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER -# * EXPRESS OR IMPLIED, AND REALNETWORKS HEREBY DISCLAIMS ALL SUCH WARRANTIES, -# * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, FITNESS -# * FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT. -# * -# * Technology Compatibility Kit Test Suite(s) Location: -# * http://www.helixcommunity.org/content/tck -# * -# * Contributor(s): -# * -# * ***** END LICENSE BLOCK ***** */ - -.GLOBAL xmp3_PolyphaseStereo -# * kj AREA |.text|, CODE, READONLY - -PCM .req r0 -VB1 .req r1 -COEF .req r2 - -VLO .req r0 @ must push PCM ptr to stack during inner looop -VHI .req r3 @ temp variable - -SUM1LL .req r4 -SUM1LH .req r5 -SUM2LL .req r6 -SUM2LH .req r7 -SUM1RL .req r8 -SUM1RH .req r9 -SUM2RL .req r10 -SUM2RH .req r11 - -CF1 .req r12 -CF2 .req r14 - -SIGN .req r12 @ used for clipping - after discarding CF1 -MAXPOS .req r14 @ used for clipping - after discarding CF2 - -I .req r12 @ overlay loop counter with CF1, SIGN - - GBLA RNDVAL -#RNDVAL SETA (1 << ((32 - 12) + (6 - 1))) - .set RNDVAL,(1 << ((32 - 12) + (6 - 1))) - - # C64TOS - clip 64-bit accumulator to short (no rounding) - # xl, xh = value (lo 32, hi 32) - # input assumed to have 6 fraction bits - # sign = temp variable to use for sign - # maxPos = 0x00007fff (takes 2 instr. to generate - calculating - # once and using repeatedly saves if you do several CTOS in a row) - MACRO - C64TOS $xl, $xh, $sign, $maxPos - - mov $xl, $xl, lsr #(20+6) - orr $xl, $xl, $xh, lsl #(12-6) - mov $sign, $xl, ASR #31 - cmp $sign, $xl, ASR #15 - eorne $xl, $sign, $maxPos - - MEND @ C64TOS - - # MC0S - process 2 taps, 1 sample per channel (sample 0) - # x = vb1 offset - MACRO - MC0S $x - - ldr CF1, [COEF], #4 - ldr CF2, [COEF], #4 - ldr VLO, [VB1, #(4*($x))] - ldr VHI, [VB1, #(4*(23 - $x))] - - smlal SUM1LL, SUM1LH, VLO, CF1 - ldr VLO, [VB1, #(4*(32 + $x))] - rsb CF2, CF2, #0 - smlal SUM1LL, SUM1LH, VHI, CF2 - ldr VHI, [VB1, #(4*(32 + 23 - $x))] - - smlal SUM1RL, SUM1RH, VLO, CF1 - smlal SUM1RL, SUM1RH, VHI, CF2 - - MEND @ MC0S - - # MC1S - process 2 taps, 1 sample per channel (sample 16) - # x = vb1 offset - MACRO - MC1S $x - - ldr CF1, [COEF], #4 - ldr VLO, [VB1, #(4*($x))] - ldr VHI, [VB1, #(4*(32 + $x))] - smlal SUM1LL, SUM1LH, VLO, CF1 - smlal SUM1RL, SUM1RH, VHI, CF1 - - MEND @ MC1S - - # MC2S - process 2 taps, 2 samples per channel - # x = vb1 offset - MACRO - MC2S $x - - # load data as far as possible in advance of using it - ldr CF1, [COEF], #4 - ldr CF2, [COEF], #4 - ldr VLO, [VB1, #(4*($x))] - ldr VHI, [VB1, #(4*(23 - $x))] - - smlal SUM1LL, SUM1LH, VLO, CF1 - smlal SUM2LL, SUM2LH, VLO, CF2 - rsb CF2, CF2, #0 - smlal SUM2LL, SUM2LH, VHI, CF1 - smlal SUM1LL, SUM1LH, VHI, CF2 - - ldr VHI, [VB1, #(4*(32 + 23 - $x))] - ldr VLO, [VB1, #(4*(32 + $x))] - - smlal SUM1RL, SUM1RH, VHI, CF2 - smlal SUM2RL, SUM2RH, VHI, CF1 - rsb CF2, CF2, #0 - smlal SUM1RL, SUM1RH, VLO, CF1 - smlal SUM2RL, SUM2RH, VLO, CF2 - - MEND @ MC2S - -# void PolyphaseStereo(short *pcm, int *vbuf, const int *coefBase) - -xmp3_PolyphaseStereo FUNCTION - EXPORT xmp3_PolyphaseStereo - - stmfd sp!, {r4-r11, r14} @ Push to stack - - # clear out stack space for 2 local variables (4 bytes each) - sub sp, sp, #8 - str PCM, [sp, #4] @ sp[1] = pcm pointer - - # special case, output sample 0 - mov SUM1LL, #RNDVAL @ load rndVal (low 32) - mov SUM1RL, #RNDVAL @ load rndVal (low 32) - mov SUM1LH, #0 - mov SUM1RH, #0 - - MC0S 0 - MC0S 1 - MC0S 2 - MC0S 3 - MC0S 4 - MC0S 5 - MC0S 6 - MC0S 7 - - ldr PCM, [sp, #4] @ load pcm pointer - mov MAXPOS, #0x7f00 - orr MAXPOS, MAXPOS, #0xff - - C64TOS SUM1LL, SUM1LH, SIGN, MAXPOS - C64TOS SUM1RL, SUM1RH, SIGN, MAXPOS - - strh SUM1LL, [PCM, #(2*0)] - strh SUM1RL, [PCM, #(2*1)] - - # special case, output sample 16 - add COEF, COEF, #(4*(256-16)) @ coef = coefBase + 256 (was coefBase + 16 after MC0S block) - add VB1, VB1, #(4*1024) @ vb1 = vbuf + 64*16 - - mov SUM1LL, #RNDVAL @ load rndVal (low 32) - mov SUM1RL, #RNDVAL @ load rndVal (low 32) - mov SUM1LH, #0 - mov SUM1RH, #0 - - MC1S 0 - MC1S 1 - MC1S 2 - MC1S 3 - MC1S 4 - MC1S 5 - MC1S 6 - MC1S 7 - - ldr PCM, [sp, #4] @ load pcm pointer - mov MAXPOS, #0x7f00 - orr MAXPOS, MAXPOS, #0xff - - C64TOS SUM1LL, SUM1LH, SIGN, MAXPOS - C64TOS SUM1RL, SUM1RH, SIGN, MAXPOS - - strh SUM1LL, [PCM, #(2*(2*16+0))] - strh SUM1RL, [PCM, #(2*(2*16+1))] - - # main convolution loop: sum1L = samples 1, 2, 3, ... 15 sum2L = samples 31, 30, ... 17 - sub COEF, COEF, #(4*(264-16)) @ coef = coefBase + 16 (was coefBase + 264 after MC1S block) - sub VB1, VB1, #(4*(1024-64)) @ vb1 = vbuf + 64 (was vbuf + 64*16 after MC1S block) - mov I, #15 @ loop counter, count down - add PCM, PCM, #(2*2) @ pcm+=2 - -LoopPS - str I, [sp, #0] @ sp[0] = i (loop counter) - str PCM, [sp, #4] @ sp[1] = pcm (pointer to pcm buffer) - - mov SUM1LL, #RNDVAL @ load rndVal (low 32) - mov SUM1RL, #RNDVAL @ load rndVal (low 32) - mov SUM2LL, #RNDVAL @ load rndVal (low 32) - mov SUM2RL, #RNDVAL @ load rndVal (low 32) - - mov SUM1LH, #0 - mov SUM1RH, #0 - mov SUM2LH, #0 - mov SUM2RH, #0 - - MC2S 0 - MC2S 1 - MC2S 2 - MC2S 3 - MC2S 4 - MC2S 5 - MC2S 6 - MC2S 7 - - add VB1, VB1, #(4*64) @ vb1 += 64 - - ldr PCM, [sp, #4] @ load pcm pointer - mov MAXPOS, #0x7f00 - orr MAXPOS, MAXPOS, #0xff - - - - #C64TOS $xl, $xh, $sign, $maxPos - -# mov SUM1LL, SUM1LL, lsr #(20+6) -# orr SUM1LL, SUM1LL, SUM1LH, lsl #(12-6) -# mov SIGN, SUM1LL, ASR #31 -# cmp SIGN, SUM1LL, ASR #15 -# eorne SUM1LL,SIGN, MAXPOS - - - C64TOS SUM1LL, SUM1LH, SIGN, MAXPOS - C64TOS SUM1RL, SUM1RH, SIGN, MAXPOS - C64TOS SUM2LL, SUM2LH, SIGN, MAXPOS - C64TOS SUM2RL, SUM2RH, SIGN, MAXPOS - - ldr I, [sp, #0] @ load loop counter - add CF2, PCM, I, lsl #3 @ CF2 = PCM + 4*i (short offset) - strh SUM2LL, [CF2], #2 @ *(pcm + 2*2*i + 0) - strh SUM2RL, [CF2], #2 @ *(pcm + 2*2*i + 1) - - strh SUM1LL, [PCM], #2 @ *(pcm + 0) - strh SUM1RL, [PCM], #2 @ *(pcm + 1) - - subs I, I, #1 - bne LoopPS - - # restore stack pointer - add sp, sp, #8 - - ldmfd sp!, {r4-r11, pc} - ENDFUNC - -## MONO PROCESSING - - # MC0M - process 2 taps, 1 sample (sample 0) - # x = vb1 offset - MACRO - MC0M $x - - ldr CF1, [COEF], #4 - ldr CF2, [COEF], #4 - ldr VLO, [VB1, #(4*($x))] - ldr VHI, [VB1, #(4*(23 - $x))] - - rsb CF2, CF2, #0 - smlal SUM1LL, SUM1LH, VLO, CF1 - smlal SUM1LL, SUM1LH, VHI, CF2 - - MEND @ MC0M - - # MC1M - process 2 taps, 1 sample (sample 16) - # x = vb1 offset - MACRO - MC1M $x - - ldr CF1, [COEF], #4 - ldr VLO, [VB1, #(4*($x))] - smlal SUM1LL, SUM1LH, VLO, CF1 - - MEND @ MC1M - - # MC2M - process 2 taps, 2 samples - # x = vb1 offset - MACRO - MC2M $x - - # load data as far as possible in advance of using it - ldr CF1, [COEF], #4 - ldr CF2, [COEF], #4 - ldr VLO, [VB1, #(4*($x))] - ldr VHI, [VB1, #(4*(23 - $x))] - - smlal SUM1LL, SUM1LH, VLO, CF1 - smlal SUM2LL, SUM2LH, VLO, CF2 - rsb CF2, CF2, #0 - smlal SUM1LL, SUM1LH, VHI, CF2 - smlal SUM2LL, SUM2LH, VHI, CF1 - - MEND @ MC2M - -# void PolyphaseMono(short *pcm, int *vbuf, const int *coefBase) - -xmp3_PolyphaseMono FUNCTION - EXPORT xmp3_PolyphaseMono - - stmfd sp!, {r4-r11, r14} - - # clear out stack space for 4 local variables (4 bytes each) - sub sp, sp, #8 - str PCM, [sp, #4] @ sp[1] = pcm pointer - - # special case, output sample 0 - mov SUM1LL, #RNDVAL @ load rndVal (low 32) - mov SUM1LH, #0 - - MC0M 0 - MC0M 1 - MC0M 2 - MC0M 3 - MC0M 4 - MC0M 5 - MC0M 6 - MC0M 7 - - ldr PCM, [sp, #4] @ load pcm pointer - mov MAXPOS, #0x7f00 - orr MAXPOS, MAXPOS, #0xff - - C64TOS SUM1LL, SUM1LH, SIGN, MAXPOS - strh SUM1LL, [PCM, #(2*0)] - - # special case, output sample 16 - add COEF, COEF, #(4*(256-16)) @ coef = coefBase + 256 (was coefBase + 16 after MC0M block) - add VB1, VB1, #(4*1024) @ vb1 = vbuf + 64*16 - - mov SUM1LL, #RNDVAL @ load rndVal (low 32) - mov SUM1LH, #0 - - MC1M 0 - MC1M 1 - MC1M 2 - MC1M 3 - MC1M 4 - MC1M 5 - MC1M 6 - MC1M 7 - - ldr PCM, [sp, #4] @ load pcm pointer - mov MAXPOS, #0x7f00 - orr MAXPOS, MAXPOS, #0xff - - C64TOS SUM1LL, SUM1LH, SIGN, MAXPOS - - strh SUM1LL, [PCM, #(2*16)] - - # main convolution loop: sum1L = samples 1, 2, 3, ... 15 sum2L = samples 31, 30, ... 17 - sub COEF, COEF, #(4*(264-16)) @ coef = coefBase + 16 (was coefBase + 264 after MC1M block) - sub VB1, VB1, #(4*(1024-64)) @ vb1 = vbuf + 64 (was vbuf + 64*16 after MC1M block) - mov I, #15 @ loop counter, count down - add PCM, PCM, #(2) @ pcm++ - -LoopPM - str I, [sp, #0] @ sp[0] = i (loop counter) - str PCM, [sp, #4] @ sp[1] = pcm (pointer to pcm buffer) - - mov SUM1LL, #RNDVAL @ load rndVal (low 32) - mov SUM2LL, #RNDVAL @ load rndVal (low 32) - mov SUM1LH, #0 - mov SUM2LH, #0 - - MC2M 0 - MC2M 1 - MC2M 2 - MC2M 3 - MC2M 4 - MC2M 5 - MC2M 6 - MC2M 7 - - add VB1, VB1, #(4*64) @ vb1 += 64 - - ldr PCM, [sp, #4] @ load pcm pointer - mov MAXPOS, #0x7f00 - orr MAXPOS, MAXPOS, #0xff - - C64TOS SUM1LL, SUM1LH, SIGN, MAXPOS - C64TOS SUM2LL, SUM2LH, SIGN, MAXPOS - - ldr I, [sp, #0] @ load loop counter - add CF2, PCM, I, lsl #2 @ CF2 = PCM + 2*i (short offset) - strh SUM2LL, [CF2], #2 @ *(pcm + 2*i + 0) - strh SUM1LL, [PCM], #2 @ *(pcm + 0) # pcm++ - - subs I, I, #1 - bne LoopPM - - # restore stack pointer - add sp, sp, #8 - - ldmfd sp!, {r4-r11, pc} - ENDFUNC - - .END \ No newline at end of file diff --git a/bsp/stm32_radio/mp3/real/arm/asmpoly_thumb2.s b/bsp/stm32_radio/mp3/real/arm/asmpoly_thumb2.s deleted file mode 100644 index ba95530a6c..0000000000 --- a/bsp/stm32_radio/mp3/real/arm/asmpoly_thumb2.s +++ /dev/null @@ -1,384 +0,0 @@ - AREA |.text|, CODE, READONLY, ALIGN=2 - THUMB - REQUIRE8 - PRESERVE8 - -PCM RN r0 -VB1 RN r1 -COEF RN r2 - -VLO RN r0 -VHI RN r3 - -SUM1LL RN r4 -SUM1LH RN r5 -SUM2LL RN r6 -SUM2LH RN r7 -SUM1RL RN r8 -SUM1RH RN r9 -SUM2RL RN r10 -SUM2RH RN r11 - -CF1 RN r12 -CF2 RN r14 - -SIGN RN r12 -MAXPOS RN r14 - -I RN r12 - - GBLA RNDVAL -RNDVAL SETA (1 << ((32 - 12) + (6 - 1))) - - ; C64TOS - clip 64-bit accumulator to short (no rounding) - ; xl, xh = value (lo 32, hi 32) - ; input assumed to have 6 fraction bits - ; sign = temp variable to use for sign - ; maxPos = 0x00007fff (takes 2 instr. to generate - calculating - ; once and using repeatedly saves if you do several CTOS in a row) */ - MACRO - C64TOS $xl, $xh, $sign, $maxPos - - mov $xl, $xl, lsr #(20+6) - orr $xl, $xl, $xh, lsl #(12-6) - mov $sign, $xl, ASR #31 - cmp $sign, $xl, ASR #15 - it ne - eorne $xl, $sign, $maxPos - MEND ; C64TOS - - ; MC0S - process 2 taps, 1 sample per channel (sample 0) */ - ; x = vb1 offset */ - MACRO - MC0S $x - - ldr CF1, [COEF], #4 - ldr CF2, [COEF], #4 - ldr VLO, [VB1, #(4*($x))] - ldr VHI, [VB1, #(4*(23 - $x))] - - smlal SUM1LL, SUM1LH, VLO, CF1 - ldr VLO, [VB1, #(4*(32 + $x))] - rsb CF2, CF2, #0 - smlal SUM1LL, SUM1LH, VHI, CF2 - ldr VHI, [VB1, #(4*(32 + 23 - $x))] - - smlal SUM1RL, SUM1RH, VLO, CF1 - smlal SUM1RL, SUM1RH, VHI, CF2 - - MEND ; MCOS - - ; MC1S - process 2 taps, 1 sample per channel (sample 16) - ; x = vb1 offset - MACRO - MC1S $x - - ldr CF1, [COEF], #4 - ldr VLO, [VB1, #(4*($x))] - ldr VHI, [VB1, #(4*(32 + $x))] - smlal SUM1LL, SUM1LH, VLO, CF1 - smlal SUM1RL, SUM1RH, VHI, CF1 - - MEND ; MC1S - - ; MC2S - process 2 taps, 2 samples per channel - ; x = vb1 offset - MACRO - MC2S $x - - ; load data as far as possible in advance of using it - ldr CF1, [COEF], #4 - ldr CF2, [COEF], #4 - ldr VLO, [VB1, #(4*($x))] - ldr VHI, [VB1, #(4*(23 - $x))] - - smlal SUM1LL, SUM1LH, VLO, CF1 - smlal SUM2LL, SUM2LH, VLO, CF2 - rsb CF2, CF2, #0 - smlal SUM2LL, SUM2LH, VHI, CF1 - smlal SUM1LL, SUM1LH, VHI, CF2 - - ldr VHI, [VB1, #(4*(32 + 23 - $x))] - ldr VLO, [VB1, #(4*(32 + $x))] - - smlal SUM1RL, SUM1RH, VHI, CF2 - smlal SUM2RL, SUM2RH, VHI, CF1 - rsb CF2, CF2, #0 - smlal SUM1RL, SUM1RH, VLO, CF1 - smlal SUM2RL, SUM2RH, VLO, CF2 - - MEND ; MC2S - - -; void PolyphaseStereo(short *pcm, int *vbuf, const int *coefBase) -xmp3_PolyphaseStereo PROC - EXPORT xmp3_PolyphaseStereo - - stmfd sp!, {r4-r11, r14} - - ; clear out stack space for 2 local variables (4 bytes each) - sub sp, sp, #8 - str PCM , [sp, #4] ; sp[1] = pcm pointer - - ; special case, output sample 0 - mov SUM1LL, #RNDVAL ; load rndVal (low 32) - mov SUM1RL, #RNDVAL ; load rndVal (low 32) - mov SUM1LH, #0 - mov SUM1RH, #0 - - MC0S 0 - MC0S 1 - MC0S 2 - MC0S 3 - MC0S 4 - MC0S 5 - MC0S 6 - MC0S 7 - - ldr PCM, [sp, #4] ; load pcm pointer - mov MAXPOS, #0x7f00 - orr MAXPOS, MAXPOS, #0xff - - C64TOS SUM1LL, SUM1LH, SIGN, MAXPOS - C64TOS SUM1RL, SUM1RH, SIGN, MAXPOS - - strh SUM1LL, [PCM, #(2*0)] - strh SUM1RL, [PCM, #(2*1)] - - ; special case, output sample 16 - add COEF, COEF, #(4*(256-16)) ; coef = coefBase + 256 (was coefBase + 16 after MC0S block) - add VB1, VB1, #(4*1024) ; vb1 = vbuf + 64*16 - - mov SUM1LL, #RNDVAL ; load rndVal (low 32) - mov SUM1RL, #RNDVAL ; load rndVal (low 32) - mov SUM1LH, #0 - mov SUM1RH, #0 - - MC1S 0 - MC1S 1 - MC1S 2 - MC1S 3 - MC1S 4 - MC1S 5 - MC1S 6 - MC1S 7 - - ldr PCM, [sp, #4] ; load pcm pointer - mov MAXPOS, #0x7f00 - orr MAXPOS, MAXPOS, #0xff - - C64TOS SUM1LL, SUM1LH, SIGN, MAXPOS - C64TOS SUM1RL, SUM1RH, SIGN, MAXPOS - - strh SUM1LL, [PCM, #(2*(2*16+0))] - strh SUM1RL, [PCM, #(2*(2*16+1))] - - ; main convolution loop: sum1L = samples 1, 2, 3, ... 15 sum2L = samples 31, 30, ... 17 - sub COEF, COEF, #(4*(264-16)) ; coef = coefBase + 16 (was coefBase + 264 after MC1S block) - sub VB1, VB1, #(4*(1024-64)) ; vb1 = vbuf + 64 (was vbuf + 64*16 after MC1S block) - mov I, #15 ; loop counter, count down - add PCM, PCM, #(2*2) ; pcm+=2 - -LoopPS - str I, [sp, #0] ; sp[0] = i (loop counter) - str PCM, [sp, #4] ; sp[1] = pcm (pointer to pcm buffer) - - mov SUM1LL, #RNDVAL ; load rndVal (low 32) - mov SUM1RL, #RNDVAL ; load rndVal (low 32) - mov SUM2LL, #RNDVAL ; load rndVal (low 32) - mov SUM2RL, #RNDVAL ; load rndVal (low 32) - - mov SUM1LH, #0 - mov SUM1RH, #0 - mov SUM2LH, #0 - mov SUM2RH, #0 - - MC2S 0 - MC2S 1 - MC2S 2 - MC2S 3 - MC2S 4 - MC2S 5 - MC2S 6 - MC2S 7 - - add VB1, VB1, #(4*64) ; vb1 += 64 - - ldr PCM, [sp, #4] ; load pcm pointer - mov MAXPOS, #0x7f00 - orr MAXPOS, MAXPOS, #0xff - - C64TOS SUM1LL, SUM1LH, SIGN, MAXPOS - C64TOS SUM1RL, SUM1RH, SIGN, MAXPOS - C64TOS SUM2LL, SUM2LH, SIGN, MAXPOS - C64TOS SUM2RL, SUM2RH, SIGN, MAXPOS - - ldr I, [sp, #0] ; load loop counter - add CF2, PCM, I, lsl #3 ; CF2 = PCM + 4*i (short offset) - strh SUM2LL, [CF2], #2 ; *(pcm + 2*2*i + 0) - strh SUM2RL, [CF2], #2 ; *(pcm + 2*2*i + 1) - - strh SUM1LL, [PCM], #2 ; *(pcm + 0) - strh SUM1RL, [PCM], #2 ; *(pcm + 1) - - subs I, I, #1 - bne LoopPS - - ; restore stack pointer - add sp, sp, #8 - - ldmfd sp!, {r4-r11, pc} - - ENDP - -; MONO PROCESSING - - ; MC0M - process 2 taps, 1 sample (sample 0) - ; x = vb1 offset - MACRO - MC0M $x - - ldr CF1, [COEF], #4 - ldr CF2, [COEF], #4 - ldr VLO, [VB1, #(4*($x))] - ldr VHI, [VB1, #(4*(23 - $x))] - - rsb CF2, CF2, #0 - smlal SUM1LL, SUM1LH, VLO, CF1 - smlal SUM1LL, SUM1LH, VHI, CF2 - - MEND ; MC0M - - ; MC1M - process 2 taps, 1 sample (sample 16) - ; x = vb1 offset - MACRO - MC1M $x - - ldr CF1, [COEF], #4 - ldr VLO, [VB1, #(4*($x))] - smlal SUM1LL, SUM1LH, VLO, CF1 - - MEND ; MC1M - - ; MC2M - process 2 taps, 2 samples - ; x = vb1 offset - MACRO - MC2M $x - - ; load data as far as possible in advance of using it - ldr CF1, [COEF], #4 - ldr CF2, [COEF], #4 - ldr VLO, [VB1, #(4*($x))] - ldr VHI, [VB1, #(4*(23 - $x))] - - smlal SUM1LL, SUM1LH, VLO, CF1 - smlal SUM2LL, SUM2LH, VLO, CF2 - rsb CF2, CF2, #0 - smlal SUM1LL, SUM1LH, VHI, CF2 - smlal SUM2LL, SUM2LH, VHI, CF1 - - MEND ; MC2M - -; void PolyphaseMono(short *pcm, int *vbuf, const int *coefBase) - -xmp3_PolyphaseMono PROC - EXPORT xmp3_PolyphaseMono - - stmfd sp!, {r4-r11, r14} - - ; clear out stack space for 4 local variables (4 bytes each) - sub sp, sp, #8 - str PCM, [sp, #4] ; sp[1] = pcm pointer - - ; special case, output sample 0 - mov SUM1LL, #RNDVAL ; load rndVal (low 32) - mov SUM1LH, #0 - - MC0M 0 - MC0M 1 - MC0M 2 - MC0M 3 - MC0M 4 - MC0M 5 - MC0M 6 - MC0M 7 - - ldr PCM, [sp, #4] ; load pcm pointer - mov MAXPOS, #0x7f00 - orr MAXPOS, MAXPOS, #0xff - - C64TOS SUM1LL, SUM1LH, SIGN, MAXPOS - strh SUM1LL, [PCM, #(2*0)] - - ; special case, output sample 16 - add COEF, COEF, #(4*(256-16)) ; coef = coefBase + 256 (was coefBase + 16 after MC0M block) - add VB1, VB1, #(4*1024) ; vb1 = vbuf + 64*16 - - mov SUM1LL, #RNDVAL ; load rndVal (low 32) - mov SUM1LH, #0 - - MC1M 0 - MC1M 1 - MC1M 2 - MC1M 3 - MC1M 4 - MC1M 5 - MC1M 6 - MC1M 7 - - ldr PCM, [sp, #4] ; load pcm pointer - mov MAXPOS, #0x7f00 - orr MAXPOS, MAXPOS, #0xff - - C64TOS SUM1LL, SUM1LH, SIGN, MAXPOS - - strh SUM1LL, [PCM, #(2*16)] - - ; main convolution loop: sum1L = samples 1, 2, 3, ... 15 sum2L = samples 31, 30, ... 17 - sub COEF, COEF, #(4*(264-16)) ; coef = coefBase + 16 (was coefBase + 264 after MC1M block) - sub VB1, VB1, #(4*(1024-64)) ; vb1 = vbuf + 64 (was vbuf + 64*16 after MC1M block) - mov I, #15 ; loop counter, count down - add PCM, PCM, #(2) ; pcm++ - -LoopPM - str I, [sp, #0] ; sp[0] = i (loop counter) - str PCM, [sp, #4] ; sp[1] = pcm (pointer to pcm buffer) - - mov SUM1LL, #RNDVAL ; load rndVal (low 32) - mov SUM2LL, #RNDVAL ; load rndVal (low 32) - mov SUM1LH, #0 - mov SUM2LH, #0 - - MC2M 0 - MC2M 1 - MC2M 2 - MC2M 3 - MC2M 4 - MC2M 5 - MC2M 6 - MC2M 7 - - add VB1, VB1, #(4*64) ; vb1 += 64 - - ldr PCM, [sp, #4] ; load pcm pointer - mov MAXPOS, #0x7f00 - orr MAXPOS, MAXPOS, #0xff - - C64TOS SUM1LL, SUM1LH, SIGN, MAXPOS - C64TOS SUM2LL, SUM2LH, SIGN, MAXPOS - - ldr I, [sp, #0] ; load loop counter*/ - add CF2, PCM, I, lsl #2 ; CF2 = PCM + 2*i (short offset)*/ - strh SUM2LL, [CF2], #2 ; (pcm + 2*i + 0) - strh SUM1LL, [PCM], #2 ; (pcm + 0) ; pcm++ - - subs I, I, #1 - bne LoopPM - - ; restore stack pointer - add sp, sp, #8 - - ldmfd sp!, {r4-r11, pc} - ENDP - - END diff --git a/bsp/stm32_radio/mp3/real/assembly.h b/bsp/stm32_radio/mp3/real/assembly.h deleted file mode 100644 index 0a3c68444e..0000000000 --- a/bsp/stm32_radio/mp3/real/assembly.h +++ /dev/null @@ -1,282 +0,0 @@ -/* ***** BEGIN LICENSE BLOCK ***** - * Version: RCSL 1.0/RPSL 1.0 - * - * Portions Copyright (c) 1995-2002 RealNetworks, Inc. All Rights Reserved. - * - * The contents of this file, and the files included with this file, are - * subject to the current version of the RealNetworks Public Source License - * Version 1.0 (the "RPSL") available at - * http://www.helixcommunity.org/content/rpsl unless you have licensed - * the file under the RealNetworks Community Source License Version 1.0 - * (the "RCSL") available at http://www.helixcommunity.org/content/rcsl, - * in which case the RCSL will apply. You may also obtain the license terms - * directly from RealNetworks. You may not use this file except in - * compliance with the RPSL or, if you have a valid RCSL with RealNetworks - * applicable to this file, the RCSL. Please see the applicable RPSL or - * RCSL for the rights, obligations and limitations governing use of the - * contents of the file. - * - * This file is part of the Helix DNA Technology. RealNetworks is the - * developer of the Original Code and owns the copyrights in the portions - * it created. - * - * This file, and the files included with this file, is distributed and made - * available on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER - * EXPRESS OR IMPLIED, AND REALNETWORKS HEREBY DISCLAIMS ALL SUCH WARRANTIES, - * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, FITNESS - * FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT. - * - * Technology Compatibility Kit Test Suite(s) Location: - * http://www.helixcommunity.org/content/tck - * - * Contributor(s): - * - * ***** END LICENSE BLOCK ***** */ - -/************************************************************************************** - * Fixed-point MP3 decoder - * Jon Recker (jrecker@real.com), Ken Cooke (kenc@real.com) - * June 2003 - * - * assembly.h - assembly language functions and prototypes for supported platforms - * - * - inline rountines with access to 64-bit multiply results - * - x86 (_WIN32) and ARM (ARM_ADS, _WIN32_WCE) versions included - * - some inline functions are mix of asm and C for speed - * - some functions are in native asm files, so only the prototype is given here - * - * MULSHIFT32(x, y) signed multiply of two 32-bit integers (x and y), returns top 32 bits of 64-bit result - * FASTABS(x) branchless absolute value of signed integer x - * CLZ(x) count leading zeros in x - * MADD64(sum, x, y) (Windows only) sum [64-bit] += x [32-bit] * y [32-bit] - * SHL64(sum, x, y) (Windows only) 64-bit left shift using __int64 - * SAR64(sum, x, y) (Windows only) 64-bit right shift using __int64 - */ - -#ifndef _ASSEMBLY_H -#define _ASSEMBLY_H - -#if (defined _WIN32 && !defined _WIN32_WCE) || (defined __WINS__ && defined _SYMBIAN) || defined(_OPENWAVE_SIMULATOR) || defined(WINCE_EMULATOR) /* Symbian emulator for Ix86 */ - -#pragma warning( disable : 4035 ) /* complains about inline asm not returning a value */ - -static __inline int MULSHIFT32(int x, int y) -{ - __asm { - mov eax, x - imul y - mov eax, edx - } -} - -static __inline int FASTABS(int x) -{ - int sign; - - sign = x >> (sizeof(int) * 8 - 1); - x ^= sign; - x -= sign; - - return x; -} - -static __inline int CLZ(int x) -{ - int numZeros; - - if (!x) - return (sizeof(int) * 8); - - numZeros = 0; - while (!(x & 0x80000000)) { - numZeros++; - x <<= 1; - } - - return numZeros; -} - -/* MADD64, SHL64, SAR64: - * write in assembly to avoid dependency on run-time lib for 64-bit shifts, muls - * (sometimes compiler thunks to function calls instead of code generating) - * required for Symbian emulator - */ -#ifdef __CW32__ -typedef long long Word64; -#else -typedef __int64 Word64; -#endif - -static __inline Word64 MADD64(Word64 sum, int x, int y) -{ - unsigned int sumLo = ((unsigned int *)&sum)[0]; - int sumHi = ((int *)&sum)[1]; - - __asm { - mov eax, x - imul y - add eax, sumLo - adc edx, sumHi - } - - /* equivalent to return (sum + ((__int64)x * y)); */ -} - -static __inline Word64 SHL64(Word64 x, int n) -{ - unsigned int xLo = ((unsigned int *)&x)[0]; - int xHi = ((int *)&x)[1]; - unsigned char nb = (unsigned char)n; - - if (n < 32) { - __asm { - mov edx, xHi - mov eax, xLo - mov cl, nb - shld edx, eax, cl - shl eax, cl - } - } else if (n < 64) { - /* shl masks cl to 0x1f */ - __asm { - mov edx, xLo - mov cl, nb - xor eax, eax - shl edx, cl - } - } else { - __asm { - xor edx, edx - xor eax, eax - } - } -} - -static __inline Word64 SAR64(Word64 x, int n) -{ - unsigned int xLo = ((unsigned int *)&x)[0]; - int xHi = ((int *)&x)[1]; - unsigned char nb = (unsigned char)n; - - if (n < 32) { - __asm { - mov edx, xHi - mov eax, xLo - mov cl, nb - shrd eax, edx, cl - sar edx, cl - } - } else if (n < 64) { - /* sar masks cl to 0x1f */ - __asm { - mov edx, xHi - mov eax, xHi - mov cl, nb - sar edx, 31 - sar eax, cl - } - } else { - __asm { - sar xHi, 31 - mov eax, xHi - mov edx, xHi - } - } -} - -#elif (defined _WIN32) && (defined _WIN32_WCE) - -/* use asm function for now (EVC++ 3.0 does horrible job compiling __int64 version) */ -#define MULSHIFT32 xmp3_MULSHIFT32 -int MULSHIFT32(int x, int y); - -static __inline int FASTABS(int x) -{ - int sign; - - sign = x >> (sizeof(int) * 8 - 1); - x ^= sign; - x -= sign; - - return x; -} - -static __inline int CLZ(int x) -{ - int numZeros; - - if (!x) - return (sizeof(int) * 8); - - numZeros = 0; - while (!(x & 0x80000000)) { - numZeros++; - x <<= 1; - } - - return numZeros; -} - -#elif defined ARM_ADS - -typedef long long Word64; - -#define MULSHIFT32 xmp3_MULSHIFT32 -extern int MULSHIFT32(int x, int y); - - -#define FASTABS xmp3_FASTABS -int FASTABS(int x); - - -static __inline int CLZ(int x) -{ - int numZeros; - - if (!x) - return (sizeof(int) * 8); - - numZeros = 0; - while (!(x & 0x80000000)) { - numZeros++; - x <<= 1; - } - - return numZeros; -} - -#elif defined(__GNUC__) && defined(ARM) - -typedef long long Word64; - -#define MULSHIFT32 xmp3_MULSHIFT32 -extern int MULSHIFT32(int x, int y); - - -#define FASTABS xmp3_FASTABS -int FASTABS(int x); - - -static __inline int CLZ(int x) -{ - int numZeros; - - if (!x) - return (sizeof(int) * 8); - - numZeros = 0; - while (!(x & 0x80000000)) { - numZeros++; - x <<= 1; - } - - return numZeros; -} - -#else - -#error Unsupported platform in assembly.h - -#endif /* platforms */ - -#endif /* _ASSEMBLY_H */ diff --git a/bsp/stm32_radio/mp3/real/bitstream.c b/bsp/stm32_radio/mp3/real/bitstream.c deleted file mode 100644 index 608c39cc70..0000000000 --- a/bsp/stm32_radio/mp3/real/bitstream.c +++ /dev/null @@ -1,389 +0,0 @@ -/* ***** BEGIN LICENSE BLOCK ***** - * Version: RCSL 1.0/RPSL 1.0 - * - * Portions Copyright (c) 1995-2002 RealNetworks, Inc. All Rights Reserved. - * - * The contents of this file, and the files included with this file, are - * subject to the current version of the RealNetworks Public Source License - * Version 1.0 (the "RPSL") available at - * http://www.helixcommunity.org/content/rpsl unless you have licensed - * the file under the RealNetworks Community Source License Version 1.0 - * (the "RCSL") available at http://www.helixcommunity.org/content/rcsl, - * in which case the RCSL will apply. You may also obtain the license terms - * directly from RealNetworks. You may not use this file except in - * compliance with the RPSL or, if you have a valid RCSL with RealNetworks - * applicable to this file, the RCSL. Please see the applicable RPSL or - * RCSL for the rights, obligations and limitations governing use of the - * contents of the file. - * - * This file is part of the Helix DNA Technology. RealNetworks is the - * developer of the Original Code and owns the copyrights in the portions - * it created. - * - * This file, and the files included with this file, is distributed and made - * available on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER - * EXPRESS OR IMPLIED, AND REALNETWORKS HEREBY DISCLAIMS ALL SUCH WARRANTIES, - * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, FITNESS - * FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT. - * - * Technology Compatibility Kit Test Suite(s) Location: - * http://www.helixcommunity.org/content/tck - * - * Contributor(s): - * - * ***** END LICENSE BLOCK ***** */ - -/************************************************************************************** - * Fixed-point MP3 decoder - * Jon Recker (jrecker@real.com), Ken Cooke (kenc@real.com) - * June 2003 - * - * bitstream.c - bitstream unpacking, frame header parsing, side info parsing - **************************************************************************************/ - -#include "coder.h" -#include "assembly.h" - -/************************************************************************************** - * Function: SetBitstreamPointer - * - * Description: initialize bitstream reader - * - * Inputs: pointer to BitStreamInfo struct - * number of bytes in bitstream - * pointer to byte-aligned buffer of data to read from - * - * Outputs: filled bitstream info struct - * - * Return: none - **************************************************************************************/ -void SetBitstreamPointer(BitStreamInfo *bsi, int nBytes, unsigned char *buf) -{ - /* init bitstream */ - bsi->bytePtr = buf; - bsi->iCache = 0; /* 4-byte unsigned int */ - bsi->cachedBits = 0; /* i.e. zero bits in cache */ - bsi->nBytes = nBytes; -} - -/************************************************************************************** - * Function: RefillBitstreamCache - * - * Description: read new data from bitstream buffer into bsi cache - * - * Inputs: pointer to initialized BitStreamInfo struct - * - * Outputs: updated bitstream info struct - * - * Return: none - * - * Notes: only call when iCache is completely drained (resets bitOffset to 0) - * always loads 4 new bytes except when bsi->nBytes < 4 (end of buffer) - * stores data as big-endian in cache, regardless of machine endian-ness - * - * TODO: optimize for ARM - * possibly add little/big-endian modes for doing 32-bit loads - **************************************************************************************/ -static __inline void RefillBitstreamCache(BitStreamInfo *bsi) -{ - int nBytes = bsi->nBytes; - - /* optimize for common case, independent of machine endian-ness */ - if (nBytes >= 4) { - bsi->iCache = (*bsi->bytePtr++) << 24; - bsi->iCache |= (*bsi->bytePtr++) << 16; - bsi->iCache |= (*bsi->bytePtr++) << 8; - bsi->iCache |= (*bsi->bytePtr++); - bsi->cachedBits = 32; - bsi->nBytes -= 4; - } else { - bsi->iCache = 0; - while (nBytes--) { - bsi->iCache |= (*bsi->bytePtr++); - bsi->iCache <<= 8; - } - bsi->iCache <<= ((3 - bsi->nBytes)*8); - bsi->cachedBits = 8*bsi->nBytes; - bsi->nBytes = 0; - } -} - -/************************************************************************************** - * Function: GetBits - * - * Description: get bits from bitstream, advance bitstream pointer - * - * Inputs: pointer to initialized BitStreamInfo struct - * number of bits to get from bitstream - * - * Outputs: updated bitstream info struct - * - * Return: the next nBits bits of data from bitstream buffer - * - * Notes: nBits must be in range [0, 31], nBits outside this range masked by 0x1f - * for speed, does not indicate error if you overrun bit buffer - * if nBits = 0, returns 0 (useful for scalefactor unpacking) - * - * TODO: optimize for ARM - **************************************************************************************/ -unsigned int GetBits(BitStreamInfo *bsi, int nBits) -{ - unsigned int data, lowBits; - - nBits &= 0x1f; /* nBits mod 32 to avoid unpredictable results like >> by negative amount */ - data = bsi->iCache >> (31 - nBits); /* unsigned >> so zero-extend */ - data >>= 1; /* do as >> 31, >> 1 so that nBits = 0 works okay (returns 0) */ - bsi->iCache <<= nBits; /* left-justify cache */ - bsi->cachedBits -= nBits; /* how many bits have we drawn from the cache so far */ - - /* if we cross an int boundary, refill the cache */ - if (bsi->cachedBits < 0) { - lowBits = -bsi->cachedBits; - RefillBitstreamCache(bsi); - data |= bsi->iCache >> (32 - lowBits); /* get the low-order bits */ - - bsi->cachedBits -= lowBits; /* how many bits have we drawn from the cache so far */ - bsi->iCache <<= lowBits; /* left-justify cache */ - } - - return data; -} - -/************************************************************************************** - * Function: CalcBitsUsed - * - * Description: calculate how many bits have been read from bitstream - * - * Inputs: pointer to initialized BitStreamInfo struct - * pointer to start of bitstream buffer - * bit offset into first byte of startBuf (0-7) - * - * Outputs: none - * - * Return: number of bits read from bitstream, as offset from startBuf:startOffset - **************************************************************************************/ -int CalcBitsUsed(BitStreamInfo *bsi, unsigned char *startBuf, int startOffset) -{ - int bitsUsed; - - bitsUsed = (bsi->bytePtr - startBuf) * 8; - bitsUsed -= bsi->cachedBits; - bitsUsed -= startOffset; - - return bitsUsed; -} - -/************************************************************************************** - * Function: CheckPadBit - * - * Description: check whether padding byte is present in an MP3 frame - * - * Inputs: MP3DecInfo struct with valid FrameHeader struct - * (filled by UnpackFrameHeader()) - * - * Outputs: none - * - * Return: 1 if pad bit is set, 0 if not, -1 if null input pointer - **************************************************************************************/ -int CheckPadBit(MP3DecInfo *mp3DecInfo) -{ - FrameHeader *fh; - - /* validate pointers */ - if (!mp3DecInfo || !mp3DecInfo->FrameHeaderPS) - return -1; - - fh = ((FrameHeader *)(mp3DecInfo->FrameHeaderPS)); - - return (fh->paddingBit ? 1 : 0); -} - -/************************************************************************************** - * Function: UnpackFrameHeader - * - * Description: parse the fields of the MP3 frame header - * - * Inputs: buffer pointing to a complete MP3 frame header (4 bytes, plus 2 if CRC) - * - * Outputs: filled frame header info in the MP3DecInfo structure - * updated platform-specific FrameHeader struct - * - * Return: length (in bytes) of frame header (for caller to calculate offset to - * first byte following frame header) - * -1 if null frameHeader or invalid header - * - * TODO: check for valid modes, depending on capabilities of decoder - * test CRC on actual stream (verify no endian problems) - **************************************************************************************/ -int UnpackFrameHeader(MP3DecInfo *mp3DecInfo, unsigned char *buf) -{ - - int verIdx; - FrameHeader *fh; - - /* validate pointers and sync word */ - if (!mp3DecInfo || !mp3DecInfo->FrameHeaderPS || (buf[0] & SYNCWORDH) != SYNCWORDH || (buf[1] & SYNCWORDL) != SYNCWORDL) - return -1; - - fh = ((FrameHeader *)(mp3DecInfo->FrameHeaderPS)); - - /* read header fields - use bitmasks instead of GetBits() for speed, since format never varies */ - verIdx = (buf[1] >> 3) & 0x03; - fh->ver = (MPEGVersion)( verIdx == 0 ? MPEG25 : ((verIdx & 0x01) ? MPEG1 : MPEG2) ); - fh->layer = 4 - ((buf[1] >> 1) & 0x03); /* easy mapping of index to layer number, 4 = error */ - fh->crc = 1 - ((buf[1] >> 0) & 0x01); - fh->brIdx = (buf[2] >> 4) & 0x0f; - fh->srIdx = (buf[2] >> 2) & 0x03; - fh->paddingBit = (buf[2] >> 1) & 0x01; - fh->privateBit = (buf[2] >> 0) & 0x01; - fh->sMode = (StereoMode)((buf[3] >> 6) & 0x03); /* maps to correct enum (see definition) */ - fh->modeExt = (buf[3] >> 4) & 0x03; - fh->copyFlag = (buf[3] >> 3) & 0x01; - fh->origFlag = (buf[3] >> 2) & 0x01; - fh->emphasis = (buf[3] >> 0) & 0x03; - - /* check parameters to avoid indexing tables with bad values */ - if (fh->srIdx == 3 || fh->layer == 4 || fh->brIdx == 15) - return -1; - - fh->sfBand = &sfBandTable[fh->ver][fh->srIdx]; /* for readability (we reference sfBandTable many times in decoder) */ - if (fh->sMode != Joint) /* just to be safe (dequant, stproc check fh->modeExt) */ - fh->modeExt = 0; - - /* init user-accessible data */ - mp3DecInfo->nChans = (fh->sMode == Mono ? 1 : 2); - mp3DecInfo->samprate = samplerateTab[fh->ver][fh->srIdx]; - mp3DecInfo->nGrans = (fh->ver == MPEG1 ? NGRANS_MPEG1 : NGRANS_MPEG2); - mp3DecInfo->nGranSamps = ((int)samplesPerFrameTab[fh->ver][fh->layer - 1]) / mp3DecInfo->nGrans; - mp3DecInfo->layer = fh->layer; - mp3DecInfo->version = fh->ver; - - /* get bitrate and nSlots from table, unless brIdx == 0 (free mode) in which case caller must figure it out himself - * question - do we want to overwrite mp3DecInfo->bitrate with 0 each time if it's free mode, and - * copy the pre-calculated actual free bitrate into it in mp3dec.c (according to the spec, - * this shouldn't be necessary, since it should be either all frames free or none free) - */ - if (fh->brIdx) { - mp3DecInfo->bitrate = ((int)bitrateTab[fh->ver][fh->layer - 1][fh->brIdx]) * 1000; - - /* nSlots = total frame bytes (from table) - sideInfo bytes - header - CRC (if present) + pad (if present) */ - mp3DecInfo->nSlots = (int)slotTab[fh->ver][fh->srIdx][fh->brIdx] - - (int)sideBytesTab[fh->ver][(fh->sMode == Mono ? 0 : 1)] - - 4 - (fh->crc ? 2 : 0) + (fh->paddingBit ? 1 : 0); - } - - /* load crc word, if enabled, and return length of frame header (in bytes) */ - if (fh->crc) { - fh->CRCWord = ((int)buf[4] << 8 | (int)buf[5] << 0); - return 6; - } else { - fh->CRCWord = 0; - return 4; - } -} - -/************************************************************************************** - * Function: UnpackSideInfo - * - * Description: parse the fields of the MP3 side info header - * - * Inputs: MP3DecInfo structure filled by UnpackFrameHeader() - * buffer pointing to the MP3 side info data - * - * Outputs: updated mainDataBegin in MP3DecInfo struct - * updated private (platform-specific) SideInfo struct - * - * Return: length (in bytes) of side info data - * -1 if null input pointers - **************************************************************************************/ -int UnpackSideInfo(MP3DecInfo *mp3DecInfo, unsigned char *buf) -{ - int gr, ch, bd, nBytes; - BitStreamInfo bitStreamInfo, *bsi; - FrameHeader *fh; - SideInfo *si; - SideInfoSub *sis; - - /* validate pointers and sync word */ - if (!mp3DecInfo || !mp3DecInfo->FrameHeaderPS || !mp3DecInfo->SideInfoPS) - return -1; - - fh = ((FrameHeader *)(mp3DecInfo->FrameHeaderPS)); - si = ((SideInfo *)(mp3DecInfo->SideInfoPS)); - - bsi = &bitStreamInfo; - if (fh->ver == MPEG1) { - /* MPEG 1 */ - nBytes = (fh->sMode == Mono ? SIBYTES_MPEG1_MONO : SIBYTES_MPEG1_STEREO); - SetBitstreamPointer(bsi, nBytes, buf); - si->mainDataBegin = GetBits(bsi, 9); - si->privateBits = GetBits(bsi, (fh->sMode == Mono ? 5 : 3)); - - for (ch = 0; ch < mp3DecInfo->nChans; ch++) - for (bd = 0; bd < MAX_SCFBD; bd++) - si->scfsi[ch][bd] = GetBits(bsi, 1); - } else { - /* MPEG 2, MPEG 2.5 */ - nBytes = (fh->sMode == Mono ? SIBYTES_MPEG2_MONO : SIBYTES_MPEG2_STEREO); - SetBitstreamPointer(bsi, nBytes, buf); - si->mainDataBegin = GetBits(bsi, 8); - si->privateBits = GetBits(bsi, (fh->sMode == Mono ? 1 : 2)); - } - - for(gr =0; gr < mp3DecInfo->nGrans; gr++) { - for (ch = 0; ch < mp3DecInfo->nChans; ch++) { - sis = &si->sis[gr][ch]; /* side info subblock for this granule, channel */ - - sis->part23Length = GetBits(bsi, 12); - sis->nBigvals = GetBits(bsi, 9); - sis->globalGain = GetBits(bsi, 8); - sis->sfCompress = GetBits(bsi, (fh->ver == MPEG1 ? 4 : 9)); - sis->winSwitchFlag = GetBits(bsi, 1); - - if(sis->winSwitchFlag) { - /* this is a start, stop, short, or mixed block */ - sis->blockType = GetBits(bsi, 2); /* 0 = normal, 1 = start, 2 = short, 3 = stop */ - sis->mixedBlock = GetBits(bsi, 1); /* 0 = not mixed, 1 = mixed */ - sis->tableSelect[0] = GetBits(bsi, 5); - sis->tableSelect[1] = GetBits(bsi, 5); - sis->tableSelect[2] = 0; /* unused */ - sis->subBlockGain[0] = GetBits(bsi, 3); - sis->subBlockGain[1] = GetBits(bsi, 3); - sis->subBlockGain[2] = GetBits(bsi, 3); - - /* TODO - check logic */ - if (sis->blockType == 0) { - /* this should not be allowed, according to spec */ - sis->nBigvals = 0; - sis->part23Length = 0; - sis->sfCompress = 0; - } else if (sis->blockType == 2 && sis->mixedBlock == 0) { - /* short block, not mixed */ - sis->region0Count = 8; - } else { - /* start, stop, or short-mixed */ - sis->region0Count = 7; - } - sis->region1Count = 20 - sis->region0Count; - } else { - /* this is a normal block */ - sis->blockType = 0; - sis->mixedBlock = 0; - sis->tableSelect[0] = GetBits(bsi, 5); - sis->tableSelect[1] = GetBits(bsi, 5); - sis->tableSelect[2] = GetBits(bsi, 5); - sis->region0Count = GetBits(bsi, 4); - sis->region1Count = GetBits(bsi, 3); - } - sis->preFlag = (fh->ver == MPEG1 ? GetBits(bsi, 1) : 0); - sis->sfactScale = GetBits(bsi, 1); - sis->count1TableSelect = GetBits(bsi, 1); - } - } - mp3DecInfo->mainDataBegin = si->mainDataBegin; /* needed by main decode loop */ - - ASSERT(nBytes == CalcBitsUsed(bsi, buf, 0) >> 3); - - return nBytes; -} - diff --git a/bsp/stm32_radio/mp3/real/buffers.c b/bsp/stm32_radio/mp3/real/buffers.c deleted file mode 100644 index 690e5cecc1..0000000000 --- a/bsp/stm32_radio/mp3/real/buffers.c +++ /dev/null @@ -1,220 +0,0 @@ -/* ***** BEGIN LICENSE BLOCK ***** - * Version: RCSL 1.0/RPSL 1.0 - * - * Portions Copyright (c) 1995-2002 RealNetworks, Inc. All Rights Reserved. - * - * The contents of this file, and the files included with this file, are - * subject to the current version of the RealNetworks Public Source License - * Version 1.0 (the "RPSL") available at - * http://www.helixcommunity.org/content/rpsl unless you have licensed - * the file under the RealNetworks Community Source License Version 1.0 - * (the "RCSL") available at http://www.helixcommunity.org/content/rcsl, - * in which case the RCSL will apply. You may also obtain the license terms - * directly from RealNetworks. You may not use this file except in - * compliance with the RPSL or, if you have a valid RCSL with RealNetworks - * applicable to this file, the RCSL. Please see the applicable RPSL or - * RCSL for the rights, obligations and limitations governing use of the - * contents of the file. - * - * This file is part of the Helix DNA Technology. RealNetworks is the - * developer of the Original Code and owns the copyrights in the portions - * it created. - * - * This file, and the files included with this file, is distributed and made - * available on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER - * EXPRESS OR IMPLIED, AND REALNETWORKS HEREBY DISCLAIMS ALL SUCH WARRANTIES, - * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, FITNESS - * FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT. - * - * Technology Compatibility Kit Test Suite(s) Location: - * http://www.helixcommunity.org/content/tck - * - * Contributor(s): - * - * ***** END LICENSE BLOCK ***** */ - -/************************************************************************************** - * Fixed-point MP3 decoder - * Jon Recker (jrecker@real.com), Ken Cooke (kenc@real.com) - * June 2003 - * - * buffers.c - allocation and freeing of internal MP3 decoder buffers - * - * All memory allocation for the codec is done in this file, so if you don't want - * to use other the default system malloc() and free() for heap management this is - * the only file you'll need to change. - **************************************************************************************/ - -// J.Sz. 21/04/2006 #include "hlxclib/stdlib.h" /* for malloc, free */ - - -#include "coder.h" - -#define static_buffers -#ifdef static_buffers -MP3DecInfo mp3DecInfo; // 0x7f0 = 2032 -SubbandInfo sbi; // 0x2204 = 8708 -IMDCTInfo mi; // 0x1b20 = 6944 -HuffmanInfo hi; // 0x1210 = 4624 -DequantInfo di; // 0x348 = 840 -ScaleFactorInfo sfi; // 0x124 = 292 -SideInfo si; // 0x148 = 328 -FrameHeader fh; // 0x38 = 56 -#else -#include -#define malloc rt_malloc -#define free rt_free -#endif - -/************************************************************************************** - * Function: ClearBuffer - * - * Description: fill buffer with 0's - * - * Inputs: pointer to buffer - * number of bytes to fill with 0 - * - * Outputs: cleared buffer - * - * Return: none - * - * Notes: slow, platform-independent equivalent to memset(buf, 0, nBytes) - **************************************************************************************/ -void ClearBuffer(void *buf, int nBytes) -{ - int i; - unsigned char *cbuf = (unsigned char *)buf; - - for (i = 0; i < nBytes; i++) - cbuf[i] = 0; - -} - -/************************************************************************************** - * Function: AllocateBuffers - * - * Description: allocate all the memory needed for the MP3 decoder - * - * Inputs: none - * - * Outputs: none - * - * Return: pointer to MP3DecInfo structure (initialized with pointers to all - * the internal buffers needed for decoding, all other members of - * MP3DecInfo structure set to 0) - * - * Notes: if one or more mallocs fail, function frees any buffers already - * allocated before returning - * - * Changed by Kasper Jepsen to support static buffers as well. - * - **************************************************************************************/ -MP3DecInfo *AllocateBuffers(void) -{ - MP3DecInfo *mp3DecInfo_pointer; - #ifdef static_buffers - mp3DecInfo_pointer = (MP3DecInfo*)&mp3DecInfo; - ClearBuffer((void*)&mp3DecInfo, sizeof(MP3DecInfo)); - - mp3DecInfo.FrameHeaderPS = (void*)&fh; - mp3DecInfo.SideInfoPS = (void*)&si; - mp3DecInfo.ScaleFactorInfoPS = (void*)&sfi; - mp3DecInfo.HuffmanInfoPS = (void*)&hi; - mp3DecInfo.DequantInfoPS = (void*)&di; - mp3DecInfo.IMDCTInfoPS = (void*)&mi; - mp3DecInfo.SubbandInfoPS = (void*)&sbi; - - /* important to do this - DSP primitives assume a bunch of state variables are 0 on first use */ - ClearBuffer((void*)&fh, sizeof(FrameHeader)); - ClearBuffer((void*)&si, sizeof(SideInfo)); - ClearBuffer((void*)&sfi, sizeof(ScaleFactorInfo)); - ClearBuffer((void*)&hi, sizeof(HuffmanInfo)); - ClearBuffer((void*)&di, sizeof(DequantInfo)); - ClearBuffer((void*)&mi, sizeof(IMDCTInfo)); - ClearBuffer((void*)&sbi, sizeof(SubbandInfo)); - // return mp3DecInfo_pointer; - - #else - FrameHeader *fh; - SideInfo *si; - ScaleFactorInfo *sfi; - HuffmanInfo *hi; - DequantInfo *di; - IMDCTInfo *mi; - SubbandInfo *sbi; - - mp3DecInfo_pointer = (MP3DecInfo *)malloc(sizeof(MP3DecInfo)); - if (!mp3DecInfo_pointer) - return 0; - ClearBuffer(mp3DecInfo_pointer, sizeof(MP3DecInfo)); - - fh = (FrameHeader *) malloc(sizeof(FrameHeader)); - si = (SideInfo *) malloc(sizeof(SideInfo)); - sfi = (ScaleFactorInfo *) malloc(sizeof(ScaleFactorInfo)); - hi = (HuffmanInfo *) malloc(sizeof(HuffmanInfo)); - di = (DequantInfo *) malloc(sizeof(DequantInfo)); - mi = (IMDCTInfo *) malloc(sizeof(IMDCTInfo)); - sbi = (SubbandInfo *) malloc(sizeof(SubbandInfo)); - - mp3DecInfo_pointer->FrameHeaderPS = (void *)fh; - mp3DecInfo_pointer->SideInfoPS = (void *)si; - mp3DecInfo_pointer->ScaleFactorInfoPS = (void *)sfi; - mp3DecInfo_pointer->HuffmanInfoPS = (void *)hi; - mp3DecInfo_pointer->DequantInfoPS = (void *)di; - mp3DecInfo_pointer->IMDCTInfoPS = (void *)mi; - mp3DecInfo_pointer->SubbandInfoPS = (void *)sbi; - - if (!fh || !si || !sfi || !hi || !di || !mi || !sbi) { - FreeBuffers(mp3DecInfo_pointer); /* safe to call - only frees memory that was successfully allocated */ - return 0; - } - - /* important to do this - DSP primitives assume a bunch of state variables are 0 on first use */ - //Optimized away.. hmm - ClearBuffer(fh, sizeof(FrameHeader)); - ClearBuffer(si, sizeof(SideInfo)); - ClearBuffer(sfi, sizeof(ScaleFactorInfo)); - ClearBuffer(hi, sizeof(HuffmanInfo)); - ClearBuffer(di, sizeof(DequantInfo)); - ClearBuffer(mi, sizeof(IMDCTInfo)); - ClearBuffer(sbi, sizeof(SubbandInfo)); - -#endif - return mp3DecInfo_pointer; -} - - -#ifndef static_buffers -#define SAFE_FREE(x) {if (x) free(x); (x) = 0;} /* helper macro */ -#endif - -/************************************************************************************** - * Function: FreeBuffers - * - * Description: frees all the memory used by the MP3 decoder - * - * Inputs: pointer to initialized MP3DecInfo structure - * - * Outputs: none - * - * Return: none - * - * Notes: safe to call even if some buffers were not allocated (uses SAFE_FREE) - **************************************************************************************/ -void FreeBuffers(MP3DecInfo *mp3DecInfo) -{ -#ifndef static_buffers - if (!mp3DecInfo) - return; - - SAFE_FREE(mp3DecInfo->FrameHeaderPS); - SAFE_FREE(mp3DecInfo->SideInfoPS); - SAFE_FREE(mp3DecInfo->ScaleFactorInfoPS); - SAFE_FREE(mp3DecInfo->HuffmanInfoPS); - SAFE_FREE(mp3DecInfo->DequantInfoPS); - SAFE_FREE(mp3DecInfo->IMDCTInfoPS); - SAFE_FREE(mp3DecInfo->SubbandInfoPS); - - SAFE_FREE(mp3DecInfo); -#endif -} diff --git a/bsp/stm32_radio/mp3/real/buffers.c.bak b/bsp/stm32_radio/mp3/real/buffers.c.bak deleted file mode 100644 index 7e1af937a2..0000000000 --- a/bsp/stm32_radio/mp3/real/buffers.c.bak +++ /dev/null @@ -1,170 +0,0 @@ -/* ***** BEGIN LICENSE BLOCK ***** - * Version: RCSL 1.0/RPSL 1.0 - * - * Portions Copyright (c) 1995-2002 RealNetworks, Inc. All Rights Reserved. - * - * The contents of this file, and the files included with this file, are - * subject to the current version of the RealNetworks Public Source License - * Version 1.0 (the "RPSL") available at - * http://www.helixcommunity.org/content/rpsl unless you have licensed - * the file under the RealNetworks Community Source License Version 1.0 - * (the "RCSL") available at http://www.helixcommunity.org/content/rcsl, - * in which case the RCSL will apply. You may also obtain the license terms - * directly from RealNetworks. You may not use this file except in - * compliance with the RPSL or, if you have a valid RCSL with RealNetworks - * applicable to this file, the RCSL. Please see the applicable RPSL or - * RCSL for the rights, obligations and limitations governing use of the - * contents of the file. - * - * This file is part of the Helix DNA Technology. RealNetworks is the - * developer of the Original Code and owns the copyrights in the portions - * it created. - * - * This file, and the files included with this file, is distributed and made - * available on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER - * EXPRESS OR IMPLIED, AND REALNETWORKS HEREBY DISCLAIMS ALL SUCH WARRANTIES, - * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, FITNESS - * FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT. - * - * Technology Compatibility Kit Test Suite(s) Location: - * http://www.helixcommunity.org/content/tck - * - * Contributor(s): - * - * ***** END LICENSE BLOCK ***** */ - -/************************************************************************************** - * Fixed-point MP3 decoder - * Jon Recker (jrecker@real.com), Ken Cooke (kenc@real.com) - * June 2003 - * - * buffers.c - allocation and freeing of internal MP3 decoder buffers - * - * All memory allocation for the codec is done in this file, so if you don't want - * to use other the default system malloc() and free() for heap management this is - * the only file you'll need to change. - **************************************************************************************/ - -#include "hlxclib/stdlib.h" /* for malloc, free */ -#include "coder.h" - -/************************************************************************************** - * Function: ClearBuffer - * - * Description: fill buffer with 0's - * - * Inputs: pointer to buffer - * number of bytes to fill with 0 - * - * Outputs: cleared buffer - * - * Return: none - * - * Notes: slow, platform-independent equivalent to memset(buf, 0, nBytes) - **************************************************************************************/ -static void ClearBuffer(void *buf, int nBytes) -{ - int i; - unsigned char *cbuf = (unsigned char *)buf; - - for (i = 0; i < nBytes; i++) - cbuf[i] = 0; - - return; -} - -/************************************************************************************** - * Function: AllocateBuffers - * - * Description: allocate all the memory needed for the MP3 decoder - * - * Inputs: none - * - * Outputs: none - * - * Return: pointer to MP3DecInfo structure (initialized with pointers to all - * the internal buffers needed for decoding, all other members of - * MP3DecInfo structure set to 0) - * - * Notes: if one or more mallocs fail, function frees any buffers already - * allocated before returning - **************************************************************************************/ -MP3DecInfo *AllocateBuffers(void) -{ - MP3DecInfo *mp3DecInfo; - FrameHeader *fh; - SideInfo *si; - ScaleFactorInfo *sfi; - HuffmanInfo *hi; - DequantInfo *di; - IMDCTInfo *mi; - SubbandInfo *sbi; - - mp3DecInfo = (MP3DecInfo *)malloc(sizeof(MP3DecInfo)); - if (!mp3DecInfo) - return 0; - ClearBuffer(mp3DecInfo, sizeof(MP3DecInfo)); - - fh = (FrameHeader *) malloc(sizeof(FrameHeader)); - si = (SideInfo *) malloc(sizeof(SideInfo)); - sfi = (ScaleFactorInfo *) malloc(sizeof(ScaleFactorInfo)); - hi = (HuffmanInfo *) malloc(sizeof(HuffmanInfo)); - di = (DequantInfo *) malloc(sizeof(DequantInfo)); - mi = (IMDCTInfo *) malloc(sizeof(IMDCTInfo)); - sbi = (SubbandInfo *) malloc(sizeof(SubbandInfo)); - - mp3DecInfo->FrameHeaderPS = (void *)fh; - mp3DecInfo->SideInfoPS = (void *)si; - mp3DecInfo->ScaleFactorInfoPS = (void *)sfi; - mp3DecInfo->HuffmanInfoPS = (void *)hi; - mp3DecInfo->DequantInfoPS = (void *)di; - mp3DecInfo->IMDCTInfoPS = (void *)mi; - mp3DecInfo->SubbandInfoPS = (void *)sbi; - - if (!fh || !si || !sfi || !hi || !di || !mi || !sbi) { - FreeBuffers(mp3DecInfo); /* safe to call - only frees memory that was successfully allocated */ - return 0; - } - - /* important to do this - DSP primitives assume a bunch of state variables are 0 on first use */ - ClearBuffer(fh, sizeof(FrameHeader)); - ClearBuffer(si, sizeof(SideInfo)); - ClearBuffer(sfi, sizeof(ScaleFactorInfo)); - ClearBuffer(hi, sizeof(HuffmanInfo)); - ClearBuffer(di, sizeof(DequantInfo)); - ClearBuffer(mi, sizeof(IMDCTInfo)); - ClearBuffer(sbi, sizeof(SubbandInfo)); - - return mp3DecInfo; -} - -#define SAFE_FREE(x) {if (x) free(x); (x) = 0;} /* helper macro */ - -/************************************************************************************** - * Function: FreeBuffers - * - * Description: frees all the memory used by the MP3 decoder - * - * Inputs: pointer to initialized MP3DecInfo structure - * - * Outputs: none - * - * Return: none - * - * Notes: safe to call even if some buffers were not allocated (uses SAFE_FREE) - **************************************************************************************/ -void FreeBuffers(MP3DecInfo *mp3DecInfo) -{ - if (!mp3DecInfo) - return; - - SAFE_FREE(mp3DecInfo->FrameHeaderPS); - SAFE_FREE(mp3DecInfo->SideInfoPS); - SAFE_FREE(mp3DecInfo->ScaleFactorInfoPS); - SAFE_FREE(mp3DecInfo->HuffmanInfoPS); - SAFE_FREE(mp3DecInfo->DequantInfoPS); - SAFE_FREE(mp3DecInfo->IMDCTInfoPS); - SAFE_FREE(mp3DecInfo->SubbandInfoPS); - - SAFE_FREE(mp3DecInfo); -} diff --git a/bsp/stm32_radio/mp3/real/coder.h b/bsp/stm32_radio/mp3/real/coder.h deleted file mode 100644 index 9c4d57064b..0000000000 --- a/bsp/stm32_radio/mp3/real/coder.h +++ /dev/null @@ -1,306 +0,0 @@ -/* ***** BEGIN LICENSE BLOCK ***** - * Version: RCSL 1.0/RPSL 1.0 - * - * Portions Copyright (c) 1995-2002 RealNetworks, Inc. All Rights Reserved. - * - * The contents of this file, and the files included with this file, are - * subject to the current version of the RealNetworks Public Source License - * Version 1.0 (the "RPSL") available at - * http://www.helixcommunity.org/content/rpsl unless you have licensed - * the file under the RealNetworks Community Source License Version 1.0 - * (the "RCSL") available at http://www.helixcommunity.org/content/rcsl, - * in which case the RCSL will apply. You may also obtain the license terms - * directly from RealNetworks. You may not use this file except in - * compliance with the RPSL or, if you have a valid RCSL with RealNetworks - * applicable to this file, the RCSL. Please see the applicable RPSL or - * RCSL for the rights, obligations and limitations governing use of the - * contents of the file. - * - * This file is part of the Helix DNA Technology. RealNetworks is the - * developer of the Original Code and owns the copyrights in the portions - * it created. - * - * This file, and the files included with this file, is distributed and made - * available on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER - * EXPRESS OR IMPLIED, AND REALNETWORKS HEREBY DISCLAIMS ALL SUCH WARRANTIES, - * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, FITNESS - * FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT. - * - * Technology Compatibility Kit Test Suite(s) Location: - * http://www.helixcommunity.org/content/tck - * - * Contributor(s): - * - * ***** END LICENSE BLOCK ***** */ - -/************************************************************************************** - * Fixed-point MP3 decoder - * Jon Recker (jrecker@real.com), Ken Cooke (kenc@real.com) - * June 2003 - * - * coder.h - private, implementation-specific header file - **************************************************************************************/ - -#ifndef _CODER_H -#define _CODER_H - -#include "mp3common.h" - -#if defined(ASSERT) -#undef ASSERT -#endif -#if defined(_WIN32) && defined(_M_IX86) && (defined (_DEBUG) || defined (REL_ENABLE_ASSERTS)) -#define ASSERT(x) if (!(x)) __asm int 3; -#else -#define ASSERT(x) /* do nothing */ -#endif - -#ifndef MAX -#define MAX(a,b) ((a) > (b) ? (a) : (b)) -#endif - -#ifndef MIN -#define MIN(a,b) ((a) < (b) ? (a) : (b)) -#endif - -/* clip to range [-2^n, 2^n - 1] */ -#define CLIP_2N(y, n) { \ - int sign = (y) >> 31; \ - if (sign != (y) >> (n)) { \ - (y) = sign ^ ((1 << (n)) - 1); \ - } \ -} - -#define SIBYTES_MPEG1_MONO 17 -#define SIBYTES_MPEG1_STEREO 32 -#define SIBYTES_MPEG2_MONO 9 -#define SIBYTES_MPEG2_STEREO 17 - -/* number of fraction bits for pow43Tab (see comments there) */ -#define POW43_FRACBITS_LOW 22 -#define POW43_FRACBITS_HIGH 12 - -#define DQ_FRACBITS_OUT 25 /* number of fraction bits in output of dequant */ -#define IMDCT_SCALE 2 /* additional scaling (by sqrt(2)) for fast IMDCT36 */ - -#define HUFF_PAIRTABS 32 -#define BLOCK_SIZE 18 -#define NBANDS 32 -#define MAX_REORDER_SAMPS ((192-126)*3) /* largest critical band for short blocks (see sfBandTable) */ -#define VBUF_LENGTH (17 * 2 * NBANDS) /* for double-sized vbuf FIFO */ - -/* additional external symbols to name-mangle for static linking */ -#define SetBitstreamPointer STATNAME(SetBitstreamPointer) -#define GetBits STATNAME(GetBits) -#define CalcBitsUsed STATNAME(CalcBitsUsed) -#define DequantChannel STATNAME(DequantChannel) -#define MidSideProc STATNAME(MidSideProc) -#define IntensityProcMPEG1 STATNAME(IntensityProcMPEG1) -#define IntensityProcMPEG2 STATNAME(IntensityProcMPEG2) -#define PolyphaseMono STATNAME(PolyphaseMono) -#define PolyphaseStereo STATNAME(PolyphaseStereo) -#define FDCT32 STATNAME(FDCT32) - -#define ISFMpeg1 STATNAME(ISFMpeg1) -#define ISFMpeg2 STATNAME(ISFMpeg2) -#define ISFIIP STATNAME(ISFIIP) -#define uniqueIDTab STATNAME(uniqueIDTab) -#define coef32 STATNAME(coef32) -#define polyCoef STATNAME(polyCoef) -#define csa STATNAME(csa) -#define imdctWin STATNAME(imdctWin) - -#define huffTable STATNAME(huffTable) -#define huffTabOffset STATNAME(huffTabOffset) -#define huffTabLookup STATNAME(huffTabLookup) -#define quadTable STATNAME(quadTable) -#define quadTabOffset STATNAME(quadTabOffset) -#define quadTabMaxBits STATNAME(quadTabMaxBits) - -/* map these to the corresponding 2-bit values in the frame header */ -typedef enum { - Stereo = 0x00, /* two independent channels, but L and R frames might have different # of bits */ - Joint = 0x01, /* coupled channels - layer III: mix of M-S and intensity, Layers I/II: intensity and direct coding only */ - Dual = 0x02, /* two independent channels, L and R always have exactly 1/2 the total bitrate */ - Mono = 0x03 /* one channel */ -} StereoMode; - -typedef struct _BitStreamInfo { - unsigned char *bytePtr; - unsigned int iCache; - int cachedBits; - int nBytes; -} BitStreamInfo; - -typedef struct _FrameHeader { - MPEGVersion ver; /* version ID */ - int layer; /* layer index (1, 2, or 3) */ - int crc; /* CRC flag: 0 = disabled, 1 = enabled */ - int brIdx; /* bitrate index (0 - 15) */ - int srIdx; /* sample rate index (0 - 2) */ - int paddingBit; /* padding flag: 0 = no padding, 1 = single pad byte */ - int privateBit; /* unused */ - StereoMode sMode; /* mono/stereo mode */ - int modeExt; /* used to decipher joint stereo mode */ - int copyFlag; /* copyright flag: 0 = no, 1 = yes */ - int origFlag; /* original flag: 0 = copy, 1 = original */ - int emphasis; /* deemphasis mode */ - int CRCWord; /* CRC word (16 bits, 0 if crc not enabled) */ - - const SFBandTable *sfBand; -} FrameHeader; - -typedef struct _SideInfoSub { - int part23Length; /* number of bits in main data */ - int nBigvals; /* 2x this = first set of Huffman cw's (maximum amplitude can be > 1) */ - int globalGain; /* overall gain for dequantizer */ - int sfCompress; /* unpacked to figure out number of bits in scale factors */ - int winSwitchFlag; /* window switching flag */ - int blockType; /* block type */ - int mixedBlock; /* 0 = regular block (all short or long), 1 = mixed block */ - int tableSelect[3]; /* index of Huffman tables for the big values regions */ - int subBlockGain[3]; /* subblock gain offset, relative to global gain */ - int region0Count; /* 1+region0Count = num scale factor bands in first region of bigvals */ - int region1Count; /* 1+region1Count = num scale factor bands in second region of bigvals */ - int preFlag; /* for optional high frequency boost */ - int sfactScale; /* scaling of the scalefactors */ - int count1TableSelect; /* index of Huffman table for quad codewords */ -} SideInfoSub; - -typedef struct _SideInfo { - int mainDataBegin; - int privateBits; - int scfsi[MAX_NCHAN][MAX_SCFBD]; /* 4 scalefactor bands per channel */ - - SideInfoSub sis[MAX_NGRAN][MAX_NCHAN]; -} SideInfo; - -typedef struct { - int cbType; /* pure long = 0, pure short = 1, mixed = 2 */ - int cbEndS[3]; /* number nonzero short cb's, per subbblock */ - int cbEndSMax; /* max of cbEndS[] */ - int cbEndL; /* number nonzero long cb's */ -} CriticalBandInfo; - -typedef struct _DequantInfo { - int workBuf[MAX_REORDER_SAMPS]; /* workbuf for reordering short blocks */ - CriticalBandInfo cbi[MAX_NCHAN]; /* filled in dequantizer, used in joint stereo reconstruction */ -} DequantInfo; - -typedef struct _HuffmanInfo { - int huffDecBuf[MAX_NCHAN][MAX_NSAMP]; /* used both for decoded Huffman values and dequantized coefficients */ - int nonZeroBound[MAX_NCHAN]; /* number of coeffs in huffDecBuf[ch] which can be > 0 */ - int gb[MAX_NCHAN]; /* minimum number of guard bits in huffDecBuf[ch] */ -} HuffmanInfo; - -typedef enum _HuffTabType { - noBits, - oneShot, - loopNoLinbits, - loopLinbits, - quadA, - quadB, - invalidTab -} HuffTabType; - -typedef struct _HuffTabLookup { - int linBits; - HuffTabType tabType; -} HuffTabLookup; - -typedef struct _IMDCTInfo { - int outBuf[MAX_NCHAN][BLOCK_SIZE][NBANDS]; /* output of IMDCT */ - int overBuf[MAX_NCHAN][MAX_NSAMP / 2]; /* overlap-add buffer (by symmetry, only need 1/2 size) */ - int numPrevIMDCT[MAX_NCHAN]; /* how many IMDCT's calculated in this channel on prev. granule */ - int prevType[MAX_NCHAN]; - int prevWinSwitch[MAX_NCHAN]; - int gb[MAX_NCHAN]; -} IMDCTInfo; - -typedef struct _BlockCount { - int nBlocksLong; - int nBlocksTotal; - int nBlocksPrev; - int prevType; - int prevWinSwitch; - int currWinSwitch; - int gbIn; - int gbOut; -} BlockCount; - -/* max bits in scalefactors = 5, so use char's to save space */ -typedef struct _ScaleFactorInfoSub { - char l[23]; /* [band] */ - char s[13][3]; /* [band][window] */ -} ScaleFactorInfoSub; - -/* used in MPEG 2, 2.5 intensity (joint) stereo only */ -typedef struct _ScaleFactorJS { - int intensityScale; - int slen[4]; - int nr[4]; -} ScaleFactorJS; - -typedef struct _ScaleFactorInfo { - ScaleFactorInfoSub sfis[MAX_NGRAN][MAX_NCHAN]; - ScaleFactorJS sfjs; -} ScaleFactorInfo; - -/* NOTE - could get by with smaller vbuf if memory is more important than speed - * (in Subband, instead of replicating each block in FDCT32 you would do a memmove on the - * last 15 blocks to shift them down one, a hardware style FIFO) - */ -typedef struct _SubbandInfo { - int vbuf[MAX_NCHAN * VBUF_LENGTH]; /* vbuf for fast DCT-based synthesis PQMF - double size for speed (no modulo indexing) */ - int vindex; /* internal index for tracking position in vbuf */ -} SubbandInfo; - -/* bitstream.c */ -void SetBitstreamPointer(BitStreamInfo *bsi, int nBytes, unsigned char *buf); -unsigned int GetBits(BitStreamInfo *bsi, int nBits); -int CalcBitsUsed(BitStreamInfo *bsi, unsigned char *startBuf, int startOffset); - -/* dequant.c, dqchan.c, stproc.c */ -int DequantChannel(int *sampleBuf, int *workBuf, int *nonZeroBound, FrameHeader *fh, SideInfoSub *sis, - ScaleFactorInfoSub *sfis, CriticalBandInfo *cbi); -void MidSideProc(int x[MAX_NCHAN][MAX_NSAMP], int nSamps, int mOut[2]); -void IntensityProcMPEG1(int x[MAX_NCHAN][MAX_NSAMP], int nSamps, FrameHeader *fh, ScaleFactorInfoSub *sfis, - CriticalBandInfo *cbi, int midSideFlag, int mixFlag, int mOut[2]); -void IntensityProcMPEG2(int x[MAX_NCHAN][MAX_NSAMP], int nSamps, FrameHeader *fh, ScaleFactorInfoSub *sfis, - CriticalBandInfo *cbi, ScaleFactorJS *sfjs, int midSideFlag, int mixFlag, int mOut[2]); - -/* dct32.c */ -void FDCT32(int *x, int *d, int offset, int oddBlock, int gb); - -/* hufftabs.c */ -extern const HuffTabLookup huffTabLookup[HUFF_PAIRTABS]; -extern const int huffTabOffset[HUFF_PAIRTABS]; -extern const unsigned short huffTable[]; -extern const unsigned char quadTable[64+16]; -extern const int quadTabOffset[2]; -extern const int quadTabMaxBits[2]; - -/* polyphase.c (or asmpoly.s) - * some platforms require a C++ compile of all source files, - * so if we're compiling C as C++ and using native assembly - * for these functions we need to prevent C++ name mangling. - */ -#ifdef __cplusplus -extern "C" { -#endif -void PolyphaseMono(short *pcm, int *vbuf, const int *coefBase); -void PolyphaseStereo(short *pcm, int *vbuf, const int *coefBase); -#ifdef __cplusplus -} -#endif - -/* trigtabs.c */ -extern const int imdctWin[4][36]; -extern const int ISFMpeg1[2][7]; -extern const int ISFMpeg2[2][2][16]; -extern const int ISFIIP[2][2]; -extern const int csa[8][2]; -extern const int coef32[31]; -extern const int polyCoef[264]; - -#endif /* _CODER_H */ diff --git a/bsp/stm32_radio/mp3/real/dct32.c b/bsp/stm32_radio/mp3/real/dct32.c deleted file mode 100644 index a688aa98ba..0000000000 --- a/bsp/stm32_radio/mp3/real/dct32.c +++ /dev/null @@ -1,278 +0,0 @@ -/* ***** BEGIN LICENSE BLOCK ***** - * Version: RCSL 1.0/RPSL 1.0 - * - * Portions Copyright (c) 1995-2002 RealNetworks, Inc. All Rights Reserved. - * - * The contents of this file, and the files included with this file, are - * subject to the current version of the RealNetworks Public Source License - * Version 1.0 (the "RPSL") available at - * http://www.helixcommunity.org/content/rpsl unless you have licensed - * the file under the RealNetworks Community Source License Version 1.0 - * (the "RCSL") available at http://www.helixcommunity.org/content/rcsl, - * in which case the RCSL will apply. You may also obtain the license terms - * directly from RealNetworks. You may not use this file except in - * compliance with the RPSL or, if you have a valid RCSL with RealNetworks - * applicable to this file, the RCSL. Please see the applicable RPSL or - * RCSL for the rights, obligations and limitations governing use of the - * contents of the file. - * - * This file is part of the Helix DNA Technology. RealNetworks is the - * developer of the Original Code and owns the copyrights in the portions - * it created. - * - * This file, and the files included with this file, is distributed and made - * available on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER - * EXPRESS OR IMPLIED, AND REALNETWORKS HEREBY DISCLAIMS ALL SUCH WARRANTIES, - * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, FITNESS - * FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT. - * - * Technology Compatibility Kit Test Suite(s) Location: - * http://www.helixcommunity.org/content/tck - * - * Contributor(s): - * - * ***** END LICENSE BLOCK ***** */ - -/************************************************************************************** - * Fixed-point MP3 decoder - * Jon Recker (jrecker@real.com), Ken Cooke (kenc@real.com) - * June 2003 - * - * dct32.c - optimized implementations of 32-point DCT for matrixing stage of - * polyphase filter - **************************************************************************************/ - -#include "coder.h" -#include "assembly.h" - -#define COS0_0 0x4013c251 /* Q31 */ -#define COS0_1 0x40b345bd /* Q31 */ -#define COS0_2 0x41fa2d6d /* Q31 */ -#define COS0_3 0x43f93421 /* Q31 */ -#define COS0_4 0x46cc1bc4 /* Q31 */ -#define COS0_5 0x4a9d9cf0 /* Q31 */ -#define COS0_6 0x4fae3711 /* Q31 */ -#define COS0_7 0x56601ea7 /* Q31 */ -#define COS0_8 0x5f4cf6eb /* Q31 */ -#define COS0_9 0x6b6fcf26 /* Q31 */ -#define COS0_10 0x7c7d1db3 /* Q31 */ -#define COS0_11 0x4ad81a97 /* Q30 */ -#define COS0_12 0x5efc8d96 /* Q30 */ -#define COS0_13 0x41d95790 /* Q29 */ -#define COS0_14 0x6d0b20cf /* Q29 */ -#define COS0_15 0x518522fb /* Q27 */ - -#define COS1_0 0x404f4672 /* Q31 */ -#define COS1_1 0x42e13c10 /* Q31 */ -#define COS1_2 0x48919f44 /* Q31 */ -#define COS1_3 0x52cb0e63 /* Q31 */ -#define COS1_4 0x64e2402e /* Q31 */ -#define COS1_5 0x43e224a9 /* Q30 */ -#define COS1_6 0x6e3c92c1 /* Q30 */ -#define COS1_7 0x519e4e04 /* Q28 */ - -#define COS2_0 0x4140fb46 /* Q31 */ -#define COS2_1 0x4cf8de88 /* Q31 */ -#define COS2_2 0x73326bbf /* Q31 */ -#define COS2_3 0x52036742 /* Q29 */ - -#define COS3_0 0x4545e9ef /* Q31 */ -#define COS3_1 0x539eba45 /* Q30 */ - -#define COS4_0 0x5a82799a /* Q31 */ - -static const int dcttab[48] = { - /* first pass */ - COS0_0, COS0_15, COS1_0, /* 31, 27, 31 */ - COS0_1, COS0_14, COS1_1, /* 31, 29, 31 */ - COS0_2, COS0_13, COS1_2, /* 31, 29, 31 */ - COS0_3, COS0_12, COS1_3, /* 31, 30, 31 */ - COS0_4, COS0_11, COS1_4, /* 31, 30, 31 */ - COS0_5, COS0_10, COS1_5, /* 31, 31, 30 */ - COS0_6, COS0_9, COS1_6, /* 31, 31, 30 */ - COS0_7, COS0_8, COS1_7, /* 31, 31, 28 */ - /* second pass */ - COS2_0, COS2_3, COS3_0, /* 31, 29, 31 */ - COS2_1, COS2_2, COS3_1, /* 31, 31, 30 */ - -COS2_0, -COS2_3, COS3_0, /* 31, 29, 31 */ - -COS2_1, -COS2_2, COS3_1, /* 31, 31, 30 */ - COS2_0, COS2_3, COS3_0, /* 31, 29, 31 */ - COS2_1, COS2_2, COS3_1, /* 31, 31, 30 */ - -COS2_0, -COS2_3, COS3_0, /* 31, 29, 31 */ - -COS2_1, -COS2_2, COS3_1, /* 31, 31, 30 */ -}; - -#define D32FP(i, s0, s1, s2) { \ - a0 = buf[i]; a3 = buf[31-i]; \ - a1 = buf[15-i]; a2 = buf[16+i]; \ - b0 = a0 + a3; b3 = MULSHIFT32(*cptr++, a0 - a3) << (s0); \ - b1 = a1 + a2; b2 = MULSHIFT32(*cptr++, a1 - a2) << (s1); \ - buf[i] = b0 + b1; buf[15-i] = MULSHIFT32(*cptr, b0 - b1) << (s2); \ - buf[16+i] = b2 + b3; buf[31-i] = MULSHIFT32(*cptr++, b3 - b2) << (s2); \ -} - -/************************************************************************************** - * Function: FDCT32 - * - * Description: Ken's highly-optimized 32-point DCT (radix-4 + radix-8) - * - * Inputs: input buffer, length = 32 samples - * require at least 6 guard bits in input vector x to avoid possibility - * of overflow in internal calculations (see bbtest_imdct test app) - * buffer offset and oddblock flag for polyphase filter input buffer - * number of guard bits in input - * - * Outputs: output buffer, data copied and interleaved for polyphase filter - * no guarantees about number of guard bits in output - * - * Return: none - * - * Notes: number of muls = 4*8 + 12*4 = 80 - * final stage of DCT is hardcoded to shuffle data into the proper order - * for the polyphase filterbank - * fully unrolled stage 1, for max precision (scale the 1/cos() factors - * differently, depending on magnitude) - * guard bit analysis verified by exhaustive testing of all 2^32 - * combinations of max pos/max neg values in x[] - * - * TODO: code organization and optimization for ARM - * possibly interleave stereo (cut # of coef loads in half - may not have - * enough registers) - **************************************************************************************/ -void FDCT32(int *buf, int *dest, int offset, int oddBlock, int gb) -{ - int i, s, tmp, es; - const int *cptr = dcttab; - int a0, a1, a2, a3, a4, a5, a6, a7; - int b0, b1, b2, b3, b4, b5, b6, b7; - int *d; - - /* scaling - ensure at least 6 guard bits for DCT - * (in practice this is already true 99% of time, so this code is - * almost never triggered) - */ - es = 0; - if (gb < 6) { - es = 6 - gb; - for (i = 0; i < 32; i++) - buf[i] >>= es; - } - - /* first pass */ - D32FP(0, 1, 5, 1); - D32FP(1, 1, 3, 1); - D32FP(2, 1, 3, 1); - D32FP(3, 1, 2, 1); - D32FP(4, 1, 2, 1); - D32FP(5, 1, 1, 2); - D32FP(6, 1, 1, 2); - D32FP(7, 1, 1, 4); - - /* second pass */ - for (i = 4; i > 0; i--) { - a0 = buf[0]; a7 = buf[7]; a3 = buf[3]; a4 = buf[4]; - b0 = a0 + a7; b7 = MULSHIFT32(*cptr++, a0 - a7) << 1; - b3 = a3 + a4; b4 = MULSHIFT32(*cptr++, a3 - a4) << 3; - a0 = b0 + b3; a3 = MULSHIFT32(*cptr, b0 - b3) << 1; - a4 = b4 + b7; a7 = MULSHIFT32(*cptr++, b7 - b4) << 1; - - a1 = buf[1]; a6 = buf[6]; a2 = buf[2]; a5 = buf[5]; - b1 = a1 + a6; b6 = MULSHIFT32(*cptr++, a1 - a6) << 1; - b2 = a2 + a5; b5 = MULSHIFT32(*cptr++, a2 - a5) << 1; - a1 = b1 + b2; a2 = MULSHIFT32(*cptr, b1 - b2) << 2; - a5 = b5 + b6; a6 = MULSHIFT32(*cptr++, b6 - b5) << 2; - - b0 = a0 + a1; b1 = MULSHIFT32(COS4_0, a0 - a1) << 1; - b2 = a2 + a3; b3 = MULSHIFT32(COS4_0, a3 - a2) << 1; - buf[0] = b0; buf[1] = b1; - buf[2] = b2 + b3; buf[3] = b3; - - b4 = a4 + a5; b5 = MULSHIFT32(COS4_0, a4 - a5) << 1; - b6 = a6 + a7; b7 = MULSHIFT32(COS4_0, a7 - a6) << 1; - b6 += b7; - buf[4] = b4 + b6; buf[5] = b5 + b7; - buf[6] = b5 + b6; buf[7] = b7; - - buf += 8; - } - buf -= 32; /* reset */ - - /* sample 0 - always delayed one block */ - d = dest + 64*16 + ((offset - oddBlock) & 7) + (oddBlock ? 0 : VBUF_LENGTH); - s = buf[ 0]; d[0] = d[8] = s; - - /* samples 16 to 31 */ - d = dest + offset + (oddBlock ? VBUF_LENGTH : 0); - - s = buf[ 1]; d[0] = d[8] = s; d += 64; - - tmp = buf[25] + buf[29]; - s = buf[17] + tmp; d[0] = d[8] = s; d += 64; - s = buf[ 9] + buf[13]; d[0] = d[8] = s; d += 64; - s = buf[21] + tmp; d[0] = d[8] = s; d += 64; - - tmp = buf[29] + buf[27]; - s = buf[ 5]; d[0] = d[8] = s; d += 64; - s = buf[21] + tmp; d[0] = d[8] = s; d += 64; - s = buf[13] + buf[11]; d[0] = d[8] = s; d += 64; - s = buf[19] + tmp; d[0] = d[8] = s; d += 64; - - tmp = buf[27] + buf[31]; - s = buf[ 3]; d[0] = d[8] = s; d += 64; - s = buf[19] + tmp; d[0] = d[8] = s; d += 64; - s = buf[11] + buf[15]; d[0] = d[8] = s; d += 64; - s = buf[23] + tmp; d[0] = d[8] = s; d += 64; - - tmp = buf[31]; - s = buf[ 7]; d[0] = d[8] = s; d += 64; - s = buf[23] + tmp; d[0] = d[8] = s; d += 64; - s = buf[15]; d[0] = d[8] = s; d += 64; - s = tmp; d[0] = d[8] = s; - - /* samples 16 to 1 (sample 16 used again) */ - d = dest + 16 + ((offset - oddBlock) & 7) + (oddBlock ? 0 : VBUF_LENGTH); - - s = buf[ 1]; d[0] = d[8] = s; d += 64; - - tmp = buf[30] + buf[25]; - s = buf[17] + tmp; d[0] = d[8] = s; d += 64; - s = buf[14] + buf[ 9]; d[0] = d[8] = s; d += 64; - s = buf[22] + tmp; d[0] = d[8] = s; d += 64; - s = buf[ 6]; d[0] = d[8] = s; d += 64; - - tmp = buf[26] + buf[30]; - s = buf[22] + tmp; d[0] = d[8] = s; d += 64; - s = buf[10] + buf[14]; d[0] = d[8] = s; d += 64; - s = buf[18] + tmp; d[0] = d[8] = s; d += 64; - s = buf[ 2]; d[0] = d[8] = s; d += 64; - - tmp = buf[28] + buf[26]; - s = buf[18] + tmp; d[0] = d[8] = s; d += 64; - s = buf[12] + buf[10]; d[0] = d[8] = s; d += 64; - s = buf[20] + tmp; d[0] = d[8] = s; d += 64; - s = buf[ 4]; d[0] = d[8] = s; d += 64; - - tmp = buf[24] + buf[28]; - s = buf[20] + tmp; d[0] = d[8] = s; d += 64; - s = buf[ 8] + buf[12]; d[0] = d[8] = s; d += 64; - s = buf[16] + tmp; d[0] = d[8] = s; - - /* this is so rarely invoked that it's not worth making two versions of the output - * shuffle code (one for no shift, one for clip + variable shift) like in IMDCT - * here we just load, clip, shift, and store on the rare instances that es != 0 - */ - if (es) { - d = dest + 64*16 + ((offset - oddBlock) & 7) + (oddBlock ? 0 : VBUF_LENGTH); - s = d[0]; CLIP_2N(s, 31 - es); d[0] = d[8] = (s << es); - - d = dest + offset + (oddBlock ? VBUF_LENGTH : 0); - for (i = 16; i <= 31; i++) { - s = d[0]; CLIP_2N(s, 31 - es); d[0] = d[8] = (s << es); d += 64; - } - - d = dest + 16 + ((offset - oddBlock) & 7) + (oddBlock ? 0 : VBUF_LENGTH); - for (i = 15; i >= 0; i--) { - s = d[0]; CLIP_2N(s, 31 - es); d[0] = d[8] = (s << es); d += 64; - } - } -} diff --git a/bsp/stm32_radio/mp3/real/dequant.c b/bsp/stm32_radio/mp3/real/dequant.c deleted file mode 100644 index b989b7dee9..0000000000 --- a/bsp/stm32_radio/mp3/real/dequant.c +++ /dev/null @@ -1,158 +0,0 @@ -/* ***** BEGIN LICENSE BLOCK ***** - * Version: RCSL 1.0/RPSL 1.0 - * - * Portions Copyright (c) 1995-2002 RealNetworks, Inc. All Rights Reserved. - * - * The contents of this file, and the files included with this file, are - * subject to the current version of the RealNetworks Public Source License - * Version 1.0 (the "RPSL") available at - * http://www.helixcommunity.org/content/rpsl unless you have licensed - * the file under the RealNetworks Community Source License Version 1.0 - * (the "RCSL") available at http://www.helixcommunity.org/content/rcsl, - * in which case the RCSL will apply. You may also obtain the license terms - * directly from RealNetworks. You may not use this file except in - * compliance with the RPSL or, if you have a valid RCSL with RealNetworks - * applicable to this file, the RCSL. Please see the applicable RPSL or - * RCSL for the rights, obligations and limitations governing use of the - * contents of the file. - * - * This file is part of the Helix DNA Technology. RealNetworks is the - * developer of the Original Code and owns the copyrights in the portions - * it created. - * - * This file, and the files included with this file, is distributed and made - * available on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER - * EXPRESS OR IMPLIED, AND REALNETWORKS HEREBY DISCLAIMS ALL SUCH WARRANTIES, - * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, FITNESS - * FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT. - * - * Technology Compatibility Kit Test Suite(s) Location: - * http://www.helixcommunity.org/content/tck - * - * Contributor(s): - * - * ***** END LICENSE BLOCK ***** */ - -/************************************************************************************** - * Fixed-point MP3 decoder - * Jon Recker (jrecker@real.com), Ken Cooke (kenc@real.com) - * June 2003 - * - * dequant.c - dequantization, stereo processing (intensity, mid-side), short-block - * coefficient reordering - **************************************************************************************/ - -#include "coder.h" -#include "assembly.h" - -/************************************************************************************** - * Function: Dequantize - * - * Description: dequantize coefficients, decode stereo, reorder short blocks - * (one granule-worth) - * - * Inputs: MP3DecInfo structure filled by UnpackFrameHeader(), UnpackSideInfo(), - * UnpackScaleFactors(), and DecodeHuffman() (for this granule) - * index of current granule - * - * Outputs: dequantized and reordered coefficients in hi->huffDecBuf - * (one granule-worth, all channels), format = Q26 - * operates in-place on huffDecBuf but also needs di->workBuf - * updated hi->nonZeroBound index for both channels - * - * Return: 0 on success, -1 if null input pointers - * - * Notes: In calling output Q(DQ_FRACBITS_OUT), we assume an implicit bias - * of 2^15. Some (floating-point) reference implementations factor this - * into the 2^(0.25 * gain) scaling explicitly. But to avoid precision - * loss, we don't do that. Instead take it into account in the final - * round to PCM (>> by 15 less than we otherwise would have). - * Equivalently, we can think of the dequantized coefficients as - * Q(DQ_FRACBITS_OUT - 15) with no implicit bias. - **************************************************************************************/ -int Dequantize(MP3DecInfo *mp3DecInfo, int gr) -{ - int i, ch, nSamps, mOut[2]; - FrameHeader *fh; - SideInfo *si; - ScaleFactorInfo *sfi; - HuffmanInfo *hi; - DequantInfo *di; - CriticalBandInfo *cbi; - - /* validate pointers */ - if (!mp3DecInfo || !mp3DecInfo->FrameHeaderPS || !mp3DecInfo->SideInfoPS || !mp3DecInfo->ScaleFactorInfoPS || - !mp3DecInfo->HuffmanInfoPS || !mp3DecInfo->DequantInfoPS) - return -1; - - fh = (FrameHeader *)(mp3DecInfo->FrameHeaderPS); - - /* si is an array of up to 4 structs, stored as gr0ch0, gr0ch1, gr1ch0, gr1ch1 */ - si = (SideInfo *)(mp3DecInfo->SideInfoPS); - sfi = (ScaleFactorInfo *)(mp3DecInfo->ScaleFactorInfoPS); - hi = (HuffmanInfo *)mp3DecInfo->HuffmanInfoPS; - di = (DequantInfo *)mp3DecInfo->DequantInfoPS; - cbi = di->cbi; - mOut[0] = mOut[1] = 0; - - /* dequantize all the samples in each channel */ - for (ch = 0; ch < mp3DecInfo->nChans; ch++) { - hi->gb[ch] = DequantChannel(hi->huffDecBuf[ch], di->workBuf, &hi->nonZeroBound[ch], fh, - &si->sis[gr][ch], &sfi->sfis[gr][ch], &cbi[ch]); - } - - /* joint stereo processing assumes one guard bit in input samples - * it's extremely rare not to have at least one gb, so if this is the case - * just make a pass over the data and clip to [-2^30+1, 2^30-1] - * in practice this may never happen - */ - if (fh->modeExt && (hi->gb[0] < 1 || hi->gb[1] < 1)) { - for (i = 0; i < hi->nonZeroBound[0]; i++) { - if (hi->huffDecBuf[0][i] < -0x3fffffff) hi->huffDecBuf[0][i] = -0x3fffffff; - if (hi->huffDecBuf[0][i] > 0x3fffffff) hi->huffDecBuf[0][i] = 0x3fffffff; - } - for (i = 0; i < hi->nonZeroBound[1]; i++) { - if (hi->huffDecBuf[1][i] < -0x3fffffff) hi->huffDecBuf[1][i] = -0x3fffffff; - if (hi->huffDecBuf[1][i] > 0x3fffffff) hi->huffDecBuf[1][i] = 0x3fffffff; - } - } - - /* do mid-side stereo processing, if enabled */ - if (fh->modeExt >> 1) { - if (fh->modeExt & 0x01) { - /* intensity stereo enabled - run mid-side up to start of right zero region */ - if (cbi[1].cbType == 0) - nSamps = fh->sfBand->l[cbi[1].cbEndL + 1]; - else - nSamps = 3 * fh->sfBand->s[cbi[1].cbEndSMax + 1]; - } else { - /* intensity stereo disabled - run mid-side on whole spectrum */ - nSamps = MAX(hi->nonZeroBound[0], hi->nonZeroBound[1]); - } - MidSideProc(hi->huffDecBuf, nSamps, mOut); - } - - /* do intensity stereo processing, if enabled */ - if (fh->modeExt & 0x01) { - nSamps = hi->nonZeroBound[0]; - if (fh->ver == MPEG1) { - IntensityProcMPEG1(hi->huffDecBuf, nSamps, fh, &sfi->sfis[gr][1], di->cbi, - fh->modeExt >> 1, si->sis[gr][1].mixedBlock, mOut); - } else { - IntensityProcMPEG2(hi->huffDecBuf, nSamps, fh, &sfi->sfis[gr][1], di->cbi, &sfi->sfjs, - fh->modeExt >> 1, si->sis[gr][1].mixedBlock, mOut); - } - } - - /* adjust guard bit count and nonZeroBound if we did any stereo processing */ - if (fh->modeExt) { - hi->gb[0] = CLZ(mOut[0]) - 1; - hi->gb[1] = CLZ(mOut[1]) - 1; - nSamps = MAX(hi->nonZeroBound[0], hi->nonZeroBound[1]); - hi->nonZeroBound[0] = nSamps; - hi->nonZeroBound[1] = nSamps; - } - - /* output format Q(DQ_FRACBITS_OUT) */ - return 0; -} diff --git a/bsp/stm32_radio/mp3/real/dqchan.c b/bsp/stm32_radio/mp3/real/dqchan.c deleted file mode 100644 index 72720f8780..0000000000 --- a/bsp/stm32_radio/mp3/real/dqchan.c +++ /dev/null @@ -1,375 +0,0 @@ -/* ***** BEGIN LICENSE BLOCK ***** - * Version: RCSL 1.0/RPSL 1.0 - * - * Portions Copyright (c) 1995-2002 RealNetworks, Inc. All Rights Reserved. - * - * The contents of this file, and the files included with this file, are - * subject to the current version of the RealNetworks Public Source License - * Version 1.0 (the "RPSL") available at - * http://www.helixcommunity.org/content/rpsl unless you have licensed - * the file under the RealNetworks Community Source License Version 1.0 - * (the "RCSL") available at http://www.helixcommunity.org/content/rcsl, - * in which case the RCSL will apply. You may also obtain the license terms - * directly from RealNetworks. You may not use this file except in - * compliance with the RPSL or, if you have a valid RCSL with RealNetworks - * applicable to this file, the RCSL. Please see the applicable RPSL or - * RCSL for the rights, obligations and limitations governing use of the - * contents of the file. - * - * This file is part of the Helix DNA Technology. RealNetworks is the - * developer of the Original Code and owns the copyrights in the portions - * it created. - * - * This file, and the files included with this file, is distributed and made - * available on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER - * EXPRESS OR IMPLIED, AND REALNETWORKS HEREBY DISCLAIMS ALL SUCH WARRANTIES, - * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, FITNESS - * FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT. - * - * Technology Compatibility Kit Test Suite(s) Location: - * http://www.helixcommunity.org/content/tck - * - * Contributor(s): - * - * ***** END LICENSE BLOCK ***** */ - -/************************************************************************************** - * Fixed-point MP3 decoder - * Jon Recker (jrecker@real.com), Ken Cooke (kenc@real.com) - * August 2003 - * - * dqchan.c - dequantization of transform coefficients - **************************************************************************************/ - -#include "coder.h" -#include "assembly.h" - -typedef int ARRAY3[3]; /* for short-block reordering */ - -/* optional pre-emphasis for high-frequency scale factor bands */ -static const char preTab[22] = { 0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,2,2,3,3,3,2,0 }; - -/* pow(2,-i/4) for i=0..3, Q31 format */ -static const int pow14[4] = { - 0x7fffffff, 0x6ba27e65, 0x5a82799a, 0x4c1bf829 -}; - -/* pow(2,-i/4) * pow(j,4/3) for i=0..3 j=0..15, Q25 format */ -static const int pow43_14[4][16] = { -{ 0x00000000, 0x10000000, 0x285145f3, 0x453a5cdb, /* Q28 */ - 0x0cb2ff53, 0x111989d6, 0x15ce31c8, 0x1ac7f203, - 0x20000000, 0x257106b9, 0x2b16b4a3, 0x30ed74b4, - 0x36f23fa5, 0x3d227bd3, 0x437be656, 0x49fc823c, }, - -{ 0x00000000, 0x0d744fcd, 0x21e71f26, 0x3a36abd9, - 0x0aadc084, 0x0e610e6e, 0x12560c1d, 0x168523cf, - 0x1ae89f99, 0x1f7c03a4, 0x243bae49, 0x29249c67, - 0x2e34420f, 0x33686f85, 0x38bf3dff, 0x3e370182, }, - -{ 0x00000000, 0x0b504f33, 0x1c823e07, 0x30f39a55, - 0x08facd62, 0x0c176319, 0x0f6b3522, 0x12efe2ad, - 0x16a09e66, 0x1a79a317, 0x1e77e301, 0x2298d5b4, - 0x26da56fc, 0x2b3a902a, 0x2fb7e7e7, 0x3450f650, }, - -{ 0x00000000, 0x09837f05, 0x17f910d7, 0x2929c7a9, - 0x078d0dfa, 0x0a2ae661, 0x0cf73154, 0x0fec91cb, - 0x1306fe0a, 0x16434a6c, 0x199ee595, 0x1d17ae3d, - 0x20abd76a, 0x2459d551, 0x28204fbb, 0x2bfe1808, }, -}; - -/* pow(j,4/3) for j=16..63, Q23 format */ -static const int pow43[] = { - 0x1428a2fa, 0x15db1bd6, 0x1796302c, 0x19598d85, - 0x1b24e8bb, 0x1cf7fcfa, 0x1ed28af2, 0x20b4582a, - 0x229d2e6e, 0x248cdb55, 0x26832fda, 0x28800000, - 0x2a832287, 0x2c8c70a8, 0x2e9bc5d8, 0x30b0ff99, - 0x32cbfd4a, 0x34eca001, 0x3712ca62, 0x393e6088, - 0x3b6f47e0, 0x3da56717, 0x3fe0a5fc, 0x4220ed72, - 0x44662758, 0x46b03e7c, 0x48ff1e87, 0x4b52b3f3, - 0x4daaebfd, 0x5007b497, 0x5268fc62, 0x54ceb29c, - 0x5738c721, 0x59a72a59, 0x5c19cd35, 0x5e90a129, - 0x610b9821, 0x638aa47f, 0x660db90f, 0x6894c90b, - 0x6b1fc80c, 0x6daeaa0d, 0x70416360, 0x72d7e8b0, - 0x75722ef9, 0x78102b85, 0x7ab1d3ec, 0x7d571e09, -}; - -/* sqrt(0.5) in Q31 format */ -#define SQRTHALF 0x5a82799a - -/* - * Minimax polynomial approximation to pow(x, 4/3), over the range - * poly43lo: x = [0.5, 0.7071] - * poly43hi: x = [0.7071, 1.0] - * - * Relative error < 1E-7 - * Coefs are scaled by 4, 2, 1, 0.5, 0.25 - */ -static const int poly43lo[5] = { 0x29a0bda9, 0xb02e4828, 0x5957aa1b, 0x236c498d, 0xff581859 }; -static const int poly43hi[5] = { 0x10852163, 0xd333f6a4, 0x46e9408b, 0x27c2cef0, 0xfef577b4 }; - -/* pow(2, i*4/3) as exp and frac */ -static const int pow2exp[8] = { 14, 13, 11, 10, 9, 7, 6, 5 }; - -static const int pow2frac[8] = { - 0x6597fa94, 0x50a28be6, 0x7fffffff, 0x6597fa94, - 0x50a28be6, 0x7fffffff, 0x6597fa94, 0x50a28be6 -}; - -/************************************************************************************** - * Function: DequantBlock - * - * Description: Ken's highly-optimized, low memory dequantizer performing the operation - * y = pow(x, 4.0/3.0) * pow(2, 25 - scale/4.0) - * - * Inputs: input buffer of decode Huffman codewords (signed-magnitude) - * output buffer of same length (in-place (outbuf = inbuf) is allowed) - * number of samples - * - * Outputs: dequantized samples in Q25 format - * - * Return: bitwise-OR of the unsigned outputs (for guard bit calculations) - **************************************************************************************/ -static int DequantBlock(int *inbuf, int *outbuf, int num, int scale) -{ - int tab4[4]; - int scalef, scalei, shift; - int sx, x, y; - int mask = 0; - const int *tab16, *coef; - - tab16 = pow43_14[scale & 0x3]; - scalef = pow14[scale & 0x3]; - scalei = MIN(scale >> 2, 31); /* smallest input scale = -47, so smallest scalei = -12 */ - - /* cache first 4 values */ - shift = MIN(scalei + 3, 31); - shift = MAX(shift, 0); - tab4[0] = 0; - tab4[1] = tab16[1] >> shift; - tab4[2] = tab16[2] >> shift; - tab4[3] = tab16[3] >> shift; - - do { - - sx = *inbuf++; - x = sx & 0x7fffffff; /* sx = sign|mag */ - - if (x < 4) { - - y = tab4[x]; - - } else if (x < 16) { - - y = tab16[x]; - y = (scalei < 0) ? y << -scalei : y >> scalei; - - } else { - - if (x < 64) { - - y = pow43[x-16]; - - /* fractional scale */ - y = MULSHIFT32(y, scalef); - shift = scalei - 3; - - } else { - - /* normalize to [0x40000000, 0x7fffffff] */ - x <<= 17; - shift = 0; - if (x < 0x08000000) - x <<= 4, shift += 4; - if (x < 0x20000000) - x <<= 2, shift += 2; - if (x < 0x40000000) - x <<= 1, shift += 1; - - coef = (x < SQRTHALF) ? poly43lo : poly43hi; - - /* polynomial */ - y = coef[0]; - y = MULSHIFT32(y, x) + coef[1]; - y = MULSHIFT32(y, x) + coef[2]; - y = MULSHIFT32(y, x) + coef[3]; - y = MULSHIFT32(y, x) + coef[4]; - y = MULSHIFT32(y, pow2frac[shift]) << 3; - - /* fractional scale */ - y = MULSHIFT32(y, scalef); - shift = scalei - pow2exp[shift]; - } - - /* integer scale */ - if (shift < 0) { - shift = -shift; - if (y > (0x7fffffff >> shift)) - y = 0x7fffffff; /* clip */ - else - y <<= shift; - } else { - y >>= shift; - } - } - - /* sign and store */ - mask |= y; - *outbuf++ = (sx < 0) ? -y : y; - - } while (--num); - - return mask; -} - -/************************************************************************************** - * Function: DequantChannel - * - * Description: dequantize one granule, one channel worth of decoded Huffman codewords - * - * Inputs: sample buffer (decoded Huffman codewords), length = MAX_NSAMP samples - * work buffer for reordering short-block, length = MAX_REORDER_SAMPS - * samples (3 * width of largest short-block critical band) - * non-zero bound for this channel/granule - * valid FrameHeader, SideInfoSub, ScaleFactorInfoSub, and CriticalBandInfo - * structures for this channel/granule - * - * Outputs: MAX_NSAMP dequantized samples in sampleBuf - * updated non-zero bound (indicating which samples are != 0 after DQ) - * filled-in cbi structure indicating start and end critical bands - * - * Return: minimum number of guard bits in dequantized sampleBuf - * - * Notes: dequantized samples in Q(DQ_FRACBITS_OUT) format - **************************************************************************************/ -int DequantChannel(int *sampleBuf, int *workBuf, int *nonZeroBound, FrameHeader *fh, SideInfoSub *sis, - ScaleFactorInfoSub *sfis, CriticalBandInfo *cbi) -{ - int i, j, w, cb; - int cbStartL, cbEndL, cbStartS, cbEndS; - int nSamps, nonZero, sfactMultiplier, gbMask; - int globalGain, gainI; - int cbMax[3]; - ARRAY3 *buf; /* short block reorder */ - - /* set default start/end points for short/long blocks - will update with non-zero cb info */ - if (sis->blockType == 2) { - cbStartL = 0; - if (sis->mixedBlock) { - cbEndL = (fh->ver == MPEG1 ? 8 : 6); - cbStartS = 3; - } else { - cbEndL = 0; - cbStartS = 0; - } - cbEndS = 13; - } else { - /* long block */ - cbStartL = 0; - cbEndL = 22; - cbStartS = 13; - cbEndS = 13; - } - cbMax[2] = cbMax[1] = cbMax[0] = 0; - gbMask = 0; - i = 0; - - /* sfactScale = 0 --> quantizer step size = 2 - * sfactScale = 1 --> quantizer step size = sqrt(2) - * so sfactMultiplier = 2 or 4 (jump through globalGain by powers of 2 or sqrt(2)) - */ - sfactMultiplier = 2 * (sis->sfactScale + 1); - - /* offset globalGain by -2 if midSide enabled, for 1/sqrt(2) used in MidSideProc() - * (DequantBlock() does 0.25 * gainI so knocking it down by two is the same as - * dividing every sample by sqrt(2) = multiplying by 2^-.5) - */ - globalGain = sis->globalGain; - if (fh->modeExt >> 1) - globalGain -= 2; - globalGain += IMDCT_SCALE; /* scale everything by sqrt(2), for fast IMDCT36 */ - - /* long blocks */ - for (cb = 0; cb < cbEndL; cb++) { - - nonZero = 0; - nSamps = fh->sfBand->l[cb + 1] - fh->sfBand->l[cb]; - gainI = 210 - globalGain + sfactMultiplier * (sfis->l[cb] + (sis->preFlag ? (int)preTab[cb] : 0)); - - nonZero |= DequantBlock(sampleBuf + i, sampleBuf + i, nSamps, gainI); - i += nSamps; - - /* update highest non-zero critical band */ - if (nonZero) - cbMax[0] = cb; - gbMask |= nonZero; - - if (i >= *nonZeroBound) - break; - } - - /* set cbi (Type, EndS[], EndSMax will be overwritten if we proceed to do short blocks) */ - cbi->cbType = 0; /* long only */ - cbi->cbEndL = cbMax[0]; - cbi->cbEndS[0] = cbi->cbEndS[1] = cbi->cbEndS[2] = 0; - cbi->cbEndSMax = 0; - - /* early exit if no short blocks */ - if (cbStartS >= 12) - return CLZ(gbMask) - 1; - - /* short blocks */ - cbMax[2] = cbMax[1] = cbMax[0] = cbStartS; - for (cb = cbStartS; cb < cbEndS; cb++) { - - nSamps = fh->sfBand->s[cb + 1] - fh->sfBand->s[cb]; - for (w = 0; w < 3; w++) { - nonZero = 0; - gainI = 210 - globalGain + 8*sis->subBlockGain[w] + sfactMultiplier*(sfis->s[cb][w]); - - nonZero |= DequantBlock(sampleBuf + i + nSamps*w, workBuf + nSamps*w, nSamps, gainI); - - /* update highest non-zero critical band */ - if (nonZero) - cbMax[w] = cb; - gbMask |= nonZero; - } - - /* reorder blocks */ - buf = (ARRAY3 *)(sampleBuf + i); - i += 3*nSamps; - for (j = 0; j < nSamps; j++) { - buf[j][0] = workBuf[0*nSamps + j]; - buf[j][1] = workBuf[1*nSamps + j]; - buf[j][2] = workBuf[2*nSamps + j]; - } - - ASSERT(3*nSamps <= MAX_REORDER_SAMPS); - - if (i >= *nonZeroBound) - break; - } - - /* i = last non-zero INPUT sample processed, which corresponds to highest possible non-zero - * OUTPUT sample (after reorder) - * however, the original nzb is no longer necessarily true - * for each cb, buf[][] is updated with 3*nSamps samples (i increases 3*nSamps each time) - * (buf[j + 1][0] = 3 (input) samples ahead of buf[j][0]) - * so update nonZeroBound to i - */ - *nonZeroBound = i; - - ASSERT(*nonZeroBound <= MAX_NSAMP); - - cbi->cbType = (sis->mixedBlock ? 2 : 1); /* 2 = mixed short/long, 1 = short only */ - - cbi->cbEndS[0] = cbMax[0]; - cbi->cbEndS[1] = cbMax[1]; - cbi->cbEndS[2] = cbMax[2]; - - cbi->cbEndSMax = cbMax[0]; - cbi->cbEndSMax = MAX(cbi->cbEndSMax, cbMax[1]); - cbi->cbEndSMax = MAX(cbi->cbEndSMax, cbMax[2]); - - return CLZ(gbMask) - 1; -} - diff --git a/bsp/stm32_radio/mp3/real/huffman.c b/bsp/stm32_radio/mp3/real/huffman.c deleted file mode 100644 index c1d3347e0f..0000000000 --- a/bsp/stm32_radio/mp3/real/huffman.c +++ /dev/null @@ -1,458 +0,0 @@ -/* ***** BEGIN LICENSE BLOCK ***** - * Version: RCSL 1.0/RPSL 1.0 - * - * Portions Copyright (c) 1995-2002 RealNetworks, Inc. All Rights Reserved. - * - * The contents of this file, and the files included with this file, are - * subject to the current version of the RealNetworks Public Source License - * Version 1.0 (the "RPSL") available at - * http://www.helixcommunity.org/content/rpsl unless you have licensed - * the file under the RealNetworks Community Source License Version 1.0 - * (the "RCSL") available at http://www.helixcommunity.org/content/rcsl, - * in which case the RCSL will apply. You may also obtain the license terms - * directly from RealNetworks. You may not use this file except in - * compliance with the RPSL or, if you have a valid RCSL with RealNetworks - * applicable to this file, the RCSL. Please see the applicable RPSL or - * RCSL for the rights, obligations and limitations governing use of the - * contents of the file. - * - * This file is part of the Helix DNA Technology. RealNetworks is the - * developer of the Original Code and owns the copyrights in the portions - * it created. - * - * This file, and the files included with this file, is distributed and made - * available on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER - * EXPRESS OR IMPLIED, AND REALNETWORKS HEREBY DISCLAIMS ALL SUCH WARRANTIES, - * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, FITNESS - * FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT. - * - * Technology Compatibility Kit Test Suite(s) Location: - * http://www.helixcommunity.org/content/tck - * - * Contributor(s): - * - * ***** END LICENSE BLOCK ***** */ - -/************************************************************************************** - * Fixed-point MP3 decoder - * Jon Recker (jrecker@real.com), Ken Cooke (kenc@real.com) - * July 2003 - * - * huffman.c - Huffman decoding of transform coefficients - **************************************************************************************/ - -#include "coder.h" - -/* helper macros - see comments in hufftabs.c about the format of the huffman tables */ -#define GetMaxbits(x) ((int)( (((unsigned short)(x)) >> 0) & 0x000f)) -#define GetHLen(x) ((int)( (((unsigned short)(x)) >> 12) & 0x000f)) -#define GetCWY(x) ((int)( (((unsigned short)(x)) >> 8) & 0x000f)) -#define GetCWX(x) ((int)( (((unsigned short)(x)) >> 4) & 0x000f)) -#define GetSignBits(x) ((int)( (((unsigned short)(x)) >> 0) & 0x000f)) - -#define GetHLenQ(x) ((int)( (((unsigned char)(x)) >> 4) & 0x0f)) -#define GetCWVQ(x) ((int)( (((unsigned char)(x)) >> 3) & 0x01)) -#define GetCWWQ(x) ((int)( (((unsigned char)(x)) >> 2) & 0x01)) -#define GetCWXQ(x) ((int)( (((unsigned char)(x)) >> 1) & 0x01)) -#define GetCWYQ(x) ((int)( (((unsigned char)(x)) >> 0) & 0x01)) - -/* apply sign of s to the positive number x (save in MSB, will do two's complement in dequant) */ -#define ApplySign(x, s) { (x) |= ((s) & 0x80000000); } - -/************************************************************************************** - * Function: DecodeHuffmanPairs - * - * Description: decode 2-way vector Huffman codes in the "bigValues" region of spectrum - * - * Inputs: valid BitStreamInfo struct, pointing to start of pair-wise codes - * pointer to xy buffer to received decoded values - * number of codewords to decode - * index of Huffman table to use - * number of bits remaining in bitstream - * - * Outputs: pairs of decoded coefficients in vwxy - * updated BitStreamInfo struct - * - * Return: number of bits used, or -1 if out of bits - * - * Notes: assumes that nVals is an even number - * si_huff.bit tests every Huffman codeword in every table (though not - * necessarily all linBits outputs for x,y > 15) - **************************************************************************************/ -static int DecodeHuffmanPairs(int *xy, int nVals, int tabIdx, int bitsLeft, unsigned char *buf, int bitOffset) -{ - int i, x, y; - int cachedBits, padBits, len, startBits, linBits, maxBits, minBits; - HuffTabType tabType; - unsigned short cw, *tBase, *tCurr; - unsigned int cache; - - if(nVals <= 0) - return 0; - - if (bitsLeft < 0) - return -1; - startBits = bitsLeft; - - tBase = (unsigned short *)(huffTable + huffTabOffset[tabIdx]); - linBits = huffTabLookup[tabIdx].linBits; - tabType = huffTabLookup[tabIdx].tabType; - - ASSERT(!(nVals & 0x01)); - ASSERT(tabIdx < HUFF_PAIRTABS); - ASSERT(tabIdx >= 0); - ASSERT(tabType != invalidTab); - - /* initially fill cache with any partial byte */ - cache = 0; - cachedBits = (8 - bitOffset) & 0x07; - if (cachedBits) - cache = (unsigned int)(*buf++) << (32 - cachedBits); - bitsLeft -= cachedBits; - - if (tabType == noBits) { - /* table 0, no data, x = y = 0 */ - for (i = 0; i < nVals; i+=2) { - xy[i+0] = 0; - xy[i+1] = 0; - } - return 0; - } else if (tabType == oneShot) { - /* single lookup, no escapes */ - maxBits = GetMaxbits(tBase[0]); - tBase++; - padBits = 0; - while (nVals > 0) { - /* refill cache - assumes cachedBits <= 16 */ - if (bitsLeft >= 16) { - /* load 2 new bytes into left-justified cache */ - cache |= (unsigned int)(*buf++) << (24 - cachedBits); - cache |= (unsigned int)(*buf++) << (16 - cachedBits); - cachedBits += 16; - bitsLeft -= 16; - } else { - /* last time through, pad cache with zeros and drain cache */ - if (cachedBits + bitsLeft <= 0) return -1; - if (bitsLeft > 0) cache |= (unsigned int)(*buf++) << (24 - cachedBits); - if (bitsLeft > 8) cache |= (unsigned int)(*buf++) << (16 - cachedBits); - cachedBits += bitsLeft; - bitsLeft = 0; - - cache &= (signed int)0x80000000 >> (cachedBits - 1); - padBits = 11; - cachedBits += padBits; /* okay if this is > 32 (0's automatically shifted in from right) */ - } - - /* largest maxBits = 9, plus 2 for sign bits, so make sure cache has at least 11 bits */ - while (nVals > 0 && cachedBits >= 11 ) { - cw = tBase[cache >> (32 - maxBits)]; - len = GetHLen(cw); - cachedBits -= len; - cache <<= len; - - x = GetCWX(cw); if (x) {ApplySign(x, cache); cache <<= 1; cachedBits--;} - y = GetCWY(cw); if (y) {ApplySign(y, cache); cache <<= 1; cachedBits--;} - - /* ran out of bits - should never have consumed padBits */ - if (cachedBits < padBits) - return -1; - - *xy++ = x; - *xy++ = y; - nVals -= 2; - } - } - bitsLeft += (cachedBits - padBits); - return (startBits - bitsLeft); - } else if (tabType == loopLinbits || tabType == loopNoLinbits) { - tCurr = tBase; - padBits = 0; - while (nVals > 0) { - /* refill cache - assumes cachedBits <= 16 */ - if (bitsLeft >= 16) { - /* load 2 new bytes into left-justified cache */ - cache |= (unsigned int)(*buf++) << (24 - cachedBits); - cache |= (unsigned int)(*buf++) << (16 - cachedBits); - cachedBits += 16; - bitsLeft -= 16; - } else { - /* last time through, pad cache with zeros and drain cache */ - if (cachedBits + bitsLeft <= 0) return -1; - if (bitsLeft > 0) cache |= (unsigned int)(*buf++) << (24 - cachedBits); - if (bitsLeft > 8) cache |= (unsigned int)(*buf++) << (16 - cachedBits); - cachedBits += bitsLeft; - bitsLeft = 0; - - cache &= (signed int)0x80000000 >> (cachedBits - 1); - padBits = 11; - cachedBits += padBits; /* okay if this is > 32 (0's automatically shifted in from right) */ - } - - /* largest maxBits = 9, plus 2 for sign bits, so make sure cache has at least 11 bits */ - while (nVals > 0 && cachedBits >= 11 ) { - maxBits = GetMaxbits(tCurr[0]); - cw = tCurr[(cache >> (32 - maxBits)) + 1]; - len = GetHLen(cw); - if (!len) { - cachedBits -= maxBits; - cache <<= maxBits; - tCurr += cw; - continue; - } - cachedBits -= len; - cache <<= len; - - x = GetCWX(cw); - y = GetCWY(cw); - - if (x == 15 && tabType == loopLinbits) { - minBits = linBits + 1 + (y ? 1 : 0); - if (cachedBits + bitsLeft < minBits) - return -1; - while (cachedBits < minBits) { - cache |= (unsigned int)(*buf++) << (24 - cachedBits); - cachedBits += 8; - bitsLeft -= 8; - } - if (bitsLeft < 0) { - cachedBits += bitsLeft; - bitsLeft = 0; - cache &= (signed int)0x80000000 >> (cachedBits - 1); - } - x += (int)(cache >> (32 - linBits)); - cachedBits -= linBits; - cache <<= linBits; - } - if (x) {ApplySign(x, cache); cache <<= 1; cachedBits--;} - - if (y == 15 && tabType == loopLinbits) { - minBits = linBits + 1; - if (cachedBits + bitsLeft < minBits) - return -1; - while (cachedBits < minBits) { - cache |= (unsigned int)(*buf++) << (24 - cachedBits); - cachedBits += 8; - bitsLeft -= 8; - } - if (bitsLeft < 0) { - cachedBits += bitsLeft; - bitsLeft = 0; - cache &= (signed int)0x80000000 >> (cachedBits - 1); - } - y += (int)(cache >> (32 - linBits)); - cachedBits -= linBits; - cache <<= linBits; - } - if (y) {ApplySign(y, cache); cache <<= 1; cachedBits--;} - - /* ran out of bits - should never have consumed padBits */ - if (cachedBits < padBits) - return -1; - - *xy++ = x; - *xy++ = y; - nVals -= 2; - tCurr = tBase; - } - } - bitsLeft += (cachedBits - padBits); - return (startBits - bitsLeft); - } - - /* error in bitstream - trying to access unused Huffman table */ - return -1; -} - -/************************************************************************************** - * Function: DecodeHuffmanQuads - * - * Description: decode 4-way vector Huffman codes in the "count1" region of spectrum - * - * Inputs: valid BitStreamInfo struct, pointing to start of quadword codes - * pointer to vwxy buffer to received decoded values - * maximum number of codewords to decode - * index of quadword table (0 = table A, 1 = table B) - * number of bits remaining in bitstream - * - * Outputs: quadruples of decoded coefficients in vwxy - * updated BitStreamInfo struct - * - * Return: index of the first "zero_part" value (index of the first sample - * of the quad word after which all samples are 0) - * - * Notes: si_huff.bit tests every vwxy output in both quad tables - **************************************************************************************/ -static int DecodeHuffmanQuads(int *vwxy, int nVals, int tabIdx, int bitsLeft, unsigned char *buf, int bitOffset) -{ - int i, v, w, x, y; - int len, maxBits, cachedBits, padBits; - unsigned int cache; - unsigned char cw, *tBase; - - if (bitsLeft <= 0) - return 0; - - tBase = (unsigned char *)quadTable + quadTabOffset[tabIdx]; - maxBits = quadTabMaxBits[tabIdx]; - - /* initially fill cache with any partial byte */ - cache = 0; - cachedBits = (8 - bitOffset) & 0x07; - if (cachedBits) - cache = (unsigned int)(*buf++) << (32 - cachedBits); - bitsLeft -= cachedBits; - - i = padBits = 0; - while (i < (nVals - 3)) { - /* refill cache - assumes cachedBits <= 16 */ - if (bitsLeft >= 16) { - /* load 2 new bytes into left-justified cache */ - cache |= (unsigned int)(*buf++) << (24 - cachedBits); - cache |= (unsigned int)(*buf++) << (16 - cachedBits); - cachedBits += 16; - bitsLeft -= 16; - } else { - /* last time through, pad cache with zeros and drain cache */ - if (cachedBits + bitsLeft <= 0) return i; - if (bitsLeft > 0) cache |= (unsigned int)(*buf++) << (24 - cachedBits); - if (bitsLeft > 8) cache |= (unsigned int)(*buf++) << (16 - cachedBits); - cachedBits += bitsLeft; - bitsLeft = 0; - - cache &= (signed int)0x80000000 >> (cachedBits - 1); - padBits = 10; - cachedBits += padBits; /* okay if this is > 32 (0's automatically shifted in from right) */ - } - - /* largest maxBits = 6, plus 4 for sign bits, so make sure cache has at least 10 bits */ - while (i < (nVals - 3) && cachedBits >= 10 ) { - cw = tBase[cache >> (32 - maxBits)]; - len = GetHLenQ(cw); - cachedBits -= len; - cache <<= len; - - v = GetCWVQ(cw); if(v) {ApplySign(v, cache); cache <<= 1; cachedBits--;} - w = GetCWWQ(cw); if(w) {ApplySign(w, cache); cache <<= 1; cachedBits--;} - x = GetCWXQ(cw); if(x) {ApplySign(x, cache); cache <<= 1; cachedBits--;} - y = GetCWYQ(cw); if(y) {ApplySign(y, cache); cache <<= 1; cachedBits--;} - - /* ran out of bits - okay (means we're done) */ - if (cachedBits < padBits) - return i; - - *vwxy++ = v; - *vwxy++ = w; - *vwxy++ = x; - *vwxy++ = y; - i += 4; - } - } - - /* decoded max number of quad values */ - return i; -} - -/************************************************************************************** - * Function: DecodeHuffman - * - * Description: decode one granule, one channel worth of Huffman codes - * - * Inputs: MP3DecInfo structure filled by UnpackFrameHeader(), UnpackSideInfo(), - * and UnpackScaleFactors() (for this granule) - * buffer pointing to start of Huffman data in MP3 frame - * pointer to bit offset (0-7) indicating starting bit in buf[0] - * number of bits in the Huffman data section of the frame - * (could include padding bits) - * index of current granule and channel - * - * Outputs: decoded coefficients in hi->huffDecBuf[ch] (hi pointer in mp3DecInfo) - * updated bitOffset - * - * Return: length (in bytes) of Huffman codes - * bitOffset also returned in parameter (0 = MSB, 7 = LSB of - * byte located at buf + offset) - * -1 if null input pointers, huffBlockBits < 0, or decoder runs - * out of bits prematurely (invalid bitstream) - **************************************************************************************/ -int DecodeHuffman(MP3DecInfo *mp3DecInfo, unsigned char *buf, int *bitOffset, int huffBlockBits, int gr, int ch) -{ - int r1Start, r2Start, rEnd[4]; /* region boundaries */ - int i, w, bitsUsed, bitsLeft; - unsigned char *startBuf = buf; - - FrameHeader *fh; - SideInfo *si; - SideInfoSub *sis; - ScaleFactorInfo *sfi; - HuffmanInfo *hi; - - /* validate pointers */ - if (!mp3DecInfo || !mp3DecInfo->FrameHeaderPS || !mp3DecInfo->SideInfoPS || !mp3DecInfo->ScaleFactorInfoPS || !mp3DecInfo->HuffmanInfoPS) - return -1; - - fh = ((FrameHeader *)(mp3DecInfo->FrameHeaderPS)); - si = ((SideInfo *)(mp3DecInfo->SideInfoPS)); - sis = &si->sis[gr][ch]; - sfi = ((ScaleFactorInfo *)(mp3DecInfo->ScaleFactorInfoPS)); - hi = (HuffmanInfo*)(mp3DecInfo->HuffmanInfoPS); - - if (huffBlockBits < 0) - return -1; - - /* figure out region boundaries (the first 2*bigVals coefficients divided into 3 regions) */ - if (sis->winSwitchFlag && sis->blockType == 2) { - if (sis->mixedBlock == 0) { - r1Start = fh->sfBand->s[(sis->region0Count + 1)/3] * 3; - } else { - if (fh->ver == MPEG1) { - r1Start = fh->sfBand->l[sis->region0Count + 1]; - } else { - /* see MPEG2 spec for explanation */ - w = fh->sfBand->s[4] - fh->sfBand->s[3]; - r1Start = fh->sfBand->l[6] + 2*w; - } - } - r2Start = MAX_NSAMP; /* short blocks don't have region 2 */ - } else { - r1Start = fh->sfBand->l[sis->region0Count + 1]; - r2Start = fh->sfBand->l[sis->region0Count + 1 + sis->region1Count + 1]; - } - - /* offset rEnd index by 1 so first region = rEnd[1] - rEnd[0], etc. */ - rEnd[3] = MIN(MAX_NSAMP, 2 * sis->nBigvals); - rEnd[2] = MIN(r2Start, rEnd[3]); - rEnd[1] = MIN(r1Start, rEnd[3]); - rEnd[0] = 0; - - /* rounds up to first all-zero pair (we don't check last pair for (x,y) == (non-zero, zero)) */ - hi->nonZeroBound[ch] = rEnd[3]; - - /* decode Huffman pairs (rEnd[i] are always even numbers) */ - bitsLeft = huffBlockBits; - for (i = 0; i < 3; i++) { - bitsUsed = DecodeHuffmanPairs(hi->huffDecBuf[ch] + rEnd[i], rEnd[i+1] - rEnd[i], sis->tableSelect[i], bitsLeft, buf, *bitOffset); - if (bitsUsed < 0 || bitsUsed > bitsLeft) /* error - overran end of bitstream */ - return -1; - - /* update bitstream position */ - buf += (bitsUsed + *bitOffset) >> 3; - *bitOffset = (bitsUsed + *bitOffset) & 0x07; - bitsLeft -= bitsUsed; - } - - /* decode Huffman quads (if any) */ - hi->nonZeroBound[ch] += DecodeHuffmanQuads(hi->huffDecBuf[ch] + rEnd[3], MAX_NSAMP - rEnd[3], sis->count1TableSelect, bitsLeft, buf, *bitOffset); - - ASSERT(hi->nonZeroBound[ch] <= MAX_NSAMP); - for (i = hi->nonZeroBound[ch]; i < MAX_NSAMP; i++) - hi->huffDecBuf[ch][i] = 0; - - /* If bits used for 576 samples < huffBlockBits, then the extras are considered - * to be stuffing bits (throw away, but need to return correct bitstream position) - */ - buf += (bitsLeft + *bitOffset) >> 3; - *bitOffset = (bitsLeft + *bitOffset) & 0x07; - - return (buf - startBuf); -} - diff --git a/bsp/stm32_radio/mp3/real/hufftabs.c b/bsp/stm32_radio/mp3/real/hufftabs.c deleted file mode 100644 index c1b066cfe5..0000000000 --- a/bsp/stm32_radio/mp3/real/hufftabs.c +++ /dev/null @@ -1,755 +0,0 @@ -/* ***** BEGIN LICENSE BLOCK ***** - * Version: RCSL 1.0/RPSL 1.0 - * - * Portions Copyright (c) 1995-2002 RealNetworks, Inc. All Rights Reserved. - * - * The contents of this file, and the files included with this file, are - * subject to the current version of the RealNetworks Public Source License - * Version 1.0 (the "RPSL") available at - * http://www.helixcommunity.org/content/rpsl unless you have licensed - * the file under the RealNetworks Community Source License Version 1.0 - * (the "RCSL") available at http://www.helixcommunity.org/content/rcsl, - * in which case the RCSL will apply. You may also obtain the license terms - * directly from RealNetworks. You may not use this file except in - * compliance with the RPSL or, if you have a valid RCSL with RealNetworks - * applicable to this file, the RCSL. Please see the applicable RPSL or - * RCSL for the rights, obligations and limitations governing use of the - * contents of the file. - * - * This file is part of the Helix DNA Technology. RealNetworks is the - * developer of the Original Code and owns the copyrights in the portions - * it created. - * - * This file, and the files included with this file, is distributed and made - * available on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER - * EXPRESS OR IMPLIED, AND REALNETWORKS HEREBY DISCLAIMS ALL SUCH WARRANTIES, - * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, FITNESS - * FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT. - * - * Technology Compatibility Kit Test Suite(s) Location: - * http://www.helixcommunity.org/content/tck - * - * Contributor(s): - * - * ***** END LICENSE BLOCK ***** */ - -/************************************************************************************** - * Fixed-point MP3 decoder - * Jon Recker (jrecker@real.com), Ken Cooke (kenc@real.com) - * June 2003 - * - * hufftabs.c - compressed Huffman code tables - **************************************************************************************/ - -#include "coder.h" - -/* NOTE - regenerated tables to use shorts instead of ints - * (all needed data can fit in 16 bits - see below) - * - * format 0xABCD - * A = length of codeword - * B = y value - * C = x value - * D = number of sign bits (0, 1, or 2) - * - * to read a CW, the code reads maxbits from the stream (dep. on - * table index), but doesn't remove them from the bitstream reader - * then it gets the correct CW by direct lookup into the table - * of length (2^maxbits) (more complicated for non-oneShot...) - * for CW's with hlen < maxbits, there are multiple entries in the - * table (extra bits are don't cares) - * the bitstream reader then "purges" (or removes) only the correct - * number of bits for the chosen CW - * - * entries starting with F are special: D (signbits) is maxbits, - * so the decoder always checks huffTableXX[0] first, gets the - * signbits, and reads that many bits from the bitstream - * (sometimes it takes > 1 read to get the value, so maxbits is - * can get updated by jumping to another value starting with 0xF) - * entries starting with 0 are also special: A = hlen = 0, rest of - * value is an offset to jump higher in the table (for tables of - * type loopNoLinbits or loopLinbits) - */ - -/* store Huffman codes as one big table plus table of offsets, since some platforms - * don't properly support table-of-tables (table of pointers to other const tables) - */ -const unsigned short huffTable[] = { - /* huffTable01[9] */ - 0xf003, 0x3112, 0x3101, 0x2011, 0x2011, 0x1000, 0x1000, 0x1000, - 0x1000, - - /* huffTable02[65] */ - 0xf006, 0x6222, 0x6201, 0x5212, 0x5212, 0x5122, 0x5122, 0x5021, - 0x5021, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, - 0x3112, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, - 0x3101, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, - 0x3011, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, - - /* huffTable03[65] */ - 0xf006, 0x6222, 0x6201, 0x5212, 0x5212, 0x5122, 0x5122, 0x5021, - 0x5021, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, - 0x3011, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, - 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, - 0x2112, 0x2101, 0x2101, 0x2101, 0x2101, 0x2101, 0x2101, 0x2101, - 0x2101, 0x2101, 0x2101, 0x2101, 0x2101, 0x2101, 0x2101, 0x2101, - 0x2101, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, - 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, - 0x2000, - - /* huffTable05[257] */ - 0xf008, 0x8332, 0x8322, 0x7232, 0x7232, 0x6132, 0x6132, 0x6132, - 0x6132, 0x7312, 0x7312, 0x7301, 0x7301, 0x7031, 0x7031, 0x7222, - 0x7222, 0x6212, 0x6212, 0x6212, 0x6212, 0x6122, 0x6122, 0x6122, - 0x6122, 0x6201, 0x6201, 0x6201, 0x6201, 0x6021, 0x6021, 0x6021, - 0x6021, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, - 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, - 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, - 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, - 0x3112, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, - 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, - 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, - 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, - 0x3101, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, - 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, - 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, - 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, - 0x3011, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, - - /* huffTable06[129] */ - 0xf007, 0x7332, 0x7301, 0x6322, 0x6322, 0x6232, 0x6232, 0x6031, - 0x6031, 0x5312, 0x5312, 0x5312, 0x5312, 0x5132, 0x5132, 0x5132, - 0x5132, 0x5222, 0x5222, 0x5222, 0x5222, 0x5201, 0x5201, 0x5201, - 0x5201, 0x4212, 0x4212, 0x4212, 0x4212, 0x4212, 0x4212, 0x4212, - 0x4212, 0x4122, 0x4122, 0x4122, 0x4122, 0x4122, 0x4122, 0x4122, - 0x4122, 0x4021, 0x4021, 0x4021, 0x4021, 0x4021, 0x4021, 0x4021, - 0x4021, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, - 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, - 0x3101, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, - 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, - 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, - 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, - 0x2112, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, - 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, - 0x3011, 0x3000, 0x3000, 0x3000, 0x3000, 0x3000, 0x3000, 0x3000, - 0x3000, 0x3000, 0x3000, 0x3000, 0x3000, 0x3000, 0x3000, 0x3000, - 0x3000, - - /* huffTable07[110] */ - 0xf006, 0x0041, 0x0052, 0x005b, 0x0060, 0x0063, 0x0068, 0x006b, - 0x6212, 0x5122, 0x5122, 0x6201, 0x6021, 0x4112, 0x4112, 0x4112, - 0x4112, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, - 0x3101, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, - 0x3011, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0xf004, 0x4552, 0x4542, 0x4452, 0x4352, 0x3532, 0x3532, - 0x3442, 0x3442, 0x3522, 0x3522, 0x3252, 0x3252, 0x2512, 0x2512, - 0x2512, 0x2512, 0xf003, 0x2152, 0x2152, 0x3501, 0x3432, 0x2051, - 0x2051, 0x3342, 0x3332, 0xf002, 0x2422, 0x2242, 0x1412, 0x1412, - 0xf001, 0x1142, 0x1041, 0xf002, 0x2401, 0x2322, 0x2232, 0x2301, - 0xf001, 0x1312, 0x1132, 0xf001, 0x1031, 0x1222, - - /* huffTable08[280] */ - 0xf008, 0x0101, 0x010a, 0x010f, 0x8512, 0x8152, 0x0112, 0x0115, - 0x8422, 0x8242, 0x8412, 0x7142, 0x7142, 0x8401, 0x8041, 0x8322, - 0x8232, 0x8312, 0x8132, 0x8301, 0x8031, 0x6222, 0x6222, 0x6222, - 0x6222, 0x6201, 0x6201, 0x6201, 0x6201, 0x6021, 0x6021, 0x6021, - 0x6021, 0x4212, 0x4212, 0x4212, 0x4212, 0x4212, 0x4212, 0x4212, - 0x4212, 0x4212, 0x4212, 0x4212, 0x4212, 0x4212, 0x4212, 0x4212, - 0x4212, 0x4122, 0x4122, 0x4122, 0x4122, 0x4122, 0x4122, 0x4122, - 0x4122, 0x4122, 0x4122, 0x4122, 0x4122, 0x4122, 0x4122, 0x4122, - 0x4122, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, - 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, - 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, - 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, - 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, - 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, - 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, - 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, - 0x2112, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, - 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, - 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, - 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, - 0x3101, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, - 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, - 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, - 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, - 0x3011, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, - 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, - 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, - 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, - 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, - 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, - 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, - 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, - 0x2000, 0xf003, 0x3552, 0x3452, 0x2542, 0x2542, 0x1352, 0x1352, - 0x1352, 0x1352, 0xf002, 0x2532, 0x2442, 0x1522, 0x1522, 0xf001, - 0x1252, 0x1501, 0xf001, 0x1432, 0x1342, 0xf001, 0x1051, 0x1332, - - /* huffTable09[93] */ - 0xf006, 0x0041, 0x004a, 0x004f, 0x0052, 0x0057, 0x005a, 0x6412, - 0x6142, 0x6322, 0x6232, 0x5312, 0x5312, 0x5132, 0x5132, 0x6301, - 0x6031, 0x5222, 0x5222, 0x5201, 0x5201, 0x4212, 0x4212, 0x4212, - 0x4212, 0x4122, 0x4122, 0x4122, 0x4122, 0x4021, 0x4021, 0x4021, - 0x4021, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, - 0x3112, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, - 0x3101, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, - 0x3011, 0x3000, 0x3000, 0x3000, 0x3000, 0x3000, 0x3000, 0x3000, - 0x3000, 0xf003, 0x3552, 0x3542, 0x2532, 0x2532, 0x2352, 0x2352, - 0x3452, 0x3501, 0xf002, 0x2442, 0x2522, 0x2252, 0x2512, 0xf001, - 0x1152, 0x1432, 0xf002, 0x1342, 0x1342, 0x2051, 0x2401, 0xf001, - 0x1422, 0x1242, 0xf001, 0x1332, 0x1041, - - /* huffTable10[320] */ - 0xf008, 0x0101, 0x010a, 0x010f, 0x0118, 0x011b, 0x0120, 0x0125, - 0x8712, 0x8172, 0x012a, 0x012d, 0x0132, 0x8612, 0x8162, 0x8061, - 0x0137, 0x013a, 0x013d, 0x8412, 0x8142, 0x8041, 0x8322, 0x8232, - 0x8301, 0x7312, 0x7312, 0x7132, 0x7132, 0x7031, 0x7031, 0x7222, - 0x7222, 0x6212, 0x6212, 0x6212, 0x6212, 0x6122, 0x6122, 0x6122, - 0x6122, 0x6201, 0x6201, 0x6201, 0x6201, 0x6021, 0x6021, 0x6021, - 0x6021, 0x4112, 0x4112, 0x4112, 0x4112, 0x4112, 0x4112, 0x4112, - 0x4112, 0x4112, 0x4112, 0x4112, 0x4112, 0x4112, 0x4112, 0x4112, - 0x4112, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, - 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, - 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, - 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, - 0x3101, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, - 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, - 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, - 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, - 0x3011, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0xf003, 0x3772, 0x3762, 0x3672, 0x3752, 0x3572, 0x3662, - 0x2742, 0x2742, 0xf002, 0x2472, 0x2652, 0x2562, 0x2732, 0xf003, - 0x2372, 0x2372, 0x2642, 0x2642, 0x3552, 0x3452, 0x2362, 0x2362, - 0xf001, 0x1722, 0x1272, 0xf002, 0x2462, 0x2701, 0x1071, 0x1071, - 0xf002, 0x1262, 0x1262, 0x2542, 0x2532, 0xf002, 0x1601, 0x1601, - 0x2352, 0x2442, 0xf001, 0x1632, 0x1622, 0xf002, 0x2522, 0x2252, - 0x1512, 0x1512, 0xf002, 0x1152, 0x1152, 0x2432, 0x2342, 0xf001, - 0x1501, 0x1051, 0xf001, 0x1422, 0x1242, 0xf001, 0x1332, 0x1401, - - /* huffTable11[296] */ - 0xf008, 0x0101, 0x0106, 0x010f, 0x0114, 0x0117, 0x8722, 0x8272, - 0x011c, 0x7172, 0x7172, 0x8712, 0x8071, 0x8632, 0x8362, 0x8061, - 0x011f, 0x0122, 0x8512, 0x7262, 0x7262, 0x8622, 0x8601, 0x7612, - 0x7612, 0x7162, 0x7162, 0x8152, 0x8432, 0x8051, 0x0125, 0x8422, - 0x8242, 0x8412, 0x8142, 0x8401, 0x8041, 0x7322, 0x7322, 0x7232, - 0x7232, 0x6312, 0x6312, 0x6312, 0x6312, 0x6132, 0x6132, 0x6132, - 0x6132, 0x7301, 0x7301, 0x7031, 0x7031, 0x6222, 0x6222, 0x6222, - 0x6222, 0x5122, 0x5122, 0x5122, 0x5122, 0x5122, 0x5122, 0x5122, - 0x5122, 0x4212, 0x4212, 0x4212, 0x4212, 0x4212, 0x4212, 0x4212, - 0x4212, 0x4212, 0x4212, 0x4212, 0x4212, 0x4212, 0x4212, 0x4212, - 0x4212, 0x5201, 0x5201, 0x5201, 0x5201, 0x5201, 0x5201, 0x5201, - 0x5201, 0x5021, 0x5021, 0x5021, 0x5021, 0x5021, 0x5021, 0x5021, - 0x5021, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, - 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, - 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, - 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, - 0x3112, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, - 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, - 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, - 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, - 0x3101, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, - 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, - 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, - 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, - 0x3011, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, - 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, - 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, - 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, - 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, - 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, - 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, - 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, - 0x2000, 0xf002, 0x2772, 0x2762, 0x2672, 0x2572, 0xf003, 0x2662, - 0x2662, 0x2742, 0x2742, 0x2472, 0x2472, 0x3752, 0x3552, 0xf002, - 0x2652, 0x2562, 0x1732, 0x1732, 0xf001, 0x1372, 0x1642, 0xf002, - 0x2542, 0x2452, 0x2532, 0x2352, 0xf001, 0x1462, 0x1701, 0xf001, - 0x1442, 0x1522, 0xf001, 0x1252, 0x1501, 0xf001, 0x1342, 0x1332, - - /* huffTable12[185] */ - 0xf007, 0x0081, 0x008a, 0x008f, 0x0092, 0x0097, 0x009a, 0x009d, - 0x00a2, 0x00a5, 0x00a8, 0x7622, 0x7262, 0x7162, 0x00ad, 0x00b0, - 0x00b3, 0x7512, 0x7152, 0x7432, 0x7342, 0x00b6, 0x7422, 0x7242, - 0x7412, 0x6332, 0x6332, 0x6142, 0x6142, 0x6322, 0x6322, 0x6232, - 0x6232, 0x7041, 0x7301, 0x6031, 0x6031, 0x5312, 0x5312, 0x5312, - 0x5312, 0x5132, 0x5132, 0x5132, 0x5132, 0x5222, 0x5222, 0x5222, - 0x5222, 0x4212, 0x4212, 0x4212, 0x4212, 0x4212, 0x4212, 0x4212, - 0x4212, 0x4122, 0x4122, 0x4122, 0x4122, 0x4122, 0x4122, 0x4122, - 0x4122, 0x5201, 0x5201, 0x5201, 0x5201, 0x5021, 0x5021, 0x5021, - 0x5021, 0x4000, 0x4000, 0x4000, 0x4000, 0x4000, 0x4000, 0x4000, - 0x4000, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, - 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, - 0x3112, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, - 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, - 0x3101, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, - 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, - 0x3011, 0xf003, 0x3772, 0x3762, 0x2672, 0x2672, 0x2752, 0x2752, - 0x2572, 0x2572, 0xf002, 0x2662, 0x2742, 0x2472, 0x2562, 0xf001, - 0x1652, 0x1732, 0xf002, 0x2372, 0x2552, 0x1722, 0x1722, 0xf001, - 0x1272, 0x1642, 0xf001, 0x1462, 0x1712, 0xf002, 0x1172, 0x1172, - 0x2701, 0x2071, 0xf001, 0x1632, 0x1362, 0xf001, 0x1542, 0x1452, - 0xf002, 0x1442, 0x1442, 0x2601, 0x2501, 0xf001, 0x1612, 0x1061, - 0xf001, 0x1532, 0x1352, 0xf001, 0x1522, 0x1252, 0xf001, 0x1051, - 0x1401, - - /* huffTable13[497] */ - 0xf006, 0x0041, 0x0082, 0x00c3, 0x00e4, 0x0105, 0x0116, 0x011f, - 0x0130, 0x0139, 0x013e, 0x0143, 0x0146, 0x6212, 0x6122, 0x6201, - 0x6021, 0x4112, 0x4112, 0x4112, 0x4112, 0x4101, 0x4101, 0x4101, - 0x4101, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, - 0x3011, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0xf006, 0x0108, 0x0111, 0x011a, 0x0123, 0x012c, 0x0131, - 0x0136, 0x013f, 0x0144, 0x0147, 0x014c, 0x0151, 0x0156, 0x015b, - 0x6f12, 0x61f2, 0x60f1, 0x0160, 0x0163, 0x0166, 0x62e2, 0x0169, - 0x6e12, 0x61e2, 0x016c, 0x016f, 0x0172, 0x0175, 0x0178, 0x017b, - 0x66c2, 0x6d32, 0x017e, 0x6d22, 0x62d2, 0x6d12, 0x67b2, 0x0181, - 0x0184, 0x63c2, 0x0187, 0x6b42, 0x51d2, 0x51d2, 0x6d01, 0x60d1, - 0x6a82, 0x68a2, 0x6c42, 0x64c2, 0x6b62, 0x66b2, 0x5c32, 0x5c32, - 0x5c22, 0x5c22, 0x52c2, 0x52c2, 0x5b52, 0x5b52, 0x65b2, 0x6982, - 0x5c12, 0x5c12, 0xf006, 0x51c2, 0x51c2, 0x6892, 0x6c01, 0x50c1, - 0x50c1, 0x64b2, 0x6a62, 0x66a2, 0x6972, 0x5b32, 0x5b32, 0x53b2, - 0x53b2, 0x6882, 0x6a52, 0x5b22, 0x5b22, 0x65a2, 0x6962, 0x54a2, - 0x54a2, 0x6872, 0x6782, 0x5492, 0x5492, 0x6772, 0x6672, 0x42b2, - 0x42b2, 0x42b2, 0x42b2, 0x4b12, 0x4b12, 0x4b12, 0x4b12, 0x41b2, - 0x41b2, 0x41b2, 0x41b2, 0x5b01, 0x5b01, 0x50b1, 0x50b1, 0x5692, - 0x5692, 0x5a42, 0x5a42, 0x5a32, 0x5a32, 0x53a2, 0x53a2, 0x5952, - 0x5952, 0x5592, 0x5592, 0x4a22, 0x4a22, 0x4a22, 0x4a22, 0x42a2, - 0x42a2, 0x42a2, 0x42a2, 0xf005, 0x4a12, 0x4a12, 0x41a2, 0x41a2, - 0x5a01, 0x5862, 0x40a1, 0x40a1, 0x5682, 0x5942, 0x4392, 0x4392, - 0x5932, 0x5852, 0x5582, 0x5762, 0x4922, 0x4922, 0x4292, 0x4292, - 0x5752, 0x5572, 0x4832, 0x4832, 0x4382, 0x4382, 0x5662, 0x5742, - 0x5472, 0x5652, 0x5562, 0x5372, 0xf005, 0x3912, 0x3912, 0x3912, - 0x3912, 0x3192, 0x3192, 0x3192, 0x3192, 0x4901, 0x4901, 0x4091, - 0x4091, 0x4842, 0x4842, 0x4482, 0x4482, 0x4272, 0x4272, 0x5642, - 0x5462, 0x3822, 0x3822, 0x3822, 0x3822, 0x3282, 0x3282, 0x3282, - 0x3282, 0x3812, 0x3812, 0x3812, 0x3812, 0xf004, 0x4732, 0x4722, - 0x3712, 0x3712, 0x3172, 0x3172, 0x4552, 0x4701, 0x4071, 0x4632, - 0x4362, 0x4542, 0x4452, 0x4622, 0x4262, 0x4532, 0xf003, 0x2182, - 0x2182, 0x3801, 0x3081, 0x3612, 0x3162, 0x3601, 0x3061, 0xf004, - 0x4352, 0x4442, 0x3522, 0x3522, 0x3252, 0x3252, 0x3501, 0x3501, - 0x2512, 0x2512, 0x2512, 0x2512, 0x2152, 0x2152, 0x2152, 0x2152, - 0xf003, 0x3432, 0x3342, 0x3051, 0x3422, 0x3242, 0x3332, 0x2412, - 0x2412, 0xf002, 0x1142, 0x1142, 0x2401, 0x2041, 0xf002, 0x2322, - 0x2232, 0x1312, 0x1312, 0xf001, 0x1132, 0x1301, 0xf001, 0x1031, - 0x1222, 0xf003, 0x0082, 0x008b, 0x008e, 0x0091, 0x0094, 0x0097, - 0x3ce2, 0x3dd2, 0xf003, 0x0093, 0x3eb2, 0x3be2, 0x3f92, 0x39f2, - 0x3ae2, 0x3db2, 0x3bd2, 0xf003, 0x3f82, 0x38f2, 0x3cc2, 0x008d, - 0x3e82, 0x0090, 0x27f2, 0x27f2, 0xf003, 0x2ad2, 0x2ad2, 0x3da2, - 0x3cb2, 0x3bc2, 0x36f2, 0x2f62, 0x2f62, 0xf002, 0x28e2, 0x2f52, - 0x2d92, 0x29d2, 0xf002, 0x25f2, 0x27e2, 0x2ca2, 0x2bb2, 0xf003, - 0x2f42, 0x2f42, 0x24f2, 0x24f2, 0x3ac2, 0x36e2, 0x23f2, 0x23f2, - 0xf002, 0x1f32, 0x1f32, 0x2d82, 0x28d2, 0xf001, 0x1f22, 0x12f2, - 0xf002, 0x2e62, 0x2c92, 0x1f01, 0x1f01, 0xf002, 0x29c2, 0x2e52, - 0x1ba2, 0x1ba2, 0xf002, 0x2d72, 0x27d2, 0x1e42, 0x1e42, 0xf002, - 0x28c2, 0x26d2, 0x1e32, 0x1e32, 0xf002, 0x19b2, 0x19b2, 0x2b92, - 0x2aa2, 0xf001, 0x1ab2, 0x15e2, 0xf001, 0x14e2, 0x1c82, 0xf001, - 0x1d62, 0x13e2, 0xf001, 0x1e22, 0x1e01, 0xf001, 0x10e1, 0x1d52, - 0xf001, 0x15d2, 0x1c72, 0xf001, 0x17c2, 0x1d42, 0xf001, 0x1b82, - 0x18b2, 0xf001, 0x14d2, 0x1a92, 0xf001, 0x19a2, 0x1c62, 0xf001, - 0x13d2, 0x1b72, 0xf001, 0x1c52, 0x15c2, 0xf001, 0x1992, 0x1a72, - 0xf001, 0x17a2, 0x1792, 0xf003, 0x0023, 0x3df2, 0x2de2, 0x2de2, - 0x1ff2, 0x1ff2, 0x1ff2, 0x1ff2, 0xf001, 0x1fe2, 0x1fd2, 0xf001, - 0x1ee2, 0x1fc2, 0xf001, 0x1ed2, 0x1fb2, 0xf001, 0x1bf2, 0x1ec2, - 0xf002, 0x1cd2, 0x1cd2, 0x2fa2, 0x29e2, 0xf001, 0x1af2, 0x1dc2, - 0xf001, 0x1ea2, 0x1e92, 0xf001, 0x1f72, 0x1e72, 0xf001, 0x1ef2, - 0x1cf2, - - /* huffTable15[580] */ - 0xf008, 0x0101, 0x0122, 0x0143, 0x0154, 0x0165, 0x0176, 0x017f, - 0x0188, 0x0199, 0x01a2, 0x01ab, 0x01b4, 0x01bd, 0x01c2, 0x01cb, - 0x01d4, 0x01d9, 0x01de, 0x01e3, 0x01e8, 0x01ed, 0x01f2, 0x01f7, - 0x01fc, 0x0201, 0x0204, 0x0207, 0x020a, 0x020f, 0x0212, 0x0215, - 0x021a, 0x021d, 0x0220, 0x8192, 0x0223, 0x0226, 0x0229, 0x022c, - 0x022f, 0x8822, 0x8282, 0x8812, 0x8182, 0x0232, 0x0235, 0x0238, - 0x023b, 0x8722, 0x8272, 0x8462, 0x8712, 0x8552, 0x8172, 0x023e, - 0x8632, 0x8362, 0x8542, 0x8452, 0x8622, 0x8262, 0x8612, 0x0241, - 0x8532, 0x7162, 0x7162, 0x8352, 0x8442, 0x7522, 0x7522, 0x7252, - 0x7252, 0x7512, 0x7512, 0x7152, 0x7152, 0x8501, 0x8051, 0x7432, - 0x7432, 0x7342, 0x7342, 0x7422, 0x7422, 0x7242, 0x7242, 0x7332, - 0x7332, 0x6142, 0x6142, 0x6142, 0x6142, 0x7412, 0x7412, 0x7401, - 0x7401, 0x6322, 0x6322, 0x6322, 0x6322, 0x6232, 0x6232, 0x6232, - 0x6232, 0x7041, 0x7041, 0x7301, 0x7301, 0x6312, 0x6312, 0x6312, - 0x6312, 0x6132, 0x6132, 0x6132, 0x6132, 0x6031, 0x6031, 0x6031, - 0x6031, 0x5222, 0x5222, 0x5222, 0x5222, 0x5222, 0x5222, 0x5222, - 0x5222, 0x5212, 0x5212, 0x5212, 0x5212, 0x5212, 0x5212, 0x5212, - 0x5212, 0x5122, 0x5122, 0x5122, 0x5122, 0x5122, 0x5122, 0x5122, - 0x5122, 0x5201, 0x5201, 0x5201, 0x5201, 0x5201, 0x5201, 0x5201, - 0x5201, 0x5021, 0x5021, 0x5021, 0x5021, 0x5021, 0x5021, 0x5021, - 0x5021, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, - 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, - 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, - 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, - 0x3112, 0x4101, 0x4101, 0x4101, 0x4101, 0x4101, 0x4101, 0x4101, - 0x4101, 0x4101, 0x4101, 0x4101, 0x4101, 0x4101, 0x4101, 0x4101, - 0x4101, 0x4011, 0x4011, 0x4011, 0x4011, 0x4011, 0x4011, 0x4011, - 0x4011, 0x4011, 0x4011, 0x4011, 0x4011, 0x4011, 0x4011, 0x4011, - 0x4011, 0x3000, 0x3000, 0x3000, 0x3000, 0x3000, 0x3000, 0x3000, - 0x3000, 0x3000, 0x3000, 0x3000, 0x3000, 0x3000, 0x3000, 0x3000, - 0x3000, 0x3000, 0x3000, 0x3000, 0x3000, 0x3000, 0x3000, 0x3000, - 0x3000, 0x3000, 0x3000, 0x3000, 0x3000, 0x3000, 0x3000, 0x3000, - 0x3000, 0xf005, 0x5ff2, 0x5fe2, 0x5ef2, 0x5fd2, 0x4ee2, 0x4ee2, - 0x5df2, 0x5fc2, 0x5cf2, 0x5ed2, 0x5de2, 0x5fb2, 0x4bf2, 0x4bf2, - 0x5ec2, 0x5ce2, 0x4dd2, 0x4dd2, 0x4fa2, 0x4fa2, 0x4af2, 0x4af2, - 0x4eb2, 0x4eb2, 0x4be2, 0x4be2, 0x4dc2, 0x4dc2, 0x4cd2, 0x4cd2, - 0x4f92, 0x4f92, 0xf005, 0x49f2, 0x49f2, 0x4ae2, 0x4ae2, 0x4db2, - 0x4db2, 0x4bd2, 0x4bd2, 0x4f82, 0x4f82, 0x48f2, 0x48f2, 0x4cc2, - 0x4cc2, 0x4e92, 0x4e92, 0x49e2, 0x49e2, 0x4f72, 0x4f72, 0x47f2, - 0x47f2, 0x4da2, 0x4da2, 0x4ad2, 0x4ad2, 0x4cb2, 0x4cb2, 0x4f62, - 0x4f62, 0x5ea2, 0x5f01, 0xf004, 0x3bc2, 0x3bc2, 0x36f2, 0x36f2, - 0x4e82, 0x48e2, 0x4f52, 0x4d92, 0x35f2, 0x35f2, 0x3e72, 0x3e72, - 0x37e2, 0x37e2, 0x3ca2, 0x3ca2, 0xf004, 0x3ac2, 0x3ac2, 0x3bb2, - 0x3bb2, 0x49d2, 0x4d82, 0x3f42, 0x3f42, 0x34f2, 0x34f2, 0x3f32, - 0x3f32, 0x33f2, 0x33f2, 0x38d2, 0x38d2, 0xf004, 0x36e2, 0x36e2, - 0x3f22, 0x3f22, 0x32f2, 0x32f2, 0x4e62, 0x40f1, 0x3f12, 0x3f12, - 0x31f2, 0x31f2, 0x3c92, 0x3c92, 0x39c2, 0x39c2, 0xf003, 0x3e52, - 0x3ba2, 0x3ab2, 0x35e2, 0x3d72, 0x37d2, 0x3e42, 0x34e2, 0xf003, - 0x3c82, 0x38c2, 0x3e32, 0x3d62, 0x36d2, 0x33e2, 0x3b92, 0x39b2, - 0xf004, 0x3e22, 0x3e22, 0x3aa2, 0x3aa2, 0x32e2, 0x32e2, 0x3e12, - 0x3e12, 0x31e2, 0x31e2, 0x4e01, 0x40e1, 0x3d52, 0x3d52, 0x35d2, - 0x35d2, 0xf003, 0x3c72, 0x37c2, 0x3d42, 0x3b82, 0x24d2, 0x24d2, - 0x38b2, 0x3a92, 0xf003, 0x39a2, 0x3c62, 0x36c2, 0x3d32, 0x23d2, - 0x23d2, 0x22d2, 0x22d2, 0xf003, 0x3d22, 0x3d01, 0x2d12, 0x2d12, - 0x2b72, 0x2b72, 0x27b2, 0x27b2, 0xf003, 0x21d2, 0x21d2, 0x3c52, - 0x30d1, 0x25c2, 0x25c2, 0x2a82, 0x2a82, 0xf002, 0x28a2, 0x2c42, - 0x24c2, 0x2b62, 0xf003, 0x26b2, 0x26b2, 0x3992, 0x3c01, 0x2c32, - 0x2c32, 0x23c2, 0x23c2, 0xf003, 0x2a72, 0x2a72, 0x27a2, 0x27a2, - 0x26a2, 0x26a2, 0x30c1, 0x3b01, 0xf002, 0x12c2, 0x12c2, 0x2c22, - 0x2b52, 0xf002, 0x25b2, 0x2c12, 0x2982, 0x2892, 0xf002, 0x21c2, - 0x2b42, 0x24b2, 0x2a62, 0xf002, 0x2b32, 0x2972, 0x13b2, 0x13b2, - 0xf002, 0x2792, 0x2882, 0x2b22, 0x2a52, 0xf002, 0x12b2, 0x12b2, - 0x25a2, 0x2b12, 0xf002, 0x11b2, 0x11b2, 0x20b1, 0x2962, 0xf002, - 0x2692, 0x2a42, 0x24a2, 0x2872, 0xf002, 0x2782, 0x2a32, 0x13a2, - 0x13a2, 0xf001, 0x1952, 0x1592, 0xf001, 0x1a22, 0x12a2, 0xf001, - 0x1a12, 0x11a2, 0xf002, 0x2a01, 0x20a1, 0x1862, 0x1862, 0xf001, - 0x1682, 0x1942, 0xf001, 0x1492, 0x1932, 0xf002, 0x1392, 0x1392, - 0x2772, 0x2901, 0xf001, 0x1852, 0x1582, 0xf001, 0x1922, 0x1762, - 0xf001, 0x1672, 0x1292, 0xf001, 0x1912, 0x1091, 0xf001, 0x1842, - 0x1482, 0xf001, 0x1752, 0x1572, 0xf001, 0x1832, 0x1382, 0xf001, - 0x1662, 0x1742, 0xf001, 0x1472, 0x1801, 0xf001, 0x1081, 0x1652, - 0xf001, 0x1562, 0x1732, 0xf001, 0x1372, 0x1642, 0xf001, 0x1701, - 0x1071, 0xf001, 0x1601, 0x1061, - - /* huffTable16[651] */ - 0xf008, 0x0101, 0x010a, 0x0113, 0x8ff2, 0x0118, 0x011d, 0x0120, - 0x82f2, 0x0131, 0x8f12, 0x81f2, 0x0134, 0x0145, 0x0156, 0x0167, - 0x0178, 0x0189, 0x019a, 0x01a3, 0x01ac, 0x01b5, 0x01be, 0x01c7, - 0x01d0, 0x01d9, 0x01de, 0x01e3, 0x01e6, 0x01eb, 0x01f0, 0x8152, - 0x01f3, 0x01f6, 0x01f9, 0x01fc, 0x8412, 0x8142, 0x01ff, 0x8322, - 0x8232, 0x7312, 0x7312, 0x7132, 0x7132, 0x8301, 0x8031, 0x7222, - 0x7222, 0x6212, 0x6212, 0x6212, 0x6212, 0x6122, 0x6122, 0x6122, - 0x6122, 0x6201, 0x6201, 0x6201, 0x6201, 0x6021, 0x6021, 0x6021, - 0x6021, 0x4112, 0x4112, 0x4112, 0x4112, 0x4112, 0x4112, 0x4112, - 0x4112, 0x4112, 0x4112, 0x4112, 0x4112, 0x4112, 0x4112, 0x4112, - 0x4112, 0x4101, 0x4101, 0x4101, 0x4101, 0x4101, 0x4101, 0x4101, - 0x4101, 0x4101, 0x4101, 0x4101, 0x4101, 0x4101, 0x4101, 0x4101, - 0x4101, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, - 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, - 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, - 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, - 0x3011, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0xf003, 0x3fe2, 0x3ef2, 0x3fd2, 0x3df2, 0x3fc2, 0x3cf2, - 0x3fb2, 0x3bf2, 0xf003, 0x2fa2, 0x2fa2, 0x3af2, 0x3f92, 0x39f2, - 0x38f2, 0x2f82, 0x2f82, 0xf002, 0x2f72, 0x27f2, 0x2f62, 0x26f2, - 0xf002, 0x2f52, 0x25f2, 0x1f42, 0x1f42, 0xf001, 0x14f2, 0x13f2, - 0xf004, 0x10f1, 0x10f1, 0x10f1, 0x10f1, 0x10f1, 0x10f1, 0x10f1, - 0x10f1, 0x2f32, 0x2f32, 0x2f32, 0x2f32, 0x00e2, 0x00f3, 0x00fc, - 0x0105, 0xf001, 0x1f22, 0x1f01, 0xf004, 0x00fa, 0x00ff, 0x0104, - 0x0109, 0x010c, 0x0111, 0x0116, 0x0119, 0x011e, 0x0123, 0x0128, - 0x43e2, 0x012d, 0x0130, 0x0133, 0x0136, 0xf004, 0x0128, 0x012b, - 0x012e, 0x4d01, 0x0131, 0x0134, 0x0137, 0x4c32, 0x013a, 0x4c12, - 0x40c1, 0x013d, 0x32e2, 0x32e2, 0x4e22, 0x4e12, 0xf004, 0x43d2, - 0x4d22, 0x42d2, 0x41d2, 0x4b32, 0x012f, 0x3d12, 0x3d12, 0x44c2, - 0x4b62, 0x43c2, 0x47a2, 0x3c22, 0x3c22, 0x42c2, 0x45b2, 0xf004, - 0x41c2, 0x4c01, 0x4b42, 0x44b2, 0x4a62, 0x46a2, 0x33b2, 0x33b2, - 0x4a52, 0x45a2, 0x3b22, 0x3b22, 0x32b2, 0x32b2, 0x3b12, 0x3b12, - 0xf004, 0x31b2, 0x31b2, 0x4b01, 0x40b1, 0x4962, 0x4692, 0x4a42, - 0x44a2, 0x4872, 0x4782, 0x33a2, 0x33a2, 0x4a32, 0x4952, 0x3a22, - 0x3a22, 0xf004, 0x4592, 0x4862, 0x31a2, 0x31a2, 0x4682, 0x4772, - 0x3492, 0x3492, 0x4942, 0x4752, 0x3762, 0x3762, 0x22a2, 0x22a2, - 0x22a2, 0x22a2, 0xf003, 0x2a12, 0x2a12, 0x3a01, 0x30a1, 0x3932, - 0x3392, 0x3852, 0x3582, 0xf003, 0x2922, 0x2922, 0x2292, 0x2292, - 0x3672, 0x3901, 0x2912, 0x2912, 0xf003, 0x2192, 0x2192, 0x3091, - 0x3842, 0x3482, 0x3572, 0x3832, 0x3382, 0xf003, 0x3662, 0x3822, - 0x2282, 0x2282, 0x3742, 0x3472, 0x2812, 0x2812, 0xf003, 0x2182, - 0x2182, 0x2081, 0x2081, 0x3801, 0x3652, 0x2732, 0x2732, 0xf003, - 0x2372, 0x2372, 0x3562, 0x3642, 0x2722, 0x2722, 0x2272, 0x2272, - 0xf003, 0x3462, 0x3552, 0x2701, 0x2701, 0x1712, 0x1712, 0x1712, - 0x1712, 0xf002, 0x1172, 0x1172, 0x2071, 0x2632, 0xf002, 0x2362, - 0x2542, 0x2452, 0x2622, 0xf001, 0x1262, 0x1612, 0xf002, 0x1162, - 0x1162, 0x2601, 0x2061, 0xf002, 0x1352, 0x1352, 0x2532, 0x2442, - 0xf001, 0x1522, 0x1252, 0xf001, 0x1512, 0x1501, 0xf001, 0x1432, - 0x1342, 0xf001, 0x1051, 0x1422, 0xf001, 0x1242, 0x1332, 0xf001, - 0x1401, 0x1041, 0xf004, 0x4ec2, 0x0086, 0x3ed2, 0x3ed2, 0x39e2, - 0x39e2, 0x4ae2, 0x49d2, 0x2ee2, 0x2ee2, 0x2ee2, 0x2ee2, 0x3de2, - 0x3de2, 0x3be2, 0x3be2, 0xf003, 0x2eb2, 0x2eb2, 0x2dc2, 0x2dc2, - 0x3cd2, 0x3bd2, 0x2ea2, 0x2ea2, 0xf003, 0x2cc2, 0x2cc2, 0x3da2, - 0x3ad2, 0x3e72, 0x3ca2, 0x2ac2, 0x2ac2, 0xf003, 0x39c2, 0x3d72, - 0x2e52, 0x2e52, 0x1db2, 0x1db2, 0x1db2, 0x1db2, 0xf002, 0x1e92, - 0x1e92, 0x2cb2, 0x2bc2, 0xf002, 0x2e82, 0x28e2, 0x2d92, 0x27e2, - 0xf002, 0x2bb2, 0x2d82, 0x28d2, 0x2e62, 0xf001, 0x16e2, 0x1c92, - 0xf002, 0x2ba2, 0x2ab2, 0x25e2, 0x27d2, 0xf002, 0x1e42, 0x1e42, - 0x24e2, 0x2c82, 0xf001, 0x18c2, 0x1e32, 0xf002, 0x1d62, 0x1d62, - 0x26d2, 0x2b92, 0xf002, 0x29b2, 0x2aa2, 0x11e2, 0x11e2, 0xf002, - 0x14d2, 0x14d2, 0x28b2, 0x29a2, 0xf002, 0x1b72, 0x1b72, 0x27b2, - 0x20d1, 0xf001, 0x1e01, 0x10e1, 0xf001, 0x1d52, 0x15d2, 0xf001, - 0x1c72, 0x17c2, 0xf001, 0x1d42, 0x1b82, 0xf001, 0x1a92, 0x1c62, - 0xf001, 0x16c2, 0x1d32, 0xf001, 0x1c52, 0x15c2, 0xf001, 0x1a82, - 0x18a2, 0xf001, 0x1992, 0x1c42, 0xf001, 0x16b2, 0x1a72, 0xf001, - 0x1b52, 0x1982, 0xf001, 0x1892, 0x1972, 0xf001, 0x1792, 0x1882, - 0xf001, 0x1ce2, 0x1dd2, - - /* huffTable24[705] */ - 0xf009, 0x8fe2, 0x8fe2, 0x8ef2, 0x8ef2, 0x8fd2, 0x8fd2, 0x8df2, - 0x8df2, 0x8fc2, 0x8fc2, 0x8cf2, 0x8cf2, 0x8fb2, 0x8fb2, 0x8bf2, - 0x8bf2, 0x7af2, 0x7af2, 0x7af2, 0x7af2, 0x8fa2, 0x8fa2, 0x8f92, - 0x8f92, 0x79f2, 0x79f2, 0x79f2, 0x79f2, 0x78f2, 0x78f2, 0x78f2, - 0x78f2, 0x8f82, 0x8f82, 0x8f72, 0x8f72, 0x77f2, 0x77f2, 0x77f2, - 0x77f2, 0x7f62, 0x7f62, 0x7f62, 0x7f62, 0x76f2, 0x76f2, 0x76f2, - 0x76f2, 0x7f52, 0x7f52, 0x7f52, 0x7f52, 0x75f2, 0x75f2, 0x75f2, - 0x75f2, 0x7f42, 0x7f42, 0x7f42, 0x7f42, 0x74f2, 0x74f2, 0x74f2, - 0x74f2, 0x7f32, 0x7f32, 0x7f32, 0x7f32, 0x73f2, 0x73f2, 0x73f2, - 0x73f2, 0x7f22, 0x7f22, 0x7f22, 0x7f22, 0x72f2, 0x72f2, 0x72f2, - 0x72f2, 0x71f2, 0x71f2, 0x71f2, 0x71f2, 0x8f12, 0x8f12, 0x80f1, - 0x80f1, 0x9f01, 0x0201, 0x0206, 0x020b, 0x0210, 0x0215, 0x021a, - 0x021f, 0x4ff2, 0x4ff2, 0x4ff2, 0x4ff2, 0x4ff2, 0x4ff2, 0x4ff2, - 0x4ff2, 0x4ff2, 0x4ff2, 0x4ff2, 0x4ff2, 0x4ff2, 0x4ff2, 0x4ff2, - 0x4ff2, 0x4ff2, 0x4ff2, 0x4ff2, 0x4ff2, 0x4ff2, 0x4ff2, 0x4ff2, - 0x4ff2, 0x4ff2, 0x4ff2, 0x4ff2, 0x4ff2, 0x4ff2, 0x4ff2, 0x4ff2, - 0x4ff2, 0x0224, 0x0229, 0x0232, 0x0237, 0x023a, 0x023f, 0x0242, - 0x0245, 0x024a, 0x024d, 0x0250, 0x0253, 0x0256, 0x0259, 0x025c, - 0x025f, 0x0262, 0x0265, 0x0268, 0x026b, 0x026e, 0x0271, 0x0274, - 0x0277, 0x027a, 0x027d, 0x0280, 0x0283, 0x0288, 0x028b, 0x028e, - 0x0291, 0x0294, 0x0297, 0x029a, 0x029f, 0x94b2, 0x02a4, 0x02a7, - 0x02aa, 0x93b2, 0x9882, 0x02af, 0x92b2, 0x02b2, 0x02b5, 0x9692, - 0x94a2, 0x02b8, 0x9782, 0x9a32, 0x93a2, 0x9952, 0x9592, 0x9a22, - 0x92a2, 0x91a2, 0x9862, 0x9682, 0x9772, 0x9942, 0x9492, 0x9932, - 0x9392, 0x9852, 0x9582, 0x9922, 0x9762, 0x9672, 0x9292, 0x9912, - 0x9192, 0x9842, 0x9482, 0x9752, 0x9572, 0x9832, 0x9382, 0x9662, - 0x9822, 0x9282, 0x9812, 0x9742, 0x9472, 0x9182, 0x02bb, 0x9652, - 0x9562, 0x9712, 0x02be, 0x8372, 0x8372, 0x9732, 0x9722, 0x8272, - 0x8272, 0x8642, 0x8642, 0x8462, 0x8462, 0x8552, 0x8552, 0x8172, - 0x8172, 0x8632, 0x8632, 0x8362, 0x8362, 0x8542, 0x8542, 0x8452, - 0x8452, 0x8622, 0x8622, 0x8262, 0x8262, 0x8612, 0x8612, 0x8162, - 0x8162, 0x9601, 0x9061, 0x8532, 0x8532, 0x8352, 0x8352, 0x8442, - 0x8442, 0x8522, 0x8522, 0x8252, 0x8252, 0x8512, 0x8512, 0x9501, - 0x9051, 0x7152, 0x7152, 0x7152, 0x7152, 0x8432, 0x8432, 0x8342, - 0x8342, 0x7422, 0x7422, 0x7422, 0x7422, 0x7242, 0x7242, 0x7242, - 0x7242, 0x7332, 0x7332, 0x7332, 0x7332, 0x7412, 0x7412, 0x7412, - 0x7412, 0x7142, 0x7142, 0x7142, 0x7142, 0x8401, 0x8401, 0x8041, - 0x8041, 0x7322, 0x7322, 0x7322, 0x7322, 0x7232, 0x7232, 0x7232, - 0x7232, 0x6312, 0x6312, 0x6312, 0x6312, 0x6312, 0x6312, 0x6312, - 0x6312, 0x6132, 0x6132, 0x6132, 0x6132, 0x6132, 0x6132, 0x6132, - 0x6132, 0x7301, 0x7301, 0x7301, 0x7301, 0x7031, 0x7031, 0x7031, - 0x7031, 0x6222, 0x6222, 0x6222, 0x6222, 0x6222, 0x6222, 0x6222, - 0x6222, 0x5212, 0x5212, 0x5212, 0x5212, 0x5212, 0x5212, 0x5212, - 0x5212, 0x5212, 0x5212, 0x5212, 0x5212, 0x5212, 0x5212, 0x5212, - 0x5212, 0x5122, 0x5122, 0x5122, 0x5122, 0x5122, 0x5122, 0x5122, - 0x5122, 0x5122, 0x5122, 0x5122, 0x5122, 0x5122, 0x5122, 0x5122, - 0x5122, 0x6201, 0x6201, 0x6201, 0x6201, 0x6201, 0x6201, 0x6201, - 0x6201, 0x6021, 0x6021, 0x6021, 0x6021, 0x6021, 0x6021, 0x6021, - 0x6021, 0x4112, 0x4112, 0x4112, 0x4112, 0x4112, 0x4112, 0x4112, - 0x4112, 0x4112, 0x4112, 0x4112, 0x4112, 0x4112, 0x4112, 0x4112, - 0x4112, 0x4112, 0x4112, 0x4112, 0x4112, 0x4112, 0x4112, 0x4112, - 0x4112, 0x4112, 0x4112, 0x4112, 0x4112, 0x4112, 0x4112, 0x4112, - 0x4112, 0x4101, 0x4101, 0x4101, 0x4101, 0x4101, 0x4101, 0x4101, - 0x4101, 0x4101, 0x4101, 0x4101, 0x4101, 0x4101, 0x4101, 0x4101, - 0x4101, 0x4101, 0x4101, 0x4101, 0x4101, 0x4101, 0x4101, 0x4101, - 0x4101, 0x4101, 0x4101, 0x4101, 0x4101, 0x4101, 0x4101, 0x4101, - 0x4101, 0x4011, 0x4011, 0x4011, 0x4011, 0x4011, 0x4011, 0x4011, - 0x4011, 0x4011, 0x4011, 0x4011, 0x4011, 0x4011, 0x4011, 0x4011, - 0x4011, 0x4011, 0x4011, 0x4011, 0x4011, 0x4011, 0x4011, 0x4011, - 0x4011, 0x4011, 0x4011, 0x4011, 0x4011, 0x4011, 0x4011, 0x4011, - 0x4011, 0x4000, 0x4000, 0x4000, 0x4000, 0x4000, 0x4000, 0x4000, - 0x4000, 0x4000, 0x4000, 0x4000, 0x4000, 0x4000, 0x4000, 0x4000, - 0x4000, 0x4000, 0x4000, 0x4000, 0x4000, 0x4000, 0x4000, 0x4000, - 0x4000, 0x4000, 0x4000, 0x4000, 0x4000, 0x4000, 0x4000, 0x4000, - 0x4000, 0xf002, 0x2ee2, 0x2ed2, 0x2de2, 0x2ec2, 0xf002, 0x2ce2, - 0x2dd2, 0x2eb2, 0x2be2, 0xf002, 0x2dc2, 0x2cd2, 0x2ea2, 0x2ae2, - 0xf002, 0x2db2, 0x2bd2, 0x2cc2, 0x2e92, 0xf002, 0x29e2, 0x2da2, - 0x2ad2, 0x2cb2, 0xf002, 0x2bc2, 0x2e82, 0x28e2, 0x2d92, 0xf002, - 0x29d2, 0x2e72, 0x27e2, 0x2ca2, 0xf002, 0x2ac2, 0x2bb2, 0x2d82, - 0x28d2, 0xf003, 0x3e01, 0x30e1, 0x2d01, 0x2d01, 0x16e2, 0x16e2, - 0x16e2, 0x16e2, 0xf002, 0x2e62, 0x2c92, 0x19c2, 0x19c2, 0xf001, - 0x1e52, 0x1ab2, 0xf002, 0x15e2, 0x15e2, 0x2ba2, 0x2d72, 0xf001, - 0x17d2, 0x14e2, 0xf001, 0x1c82, 0x18c2, 0xf002, 0x2e42, 0x2e22, - 0x1e32, 0x1e32, 0xf001, 0x1d62, 0x16d2, 0xf001, 0x13e2, 0x1b92, - 0xf001, 0x19b2, 0x1aa2, 0xf001, 0x12e2, 0x1e12, 0xf001, 0x11e2, - 0x1d52, 0xf001, 0x15d2, 0x1c72, 0xf001, 0x17c2, 0x1d42, 0xf001, - 0x1b82, 0x18b2, 0xf001, 0x14d2, 0x1a92, 0xf001, 0x19a2, 0x1c62, - 0xf001, 0x16c2, 0x1d32, 0xf001, 0x13d2, 0x1d22, 0xf001, 0x12d2, - 0x1d12, 0xf001, 0x1b72, 0x17b2, 0xf001, 0x11d2, 0x1c52, 0xf001, - 0x15c2, 0x1a82, 0xf001, 0x18a2, 0x1992, 0xf001, 0x1c42, 0x14c2, - 0xf001, 0x1b62, 0x16b2, 0xf002, 0x20d1, 0x2c01, 0x1c32, 0x1c32, - 0xf001, 0x13c2, 0x1a72, 0xf001, 0x17a2, 0x1c22, 0xf001, 0x12c2, - 0x1b52, 0xf001, 0x15b2, 0x1c12, 0xf001, 0x1982, 0x1892, 0xf001, - 0x11c2, 0x1b42, 0xf002, 0x20c1, 0x2b01, 0x1b32, 0x1b32, 0xf002, - 0x20b1, 0x2a01, 0x1a12, 0x1a12, 0xf001, 0x1a62, 0x16a2, 0xf001, - 0x1972, 0x1792, 0xf002, 0x20a1, 0x2901, 0x1091, 0x1091, 0xf001, - 0x1b22, 0x1a52, 0xf001, 0x15a2, 0x1b12, 0xf001, 0x11b2, 0x1962, - 0xf001, 0x1a42, 0x1872, 0xf001, 0x1801, 0x1081, 0xf001, 0x1701, - 0x1071, -}; - -#define HUFF_OFFSET_01 0 -#define HUFF_OFFSET_02 ( 9 + HUFF_OFFSET_01) -#define HUFF_OFFSET_03 ( 65 + HUFF_OFFSET_02) -#define HUFF_OFFSET_05 ( 65 + HUFF_OFFSET_03) -#define HUFF_OFFSET_06 (257 + HUFF_OFFSET_05) -#define HUFF_OFFSET_07 (129 + HUFF_OFFSET_06) -#define HUFF_OFFSET_08 (110 + HUFF_OFFSET_07) -#define HUFF_OFFSET_09 (280 + HUFF_OFFSET_08) -#define HUFF_OFFSET_10 ( 93 + HUFF_OFFSET_09) -#define HUFF_OFFSET_11 (320 + HUFF_OFFSET_10) -#define HUFF_OFFSET_12 (296 + HUFF_OFFSET_11) -#define HUFF_OFFSET_13 (185 + HUFF_OFFSET_12) -#define HUFF_OFFSET_15 (497 + HUFF_OFFSET_13) -#define HUFF_OFFSET_16 (580 + HUFF_OFFSET_15) -#define HUFF_OFFSET_24 (651 + HUFF_OFFSET_16) - -const int huffTabOffset[HUFF_PAIRTABS] = { - 0, - HUFF_OFFSET_01, - HUFF_OFFSET_02, - HUFF_OFFSET_03, - 0, - HUFF_OFFSET_05, - HUFF_OFFSET_06, - HUFF_OFFSET_07, - HUFF_OFFSET_08, - HUFF_OFFSET_09, - HUFF_OFFSET_10, - HUFF_OFFSET_11, - HUFF_OFFSET_12, - HUFF_OFFSET_13, - 0, - HUFF_OFFSET_15, - HUFF_OFFSET_16, - HUFF_OFFSET_16, - HUFF_OFFSET_16, - HUFF_OFFSET_16, - HUFF_OFFSET_16, - HUFF_OFFSET_16, - HUFF_OFFSET_16, - HUFF_OFFSET_16, - HUFF_OFFSET_24, - HUFF_OFFSET_24, - HUFF_OFFSET_24, - HUFF_OFFSET_24, - HUFF_OFFSET_24, - HUFF_OFFSET_24, - HUFF_OFFSET_24, - HUFF_OFFSET_24, -}; - -const HuffTabLookup huffTabLookup[HUFF_PAIRTABS] = { - { 0, noBits }, - { 0, oneShot }, - { 0, oneShot }, - { 0, oneShot }, - { 0, invalidTab }, - { 0, oneShot }, - { 0, oneShot }, - { 0, loopNoLinbits }, - { 0, loopNoLinbits }, - { 0, loopNoLinbits }, - { 0, loopNoLinbits }, - { 0, loopNoLinbits }, - { 0, loopNoLinbits }, - { 0, loopNoLinbits }, - { 0, invalidTab }, - { 0, loopNoLinbits }, - { 1, loopLinbits }, - { 2, loopLinbits }, - { 3, loopLinbits }, - { 4, loopLinbits }, - { 6, loopLinbits }, - { 8, loopLinbits }, - { 10, loopLinbits }, - { 13, loopLinbits }, - { 4, loopLinbits }, - { 5, loopLinbits }, - { 6, loopLinbits }, - { 7, loopLinbits }, - { 8, loopLinbits }, - { 9, loopLinbits }, - { 11, loopLinbits }, - { 13, loopLinbits }, -}; - -/* tables for quadruples - * format 0xAB - * A = length of codeword - * B = codeword - */ -const unsigned char quadTable[64+16] = { - /* table A */ - 0x6b, 0x6f, 0x6d, 0x6e, 0x67, 0x65, 0x59, 0x59, - 0x56, 0x56, 0x53, 0x53, 0x5a, 0x5a, 0x5c, 0x5c, - 0x42, 0x42, 0x42, 0x42, 0x41, 0x41, 0x41, 0x41, - 0x44, 0x44, 0x44, 0x44, 0x48, 0x48, 0x48, 0x48, - 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, - 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, - 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, - 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, - /* table B */ - 0x4f, 0x4e, 0x4d, 0x4c, 0x4b, 0x4a, 0x49, 0x48, - 0x47, 0x46, 0x45, 0x44, 0x43, 0x42, 0x41, 0x40, -}; - -const int quadTabOffset[2] = {0, 64}; -const int quadTabMaxBits[2] = {6, 4}; diff --git a/bsp/stm32_radio/mp3/real/hufftabs.c.bak b/bsp/stm32_radio/mp3/real/hufftabs.c.bak deleted file mode 100644 index 916e114f14..0000000000 --- a/bsp/stm32_radio/mp3/real/hufftabs.c.bak +++ /dev/null @@ -1,755 +0,0 @@ -/* ***** BEGIN LICENSE BLOCK ***** - * Version: RCSL 1.0/RPSL 1.0 - * - * Portions Copyright (c) 1995-2002 RealNetworks, Inc. All Rights Reserved. - * - * The contents of this file, and the files included with this file, are - * subject to the current version of the RealNetworks Public Source License - * Version 1.0 (the "RPSL") available at - * http://www.helixcommunity.org/content/rpsl unless you have licensed - * the file under the RealNetworks Community Source License Version 1.0 - * (the "RCSL") available at http://www.helixcommunity.org/content/rcsl, - * in which case the RCSL will apply. You may also obtain the license terms - * directly from RealNetworks. You may not use this file except in - * compliance with the RPSL or, if you have a valid RCSL with RealNetworks - * applicable to this file, the RCSL. Please see the applicable RPSL or - * RCSL for the rights, obligations and limitations governing use of the - * contents of the file. - * - * This file is part of the Helix DNA Technology. RealNetworks is the - * developer of the Original Code and owns the copyrights in the portions - * it created. - * - * This file, and the files included with this file, is distributed and made - * available on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER - * EXPRESS OR IMPLIED, AND REALNETWORKS HEREBY DISCLAIMS ALL SUCH WARRANTIES, - * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, FITNESS - * FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT. - * - * Technology Compatibility Kit Test Suite(s) Location: - * http://www.helixcommunity.org/content/tck - * - * Contributor(s): - * - * ***** END LICENSE BLOCK ***** */ - -/************************************************************************************** - * Fixed-point MP3 decoder - * Jon Recker (jrecker@real.com), Ken Cooke (kenc@real.com) - * June 2003 - * - * hufftabs.c - compressed Huffman code tables - **************************************************************************************/ - -#include "coder.h" - -/* NOTE - regenerated tables to use shorts instead of ints - * (all needed data can fit in 16 bits - see below) - * - * format 0xABCD - * A = length of codeword - * B = y value - * C = x value - * D = number of sign bits (0, 1, or 2) - * - * to read a CW, the code reads maxbits from the stream (dep. on - * table index), but doesn't remove them from the bitstream reader - * then it gets the correct CW by direct lookup into the table - * of length (2^maxbits) (more complicated for non-oneShot...) - * for CW's with hlen < maxbits, there are multiple entries in the - * table (extra bits are don't cares) - * the bitstream reader then "purges" (or removes) only the correct - * number of bits for the chosen CW - * - * entries starting with F are special: D (signbits) is maxbits, - * so the decoder always checks huffTableXX[0] first, gets the - * signbits, and reads that many bits from the bitstream - * (sometimes it takes > 1 read to get the value, so maxbits is - * can get updated by jumping to another value starting with 0xF) - * entries starting with 0 are also special: A = hlen = 0, rest of - * value is an offset to jump higher in the table (for tables of - * type loopNoLinbits or loopLinbits) - */ - -/* store Huffman codes as one big table plus table of offsets, since some platforms - * don't properly support table-of-tables (table of pointers to other const tables) - */ -const unsigned short huffTable[] = { - /* huffTable01[9] */ - 0xf003, 0x3112, 0x3101, 0x2011, 0x2011, 0x1000, 0x1000, 0x1000, - 0x1000, - - /* huffTable02[65] */ - 0xf006, 0x6222, 0x6201, 0x5212, 0x5212, 0x5122, 0x5122, 0x5021, - 0x5021, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, - 0x3112, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, - 0x3101, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, - 0x3011, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, - - /* huffTable03[65] */ - 0xf006, 0x6222, 0x6201, 0x5212, 0x5212, 0x5122, 0x5122, 0x5021, - 0x5021, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, - 0x3011, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, - 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, - 0x2112, 0x2101, 0x2101, 0x2101, 0x2101, 0x2101, 0x2101, 0x2101, - 0x2101, 0x2101, 0x2101, 0x2101, 0x2101, 0x2101, 0x2101, 0x2101, - 0x2101, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, - 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, - 0x2000, - - /* huffTable05[257] */ - 0xf008, 0x8332, 0x8322, 0x7232, 0x7232, 0x6132, 0x6132, 0x6132, - 0x6132, 0x7312, 0x7312, 0x7301, 0x7301, 0x7031, 0x7031, 0x7222, - 0x7222, 0x6212, 0x6212, 0x6212, 0x6212, 0x6122, 0x6122, 0x6122, - 0x6122, 0x6201, 0x6201, 0x6201, 0x6201, 0x6021, 0x6021, 0x6021, - 0x6021, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, - 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, - 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, - 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, - 0x3112, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, - 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, - 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, - 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, - 0x3101, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, - 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, - 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, - 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, - 0x3011, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, - - /* huffTable06[129] */ - 0xf007, 0x7332, 0x7301, 0x6322, 0x6322, 0x6232, 0x6232, 0x6031, - 0x6031, 0x5312, 0x5312, 0x5312, 0x5312, 0x5132, 0x5132, 0x5132, - 0x5132, 0x5222, 0x5222, 0x5222, 0x5222, 0x5201, 0x5201, 0x5201, - 0x5201, 0x4212, 0x4212, 0x4212, 0x4212, 0x4212, 0x4212, 0x4212, - 0x4212, 0x4122, 0x4122, 0x4122, 0x4122, 0x4122, 0x4122, 0x4122, - 0x4122, 0x4021, 0x4021, 0x4021, 0x4021, 0x4021, 0x4021, 0x4021, - 0x4021, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, - 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, - 0x3101, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, - 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, - 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, - 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, - 0x2112, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, - 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, - 0x3011, 0x3000, 0x3000, 0x3000, 0x3000, 0x3000, 0x3000, 0x3000, - 0x3000, 0x3000, 0x3000, 0x3000, 0x3000, 0x3000, 0x3000, 0x3000, - 0x3000, - - /* huffTable07[110] */ - 0xf006, 0x0041, 0x0052, 0x005b, 0x0060, 0x0063, 0x0068, 0x006b, - 0x6212, 0x5122, 0x5122, 0x6201, 0x6021, 0x4112, 0x4112, 0x4112, - 0x4112, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, - 0x3101, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, - 0x3011, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0xf004, 0x4552, 0x4542, 0x4452, 0x4352, 0x3532, 0x3532, - 0x3442, 0x3442, 0x3522, 0x3522, 0x3252, 0x3252, 0x2512, 0x2512, - 0x2512, 0x2512, 0xf003, 0x2152, 0x2152, 0x3501, 0x3432, 0x2051, - 0x2051, 0x3342, 0x3332, 0xf002, 0x2422, 0x2242, 0x1412, 0x1412, - 0xf001, 0x1142, 0x1041, 0xf002, 0x2401, 0x2322, 0x2232, 0x2301, - 0xf001, 0x1312, 0x1132, 0xf001, 0x1031, 0x1222, - - /* huffTable08[280] */ - 0xf008, 0x0101, 0x010a, 0x010f, 0x8512, 0x8152, 0x0112, 0x0115, - 0x8422, 0x8242, 0x8412, 0x7142, 0x7142, 0x8401, 0x8041, 0x8322, - 0x8232, 0x8312, 0x8132, 0x8301, 0x8031, 0x6222, 0x6222, 0x6222, - 0x6222, 0x6201, 0x6201, 0x6201, 0x6201, 0x6021, 0x6021, 0x6021, - 0x6021, 0x4212, 0x4212, 0x4212, 0x4212, 0x4212, 0x4212, 0x4212, - 0x4212, 0x4212, 0x4212, 0x4212, 0x4212, 0x4212, 0x4212, 0x4212, - 0x4212, 0x4122, 0x4122, 0x4122, 0x4122, 0x4122, 0x4122, 0x4122, - 0x4122, 0x4122, 0x4122, 0x4122, 0x4122, 0x4122, 0x4122, 0x4122, - 0x4122, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, - 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, - 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, - 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, - 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, - 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, - 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, - 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, - 0x2112, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, - 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, - 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, - 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, - 0x3101, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, - 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, - 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, - 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, - 0x3011, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, - 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, - 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, - 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, - 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, - 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, - 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, - 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, - 0x2000, 0xf003, 0x3552, 0x3452, 0x2542, 0x2542, 0x1352, 0x1352, - 0x1352, 0x1352, 0xf002, 0x2532, 0x2442, 0x1522, 0x1522, 0xf001, - 0x1252, 0x1501, 0xf001, 0x1432, 0x1342, 0xf001, 0x1051, 0x1332, - - /* huffTable09[93] */ - 0xf006, 0x0041, 0x004a, 0x004f, 0x0052, 0x0057, 0x005a, 0x6412, - 0x6142, 0x6322, 0x6232, 0x5312, 0x5312, 0x5132, 0x5132, 0x6301, - 0x6031, 0x5222, 0x5222, 0x5201, 0x5201, 0x4212, 0x4212, 0x4212, - 0x4212, 0x4122, 0x4122, 0x4122, 0x4122, 0x4021, 0x4021, 0x4021, - 0x4021, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, - 0x3112, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, - 0x3101, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, - 0x3011, 0x3000, 0x3000, 0x3000, 0x3000, 0x3000, 0x3000, 0x3000, - 0x3000, 0xf003, 0x3552, 0x3542, 0x2532, 0x2532, 0x2352, 0x2352, - 0x3452, 0x3501, 0xf002, 0x2442, 0x2522, 0x2252, 0x2512, 0xf001, - 0x1152, 0x1432, 0xf002, 0x1342, 0x1342, 0x2051, 0x2401, 0xf001, - 0x1422, 0x1242, 0xf001, 0x1332, 0x1041, - - /* huffTable10[320] */ - 0xf008, 0x0101, 0x010a, 0x010f, 0x0118, 0x011b, 0x0120, 0x0125, - 0x8712, 0x8172, 0x012a, 0x012d, 0x0132, 0x8612, 0x8162, 0x8061, - 0x0137, 0x013a, 0x013d, 0x8412, 0x8142, 0x8041, 0x8322, 0x8232, - 0x8301, 0x7312, 0x7312, 0x7132, 0x7132, 0x7031, 0x7031, 0x7222, - 0x7222, 0x6212, 0x6212, 0x6212, 0x6212, 0x6122, 0x6122, 0x6122, - 0x6122, 0x6201, 0x6201, 0x6201, 0x6201, 0x6021, 0x6021, 0x6021, - 0x6021, 0x4112, 0x4112, 0x4112, 0x4112, 0x4112, 0x4112, 0x4112, - 0x4112, 0x4112, 0x4112, 0x4112, 0x4112, 0x4112, 0x4112, 0x4112, - 0x4112, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, - 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, - 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, - 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, - 0x3101, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, - 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, - 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, - 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, - 0x3011, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0xf003, 0x3772, 0x3762, 0x3672, 0x3752, 0x3572, 0x3662, - 0x2742, 0x2742, 0xf002, 0x2472, 0x2652, 0x2562, 0x2732, 0xf003, - 0x2372, 0x2372, 0x2642, 0x2642, 0x3552, 0x3452, 0x2362, 0x2362, - 0xf001, 0x1722, 0x1272, 0xf002, 0x2462, 0x2701, 0x1071, 0x1071, - 0xf002, 0x1262, 0x1262, 0x2542, 0x2532, 0xf002, 0x1601, 0x1601, - 0x2352, 0x2442, 0xf001, 0x1632, 0x1622, 0xf002, 0x2522, 0x2252, - 0x1512, 0x1512, 0xf002, 0x1152, 0x1152, 0x2432, 0x2342, 0xf001, - 0x1501, 0x1051, 0xf001, 0x1422, 0x1242, 0xf001, 0x1332, 0x1401, - - /* huffTable11[296] */ - 0xf008, 0x0101, 0x0106, 0x010f, 0x0114, 0x0117, 0x8722, 0x8272, - 0x011c, 0x7172, 0x7172, 0x8712, 0x8071, 0x8632, 0x8362, 0x8061, - 0x011f, 0x0122, 0x8512, 0x7262, 0x7262, 0x8622, 0x8601, 0x7612, - 0x7612, 0x7162, 0x7162, 0x8152, 0x8432, 0x8051, 0x0125, 0x8422, - 0x8242, 0x8412, 0x8142, 0x8401, 0x8041, 0x7322, 0x7322, 0x7232, - 0x7232, 0x6312, 0x6312, 0x6312, 0x6312, 0x6132, 0x6132, 0x6132, - 0x6132, 0x7301, 0x7301, 0x7031, 0x7031, 0x6222, 0x6222, 0x6222, - 0x6222, 0x5122, 0x5122, 0x5122, 0x5122, 0x5122, 0x5122, 0x5122, - 0x5122, 0x4212, 0x4212, 0x4212, 0x4212, 0x4212, 0x4212, 0x4212, - 0x4212, 0x4212, 0x4212, 0x4212, 0x4212, 0x4212, 0x4212, 0x4212, - 0x4212, 0x5201, 0x5201, 0x5201, 0x5201, 0x5201, 0x5201, 0x5201, - 0x5201, 0x5021, 0x5021, 0x5021, 0x5021, 0x5021, 0x5021, 0x5021, - 0x5021, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, - 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, - 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, - 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, - 0x3112, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, - 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, - 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, - 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, - 0x3101, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, - 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, - 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, - 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, - 0x3011, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, - 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, - 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, - 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, - 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, - 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, - 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, - 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, - 0x2000, 0xf002, 0x2772, 0x2762, 0x2672, 0x2572, 0xf003, 0x2662, - 0x2662, 0x2742, 0x2742, 0x2472, 0x2472, 0x3752, 0x3552, 0xf002, - 0x2652, 0x2562, 0x1732, 0x1732, 0xf001, 0x1372, 0x1642, 0xf002, - 0x2542, 0x2452, 0x2532, 0x2352, 0xf001, 0x1462, 0x1701, 0xf001, - 0x1442, 0x1522, 0xf001, 0x1252, 0x1501, 0xf001, 0x1342, 0x1332, - - /* huffTable12[185] */ - 0xf007, 0x0081, 0x008a, 0x008f, 0x0092, 0x0097, 0x009a, 0x009d, - 0x00a2, 0x00a5, 0x00a8, 0x7622, 0x7262, 0x7162, 0x00ad, 0x00b0, - 0x00b3, 0x7512, 0x7152, 0x7432, 0x7342, 0x00b6, 0x7422, 0x7242, - 0x7412, 0x6332, 0x6332, 0x6142, 0x6142, 0x6322, 0x6322, 0x6232, - 0x6232, 0x7041, 0x7301, 0x6031, 0x6031, 0x5312, 0x5312, 0x5312, - 0x5312, 0x5132, 0x5132, 0x5132, 0x5132, 0x5222, 0x5222, 0x5222, - 0x5222, 0x4212, 0x4212, 0x4212, 0x4212, 0x4212, 0x4212, 0x4212, - 0x4212, 0x4122, 0x4122, 0x4122, 0x4122, 0x4122, 0x4122, 0x4122, - 0x4122, 0x5201, 0x5201, 0x5201, 0x5201, 0x5021, 0x5021, 0x5021, - 0x5021, 0x4000, 0x4000, 0x4000, 0x4000, 0x4000, 0x4000, 0x4000, - 0x4000, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, - 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, - 0x3112, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, - 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, - 0x3101, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, - 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, - 0x3011, 0xf003, 0x3772, 0x3762, 0x2672, 0x2672, 0x2752, 0x2752, - 0x2572, 0x2572, 0xf002, 0x2662, 0x2742, 0x2472, 0x2562, 0xf001, - 0x1652, 0x1732, 0xf002, 0x2372, 0x2552, 0x1722, 0x1722, 0xf001, - 0x1272, 0x1642, 0xf001, 0x1462, 0x1712, 0xf002, 0x1172, 0x1172, - 0x2701, 0x2071, 0xf001, 0x1632, 0x1362, 0xf001, 0x1542, 0x1452, - 0xf002, 0x1442, 0x1442, 0x2601, 0x2501, 0xf001, 0x1612, 0x1061, - 0xf001, 0x1532, 0x1352, 0xf001, 0x1522, 0x1252, 0xf001, 0x1051, - 0x1401, - - /* huffTable13[497] */ - 0xf006, 0x0041, 0x0082, 0x00c3, 0x00e4, 0x0105, 0x0116, 0x011f, - 0x0130, 0x0139, 0x013e, 0x0143, 0x0146, 0x6212, 0x6122, 0x6201, - 0x6021, 0x4112, 0x4112, 0x4112, 0x4112, 0x4101, 0x4101, 0x4101, - 0x4101, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, - 0x3011, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0xf006, 0x0108, 0x0111, 0x011a, 0x0123, 0x012c, 0x0131, - 0x0136, 0x013f, 0x0144, 0x0147, 0x014c, 0x0151, 0x0156, 0x015b, - 0x6f12, 0x61f2, 0x60f1, 0x0160, 0x0163, 0x0166, 0x62e2, 0x0169, - 0x6e12, 0x61e2, 0x016c, 0x016f, 0x0172, 0x0175, 0x0178, 0x017b, - 0x66c2, 0x6d32, 0x017e, 0x6d22, 0x62d2, 0x6d12, 0x67b2, 0x0181, - 0x0184, 0x63c2, 0x0187, 0x6b42, 0x51d2, 0x51d2, 0x6d01, 0x60d1, - 0x6a82, 0x68a2, 0x6c42, 0x64c2, 0x6b62, 0x66b2, 0x5c32, 0x5c32, - 0x5c22, 0x5c22, 0x52c2, 0x52c2, 0x5b52, 0x5b52, 0x65b2, 0x6982, - 0x5c12, 0x5c12, 0xf006, 0x51c2, 0x51c2, 0x6892, 0x6c01, 0x50c1, - 0x50c1, 0x64b2, 0x6a62, 0x66a2, 0x6972, 0x5b32, 0x5b32, 0x53b2, - 0x53b2, 0x6882, 0x6a52, 0x5b22, 0x5b22, 0x65a2, 0x6962, 0x54a2, - 0x54a2, 0x6872, 0x6782, 0x5492, 0x5492, 0x6772, 0x6672, 0x42b2, - 0x42b2, 0x42b2, 0x42b2, 0x4b12, 0x4b12, 0x4b12, 0x4b12, 0x41b2, - 0x41b2, 0x41b2, 0x41b2, 0x5b01, 0x5b01, 0x50b1, 0x50b1, 0x5692, - 0x5692, 0x5a42, 0x5a42, 0x5a32, 0x5a32, 0x53a2, 0x53a2, 0x5952, - 0x5952, 0x5592, 0x5592, 0x4a22, 0x4a22, 0x4a22, 0x4a22, 0x42a2, - 0x42a2, 0x42a2, 0x42a2, 0xf005, 0x4a12, 0x4a12, 0x41a2, 0x41a2, - 0x5a01, 0x5862, 0x40a1, 0x40a1, 0x5682, 0x5942, 0x4392, 0x4392, - 0x5932, 0x5852, 0x5582, 0x5762, 0x4922, 0x4922, 0x4292, 0x4292, - 0x5752, 0x5572, 0x4832, 0x4832, 0x4382, 0x4382, 0x5662, 0x5742, - 0x5472, 0x5652, 0x5562, 0x5372, 0xf005, 0x3912, 0x3912, 0x3912, - 0x3912, 0x3192, 0x3192, 0x3192, 0x3192, 0x4901, 0x4901, 0x4091, - 0x4091, 0x4842, 0x4842, 0x4482, 0x4482, 0x4272, 0x4272, 0x5642, - 0x5462, 0x3822, 0x3822, 0x3822, 0x3822, 0x3282, 0x3282, 0x3282, - 0x3282, 0x3812, 0x3812, 0x3812, 0x3812, 0xf004, 0x4732, 0x4722, - 0x3712, 0x3712, 0x3172, 0x3172, 0x4552, 0x4701, 0x4071, 0x4632, - 0x4362, 0x4542, 0x4452, 0x4622, 0x4262, 0x4532, 0xf003, 0x2182, - 0x2182, 0x3801, 0x3081, 0x3612, 0x3162, 0x3601, 0x3061, 0xf004, - 0x4352, 0x4442, 0x3522, 0x3522, 0x3252, 0x3252, 0x3501, 0x3501, - 0x2512, 0x2512, 0x2512, 0x2512, 0x2152, 0x2152, 0x2152, 0x2152, - 0xf003, 0x3432, 0x3342, 0x3051, 0x3422, 0x3242, 0x3332, 0x2412, - 0x2412, 0xf002, 0x1142, 0x1142, 0x2401, 0x2041, 0xf002, 0x2322, - 0x2232, 0x1312, 0x1312, 0xf001, 0x1132, 0x1301, 0xf001, 0x1031, - 0x1222, 0xf003, 0x0082, 0x008b, 0x008e, 0x0091, 0x0094, 0x0097, - 0x3ce2, 0x3dd2, 0xf003, 0x0093, 0x3eb2, 0x3be2, 0x3f92, 0x39f2, - 0x3ae2, 0x3db2, 0x3bd2, 0xf003, 0x3f82, 0x38f2, 0x3cc2, 0x008d, - 0x3e82, 0x0090, 0x27f2, 0x27f2, 0xf003, 0x2ad2, 0x2ad2, 0x3da2, - 0x3cb2, 0x3bc2, 0x36f2, 0x2f62, 0x2f62, 0xf002, 0x28e2, 0x2f52, - 0x2d92, 0x29d2, 0xf002, 0x25f2, 0x27e2, 0x2ca2, 0x2bb2, 0xf003, - 0x2f42, 0x2f42, 0x24f2, 0x24f2, 0x3ac2, 0x36e2, 0x23f2, 0x23f2, - 0xf002, 0x1f32, 0x1f32, 0x2d82, 0x28d2, 0xf001, 0x1f22, 0x12f2, - 0xf002, 0x2e62, 0x2c92, 0x1f01, 0x1f01, 0xf002, 0x29c2, 0x2e52, - 0x1ba2, 0x1ba2, 0xf002, 0x2d72, 0x27d2, 0x1e42, 0x1e42, 0xf002, - 0x28c2, 0x26d2, 0x1e32, 0x1e32, 0xf002, 0x19b2, 0x19b2, 0x2b92, - 0x2aa2, 0xf001, 0x1ab2, 0x15e2, 0xf001, 0x14e2, 0x1c82, 0xf001, - 0x1d62, 0x13e2, 0xf001, 0x1e22, 0x1e01, 0xf001, 0x10e1, 0x1d52, - 0xf001, 0x15d2, 0x1c72, 0xf001, 0x17c2, 0x1d42, 0xf001, 0x1b82, - 0x18b2, 0xf001, 0x14d2, 0x1a92, 0xf001, 0x19a2, 0x1c62, 0xf001, - 0x13d2, 0x1b72, 0xf001, 0x1c52, 0x15c2, 0xf001, 0x1992, 0x1a72, - 0xf001, 0x17a2, 0x1792, 0xf003, 0x0023, 0x3df2, 0x2de2, 0x2de2, - 0x1ff2, 0x1ff2, 0x1ff2, 0x1ff2, 0xf001, 0x1fe2, 0x1fd2, 0xf001, - 0x1ee2, 0x1fc2, 0xf001, 0x1ed2, 0x1fb2, 0xf001, 0x1bf2, 0x1ec2, - 0xf002, 0x1cd2, 0x1cd2, 0x2fa2, 0x29e2, 0xf001, 0x1af2, 0x1dc2, - 0xf001, 0x1ea2, 0x1e92, 0xf001, 0x1f72, 0x1e72, 0xf001, 0x1ef2, - 0x1cf2, - - /* huffTable15[580] */ - 0xf008, 0x0101, 0x0122, 0x0143, 0x0154, 0x0165, 0x0176, 0x017f, - 0x0188, 0x0199, 0x01a2, 0x01ab, 0x01b4, 0x01bd, 0x01c2, 0x01cb, - 0x01d4, 0x01d9, 0x01de, 0x01e3, 0x01e8, 0x01ed, 0x01f2, 0x01f7, - 0x01fc, 0x0201, 0x0204, 0x0207, 0x020a, 0x020f, 0x0212, 0x0215, - 0x021a, 0x021d, 0x0220, 0x8192, 0x0223, 0x0226, 0x0229, 0x022c, - 0x022f, 0x8822, 0x8282, 0x8812, 0x8182, 0x0232, 0x0235, 0x0238, - 0x023b, 0x8722, 0x8272, 0x8462, 0x8712, 0x8552, 0x8172, 0x023e, - 0x8632, 0x8362, 0x8542, 0x8452, 0x8622, 0x8262, 0x8612, 0x0241, - 0x8532, 0x7162, 0x7162, 0x8352, 0x8442, 0x7522, 0x7522, 0x7252, - 0x7252, 0x7512, 0x7512, 0x7152, 0x7152, 0x8501, 0x8051, 0x7432, - 0x7432, 0x7342, 0x7342, 0x7422, 0x7422, 0x7242, 0x7242, 0x7332, - 0x7332, 0x6142, 0x6142, 0x6142, 0x6142, 0x7412, 0x7412, 0x7401, - 0x7401, 0x6322, 0x6322, 0x6322, 0x6322, 0x6232, 0x6232, 0x6232, - 0x6232, 0x7041, 0x7041, 0x7301, 0x7301, 0x6312, 0x6312, 0x6312, - 0x6312, 0x6132, 0x6132, 0x6132, 0x6132, 0x6031, 0x6031, 0x6031, - 0x6031, 0x5222, 0x5222, 0x5222, 0x5222, 0x5222, 0x5222, 0x5222, - 0x5222, 0x5212, 0x5212, 0x5212, 0x5212, 0x5212, 0x5212, 0x5212, - 0x5212, 0x5122, 0x5122, 0x5122, 0x5122, 0x5122, 0x5122, 0x5122, - 0x5122, 0x5201, 0x5201, 0x5201, 0x5201, 0x5201, 0x5201, 0x5201, - 0x5201, 0x5021, 0x5021, 0x5021, 0x5021, 0x5021, 0x5021, 0x5021, - 0x5021, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, - 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, - 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, - 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, - 0x3112, 0x4101, 0x4101, 0x4101, 0x4101, 0x4101, 0x4101, 0x4101, - 0x4101, 0x4101, 0x4101, 0x4101, 0x4101, 0x4101, 0x4101, 0x4101, - 0x4101, 0x4011, 0x4011, 0x4011, 0x4011, 0x4011, 0x4011, 0x4011, - 0x4011, 0x4011, 0x4011, 0x4011, 0x4011, 0x4011, 0x4011, 0x4011, - 0x4011, 0x3000, 0x3000, 0x3000, 0x3000, 0x3000, 0x3000, 0x3000, - 0x3000, 0x3000, 0x3000, 0x3000, 0x3000, 0x3000, 0x3000, 0x3000, - 0x3000, 0x3000, 0x3000, 0x3000, 0x3000, 0x3000, 0x3000, 0x3000, - 0x3000, 0x3000, 0x3000, 0x3000, 0x3000, 0x3000, 0x3000, 0x3000, - 0x3000, 0xf005, 0x5ff2, 0x5fe2, 0x5ef2, 0x5fd2, 0x4ee2, 0x4ee2, - 0x5df2, 0x5fc2, 0x5cf2, 0x5ed2, 0x5de2, 0x5fb2, 0x4bf2, 0x4bf2, - 0x5ec2, 0x5ce2, 0x4dd2, 0x4dd2, 0x4fa2, 0x4fa2, 0x4af2, 0x4af2, - 0x4eb2, 0x4eb2, 0x4be2, 0x4be2, 0x4dc2, 0x4dc2, 0x4cd2, 0x4cd2, - 0x4f92, 0x4f92, 0xf005, 0x49f2, 0x49f2, 0x4ae2, 0x4ae2, 0x4db2, - 0x4db2, 0x4bd2, 0x4bd2, 0x4f82, 0x4f82, 0x48f2, 0x48f2, 0x4cc2, - 0x4cc2, 0x4e92, 0x4e92, 0x49e2, 0x49e2, 0x4f72, 0x4f72, 0x47f2, - 0x47f2, 0x4da2, 0x4da2, 0x4ad2, 0x4ad2, 0x4cb2, 0x4cb2, 0x4f62, - 0x4f62, 0x5ea2, 0x5f01, 0xf004, 0x3bc2, 0x3bc2, 0x36f2, 0x36f2, - 0x4e82, 0x48e2, 0x4f52, 0x4d92, 0x35f2, 0x35f2, 0x3e72, 0x3e72, - 0x37e2, 0x37e2, 0x3ca2, 0x3ca2, 0xf004, 0x3ac2, 0x3ac2, 0x3bb2, - 0x3bb2, 0x49d2, 0x4d82, 0x3f42, 0x3f42, 0x34f2, 0x34f2, 0x3f32, - 0x3f32, 0x33f2, 0x33f2, 0x38d2, 0x38d2, 0xf004, 0x36e2, 0x36e2, - 0x3f22, 0x3f22, 0x32f2, 0x32f2, 0x4e62, 0x40f1, 0x3f12, 0x3f12, - 0x31f2, 0x31f2, 0x3c92, 0x3c92, 0x39c2, 0x39c2, 0xf003, 0x3e52, - 0x3ba2, 0x3ab2, 0x35e2, 0x3d72, 0x37d2, 0x3e42, 0x34e2, 0xf003, - 0x3c82, 0x38c2, 0x3e32, 0x3d62, 0x36d2, 0x33e2, 0x3b92, 0x39b2, - 0xf004, 0x3e22, 0x3e22, 0x3aa2, 0x3aa2, 0x32e2, 0x32e2, 0x3e12, - 0x3e12, 0x31e2, 0x31e2, 0x4e01, 0x40e1, 0x3d52, 0x3d52, 0x35d2, - 0x35d2, 0xf003, 0x3c72, 0x37c2, 0x3d42, 0x3b82, 0x24d2, 0x24d2, - 0x38b2, 0x3a92, 0xf003, 0x39a2, 0x3c62, 0x36c2, 0x3d32, 0x23d2, - 0x23d2, 0x22d2, 0x22d2, 0xf003, 0x3d22, 0x3d01, 0x2d12, 0x2d12, - 0x2b72, 0x2b72, 0x27b2, 0x27b2, 0xf003, 0x21d2, 0x21d2, 0x3c52, - 0x30d1, 0x25c2, 0x25c2, 0x2a82, 0x2a82, 0xf002, 0x28a2, 0x2c42, - 0x24c2, 0x2b62, 0xf003, 0x26b2, 0x26b2, 0x3992, 0x3c01, 0x2c32, - 0x2c32, 0x23c2, 0x23c2, 0xf003, 0x2a72, 0x2a72, 0x27a2, 0x27a2, - 0x26a2, 0x26a2, 0x30c1, 0x3b01, 0xf002, 0x12c2, 0x12c2, 0x2c22, - 0x2b52, 0xf002, 0x25b2, 0x2c12, 0x2982, 0x2892, 0xf002, 0x21c2, - 0x2b42, 0x24b2, 0x2a62, 0xf002, 0x2b32, 0x2972, 0x13b2, 0x13b2, - 0xf002, 0x2792, 0x2882, 0x2b22, 0x2a52, 0xf002, 0x12b2, 0x12b2, - 0x25a2, 0x2b12, 0xf002, 0x11b2, 0x11b2, 0x20b1, 0x2962, 0xf002, - 0x2692, 0x2a42, 0x24a2, 0x2872, 0xf002, 0x2782, 0x2a32, 0x13a2, - 0x13a2, 0xf001, 0x1952, 0x1592, 0xf001, 0x1a22, 0x12a2, 0xf001, - 0x1a12, 0x11a2, 0xf002, 0x2a01, 0x20a1, 0x1862, 0x1862, 0xf001, - 0x1682, 0x1942, 0xf001, 0x1492, 0x1932, 0xf002, 0x1392, 0x1392, - 0x2772, 0x2901, 0xf001, 0x1852, 0x1582, 0xf001, 0x1922, 0x1762, - 0xf001, 0x1672, 0x1292, 0xf001, 0x1912, 0x1091, 0xf001, 0x1842, - 0x1482, 0xf001, 0x1752, 0x1572, 0xf001, 0x1832, 0x1382, 0xf001, - 0x1662, 0x1742, 0xf001, 0x1472, 0x1801, 0xf001, 0x1081, 0x1652, - 0xf001, 0x1562, 0x1732, 0xf001, 0x1372, 0x1642, 0xf001, 0x1701, - 0x1071, 0xf001, 0x1601, 0x1061, - - /* huffTable16[651] */ - 0xf008, 0x0101, 0x010a, 0x0113, 0x8ff2, 0x0118, 0x011d, 0x0120, - 0x82f2, 0x0131, 0x8f12, 0x81f2, 0x0134, 0x0145, 0x0156, 0x0167, - 0x0178, 0x0189, 0x019a, 0x01a3, 0x01ac, 0x01b5, 0x01be, 0x01c7, - 0x01d0, 0x01d9, 0x01de, 0x01e3, 0x01e6, 0x01eb, 0x01f0, 0x8152, - 0x01f3, 0x01f6, 0x01f9, 0x01fc, 0x8412, 0x8142, 0x01ff, 0x8322, - 0x8232, 0x7312, 0x7312, 0x7132, 0x7132, 0x8301, 0x8031, 0x7222, - 0x7222, 0x6212, 0x6212, 0x6212, 0x6212, 0x6122, 0x6122, 0x6122, - 0x6122, 0x6201, 0x6201, 0x6201, 0x6201, 0x6021, 0x6021, 0x6021, - 0x6021, 0x4112, 0x4112, 0x4112, 0x4112, 0x4112, 0x4112, 0x4112, - 0x4112, 0x4112, 0x4112, 0x4112, 0x4112, 0x4112, 0x4112, 0x4112, - 0x4112, 0x4101, 0x4101, 0x4101, 0x4101, 0x4101, 0x4101, 0x4101, - 0x4101, 0x4101, 0x4101, 0x4101, 0x4101, 0x4101, 0x4101, 0x4101, - 0x4101, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, - 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, - 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, - 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, - 0x3011, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, - 0x1000, 0xf003, 0x3fe2, 0x3ef2, 0x3fd2, 0x3df2, 0x3fc2, 0x3cf2, - 0x3fb2, 0x3bf2, 0xf003, 0x2fa2, 0x2fa2, 0x3af2, 0x3f92, 0x39f2, - 0x38f2, 0x2f82, 0x2f82, 0xf002, 0x2f72, 0x27f2, 0x2f62, 0x26f2, - 0xf002, 0x2f52, 0x25f2, 0x1f42, 0x1f42, 0xf001, 0x14f2, 0x13f2, - 0xf004, 0x10f1, 0x10f1, 0x10f1, 0x10f1, 0x10f1, 0x10f1, 0x10f1, - 0x10f1, 0x2f32, 0x2f32, 0x2f32, 0x2f32, 0x00e2, 0x00f3, 0x00fc, - 0x0105, 0xf001, 0x1f22, 0x1f01, 0xf004, 0x00fa, 0x00ff, 0x0104, - 0x0109, 0x010c, 0x0111, 0x0116, 0x0119, 0x011e, 0x0123, 0x0128, - 0x43e2, 0x012d, 0x0130, 0x0133, 0x0136, 0xf004, 0x0128, 0x012b, - 0x012e, 0x4d01, 0x0131, 0x0134, 0x0137, 0x4c32, 0x013a, 0x4c12, - 0x40c1, 0x013d, 0x32e2, 0x32e2, 0x4e22, 0x4e12, 0xf004, 0x43d2, - 0x4d22, 0x42d2, 0x41d2, 0x4b32, 0x012f, 0x3d12, 0x3d12, 0x44c2, - 0x4b62, 0x43c2, 0x47a2, 0x3c22, 0x3c22, 0x42c2, 0x45b2, 0xf004, - 0x41c2, 0x4c01, 0x4b42, 0x44b2, 0x4a62, 0x46a2, 0x33b2, 0x33b2, - 0x4a52, 0x45a2, 0x3b22, 0x3b22, 0x32b2, 0x32b2, 0x3b12, 0x3b12, - 0xf004, 0x31b2, 0x31b2, 0x4b01, 0x40b1, 0x4962, 0x4692, 0x4a42, - 0x44a2, 0x4872, 0x4782, 0x33a2, 0x33a2, 0x4a32, 0x4952, 0x3a22, - 0x3a22, 0xf004, 0x4592, 0x4862, 0x31a2, 0x31a2, 0x4682, 0x4772, - 0x3492, 0x3492, 0x4942, 0x4752, 0x3762, 0x3762, 0x22a2, 0x22a2, - 0x22a2, 0x22a2, 0xf003, 0x2a12, 0x2a12, 0x3a01, 0x30a1, 0x3932, - 0x3392, 0x3852, 0x3582, 0xf003, 0x2922, 0x2922, 0x2292, 0x2292, - 0x3672, 0x3901, 0x2912, 0x2912, 0xf003, 0x2192, 0x2192, 0x3091, - 0x3842, 0x3482, 0x3572, 0x3832, 0x3382, 0xf003, 0x3662, 0x3822, - 0x2282, 0x2282, 0x3742, 0x3472, 0x2812, 0x2812, 0xf003, 0x2182, - 0x2182, 0x2081, 0x2081, 0x3801, 0x3652, 0x2732, 0x2732, 0xf003, - 0x2372, 0x2372, 0x3562, 0x3642, 0x2722, 0x2722, 0x2272, 0x2272, - 0xf003, 0x3462, 0x3552, 0x2701, 0x2701, 0x1712, 0x1712, 0x1712, - 0x1712, 0xf002, 0x1172, 0x1172, 0x2071, 0x2632, 0xf002, 0x2362, - 0x2542, 0x2452, 0x2622, 0xf001, 0x1262, 0x1612, 0xf002, 0x1162, - 0x1162, 0x2601, 0x2061, 0xf002, 0x1352, 0x1352, 0x2532, 0x2442, - 0xf001, 0x1522, 0x1252, 0xf001, 0x1512, 0x1501, 0xf001, 0x1432, - 0x1342, 0xf001, 0x1051, 0x1422, 0xf001, 0x1242, 0x1332, 0xf001, - 0x1401, 0x1041, 0xf004, 0x4ec2, 0x0086, 0x3ed2, 0x3ed2, 0x39e2, - 0x39e2, 0x4ae2, 0x49d2, 0x2ee2, 0x2ee2, 0x2ee2, 0x2ee2, 0x3de2, - 0x3de2, 0x3be2, 0x3be2, 0xf003, 0x2eb2, 0x2eb2, 0x2dc2, 0x2dc2, - 0x3cd2, 0x3bd2, 0x2ea2, 0x2ea2, 0xf003, 0x2cc2, 0x2cc2, 0x3da2, - 0x3ad2, 0x3e72, 0x3ca2, 0x2ac2, 0x2ac2, 0xf003, 0x39c2, 0x3d72, - 0x2e52, 0x2e52, 0x1db2, 0x1db2, 0x1db2, 0x1db2, 0xf002, 0x1e92, - 0x1e92, 0x2cb2, 0x2bc2, 0xf002, 0x2e82, 0x28e2, 0x2d92, 0x27e2, - 0xf002, 0x2bb2, 0x2d82, 0x28d2, 0x2e62, 0xf001, 0x16e2, 0x1c92, - 0xf002, 0x2ba2, 0x2ab2, 0x25e2, 0x27d2, 0xf002, 0x1e42, 0x1e42, - 0x24e2, 0x2c82, 0xf001, 0x18c2, 0x1e32, 0xf002, 0x1d62, 0x1d62, - 0x26d2, 0x2b92, 0xf002, 0x29b2, 0x2aa2, 0x11e2, 0x11e2, 0xf002, - 0x14d2, 0x14d2, 0x28b2, 0x29a2, 0xf002, 0x1b72, 0x1b72, 0x27b2, - 0x20d1, 0xf001, 0x1e01, 0x10e1, 0xf001, 0x1d52, 0x15d2, 0xf001, - 0x1c72, 0x17c2, 0xf001, 0x1d42, 0x1b82, 0xf001, 0x1a92, 0x1c62, - 0xf001, 0x16c2, 0x1d32, 0xf001, 0x1c52, 0x15c2, 0xf001, 0x1a82, - 0x18a2, 0xf001, 0x1992, 0x1c42, 0xf001, 0x16b2, 0x1a72, 0xf001, - 0x1b52, 0x1982, 0xf001, 0x1892, 0x1972, 0xf001, 0x1792, 0x1882, - 0xf001, 0x1ce2, 0x1dd2, - - /* huffTable24[705] */ - 0xf009, 0x8fe2, 0x8fe2, 0x8ef2, 0x8ef2, 0x8fd2, 0x8fd2, 0x8df2, - 0x8df2, 0x8fc2, 0x8fc2, 0x8cf2, 0x8cf2, 0x8fb2, 0x8fb2, 0x8bf2, - 0x8bf2, 0x7af2, 0x7af2, 0x7af2, 0x7af2, 0x8fa2, 0x8fa2, 0x8f92, - 0x8f92, 0x79f2, 0x79f2, 0x79f2, 0x79f2, 0x78f2, 0x78f2, 0x78f2, - 0x78f2, 0x8f82, 0x8f82, 0x8f72, 0x8f72, 0x77f2, 0x77f2, 0x77f2, - 0x77f2, 0x7f62, 0x7f62, 0x7f62, 0x7f62, 0x76f2, 0x76f2, 0x76f2, - 0x76f2, 0x7f52, 0x7f52, 0x7f52, 0x7f52, 0x75f2, 0x75f2, 0x75f2, - 0x75f2, 0x7f42, 0x7f42, 0x7f42, 0x7f42, 0x74f2, 0x74f2, 0x74f2, - 0x74f2, 0x7f32, 0x7f32, 0x7f32, 0x7f32, 0x73f2, 0x73f2, 0x73f2, - 0x73f2, 0x7f22, 0x7f22, 0x7f22, 0x7f22, 0x72f2, 0x72f2, 0x72f2, - 0x72f2, 0x71f2, 0x71f2, 0x71f2, 0x71f2, 0x8f12, 0x8f12, 0x80f1, - 0x80f1, 0x9f01, 0x0201, 0x0206, 0x020b, 0x0210, 0x0215, 0x021a, - 0x021f, 0x4ff2, 0x4ff2, 0x4ff2, 0x4ff2, 0x4ff2, 0x4ff2, 0x4ff2, - 0x4ff2, 0x4ff2, 0x4ff2, 0x4ff2, 0x4ff2, 0x4ff2, 0x4ff2, 0x4ff2, - 0x4ff2, 0x4ff2, 0x4ff2, 0x4ff2, 0x4ff2, 0x4ff2, 0x4ff2, 0x4ff2, - 0x4ff2, 0x4ff2, 0x4ff2, 0x4ff2, 0x4ff2, 0x4ff2, 0x4ff2, 0x4ff2, - 0x4ff2, 0x0224, 0x0229, 0x0232, 0x0237, 0x023a, 0x023f, 0x0242, - 0x0245, 0x024a, 0x024d, 0x0250, 0x0253, 0x0256, 0x0259, 0x025c, - 0x025f, 0x0262, 0x0265, 0x0268, 0x026b, 0x026e, 0x0271, 0x0274, - 0x0277, 0x027a, 0x027d, 0x0280, 0x0283, 0x0288, 0x028b, 0x028e, - 0x0291, 0x0294, 0x0297, 0x029a, 0x029f, 0x94b2, 0x02a4, 0x02a7, - 0x02aa, 0x93b2, 0x9882, 0x02af, 0x92b2, 0x02b2, 0x02b5, 0x9692, - 0x94a2, 0x02b8, 0x9782, 0x9a32, 0x93a2, 0x9952, 0x9592, 0x9a22, - 0x92a2, 0x91a2, 0x9862, 0x9682, 0x9772, 0x9942, 0x9492, 0x9932, - 0x9392, 0x9852, 0x9582, 0x9922, 0x9762, 0x9672, 0x9292, 0x9912, - 0x9192, 0x9842, 0x9482, 0x9752, 0x9572, 0x9832, 0x9382, 0x9662, - 0x9822, 0x9282, 0x9812, 0x9742, 0x9472, 0x9182, 0x02bb, 0x9652, - 0x9562, 0x9712, 0x02be, 0x8372, 0x8372, 0x9732, 0x9722, 0x8272, - 0x8272, 0x8642, 0x8642, 0x8462, 0x8462, 0x8552, 0x8552, 0x8172, - 0x8172, 0x8632, 0x8632, 0x8362, 0x8362, 0x8542, 0x8542, 0x8452, - 0x8452, 0x8622, 0x8622, 0x8262, 0x8262, 0x8612, 0x8612, 0x8162, - 0x8162, 0x9601, 0x9061, 0x8532, 0x8532, 0x8352, 0x8352, 0x8442, - 0x8442, 0x8522, 0x8522, 0x8252, 0x8252, 0x8512, 0x8512, 0x9501, - 0x9051, 0x7152, 0x7152, 0x7152, 0x7152, 0x8432, 0x8432, 0x8342, - 0x8342, 0x7422, 0x7422, 0x7422, 0x7422, 0x7242, 0x7242, 0x7242, - 0x7242, 0x7332, 0x7332, 0x7332, 0x7332, 0x7412, 0x7412, 0x7412, - 0x7412, 0x7142, 0x7142, 0x7142, 0x7142, 0x8401, 0x8401, 0x8041, - 0x8041, 0x7322, 0x7322, 0x7322, 0x7322, 0x7232, 0x7232, 0x7232, - 0x7232, 0x6312, 0x6312, 0x6312, 0x6312, 0x6312, 0x6312, 0x6312, - 0x6312, 0x6132, 0x6132, 0x6132, 0x6132, 0x6132, 0x6132, 0x6132, - 0x6132, 0x7301, 0x7301, 0x7301, 0x7301, 0x7031, 0x7031, 0x7031, - 0x7031, 0x6222, 0x6222, 0x6222, 0x6222, 0x6222, 0x6222, 0x6222, - 0x6222, 0x5212, 0x5212, 0x5212, 0x5212, 0x5212, 0x5212, 0x5212, - 0x5212, 0x5212, 0x5212, 0x5212, 0x5212, 0x5212, 0x5212, 0x5212, - 0x5212, 0x5122, 0x5122, 0x5122, 0x5122, 0x5122, 0x5122, 0x5122, - 0x5122, 0x5122, 0x5122, 0x5122, 0x5122, 0x5122, 0x5122, 0x5122, - 0x5122, 0x6201, 0x6201, 0x6201, 0x6201, 0x6201, 0x6201, 0x6201, - 0x6201, 0x6021, 0x6021, 0x6021, 0x6021, 0x6021, 0x6021, 0x6021, - 0x6021, 0x4112, 0x4112, 0x4112, 0x4112, 0x4112, 0x4112, 0x4112, - 0x4112, 0x4112, 0x4112, 0x4112, 0x4112, 0x4112, 0x4112, 0x4112, - 0x4112, 0x4112, 0x4112, 0x4112, 0x4112, 0x4112, 0x4112, 0x4112, - 0x4112, 0x4112, 0x4112, 0x4112, 0x4112, 0x4112, 0x4112, 0x4112, - 0x4112, 0x4101, 0x4101, 0x4101, 0x4101, 0x4101, 0x4101, 0x4101, - 0x4101, 0x4101, 0x4101, 0x4101, 0x4101, 0x4101, 0x4101, 0x4101, - 0x4101, 0x4101, 0x4101, 0x4101, 0x4101, 0x4101, 0x4101, 0x4101, - 0x4101, 0x4101, 0x4101, 0x4101, 0x4101, 0x4101, 0x4101, 0x4101, - 0x4101, 0x4011, 0x4011, 0x4011, 0x4011, 0x4011, 0x4011, 0x4011, - 0x4011, 0x4011, 0x4011, 0x4011, 0x4011, 0x4011, 0x4011, 0x4011, - 0x4011, 0x4011, 0x4011, 0x4011, 0x4011, 0x4011, 0x4011, 0x4011, - 0x4011, 0x4011, 0x4011, 0x4011, 0x4011, 0x4011, 0x4011, 0x4011, - 0x4011, 0x4000, 0x4000, 0x4000, 0x4000, 0x4000, 0x4000, 0x4000, - 0x4000, 0x4000, 0x4000, 0x4000, 0x4000, 0x4000, 0x4000, 0x4000, - 0x4000, 0x4000, 0x4000, 0x4000, 0x4000, 0x4000, 0x4000, 0x4000, - 0x4000, 0x4000, 0x4000, 0x4000, 0x4000, 0x4000, 0x4000, 0x4000, - 0x4000, 0xf002, 0x2ee2, 0x2ed2, 0x2de2, 0x2ec2, 0xf002, 0x2ce2, - 0x2dd2, 0x2eb2, 0x2be2, 0xf002, 0x2dc2, 0x2cd2, 0x2ea2, 0x2ae2, - 0xf002, 0x2db2, 0x2bd2, 0x2cc2, 0x2e92, 0xf002, 0x29e2, 0x2da2, - 0x2ad2, 0x2cb2, 0xf002, 0x2bc2, 0x2e82, 0x28e2, 0x2d92, 0xf002, - 0x29d2, 0x2e72, 0x27e2, 0x2ca2, 0xf002, 0x2ac2, 0x2bb2, 0x2d82, - 0x28d2, 0xf003, 0x3e01, 0x30e1, 0x2d01, 0x2d01, 0x16e2, 0x16e2, - 0x16e2, 0x16e2, 0xf002, 0x2e62, 0x2c92, 0x19c2, 0x19c2, 0xf001, - 0x1e52, 0x1ab2, 0xf002, 0x15e2, 0x15e2, 0x2ba2, 0x2d72, 0xf001, - 0x17d2, 0x14e2, 0xf001, 0x1c82, 0x18c2, 0xf002, 0x2e42, 0x2e22, - 0x1e32, 0x1e32, 0xf001, 0x1d62, 0x16d2, 0xf001, 0x13e2, 0x1b92, - 0xf001, 0x19b2, 0x1aa2, 0xf001, 0x12e2, 0x1e12, 0xf001, 0x11e2, - 0x1d52, 0xf001, 0x15d2, 0x1c72, 0xf001, 0x17c2, 0x1d42, 0xf001, - 0x1b82, 0x18b2, 0xf001, 0x14d2, 0x1a92, 0xf001, 0x19a2, 0x1c62, - 0xf001, 0x16c2, 0x1d32, 0xf001, 0x13d2, 0x1d22, 0xf001, 0x12d2, - 0x1d12, 0xf001, 0x1b72, 0x17b2, 0xf001, 0x11d2, 0x1c52, 0xf001, - 0x15c2, 0x1a82, 0xf001, 0x18a2, 0x1992, 0xf001, 0x1c42, 0x14c2, - 0xf001, 0x1b62, 0x16b2, 0xf002, 0x20d1, 0x2c01, 0x1c32, 0x1c32, - 0xf001, 0x13c2, 0x1a72, 0xf001, 0x17a2, 0x1c22, 0xf001, 0x12c2, - 0x1b52, 0xf001, 0x15b2, 0x1c12, 0xf001, 0x1982, 0x1892, 0xf001, - 0x11c2, 0x1b42, 0xf002, 0x20c1, 0x2b01, 0x1b32, 0x1b32, 0xf002, - 0x20b1, 0x2a01, 0x1a12, 0x1a12, 0xf001, 0x1a62, 0x16a2, 0xf001, - 0x1972, 0x1792, 0xf002, 0x20a1, 0x2901, 0x1091, 0x1091, 0xf001, - 0x1b22, 0x1a52, 0xf001, 0x15a2, 0x1b12, 0xf001, 0x11b2, 0x1962, - 0xf001, 0x1a42, 0x1872, 0xf001, 0x1801, 0x1081, 0xf001, 0x1701, - 0x1071, -}; - -#define HUFF_OFFSET_01 0 -#define HUFF_OFFSET_02 ( 9 + HUFF_OFFSET_01) -#define HUFF_OFFSET_03 ( 65 + HUFF_OFFSET_02) -#define HUFF_OFFSET_05 ( 65 + HUFF_OFFSET_03) -#define HUFF_OFFSET_06 (257 + HUFF_OFFSET_05) -#define HUFF_OFFSET_07 (129 + HUFF_OFFSET_06) -#define HUFF_OFFSET_08 (110 + HUFF_OFFSET_07) -#define HUFF_OFFSET_09 (280 + HUFF_OFFSET_08) -#define HUFF_OFFSET_10 ( 93 + HUFF_OFFSET_09) -#define HUFF_OFFSET_11 (320 + HUFF_OFFSET_10) -#define HUFF_OFFSET_12 (296 + HUFF_OFFSET_11) -#define HUFF_OFFSET_13 (185 + HUFF_OFFSET_12) -#define HUFF_OFFSET_15 (497 + HUFF_OFFSET_13) -#define HUFF_OFFSET_16 (580 + HUFF_OFFSET_15) -#define HUFF_OFFSET_24 (651 + HUFF_OFFSET_16) - -const int huffTabOffset[HUFF_PAIRTABS] = { - 0, - HUFF_OFFSET_01, - HUFF_OFFSET_02, - HUFF_OFFSET_03, - 0, - HUFF_OFFSET_05, - HUFF_OFFSET_06, - HUFF_OFFSET_07, - HUFF_OFFSET_08, - HUFF_OFFSET_09, - HUFF_OFFSET_10, - HUFF_OFFSET_11, - HUFF_OFFSET_12, - HUFF_OFFSET_13, - 0, - HUFF_OFFSET_15, - HUFF_OFFSET_16, - HUFF_OFFSET_16, - HUFF_OFFSET_16, - HUFF_OFFSET_16, - HUFF_OFFSET_16, - HUFF_OFFSET_16, - HUFF_OFFSET_16, - HUFF_OFFSET_16, - HUFF_OFFSET_24, - HUFF_OFFSET_24, - HUFF_OFFSET_24, - HUFF_OFFSET_24, - HUFF_OFFSET_24, - HUFF_OFFSET_24, - HUFF_OFFSET_24, - HUFF_OFFSET_24, -}; - -const HuffTabLookup huffTabLookup[HUFF_PAIRTABS] = { - { 0, noBits }, - { 0, oneShot }, - { 0, oneShot }, - { 0, oneShot }, - { 0, invalidTab }, - { 0, oneShot }, - { 0, oneShot }, - { 0, loopNoLinbits }, - { 0, loopNoLinbits }, - { 0, loopNoLinbits }, - { 0, loopNoLinbits }, - { 0, loopNoLinbits }, - { 0, loopNoLinbits }, - { 0, loopNoLinbits }, - { 0, invalidTab }, - { 0, loopNoLinbits }, - { 1, loopLinbits }, - { 2, loopLinbits }, - { 3, loopLinbits }, - { 4, loopLinbits }, - { 6, loopLinbits }, - { 8, loopLinbits }, - { 10, loopLinbits }, - { 13, loopLinbits }, - { 4, loopLinbits }, - { 5, loopLinbits }, - { 6, loopLinbits }, - { 7, loopLinbits }, - { 8, loopLinbits }, - { 9, loopLinbits }, - { 11, loopLinbits }, - { 13, loopLinbits }, -}; - -/* tables for quadruples - * format 0xAB - * A = length of codeword - * B = codeword - */ -const unsigned char quadTable[64+16] = { - /* table A */ - 0x6b, 0x6f, 0x6d, 0x6e, 0x67, 0x65, 0x59, 0x59, - 0x56, 0x56, 0x53, 0x53, 0x5a, 0x5a, 0x5c, 0x5c, - 0x42, 0x42, 0x42, 0x42, 0x41, 0x41, 0x41, 0x41, - 0x44, 0x44, 0x44, 0x44, 0x48, 0x48, 0x48, 0x48, - 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, - 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, - 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, - 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, - /* table B */ - 0x4f, 0x4e, 0x4d, 0x4c, 0x4b, 0x4a, 0x49, 0x48, - 0x47, 0x46, 0x45, 0x44, 0x43, 0x42, 0x41, 0x40, -}; - -const int quadTabOffset[2] = {0, 64}; -const int quadTabMaxBits[2] = {6, 4}; \ No newline at end of file diff --git a/bsp/stm32_radio/mp3/real/imdct.c b/bsp/stm32_radio/mp3/real/imdct.c deleted file mode 100644 index d98ba52b08..0000000000 --- a/bsp/stm32_radio/mp3/real/imdct.c +++ /dev/null @@ -1,779 +0,0 @@ -/* ***** BEGIN LICENSE BLOCK ***** - * Version: RCSL 1.0/RPSL 1.0 - * - * Portions Copyright (c) 1995-2002 RealNetworks, Inc. All Rights Reserved. - * - * The contents of this file, and the files included with this file, are - * subject to the current version of the RealNetworks Public Source License - * Version 1.0 (the "RPSL") available at - * http://www.helixcommunity.org/content/rpsl unless you have licensed - * the file under the RealNetworks Community Source License Version 1.0 - * (the "RCSL") available at http://www.helixcommunity.org/content/rcsl, - * in which case the RCSL will apply. You may also obtain the license terms - * directly from RealNetworks. You may not use this file except in - * compliance with the RPSL or, if you have a valid RCSL with RealNetworks - * applicable to this file, the RCSL. Please see the applicable RPSL or - * RCSL for the rights, obligations and limitations governing use of the - * contents of the file. - * - * This file is part of the Helix DNA Technology. RealNetworks is the - * developer of the Original Code and owns the copyrights in the portions - * it created. - * - * This file, and the files included with this file, is distributed and made - * available on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER - * EXPRESS OR IMPLIED, AND REALNETWORKS HEREBY DISCLAIMS ALL SUCH WARRANTIES, - * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, FITNESS - * FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT. - * - * Technology Compatibility Kit Test Suite(s) Location: - * http://www.helixcommunity.org/content/tck - * - * Contributor(s): - * - * ***** END LICENSE BLOCK ***** */ - -/************************************************************************************** - * Fixed-point MP3 decoder - * Jon Recker (jrecker@real.com), Ken Cooke (kenc@real.com) - * June 2003 - * - * imdct.c - antialias, inverse transform (short/long/mixed), windowing, - * overlap-add, frequency inversion - **************************************************************************************/ - -#include "coder.h" -#include "assembly.h" - -/************************************************************************************** - * Function: AntiAlias - * - * Description: smooth transition across DCT block boundaries (every 18 coefficients) - * - * Inputs: vector of dequantized coefficients, length = (nBfly+1) * 18 - * number of "butterflies" to perform (one butterfly means one - * inter-block smoothing operation) - * - * Outputs: updated coefficient vector x - * - * Return: none - * - * Notes: weighted average of opposite bands (pairwise) from the 8 samples - * before and after each block boundary - * nBlocks = (nonZeroBound + 7) / 18, since nZB is the first ZERO sample - * above which all other samples are also zero - * max gain per sample = 1.372 - * MAX(i) (abs(csa[i][0]) + abs(csa[i][1])) - * bits gained = 0 - * assume at least 1 guard bit in x[] to avoid overflow - * (should be guaranteed from dequant, and max gain from stproc * max - * gain from AntiAlias < 2.0) - **************************************************************************************/ -static void AntiAlias(int *x, int nBfly) -{ - int k, a0, b0, c0, c1; - const int *c; - - /* csa = Q31 */ - for (k = nBfly; k > 0; k--) { - c = csa[0]; - x += 18; - - a0 = x[-1]; c0 = *c; c++; b0 = x[0]; c1 = *c; c++; - x[-1] = (MULSHIFT32(c0, a0) - MULSHIFT32(c1, b0)) << 1; - x[0] = (MULSHIFT32(c0, b0) + MULSHIFT32(c1, a0)) << 1; - - a0 = x[-2]; c0 = *c; c++; b0 = x[1]; c1 = *c; c++; - x[-2] = (MULSHIFT32(c0, a0) - MULSHIFT32(c1, b0)) << 1; - x[1] = (MULSHIFT32(c0, b0) + MULSHIFT32(c1, a0)) << 1; - - a0 = x[-3]; c0 = *c; c++; b0 = x[2]; c1 = *c; c++; - x[-3] = (MULSHIFT32(c0, a0) - MULSHIFT32(c1, b0)) << 1; - x[2] = (MULSHIFT32(c0, b0) + MULSHIFT32(c1, a0)) << 1; - - a0 = x[-4]; c0 = *c; c++; b0 = x[3]; c1 = *c; c++; - x[-4] = (MULSHIFT32(c0, a0) - MULSHIFT32(c1, b0)) << 1; - x[3] = (MULSHIFT32(c0, b0) + MULSHIFT32(c1, a0)) << 1; - - a0 = x[-5]; c0 = *c; c++; b0 = x[4]; c1 = *c; c++; - x[-5] = (MULSHIFT32(c0, a0) - MULSHIFT32(c1, b0)) << 1; - x[4] = (MULSHIFT32(c0, b0) + MULSHIFT32(c1, a0)) << 1; - - a0 = x[-6]; c0 = *c; c++; b0 = x[5]; c1 = *c; c++; - x[-6] = (MULSHIFT32(c0, a0) - MULSHIFT32(c1, b0)) << 1; - x[5] = (MULSHIFT32(c0, b0) + MULSHIFT32(c1, a0)) << 1; - - a0 = x[-7]; c0 = *c; c++; b0 = x[6]; c1 = *c; c++; - x[-7] = (MULSHIFT32(c0, a0) - MULSHIFT32(c1, b0)) << 1; - x[6] = (MULSHIFT32(c0, b0) + MULSHIFT32(c1, a0)) << 1; - - a0 = x[-8]; c0 = *c; c++; b0 = x[7]; c1 = *c; c++; - x[-8] = (MULSHIFT32(c0, a0) - MULSHIFT32(c1, b0)) << 1; - x[7] = (MULSHIFT32(c0, b0) + MULSHIFT32(c1, a0)) << 1; - } -} - -/************************************************************************************** - * Function: WinPrevious - * - * Description: apply specified window to second half of previous IMDCT (overlap part) - * - * Inputs: vector of 9 coefficients (xPrev) - * - * Outputs: 18 windowed output coefficients (gain 1 integer bit) - * window type (0, 1, 2, 3) - * - * Return: none - * - * Notes: produces 9 output samples from 18 input samples via symmetry - * all blocks gain at least 1 guard bit via window (long blocks get extra - * sign bit, short blocks can have one addition but max gain < 1.0) - **************************************************************************************/ -static void WinPrevious(int *xPrev, int *xPrevWin, int btPrev) -{ - int i, x, *xp, *xpwLo, *xpwHi, wLo, wHi; - const int *wpLo, *wpHi; - - xp = xPrev; - /* mapping (see IMDCT12x3): xPrev[0-2] = sum[6-8], xPrev[3-8] = sum[12-17] */ - if (btPrev == 2) { - /* this could be reordered for minimum loads/stores */ - wpLo = imdctWin[btPrev]; - xPrevWin[ 0] = MULSHIFT32(wpLo[ 6], xPrev[2]) + MULSHIFT32(wpLo[0], xPrev[6]); - xPrevWin[ 1] = MULSHIFT32(wpLo[ 7], xPrev[1]) + MULSHIFT32(wpLo[1], xPrev[7]); - xPrevWin[ 2] = MULSHIFT32(wpLo[ 8], xPrev[0]) + MULSHIFT32(wpLo[2], xPrev[8]); - xPrevWin[ 3] = MULSHIFT32(wpLo[ 9], xPrev[0]) + MULSHIFT32(wpLo[3], xPrev[8]); - xPrevWin[ 4] = MULSHIFT32(wpLo[10], xPrev[1]) + MULSHIFT32(wpLo[4], xPrev[7]); - xPrevWin[ 5] = MULSHIFT32(wpLo[11], xPrev[2]) + MULSHIFT32(wpLo[5], xPrev[6]); - xPrevWin[ 6] = MULSHIFT32(wpLo[ 6], xPrev[5]); - xPrevWin[ 7] = MULSHIFT32(wpLo[ 7], xPrev[4]); - xPrevWin[ 8] = MULSHIFT32(wpLo[ 8], xPrev[3]); - xPrevWin[ 9] = MULSHIFT32(wpLo[ 9], xPrev[3]); - xPrevWin[10] = MULSHIFT32(wpLo[10], xPrev[4]); - xPrevWin[11] = MULSHIFT32(wpLo[11], xPrev[5]); - xPrevWin[12] = xPrevWin[13] = xPrevWin[14] = xPrevWin[15] = xPrevWin[16] = xPrevWin[17] = 0; - } else { - /* use ARM-style pointers (*ptr++) so that ADS compiles well */ - wpLo = imdctWin[btPrev] + 18; - wpHi = wpLo + 17; - xpwLo = xPrevWin; - xpwHi = xPrevWin + 17; - for (i = 9; i > 0; i--) { - x = *xp++; wLo = *wpLo++; wHi = *wpHi--; - *xpwLo++ = MULSHIFT32(wLo, x); - *xpwHi-- = MULSHIFT32(wHi, x); - } - } -} - -/************************************************************************************** - * Function: FreqInvertRescale - * - * Description: do frequency inversion (odd samples of odd blocks) and rescale - * if necessary (extra guard bits added before IMDCT) - * - * Inputs: output vector y (18 new samples, spaced NBANDS apart) - * previous sample vector xPrev (9 samples) - * index of current block - * number of extra shifts added before IMDCT (usually 0) - * - * Outputs: inverted and rescaled (as necessary) outputs - * rescaled (as necessary) previous samples - * - * Return: updated mOut (from new outputs y) - **************************************************************************************/ -static int FreqInvertRescale(int *y, int *xPrev, int blockIdx, int es) -{ - int i, d, mOut; - int y0, y1, y2, y3, y4, y5, y6, y7, y8; - - if (es == 0) { - /* fast case - frequency invert only (no rescaling) - can fuse into overlap-add for speed, if desired */ - if (blockIdx & 0x01) { - y += NBANDS; - y0 = *y; y += 2*NBANDS; - y1 = *y; y += 2*NBANDS; - y2 = *y; y += 2*NBANDS; - y3 = *y; y += 2*NBANDS; - y4 = *y; y += 2*NBANDS; - y5 = *y; y += 2*NBANDS; - y6 = *y; y += 2*NBANDS; - y7 = *y; y += 2*NBANDS; - y8 = *y; y += 2*NBANDS; - - y -= 18*NBANDS; - *y = -y0; y += 2*NBANDS; - *y = -y1; y += 2*NBANDS; - *y = -y2; y += 2*NBANDS; - *y = -y3; y += 2*NBANDS; - *y = -y4; y += 2*NBANDS; - *y = -y5; y += 2*NBANDS; - *y = -y6; y += 2*NBANDS; - *y = -y7; y += 2*NBANDS; - *y = -y8; y += 2*NBANDS; - } - return 0; - } else { - /* undo pre-IMDCT scaling, clipping if necessary */ - mOut = 0; - if (blockIdx & 0x01) { - /* frequency invert */ - for (i = 0; i < 18; i+=2) { - d = *y; CLIP_2N(d, 31 - es); *y = d << es; mOut |= FASTABS(*y); y += NBANDS; - d = -*y; CLIP_2N(d, 31 - es); *y = d << es; mOut |= FASTABS(*y); y += NBANDS; - d = *xPrev; CLIP_2N(d, 31 - es); *xPrev++ = d << es; - } - } else { - for (i = 0; i < 18; i+=2) { - d = *y; CLIP_2N(d, 31 - es); *y = d << es; mOut |= FASTABS(*y); y += NBANDS; - d = *y; CLIP_2N(d, 31 - es); *y = d << es; mOut |= FASTABS(*y); y += NBANDS; - d = *xPrev; CLIP_2N(d, 31 - es); *xPrev++ = d << es; - } - } - return mOut; - } -} - -/* format = Q31 - * #define M_PI 3.14159265358979323846 - * double u = 2.0 * M_PI / 9.0; - * float c0 = sqrt(3.0) / 2.0; - * float c1 = cos(u); - * float c2 = cos(2*u); - * float c3 = sin(u); - * float c4 = sin(2*u); - */ -static const int c9_0 = 0x6ed9eba1; -static const int c9_1 = 0x620dbe8b; -static const int c9_2 = 0x163a1a7e; -static const int c9_3 = 0x5246dd49; -static const int c9_4 = 0x7e0e2e32; - -/* format = Q31 - * cos(((0:8) + 0.5) * (pi/18)) - */ -static const int c18[9] = { - 0x7f834ed0, 0x7ba3751d, 0x7401e4c1, 0x68d9f964, 0x5a82799a, 0x496af3e2, 0x36185aee, 0x2120fb83, 0x0b27eb5c, -}; - -/* require at least 3 guard bits in x[] to ensure no overflow */ -static __inline void idct9(int *x) -{ - int a1, a2, a3, a4, a5, a6, a7, a8, a9; - int a10, a11, a12, a13, a14, a15, a16, a17, a18; - int a19, a20, a21, a22, a23, a24, a25, a26, a27; - int m1, m3, m5, m6, m7, m8, m9, m10, m11, m12; - int x0, x1, x2, x3, x4, x5, x6, x7, x8; - - x0 = x[0]; x1 = x[1]; x2 = x[2]; x3 = x[3]; x4 = x[4]; - x5 = x[5]; x6 = x[6]; x7 = x[7]; x8 = x[8]; - - a1 = x0 - x6; - a2 = x1 - x5; - a3 = x1 + x5; - a4 = x2 - x4; - a5 = x2 + x4; - a6 = x2 + x8; - a7 = x1 + x7; - - a8 = a6 - a5; /* ie x[8] - x[4] */ - a9 = a3 - a7; /* ie x[5] - x[7] */ - a10 = a2 - x7; /* ie x[1] - x[5] - x[7] */ - a11 = a4 - x8; /* ie x[2] - x[4] - x[8] */ - - /* do the << 1 as constant shifts where mX is actually used (free, no stall or extra inst.) */ - m1 = MULSHIFT32(c9_0, x3); - m3 = MULSHIFT32(c9_0, a10); - m5 = MULSHIFT32(c9_1, a5); - m6 = MULSHIFT32(c9_2, a6); - m7 = MULSHIFT32(c9_1, a8); - m8 = MULSHIFT32(c9_2, a5); - m9 = MULSHIFT32(c9_3, a9); - m10 = MULSHIFT32(c9_4, a7); - m11 = MULSHIFT32(c9_3, a3); - m12 = MULSHIFT32(c9_4, a9); - - a12 = x[0] + (x[6] >> 1); - a13 = a12 + ( m1 << 1); - a14 = a12 - ( m1 << 1); - a15 = a1 + ( a11 >> 1); - a16 = ( m5 << 1) + (m6 << 1); - a17 = ( m7 << 1) - (m8 << 1); - a18 = a16 + a17; - a19 = ( m9 << 1) + (m10 << 1); - a20 = (m11 << 1) - (m12 << 1); - - a21 = a20 - a19; - a22 = a13 + a16; - a23 = a14 + a16; - a24 = a14 + a17; - a25 = a13 + a17; - a26 = a14 - a18; - a27 = a13 - a18; - - x0 = a22 + a19; x[0] = x0; - x1 = a15 + (m3 << 1); x[1] = x1; - x2 = a24 + a20; x[2] = x2; - x3 = a26 - a21; x[3] = x3; - x4 = a1 - a11; x[4] = x4; - x5 = a27 + a21; x[5] = x5; - x6 = a25 - a20; x[6] = x6; - x7 = a15 - (m3 << 1); x[7] = x7; - x8 = a23 - a19; x[8] = x8; -} - -/* let c(j) = cos(M_PI/36 * ((j)+0.5)), s(j) = sin(M_PI/36 * ((j)+0.5)) - * then fastWin[2*j+0] = c(j)*(s(j) + c(j)), j = [0, 8] - * fastWin[2*j+1] = c(j)*(s(j) - c(j)) - * format = Q30 - */ -static const int fastWin36[18] = { - 0x42aace8b, 0xc2e92724, 0x47311c28, 0xc95f619a, 0x4a868feb, 0xd0859d8c, - 0x4c913b51, 0xd8243ea0, 0x4d413ccc, 0xe0000000, 0x4c913b51, 0xe7dbc161, - 0x4a868feb, 0xef7a6275, 0x47311c28, 0xf6a09e67, 0x42aace8b, 0xfd16d8dd, -}; - -/************************************************************************************** - * Function: IMDCT36 - * - * Description: 36-point modified DCT, with windowing and overlap-add (50% overlap) - * - * Inputs: vector of 18 coefficients (N/2 inputs produces N outputs, by symmetry) - * overlap part of last IMDCT (9 samples - see output comments) - * window type (0,1,2,3) of current and previous block - * current block index (for deciding whether to do frequency inversion) - * number of guard bits in input vector - * - * Outputs: 18 output samples, after windowing and overlap-add with last frame - * second half of (unwindowed) 36-point IMDCT - save for next time - * only save 9 xPrev samples, using symmetry (see WinPrevious()) - * - * Notes: this is Ken's hyper-fast algorithm, including symmetric sin window - * optimization, if applicable - * total number of multiplies, general case: - * 2*10 (idct9) + 9 (last stage imdct) + 36 (for windowing) = 65 - * total number of multiplies, btCurr == 0 && btPrev == 0: - * 2*10 (idct9) + 9 (last stage imdct) + 18 (for windowing) = 47 - * - * blockType == 0 is by far the most common case, so it should be - * possible to use the fast path most of the time - * this is the fastest known algorithm for performing - * long IMDCT + windowing + overlap-add in MP3 - * - * Return: mOut (OR of abs(y) for all y calculated here) - * - * TODO: optimize for ARM (reorder window coefs, ARM-style pointers in C, - * inline asm may or may not be helpful) - **************************************************************************************/ -static int IMDCT36(int *xCurr, int *xPrev, int *y, int btCurr, int btPrev, int blockIdx, int gb) -{ - int i, es, xBuf[18], xPrevWin[18]; - int acc1, acc2, s, d, t, mOut; - int xo, xe, c, *xp, yLo, yHi; - const int *cp, *wp; - - acc1 = acc2 = 0; - xCurr += 17; - - /* 7 gb is always adequate for antialias + accumulator loop + idct9 */ - if (gb < 7) { - /* rarely triggered - 5% to 10% of the time on normal clips (with Q25 input) */ - es = 7 - gb; - for (i = 8; i >= 0; i--) { - acc1 = ((*xCurr--) >> es) - acc1; - acc2 = acc1 - acc2; - acc1 = ((*xCurr--) >> es) - acc1; - xBuf[i+9] = acc2; /* odd */ - xBuf[i+0] = acc1; /* even */ - xPrev[i] >>= es; - } - } else { - es = 0; - /* max gain = 18, assume adequate guard bits */ - for (i = 8; i >= 0; i--) { - acc1 = (*xCurr--) - acc1; - acc2 = acc1 - acc2; - acc1 = (*xCurr--) - acc1; - xBuf[i+9] = acc2; /* odd */ - xBuf[i+0] = acc1; /* even */ - } - } - /* xEven[0] and xOdd[0] scaled by 0.5 */ - xBuf[9] >>= 1; - xBuf[0] >>= 1; - - /* do 9-point IDCT on even and odd */ - idct9(xBuf+0); /* even */ - idct9(xBuf+9); /* odd */ - - xp = xBuf + 8; - cp = c18 + 8; - mOut = 0; - if (btPrev == 0 && btCurr == 0) { - /* fast path - use symmetry of sin window to reduce windowing multiplies to 18 (N/2) */ - wp = fastWin36; - for (i = 0; i < 9; i++) { - /* do ARM-style pointer arithmetic (i still needed for y[] indexing - compiler spills if 2 y pointers) */ - c = *cp--; xo = *(xp + 9); xe = *xp--; - /* gain 2 int bits here */ - xo = MULSHIFT32(c, xo); /* 2*c18*xOdd (mul by 2 implicit in scaling) */ - xe >>= 2; - - s = -(*xPrev); /* sum from last block (always at least 2 guard bits) */ - d = -(xe - xo); /* gain 2 int bits, don't shift xo (effective << 1 to eat sign bit, << 1 for mul by 2) */ - (*xPrev++) = xe + xo; /* symmetry - xPrev[i] = xPrev[17-i] for long blocks */ - t = s - d; - - yLo = (d + (MULSHIFT32(t, *wp++) << 2)); - yHi = (s + (MULSHIFT32(t, *wp++) << 2)); - y[(i)*NBANDS] = yLo; - y[(17-i)*NBANDS] = yHi; - mOut |= FASTABS(yLo); - mOut |= FASTABS(yHi); - } - } else { - /* slower method - either prev or curr is using window type != 0 so do full 36-point window - * output xPrevWin has at least 3 guard bits (xPrev has 2, gain 1 in WinPrevious) - */ - WinPrevious(xPrev, xPrevWin, btPrev); - - wp = imdctWin[btCurr]; - for (i = 0; i < 9; i++) { - c = *cp--; xo = *(xp + 9); xe = *xp--; - /* gain 2 int bits here */ - xo = MULSHIFT32(c, xo); /* 2*c18*xOdd (mul by 2 implicit in scaling) */ - xe >>= 2; - - d = xe - xo; - (*xPrev++) = xe + xo; /* symmetry - xPrev[i] = xPrev[17-i] for long blocks */ - - yLo = (xPrevWin[i] + MULSHIFT32(d, wp[i])) << 2; - yHi = (xPrevWin[17-i] + MULSHIFT32(d, wp[17-i])) << 2; - y[(i)*NBANDS] = yLo; - y[(17-i)*NBANDS] = yHi; - mOut |= FASTABS(yLo); - mOut |= FASTABS(yHi); - } - } - - xPrev -= 9; - mOut |= FreqInvertRescale(y, xPrev, blockIdx, es); - - return mOut; -} - -static const int c3_0 = 0x6ed9eba1; /* format = Q31, cos(pi/6) */ -static const int c6[3] = { 0x7ba3751d, 0x5a82799a, 0x2120fb83 }; /* format = Q31, cos(((0:2) + 0.5) * (pi/6)) */ - -/* 12-point inverse DCT, used in IMDCT12x3() - * 4 input guard bits will ensure no overflow - */ -static __inline void imdct12 (int *x, int *out) -{ - int a0, a1, a2; - int x0, x1, x2, x3, x4, x5; - - x0 = *x; x+=3; x1 = *x; x+=3; - x2 = *x; x+=3; x3 = *x; x+=3; - x4 = *x; x+=3; x5 = *x; x+=3; - - x4 -= x5; - x3 -= x4; - x2 -= x3; - x3 -= x5; - x1 -= x2; - x0 -= x1; - x1 -= x3; - - x0 >>= 1; - x1 >>= 1; - - a0 = MULSHIFT32(c3_0, x2) << 1; - a1 = x0 + (x4 >> 1); - a2 = x0 - x4; - x0 = a1 + a0; - x2 = a2; - x4 = a1 - a0; - - a0 = MULSHIFT32(c3_0, x3) << 1; - a1 = x1 + (x5 >> 1); - a2 = x1 - x5; - - /* cos window odd samples, mul by 2, eat sign bit */ - x1 = MULSHIFT32(c6[0], a1 + a0) << 2; - x3 = MULSHIFT32(c6[1], a2) << 2; - x5 = MULSHIFT32(c6[2], a1 - a0) << 2; - - *out = x0 + x1; out++; - *out = x2 + x3; out++; - *out = x4 + x5; out++; - *out = x4 - x5; out++; - *out = x2 - x3; out++; - *out = x0 - x1; -} - -/************************************************************************************** - * Function: IMDCT12x3 - * - * Description: three 12-point modified DCT's for short blocks, with windowing, - * short block concatenation, and overlap-add - * - * Inputs: 3 interleaved vectors of 6 samples each - * (block0[0], block1[0], block2[0], block0[1], block1[1]....) - * overlap part of last IMDCT (9 samples - see output comments) - * window type (0,1,2,3) of previous block - * current block index (for deciding whether to do frequency inversion) - * number of guard bits in input vector - * - * Outputs: updated sample vector x, net gain of 1 integer bit - * second half of (unwindowed) IMDCT's - save for next time - * only save 9 xPrev samples, using symmetry (see WinPrevious()) - * - * Return: mOut (OR of abs(y) for all y calculated here) - * - * TODO: optimize for ARM - **************************************************************************************/ -static int IMDCT12x3(int *xCurr, int *xPrev, int *y, int btPrev, int blockIdx, int gb) -{ - int i, es, mOut, yLo, xBuf[18], xPrevWin[18]; /* need temp buffer for reordering short blocks */ - const int *wp; - - es = 0; - /* 7 gb is always adequate for accumulator loop + idct12 + window + overlap */ - if (gb < 7) { - es = 7 - gb; - for (i = 0; i < 18; i+=2) { - xCurr[i+0] >>= es; - xCurr[i+1] >>= es; - *xPrev++ >>= es; - } - xPrev -= 9; - } - - /* requires 4 input guard bits for each imdct12 */ - imdct12(xCurr + 0, xBuf + 0); - imdct12(xCurr + 1, xBuf + 6); - imdct12(xCurr + 2, xBuf + 12); - - /* window previous from last time */ - WinPrevious(xPrev, xPrevWin, btPrev); - - /* could unroll this for speed, minimum loads (short blocks usually rare, so doesn't make much overall difference) - * xPrevWin[i] << 2 still has 1 gb always, max gain of windowed xBuf stuff also < 1.0 and gain the sign bit - * so y calculations won't overflow - */ - wp = imdctWin[2]; - mOut = 0; - for (i = 0; i < 3; i++) { - yLo = (xPrevWin[ 0+i] << 2); - mOut |= FASTABS(yLo); y[( 0+i)*NBANDS] = yLo; - yLo = (xPrevWin[ 3+i] << 2); - mOut |= FASTABS(yLo); y[( 3+i)*NBANDS] = yLo; - yLo = (xPrevWin[ 6+i] << 2) + (MULSHIFT32(wp[0+i], xBuf[3+i])); - mOut |= FASTABS(yLo); y[( 6+i)*NBANDS] = yLo; - yLo = (xPrevWin[ 9+i] << 2) + (MULSHIFT32(wp[3+i], xBuf[5-i])); - mOut |= FASTABS(yLo); y[( 9+i)*NBANDS] = yLo; - yLo = (xPrevWin[12+i] << 2) + (MULSHIFT32(wp[6+i], xBuf[2-i]) + MULSHIFT32(wp[0+i], xBuf[(6+3)+i])); - mOut |= FASTABS(yLo); y[(12+i)*NBANDS] = yLo; - yLo = (xPrevWin[15+i] << 2) + (MULSHIFT32(wp[9+i], xBuf[0+i]) + MULSHIFT32(wp[3+i], xBuf[(6+5)-i])); - mOut |= FASTABS(yLo); y[(15+i)*NBANDS] = yLo; - } - - /* save previous (unwindowed) for overlap - only need samples 6-8, 12-17 */ - for (i = 6; i < 9; i++) - *xPrev++ = xBuf[i] >> 2; - for (i = 12; i < 18; i++) - *xPrev++ = xBuf[i] >> 2; - - xPrev -= 9; - mOut |= FreqInvertRescale(y, xPrev, blockIdx, es); - - return mOut; -} - -/************************************************************************************** - * Function: HybridTransform - * - * Description: IMDCT's, windowing, and overlap-add on long/short/mixed blocks - * - * Inputs: vector of input coefficients, length = nBlocksTotal * 18) - * vector of overlap samples from last time, length = nBlocksPrev * 9) - * buffer for output samples, length = MAXNSAMP - * SideInfoSub struct for this granule/channel - * BlockCount struct with necessary info - * number of non-zero input and overlap blocks - * number of long blocks in input vector (rest assumed to be short blocks) - * number of blocks which use long window (type) 0 in case of mixed block - * (bc->currWinSwitch, 0 for non-mixed blocks) - * - * Outputs: transformed, windowed, and overlapped sample buffer - * does frequency inversion on odd blocks - * updated buffer of samples for overlap - * - * Return: number of non-zero IMDCT blocks calculated in this call - * (including overlap-add) - * - * TODO: examine mixedBlock/winSwitch logic carefully (test he_mode.bit) - **************************************************************************************/ -static int HybridTransform(int *xCurr, int *xPrev, int y[BLOCK_SIZE][NBANDS], SideInfoSub *sis, BlockCount *bc) -{ - int xPrevWin[18], currWinIdx, prevWinIdx; - int i, j, nBlocksOut, nonZero, mOut; - int fiBit, xp; - - ASSERT(bc->nBlocksLong <= NBANDS); - ASSERT(bc->nBlocksTotal <= NBANDS); - ASSERT(bc->nBlocksPrev <= NBANDS); - - mOut = 0; - - /* do long blocks, if any */ - for(i = 0; i < bc->nBlocksLong; i++) { - /* currWinIdx picks the right window for long blocks (if mixed, long blocks use window type 0) */ - currWinIdx = sis->blockType; - if (sis->mixedBlock && i < bc->currWinSwitch) - currWinIdx = 0; - - prevWinIdx = bc->prevType; - if (i < bc->prevWinSwitch) - prevWinIdx = 0; - - /* do 36-point IMDCT, including windowing and overlap-add */ - mOut |= IMDCT36(xCurr, xPrev, &(y[0][i]), currWinIdx, prevWinIdx, i, bc->gbIn); - xCurr += 18; - xPrev += 9; - } - - /* do short blocks (if any) */ - for ( ; i < bc->nBlocksTotal; i++) { - ASSERT(sis->blockType == 2); - - prevWinIdx = bc->prevType; - if (i < bc->prevWinSwitch) - prevWinIdx = 0; - - mOut |= IMDCT12x3(xCurr, xPrev, &(y[0][i]), prevWinIdx, i, bc->gbIn); - xCurr += 18; - xPrev += 9; - } - nBlocksOut = i; - - /* window and overlap prev if prev longer that current */ - for ( ; i < bc->nBlocksPrev; i++) { - prevWinIdx = bc->prevType; - if (i < bc->prevWinSwitch) - prevWinIdx = 0; - WinPrevious(xPrev, xPrevWin, prevWinIdx); - - nonZero = 0; - fiBit = i << 31; - for (j = 0; j < 9; j++) { - xp = xPrevWin[2*j+0] << 2; /* << 2 temp for scaling */ - nonZero |= xp; - y[2*j+0][i] = xp; - mOut |= FASTABS(xp); - - /* frequency inversion on odd blocks/odd samples (flip sign if i odd, j odd) */ - xp = xPrevWin[2*j+1] << 2; - xp = (xp ^ (fiBit >> 31)) + (i & 0x01); - nonZero |= xp; - y[2*j+1][i] = xp; - mOut |= FASTABS(xp); - - xPrev[j] = 0; - } - xPrev += 9; - if (nonZero) - nBlocksOut = i; - } - - /* clear rest of blocks */ - for ( ; i < 32; i++) { - for (j = 0; j < 18; j++) - y[j][i] = 0; - } - - bc->gbOut = CLZ(mOut) - 1; - - return nBlocksOut; -} - -/************************************************************************************** - * Function: IMDCT - * - * Description: do alias reduction, inverse MDCT, overlap-add, and frequency inversion - * - * Inputs: MP3DecInfo structure filled by UnpackFrameHeader(), UnpackSideInfo(), - * UnpackScaleFactors(), and DecodeHuffman() (for this granule, channel) - * includes PCM samples in overBuf (from last call to IMDCT) for OLA - * index of current granule and channel - * - * Outputs: PCM samples in outBuf, for input to subband transform - * PCM samples in overBuf, for OLA next time - * updated hi->nonZeroBound index for this channel - * - * Return: 0 on success, -1 if null input pointers - **************************************************************************************/ -int IMDCT(MP3DecInfo *mp3DecInfo, int gr, int ch) -{ - int nBfly, blockCutoff; - FrameHeader *fh; - SideInfo *si; - HuffmanInfo *hi; - IMDCTInfo *mi; - BlockCount bc; - - /* validate pointers */ - if (!mp3DecInfo || !mp3DecInfo->FrameHeaderPS || !mp3DecInfo->SideInfoPS || - !mp3DecInfo->HuffmanInfoPS || !mp3DecInfo->IMDCTInfoPS) - return -1; - - /* si is an array of up to 4 structs, stored as gr0ch0, gr0ch1, gr1ch0, gr1ch1 */ - fh = (FrameHeader *)(mp3DecInfo->FrameHeaderPS); - si = (SideInfo *)(mp3DecInfo->SideInfoPS); - hi = (HuffmanInfo*)(mp3DecInfo->HuffmanInfoPS); - mi = (IMDCTInfo *)(mp3DecInfo->IMDCTInfoPS); - - /* anti-aliasing done on whole long blocks only - * for mixed blocks, nBfly always 1, except 3 for 8 kHz MPEG 2.5 (see sfBandTab) - * nLongBlocks = number of blocks with (possibly) non-zero power - * nBfly = number of butterflies to do (nLongBlocks - 1, unless no long blocks) - */ - blockCutoff = fh->sfBand->l[(fh->ver == MPEG1 ? 8 : 6)] / 18; /* same as 3* num short sfb's in spec */ - if (si->sis[gr][ch].blockType != 2) { - /* all long transforms */ - bc.nBlocksLong = MIN((hi->nonZeroBound[ch] + 7) / 18 + 1, 32); - nBfly = bc.nBlocksLong - 1; - } else if (si->sis[gr][ch].blockType == 2 && si->sis[gr][ch].mixedBlock) { - /* mixed block - long transforms until cutoff, then short transforms */ - bc.nBlocksLong = blockCutoff; - nBfly = bc.nBlocksLong - 1; - } else { - /* all short transforms */ - bc.nBlocksLong = 0; - nBfly = 0; - } - - AntiAlias(hi->huffDecBuf[ch], nBfly); - hi->nonZeroBound[ch] = MAX(hi->nonZeroBound[ch], (nBfly * 18) + 8); - - ASSERT(hi->nonZeroBound[ch] <= MAX_NSAMP); - - /* for readability, use a struct instead of passing a million parameters to HybridTransform() */ - bc.nBlocksTotal = (hi->nonZeroBound[ch] + 17) / 18; - bc.nBlocksPrev = mi->numPrevIMDCT[ch]; - bc.prevType = mi->prevType[ch]; - bc.prevWinSwitch = mi->prevWinSwitch[ch]; - bc.currWinSwitch = (si->sis[gr][ch].mixedBlock ? blockCutoff : 0); /* where WINDOW switches (not nec. transform) */ - bc.gbIn = hi->gb[ch]; - - mi->numPrevIMDCT[ch] = HybridTransform(hi->huffDecBuf[ch], mi->overBuf[ch], mi->outBuf[ch], &si->sis[gr][ch], &bc); - mi->prevType[ch] = si->sis[gr][ch].blockType; - mi->prevWinSwitch[ch] = bc.currWinSwitch; /* 0 means not a mixed block (either all short or all long) */ - mi->gb[ch] = bc.gbOut; - - ASSERT(mi->numPrevIMDCT[ch] <= NBANDS); - - /* output has gained 2 int bits */ - return 0; -} diff --git a/bsp/stm32_radio/mp3/real/polyphase.c b/bsp/stm32_radio/mp3/real/polyphase.c deleted file mode 100644 index bd331dfebb..0000000000 --- a/bsp/stm32_radio/mp3/real/polyphase.c +++ /dev/null @@ -1,295 +0,0 @@ -/* ***** BEGIN LICENSE BLOCK ***** - * Version: RCSL 1.0/RPSL 1.0 - * - * Portions Copyright (c) 1995-2002 RealNetworks, Inc. All Rights Reserved. - * - * The contents of this file, and the files included with this file, are - * subject to the current version of the RealNetworks Public Source License - * Version 1.0 (the "RPSL") available at - * http://www.helixcommunity.org/content/rpsl unless you have licensed - * the file under the RealNetworks Community Source License Version 1.0 - * (the "RCSL") available at http://www.helixcommunity.org/content/rcsl, - * in which case the RCSL will apply. You may also obtain the license terms - * directly from RealNetworks. You may not use this file except in - * compliance with the RPSL or, if you have a valid RCSL with RealNetworks - * applicable to this file, the RCSL. Please see the applicable RPSL or - * RCSL for the rights, obligations and limitations governing use of the - * contents of the file. - * - * This file is part of the Helix DNA Technology. RealNetworks is the - * developer of the Original Code and owns the copyrights in the portions - * it created. - * - * This file, and the files included with this file, is distributed and made - * available on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER - * EXPRESS OR IMPLIED, AND REALNETWORKS HEREBY DISCLAIMS ALL SUCH WARRANTIES, - * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, FITNESS - * FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT. - * - * Technology Compatibility Kit Test Suite(s) Location: - * http://www.helixcommunity.org/content/tck - * - * Contributor(s): - * - * ***** END LICENSE BLOCK ***** */ - -/************************************************************************************** - * Fixed-point MP3 decoder - * Jon Recker (jrecker@real.com), Ken Cooke (kenc@real.com) - * June 2003 - * - * polyphase.c - final stage of subband transform (polyphase synthesis filter) - * - * This is the C reference version using __int64 - * Look in the appropriate subdirectories for optimized asm implementations - * (e.g. arm/asmpoly.s) - **************************************************************************************/ - -#include "coder.h" -#include "assembly.h" - -/* input to Polyphase = Q(DQ_FRACBITS_OUT-2), gain 2 bits in convolution - * we also have the implicit bias of 2^15 to add back, so net fraction bits = - * DQ_FRACBITS_OUT - 2 - 2 - 15 - * (see comment on Dequantize() for more info) - */ -#define DEF_NFRACBITS (DQ_FRACBITS_OUT - 2 - 2 - 15) -#define CSHIFT 12 /* coefficients have 12 leading sign bits for early-terminating mulitplies */ - -static __inline short ClipToShort(int x, int fracBits) -{ - int sign; - - /* assumes you've already rounded (x += (1 << (fracBits-1))) */ - x >>= fracBits; - - /* Ken's trick: clips to [-32768, 32767] */ - sign = x >> 31; - if (sign != (x >> 15)) - x = sign ^ ((1 << 15) - 1); - - return (short)x; -} - -#define MC0M(x) { \ - c1 = *coef; coef++; c2 = *coef; coef++; \ - vLo = *(vb1+(x)); vHi = *(vb1+(23-(x))); \ - sum1L = MADD64(sum1L, vLo, c1); sum1L = MADD64(sum1L, vHi, -c2); \ -} - -#define MC1M(x) { \ - c1 = *coef; coef++; \ - vLo = *(vb1+(x)); \ - sum1L = MADD64(sum1L, vLo, c1); \ -} - -#define MC2M(x) { \ - c1 = *coef; coef++; c2 = *coef; coef++; \ - vLo = *(vb1+(x)); vHi = *(vb1+(23-(x))); \ - sum1L = MADD64(sum1L, vLo, c1); sum2L = MADD64(sum2L, vLo, c2); \ - sum1L = MADD64(sum1L, vHi, -c2); sum2L = MADD64(sum2L, vHi, c1); \ -} - -/************************************************************************************** - * Function: PolyphaseMono - * - * Description: filter one subband and produce 32 output PCM samples for one channel - * - * Inputs: pointer to PCM output buffer - * number of "extra shifts" (vbuf format = Q(DQ_FRACBITS_OUT-2)) - * pointer to start of vbuf (preserved from last call) - * start of filter coefficient table (in proper, shuffled order) - * no minimum number of guard bits is required for input vbuf - * (see additional scaling comments below) - * - * Outputs: 32 samples of one channel of decoded PCM data, (i.e. Q16.0) - * - * Return: none - * - * TODO: add 32-bit version for platforms where 64-bit mul-acc is not supported - * (note max filter gain - see polyCoef[] comments) - **************************************************************************************/ -void PolyphaseMono(short *pcm, int *vbuf, const int *coefBase) -{ - int i; - const int *coef; - int *vb1; - int vLo, vHi, c1, c2; - Word64 sum1L, sum2L, rndVal; - - rndVal = (Word64)( 1 << (DEF_NFRACBITS - 1 + (32 - CSHIFT)) ); - - /* special case, output sample 0 */ - coef = coefBase; - vb1 = vbuf; - sum1L = rndVal; - - MC0M(0) - MC0M(1) - MC0M(2) - MC0M(3) - MC0M(4) - MC0M(5) - MC0M(6) - MC0M(7) - - *(pcm + 0) = ClipToShort((int)SAR64(sum1L, (32-CSHIFT)), DEF_NFRACBITS); - - /* special case, output sample 16 */ - coef = coefBase + 256; - vb1 = vbuf + 64*16; - sum1L = rndVal; - - MC1M(0) - MC1M(1) - MC1M(2) - MC1M(3) - MC1M(4) - MC1M(5) - MC1M(6) - MC1M(7) - - *(pcm + 16) = ClipToShort((int)SAR64(sum1L, (32-CSHIFT)), DEF_NFRACBITS); - - /* main convolution loop: sum1L = samples 1, 2, 3, ... 15 sum2L = samples 31, 30, ... 17 */ - coef = coefBase + 16; - vb1 = vbuf + 64; - pcm++; - - /* right now, the compiler creates bad asm from this... */ - for (i = 15; i > 0; i--) { - sum1L = sum2L = rndVal; - - MC2M(0) - MC2M(1) - MC2M(2) - MC2M(3) - MC2M(4) - MC2M(5) - MC2M(6) - MC2M(7) - - vb1 += 64; - *(pcm) = ClipToShort((int)SAR64(sum1L, (32-CSHIFT)), DEF_NFRACBITS); - *(pcm + 2*i) = ClipToShort((int)SAR64(sum2L, (32-CSHIFT)), DEF_NFRACBITS); - pcm++; - } -} - -#define MC0S(x) { \ - c1 = *coef; coef++; c2 = *coef; coef++; \ - vLo = *(vb1+(x)); vHi = *(vb1+(23-(x))); \ - sum1L = MADD64(sum1L, vLo, c1); sum1L = MADD64(sum1L, vHi, -c2); \ - vLo = *(vb1+32+(x)); vHi = *(vb1+32+(23-(x))); \ - sum1R = MADD64(sum1R, vLo, c1); sum1R = MADD64(sum1R, vHi, -c2); \ -} - -#define MC1S(x) { \ - c1 = *coef; coef++; \ - vLo = *(vb1+(x)); \ - sum1L = MADD64(sum1L, vLo, c1); \ - vLo = *(vb1+32+(x)); \ - sum1R = MADD64(sum1R, vLo, c1); \ -} - -#define MC2S(x) { \ - c1 = *coef; coef++; c2 = *coef; coef++; \ - vLo = *(vb1+(x)); vHi = *(vb1+(23-(x))); \ - sum1L = MADD64(sum1L, vLo, c1); sum2L = MADD64(sum2L, vLo, c2); \ - sum1L = MADD64(sum1L, vHi, -c2); sum2L = MADD64(sum2L, vHi, c1); \ - vLo = *(vb1+32+(x)); vHi = *(vb1+32+(23-(x))); \ - sum1R = MADD64(sum1R, vLo, c1); sum2R = MADD64(sum2R, vLo, c2); \ - sum1R = MADD64(sum1R, vHi, -c2); sum2R = MADD64(sum2R, vHi, c1); \ -} - -/************************************************************************************** - * Function: PolyphaseStereo - * - * Description: filter one subband and produce 32 output PCM samples for each channel - * - * Inputs: pointer to PCM output buffer - * number of "extra shifts" (vbuf format = Q(DQ_FRACBITS_OUT-2)) - * pointer to start of vbuf (preserved from last call) - * start of filter coefficient table (in proper, shuffled order) - * no minimum number of guard bits is required for input vbuf - * (see additional scaling comments below) - * - * Outputs: 32 samples of two channels of decoded PCM data, (i.e. Q16.0) - * - * Return: none - * - * Notes: interleaves PCM samples LRLRLR... - * - * TODO: add 32-bit version for platforms where 64-bit mul-acc is not supported - **************************************************************************************/ -void PolyphaseStereo(short *pcm, int *vbuf, const int *coefBase) -{ - int i; - const int *coef; - int *vb1; - int vLo, vHi, c1, c2; - Word64 sum1L, sum2L, sum1R, sum2R, rndVal; - - rndVal = (Word64)( 1 << (DEF_NFRACBITS - 1 + (32 - CSHIFT)) ); - - /* special case, output sample 0 */ - coef = coefBase; - vb1 = vbuf; - sum1L = sum1R = rndVal; - - MC0S(0) - MC0S(1) - MC0S(2) - MC0S(3) - MC0S(4) - MC0S(5) - MC0S(6) - MC0S(7) - - *(pcm + 0) = ClipToShort((int)SAR64(sum1L, (32-CSHIFT)), DEF_NFRACBITS); - *(pcm + 1) = ClipToShort((int)SAR64(sum1R, (32-CSHIFT)), DEF_NFRACBITS); - - /* special case, output sample 16 */ - coef = coefBase + 256; - vb1 = vbuf + 64*16; - sum1L = sum1R = rndVal; - - MC1S(0) - MC1S(1) - MC1S(2) - MC1S(3) - MC1S(4) - MC1S(5) - MC1S(6) - MC1S(7) - - *(pcm + 2*16 + 0) = ClipToShort((int)SAR64(sum1L, (32-CSHIFT)), DEF_NFRACBITS); - *(pcm + 2*16 + 1) = ClipToShort((int)SAR64(sum1R, (32-CSHIFT)), DEF_NFRACBITS); - - /* main convolution loop: sum1L = samples 1, 2, 3, ... 15 sum2L = samples 31, 30, ... 17 */ - coef = coefBase + 16; - vb1 = vbuf + 64; - pcm += 2; - - /* right now, the compiler creates bad asm from this... */ - for (i = 15; i > 0; i--) { - sum1L = sum2L = rndVal; - sum1R = sum2R = rndVal; - - MC2S(0) - MC2S(1) - MC2S(2) - MC2S(3) - MC2S(4) - MC2S(5) - MC2S(6) - MC2S(7) - - vb1 += 64; - *(pcm + 0) = ClipToShort((int)SAR64(sum1L, (32-CSHIFT)), DEF_NFRACBITS); - *(pcm + 1) = ClipToShort((int)SAR64(sum1R, (32-CSHIFT)), DEF_NFRACBITS); - *(pcm + 2*2*i + 0) = ClipToShort((int)SAR64(sum2L, (32-CSHIFT)), DEF_NFRACBITS); - *(pcm + 2*2*i + 1) = ClipToShort((int)SAR64(sum2R, (32-CSHIFT)), DEF_NFRACBITS); - pcm += 2; - } -} diff --git a/bsp/stm32_radio/mp3/real/projects/armads/LICENSE.txt b/bsp/stm32_radio/mp3/real/projects/armads/LICENSE.txt deleted file mode 100644 index 12e5372a9f..0000000000 --- a/bsp/stm32_radio/mp3/real/projects/armads/LICENSE.txt +++ /dev/null @@ -1,30 +0,0 @@ - Copyright (c) 1995-2004 RealNetworks, Inc. All Rights Reserved. - - The contents of this directory, and (except where otherwise - indicated) the directories included within this directory, are - subject to the current version of the RealNetworks Public Source - License (the "RPSL") available at RPSL.txt in this directory, unless - you have licensed the directory under the current version of the - RealNetworks Community Source License (the "RCSL") available at - RCSL.txt in this directory, in which case the RCSL will apply. You - may also obtain the license terms directly from RealNetworks. You - may not use the files in this directory except in compliance with the - RPSL or, if you have a valid RCSL with RealNetworks applicable to - this directory, the RCSL. Please see the applicable RPSL or RCSL for - the rights, obligations and limitations governing use of the contents - of the directory. - - This directory is part of the Helix DNA Technology. RealNetworks is - the developer of the Original Code and owns the copyrights in the - portions it created. - - This directory, and the directories included with this directory, are - distributed and made available on an 'AS IS' basis, WITHOUT WARRANTY - OF ANY KIND, EITHER EXPRESS OR IMPLIED, AND REALNETWORKS HEREBY - DISCLAIMS ALL SUCH WARRANTIES, INCLUDING WITHOUT LIMITATION, ANY - WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, - QUIET ENJOYMENT OR NON-INFRINGEMENT. - - Technology Compatibility Kit Test Suite(s) Location: - http://www.helixcommunity.org/content/tck - diff --git a/bsp/stm32_radio/mp3/real/projects/armads/RCSL.txt b/bsp/stm32_radio/mp3/real/projects/armads/RCSL.txt deleted file mode 100644 index a809759a32..0000000000 --- a/bsp/stm32_radio/mp3/real/projects/armads/RCSL.txt +++ /dev/null @@ -1,948 +0,0 @@ -The RCSL is made up of a base agreement and a few Attachments. - -For Research and Development use, you agree to the terms of the -RCSL R&D License (base RCSL and Attachments A, B, and C) - -For Commercial Use (either distribution or internal commercial -deployment) of the Helix DNA with or without support for RealNetworks' -RealAudio and RealVideo Add-on Technology, you agree to the -terms of the same RCSL R&D license -and execute one or more additional Commercial Use License attachments -. - ------------------------------------------------------------------------- - - - REALNETWORKS COMMUNITY SOURCE LICENSE - -Version 1.2 (Rev. Date: January 22, 2003). - - - RECITALS - -Original Contributor has developed Specifications, Source Code -implementations and Executables of certain Technology; and - -Original Contributor desires to license the Technology to a large -community to facilitate research, innovation and product development -while maintaining compatibility of such products with the Technology as -delivered by Original Contributor; and - -Original Contributor desires to license certain Trademarks for the -purpose of branding products that are compatible with the relevant -Technology delivered by Original Contributor; and - -You desire to license the Technology and possibly certain Trademarks -from Original Contributor on the terms and conditions specified in this -License. - -In consideration for the mutual covenants contained herein, You and -Original Contributor agree as follows: - - - AGREEMENT - -*1. Introduction.* - -The RealNetworks Community Source License ("RCSL") and effective -attachments ("License") may include five distinct licenses: - -i) Research Use license -- License plus Attachments A, B and C only. - -ii) Commercial Use and Trademark License, which may be for Internal -Deployment Use or external distribution, or both -- License plus -Attachments A, B, C, and D. - -iii) Technology Compatibility Kit (TCK) license -- Attachment C. - -iv) Add-On Technology License (Executable) Commercial Use License --Attachment F. - -v) Add-On Technology Source Code Porting and Optimization -License-Attachment G. - -The Research Use license is effective when You click and accept this -License. The TCK is effective when You click and accept this License, -unless otherwise specified in the TCK attachments. The Commercial Use -and Trademark, Add-On Technology License, and the Add-On Technology -Source Code Porting and Optimization licenses must each be signed by You -and Original Contributor to become effective. Once effective, these -licenses and the associated requirements and responsibilities are -cumulative. Capitalized terms used in this License are defined in the -Glossary. - -*2. License Grants.* - -2.1 Original Contributor Grant. - -Subject to Your compliance with Sections 3, 8.10 and Attachment A of -this License, Original Contributor grants to You a worldwide, -royalty-free, non-exclusive license, to the extent of Original -Contributor's Intellectual Property Rights covering the Original Code, -Upgraded Code and Specifications, to do the following: - -(a) Research Use License: - -(i) use, reproduce and modify the Original Code, Upgraded Code and -Specifications to create Modifications and Reformatted Specifications -for Research Use by You; - -(ii) publish and display Original Code, Upgraded Code and Specifications -with, or as part of Modifications, as permitted under Section 3.1(b) below; - -(iii) reproduce and distribute copies of Original Code and Upgraded Code -to Licensees and students for Research Use by You; - -(iv) compile, reproduce and distribute Original Code and Upgraded Code -in Executable form, and Reformatted Specifications to anyone for -Research Use by You. - -(b) Other than the licenses expressly granted in this License, Original -Contributor retains all right, title, and interest in Original Code and -Upgraded Code and Specifications. - -2.2 Your Grants. - -(a) To Other Licensees. You hereby grant to each Licensee a license to -Your Error Corrections and Shared Modifications, of the same scope and -extent as Original Contributor's licenses under Section 2.1 a) above -relative to Research Use and Attachment D relative to Commercial Use. - -(b) To Original Contributor. You hereby grant to Original Contributor a -worldwide, royalty-free, non-exclusive, perpetual and irrevocable -license, to the extent of Your Intellectual Property Rights covering -Your Error Corrections, Shared Modifications and Reformatted -Specifications, to use, reproduce, modify, display and distribute Your -Error Corrections, Shared Modifications and Reformatted Specifications, -in any form, including the right to sublicense such rights through -multiple tiers of distribution. - -(c) Other than the licenses expressly granted in Sections 2.2(a) and (b) -above, and the restrictions set forth in Section 3.1(d)(iv) below, You -retain all right, title, and interest in Your Error Corrections, Shared -Modifications and Reformatted Specifications. - -2.3 Contributor Modifications. - -You may use, reproduce, modify, display and distribute Contributor Error -Corrections, Shared Modifications and Reformatted Specifications, -obtained by You under this License, to the same scope and extent as with -Original Code, Upgraded Code and Specifications. - -2.4 Subcontracting. - -You may deliver the Source Code of Covered Code to other Licensees -having at least a Research Use license, for the sole purpose of -furnishing development services to You in connection with Your rights -granted in this License. All such Licensees must execute appropriate -documents with respect to such work consistent with the terms of this -License, and acknowledging their work-made-for-hire status or assigning -exclusive right to the work product and associated Intellectual Property -Rights to You. - -*3. Requirements and Responsibilities*. - -3.1 Research Use License. - -As a condition of exercising the rights granted under Section 2.1(a) -above, You agree to comply with the following: - -(a) Your Contribution to the Community. All Error Corrections and Shared -Modifications which You create or contribute to are automatically -subject to the licenses granted under Section 2.2 above. You are -encouraged to license all of Your other Modifications under Section 2.2 -as Shared Modifications, but are not required to do so. You agree to -notify Original Contributor of any errors in the Specification. - -(b) Source Code Availability. You agree to provide all Your Error -Corrections to Original Contributor as soon as reasonably practicable -and, in any event, prior to Internal Deployment Use or Commercial Use, -if applicable. Original Contributor may, at its discretion, post Source -Code for Your Error Corrections and Shared Modifications on the -Community Webserver. You may also post Error Corrections and Shared -Modifications on a web-server of Your choice; provided, that You must -take reasonable precautions to ensure that only Licensees have access to -such Error Corrections and Shared Modifications. Such precautions shall -include, without limitation, a password protection scheme limited to -Licensees and a click-on, download certification of Licensee status -required of those attempting to download from the server. An example of -an acceptable certification is attached as Attachment A-2. - -(c) Notices. All Error Corrections and Shared Modifications You create -or contribute to must include a file documenting the additions and -changes You made and the date of such additions and changes. You must -also include the notice set forth in Attachment A-1 in the file header. -If it is not possible to put the notice in a particular Source Code file -due to its structure, then You must include the notice in a location -(such as a relevant directory file), where a recipient would be most -likely to look for such a notice. - -(d) Redistribution. - -(i) Source. Covered Code may be distributed in Source Code form only to -another Licensee (except for students as provided below). You may not -offer or impose any terms on any Covered Code that alter the rights, -requirements, or responsibilities of such Licensee. You may distribute -Covered Code to students for use in connection with their course work -and research projects undertaken at accredited educational institutions. -Such students need not be Licensees, but must be given a copy of the -notice set forth in Attachment A-3 and such notice must also be included -in a file header or prominent location in the Source Code made available -to such students. - -(ii) Executable. You may distribute Executable version(s) of Covered -Code to Licensees and other third parties only for the purpose of -evaluation and comment in connection with Research Use by You and under -a license of Your choice, but which limits use of such Executable -version(s) of Covered Code only to that purpose. - -(iii) Modified Class, Interface and Package Naming. In connection with -Research Use by You only, You may use Original Contributor's class, -Interface and package names only to accurately reference or invoke the -Source Code files You modify. Original Contributor grants to You a -limited license to the extent necessary for such purposes. - -(iv) You expressly agree that any distribution, in whole or in part, of -Modifications developed by You shall only be done pursuant to the terms -and conditions of this License. - -(e) Extensions. - -(i) Covered Code. You may not include any Source Code of Community Code -in any Extensions. You may include the compiled Header Files of -Community Code in an Extension provided that Your use of the Covered -Code, including Heading Files, complies with the Commercial Use License, -the TCK and all other terms of this License. - -(ii) Publication. No later than the date on which You first distribute -such Extension for Commercial Use, You must publish to the industry, on -a non-confidential basis and free of all copyright restrictions with -respect to reproduction and use, an accurate and current specification -for any Extension. In addition, You must make available an appropriate -test suite, pursuant to the same rights as the specification, -sufficiently detailed to allow any third party reasonably skilled in the -technology to produce implementations of the Extension compatible with -the specification. Such test suites must be made available as soon as -reasonably practicable but, in no event, later than ninety (90) days -after Your first Commercial Use of the Extension. You must use -reasonable efforts to promptly clarify and correct the specification and -the test suite upon written request by Original Contributor. - -(iii) Open. You agree to refrain from enforcing any Intellectual -Property Rights You may have covering any interface(s) of Your -Extension, which would prevent the implementation of such interface(s) -by Original Contributor or any Licensee. This obligation does not -prevent You from enforcing any Intellectual Property Right You have that -would otherwise be infringed by an implementation of Your Extension. - -(iv) Interface Modifications and Naming. You may not modify or add to -the GUID space * * "xxxxxxxx-0901-11d1-8B06-00A024406D59" or any other -GUID space designated by Original Contributor. You may not modify any -Interface prefix provided with the Covered Code or any other prefix -designated by Original Contributor.* * - -* * - -(f) You agree that any Specifications provided to You by Original -Contributor are confidential and proprietary information of Original -Contributor. You must maintain the confidentiality of the Specifications -and may not disclose them to any third party without Original -Contributor's prior written consent. You may only use the Specifications -under the terms of this License and only for the purpose of implementing -the terms of this License with respect to Covered Code. You agree not -use, copy or distribute any such Specifications except as provided in -writing by Original Contributor. - -3.2 Commercial Use License. - -You may not make Commercial Use of any Covered Code unless You and -Original Contributor have executed a copy of the Commercial Use and -Trademark License attached as Attachment D. - -*4. Versions of the License.* - -4.1 License Versions. - -Original Contributor may publish revised versions of the License from -time to time. Each version will be given a distinguishing version number. - -4.2 Effect. - -Once a particular version of Covered Code has been provided under a -version of the License, You may always continue to use such Covered Code -under the terms of that version of the License. You may also choose to -use such Covered Code under the terms of any subsequent version of the -License. No one other than Original Contributor has the right to -promulgate License versions. - -4.3 Multiple-Licensed Code. - -Original Contributor may designate portions of the Covered Code as -"Multiple-Licensed." "Multiple-Licensed" means that the Original -Contributor permits You to utilize those designated portions of the -Covered Code under Your choice of this License or the alternative -license(s), if any, specified by the Original Contributor in an -Attachment to this License. - -*5. Disclaimer of Warranty.* - -5.1 COVERED CODE PROVIDED AS IS. - -COVERED CODE IS PROVIDED UNDER THIS LICENSE "AS IS," WITHOUT WARRANTY OF -ANY KIND, EITHER EXPRESS OR IMPLIED, INCLUDING, WITHOUT LIMITATION, -WARRANTIES THAT THE COVERED CODE IS FREE OF DEFECTS, MERCHANTABLE, FIT -FOR A PARTICULAR PURPOSE OR NON-INFRINGING. YOU AGREE TO BEAR THE ENTIRE -RISK IN CONNECTION WITH YOUR USE AND DISTRIBUTION OF COVERED CODE UNDER -THIS LICENSE. THIS DISCLAIMER OF WARRANTY CONSTITUTES AN ESSENTIAL PART -OF THIS LICENSE. NO USE OF ANY COVERED CODE IS AUTHORIZED HEREUNDER -EXCEPT SUBJECT TO THIS DISCLAIMER. - -5.2 Not Designed for High Risk Activities. - -You acknowledge that Original Code, Upgraded Code and Specifications are -not designed or intended for use in high risk activities including, but -not limited to: (i) on-line control of aircraft, air traffic, aircraft -navigation or aircraft communications; or (ii) in the design, -construction, operation or maintenance of any nuclear facility. Original -Contributor disclaims any express or implied warranty of fitness for -such uses. - -*6. Termination.* - -6.1 By You. - -You may terminate this Research Use license at anytime by providing -written notice to Original Contributor. - -6.2 By Original Contributor. - -This License and the rights granted hereunder will terminate: - -(i) automatically if You fail to comply with the terms of this License -and fail to cure such breach within 30 days of receipt of written notice -of the breach; - -(ii) immediately in the event of circumstances specified in Sections 7.1 -and 8.4; or - -(iii) at Original Contributor's discretion upon any action initiated by -You (including by cross-claim or counter claim) alleging that use or -distribution by Original Contributor or any Licensee, of Original Code, -Upgraded Code, Error Corrections, Shared Modifications or Specifications -infringe a patent owned or controlled by You. - -6.3 Effective of Termination. - -Upon termination, You agree to discontinue use of and destroy all copies -of Covered Code in Your possession. All sublicenses to the Covered Code -which You have properly granted shall survive any termination of this -License. Provisions that, by their nature, should remain in effect -beyond the termination of this License shall survive including, without -limitation, Sections 2.2, 3, 5, 7 and 8. - -6.4 No Compensation. - -Each party waives and releases the other from any claim to compensation -or indemnity for permitted or lawful termination of the business -relationship established by this License. - -*7. Liability.* - -7.1 Infringement. Should any of the Original Code, Upgraded Code, TCK or -Specifications ("Materials") become the subject of a claim of -infringement, Original Contributor may, at its sole option, (i) attempt -to procure the rights necessary for You to continue using the Materials, -(ii) modify the Materials so that they are no longer infringing, or -(iii) terminate Your right to use the Materials, immediately upon -written notice, and refund to You the amount, if any, having then -actually been paid by You to Original Contributor for the Original Code, -Upgraded Code and TCK, depreciated on a straight line, five year basis. - -7.2 LIMITATION OF LIABILITY. TO THE FULL EXTENT ALLOWED BY APPLICABLE -LAW, ORIGINAL CONTRIBUTOR'S LIABILITY TO YOU FOR CLAIMS RELATING TO THIS -LICENSE, WHETHER FOR BREACH OR IN TORT, SHALL BE LIMITED TO ONE HUNDRED -PERCENT (100%) OF THE AMOUNT HAVING THEN ACTUALLY BEEN PAID BY YOU TO -ORIGINAL CONTRIBUTOR FOR ALL COPIES LICENSED HEREUNDER OF THE PARTICULAR -ITEMS GIVING RISE TO SUCH CLAIM, IF ANY, DURING THE TWELVE MONTHS -PRECEDING THE CLAIMED BREACH. IN NO EVENT WILL YOU (RELATIVE TO YOUR -SHARED MODIFICATIONS OR ERROR CORRECTIONS) OR ORIGINAL CONTRIBUTOR BE -LIABLE FOR ANY INDIRECT, PUNITIVE, SPECIAL, INCIDENTAL OR CONSEQUENTIAL -DAMAGES IN CONNECTION WITH OR RISING OUT OF THIS LICENSE (INCLUDING, -WITHOUT LIMITATION, LOSS OF PROFITS, USE, DATA, OR OTHER ECONOMIC -ADVANTAGE), HOWEVER IT ARISES AND ON ANY THEORY OF LIABILITY, WHETHER IN -AN ACTION FOR CONTRACT, STRICT LIABILITY OR TORT (INCLUDING NEGLIGENCE) -OR OTHERWISE, WHETHER OR NOT YOU OR ORIGINAL CONTRIBUTOR HAS BEEN -ADVISED OF THE POSSIBILITY OF SUCH DAMAGE AND NOTWITHSTANDING THE -FAILURE OF ESSENTIAL PURPOSE OF ANY REMEDY. - -*8. Miscellaneous.* - -8.1 Trademark. - -You shall not use any Trademark unless You and Original Contributor -execute a copy of the Commercial Use and Trademark License Agreement -attached hereto as Attachment D. Except as expressly provided in the -License, You are granted no right, title or license to, or interest in, -any Trademarks. Whether or not You and Original Contributor enter into -the Trademark License, You agree not to (i) challenge Original -Contributor's ownership or use of Trademarks; (ii) attempt to register -any Trademarks, or any mark or logo substantially similar thereto; or -(iii) incorporate any Trademarks into Your own trademarks, product -names, service marks, company names, or domain names. - -8.2 Integration. - -This License represents the complete agreement concerning the subject -matter hereof. - -8.3 Assignment. - -Original Contributor may assign this License, and its rights and -obligations hereunder, in its sole discretion. You may assign the -Research Use portions of this License and the TCK license to a third -party upon prior written notice to Original Contributor (which may be -provided electronically via the Community Web-Server). You may not -assign the Commercial Use and Trademark license, the Add-On Technology -License, or the Add-On Technology Source Code Porting License, including -by way of merger (regardless of whether You are the surviving entity) or -acquisition, without Original Contributor's prior written consent. - -8.4 Severability. - -If any provision of this License is held to be unenforceable, such -provision shall be reformed only to the extent necessary to make it -enforceable. Notwithstanding the foregoing, if You are prohibited by law -from fully and specifically complying with Sections 2.2 or 3, this -License will immediately terminate and You must immediately discontinue -any use of Covered Code. - -8.5 Governing Law. - -This License shall be governed by the laws of the United States and the -State of Washington, as applied to contracts entered into and to be -performed in Washington between Washington residents. The application of -the United Nations Convention on Contracts for the International Sale of -Goods is expressly excluded. You agree that the state and federal courts -located in Seattle, Washington have exclusive jurisdiction over any -claim relating to the License, including contract and tort claims. - -8.6 Dispute Resolution. - -a) Arbitration. Any dispute arising out of or relating to this License -shall be finally settled by arbitration as set out herein, except that -either party may bring any action, in a court of competent jurisdiction -(which jurisdiction shall be exclusive), with respect to any dispute -relating to such party's Intellectual Property Rights or with respect to -Your compliance with the TCK license. Arbitration shall be administered: -(i) by the American Arbitration Association (AAA), (ii) in accordance -with the rules of the United Nations Commission on International Trade -Law (UNCITRAL) (the "Rules") in effect at the time of arbitration as -modified herein; and (iii) the arbitrator will apply the substantive -laws of Washington and the United States. Judgment upon the award -rendered by the arbitrator may be entered in any court having -jurisdiction to enforce such award. - -b) Arbitration language, venue and damages. All arbitration proceedings -shall be conducted in English by a single arbitrator selected in -accordance with the Rules, who must be fluent in English and be either a -retired judge or practicing attorney having at least ten (10) years -litigation experience and be reasonably familiar with the technology -matters relative to the dispute. Unless otherwise agreed, arbitration -venue shall be in Seattle, Washington. The arbitrator may award monetary -damages only and nothing shall preclude either party from seeking -provisional or emergency relief from a court of competent jurisdiction. -The arbitrator shall have no authority to award damages in excess of -those permitted in this License and any such award in excess is void. -All awards will be payable in U.S. dollars and may include, for the -prevailing party (i) pre-judgment award interest, (ii) reasonable -attorneys' fees incurred in connection with the arbitration, and (iii) -reasonable costs and expenses incurred in enforcing the award. The -arbitrator will order each party to produce identified documents and -respond to no more than twenty-five single question interrogatories. - -8.7 Construction. - -Any law or regulation, which provides that the language of a contract -shall be construed against the drafter, shall not apply to this License. - -8.8 U.S. Government End Users. - -The Covered Code is a "commercial item," as that term is defined in 48 -C.F.R. 2.101 (Oct. 1995), consisting of "commercial computer software" -and "commercial computer software documentation," as such terms are used -in 48 C.F.R. 12.212 (Sept. 1995). Consistent with 48 C.F.R. 12.212 and -48 C.F.R. 227.7202-1 through 227.7202-4 (June 1995), all U.S. Government -End Users acquire Covered Code with only those rights set forth herein. -You agree to pass this notice to our licensees. - -8.9 Marketing Activities. - -Licensee hereby grants Original Contributor a non-exclusive, -non-transferable, limited license to use the Licensee's company name and -logo ("Licensee Marks") in any presentations, press releases, or -marketing materials solely for the purpose of identifying Licensee as a -member of the Helix Community. Licensee shall provide samples of -Licensee Marks to Original Contributor upon request by Original -Contributor. Original Contributor acknowledges that the Licensee Marks -are the trademarks of Licensee. Original Contributor shall not use the -Licensee Marks in a way that may imply that Original Contributor is an -agency or branch of Licensee. Original Contributor understands and -agrees that the use of any Licensee Marks in connection with this -Agreement shall not create any right, title or interest, in, or to the -Licensee Marks or any Licensee trademarks and that all such use and -goodwill associated with any such trademarks will inure to the benefit -of Licensee. Further the Original Contributor will stop usage of the -Licensee Marks upon Licensee's request. - -8.10 Press Announcements. - -You may make press announcements or other public statements regarding -this License without the prior written consent of the Original -Contributor, if Your statement is limited to announcing the licensing of -the Covered Code or the availability of Your Product and its -compatibility with the Covered Code. All other public announcements -regarding this license require the prior written consent of the Original -Contributor. Consent requests are welcome at press@helixcommunity.org. - -8.11 International Use. - -a) Export/Import laws. Covered Code is subject to U.S. export control -laws and may be subject to export or import regulations in other -countries. Each party agrees to comply strictly with all such laws and -regulations and acknowledges their responsibility to obtain such -licenses to export, re-export, or import as may be required. You agree -to pass these obligations to Your licensees. - -b) Intellectual Property Protection. Due to limited intellectual -property protection and enforcement in certain countries, You agree not -to redistribute the Original Code, Upgraded Code, TCK and Specifications -to any country on the list of restricted countries on the Community Web -Server. - -8.12 Language. - -This License is in the English language only, which language shall be -controlling in all respects, and all versions of this License in any -other language shall be for accommodation only and shall not be binding -on the parties to this License. All communications and notices made or -given pursuant to this License, and all documentation and support to be -provided, unless otherwise noted, shall be in the English language. - -PLEASE READ THE TERMS OF THIS LICENSE CAREFULLY. BY CLICKING ON THE -"ACCEPT" BUTTON BELOW YOU ARE ACCEPTING AND AGREEING TO THE TERMS AND -CONDITIONS OF THIS LICENSE WITH REALNETWORKS, INC. IF YOU ARE AGREEING -TO THIS LICENSE ON BEHALF OF A COMPANY, YOU REPRESENT THAT YOU ARE -AUTHORIZED TO BIND THE COMPANY TO SUCH A LICENSE. WHETHER YOU ARE ACTING -ON YOUR OWN BEHALF, OR REPRESENTING A COMPANY, YOU MUST BE OF MAJORITY -AGE AND BE OTHERWISE COMPETENT TO ENTER INTO CONTRACTS. IF YOU DO NOT -MEET THIS CRITERIA OR YOU DO NOT AGREE TO ANY OF THE TERMS AND -CONDITIONS OF THIS LICENSE, CLICK ON THE REJECT BUTTON TO EXIT. - - - GLOSSARY - -1. *"Added Value"* means code which: - -(i) has a principal purpose which is substantially different from that -of the stand-alone Technology; - -(ii) represents a significant functional and value enhancement to the -Technology; - -(iii) operates in conjunction with the Technology; and - -(iv) is not marketed as a technology which replaces or substitutes for -the Technology - -2. "*Applicable Patent Rights*" mean: (a) in the case where Original -Contributor is the grantor of rights, claims of patents that (i) are now -or hereafter acquired, owned by or assigned to Original Contributor and -(ii) are necessarily infringed by using or making the Original Code or -Upgraded Code, including Modifications provided by Original Contributor, -alone and not in combination with other software or hardware; and (b) in -the case where Licensee is the grantor of rights, claims of patents that -(i) are now or hereafter acquired, owned by or assigned to Licensee and -(ii) are infringed (directly or indirectly) by using or making -Licensee's Modifications or Error Corrections, taken alone or in -combination with Covered Code. - -3. "*Application Programming Interfaces (APIs)"* means the interfaces, -associated header files, service provider interfaces, and protocols that -enable a device, application, Operating System, or other program to -obtain services from or make requests of (or provide services in -response to requests from) other programs, and to use, benefit from, or -rely on the resources, facilities, and capabilities of the relevant -programs using the APIs. APIs includes the technical documentation -describing the APIs, the Source Code constituting the API, and any -Header Files used with the APIs. - -4. "*Commercial Use*" means any use (internal or external), copying, -sublicensing or distribution (internal or external), directly or -indirectly of Covered Code by You other than Your Research Use of -Covered Code within Your business or organization or in conjunction with -other Licensees with equivalent Research Use rights. Commercial Use -includes any use of the Covered Code for direct or indirect commercial -or strategic gain, advantage or other business purpose. Any Commercial -Use requires execution of Attachment D by You and Original Contributor. - -5. "*Community Code*" means the Original Code, Upgraded Code, Error -Corrections, Shared Modifications, or any combination thereof. - -6. "*Community Webserver(s)"* means the webservers designated by -Original Contributor for access to the Original Code, Upgraded Code, TCK -and Specifications and for posting Error Corrections and Shared -Modifications. - -7. "*Compliant Covered Code*" means Covered Code that complies with the -requirements of the TCK. - -8. "*Contributor*" means each Licensee that creates or contributes to -the creation of any Error Correction or Shared Modification. - -9. "*Covered Code*" means the Original Code, Upgraded Code, -Modifications, or any combination thereof. - -10. "*Error Correction*" means any change made to Community Code which -conforms to the Specification and corrects the adverse effect of a -failure of Community Code to perform any function set forth in or -required by the Specifications. - -11. "*Executable*" means Covered Code that has been converted from -Source Code to the preferred form for execution by a computer or digital -processor (e.g. binary form). - -12. "*Extension(s)"* means any additional Interfaces developed by or for -You which: (i) are designed for use with the Technology; (ii) constitute -an API for a library of computing functions or services; and (iii) are -disclosed or otherwise made available to third party software developers -for the purpose of developing software which invokes such additional -Interfaces. The foregoing shall not apply to software developed by Your -subcontractors to be exclusively used by You. - -13. "*Header File(s)"* means that portion of the Source Code that -provides the names and types of member functions, data members, class -definitions, and interface definitions necessary to implement the APIs -for the Covered Code. Header Files include, files specifically -designated by Original Contributor as Header Files. Header Files do not -include the code necessary to implement the functionality underlying the -Interface. - -14. *"Helix DNA Server Technology"* means the program(s) that implement -the Helix Universal Server streaming engine for the Technology as -defined in the Specification. - -15. *"Helix DNA Client Technology"* means the Covered Code that -implements the RealOne Player engine as defined in the Specification. - -16. *"Helix DNA Producer Technology"* means the Covered Code that -implements the Helix Producer engine as defined in the Specification. - -17. *"Helix DNA Technology"* means the Helix DNA Server Technology, the -Helix DNA Client Technology, the Helix DNA Producer Technology and other -Helix technologies designated by Original Contributor. - -18. "*Intellectual Property Rights*" means worldwide statutory and -common law rights associated solely with (i) Applicable Patent Rights; -(ii) works of authorship including copyrights, copyright applications, -copyright registrations and "moral rights"; (iii) the protection of -trade and industrial secrets and confidential information; and (iv) -divisions, continuations, renewals, and re-issuances of the foregoing -now existing or acquired in the future. - -19. *"Interface*" means interfaces, functions, properties, class -definitions, APIs, Header Files, GUIDs, V-Tables, and/or protocols -allowing one piece of software, firmware or hardware to communicate or -interoperate with another piece of software, firmware or hardware. - -20. "*Internal Deployment Use*" means use of Compliant Covered Code -(excluding Research Use) within Your business or organization only by -Your employees and/or agents on behalf of Your business or organization, -but not to provide services, including content distribution, to third -parties, subject to execution of Attachment D by You and Original -Contributor, if required. - -21. "*Licensee*" means any party that has entered into and has in effect -a version of this License with Original Contributor. - -22. "*MIME type*" means a description of what type of media or other -content is in a file, including by way of example but not limited to -'audio/x-pn-realaudio-plugin.' - -23. "*Modification(s)"* means (i) any addition to, deletion from and/or -change to the substance and/or structure of the Covered Code, including -Interfaces; (ii) the combination of any Covered Code and any previous -Modifications; (iii) any new file or other representation of computer -program statements that contains any portion of Covered Code; and/or -(iv) any new Source Code implementing any portion of the Specifications. - -24. "*MP3 Patents*" means any patents necessary to make, use or sell -technology implementing any portion of the specification developed by -the Moving Picture Experts Group known as MPEG-1 Audio Layer-3 or MP3, -including but not limited to all past and future versions, profiles, -extensions, parts and amendments relating to the MP3 specification. - -25. "*MPEG-4 Patents*" means any patents necessary to make, use or sell -technology implementing any portion of the specification developed by -the Moving Pictures Experts Group known as MPEG-4, including but not -limited to all past and future versions, profiles, extensions, parts and -amendments relating to the MPEG-4 specification. - -26. "*Original Code*" means the initial Source Code for the Technology -as described on the Community Web Server. - -27. "*Original Contributor*" means RealNetworks, Inc., its affiliates -and its successors and assigns. - -28. "*Original Contributor MIME Type*" means the MIME registry, browser -preferences, or local file/protocol associations invoking any Helix DNA -Client-based application, including the RealOne Player, for playback of -RealAudio, RealVideo, other RealMedia MIME types or datatypes (e.g., -.ram, .rnx, .rpm, .ra, .rm, .rp, .rt, .rf, .prx, .mpe, .rmp, .rmj, .rav, -.rjs, .rmx, .rjt, .rms), and any other Original Contributor-specific or -proprietary MIME types that Original Contributor may introduce in the -future. - -29. "*Personal Use*" means use of Covered Code by an individual solely -for his or her personal, private and non-commercial purposes. An -individual's use of Covered Code in his or her capacity as an officer, -employee, member, independent contractor or agent of a corporation, -business or organization (commercial or non-commercial) does not qualify -as Personal Use. - -30. "*RealMedia File Format*" means the file format designed and -developed by RealNetworks for storing multimedia data and used to store -RealAudio and RealVideo encoded streams. Valid RealMedia File Format -extensions include: .rm, .rmj, .rmc, .rmvb, .rms. - -31. "*RCSL Webpage*" means the RealNetworks Community Source License -webpage located at https://www.helixcommunity.org/content/rcsl or such -other URL that Original Contributor may designate from time to time. - -32. "*Reformatted Specifications*" means any revision to the -Specifications which translates or reformats the Specifications (as for -example in connection with Your documentation) but which does not alter, -subset or superset * *the functional or operational aspects of the -Specifications. - -33. "*Research Use*" means use and distribution of Covered Code only for -Your Personal Use, research or development use and expressly excludes -Internal Deployment Use and Commercial Use. Research Use also includes -use of Covered Code to teach individuals how to use Covered Code. - -34. "*Shared Modifications*" means Modifications that You distribute or -use for a Commercial Use, in addition to any Modifications provided by -You, at Your option, pursuant to Section 2.2, or received by You from a -Contributor pursuant to Section 2.3. - -35. "*Source Code*" means the preferred form of the Covered Code for -making modifications to it, including all modules it contains, plus any -associated interface definition files, scripts used to control -compilation and installation of an Executable, or source code -differential comparisons against either the Original Code or another -well known, available Covered Code of the Contributor's choice. The -Source Code can be in a compressed or archival form, provided the -appropriate decompression or de-archiving software is widely available -for no charge. - -36. "*Specifications*" means the specifications for the Technology and -other documentation, as designated on the Community Web Server, as may -be revised by Original Contributor from time to time. - -37. "*Trademarks*" means Original Contributor's trademarks and logos, -including, but not limited to, RealNetworks, RealAudio, RealVideo, -RealOne, RealSystem, SureStream, Helix, Helix DNA and other trademarks -whether now used or adopted in the future. - -38. "*Technology*" means the technology described in Attachment B, and -Upgrades. - -39. "*Technology Compatibility Kit"* or *"TCK*" means the test programs, -procedures, acceptance criteria and/or other requirements, designated by -Original Contributor for use in verifying compliance of Covered Code -with the Specifications, in conjunction with the Original Code and -Upgraded Code. Original Contributor may, in its sole discretion and from -time to time, revise a TCK to correct errors and/or omissions and in -connection with Upgrades. - -40. "*Upgrade(s)"* means new versions of Technology designated -exclusively by Original Contributor as an "Upgrade" and released by -Original Contributor from time to time under the terms of the License. - -41. "*Upgraded Code*" means the Source Code and/or Executables for -Upgrades, possibly including Modifications made by Contributors. - -42. *"User's Guide"* means the users guide for the TCK which Original -Contributor makes available to You to provide direction in how to run -the TCK and properly interpret the results, as may be revised by -Original Contributor from time to time. - -43. "*You(r)*" means an individual, or a legal entity acting by and -through an individual or individuals, exercising rights either under -this License or under a future version of this License issued pursuant -to Section 4.1. For legal entities, "You(r)" includes any entity that by -majority voting interest controls, is controlled by, or is under common -control with You. - -44. "*Your Products*" means any (i) hardware products You distribute -integrating the Covered Code; (ii) any software products You distribute -with the Covered Code that utilize the APIs of the Covered Code; or -(iii) any services You provide using the Covered Code. - - - ATTACHMENT A - -REQUIRED NOTICES - - - ATTACHMENT A-1 - -REQUIRED IN ALL CASES - -Notice to be included in header file of all Error Corrections and Shared -Modifications: - -Portions Copyright 1994-2003 © RealNetworks, Inc. All rights reserved. - -The contents of this file, and the files included with this file, are -subject to the current version of RealNetworks Community Source License -Version 1.1 (the "License"). You may not use this file except in -compliance with the License executed by both You and RealNetworks. You -may obtain a copy of the License at * -https://www.helixcommunity.org/content/rcsl.* You may also obtain a copy -of the License by contacting RealNetworks directly. Please see the -License for the rights, obligations and limitations governing use of the -contents of the file. - -This file is part of the Helix DNA technology. RealNetworks, Inc., is -the developer of the Original code and owns the copyrights in the -portions it created. - -This file, and the files included with this file, are distributed on an -'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESS OR IMPLIED, -AND REALNETWORKS HEREBY DISCLAIMS ALL SUCH WARRANTIES, INCLUDING WITHOUT -LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR -PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT. - -Contributor(s): - -_______________________________________________ - -Technology Compatibility Kit Test Suite(s) Location: - -________________________________ - - - ATTACHMENT A-2 - -SAMPLE LICENSEE CERTIFICATION - -"By clicking the `Agree' button below, You certify that You are a -Licensee in good standing under the RealNetworks Community Source -License, ("License") and that Your access, use and distribution of code -and information You may obtain at this site is subject to the License. -If You are not a Licensee under the RealNetworks Community Source -License You agree not to download, copy or use the Helix DNA technology. - - - ATTACHMENT A-3 - -REQUIRED STUDENT NOTIFICATION - -"This software and related documentation has been obtained by Your -educational institution subject to the RealNetworks Community Source -License. You have been provided access to the software and related -documentation for use only in connection with your course work and -research activities as a matriculated student of Your educational -institution. Any other use is expressly prohibited. - -THIS SOFTWARE AND RELATED DOCUMENTATION CONTAINS PROPRIETARY MATERIAL OF -REALNETWORKS, INC, WHICH ARE PROTECTED BY VARIOUS INTELLECTUAL PROPERTY -RIGHTS. - -You may not use this file except in compliance with the License. You may -obtain a copy of the License on the web at -https://www.helixcommunity.org/content/rcsl. - -* -* - - - ATTACHMENT B - -Description of Technology - -Helix DNA, which consists of Helix DNA Client, Helix DNA Server and -Helix DNA Producer. - -Description of "Technology" - -Helix DNA Technology v1.0 as described on the Community Web Server. - - - ATTACHMENT C - -TECHNOLOGY COMPATIBILITY KIT LICENSE - -The following license is effective for the *Helix DNA* Technology -Compatibility Kit - as described on the Community Web Server. The -Technology Compatibility Kit(s) for the Technology specified in -Attachment B may be accessed at the Community Web Server. - -1. TCK License. - -1.1 Grants to use TCK - -Subject to the terms and restrictions set forth below and the -RealNetworks Community Source License, and the Research Use license, -Original Contributor grants to You a worldwide, non-exclusive, -non-transferable license, to the extent of Original Contributor's -Intellectual Property Rights in the TCK (without the right to -sublicense), to use the TCK to develop and test Covered Code. - -1.2 TCK Use Restrictions. - -You are not authorized to create derivative works of the TCK or use the -TCK to test any implementation of the Specification that is not Covered -Code. You may not publish Your test results or make claims of -comparative compatibility with respect to other implementations of the -Specification. In consideration for the license grant in Section 1.1 -above You agree not to develop Your own tests that are intended to -validate conformation with the Specification. - -2. Test Results. - -You agree to provide to Original Contributor or the third party test -facility if applicable, Your test results that demonstrate that Covered -Code is Compliant Covered Code and that Original Contributor may publish -or otherwise distribute such test results. - -PLEASE READ THE TERMS OF THIS LICENSE CAREFULLY. BY CLICKING ON THE -"ACCEPT" BUTTON BELOW YOU ARE ACCEPTING AND AGREEING TO THE TERMS AND -CONDITIONS OF THIS LICENSE WITH THE ORIGINAL CONTRIBUTOR, REALNETWORKS, -INC. IF YOU ARE AGREEING TO THIS LICENSE ON BEHALF OF A COMPANY, YOU -REPRESENT THAT YOU ARE AUTHORIZED TO BIND THE COMPANY TO SUCH A LICENSE. -WHETHER YOU ARE ACTING ON YOUR OWN BEHALF, OR REPRESENTING A COMPANY, -YOU MUST BE OF MAJORITY AGE AND BE OTHERWISE COMPETENT TO ENTER INTO -CONTRACTS. IF YOU DO NOT MEET THIS CRITERIA OR YOU DO NOT AGREE TO ANY -OF THE TERMS AND CONDITIONS OF THIS LICENSE, CLICK ON THE REJECT BUTTON -TO EXIT. - -*ACCEPT / REJECT -* - -* -* - -*To agree to the R&D/academic terms of this license, please register - on the site -- -you will then be given a chance to agree to the clickwrap RCSL - -R&D License - -and gain access to the RCSL-licensed source code. To build or deploy -commercial applications based on the RCSL, you will need to agree to the -Commercial Use license attachments -* - - - diff --git a/bsp/stm32_radio/mp3/real/projects/armads/RPSL.txt b/bsp/stm32_radio/mp3/real/projects/armads/RPSL.txt deleted file mode 100644 index d040a45205..0000000000 --- a/bsp/stm32_radio/mp3/real/projects/armads/RPSL.txt +++ /dev/null @@ -1,518 +0,0 @@ -RealNetworks Public Source License Version 1.0 -(Rev. Date October 28, 2002) - -1. General Definitions. This License applies to any program or other work which -RealNetworks, Inc., or any other entity that elects to use this license, -("Licensor") makes publicly available and which contains a notice placed by -Licensor identifying such program or work as "Original Code" and stating that it -is subject to the terms of this RealNetworks Public Source License version 1.0 -(or subsequent version thereof) ("License"). You are not required to accept this -License. However, nothing else grants You permission to use, copy, modify or -distribute the software or its derivative works. These actions are prohibited by -law if You do not accept this License. Therefore, by modifying, copying or -distributing the software (or any work based on the software), You indicate your -acceptance of this License to do so, and all its terms and conditions. In -addition, you agree to the terms of this License by clicking the Accept button -or downloading the software. As used in this License: - -1.1 "Applicable Patent Rights" mean: (a) in the case where Licensor is the -grantor of rights, claims of patents that (i) are now or hereafter acquired, -owned by or assigned to Licensor and (ii) are necessarily infringed by using or -making the Original Code alone and not in combination with other software or -hardware; and (b) in the case where You are the grantor of rights, claims of -patents that (i) are now or hereafter acquired, owned by or assigned to You and -(ii) are infringed (directly or indirectly) by using or making Your -Modifications, taken alone or in combination with Original Code. - -1.2 "Compatible Source License" means any one of the licenses listed on Exhibit -B or at https://www.helixcommunity.org/content/complicense or other licenses -specifically identified by Licensor in writing. Notwithstanding any term to the -contrary in any Compatible Source License, any code covered by any Compatible -Source License that is used with Covered Code must be made readily available in -Source Code format for royalty-free use under the terms of the Compatible Source -License or this License. - -1.3 "Contributor" means any person or entity that creates or contributes to the -creation of Modifications. - -1.4 "Covered Code" means the Original Code, Modifications, the combination of -Original Code and any Modifications, and/or any respective portions thereof. - -1.5 "Deploy" means to use, sublicense or distribute Covered Code other than for -Your internal research and development (R&D) and/or Personal Use, and includes -without limitation, any and all internal use or distribution of Covered Code -within Your business or organization except for R&D use and/or Personal Use, as -well as direct or indirect sublicensing or distribution of Covered Code by You -to any third party in any form or manner. - -1.6 "Derivative Work" means either the Covered Code or any derivative work under -United States copyright law, and including any work containing or including any -portion of the Covered Code or Modifications, either verbatim or with -modifications and/or translated into another language. Derivative Work also -includes any work which combines any portion of Covered Code or Modifications -with code not otherwise governed by the terms of this License. - -1.7 "Externally Deploy" means to Deploy the Covered Code in any way that may be -accessed or used by anyone other than You, used to provide any services to -anyone other than You, or used in any way to deliver any content to anyone other -than You, whether the Covered Code is distributed to those parties, made -available as an application intended for use over a computer network, or used to -provide services or otherwise deliver content to anyone other than You. - -1.8. "Interface" means interfaces, functions, properties, class definitions, -APIs, header files, GUIDs, V-Tables, and/or protocols allowing one piece of -software, firmware or hardware to communicate or interoperate with another piece -of software, firmware or hardware. - -1.9 "Modifications" mean any addition to, deletion from, and/or change to, the -substance and/or structure of the Original Code, any previous Modifications, the -combination of Original Code and any previous Modifications, and/or any -respective portions thereof. When code is released as a series of files, a -Modification is: (a) any addition to or deletion from the contents of a file -containing Covered Code; and/or (b) any new file or other representation of -computer program statements that contains any part of Covered Code. - -1.10 "Original Code" means (a) the Source Code of a program or other work as -originally made available by Licensor under this License, including the Source -Code of any updates or upgrades to such programs or works made available by -Licensor under this License, and that has been expressly identified by Licensor -as such in the header file(s) of such work; and (b) the object code compiled -from such Source Code and originally made available by Licensor under this -License. - -1.11 "Personal Use" means use of Covered Code by an individual solely for his or -her personal, private and non-commercial purposes. An individual's use of -Covered Code in his or her capacity as an officer, employee, member, independent -contractor or agent of a corporation, business or organization (commercial or -non-commercial) does not qualify as Personal Use. - -1.12 "Source Code" means the human readable form of a program or other work that -is suitable for making modifications to it, including all modules it contains, -plus any associated interface definition files, scripts used to control -compilation and installation of an executable (object code). - -1.13 "You" or "Your" means an individual or a legal entity exercising rights -under this License. For legal entities, "You" or "Your" includes any entity -which controls, is controlled by, or is under common control with, You, where -"control" means (a) the power, direct or indirect, to cause the direction or -management of such entity, whether by contract or otherwise, or (b) ownership of -fifty percent (50%) or more of the outstanding shares or beneficial ownership of -such entity. - -2. Permitted Uses; Conditions & Restrictions. Subject to the terms and -conditions of this License, Licensor hereby grants You, effective on the date -You accept this License (via downloading or using Covered Code or otherwise -indicating your acceptance of this License), a worldwide, royalty-free, -non-exclusive copyright license, to the extent of Licensor's copyrights cover -the Original Code, to do the following: - -2.1 You may reproduce, display, perform, modify and Deploy Covered Code, -provided that in each instance: - -(a) You must retain and reproduce in all copies of Original Code the copyright -and other proprietary notices and disclaimers of Licensor as they appear in the -Original Code, and keep intact all notices in the Original Code that refer to -this License; - -(b) You must include a copy of this License with every copy of Source Code of -Covered Code and documentation You distribute, and You may not offer or impose -any terms on such Source Code that alter or restrict this License or the -recipients' rights hereunder, except as permitted under Section 6; - -(c) You must duplicate, to the extent it does not already exist, the notice in -Exhibit A in each file of the Source Code of all Your Modifications, and cause -the modified files to carry prominent notices stating that You changed the files -and the date of any change; - -(d) You must make Source Code of all Your Externally Deployed Modifications -publicly available under the terms of this License, including the license grants -set forth in Section 3 below, for as long as you Deploy the Covered Code or -twelve (12) months from the date of initial Deployment, whichever is longer. You -should preferably distribute the Source Code of Your Deployed Modifications -electronically (e.g. download from a web site); and - -(e) if You Deploy Covered Code in object code, executable form only, You must -include a prominent notice, in the code itself as well as in related -documentation, stating that Source Code of the Covered Code is available under -the terms of this License with information on how and where to obtain such -Source Code. You must also include the Object Code Notice set forth in Exhibit A -in the "about" box or other appropriate place where other copyright notices are -placed, including any packaging materials. - -2.2 You expressly acknowledge and agree that although Licensor and each -Contributor grants the licenses to their respective portions of the Covered Code -set forth herein, no assurances are provided by Licensor or any Contributor that -the Covered Code does not infringe the patent or other intellectual property -rights of any other entity. Licensor and each Contributor disclaim any liability -to You for claims brought by any other entity based on infringement of -intellectual property rights or otherwise. As a condition to exercising the -rights and licenses granted hereunder, You hereby assume sole responsibility to -secure any other intellectual property rights needed, if any. For example, if a -third party patent license is required to allow You to make, use, sell, import -or offer for sale the Covered Code, it is Your responsibility to acquire such -license(s). - -2.3 Subject to the terms and conditions of this License, Licensor hereby grants -You, effective on the date You accept this License (via downloading or using -Covered Code or otherwise indicating your acceptance of this License), a -worldwide, royalty-free, perpetual, non-exclusive patent license under -Licensor's Applicable Patent Rights to make, use, sell, offer for sale and -import the Covered Code, provided that in each instance you comply with the -terms of this License. - -3. Your Grants. In consideration of, and as a condition to, the licenses granted -to You under this License: - -(a) You grant to Licensor and all third parties a non-exclusive, perpetual, -irrevocable, royalty free license under Your Applicable Patent Rights and other -intellectual property rights owned or controlled by You, to make, sell, offer -for sale, use, import, reproduce, display, perform, modify, distribute and -Deploy Your Modifications of the same scope and extent as Licensor's licenses -under Sections 2.1 and 2.2; and - -(b) You grant to Licensor and its subsidiaries a non-exclusive, worldwide, -royalty-free, perpetual and irrevocable license, under Your Applicable Patent -Rights and other intellectual property rights owned or controlled by You, to -make, use, sell, offer for sale, import, reproduce, display, perform, -distribute, modify or have modified (for Licensor and/or its subsidiaries), -sublicense and distribute Your Modifications, in any form and for any purpose, -through multiple tiers of distribution. - -(c) You agree not use any information derived from Your use and review of the -Covered Code, including but not limited to any algorithms or inventions that may -be contained in the Covered Code, for the purpose of asserting any of Your -patent rights, or assisting a third party to assert any of its patent rights, -against Licensor or any Contributor. - -4. Derivative Works. You may create a Derivative Work by combining Covered Code -with other code not otherwise governed by the terms of this License and -distribute the Derivative Work as an integrated product. In each such instance, -You must make sure the requirements of this License are fulfilled for the -Covered Code or any portion thereof, including all Modifications. - -4.1 You must cause any Derivative Work that you distribute, publish or -Externally Deploy, that in whole or in part contains or is derived from the -Covered Code or any part thereof, to be licensed as a whole at no charge to all -third parties under the terms of this License and no other license except as -provided in Section 4.2. You also must make Source Code available for the -Derivative Work under the same terms as Modifications, described in Sections 2 -and 3, above. - -4.2 Compatible Source Licenses. Software modules that have been independently -developed without any use of Covered Code and which contain no portion of the -Covered Code, Modifications or other Derivative Works, but are used or combined -in any way wtih the Covered Code or any Derivative Work to form a larger -Derivative Work, are exempt from the conditions described in Section 4.1 but -only to the extent that: the software module, including any software that is -linked to, integrated with, or part of the same applications as, the software -module by any method must be wholly subject to one of the Compatible Source -Licenses. Notwithstanding the foregoing, all Covered Code must be subject to the -terms of this License. Thus, the entire Derivative Work must be licensed under a -combination of the RPSL (for Covered Code) and a Compatible Source License for -any independently developed software modules within the Derivative Work. The -foregoing requirement applies even if the Compatible Source License would -ordinarily allow the software module to link with, or form larger works with, -other software that is not subject to the Compatible Source License. For -example, although the Mozilla Public License v1.1 allows Mozilla code to be -combined with proprietary software that is not subject to the MPL, if -MPL-licensed code is used with Covered Code the MPL-licensed code could not be -combined or linked with any code not governed by the MPL. The general intent of -this section 4.2 is to enable use of Covered Code with applications that are -wholly subject to an acceptable open source license. You are responsible for -determining whether your use of software with Covered Code is allowed under Your -license to such software. - -4.3 Mere aggregation of another work not based on the Covered Code with the -Covered Code (or with a work based on the Covered Code) on a volume of a storage -or distribution medium does not bring the other work under the scope of this -License. If You deliver the Covered Code for combination and/or integration with -an application previously provided by You (for example, via automatic updating -technology), such combination and/or integration constitutes a Derivative Work -subject to the terms of this License. - -5. Exclusions From License Grant. Nothing in this License shall be deemed to -grant any rights to trademarks, copyrights, patents, trade secrets or any other -intellectual property of Licensor or any Contributor except as expressly stated -herein. No right is granted to the trademarks of Licensor or any Contributor -even if such marks are included in the Covered Code. Nothing in this License -shall be interpreted to prohibit Licensor from licensing under different terms -from this License any code that Licensor otherwise would have a right to -license. Modifications, Derivative Works and/or any use or combination of -Covered Code with other technology provided by Licensor or third parties may -require additional patent licenses from Licensor which Licensor may grant in its -sole discretion. No patent license is granted separate from the Original Code or -combinations of the Original Code with other software or hardware. - -5.1. Trademarks. This License does not grant any rights to use the trademarks or -trade names owned by Licensor ("Licensor Marks" defined in Exhibit C) or to any -trademark or trade name belonging to any Contributor. No Licensor Marks may be -used to endorse or promote products derived from the Original Code other than as -permitted by the Licensor Trademark Policy defined in Exhibit C. - -6. Additional Terms. You may choose to offer, and to charge a fee for, warranty, -support, indemnity or liability obligations and/or other rights consistent with -the scope of the license granted herein ("Additional Terms") to one or more -recipients of Covered Code. However, You may do so only on Your own behalf and -as Your sole responsibility, and not on behalf of Licensor or any Contributor. -You must obtain the recipient's agreement that any such Additional Terms are -offered by You alone, and You hereby agree to indemnify, defend and hold -Licensor and every Contributor harmless for any liability incurred by or claims -asserted against Licensor or such Contributor by reason of any such Additional -Terms. - -7. Versions of the License. Licensor may publish revised and/or new versions of -this License from time to time. Each version will be given a distinguishing -version number. Once Original Code has been published under a particular version -of this License, You may continue to use it under the terms of that version. You -may also choose to use such Original Code under the terms of any subsequent -version of this License published by Licensor. No one other than Licensor has -the right to modify the terms applicable to Covered Code created under this -License. - -8. NO WARRANTY OR SUPPORT. The Covered Code may contain in whole or in part -pre-release, untested, or not fully tested works. The Covered Code may contain -errors that could cause failures or loss of data, and may be incomplete or -contain inaccuracies. You expressly acknowledge and agree that use of the -Covered Code, or any portion thereof, is at Your sole and entire risk. THE -COVERED CODE IS PROVIDED "AS IS" AND WITHOUT WARRANTY, UPGRADES OR SUPPORT OF -ANY KIND AND LICENSOR AND LICENSOR'S LICENSOR(S) (COLLECTIVELY REFERRED TO AS -"LICENSOR" FOR THE PURPOSES OF SECTIONS 8 AND 9) AND ALL CONTRIBUTORS EXPRESSLY -DISCLAIM ALL WARRANTIES AND/OR CONDITIONS, EXPRESS OR IMPLIED, INCLUDING, BUT -NOT LIMITED TO, THE IMPLIED WARRANTIES AND/OR CONDITIONS OF MERCHANTABILITY, OF -SATISFACTORY QUALITY, OF FITNESS FOR A PARTICULAR PURPOSE, OF ACCURACY, OF QUIET -ENJOYMENT, AND NONINFRINGEMENT OF THIRD PARTY RIGHTS. LICENSOR AND EACH -CONTRIBUTOR DOES NOT WARRANT AGAINST INTERFERENCE WITH YOUR ENJOYMENT OF THE -COVERED CODE, THAT THE FUNCTIONS CONTAINED IN THE COVERED CODE WILL MEET YOUR -REQUIREMENTS, THAT THE OPERATION OF THE COVERED CODE WILL BE UNINTERRUPTED OR -ERROR-FREE, OR THAT DEFECTS IN THE COVERED CODE WILL BE CORRECTED. NO ORAL OR -WRITTEN DOCUMENTATION, INFORMATION OR ADVICE GIVEN BY LICENSOR, A LICENSOR -AUTHORIZED REPRESENTATIVE OR ANY CONTRIBUTOR SHALL CREATE A WARRANTY. You -acknowledge that the Covered Code is not intended for use in high risk -activities, including, but not limited to, the design, construction, operation -or maintenance of nuclear facilities, aircraft navigation, aircraft -communication systems, or air traffic control machines in which case the failure -of the Covered Code could lead to death, personal injury, or severe physical or -environmental damage. Licensor disclaims any express or implied warranty of -fitness for such uses. - -9. LIMITATION OF LIABILITY. TO THE EXTENT NOT PROHIBITED BY LAW, IN NO EVENT -SHALL LICENSOR OR ANY CONTRIBUTOR BE LIABLE FOR ANY INCIDENTAL, SPECIAL, -INDIRECT OR CONSEQUENTIAL DAMAGES ARISING OUT OF OR RELATING TO THIS LICENSE OR -YOUR USE OR INABILITY TO USE THE COVERED CODE, OR ANY PORTION THEREOF, WHETHER -UNDER A THEORY OF CONTRACT, WARRANTY, TORT (INCLUDING NEGLIGENCE OR STRICT -LIABILITY), PRODUCTS LIABILITY OR OTHERWISE, EVEN IF LICENSOR OR SUCH -CONTRIBUTOR HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES AND -NOTWITHSTANDING THE FAILURE OF ESSENTIAL PURPOSE OF ANY REMEDY. SOME -JURISDICTIONS DO NOT ALLOW THE LIMITATION OF LIABILITY OF INCIDENTAL OR -CONSEQUENTIAL DAMAGES, SO THIS LIMITATION MAY NOT APPLY TO YOU. In no event -shall Licensor's total liability to You for all damages (other than as may be -required by applicable law) under this License exceed the amount of ten dollars -($10.00). - -10. Ownership. Subject to the licenses granted under this License, each -Contributor retains all rights, title and interest in and to any Modifications -made by such Contributor. Licensor retains all rights, title and interest in and -to the Original Code and any Modifications made by or on behalf of Licensor -("Licensor Modifications"), and such Licensor Modifications will not be -automatically subject to this License. Licensor may, at its sole discretion, -choose to license such Licensor Modifications under this License, or on -different terms from those contained in this License or may choose not to -license them at all. - -11. Termination. - -11.1 Term and Termination. The term of this License is perpetual unless -terminated as provided below. This License and the rights granted hereunder will -terminate: - -(a) automatically without notice from Licensor if You fail to comply with any -term(s) of this License and fail to cure such breach within 30 days of becoming -aware of such breach; - -(b) immediately in the event of the circumstances described in Section 12.5(b); -or - -(c) automatically without notice from Licensor if You, at any time during the -term of this License, commence an action for patent infringement against -Licensor (including by cross-claim or counter claim in a lawsuit); - -(d) upon written notice from Licensor if You, at any time during the term of -this License, commence an action for patent infringement against any third party -alleging that the Covered Code itself (excluding combinations with other -software or hardware) infringes any patent (including by cross-claim or counter -claim in a lawsuit). - -11.2 Effect of Termination. Upon termination, You agree to immediately stop any -further use, reproduction, modification, sublicensing and distribution of the -Covered Code and to destroy all copies of the Covered Code that are in your -possession or control. All sublicenses to the Covered Code which have been -properly granted prior to termination shall survive any termination of this -License. Provisions which, by their nature, should remain in effect beyond the -termination of this License shall survive, including but not limited to Sections -3, 5, 8, 9, 10, 11, 12.2 and 13. No party will be liable to any other for -compensation, indemnity or damages of any sort solely as a result of terminating -this License in accordance with its terms, and termination of this License will -be without prejudice to any other right or remedy of any party. - -12. Miscellaneous. - -12.1 Government End Users. The Covered Code is a "commercial item" as defined in -FAR 2.101. Government software and technical data rights in the Covered Code -include only those rights customarily provided to the public as defined in this -License. This customary commercial license in technical data and software is -provided in accordance with FAR 12.211 (Technical Data) and 12.212 (Computer -Software) and, for Department of Defense purchases, DFAR 252.227-7015 (Technical -Data -- Commercial Items) and 227.7202-3 (Rights in Commercial Computer Software -or Computer Software Documentation). Accordingly, all U.S. Government End Users -acquire Covered Code with only those rights set forth herein. - -12.2 Relationship of Parties. This License will not be construed as creating an -agency, partnership, joint venture or any other form of legal association -between or among You, Licensor or any Contributor, and You will not represent to -the contrary, whether expressly, by implication, appearance or otherwise. - -12.3 Independent Development. Nothing in this License will impair Licensor's -right to acquire, license, develop, have others develop for it, market and/or -distribute technology or products that perform the same or similar functions as, -or otherwise compete with, Modifications, Derivative Works, technology or -products that You may develop, produce, market or distribute. - -12.4 Waiver; Construction. Failure by Licensor or any Contributor to enforce any -provision of this License will not be deemed a waiver of future enforcement of -that or any other provision. Any law or regulation which provides that the -language of a contract shall be construed against the drafter will not apply to -this License. - -12.5 Severability. (a) If for any reason a court of competent jurisdiction finds -any provision of this License, or portion thereof, to be unenforceable, that -provision of the License will be enforced to the maximum extent permissible so -as to effect the economic benefits and intent of the parties, and the remainder -of this License will continue in full force and effect. (b) Notwithstanding the -foregoing, if applicable law prohibits or restricts You from fully and/or -specifically complying with Sections 2 and/or 3 or prevents the enforceability -of either of those Sections, this License will immediately terminate and You -must immediately discontinue any use of the Covered Code and destroy all copies -of it that are in your possession or control. - -12.6 Dispute Resolution. Any litigation or other dispute resolution between You -and Licensor relating to this License shall take place in the Seattle, -Washington, and You and Licensor hereby consent to the personal jurisdiction of, -and venue in, the state and federal courts within that District with respect to -this License. The application of the United Nations Convention on Contracts for -the International Sale of Goods is expressly excluded. - -12.7 Export/Import Laws. This software is subject to all export and import laws -and restrictions and regulations of the country in which you receive the Covered -Code and You are solely responsible for ensuring that You do not export, -re-export or import the Covered Code or any direct product thereof in violation -of any such restrictions, laws or regulations, or without all necessary -authorizations. - -12.8 Entire Agreement; Governing Law. This License constitutes the entire -agreement between the parties with respect to the subject matter hereof. This -License shall be governed by the laws of the United States and the State of -Washington. - -Where You are located in the province of Quebec, Canada, the following clause -applies: The parties hereby confirm that they have requested that this License -and all related documents be drafted in English. Les parties ont exigé -que le présent contrat et tous les documents connexes soient -rédigés en anglais. - - EXHIBIT A. - -"Copyright © 1995-2002 -RealNetworks, Inc. and/or its licensors. All Rights Reserved. - -The contents of this file, and the files included with this file, are subject to -the current version of the RealNetworks Public Source License Version 1.0 (the -"RPSL") available at https://www.helixcommunity.org/content/rpsl unless you have -licensed the file under the RealNetworks Community Source License Version 1.0 -(the "RCSL") available at https://www.helixcommunity.org/content/rcsl, in which -case the RCSL will apply. You may also obtain the license terms directly from -RealNetworks. You may not use this file except in compliance with the RPSL or, -if you have a valid RCSL with RealNetworks applicable to this file, the RCSL. -Please see the applicable RPSL or RCSL for the rights, obligations and -limitations governing use of the contents of the file. - -This file is part of the Helix DNA Technology. RealNetworks is the developer of -the Original code and owns the copyrights in the portions it created. - -This file, and the files included with this file, is distributed and made -available on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESS OR -IMPLIED, AND REALNETWORKS HEREBY DISCLAIMS ALL SUCH WARRANTIES, INCLUDING -WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR -PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT. - -Contributor(s): ____________________________________ - -Technology Compatibility Kit Test -Suite(s) Location (if licensed under the RCSL): ______________________________ - -Object Code Notice: Helix DNA Client technology included. Copyright (c) -RealNetworks, Inc., 1995-2002. All rights reserved. - - - EXHIBIT B - -Compatible Source Licenses for the RealNetworks Public Source License. The -following list applies to the most recent version of the license as of October -25, 2002, unless otherwise indicated. - -* Academic Free License -* Apache Software License -* Apple Public Source License -* Artistic license -* Attribution Assurance Licenses -* BSD license -* Common Public License (1) -* Eiffel Forum License -* GNU General Public License (GPL) (1) -* GNU Library or "Lesser" General Public License (LGPL) (1) -* IBM Public License -* Intel Open Source License -* Jabber Open Source License -* MIT license -* MITRE Collaborative Virtual Workspace License (CVW License) -* Motosoto License -* Mozilla Public License 1.0 (MPL) -* Mozilla Public License 1.1 (MPL) -* Nokia Open Source License -* Open Group Test Suite License -* Python Software Foundation License -* Ricoh Source Code Public License -* Sun Industry Standards Source License (SISSL) -* Sun Public License -* University of Illinois/NCSA Open Source License -* Vovida Software License v. 1.0 -* W3C License -* X.Net License -* Zope Public License -* zlib/libpng license - -(1) Note: because this license contains certain reciprocal licensing terms that -purport to extend to independently developed code, You may be prohibited under -the terms of this otherwise compatible license from using code licensed under -its terms with Covered Code because Covered Code may only be licensed under the -RealNetworks Public Source License. Any attempt to apply non RPSL license terms, -including without limitation the GPL, to Covered Code is expressly forbidden. -You are responsible for ensuring that Your use of Compatible Source Licensed -code does not violate either the RPSL or the Compatible Source License. - -The latest version of this list can be found at: -https://www.helixcommunity.org/content/complicense - - EXHIBIT C - -RealNetworks' Trademark policy. - -RealNetworks defines the following trademarks collectively as "Licensor -Trademarks": "RealNetworks", "RealPlayer", "RealJukebox", "RealSystem", -"RealAudio", "RealVideo", "RealOne Player", "RealMedia", "Helix" or any other -trademarks or trade names belonging to RealNetworks. - -RealNetworks "Licensor Trademark Policy" forbids any use of Licensor Trademarks -except as permitted by and in strict compliance at all times with RealNetworks' -third party trademark usage guidelines which are posted at -http://www.realnetworks.com/info/helixlogo.html. - diff --git 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Date: January 22, 2003). - - - RECITALS - -Original Contributor has developed Specifications, Source Code -implementations and Executables of certain Technology; and - -Original Contributor desires to license the Technology to a large -community to facilitate research, innovation and product development -while maintaining compatibility of such products with the Technology as -delivered by Original Contributor; and - -Original Contributor desires to license certain Trademarks for the -purpose of branding products that are compatible with the relevant -Technology delivered by Original Contributor; and - -You desire to license the Technology and possibly certain Trademarks -from Original Contributor on the terms and conditions specified in this -License. - -In consideration for the mutual covenants contained herein, You and -Original Contributor agree as follows: - - - AGREEMENT - -*1. Introduction.* - -The RealNetworks Community Source License ("RCSL") and effective -attachments ("License") may include five distinct licenses: - -i) Research Use license -- License plus Attachments A, B and C only. - -ii) Commercial Use and Trademark License, which may be for Internal -Deployment Use or external distribution, or both -- License plus -Attachments A, B, C, and D. - -iii) Technology Compatibility Kit (TCK) license -- Attachment C. - -iv) Add-On Technology License (Executable) Commercial Use License --Attachment F. - -v) Add-On Technology Source Code Porting and Optimization -License-Attachment G. - -The Research Use license is effective when You click and accept this -License. The TCK is effective when You click and accept this License, -unless otherwise specified in the TCK attachments. The Commercial Use -and Trademark, Add-On Technology License, and the Add-On Technology -Source Code Porting and Optimization licenses must each be signed by You -and Original Contributor to become effective. Once effective, these -licenses and the associated requirements and responsibilities are -cumulative. Capitalized terms used in this License are defined in the -Glossary. - -*2. License Grants.* - -2.1 Original Contributor Grant. - -Subject to Your compliance with Sections 3, 8.10 and Attachment A of -this License, Original Contributor grants to You a worldwide, -royalty-free, non-exclusive license, to the extent of Original -Contributor's Intellectual Property Rights covering the Original Code, -Upgraded Code and Specifications, to do the following: - -(a) Research Use License: - -(i) use, reproduce and modify the Original Code, Upgraded Code and -Specifications to create Modifications and Reformatted Specifications -for Research Use by You; - -(ii) publish and display Original Code, Upgraded Code and Specifications -with, or as part of Modifications, as permitted under Section 3.1(b) below; - -(iii) reproduce and distribute copies of Original Code and Upgraded Code -to Licensees and students for Research Use by You; - -(iv) compile, reproduce and distribute Original Code and Upgraded Code -in Executable form, and Reformatted Specifications to anyone for -Research Use by You. - -(b) Other than the licenses expressly granted in this License, Original -Contributor retains all right, title, and interest in Original Code and -Upgraded Code and Specifications. - -2.2 Your Grants. - -(a) To Other Licensees. You hereby grant to each Licensee a license to -Your Error Corrections and Shared Modifications, of the same scope and -extent as Original Contributor's licenses under Section 2.1 a) above -relative to Research Use and Attachment D relative to Commercial Use. - -(b) To Original Contributor. You hereby grant to Original Contributor a -worldwide, royalty-free, non-exclusive, perpetual and irrevocable -license, to the extent of Your Intellectual Property Rights covering -Your Error Corrections, Shared Modifications and Reformatted -Specifications, to use, reproduce, modify, display and distribute Your -Error Corrections, Shared Modifications and Reformatted Specifications, -in any form, including the right to sublicense such rights through -multiple tiers of distribution. - -(c) Other than the licenses expressly granted in Sections 2.2(a) and (b) -above, and the restrictions set forth in Section 3.1(d)(iv) below, You -retain all right, title, and interest in Your Error Corrections, Shared -Modifications and Reformatted Specifications. - -2.3 Contributor Modifications. - -You may use, reproduce, modify, display and distribute Contributor Error -Corrections, Shared Modifications and Reformatted Specifications, -obtained by You under this License, to the same scope and extent as with -Original Code, Upgraded Code and Specifications. - -2.4 Subcontracting. - -You may deliver the Source Code of Covered Code to other Licensees -having at least a Research Use license, for the sole purpose of -furnishing development services to You in connection with Your rights -granted in this License. All such Licensees must execute appropriate -documents with respect to such work consistent with the terms of this -License, and acknowledging their work-made-for-hire status or assigning -exclusive right to the work product and associated Intellectual Property -Rights to You. - -*3. Requirements and Responsibilities*. - -3.1 Research Use License. - -As a condition of exercising the rights granted under Section 2.1(a) -above, You agree to comply with the following: - -(a) Your Contribution to the Community. All Error Corrections and Shared -Modifications which You create or contribute to are automatically -subject to the licenses granted under Section 2.2 above. You are -encouraged to license all of Your other Modifications under Section 2.2 -as Shared Modifications, but are not required to do so. You agree to -notify Original Contributor of any errors in the Specification. - -(b) Source Code Availability. You agree to provide all Your Error -Corrections to Original Contributor as soon as reasonably practicable -and, in any event, prior to Internal Deployment Use or Commercial Use, -if applicable. Original Contributor may, at its discretion, post Source -Code for Your Error Corrections and Shared Modifications on the -Community Webserver. You may also post Error Corrections and Shared -Modifications on a web-server of Your choice; provided, that You must -take reasonable precautions to ensure that only Licensees have access to -such Error Corrections and Shared Modifications. Such precautions shall -include, without limitation, a password protection scheme limited to -Licensees and a click-on, download certification of Licensee status -required of those attempting to download from the server. An example of -an acceptable certification is attached as Attachment A-2. - -(c) Notices. All Error Corrections and Shared Modifications You create -or contribute to must include a file documenting the additions and -changes You made and the date of such additions and changes. You must -also include the notice set forth in Attachment A-1 in the file header. -If it is not possible to put the notice in a particular Source Code file -due to its structure, then You must include the notice in a location -(such as a relevant directory file), where a recipient would be most -likely to look for such a notice. - -(d) Redistribution. - -(i) Source. Covered Code may be distributed in Source Code form only to -another Licensee (except for students as provided below). You may not -offer or impose any terms on any Covered Code that alter the rights, -requirements, or responsibilities of such Licensee. You may distribute -Covered Code to students for use in connection with their course work -and research projects undertaken at accredited educational institutions. -Such students need not be Licensees, but must be given a copy of the -notice set forth in Attachment A-3 and such notice must also be included -in a file header or prominent location in the Source Code made available -to such students. - -(ii) Executable. You may distribute Executable version(s) of Covered -Code to Licensees and other third parties only for the purpose of -evaluation and comment in connection with Research Use by You and under -a license of Your choice, but which limits use of such Executable -version(s) of Covered Code only to that purpose. - -(iii) Modified Class, Interface and Package Naming. In connection with -Research Use by You only, You may use Original Contributor's class, -Interface and package names only to accurately reference or invoke the -Source Code files You modify. Original Contributor grants to You a -limited license to the extent necessary for such purposes. - -(iv) You expressly agree that any distribution, in whole or in part, of -Modifications developed by You shall only be done pursuant to the terms -and conditions of this License. - -(e) Extensions. - -(i) Covered Code. You may not include any Source Code of Community Code -in any Extensions. You may include the compiled Header Files of -Community Code in an Extension provided that Your use of the Covered -Code, including Heading Files, complies with the Commercial Use License, -the TCK and all other terms of this License. - -(ii) Publication. No later than the date on which You first distribute -such Extension for Commercial Use, You must publish to the industry, on -a non-confidential basis and free of all copyright restrictions with -respect to reproduction and use, an accurate and current specification -for any Extension. In addition, You must make available an appropriate -test suite, pursuant to the same rights as the specification, -sufficiently detailed to allow any third party reasonably skilled in the -technology to produce implementations of the Extension compatible with -the specification. Such test suites must be made available as soon as -reasonably practicable but, in no event, later than ninety (90) days -after Your first Commercial Use of the Extension. You must use -reasonable efforts to promptly clarify and correct the specification and -the test suite upon written request by Original Contributor. - -(iii) Open. You agree to refrain from enforcing any Intellectual -Property Rights You may have covering any interface(s) of Your -Extension, which would prevent the implementation of such interface(s) -by Original Contributor or any Licensee. This obligation does not -prevent You from enforcing any Intellectual Property Right You have that -would otherwise be infringed by an implementation of Your Extension. - -(iv) Interface Modifications and Naming. You may not modify or add to -the GUID space * * "xxxxxxxx-0901-11d1-8B06-00A024406D59" or any other -GUID space designated by Original Contributor. You may not modify any -Interface prefix provided with the Covered Code or any other prefix -designated by Original Contributor.* * - -* * - -(f) You agree that any Specifications provided to You by Original -Contributor are confidential and proprietary information of Original -Contributor. You must maintain the confidentiality of the Specifications -and may not disclose them to any third party without Original -Contributor's prior written consent. You may only use the Specifications -under the terms of this License and only for the purpose of implementing -the terms of this License with respect to Covered Code. You agree not -use, copy or distribute any such Specifications except as provided in -writing by Original Contributor. - -3.2 Commercial Use License. - -You may not make Commercial Use of any Covered Code unless You and -Original Contributor have executed a copy of the Commercial Use and -Trademark License attached as Attachment D. - -*4. Versions of the License.* - -4.1 License Versions. - -Original Contributor may publish revised versions of the License from -time to time. Each version will be given a distinguishing version number. - -4.2 Effect. - -Once a particular version of Covered Code has been provided under a -version of the License, You may always continue to use such Covered Code -under the terms of that version of the License. You may also choose to -use such Covered Code under the terms of any subsequent version of the -License. No one other than Original Contributor has the right to -promulgate License versions. - -4.3 Multiple-Licensed Code. - -Original Contributor may designate portions of the Covered Code as -"Multiple-Licensed." "Multiple-Licensed" means that the Original -Contributor permits You to utilize those designated portions of the -Covered Code under Your choice of this License or the alternative -license(s), if any, specified by the Original Contributor in an -Attachment to this License. - -*5. Disclaimer of Warranty.* - -5.1 COVERED CODE PROVIDED AS IS. - -COVERED CODE IS PROVIDED UNDER THIS LICENSE "AS IS," WITHOUT WARRANTY OF -ANY KIND, EITHER EXPRESS OR IMPLIED, INCLUDING, WITHOUT LIMITATION, -WARRANTIES THAT THE COVERED CODE IS FREE OF DEFECTS, MERCHANTABLE, FIT -FOR A PARTICULAR PURPOSE OR NON-INFRINGING. YOU AGREE TO BEAR THE ENTIRE -RISK IN CONNECTION WITH YOUR USE AND DISTRIBUTION OF COVERED CODE UNDER -THIS LICENSE. THIS DISCLAIMER OF WARRANTY CONSTITUTES AN ESSENTIAL PART -OF THIS LICENSE. NO USE OF ANY COVERED CODE IS AUTHORIZED HEREUNDER -EXCEPT SUBJECT TO THIS DISCLAIMER. - -5.2 Not Designed for High Risk Activities. - -You acknowledge that Original Code, Upgraded Code and Specifications are -not designed or intended for use in high risk activities including, but -not limited to: (i) on-line control of aircraft, air traffic, aircraft -navigation or aircraft communications; or (ii) in the design, -construction, operation or maintenance of any nuclear facility. Original -Contributor disclaims any express or implied warranty of fitness for -such uses. - -*6. Termination.* - -6.1 By You. - -You may terminate this Research Use license at anytime by providing -written notice to Original Contributor. - -6.2 By Original Contributor. - -This License and the rights granted hereunder will terminate: - -(i) automatically if You fail to comply with the terms of this License -and fail to cure such breach within 30 days of receipt of written notice -of the breach; - -(ii) immediately in the event of circumstances specified in Sections 7.1 -and 8.4; or - -(iii) at Original Contributor's discretion upon any action initiated by -You (including by cross-claim or counter claim) alleging that use or -distribution by Original Contributor or any Licensee, of Original Code, -Upgraded Code, Error Corrections, Shared Modifications or Specifications -infringe a patent owned or controlled by You. - -6.3 Effective of Termination. - -Upon termination, You agree to discontinue use of and destroy all copies -of Covered Code in Your possession. All sublicenses to the Covered Code -which You have properly granted shall survive any termination of this -License. Provisions that, by their nature, should remain in effect -beyond the termination of this License shall survive including, without -limitation, Sections 2.2, 3, 5, 7 and 8. - -6.4 No Compensation. - -Each party waives and releases the other from any claim to compensation -or indemnity for permitted or lawful termination of the business -relationship established by this License. - -*7. Liability.* - -7.1 Infringement. Should any of the Original Code, Upgraded Code, TCK or -Specifications ("Materials") become the subject of a claim of -infringement, Original Contributor may, at its sole option, (i) attempt -to procure the rights necessary for You to continue using the Materials, -(ii) modify the Materials so that they are no longer infringing, or -(iii) terminate Your right to use the Materials, immediately upon -written notice, and refund to You the amount, if any, having then -actually been paid by You to Original Contributor for the Original Code, -Upgraded Code and TCK, depreciated on a straight line, five year basis. - -7.2 LIMITATION OF LIABILITY. TO THE FULL EXTENT ALLOWED BY APPLICABLE -LAW, ORIGINAL CONTRIBUTOR'S LIABILITY TO YOU FOR CLAIMS RELATING TO THIS -LICENSE, WHETHER FOR BREACH OR IN TORT, SHALL BE LIMITED TO ONE HUNDRED -PERCENT (100%) OF THE AMOUNT HAVING THEN ACTUALLY BEEN PAID BY YOU TO -ORIGINAL CONTRIBUTOR FOR ALL COPIES LICENSED HEREUNDER OF THE PARTICULAR -ITEMS GIVING RISE TO SUCH CLAIM, IF ANY, DURING THE TWELVE MONTHS -PRECEDING THE CLAIMED BREACH. IN NO EVENT WILL YOU (RELATIVE TO YOUR -SHARED MODIFICATIONS OR ERROR CORRECTIONS) OR ORIGINAL CONTRIBUTOR BE -LIABLE FOR ANY INDIRECT, PUNITIVE, SPECIAL, INCIDENTAL OR CONSEQUENTIAL -DAMAGES IN CONNECTION WITH OR RISING OUT OF THIS LICENSE (INCLUDING, -WITHOUT LIMITATION, LOSS OF PROFITS, USE, DATA, OR OTHER ECONOMIC -ADVANTAGE), HOWEVER IT ARISES AND ON ANY THEORY OF LIABILITY, WHETHER IN -AN ACTION FOR CONTRACT, STRICT LIABILITY OR TORT (INCLUDING NEGLIGENCE) -OR OTHERWISE, WHETHER OR NOT YOU OR ORIGINAL CONTRIBUTOR HAS BEEN -ADVISED OF THE POSSIBILITY OF SUCH DAMAGE AND NOTWITHSTANDING THE -FAILURE OF ESSENTIAL PURPOSE OF ANY REMEDY. - -*8. Miscellaneous.* - -8.1 Trademark. - -You shall not use any Trademark unless You and Original Contributor -execute a copy of the Commercial Use and Trademark License Agreement -attached hereto as Attachment D. Except as expressly provided in the -License, You are granted no right, title or license to, or interest in, -any Trademarks. Whether or not You and Original Contributor enter into -the Trademark License, You agree not to (i) challenge Original -Contributor's ownership or use of Trademarks; (ii) attempt to register -any Trademarks, or any mark or logo substantially similar thereto; or -(iii) incorporate any Trademarks into Your own trademarks, product -names, service marks, company names, or domain names. - -8.2 Integration. - -This License represents the complete agreement concerning the subject -matter hereof. - -8.3 Assignment. - -Original Contributor may assign this License, and its rights and -obligations hereunder, in its sole discretion. You may assign the -Research Use portions of this License and the TCK license to a third -party upon prior written notice to Original Contributor (which may be -provided electronically via the Community Web-Server). You may not -assign the Commercial Use and Trademark license, the Add-On Technology -License, or the Add-On Technology Source Code Porting License, including -by way of merger (regardless of whether You are the surviving entity) or -acquisition, without Original Contributor's prior written consent. - -8.4 Severability. - -If any provision of this License is held to be unenforceable, such -provision shall be reformed only to the extent necessary to make it -enforceable. Notwithstanding the foregoing, if You are prohibited by law -from fully and specifically complying with Sections 2.2 or 3, this -License will immediately terminate and You must immediately discontinue -any use of Covered Code. - -8.5 Governing Law. - -This License shall be governed by the laws of the United States and the -State of Washington, as applied to contracts entered into and to be -performed in Washington between Washington residents. The application of -the United Nations Convention on Contracts for the International Sale of -Goods is expressly excluded. You agree that the state and federal courts -located in Seattle, Washington have exclusive jurisdiction over any -claim relating to the License, including contract and tort claims. - -8.6 Dispute Resolution. - -a) Arbitration. Any dispute arising out of or relating to this License -shall be finally settled by arbitration as set out herein, except that -either party may bring any action, in a court of competent jurisdiction -(which jurisdiction shall be exclusive), with respect to any dispute -relating to such party's Intellectual Property Rights or with respect to -Your compliance with the TCK license. Arbitration shall be administered: -(i) by the American Arbitration Association (AAA), (ii) in accordance -with the rules of the United Nations Commission on International Trade -Law (UNCITRAL) (the "Rules") in effect at the time of arbitration as -modified herein; and (iii) the arbitrator will apply the substantive -laws of Washington and the United States. Judgment upon the award -rendered by the arbitrator may be entered in any court having -jurisdiction to enforce such award. - -b) Arbitration language, venue and damages. All arbitration proceedings -shall be conducted in English by a single arbitrator selected in -accordance with the Rules, who must be fluent in English and be either a -retired judge or practicing attorney having at least ten (10) years -litigation experience and be reasonably familiar with the technology -matters relative to the dispute. Unless otherwise agreed, arbitration -venue shall be in Seattle, Washington. The arbitrator may award monetary -damages only and nothing shall preclude either party from seeking -provisional or emergency relief from a court of competent jurisdiction. -The arbitrator shall have no authority to award damages in excess of -those permitted in this License and any such award in excess is void. -All awards will be payable in U.S. dollars and may include, for the -prevailing party (i) pre-judgment award interest, (ii) reasonable -attorneys' fees incurred in connection with the arbitration, and (iii) -reasonable costs and expenses incurred in enforcing the award. The -arbitrator will order each party to produce identified documents and -respond to no more than twenty-five single question interrogatories. - -8.7 Construction. - -Any law or regulation, which provides that the language of a contract -shall be construed against the drafter, shall not apply to this License. - -8.8 U.S. Government End Users. - -The Covered Code is a "commercial item," as that term is defined in 48 -C.F.R. 2.101 (Oct. 1995), consisting of "commercial computer software" -and "commercial computer software documentation," as such terms are used -in 48 C.F.R. 12.212 (Sept. 1995). Consistent with 48 C.F.R. 12.212 and -48 C.F.R. 227.7202-1 through 227.7202-4 (June 1995), all U.S. Government -End Users acquire Covered Code with only those rights set forth herein. -You agree to pass this notice to our licensees. - -8.9 Marketing Activities. - -Licensee hereby grants Original Contributor a non-exclusive, -non-transferable, limited license to use the Licensee's company name and -logo ("Licensee Marks") in any presentations, press releases, or -marketing materials solely for the purpose of identifying Licensee as a -member of the Helix Community. Licensee shall provide samples of -Licensee Marks to Original Contributor upon request by Original -Contributor. Original Contributor acknowledges that the Licensee Marks -are the trademarks of Licensee. Original Contributor shall not use the -Licensee Marks in a way that may imply that Original Contributor is an -agency or branch of Licensee. Original Contributor understands and -agrees that the use of any Licensee Marks in connection with this -Agreement shall not create any right, title or interest, in, or to the -Licensee Marks or any Licensee trademarks and that all such use and -goodwill associated with any such trademarks will inure to the benefit -of Licensee. Further the Original Contributor will stop usage of the -Licensee Marks upon Licensee's request. - -8.10 Press Announcements. - -You may make press announcements or other public statements regarding -this License without the prior written consent of the Original -Contributor, if Your statement is limited to announcing the licensing of -the Covered Code or the availability of Your Product and its -compatibility with the Covered Code. All other public announcements -regarding this license require the prior written consent of the Original -Contributor. Consent requests are welcome at press@helixcommunity.org. - -8.11 International Use. - -a) Export/Import laws. Covered Code is subject to U.S. export control -laws and may be subject to export or import regulations in other -countries. Each party agrees to comply strictly with all such laws and -regulations and acknowledges their responsibility to obtain such -licenses to export, re-export, or import as may be required. You agree -to pass these obligations to Your licensees. - -b) Intellectual Property Protection. Due to limited intellectual -property protection and enforcement in certain countries, You agree not -to redistribute the Original Code, Upgraded Code, TCK and Specifications -to any country on the list of restricted countries on the Community Web -Server. - -8.12 Language. - -This License is in the English language only, which language shall be -controlling in all respects, and all versions of this License in any -other language shall be for accommodation only and shall not be binding -on the parties to this License. All communications and notices made or -given pursuant to this License, and all documentation and support to be -provided, unless otherwise noted, shall be in the English language. - -PLEASE READ THE TERMS OF THIS LICENSE CAREFULLY. BY CLICKING ON THE -"ACCEPT" BUTTON BELOW YOU ARE ACCEPTING AND AGREEING TO THE TERMS AND -CONDITIONS OF THIS LICENSE WITH REALNETWORKS, INC. IF YOU ARE AGREEING -TO THIS LICENSE ON BEHALF OF A COMPANY, YOU REPRESENT THAT YOU ARE -AUTHORIZED TO BIND THE COMPANY TO SUCH A LICENSE. WHETHER YOU ARE ACTING -ON YOUR OWN BEHALF, OR REPRESENTING A COMPANY, YOU MUST BE OF MAJORITY -AGE AND BE OTHERWISE COMPETENT TO ENTER INTO CONTRACTS. IF YOU DO NOT -MEET THIS CRITERIA OR YOU DO NOT AGREE TO ANY OF THE TERMS AND -CONDITIONS OF THIS LICENSE, CLICK ON THE REJECT BUTTON TO EXIT. - - - GLOSSARY - -1. *"Added Value"* means code which: - -(i) has a principal purpose which is substantially different from that -of the stand-alone Technology; - -(ii) represents a significant functional and value enhancement to the -Technology; - -(iii) operates in conjunction with the Technology; and - -(iv) is not marketed as a technology which replaces or substitutes for -the Technology - -2. "*Applicable Patent Rights*" mean: (a) in the case where Original -Contributor is the grantor of rights, claims of patents that (i) are now -or hereafter acquired, owned by or assigned to Original Contributor and -(ii) are necessarily infringed by using or making the Original Code or -Upgraded Code, including Modifications provided by Original Contributor, -alone and not in combination with other software or hardware; and (b) in -the case where Licensee is the grantor of rights, claims of patents that -(i) are now or hereafter acquired, owned by or assigned to Licensee and -(ii) are infringed (directly or indirectly) by using or making -Licensee's Modifications or Error Corrections, taken alone or in -combination with Covered Code. - -3. "*Application Programming Interfaces (APIs)"* means the interfaces, -associated header files, service provider interfaces, and protocols that -enable a device, application, Operating System, or other program to -obtain services from or make requests of (or provide services in -response to requests from) other programs, and to use, benefit from, or -rely on the resources, facilities, and capabilities of the relevant -programs using the APIs. APIs includes the technical documentation -describing the APIs, the Source Code constituting the API, and any -Header Files used with the APIs. - -4. "*Commercial Use*" means any use (internal or external), copying, -sublicensing or distribution (internal or external), directly or -indirectly of Covered Code by You other than Your Research Use of -Covered Code within Your business or organization or in conjunction with -other Licensees with equivalent Research Use rights. Commercial Use -includes any use of the Covered Code for direct or indirect commercial -or strategic gain, advantage or other business purpose. Any Commercial -Use requires execution of Attachment D by You and Original Contributor. - -5. "*Community Code*" means the Original Code, Upgraded Code, Error -Corrections, Shared Modifications, or any combination thereof. - -6. "*Community Webserver(s)"* means the webservers designated by -Original Contributor for access to the Original Code, Upgraded Code, TCK -and Specifications and for posting Error Corrections and Shared -Modifications. - -7. "*Compliant Covered Code*" means Covered Code that complies with the -requirements of the TCK. - -8. "*Contributor*" means each Licensee that creates or contributes to -the creation of any Error Correction or Shared Modification. - -9. "*Covered Code*" means the Original Code, Upgraded Code, -Modifications, or any combination thereof. - -10. "*Error Correction*" means any change made to Community Code which -conforms to the Specification and corrects the adverse effect of a -failure of Community Code to perform any function set forth in or -required by the Specifications. - -11. "*Executable*" means Covered Code that has been converted from -Source Code to the preferred form for execution by a computer or digital -processor (e.g. binary form). - -12. "*Extension(s)"* means any additional Interfaces developed by or for -You which: (i) are designed for use with the Technology; (ii) constitute -an API for a library of computing functions or services; and (iii) are -disclosed or otherwise made available to third party software developers -for the purpose of developing software which invokes such additional -Interfaces. The foregoing shall not apply to software developed by Your -subcontractors to be exclusively used by You. - -13. "*Header File(s)"* means that portion of the Source Code that -provides the names and types of member functions, data members, class -definitions, and interface definitions necessary to implement the APIs -for the Covered Code. Header Files include, files specifically -designated by Original Contributor as Header Files. Header Files do not -include the code necessary to implement the functionality underlying the -Interface. - -14. *"Helix DNA Server Technology"* means the program(s) that implement -the Helix Universal Server streaming engine for the Technology as -defined in the Specification. - -15. *"Helix DNA Client Technology"* means the Covered Code that -implements the RealOne Player engine as defined in the Specification. - -16. *"Helix DNA Producer Technology"* means the Covered Code that -implements the Helix Producer engine as defined in the Specification. - -17. *"Helix DNA Technology"* means the Helix DNA Server Technology, the -Helix DNA Client Technology, the Helix DNA Producer Technology and other -Helix technologies designated by Original Contributor. - -18. "*Intellectual Property Rights*" means worldwide statutory and -common law rights associated solely with (i) Applicable Patent Rights; -(ii) works of authorship including copyrights, copyright applications, -copyright registrations and "moral rights"; (iii) the protection of -trade and industrial secrets and confidential information; and (iv) -divisions, continuations, renewals, and re-issuances of the foregoing -now existing or acquired in the future. - -19. *"Interface*" means interfaces, functions, properties, class -definitions, APIs, Header Files, GUIDs, V-Tables, and/or protocols -allowing one piece of software, firmware or hardware to communicate or -interoperate with another piece of software, firmware or hardware. - -20. "*Internal Deployment Use*" means use of Compliant Covered Code -(excluding Research Use) within Your business or organization only by -Your employees and/or agents on behalf of Your business or organization, -but not to provide services, including content distribution, to third -parties, subject to execution of Attachment D by You and Original -Contributor, if required. - -21. "*Licensee*" means any party that has entered into and has in effect -a version of this License with Original Contributor. - -22. "*MIME type*" means a description of what type of media or other -content is in a file, including by way of example but not limited to -'audio/x-pn-realaudio-plugin.' - -23. "*Modification(s)"* means (i) any addition to, deletion from and/or -change to the substance and/or structure of the Covered Code, including -Interfaces; (ii) the combination of any Covered Code and any previous -Modifications; (iii) any new file or other representation of computer -program statements that contains any portion of Covered Code; and/or -(iv) any new Source Code implementing any portion of the Specifications. - -24. "*MP3 Patents*" means any patents necessary to make, use or sell -technology implementing any portion of the specification developed by -the Moving Picture Experts Group known as MPEG-1 Audio Layer-3 or MP3, -including but not limited to all past and future versions, profiles, -extensions, parts and amendments relating to the MP3 specification. - -25. "*MPEG-4 Patents*" means any patents necessary to make, use or sell -technology implementing any portion of the specification developed by -the Moving Pictures Experts Group known as MPEG-4, including but not -limited to all past and future versions, profiles, extensions, parts and -amendments relating to the MPEG-4 specification. - -26. "*Original Code*" means the initial Source Code for the Technology -as described on the Community Web Server. - -27. "*Original Contributor*" means RealNetworks, Inc., its affiliates -and its successors and assigns. - -28. "*Original Contributor MIME Type*" means the MIME registry, browser -preferences, or local file/protocol associations invoking any Helix DNA -Client-based application, including the RealOne Player, for playback of -RealAudio, RealVideo, other RealMedia MIME types or datatypes (e.g., -.ram, .rnx, .rpm, .ra, .rm, .rp, .rt, .rf, .prx, .mpe, .rmp, .rmj, .rav, -.rjs, .rmx, .rjt, .rms), and any other Original Contributor-specific or -proprietary MIME types that Original Contributor may introduce in the -future. - -29. "*Personal Use*" means use of Covered Code by an individual solely -for his or her personal, private and non-commercial purposes. An -individual's use of Covered Code in his or her capacity as an officer, -employee, member, independent contractor or agent of a corporation, -business or organization (commercial or non-commercial) does not qualify -as Personal Use. - -30. "*RealMedia File Format*" means the file format designed and -developed by RealNetworks for storing multimedia data and used to store -RealAudio and RealVideo encoded streams. Valid RealMedia File Format -extensions include: .rm, .rmj, .rmc, .rmvb, .rms. - -31. "*RCSL Webpage*" means the RealNetworks Community Source License -webpage located at https://www.helixcommunity.org/content/rcsl or such -other URL that Original Contributor may designate from time to time. - -32. "*Reformatted Specifications*" means any revision to the -Specifications which translates or reformats the Specifications (as for -example in connection with Your documentation) but which does not alter, -subset or superset * *the functional or operational aspects of the -Specifications. - -33. "*Research Use*" means use and distribution of Covered Code only for -Your Personal Use, research or development use and expressly excludes -Internal Deployment Use and Commercial Use. Research Use also includes -use of Covered Code to teach individuals how to use Covered Code. - -34. "*Shared Modifications*" means Modifications that You distribute or -use for a Commercial Use, in addition to any Modifications provided by -You, at Your option, pursuant to Section 2.2, or received by You from a -Contributor pursuant to Section 2.3. - -35. "*Source Code*" means the preferred form of the Covered Code for -making modifications to it, including all modules it contains, plus any -associated interface definition files, scripts used to control -compilation and installation of an Executable, or source code -differential comparisons against either the Original Code or another -well known, available Covered Code of the Contributor's choice. The -Source Code can be in a compressed or archival form, provided the -appropriate decompression or de-archiving software is widely available -for no charge. - -36. "*Specifications*" means the specifications for the Technology and -other documentation, as designated on the Community Web Server, as may -be revised by Original Contributor from time to time. - -37. "*Trademarks*" means Original Contributor's trademarks and logos, -including, but not limited to, RealNetworks, RealAudio, RealVideo, -RealOne, RealSystem, SureStream, Helix, Helix DNA and other trademarks -whether now used or adopted in the future. - -38. "*Technology*" means the technology described in Attachment B, and -Upgrades. - -39. "*Technology Compatibility Kit"* or *"TCK*" means the test programs, -procedures, acceptance criteria and/or other requirements, designated by -Original Contributor for use in verifying compliance of Covered Code -with the Specifications, in conjunction with the Original Code and -Upgraded Code. Original Contributor may, in its sole discretion and from -time to time, revise a TCK to correct errors and/or omissions and in -connection with Upgrades. - -40. "*Upgrade(s)"* means new versions of Technology designated -exclusively by Original Contributor as an "Upgrade" and released by -Original Contributor from time to time under the terms of the License. - -41. "*Upgraded Code*" means the Source Code and/or Executables for -Upgrades, possibly including Modifications made by Contributors. - -42. *"User's Guide"* means the users guide for the TCK which Original -Contributor makes available to You to provide direction in how to run -the TCK and properly interpret the results, as may be revised by -Original Contributor from time to time. - -43. "*You(r)*" means an individual, or a legal entity acting by and -through an individual or individuals, exercising rights either under -this License or under a future version of this License issued pursuant -to Section 4.1. For legal entities, "You(r)" includes any entity that by -majority voting interest controls, is controlled by, or is under common -control with You. - -44. "*Your Products*" means any (i) hardware products You distribute -integrating the Covered Code; (ii) any software products You distribute -with the Covered Code that utilize the APIs of the Covered Code; or -(iii) any services You provide using the Covered Code. - - - ATTACHMENT A - -REQUIRED NOTICES - - - ATTACHMENT A-1 - -REQUIRED IN ALL CASES - -Notice to be included in header file of all Error Corrections and Shared -Modifications: - -Portions Copyright 1994-2003 © RealNetworks, Inc. All rights reserved. - -The contents of this file, and the files included with this file, are -subject to the current version of RealNetworks Community Source License -Version 1.1 (the "License"). You may not use this file except in -compliance with the License executed by both You and RealNetworks. You -may obtain a copy of the License at * -https://www.helixcommunity.org/content/rcsl.* You may also obtain a copy -of the License by contacting RealNetworks directly. Please see the -License for the rights, obligations and limitations governing use of the -contents of the file. - -This file is part of the Helix DNA technology. RealNetworks, Inc., is -the developer of the Original code and owns the copyrights in the -portions it created. - -This file, and the files included with this file, are distributed on an -'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESS OR IMPLIED, -AND REALNETWORKS HEREBY DISCLAIMS ALL SUCH WARRANTIES, INCLUDING WITHOUT -LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR -PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT. - -Contributor(s): - -_______________________________________________ - -Technology Compatibility Kit Test Suite(s) Location: - -________________________________ - - - ATTACHMENT A-2 - -SAMPLE LICENSEE CERTIFICATION - -"By clicking the `Agree' button below, You certify that You are a -Licensee in good standing under the RealNetworks Community Source -License, ("License") and that Your access, use and distribution of code -and information You may obtain at this site is subject to the License. -If You are not a Licensee under the RealNetworks Community Source -License You agree not to download, copy or use the Helix DNA technology. - - - ATTACHMENT A-3 - -REQUIRED STUDENT NOTIFICATION - -"This software and related documentation has been obtained by Your -educational institution subject to the RealNetworks Community Source -License. You have been provided access to the software and related -documentation for use only in connection with your course work and -research activities as a matriculated student of Your educational -institution. Any other use is expressly prohibited. - -THIS SOFTWARE AND RELATED DOCUMENTATION CONTAINS PROPRIETARY MATERIAL OF -REALNETWORKS, INC, WHICH ARE PROTECTED BY VARIOUS INTELLECTUAL PROPERTY -RIGHTS. - -You may not use this file except in compliance with the License. You may -obtain a copy of the License on the web at -https://www.helixcommunity.org/content/rcsl. - -* -* - - - ATTACHMENT B - -Description of Technology - -Helix DNA, which consists of Helix DNA Client, Helix DNA Server and -Helix DNA Producer. - -Description of "Technology" - -Helix DNA Technology v1.0 as described on the Community Web Server. - - - ATTACHMENT C - -TECHNOLOGY COMPATIBILITY KIT LICENSE - -The following license is effective for the *Helix DNA* Technology -Compatibility Kit - as described on the Community Web Server. The -Technology Compatibility Kit(s) for the Technology specified in -Attachment B may be accessed at the Community Web Server. - -1. TCK License. - -1.1 Grants to use TCK - -Subject to the terms and restrictions set forth below and the -RealNetworks Community Source License, and the Research Use license, -Original Contributor grants to You a worldwide, non-exclusive, -non-transferable license, to the extent of Original Contributor's -Intellectual Property Rights in the TCK (without the right to -sublicense), to use the TCK to develop and test Covered Code. - -1.2 TCK Use Restrictions. - -You are not authorized to create derivative works of the TCK or use the -TCK to test any implementation of the Specification that is not Covered -Code. You may not publish Your test results or make claims of -comparative compatibility with respect to other implementations of the -Specification. In consideration for the license grant in Section 1.1 -above You agree not to develop Your own tests that are intended to -validate conformation with the Specification. - -2. Test Results. - -You agree to provide to Original Contributor or the third party test -facility if applicable, Your test results that demonstrate that Covered -Code is Compliant Covered Code and that Original Contributor may publish -or otherwise distribute such test results. - -PLEASE READ THE TERMS OF THIS LICENSE CAREFULLY. BY CLICKING ON THE -"ACCEPT" BUTTON BELOW YOU ARE ACCEPTING AND AGREEING TO THE TERMS AND -CONDITIONS OF THIS LICENSE WITH THE ORIGINAL CONTRIBUTOR, REALNETWORKS, -INC. IF YOU ARE AGREEING TO THIS LICENSE ON BEHALF OF A COMPANY, YOU -REPRESENT THAT YOU ARE AUTHORIZED TO BIND THE COMPANY TO SUCH A LICENSE. -WHETHER YOU ARE ACTING ON YOUR OWN BEHALF, OR REPRESENTING A COMPANY, -YOU MUST BE OF MAJORITY AGE AND BE OTHERWISE COMPETENT TO ENTER INTO -CONTRACTS. IF YOU DO NOT MEET THIS CRITERIA OR YOU DO NOT AGREE TO ANY -OF THE TERMS AND CONDITIONS OF THIS LICENSE, CLICK ON THE REJECT BUTTON -TO EXIT. - -*ACCEPT / REJECT -* - -* -* - -*To agree to the R&D/academic terms of this license, please register - on the site -- -you will then be given a chance to agree to the clickwrap RCSL - -R&D License - -and gain access to the RCSL-licensed source code. To build or deploy -commercial applications based on the RCSL, you will need to agree to the -Commercial Use license attachments -* - - - diff --git a/bsp/stm32_radio/mp3/real/projects/armwince/RPSL.txt b/bsp/stm32_radio/mp3/real/projects/armwince/RPSL.txt deleted file mode 100644 index d040a45205..0000000000 --- a/bsp/stm32_radio/mp3/real/projects/armwince/RPSL.txt +++ /dev/null @@ -1,518 +0,0 @@ -RealNetworks Public Source License Version 1.0 -(Rev. Date October 28, 2002) - -1. General Definitions. This License applies to any program or other work which -RealNetworks, Inc., or any other entity that elects to use this license, -("Licensor") makes publicly available and which contains a notice placed by -Licensor identifying such program or work as "Original Code" and stating that it -is subject to the terms of this RealNetworks Public Source License version 1.0 -(or subsequent version thereof) ("License"). You are not required to accept this -License. However, nothing else grants You permission to use, copy, modify or -distribute the software or its derivative works. These actions are prohibited by -law if You do not accept this License. Therefore, by modifying, copying or -distributing the software (or any work based on the software), You indicate your -acceptance of this License to do so, and all its terms and conditions. In -addition, you agree to the terms of this License by clicking the Accept button -or downloading the software. As used in this License: - -1.1 "Applicable Patent Rights" mean: (a) in the case where Licensor is the -grantor of rights, claims of patents that (i) are now or hereafter acquired, -owned by or assigned to Licensor and (ii) are necessarily infringed by using or -making the Original Code alone and not in combination with other software or -hardware; and (b) in the case where You are the grantor of rights, claims of -patents that (i) are now or hereafter acquired, owned by or assigned to You and -(ii) are infringed (directly or indirectly) by using or making Your -Modifications, taken alone or in combination with Original Code. - -1.2 "Compatible Source License" means any one of the licenses listed on Exhibit -B or at https://www.helixcommunity.org/content/complicense or other licenses -specifically identified by Licensor in writing. Notwithstanding any term to the -contrary in any Compatible Source License, any code covered by any Compatible -Source License that is used with Covered Code must be made readily available in -Source Code format for royalty-free use under the terms of the Compatible Source -License or this License. - -1.3 "Contributor" means any person or entity that creates or contributes to the -creation of Modifications. - -1.4 "Covered Code" means the Original Code, Modifications, the combination of -Original Code and any Modifications, and/or any respective portions thereof. - -1.5 "Deploy" means to use, sublicense or distribute Covered Code other than for -Your internal research and development (R&D) and/or Personal Use, and includes -without limitation, any and all internal use or distribution of Covered Code -within Your business or organization except for R&D use and/or Personal Use, as -well as direct or indirect sublicensing or distribution of Covered Code by You -to any third party in any form or manner. - -1.6 "Derivative Work" means either the Covered Code or any derivative work under -United States copyright law, and including any work containing or including any -portion of the Covered Code or Modifications, either verbatim or with -modifications and/or translated into another language. Derivative Work also -includes any work which combines any portion of Covered Code or Modifications -with code not otherwise governed by the terms of this License. - -1.7 "Externally Deploy" means to Deploy the Covered Code in any way that may be -accessed or used by anyone other than You, used to provide any services to -anyone other than You, or used in any way to deliver any content to anyone other -than You, whether the Covered Code is distributed to those parties, made -available as an application intended for use over a computer network, or used to -provide services or otherwise deliver content to anyone other than You. - -1.8. "Interface" means interfaces, functions, properties, class definitions, -APIs, header files, GUIDs, V-Tables, and/or protocols allowing one piece of -software, firmware or hardware to communicate or interoperate with another piece -of software, firmware or hardware. - -1.9 "Modifications" mean any addition to, deletion from, and/or change to, the -substance and/or structure of the Original Code, any previous Modifications, the -combination of Original Code and any previous Modifications, and/or any -respective portions thereof. When code is released as a series of files, a -Modification is: (a) any addition to or deletion from the contents of a file -containing Covered Code; and/or (b) any new file or other representation of -computer program statements that contains any part of Covered Code. - -1.10 "Original Code" means (a) the Source Code of a program or other work as -originally made available by Licensor under this License, including the Source -Code of any updates or upgrades to such programs or works made available by -Licensor under this License, and that has been expressly identified by Licensor -as such in the header file(s) of such work; and (b) the object code compiled -from such Source Code and originally made available by Licensor under this -License. - -1.11 "Personal Use" means use of Covered Code by an individual solely for his or -her personal, private and non-commercial purposes. An individual's use of -Covered Code in his or her capacity as an officer, employee, member, independent -contractor or agent of a corporation, business or organization (commercial or -non-commercial) does not qualify as Personal Use. - -1.12 "Source Code" means the human readable form of a program or other work that -is suitable for making modifications to it, including all modules it contains, -plus any associated interface definition files, scripts used to control -compilation and installation of an executable (object code). - -1.13 "You" or "Your" means an individual or a legal entity exercising rights -under this License. For legal entities, "You" or "Your" includes any entity -which controls, is controlled by, or is under common control with, You, where -"control" means (a) the power, direct or indirect, to cause the direction or -management of such entity, whether by contract or otherwise, or (b) ownership of -fifty percent (50%) or more of the outstanding shares or beneficial ownership of -such entity. - -2. Permitted Uses; Conditions & Restrictions. Subject to the terms and -conditions of this License, Licensor hereby grants You, effective on the date -You accept this License (via downloading or using Covered Code or otherwise -indicating your acceptance of this License), a worldwide, royalty-free, -non-exclusive copyright license, to the extent of Licensor's copyrights cover -the Original Code, to do the following: - -2.1 You may reproduce, display, perform, modify and Deploy Covered Code, -provided that in each instance: - -(a) You must retain and reproduce in all copies of Original Code the copyright -and other proprietary notices and disclaimers of Licensor as they appear in the -Original Code, and keep intact all notices in the Original Code that refer to -this License; - -(b) You must include a copy of this License with every copy of Source Code of -Covered Code and documentation You distribute, and You may not offer or impose -any terms on such Source Code that alter or restrict this License or the -recipients' rights hereunder, except as permitted under Section 6; - -(c) You must duplicate, to the extent it does not already exist, the notice in -Exhibit A in each file of the Source Code of all Your Modifications, and cause -the modified files to carry prominent notices stating that You changed the files -and the date of any change; - -(d) You must make Source Code of all Your Externally Deployed Modifications -publicly available under the terms of this License, including the license grants -set forth in Section 3 below, for as long as you Deploy the Covered Code or -twelve (12) months from the date of initial Deployment, whichever is longer. You -should preferably distribute the Source Code of Your Deployed Modifications -electronically (e.g. download from a web site); and - -(e) if You Deploy Covered Code in object code, executable form only, You must -include a prominent notice, in the code itself as well as in related -documentation, stating that Source Code of the Covered Code is available under -the terms of this License with information on how and where to obtain such -Source Code. You must also include the Object Code Notice set forth in Exhibit A -in the "about" box or other appropriate place where other copyright notices are -placed, including any packaging materials. - -2.2 You expressly acknowledge and agree that although Licensor and each -Contributor grants the licenses to their respective portions of the Covered Code -set forth herein, no assurances are provided by Licensor or any Contributor that -the Covered Code does not infringe the patent or other intellectual property -rights of any other entity. Licensor and each Contributor disclaim any liability -to You for claims brought by any other entity based on infringement of -intellectual property rights or otherwise. As a condition to exercising the -rights and licenses granted hereunder, You hereby assume sole responsibility to -secure any other intellectual property rights needed, if any. For example, if a -third party patent license is required to allow You to make, use, sell, import -or offer for sale the Covered Code, it is Your responsibility to acquire such -license(s). - -2.3 Subject to the terms and conditions of this License, Licensor hereby grants -You, effective on the date You accept this License (via downloading or using -Covered Code or otherwise indicating your acceptance of this License), a -worldwide, royalty-free, perpetual, non-exclusive patent license under -Licensor's Applicable Patent Rights to make, use, sell, offer for sale and -import the Covered Code, provided that in each instance you comply with the -terms of this License. - -3. Your Grants. In consideration of, and as a condition to, the licenses granted -to You under this License: - -(a) You grant to Licensor and all third parties a non-exclusive, perpetual, -irrevocable, royalty free license under Your Applicable Patent Rights and other -intellectual property rights owned or controlled by You, to make, sell, offer -for sale, use, import, reproduce, display, perform, modify, distribute and -Deploy Your Modifications of the same scope and extent as Licensor's licenses -under Sections 2.1 and 2.2; and - -(b) You grant to Licensor and its subsidiaries a non-exclusive, worldwide, -royalty-free, perpetual and irrevocable license, under Your Applicable Patent -Rights and other intellectual property rights owned or controlled by You, to -make, use, sell, offer for sale, import, reproduce, display, perform, -distribute, modify or have modified (for Licensor and/or its subsidiaries), -sublicense and distribute Your Modifications, in any form and for any purpose, -through multiple tiers of distribution. - -(c) You agree not use any information derived from Your use and review of the -Covered Code, including but not limited to any algorithms or inventions that may -be contained in the Covered Code, for the purpose of asserting any of Your -patent rights, or assisting a third party to assert any of its patent rights, -against Licensor or any Contributor. - -4. Derivative Works. You may create a Derivative Work by combining Covered Code -with other code not otherwise governed by the terms of this License and -distribute the Derivative Work as an integrated product. In each such instance, -You must make sure the requirements of this License are fulfilled for the -Covered Code or any portion thereof, including all Modifications. - -4.1 You must cause any Derivative Work that you distribute, publish or -Externally Deploy, that in whole or in part contains or is derived from the -Covered Code or any part thereof, to be licensed as a whole at no charge to all -third parties under the terms of this License and no other license except as -provided in Section 4.2. You also must make Source Code available for the -Derivative Work under the same terms as Modifications, described in Sections 2 -and 3, above. - -4.2 Compatible Source Licenses. Software modules that have been independently -developed without any use of Covered Code and which contain no portion of the -Covered Code, Modifications or other Derivative Works, but are used or combined -in any way wtih the Covered Code or any Derivative Work to form a larger -Derivative Work, are exempt from the conditions described in Section 4.1 but -only to the extent that: the software module, including any software that is -linked to, integrated with, or part of the same applications as, the software -module by any method must be wholly subject to one of the Compatible Source -Licenses. Notwithstanding the foregoing, all Covered Code must be subject to the -terms of this License. Thus, the entire Derivative Work must be licensed under a -combination of the RPSL (for Covered Code) and a Compatible Source License for -any independently developed software modules within the Derivative Work. The -foregoing requirement applies even if the Compatible Source License would -ordinarily allow the software module to link with, or form larger works with, -other software that is not subject to the Compatible Source License. For -example, although the Mozilla Public License v1.1 allows Mozilla code to be -combined with proprietary software that is not subject to the MPL, if -MPL-licensed code is used with Covered Code the MPL-licensed code could not be -combined or linked with any code not governed by the MPL. The general intent of -this section 4.2 is to enable use of Covered Code with applications that are -wholly subject to an acceptable open source license. You are responsible for -determining whether your use of software with Covered Code is allowed under Your -license to such software. - -4.3 Mere aggregation of another work not based on the Covered Code with the -Covered Code (or with a work based on the Covered Code) on a volume of a storage -or distribution medium does not bring the other work under the scope of this -License. If You deliver the Covered Code for combination and/or integration with -an application previously provided by You (for example, via automatic updating -technology), such combination and/or integration constitutes a Derivative Work -subject to the terms of this License. - -5. Exclusions From License Grant. Nothing in this License shall be deemed to -grant any rights to trademarks, copyrights, patents, trade secrets or any other -intellectual property of Licensor or any Contributor except as expressly stated -herein. No right is granted to the trademarks of Licensor or any Contributor -even if such marks are included in the Covered Code. Nothing in this License -shall be interpreted to prohibit Licensor from licensing under different terms -from this License any code that Licensor otherwise would have a right to -license. Modifications, Derivative Works and/or any use or combination of -Covered Code with other technology provided by Licensor or third parties may -require additional patent licenses from Licensor which Licensor may grant in its -sole discretion. No patent license is granted separate from the Original Code or -combinations of the Original Code with other software or hardware. - -5.1. Trademarks. This License does not grant any rights to use the trademarks or -trade names owned by Licensor ("Licensor Marks" defined in Exhibit C) or to any -trademark or trade name belonging to any Contributor. No Licensor Marks may be -used to endorse or promote products derived from the Original Code other than as -permitted by the Licensor Trademark Policy defined in Exhibit C. - -6. Additional Terms. You may choose to offer, and to charge a fee for, warranty, -support, indemnity or liability obligations and/or other rights consistent with -the scope of the license granted herein ("Additional Terms") to one or more -recipients of Covered Code. However, You may do so only on Your own behalf and -as Your sole responsibility, and not on behalf of Licensor or any Contributor. -You must obtain the recipient's agreement that any such Additional Terms are -offered by You alone, and You hereby agree to indemnify, defend and hold -Licensor and every Contributor harmless for any liability incurred by or claims -asserted against Licensor or such Contributor by reason of any such Additional -Terms. - -7. Versions of the License. Licensor may publish revised and/or new versions of -this License from time to time. Each version will be given a distinguishing -version number. Once Original Code has been published under a particular version -of this License, You may continue to use it under the terms of that version. You -may also choose to use such Original Code under the terms of any subsequent -version of this License published by Licensor. No one other than Licensor has -the right to modify the terms applicable to Covered Code created under this -License. - -8. NO WARRANTY OR SUPPORT. The Covered Code may contain in whole or in part -pre-release, untested, or not fully tested works. The Covered Code may contain -errors that could cause failures or loss of data, and may be incomplete or -contain inaccuracies. You expressly acknowledge and agree that use of the -Covered Code, or any portion thereof, is at Your sole and entire risk. THE -COVERED CODE IS PROVIDED "AS IS" AND WITHOUT WARRANTY, UPGRADES OR SUPPORT OF -ANY KIND AND LICENSOR AND LICENSOR'S LICENSOR(S) (COLLECTIVELY REFERRED TO AS -"LICENSOR" FOR THE PURPOSES OF SECTIONS 8 AND 9) AND ALL CONTRIBUTORS EXPRESSLY -DISCLAIM ALL WARRANTIES AND/OR CONDITIONS, EXPRESS OR IMPLIED, INCLUDING, BUT -NOT LIMITED TO, THE IMPLIED WARRANTIES AND/OR CONDITIONS OF MERCHANTABILITY, OF -SATISFACTORY QUALITY, OF FITNESS FOR A PARTICULAR PURPOSE, OF ACCURACY, OF QUIET -ENJOYMENT, AND NONINFRINGEMENT OF THIRD PARTY RIGHTS. LICENSOR AND EACH -CONTRIBUTOR DOES NOT WARRANT AGAINST INTERFERENCE WITH YOUR ENJOYMENT OF THE -COVERED CODE, THAT THE FUNCTIONS CONTAINED IN THE COVERED CODE WILL MEET YOUR -REQUIREMENTS, THAT THE OPERATION OF THE COVERED CODE WILL BE UNINTERRUPTED OR -ERROR-FREE, OR THAT DEFECTS IN THE COVERED CODE WILL BE CORRECTED. NO ORAL OR -WRITTEN DOCUMENTATION, INFORMATION OR ADVICE GIVEN BY LICENSOR, A LICENSOR -AUTHORIZED REPRESENTATIVE OR ANY CONTRIBUTOR SHALL CREATE A WARRANTY. You -acknowledge that the Covered Code is not intended for use in high risk -activities, including, but not limited to, the design, construction, operation -or maintenance of nuclear facilities, aircraft navigation, aircraft -communication systems, or air traffic control machines in which case the failure -of the Covered Code could lead to death, personal injury, or severe physical or -environmental damage. Licensor disclaims any express or implied warranty of -fitness for such uses. - -9. LIMITATION OF LIABILITY. TO THE EXTENT NOT PROHIBITED BY LAW, IN NO EVENT -SHALL LICENSOR OR ANY CONTRIBUTOR BE LIABLE FOR ANY INCIDENTAL, SPECIAL, -INDIRECT OR CONSEQUENTIAL DAMAGES ARISING OUT OF OR RELATING TO THIS LICENSE OR -YOUR USE OR INABILITY TO USE THE COVERED CODE, OR ANY PORTION THEREOF, WHETHER -UNDER A THEORY OF CONTRACT, WARRANTY, TORT (INCLUDING NEGLIGENCE OR STRICT -LIABILITY), PRODUCTS LIABILITY OR OTHERWISE, EVEN IF LICENSOR OR SUCH -CONTRIBUTOR HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES AND -NOTWITHSTANDING THE FAILURE OF ESSENTIAL PURPOSE OF ANY REMEDY. SOME -JURISDICTIONS DO NOT ALLOW THE LIMITATION OF LIABILITY OF INCIDENTAL OR -CONSEQUENTIAL DAMAGES, SO THIS LIMITATION MAY NOT APPLY TO YOU. In no event -shall Licensor's total liability to You for all damages (other than as may be -required by applicable law) under this License exceed the amount of ten dollars -($10.00). - -10. Ownership. Subject to the licenses granted under this License, each -Contributor retains all rights, title and interest in and to any Modifications -made by such Contributor. Licensor retains all rights, title and interest in and -to the Original Code and any Modifications made by or on behalf of Licensor -("Licensor Modifications"), and such Licensor Modifications will not be -automatically subject to this License. Licensor may, at its sole discretion, -choose to license such Licensor Modifications under this License, or on -different terms from those contained in this License or may choose not to -license them at all. - -11. Termination. - -11.1 Term and Termination. The term of this License is perpetual unless -terminated as provided below. This License and the rights granted hereunder will -terminate: - -(a) automatically without notice from Licensor if You fail to comply with any -term(s) of this License and fail to cure such breach within 30 days of becoming -aware of such breach; - -(b) immediately in the event of the circumstances described in Section 12.5(b); -or - -(c) automatically without notice from Licensor if You, at any time during the -term of this License, commence an action for patent infringement against -Licensor (including by cross-claim or counter claim in a lawsuit); - -(d) upon written notice from Licensor if You, at any time during the term of -this License, commence an action for patent infringement against any third party -alleging that the Covered Code itself (excluding combinations with other -software or hardware) infringes any patent (including by cross-claim or counter -claim in a lawsuit). - -11.2 Effect of Termination. Upon termination, You agree to immediately stop any -further use, reproduction, modification, sublicensing and distribution of the -Covered Code and to destroy all copies of the Covered Code that are in your -possession or control. All sublicenses to the Covered Code which have been -properly granted prior to termination shall survive any termination of this -License. Provisions which, by their nature, should remain in effect beyond the -termination of this License shall survive, including but not limited to Sections -3, 5, 8, 9, 10, 11, 12.2 and 13. No party will be liable to any other for -compensation, indemnity or damages of any sort solely as a result of terminating -this License in accordance with its terms, and termination of this License will -be without prejudice to any other right or remedy of any party. - -12. Miscellaneous. - -12.1 Government End Users. The Covered Code is a "commercial item" as defined in -FAR 2.101. Government software and technical data rights in the Covered Code -include only those rights customarily provided to the public as defined in this -License. This customary commercial license in technical data and software is -provided in accordance with FAR 12.211 (Technical Data) and 12.212 (Computer -Software) and, for Department of Defense purchases, DFAR 252.227-7015 (Technical -Data -- Commercial Items) and 227.7202-3 (Rights in Commercial Computer Software -or Computer Software Documentation). Accordingly, all U.S. Government End Users -acquire Covered Code with only those rights set forth herein. - -12.2 Relationship of Parties. This License will not be construed as creating an -agency, partnership, joint venture or any other form of legal association -between or among You, Licensor or any Contributor, and You will not represent to -the contrary, whether expressly, by implication, appearance or otherwise. - -12.3 Independent Development. Nothing in this License will impair Licensor's -right to acquire, license, develop, have others develop for it, market and/or -distribute technology or products that perform the same or similar functions as, -or otherwise compete with, Modifications, Derivative Works, technology or -products that You may develop, produce, market or distribute. - -12.4 Waiver; Construction. Failure by Licensor or any Contributor to enforce any -provision of this License will not be deemed a waiver of future enforcement of -that or any other provision. Any law or regulation which provides that the -language of a contract shall be construed against the drafter will not apply to -this License. - -12.5 Severability. (a) If for any reason a court of competent jurisdiction finds -any provision of this License, or portion thereof, to be unenforceable, that -provision of the License will be enforced to the maximum extent permissible so -as to effect the economic benefits and intent of the parties, and the remainder -of this License will continue in full force and effect. (b) Notwithstanding the -foregoing, if applicable law prohibits or restricts You from fully and/or -specifically complying with Sections 2 and/or 3 or prevents the enforceability -of either of those Sections, this License will immediately terminate and You -must immediately discontinue any use of the Covered Code and destroy all copies -of it that are in your possession or control. - -12.6 Dispute Resolution. Any litigation or other dispute resolution between You -and Licensor relating to this License shall take place in the Seattle, -Washington, and You and Licensor hereby consent to the personal jurisdiction of, -and venue in, the state and federal courts within that District with respect to -this License. The application of the United Nations Convention on Contracts for -the International Sale of Goods is expressly excluded. - -12.7 Export/Import Laws. This software is subject to all export and import laws -and restrictions and regulations of the country in which you receive the Covered -Code and You are solely responsible for ensuring that You do not export, -re-export or import the Covered Code or any direct product thereof in violation -of any such restrictions, laws or regulations, or without all necessary -authorizations. - -12.8 Entire Agreement; Governing Law. This License constitutes the entire -agreement between the parties with respect to the subject matter hereof. This -License shall be governed by the laws of the United States and the State of -Washington. - -Where You are located in the province of Quebec, Canada, the following clause -applies: The parties hereby confirm that they have requested that this License -and all related documents be drafted in English. Les parties ont exigé -que le présent contrat et tous les documents connexes soient -rédigés en anglais. - - EXHIBIT A. - -"Copyright © 1995-2002 -RealNetworks, Inc. and/or its licensors. All Rights Reserved. - -The contents of this file, and the files included with this file, are subject to -the current version of the RealNetworks Public Source License Version 1.0 (the -"RPSL") available at https://www.helixcommunity.org/content/rpsl unless you have -licensed the file under the RealNetworks Community Source License Version 1.0 -(the "RCSL") available at https://www.helixcommunity.org/content/rcsl, in which -case the RCSL will apply. You may also obtain the license terms directly from -RealNetworks. You may not use this file except in compliance with the RPSL or, -if you have a valid RCSL with RealNetworks applicable to this file, the RCSL. -Please see the applicable RPSL or RCSL for the rights, obligations and -limitations governing use of the contents of the file. - -This file is part of the Helix DNA Technology. RealNetworks is the developer of -the Original code and owns the copyrights in the portions it created. - -This file, and the files included with this file, is distributed and made -available on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESS OR -IMPLIED, AND REALNETWORKS HEREBY DISCLAIMS ALL SUCH WARRANTIES, INCLUDING -WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR -PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT. - -Contributor(s): ____________________________________ - -Technology Compatibility Kit Test -Suite(s) Location (if licensed under the RCSL): ______________________________ - -Object Code Notice: Helix DNA Client technology included. Copyright (c) -RealNetworks, Inc., 1995-2002. All rights reserved. - - - EXHIBIT B - -Compatible Source Licenses for the RealNetworks Public Source License. The -following list applies to the most recent version of the license as of October -25, 2002, unless otherwise indicated. - -* Academic Free License -* Apache Software License -* Apple Public Source License -* Artistic license -* Attribution Assurance Licenses -* BSD license -* Common Public License (1) -* Eiffel Forum License -* GNU General Public License (GPL) (1) -* GNU Library or "Lesser" General Public License (LGPL) (1) -* IBM Public License -* Intel Open Source License -* Jabber Open Source License -* MIT license -* MITRE Collaborative Virtual Workspace License (CVW License) -* Motosoto License -* Mozilla Public License 1.0 (MPL) -* Mozilla Public License 1.1 (MPL) -* Nokia Open Source License -* Open Group Test Suite License -* Python Software Foundation License -* Ricoh Source Code Public License -* Sun Industry Standards Source License (SISSL) -* Sun Public License -* University of Illinois/NCSA Open Source License -* Vovida Software License v. 1.0 -* W3C License -* X.Net License -* Zope Public License -* zlib/libpng license - -(1) Note: because this license contains certain reciprocal licensing terms that -purport to extend to independently developed code, You may be prohibited under -the terms of this otherwise compatible license from using code licensed under -its terms with Covered Code because Covered Code may only be licensed under the -RealNetworks Public Source License. Any attempt to apply non RPSL license terms, -including without limitation the GPL, to Covered Code is expressly forbidden. -You are responsible for ensuring that Your use of Compatible Source Licensed -code does not violate either the RPSL or the Compatible Source License. - -The latest version of this list can be found at: -https://www.helixcommunity.org/content/complicense - - EXHIBIT C - -RealNetworks' Trademark policy. - -RealNetworks defines the following trademarks collectively as "Licensor -Trademarks": "RealNetworks", "RealPlayer", "RealJukebox", "RealSystem", -"RealAudio", "RealVideo", "RealOne Player", "RealMedia", "Helix" or any other -trademarks or trade names belonging to RealNetworks. - -RealNetworks "Licensor Trademark Policy" forbids any use of Licensor Trademarks -except as permitted by and in strict compliance at all times with RealNetworks' -third party trademark usage guidelines which are posted at -http://www.realnetworks.com/info/helixlogo.html. - diff --git a/bsp/stm32_radio/mp3/real/projects/armwince/mp3dec.vcp b/bsp/stm32_radio/mp3/real/projects/armwince/mp3dec.vcp deleted file mode 100644 index 7f8ab60dc6..0000000000 --- a/bsp/stm32_radio/mp3/real/projects/armwince/mp3dec.vcp +++ /dev/null @@ -1,335 +0,0 @@ -# Microsoft eMbedded Visual Tools Project File - Name="mp3dec" - Package Owner=<4> -# Microsoft eMbedded Visual Tools Generated Build File, Format Version 6.02 -# ** DO NOT EDIT ** - -# TARGTYPE "Win32 (WCE ARM) Static Library" 0x8504 - -CFG=mp3dec - Win32 (WCE ARM) Debug -!MESSAGE This is not a valid makefile. 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-# PROP Default_Filter "ico;cur;bmp;dlg;rc2;rct;bin;rgs;gif;jpg;jpeg;jpe" -# End Group -# End Target -# End Project diff --git a/bsp/stm32_radio/mp3/real/projects/visualc/LICENSE.txt b/bsp/stm32_radio/mp3/real/projects/visualc/LICENSE.txt deleted file mode 100644 index 12e5372a9f..0000000000 --- a/bsp/stm32_radio/mp3/real/projects/visualc/LICENSE.txt +++ /dev/null @@ -1,30 +0,0 @@ - Copyright (c) 1995-2004 RealNetworks, Inc. All Rights Reserved. - - The contents of this directory, and (except where otherwise - indicated) the directories included within this directory, are - subject to the current version of the RealNetworks Public Source - License (the "RPSL") available at RPSL.txt in this directory, unless - you have licensed the directory under the current version of the - RealNetworks Community Source License (the "RCSL") available at - RCSL.txt in this directory, in which case the RCSL will apply. You - may also obtain the license terms directly from RealNetworks. You - may not use the files in this directory except in compliance with the - RPSL or, if you have a valid RCSL with RealNetworks applicable to - this directory, the RCSL. Please see the applicable RPSL or RCSL for - the rights, obligations and limitations governing use of the contents - of the directory. - - This directory is part of the Helix DNA Technology. RealNetworks is - the developer of the Original Code and owns the copyrights in the - portions it created. - - This directory, and the directories included with this directory, are - distributed and made available on an 'AS IS' basis, WITHOUT WARRANTY - OF ANY KIND, EITHER EXPRESS OR IMPLIED, AND REALNETWORKS HEREBY - DISCLAIMS ALL SUCH WARRANTIES, INCLUDING WITHOUT LIMITATION, ANY - WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, - QUIET ENJOYMENT OR NON-INFRINGEMENT. - - Technology Compatibility Kit Test Suite(s) Location: - http://www.helixcommunity.org/content/tck - diff --git a/bsp/stm32_radio/mp3/real/projects/visualc/RCSL.txt b/bsp/stm32_radio/mp3/real/projects/visualc/RCSL.txt deleted file mode 100644 index a809759a32..0000000000 --- a/bsp/stm32_radio/mp3/real/projects/visualc/RCSL.txt +++ /dev/null @@ -1,948 +0,0 @@ -The RCSL is made up of a base agreement and a few Attachments. - -For Research and Development use, you agree to the terms of the -RCSL R&D License (base RCSL and Attachments A, B, and C) - -For Commercial Use (either distribution or internal commercial -deployment) of the Helix DNA with or without support for RealNetworks' -RealAudio and RealVideo Add-on Technology, you agree to the -terms of the same RCSL R&D license -and execute one or more additional Commercial Use License attachments -. - ------------------------------------------------------------------------- - - - REALNETWORKS COMMUNITY SOURCE LICENSE - -Version 1.2 (Rev. Date: January 22, 2003). - - - RECITALS - -Original Contributor has developed Specifications, Source Code -implementations and Executables of certain Technology; and - -Original Contributor desires to license the Technology to a large -community to facilitate research, innovation and product development -while maintaining compatibility of such products with the Technology as -delivered by Original Contributor; and - -Original Contributor desires to license certain Trademarks for the -purpose of branding products that are compatible with the relevant -Technology delivered by Original Contributor; and - -You desire to license the Technology and possibly certain Trademarks -from Original Contributor on the terms and conditions specified in this -License. - -In consideration for the mutual covenants contained herein, You and -Original Contributor agree as follows: - - - AGREEMENT - -*1. Introduction.* - -The RealNetworks Community Source License ("RCSL") and effective -attachments ("License") may include five distinct licenses: - -i) Research Use license -- License plus Attachments A, B and C only. - -ii) Commercial Use and Trademark License, which may be for Internal -Deployment Use or external distribution, or both -- License plus -Attachments A, B, C, and D. - -iii) Technology Compatibility Kit (TCK) license -- Attachment C. - -iv) Add-On Technology License (Executable) Commercial Use License --Attachment F. - -v) Add-On Technology Source Code Porting and Optimization -License-Attachment G. - -The Research Use license is effective when You click and accept this -License. The TCK is effective when You click and accept this License, -unless otherwise specified in the TCK attachments. The Commercial Use -and Trademark, Add-On Technology License, and the Add-On Technology -Source Code Porting and Optimization licenses must each be signed by You -and Original Contributor to become effective. Once effective, these -licenses and the associated requirements and responsibilities are -cumulative. Capitalized terms used in this License are defined in the -Glossary. - -*2. License Grants.* - -2.1 Original Contributor Grant. - -Subject to Your compliance with Sections 3, 8.10 and Attachment A of -this License, Original Contributor grants to You a worldwide, -royalty-free, non-exclusive license, to the extent of Original -Contributor's Intellectual Property Rights covering the Original Code, -Upgraded Code and Specifications, to do the following: - -(a) Research Use License: - -(i) use, reproduce and modify the Original Code, Upgraded Code and -Specifications to create Modifications and Reformatted Specifications -for Research Use by You; - -(ii) publish and display Original Code, Upgraded Code and Specifications -with, or as part of Modifications, as permitted under Section 3.1(b) below; - -(iii) reproduce and distribute copies of Original Code and Upgraded Code -to Licensees and students for Research Use by You; - -(iv) compile, reproduce and distribute Original Code and Upgraded Code -in Executable form, and Reformatted Specifications to anyone for -Research Use by You. - -(b) Other than the licenses expressly granted in this License, Original -Contributor retains all right, title, and interest in Original Code and -Upgraded Code and Specifications. - -2.2 Your Grants. - -(a) To Other Licensees. You hereby grant to each Licensee a license to -Your Error Corrections and Shared Modifications, of the same scope and -extent as Original Contributor's licenses under Section 2.1 a) above -relative to Research Use and Attachment D relative to Commercial Use. - -(b) To Original Contributor. You hereby grant to Original Contributor a -worldwide, royalty-free, non-exclusive, perpetual and irrevocable -license, to the extent of Your Intellectual Property Rights covering -Your Error Corrections, Shared Modifications and Reformatted -Specifications, to use, reproduce, modify, display and distribute Your -Error Corrections, Shared Modifications and Reformatted Specifications, -in any form, including the right to sublicense such rights through -multiple tiers of distribution. - -(c) Other than the licenses expressly granted in Sections 2.2(a) and (b) -above, and the restrictions set forth in Section 3.1(d)(iv) below, You -retain all right, title, and interest in Your Error Corrections, Shared -Modifications and Reformatted Specifications. - -2.3 Contributor Modifications. - -You may use, reproduce, modify, display and distribute Contributor Error -Corrections, Shared Modifications and Reformatted Specifications, -obtained by You under this License, to the same scope and extent as with -Original Code, Upgraded Code and Specifications. - -2.4 Subcontracting. - -You may deliver the Source Code of Covered Code to other Licensees -having at least a Research Use license, for the sole purpose of -furnishing development services to You in connection with Your rights -granted in this License. All such Licensees must execute appropriate -documents with respect to such work consistent with the terms of this -License, and acknowledging their work-made-for-hire status or assigning -exclusive right to the work product and associated Intellectual Property -Rights to You. - -*3. Requirements and Responsibilities*. - -3.1 Research Use License. - -As a condition of exercising the rights granted under Section 2.1(a) -above, You agree to comply with the following: - -(a) Your Contribution to the Community. All Error Corrections and Shared -Modifications which You create or contribute to are automatically -subject to the licenses granted under Section 2.2 above. You are -encouraged to license all of Your other Modifications under Section 2.2 -as Shared Modifications, but are not required to do so. You agree to -notify Original Contributor of any errors in the Specification. - -(b) Source Code Availability. You agree to provide all Your Error -Corrections to Original Contributor as soon as reasonably practicable -and, in any event, prior to Internal Deployment Use or Commercial Use, -if applicable. Original Contributor may, at its discretion, post Source -Code for Your Error Corrections and Shared Modifications on the -Community Webserver. You may also post Error Corrections and Shared -Modifications on a web-server of Your choice; provided, that You must -take reasonable precautions to ensure that only Licensees have access to -such Error Corrections and Shared Modifications. Such precautions shall -include, without limitation, a password protection scheme limited to -Licensees and a click-on, download certification of Licensee status -required of those attempting to download from the server. An example of -an acceptable certification is attached as Attachment A-2. - -(c) Notices. All Error Corrections and Shared Modifications You create -or contribute to must include a file documenting the additions and -changes You made and the date of such additions and changes. You must -also include the notice set forth in Attachment A-1 in the file header. -If it is not possible to put the notice in a particular Source Code file -due to its structure, then You must include the notice in a location -(such as a relevant directory file), where a recipient would be most -likely to look for such a notice. - -(d) Redistribution. - -(i) Source. Covered Code may be distributed in Source Code form only to -another Licensee (except for students as provided below). You may not -offer or impose any terms on any Covered Code that alter the rights, -requirements, or responsibilities of such Licensee. You may distribute -Covered Code to students for use in connection with their course work -and research projects undertaken at accredited educational institutions. -Such students need not be Licensees, but must be given a copy of the -notice set forth in Attachment A-3 and such notice must also be included -in a file header or prominent location in the Source Code made available -to such students. - -(ii) Executable. You may distribute Executable version(s) of Covered -Code to Licensees and other third parties only for the purpose of -evaluation and comment in connection with Research Use by You and under -a license of Your choice, but which limits use of such Executable -version(s) of Covered Code only to that purpose. - -(iii) Modified Class, Interface and Package Naming. In connection with -Research Use by You only, You may use Original Contributor's class, -Interface and package names only to accurately reference or invoke the -Source Code files You modify. Original Contributor grants to You a -limited license to the extent necessary for such purposes. - -(iv) You expressly agree that any distribution, in whole or in part, of -Modifications developed by You shall only be done pursuant to the terms -and conditions of this License. - -(e) Extensions. - -(i) Covered Code. You may not include any Source Code of Community Code -in any Extensions. You may include the compiled Header Files of -Community Code in an Extension provided that Your use of the Covered -Code, including Heading Files, complies with the Commercial Use License, -the TCK and all other terms of this License. - -(ii) Publication. No later than the date on which You first distribute -such Extension for Commercial Use, You must publish to the industry, on -a non-confidential basis and free of all copyright restrictions with -respect to reproduction and use, an accurate and current specification -for any Extension. In addition, You must make available an appropriate -test suite, pursuant to the same rights as the specification, -sufficiently detailed to allow any third party reasonably skilled in the -technology to produce implementations of the Extension compatible with -the specification. Such test suites must be made available as soon as -reasonably practicable but, in no event, later than ninety (90) days -after Your first Commercial Use of the Extension. You must use -reasonable efforts to promptly clarify and correct the specification and -the test suite upon written request by Original Contributor. - -(iii) Open. You agree to refrain from enforcing any Intellectual -Property Rights You may have covering any interface(s) of Your -Extension, which would prevent the implementation of such interface(s) -by Original Contributor or any Licensee. This obligation does not -prevent You from enforcing any Intellectual Property Right You have that -would otherwise be infringed by an implementation of Your Extension. - -(iv) Interface Modifications and Naming. You may not modify or add to -the GUID space * * "xxxxxxxx-0901-11d1-8B06-00A024406D59" or any other -GUID space designated by Original Contributor. You may not modify any -Interface prefix provided with the Covered Code or any other prefix -designated by Original Contributor.* * - -* * - -(f) You agree that any Specifications provided to You by Original -Contributor are confidential and proprietary information of Original -Contributor. You must maintain the confidentiality of the Specifications -and may not disclose them to any third party without Original -Contributor's prior written consent. You may only use the Specifications -under the terms of this License and only for the purpose of implementing -the terms of this License with respect to Covered Code. You agree not -use, copy or distribute any such Specifications except as provided in -writing by Original Contributor. - -3.2 Commercial Use License. - -You may not make Commercial Use of any Covered Code unless You and -Original Contributor have executed a copy of the Commercial Use and -Trademark License attached as Attachment D. - -*4. Versions of the License.* - -4.1 License Versions. - -Original Contributor may publish revised versions of the License from -time to time. Each version will be given a distinguishing version number. - -4.2 Effect. - -Once a particular version of Covered Code has been provided under a -version of the License, You may always continue to use such Covered Code -under the terms of that version of the License. You may also choose to -use such Covered Code under the terms of any subsequent version of the -License. No one other than Original Contributor has the right to -promulgate License versions. - -4.3 Multiple-Licensed Code. - -Original Contributor may designate portions of the Covered Code as -"Multiple-Licensed." "Multiple-Licensed" means that the Original -Contributor permits You to utilize those designated portions of the -Covered Code under Your choice of this License or the alternative -license(s), if any, specified by the Original Contributor in an -Attachment to this License. - -*5. Disclaimer of Warranty.* - -5.1 COVERED CODE PROVIDED AS IS. - -COVERED CODE IS PROVIDED UNDER THIS LICENSE "AS IS," WITHOUT WARRANTY OF -ANY KIND, EITHER EXPRESS OR IMPLIED, INCLUDING, WITHOUT LIMITATION, -WARRANTIES THAT THE COVERED CODE IS FREE OF DEFECTS, MERCHANTABLE, FIT -FOR A PARTICULAR PURPOSE OR NON-INFRINGING. YOU AGREE TO BEAR THE ENTIRE -RISK IN CONNECTION WITH YOUR USE AND DISTRIBUTION OF COVERED CODE UNDER -THIS LICENSE. THIS DISCLAIMER OF WARRANTY CONSTITUTES AN ESSENTIAL PART -OF THIS LICENSE. NO USE OF ANY COVERED CODE IS AUTHORIZED HEREUNDER -EXCEPT SUBJECT TO THIS DISCLAIMER. - -5.2 Not Designed for High Risk Activities. - -You acknowledge that Original Code, Upgraded Code and Specifications are -not designed or intended for use in high risk activities including, but -not limited to: (i) on-line control of aircraft, air traffic, aircraft -navigation or aircraft communications; or (ii) in the design, -construction, operation or maintenance of any nuclear facility. Original -Contributor disclaims any express or implied warranty of fitness for -such uses. - -*6. Termination.* - -6.1 By You. - -You may terminate this Research Use license at anytime by providing -written notice to Original Contributor. - -6.2 By Original Contributor. - -This License and the rights granted hereunder will terminate: - -(i) automatically if You fail to comply with the terms of this License -and fail to cure such breach within 30 days of receipt of written notice -of the breach; - -(ii) immediately in the event of circumstances specified in Sections 7.1 -and 8.4; or - -(iii) at Original Contributor's discretion upon any action initiated by -You (including by cross-claim or counter claim) alleging that use or -distribution by Original Contributor or any Licensee, of Original Code, -Upgraded Code, Error Corrections, Shared Modifications or Specifications -infringe a patent owned or controlled by You. - -6.3 Effective of Termination. - -Upon termination, You agree to discontinue use of and destroy all copies -of Covered Code in Your possession. All sublicenses to the Covered Code -which You have properly granted shall survive any termination of this -License. Provisions that, by their nature, should remain in effect -beyond the termination of this License shall survive including, without -limitation, Sections 2.2, 3, 5, 7 and 8. - -6.4 No Compensation. - -Each party waives and releases the other from any claim to compensation -or indemnity for permitted or lawful termination of the business -relationship established by this License. - -*7. Liability.* - -7.1 Infringement. Should any of the Original Code, Upgraded Code, TCK or -Specifications ("Materials") become the subject of a claim of -infringement, Original Contributor may, at its sole option, (i) attempt -to procure the rights necessary for You to continue using the Materials, -(ii) modify the Materials so that they are no longer infringing, or -(iii) terminate Your right to use the Materials, immediately upon -written notice, and refund to You the amount, if any, having then -actually been paid by You to Original Contributor for the Original Code, -Upgraded Code and TCK, depreciated on a straight line, five year basis. - -7.2 LIMITATION OF LIABILITY. TO THE FULL EXTENT ALLOWED BY APPLICABLE -LAW, ORIGINAL CONTRIBUTOR'S LIABILITY TO YOU FOR CLAIMS RELATING TO THIS -LICENSE, WHETHER FOR BREACH OR IN TORT, SHALL BE LIMITED TO ONE HUNDRED -PERCENT (100%) OF THE AMOUNT HAVING THEN ACTUALLY BEEN PAID BY YOU TO -ORIGINAL CONTRIBUTOR FOR ALL COPIES LICENSED HEREUNDER OF THE PARTICULAR -ITEMS GIVING RISE TO SUCH CLAIM, IF ANY, DURING THE TWELVE MONTHS -PRECEDING THE CLAIMED BREACH. IN NO EVENT WILL YOU (RELATIVE TO YOUR -SHARED MODIFICATIONS OR ERROR CORRECTIONS) OR ORIGINAL CONTRIBUTOR BE -LIABLE FOR ANY INDIRECT, PUNITIVE, SPECIAL, INCIDENTAL OR CONSEQUENTIAL -DAMAGES IN CONNECTION WITH OR RISING OUT OF THIS LICENSE (INCLUDING, -WITHOUT LIMITATION, LOSS OF PROFITS, USE, DATA, OR OTHER ECONOMIC -ADVANTAGE), HOWEVER IT ARISES AND ON ANY THEORY OF LIABILITY, WHETHER IN -AN ACTION FOR CONTRACT, STRICT LIABILITY OR TORT (INCLUDING NEGLIGENCE) -OR OTHERWISE, WHETHER OR NOT YOU OR ORIGINAL CONTRIBUTOR HAS BEEN -ADVISED OF THE POSSIBILITY OF SUCH DAMAGE AND NOTWITHSTANDING THE -FAILURE OF ESSENTIAL PURPOSE OF ANY REMEDY. - -*8. Miscellaneous.* - -8.1 Trademark. - -You shall not use any Trademark unless You and Original Contributor -execute a copy of the Commercial Use and Trademark License Agreement -attached hereto as Attachment D. Except as expressly provided in the -License, You are granted no right, title or license to, or interest in, -any Trademarks. Whether or not You and Original Contributor enter into -the Trademark License, You agree not to (i) challenge Original -Contributor's ownership or use of Trademarks; (ii) attempt to register -any Trademarks, or any mark or logo substantially similar thereto; or -(iii) incorporate any Trademarks into Your own trademarks, product -names, service marks, company names, or domain names. - -8.2 Integration. - -This License represents the complete agreement concerning the subject -matter hereof. - -8.3 Assignment. - -Original Contributor may assign this License, and its rights and -obligations hereunder, in its sole discretion. You may assign the -Research Use portions of this License and the TCK license to a third -party upon prior written notice to Original Contributor (which may be -provided electronically via the Community Web-Server). You may not -assign the Commercial Use and Trademark license, the Add-On Technology -License, or the Add-On Technology Source Code Porting License, including -by way of merger (regardless of whether You are the surviving entity) or -acquisition, without Original Contributor's prior written consent. - -8.4 Severability. - -If any provision of this License is held to be unenforceable, such -provision shall be reformed only to the extent necessary to make it -enforceable. Notwithstanding the foregoing, if You are prohibited by law -from fully and specifically complying with Sections 2.2 or 3, this -License will immediately terminate and You must immediately discontinue -any use of Covered Code. - -8.5 Governing Law. - -This License shall be governed by the laws of the United States and the -State of Washington, as applied to contracts entered into and to be -performed in Washington between Washington residents. The application of -the United Nations Convention on Contracts for the International Sale of -Goods is expressly excluded. You agree that the state and federal courts -located in Seattle, Washington have exclusive jurisdiction over any -claim relating to the License, including contract and tort claims. - -8.6 Dispute Resolution. - -a) Arbitration. Any dispute arising out of or relating to this License -shall be finally settled by arbitration as set out herein, except that -either party may bring any action, in a court of competent jurisdiction -(which jurisdiction shall be exclusive), with respect to any dispute -relating to such party's Intellectual Property Rights or with respect to -Your compliance with the TCK license. Arbitration shall be administered: -(i) by the American Arbitration Association (AAA), (ii) in accordance -with the rules of the United Nations Commission on International Trade -Law (UNCITRAL) (the "Rules") in effect at the time of arbitration as -modified herein; and (iii) the arbitrator will apply the substantive -laws of Washington and the United States. Judgment upon the award -rendered by the arbitrator may be entered in any court having -jurisdiction to enforce such award. - -b) Arbitration language, venue and damages. All arbitration proceedings -shall be conducted in English by a single arbitrator selected in -accordance with the Rules, who must be fluent in English and be either a -retired judge or practicing attorney having at least ten (10) years -litigation experience and be reasonably familiar with the technology -matters relative to the dispute. Unless otherwise agreed, arbitration -venue shall be in Seattle, Washington. The arbitrator may award monetary -damages only and nothing shall preclude either party from seeking -provisional or emergency relief from a court of competent jurisdiction. -The arbitrator shall have no authority to award damages in excess of -those permitted in this License and any such award in excess is void. -All awards will be payable in U.S. dollars and may include, for the -prevailing party (i) pre-judgment award interest, (ii) reasonable -attorneys' fees incurred in connection with the arbitration, and (iii) -reasonable costs and expenses incurred in enforcing the award. The -arbitrator will order each party to produce identified documents and -respond to no more than twenty-five single question interrogatories. - -8.7 Construction. - -Any law or regulation, which provides that the language of a contract -shall be construed against the drafter, shall not apply to this License. - -8.8 U.S. Government End Users. - -The Covered Code is a "commercial item," as that term is defined in 48 -C.F.R. 2.101 (Oct. 1995), consisting of "commercial computer software" -and "commercial computer software documentation," as such terms are used -in 48 C.F.R. 12.212 (Sept. 1995). Consistent with 48 C.F.R. 12.212 and -48 C.F.R. 227.7202-1 through 227.7202-4 (June 1995), all U.S. Government -End Users acquire Covered Code with only those rights set forth herein. -You agree to pass this notice to our licensees. - -8.9 Marketing Activities. - -Licensee hereby grants Original Contributor a non-exclusive, -non-transferable, limited license to use the Licensee's company name and -logo ("Licensee Marks") in any presentations, press releases, or -marketing materials solely for the purpose of identifying Licensee as a -member of the Helix Community. Licensee shall provide samples of -Licensee Marks to Original Contributor upon request by Original -Contributor. Original Contributor acknowledges that the Licensee Marks -are the trademarks of Licensee. Original Contributor shall not use the -Licensee Marks in a way that may imply that Original Contributor is an -agency or branch of Licensee. Original Contributor understands and -agrees that the use of any Licensee Marks in connection with this -Agreement shall not create any right, title or interest, in, or to the -Licensee Marks or any Licensee trademarks and that all such use and -goodwill associated with any such trademarks will inure to the benefit -of Licensee. Further the Original Contributor will stop usage of the -Licensee Marks upon Licensee's request. - -8.10 Press Announcements. - -You may make press announcements or other public statements regarding -this License without the prior written consent of the Original -Contributor, if Your statement is limited to announcing the licensing of -the Covered Code or the availability of Your Product and its -compatibility with the Covered Code. All other public announcements -regarding this license require the prior written consent of the Original -Contributor. Consent requests are welcome at press@helixcommunity.org. - -8.11 International Use. - -a) Export/Import laws. Covered Code is subject to U.S. export control -laws and may be subject to export or import regulations in other -countries. Each party agrees to comply strictly with all such laws and -regulations and acknowledges their responsibility to obtain such -licenses to export, re-export, or import as may be required. You agree -to pass these obligations to Your licensees. - -b) Intellectual Property Protection. Due to limited intellectual -property protection and enforcement in certain countries, You agree not -to redistribute the Original Code, Upgraded Code, TCK and Specifications -to any country on the list of restricted countries on the Community Web -Server. - -8.12 Language. - -This License is in the English language only, which language shall be -controlling in all respects, and all versions of this License in any -other language shall be for accommodation only and shall not be binding -on the parties to this License. All communications and notices made or -given pursuant to this License, and all documentation and support to be -provided, unless otherwise noted, shall be in the English language. - -PLEASE READ THE TERMS OF THIS LICENSE CAREFULLY. BY CLICKING ON THE -"ACCEPT" BUTTON BELOW YOU ARE ACCEPTING AND AGREEING TO THE TERMS AND -CONDITIONS OF THIS LICENSE WITH REALNETWORKS, INC. IF YOU ARE AGREEING -TO THIS LICENSE ON BEHALF OF A COMPANY, YOU REPRESENT THAT YOU ARE -AUTHORIZED TO BIND THE COMPANY TO SUCH A LICENSE. WHETHER YOU ARE ACTING -ON YOUR OWN BEHALF, OR REPRESENTING A COMPANY, YOU MUST BE OF MAJORITY -AGE AND BE OTHERWISE COMPETENT TO ENTER INTO CONTRACTS. IF YOU DO NOT -MEET THIS CRITERIA OR YOU DO NOT AGREE TO ANY OF THE TERMS AND -CONDITIONS OF THIS LICENSE, CLICK ON THE REJECT BUTTON TO EXIT. - - - GLOSSARY - -1. *"Added Value"* means code which: - -(i) has a principal purpose which is substantially different from that -of the stand-alone Technology; - -(ii) represents a significant functional and value enhancement to the -Technology; - -(iii) operates in conjunction with the Technology; and - -(iv) is not marketed as a technology which replaces or substitutes for -the Technology - -2. "*Applicable Patent Rights*" mean: (a) in the case where Original -Contributor is the grantor of rights, claims of patents that (i) are now -or hereafter acquired, owned by or assigned to Original Contributor and -(ii) are necessarily infringed by using or making the Original Code or -Upgraded Code, including Modifications provided by Original Contributor, -alone and not in combination with other software or hardware; and (b) in -the case where Licensee is the grantor of rights, claims of patents that -(i) are now or hereafter acquired, owned by or assigned to Licensee and -(ii) are infringed (directly or indirectly) by using or making -Licensee's Modifications or Error Corrections, taken alone or in -combination with Covered Code. - -3. "*Application Programming Interfaces (APIs)"* means the interfaces, -associated header files, service provider interfaces, and protocols that -enable a device, application, Operating System, or other program to -obtain services from or make requests of (or provide services in -response to requests from) other programs, and to use, benefit from, or -rely on the resources, facilities, and capabilities of the relevant -programs using the APIs. APIs includes the technical documentation -describing the APIs, the Source Code constituting the API, and any -Header Files used with the APIs. - -4. "*Commercial Use*" means any use (internal or external), copying, -sublicensing or distribution (internal or external), directly or -indirectly of Covered Code by You other than Your Research Use of -Covered Code within Your business or organization or in conjunction with -other Licensees with equivalent Research Use rights. Commercial Use -includes any use of the Covered Code for direct or indirect commercial -or strategic gain, advantage or other business purpose. Any Commercial -Use requires execution of Attachment D by You and Original Contributor. - -5. "*Community Code*" means the Original Code, Upgraded Code, Error -Corrections, Shared Modifications, or any combination thereof. - -6. "*Community Webserver(s)"* means the webservers designated by -Original Contributor for access to the Original Code, Upgraded Code, TCK -and Specifications and for posting Error Corrections and Shared -Modifications. - -7. "*Compliant Covered Code*" means Covered Code that complies with the -requirements of the TCK. - -8. "*Contributor*" means each Licensee that creates or contributes to -the creation of any Error Correction or Shared Modification. - -9. "*Covered Code*" means the Original Code, Upgraded Code, -Modifications, or any combination thereof. - -10. "*Error Correction*" means any change made to Community Code which -conforms to the Specification and corrects the adverse effect of a -failure of Community Code to perform any function set forth in or -required by the Specifications. - -11. "*Executable*" means Covered Code that has been converted from -Source Code to the preferred form for execution by a computer or digital -processor (e.g. binary form). - -12. "*Extension(s)"* means any additional Interfaces developed by or for -You which: (i) are designed for use with the Technology; (ii) constitute -an API for a library of computing functions or services; and (iii) are -disclosed or otherwise made available to third party software developers -for the purpose of developing software which invokes such additional -Interfaces. The foregoing shall not apply to software developed by Your -subcontractors to be exclusively used by You. - -13. "*Header File(s)"* means that portion of the Source Code that -provides the names and types of member functions, data members, class -definitions, and interface definitions necessary to implement the APIs -for the Covered Code. Header Files include, files specifically -designated by Original Contributor as Header Files. Header Files do not -include the code necessary to implement the functionality underlying the -Interface. - -14. *"Helix DNA Server Technology"* means the program(s) that implement -the Helix Universal Server streaming engine for the Technology as -defined in the Specification. - -15. *"Helix DNA Client Technology"* means the Covered Code that -implements the RealOne Player engine as defined in the Specification. - -16. *"Helix DNA Producer Technology"* means the Covered Code that -implements the Helix Producer engine as defined in the Specification. - -17. *"Helix DNA Technology"* means the Helix DNA Server Technology, the -Helix DNA Client Technology, the Helix DNA Producer Technology and other -Helix technologies designated by Original Contributor. - -18. "*Intellectual Property Rights*" means worldwide statutory and -common law rights associated solely with (i) Applicable Patent Rights; -(ii) works of authorship including copyrights, copyright applications, -copyright registrations and "moral rights"; (iii) the protection of -trade and industrial secrets and confidential information; and (iv) -divisions, continuations, renewals, and re-issuances of the foregoing -now existing or acquired in the future. - -19. *"Interface*" means interfaces, functions, properties, class -definitions, APIs, Header Files, GUIDs, V-Tables, and/or protocols -allowing one piece of software, firmware or hardware to communicate or -interoperate with another piece of software, firmware or hardware. - -20. "*Internal Deployment Use*" means use of Compliant Covered Code -(excluding Research Use) within Your business or organization only by -Your employees and/or agents on behalf of Your business or organization, -but not to provide services, including content distribution, to third -parties, subject to execution of Attachment D by You and Original -Contributor, if required. - -21. "*Licensee*" means any party that has entered into and has in effect -a version of this License with Original Contributor. - -22. "*MIME type*" means a description of what type of media or other -content is in a file, including by way of example but not limited to -'audio/x-pn-realaudio-plugin.' - -23. "*Modification(s)"* means (i) any addition to, deletion from and/or -change to the substance and/or structure of the Covered Code, including -Interfaces; (ii) the combination of any Covered Code and any previous -Modifications; (iii) any new file or other representation of computer -program statements that contains any portion of Covered Code; and/or -(iv) any new Source Code implementing any portion of the Specifications. - -24. "*MP3 Patents*" means any patents necessary to make, use or sell -technology implementing any portion of the specification developed by -the Moving Picture Experts Group known as MPEG-1 Audio Layer-3 or MP3, -including but not limited to all past and future versions, profiles, -extensions, parts and amendments relating to the MP3 specification. - -25. "*MPEG-4 Patents*" means any patents necessary to make, use or sell -technology implementing any portion of the specification developed by -the Moving Pictures Experts Group known as MPEG-4, including but not -limited to all past and future versions, profiles, extensions, parts and -amendments relating to the MPEG-4 specification. - -26. "*Original Code*" means the initial Source Code for the Technology -as described on the Community Web Server. - -27. "*Original Contributor*" means RealNetworks, Inc., its affiliates -and its successors and assigns. - -28. "*Original Contributor MIME Type*" means the MIME registry, browser -preferences, or local file/protocol associations invoking any Helix DNA -Client-based application, including the RealOne Player, for playback of -RealAudio, RealVideo, other RealMedia MIME types or datatypes (e.g., -.ram, .rnx, .rpm, .ra, .rm, .rp, .rt, .rf, .prx, .mpe, .rmp, .rmj, .rav, -.rjs, .rmx, .rjt, .rms), and any other Original Contributor-specific or -proprietary MIME types that Original Contributor may introduce in the -future. - -29. "*Personal Use*" means use of Covered Code by an individual solely -for his or her personal, private and non-commercial purposes. An -individual's use of Covered Code in his or her capacity as an officer, -employee, member, independent contractor or agent of a corporation, -business or organization (commercial or non-commercial) does not qualify -as Personal Use. - -30. "*RealMedia File Format*" means the file format designed and -developed by RealNetworks for storing multimedia data and used to store -RealAudio and RealVideo encoded streams. Valid RealMedia File Format -extensions include: .rm, .rmj, .rmc, .rmvb, .rms. - -31. "*RCSL Webpage*" means the RealNetworks Community Source License -webpage located at https://www.helixcommunity.org/content/rcsl or such -other URL that Original Contributor may designate from time to time. - -32. "*Reformatted Specifications*" means any revision to the -Specifications which translates or reformats the Specifications (as for -example in connection with Your documentation) but which does not alter, -subset or superset * *the functional or operational aspects of the -Specifications. - -33. "*Research Use*" means use and distribution of Covered Code only for -Your Personal Use, research or development use and expressly excludes -Internal Deployment Use and Commercial Use. Research Use also includes -use of Covered Code to teach individuals how to use Covered Code. - -34. "*Shared Modifications*" means Modifications that You distribute or -use for a Commercial Use, in addition to any Modifications provided by -You, at Your option, pursuant to Section 2.2, or received by You from a -Contributor pursuant to Section 2.3. - -35. "*Source Code*" means the preferred form of the Covered Code for -making modifications to it, including all modules it contains, plus any -associated interface definition files, scripts used to control -compilation and installation of an Executable, or source code -differential comparisons against either the Original Code or another -well known, available Covered Code of the Contributor's choice. The -Source Code can be in a compressed or archival form, provided the -appropriate decompression or de-archiving software is widely available -for no charge. - -36. "*Specifications*" means the specifications for the Technology and -other documentation, as designated on the Community Web Server, as may -be revised by Original Contributor from time to time. - -37. "*Trademarks*" means Original Contributor's trademarks and logos, -including, but not limited to, RealNetworks, RealAudio, RealVideo, -RealOne, RealSystem, SureStream, Helix, Helix DNA and other trademarks -whether now used or adopted in the future. - -38. "*Technology*" means the technology described in Attachment B, and -Upgrades. - -39. "*Technology Compatibility Kit"* or *"TCK*" means the test programs, -procedures, acceptance criteria and/or other requirements, designated by -Original Contributor for use in verifying compliance of Covered Code -with the Specifications, in conjunction with the Original Code and -Upgraded Code. Original Contributor may, in its sole discretion and from -time to time, revise a TCK to correct errors and/or omissions and in -connection with Upgrades. - -40. "*Upgrade(s)"* means new versions of Technology designated -exclusively by Original Contributor as an "Upgrade" and released by -Original Contributor from time to time under the terms of the License. - -41. "*Upgraded Code*" means the Source Code and/or Executables for -Upgrades, possibly including Modifications made by Contributors. - -42. *"User's Guide"* means the users guide for the TCK which Original -Contributor makes available to You to provide direction in how to run -the TCK and properly interpret the results, as may be revised by -Original Contributor from time to time. - -43. "*You(r)*" means an individual, or a legal entity acting by and -through an individual or individuals, exercising rights either under -this License or under a future version of this License issued pursuant -to Section 4.1. For legal entities, "You(r)" includes any entity that by -majority voting interest controls, is controlled by, or is under common -control with You. - -44. "*Your Products*" means any (i) hardware products You distribute -integrating the Covered Code; (ii) any software products You distribute -with the Covered Code that utilize the APIs of the Covered Code; or -(iii) any services You provide using the Covered Code. - - - ATTACHMENT A - -REQUIRED NOTICES - - - ATTACHMENT A-1 - -REQUIRED IN ALL CASES - -Notice to be included in header file of all Error Corrections and Shared -Modifications: - -Portions Copyright 1994-2003 © RealNetworks, Inc. All rights reserved. - -The contents of this file, and the files included with this file, are -subject to the current version of RealNetworks Community Source License -Version 1.1 (the "License"). You may not use this file except in -compliance with the License executed by both You and RealNetworks. You -may obtain a copy of the License at * -https://www.helixcommunity.org/content/rcsl.* You may also obtain a copy -of the License by contacting RealNetworks directly. Please see the -License for the rights, obligations and limitations governing use of the -contents of the file. - -This file is part of the Helix DNA technology. RealNetworks, Inc., is -the developer of the Original code and owns the copyrights in the -portions it created. - -This file, and the files included with this file, are distributed on an -'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESS OR IMPLIED, -AND REALNETWORKS HEREBY DISCLAIMS ALL SUCH WARRANTIES, INCLUDING WITHOUT -LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR -PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT. - -Contributor(s): - -_______________________________________________ - -Technology Compatibility Kit Test Suite(s) Location: - -________________________________ - - - ATTACHMENT A-2 - -SAMPLE LICENSEE CERTIFICATION - -"By clicking the `Agree' button below, You certify that You are a -Licensee in good standing under the RealNetworks Community Source -License, ("License") and that Your access, use and distribution of code -and information You may obtain at this site is subject to the License. -If You are not a Licensee under the RealNetworks Community Source -License You agree not to download, copy or use the Helix DNA technology. - - - ATTACHMENT A-3 - -REQUIRED STUDENT NOTIFICATION - -"This software and related documentation has been obtained by Your -educational institution subject to the RealNetworks Community Source -License. You have been provided access to the software and related -documentation for use only in connection with your course work and -research activities as a matriculated student of Your educational -institution. Any other use is expressly prohibited. - -THIS SOFTWARE AND RELATED DOCUMENTATION CONTAINS PROPRIETARY MATERIAL OF -REALNETWORKS, INC, WHICH ARE PROTECTED BY VARIOUS INTELLECTUAL PROPERTY -RIGHTS. - -You may not use this file except in compliance with the License. You may -obtain a copy of the License on the web at -https://www.helixcommunity.org/content/rcsl. - -* -* - - - ATTACHMENT B - -Description of Technology - -Helix DNA, which consists of Helix DNA Client, Helix DNA Server and -Helix DNA Producer. - -Description of "Technology" - -Helix DNA Technology v1.0 as described on the Community Web Server. - - - ATTACHMENT C - -TECHNOLOGY COMPATIBILITY KIT LICENSE - -The following license is effective for the *Helix DNA* Technology -Compatibility Kit - as described on the Community Web Server. The -Technology Compatibility Kit(s) for the Technology specified in -Attachment B may be accessed at the Community Web Server. - -1. TCK License. - -1.1 Grants to use TCK - -Subject to the terms and restrictions set forth below and the -RealNetworks Community Source License, and the Research Use license, -Original Contributor grants to You a worldwide, non-exclusive, -non-transferable license, to the extent of Original Contributor's -Intellectual Property Rights in the TCK (without the right to -sublicense), to use the TCK to develop and test Covered Code. - -1.2 TCK Use Restrictions. - -You are not authorized to create derivative works of the TCK or use the -TCK to test any implementation of the Specification that is not Covered -Code. You may not publish Your test results or make claims of -comparative compatibility with respect to other implementations of the -Specification. In consideration for the license grant in Section 1.1 -above You agree not to develop Your own tests that are intended to -validate conformation with the Specification. - -2. Test Results. - -You agree to provide to Original Contributor or the third party test -facility if applicable, Your test results that demonstrate that Covered -Code is Compliant Covered Code and that Original Contributor may publish -or otherwise distribute such test results. - -PLEASE READ THE TERMS OF THIS LICENSE CAREFULLY. BY CLICKING ON THE -"ACCEPT" BUTTON BELOW YOU ARE ACCEPTING AND AGREEING TO THE TERMS AND -CONDITIONS OF THIS LICENSE WITH THE ORIGINAL CONTRIBUTOR, REALNETWORKS, -INC. IF YOU ARE AGREEING TO THIS LICENSE ON BEHALF OF A COMPANY, YOU -REPRESENT THAT YOU ARE AUTHORIZED TO BIND THE COMPANY TO SUCH A LICENSE. -WHETHER YOU ARE ACTING ON YOUR OWN BEHALF, OR REPRESENTING A COMPANY, -YOU MUST BE OF MAJORITY AGE AND BE OTHERWISE COMPETENT TO ENTER INTO -CONTRACTS. IF YOU DO NOT MEET THIS CRITERIA OR YOU DO NOT AGREE TO ANY -OF THE TERMS AND CONDITIONS OF THIS LICENSE, CLICK ON THE REJECT BUTTON -TO EXIT. - -*ACCEPT / REJECT -* - -* -* - -*To agree to the R&D/academic terms of this license, please register - on the site -- -you will then be given a chance to agree to the clickwrap RCSL - -R&D License - -and gain access to the RCSL-licensed source code. To build or deploy -commercial applications based on the RCSL, you will need to agree to the -Commercial Use license attachments -* - - - diff --git a/bsp/stm32_radio/mp3/real/projects/visualc/RPSL.txt b/bsp/stm32_radio/mp3/real/projects/visualc/RPSL.txt deleted file mode 100644 index d040a45205..0000000000 --- a/bsp/stm32_radio/mp3/real/projects/visualc/RPSL.txt +++ /dev/null @@ -1,518 +0,0 @@ -RealNetworks Public Source License Version 1.0 -(Rev. Date October 28, 2002) - -1. General Definitions. This License applies to any program or other work which -RealNetworks, Inc., or any other entity that elects to use this license, -("Licensor") makes publicly available and which contains a notice placed by -Licensor identifying such program or work as "Original Code" and stating that it -is subject to the terms of this RealNetworks Public Source License version 1.0 -(or subsequent version thereof) ("License"). You are not required to accept this -License. However, nothing else grants You permission to use, copy, modify or -distribute the software or its derivative works. These actions are prohibited by -law if You do not accept this License. Therefore, by modifying, copying or -distributing the software (or any work based on the software), You indicate your -acceptance of this License to do so, and all its terms and conditions. In -addition, you agree to the terms of this License by clicking the Accept button -or downloading the software. As used in this License: - -1.1 "Applicable Patent Rights" mean: (a) in the case where Licensor is the -grantor of rights, claims of patents that (i) are now or hereafter acquired, -owned by or assigned to Licensor and (ii) are necessarily infringed by using or -making the Original Code alone and not in combination with other software or -hardware; and (b) in the case where You are the grantor of rights, claims of -patents that (i) are now or hereafter acquired, owned by or assigned to You and -(ii) are infringed (directly or indirectly) by using or making Your -Modifications, taken alone or in combination with Original Code. - -1.2 "Compatible Source License" means any one of the licenses listed on Exhibit -B or at https://www.helixcommunity.org/content/complicense or other licenses -specifically identified by Licensor in writing. Notwithstanding any term to the -contrary in any Compatible Source License, any code covered by any Compatible -Source License that is used with Covered Code must be made readily available in -Source Code format for royalty-free use under the terms of the Compatible Source -License or this License. - -1.3 "Contributor" means any person or entity that creates or contributes to the -creation of Modifications. - -1.4 "Covered Code" means the Original Code, Modifications, the combination of -Original Code and any Modifications, and/or any respective portions thereof. - -1.5 "Deploy" means to use, sublicense or distribute Covered Code other than for -Your internal research and development (R&D) and/or Personal Use, and includes -without limitation, any and all internal use or distribution of Covered Code -within Your business or organization except for R&D use and/or Personal Use, as -well as direct or indirect sublicensing or distribution of Covered Code by You -to any third party in any form or manner. - -1.6 "Derivative Work" means either the Covered Code or any derivative work under -United States copyright law, and including any work containing or including any -portion of the Covered Code or Modifications, either verbatim or with -modifications and/or translated into another language. Derivative Work also -includes any work which combines any portion of Covered Code or Modifications -with code not otherwise governed by the terms of this License. - -1.7 "Externally Deploy" means to Deploy the Covered Code in any way that may be -accessed or used by anyone other than You, used to provide any services to -anyone other than You, or used in any way to deliver any content to anyone other -than You, whether the Covered Code is distributed to those parties, made -available as an application intended for use over a computer network, or used to -provide services or otherwise deliver content to anyone other than You. - -1.8. "Interface" means interfaces, functions, properties, class definitions, -APIs, header files, GUIDs, V-Tables, and/or protocols allowing one piece of -software, firmware or hardware to communicate or interoperate with another piece -of software, firmware or hardware. - -1.9 "Modifications" mean any addition to, deletion from, and/or change to, the -substance and/or structure of the Original Code, any previous Modifications, the -combination of Original Code and any previous Modifications, and/or any -respective portions thereof. When code is released as a series of files, a -Modification is: (a) any addition to or deletion from the contents of a file -containing Covered Code; and/or (b) any new file or other representation of -computer program statements that contains any part of Covered Code. - -1.10 "Original Code" means (a) the Source Code of a program or other work as -originally made available by Licensor under this License, including the Source -Code of any updates or upgrades to such programs or works made available by -Licensor under this License, and that has been expressly identified by Licensor -as such in the header file(s) of such work; and (b) the object code compiled -from such Source Code and originally made available by Licensor under this -License. - -1.11 "Personal Use" means use of Covered Code by an individual solely for his or -her personal, private and non-commercial purposes. An individual's use of -Covered Code in his or her capacity as an officer, employee, member, independent -contractor or agent of a corporation, business or organization (commercial or -non-commercial) does not qualify as Personal Use. - -1.12 "Source Code" means the human readable form of a program or other work that -is suitable for making modifications to it, including all modules it contains, -plus any associated interface definition files, scripts used to control -compilation and installation of an executable (object code). - -1.13 "You" or "Your" means an individual or a legal entity exercising rights -under this License. For legal entities, "You" or "Your" includes any entity -which controls, is controlled by, or is under common control with, You, where -"control" means (a) the power, direct or indirect, to cause the direction or -management of such entity, whether by contract or otherwise, or (b) ownership of -fifty percent (50%) or more of the outstanding shares or beneficial ownership of -such entity. - -2. Permitted Uses; Conditions & Restrictions. Subject to the terms and -conditions of this License, Licensor hereby grants You, effective on the date -You accept this License (via downloading or using Covered Code or otherwise -indicating your acceptance of this License), a worldwide, royalty-free, -non-exclusive copyright license, to the extent of Licensor's copyrights cover -the Original Code, to do the following: - -2.1 You may reproduce, display, perform, modify and Deploy Covered Code, -provided that in each instance: - -(a) You must retain and reproduce in all copies of Original Code the copyright -and other proprietary notices and disclaimers of Licensor as they appear in the -Original Code, and keep intact all notices in the Original Code that refer to -this License; - -(b) You must include a copy of this License with every copy of Source Code of -Covered Code and documentation You distribute, and You may not offer or impose -any terms on such Source Code that alter or restrict this License or the -recipients' rights hereunder, except as permitted under Section 6; - -(c) You must duplicate, to the extent it does not already exist, the notice in -Exhibit A in each file of the Source Code of all Your Modifications, and cause -the modified files to carry prominent notices stating that You changed the files -and the date of any change; - -(d) You must make Source Code of all Your Externally Deployed Modifications -publicly available under the terms of this License, including the license grants -set forth in Section 3 below, for as long as you Deploy the Covered Code or -twelve (12) months from the date of initial Deployment, whichever is longer. You -should preferably distribute the Source Code of Your Deployed Modifications -electronically (e.g. download from a web site); and - -(e) if You Deploy Covered Code in object code, executable form only, You must -include a prominent notice, in the code itself as well as in related -documentation, stating that Source Code of the Covered Code is available under -the terms of this License with information on how and where to obtain such -Source Code. You must also include the Object Code Notice set forth in Exhibit A -in the "about" box or other appropriate place where other copyright notices are -placed, including any packaging materials. - -2.2 You expressly acknowledge and agree that although Licensor and each -Contributor grants the licenses to their respective portions of the Covered Code -set forth herein, no assurances are provided by Licensor or any Contributor that -the Covered Code does not infringe the patent or other intellectual property -rights of any other entity. Licensor and each Contributor disclaim any liability -to You for claims brought by any other entity based on infringement of -intellectual property rights or otherwise. As a condition to exercising the -rights and licenses granted hereunder, You hereby assume sole responsibility to -secure any other intellectual property rights needed, if any. For example, if a -third party patent license is required to allow You to make, use, sell, import -or offer for sale the Covered Code, it is Your responsibility to acquire such -license(s). - -2.3 Subject to the terms and conditions of this License, Licensor hereby grants -You, effective on the date You accept this License (via downloading or using -Covered Code or otherwise indicating your acceptance of this License), a -worldwide, royalty-free, perpetual, non-exclusive patent license under -Licensor's Applicable Patent Rights to make, use, sell, offer for sale and -import the Covered Code, provided that in each instance you comply with the -terms of this License. - -3. Your Grants. In consideration of, and as a condition to, the licenses granted -to You under this License: - -(a) You grant to Licensor and all third parties a non-exclusive, perpetual, -irrevocable, royalty free license under Your Applicable Patent Rights and other -intellectual property rights owned or controlled by You, to make, sell, offer -for sale, use, import, reproduce, display, perform, modify, distribute and -Deploy Your Modifications of the same scope and extent as Licensor's licenses -under Sections 2.1 and 2.2; and - -(b) You grant to Licensor and its subsidiaries a non-exclusive, worldwide, -royalty-free, perpetual and irrevocable license, under Your Applicable Patent -Rights and other intellectual property rights owned or controlled by You, to -make, use, sell, offer for sale, import, reproduce, display, perform, -distribute, modify or have modified (for Licensor and/or its subsidiaries), -sublicense and distribute Your Modifications, in any form and for any purpose, -through multiple tiers of distribution. - -(c) You agree not use any information derived from Your use and review of the -Covered Code, including but not limited to any algorithms or inventions that may -be contained in the Covered Code, for the purpose of asserting any of Your -patent rights, or assisting a third party to assert any of its patent rights, -against Licensor or any Contributor. - -4. Derivative Works. You may create a Derivative Work by combining Covered Code -with other code not otherwise governed by the terms of this License and -distribute the Derivative Work as an integrated product. In each such instance, -You must make sure the requirements of this License are fulfilled for the -Covered Code or any portion thereof, including all Modifications. - -4.1 You must cause any Derivative Work that you distribute, publish or -Externally Deploy, that in whole or in part contains or is derived from the -Covered Code or any part thereof, to be licensed as a whole at no charge to all -third parties under the terms of this License and no other license except as -provided in Section 4.2. You also must make Source Code available for the -Derivative Work under the same terms as Modifications, described in Sections 2 -and 3, above. - -4.2 Compatible Source Licenses. Software modules that have been independently -developed without any use of Covered Code and which contain no portion of the -Covered Code, Modifications or other Derivative Works, but are used or combined -in any way wtih the Covered Code or any Derivative Work to form a larger -Derivative Work, are exempt from the conditions described in Section 4.1 but -only to the extent that: the software module, including any software that is -linked to, integrated with, or part of the same applications as, the software -module by any method must be wholly subject to one of the Compatible Source -Licenses. Notwithstanding the foregoing, all Covered Code must be subject to the -terms of this License. Thus, the entire Derivative Work must be licensed under a -combination of the RPSL (for Covered Code) and a Compatible Source License for -any independently developed software modules within the Derivative Work. The -foregoing requirement applies even if the Compatible Source License would -ordinarily allow the software module to link with, or form larger works with, -other software that is not subject to the Compatible Source License. For -example, although the Mozilla Public License v1.1 allows Mozilla code to be -combined with proprietary software that is not subject to the MPL, if -MPL-licensed code is used with Covered Code the MPL-licensed code could not be -combined or linked with any code not governed by the MPL. The general intent of -this section 4.2 is to enable use of Covered Code with applications that are -wholly subject to an acceptable open source license. You are responsible for -determining whether your use of software with Covered Code is allowed under Your -license to such software. - -4.3 Mere aggregation of another work not based on the Covered Code with the -Covered Code (or with a work based on the Covered Code) on a volume of a storage -or distribution medium does not bring the other work under the scope of this -License. If You deliver the Covered Code for combination and/or integration with -an application previously provided by You (for example, via automatic updating -technology), such combination and/or integration constitutes a Derivative Work -subject to the terms of this License. - -5. Exclusions From License Grant. Nothing in this License shall be deemed to -grant any rights to trademarks, copyrights, patents, trade secrets or any other -intellectual property of Licensor or any Contributor except as expressly stated -herein. No right is granted to the trademarks of Licensor or any Contributor -even if such marks are included in the Covered Code. Nothing in this License -shall be interpreted to prohibit Licensor from licensing under different terms -from this License any code that Licensor otherwise would have a right to -license. Modifications, Derivative Works and/or any use or combination of -Covered Code with other technology provided by Licensor or third parties may -require additional patent licenses from Licensor which Licensor may grant in its -sole discretion. No patent license is granted separate from the Original Code or -combinations of the Original Code with other software or hardware. - -5.1. Trademarks. This License does not grant any rights to use the trademarks or -trade names owned by Licensor ("Licensor Marks" defined in Exhibit C) or to any -trademark or trade name belonging to any Contributor. No Licensor Marks may be -used to endorse or promote products derived from the Original Code other than as -permitted by the Licensor Trademark Policy defined in Exhibit C. - -6. Additional Terms. You may choose to offer, and to charge a fee for, warranty, -support, indemnity or liability obligations and/or other rights consistent with -the scope of the license granted herein ("Additional Terms") to one or more -recipients of Covered Code. However, You may do so only on Your own behalf and -as Your sole responsibility, and not on behalf of Licensor or any Contributor. -You must obtain the recipient's agreement that any such Additional Terms are -offered by You alone, and You hereby agree to indemnify, defend and hold -Licensor and every Contributor harmless for any liability incurred by or claims -asserted against Licensor or such Contributor by reason of any such Additional -Terms. - -7. Versions of the License. Licensor may publish revised and/or new versions of -this License from time to time. Each version will be given a distinguishing -version number. Once Original Code has been published under a particular version -of this License, You may continue to use it under the terms of that version. You -may also choose to use such Original Code under the terms of any subsequent -version of this License published by Licensor. No one other than Licensor has -the right to modify the terms applicable to Covered Code created under this -License. - -8. NO WARRANTY OR SUPPORT. The Covered Code may contain in whole or in part -pre-release, untested, or not fully tested works. The Covered Code may contain -errors that could cause failures or loss of data, and may be incomplete or -contain inaccuracies. You expressly acknowledge and agree that use of the -Covered Code, or any portion thereof, is at Your sole and entire risk. THE -COVERED CODE IS PROVIDED "AS IS" AND WITHOUT WARRANTY, UPGRADES OR SUPPORT OF -ANY KIND AND LICENSOR AND LICENSOR'S LICENSOR(S) (COLLECTIVELY REFERRED TO AS -"LICENSOR" FOR THE PURPOSES OF SECTIONS 8 AND 9) AND ALL CONTRIBUTORS EXPRESSLY -DISCLAIM ALL WARRANTIES AND/OR CONDITIONS, EXPRESS OR IMPLIED, INCLUDING, BUT -NOT LIMITED TO, THE IMPLIED WARRANTIES AND/OR CONDITIONS OF MERCHANTABILITY, OF -SATISFACTORY QUALITY, OF FITNESS FOR A PARTICULAR PURPOSE, OF ACCURACY, OF QUIET -ENJOYMENT, AND NONINFRINGEMENT OF THIRD PARTY RIGHTS. LICENSOR AND EACH -CONTRIBUTOR DOES NOT WARRANT AGAINST INTERFERENCE WITH YOUR ENJOYMENT OF THE -COVERED CODE, THAT THE FUNCTIONS CONTAINED IN THE COVERED CODE WILL MEET YOUR -REQUIREMENTS, THAT THE OPERATION OF THE COVERED CODE WILL BE UNINTERRUPTED OR -ERROR-FREE, OR THAT DEFECTS IN THE COVERED CODE WILL BE CORRECTED. NO ORAL OR -WRITTEN DOCUMENTATION, INFORMATION OR ADVICE GIVEN BY LICENSOR, A LICENSOR -AUTHORIZED REPRESENTATIVE OR ANY CONTRIBUTOR SHALL CREATE A WARRANTY. You -acknowledge that the Covered Code is not intended for use in high risk -activities, including, but not limited to, the design, construction, operation -or maintenance of nuclear facilities, aircraft navigation, aircraft -communication systems, or air traffic control machines in which case the failure -of the Covered Code could lead to death, personal injury, or severe physical or -environmental damage. Licensor disclaims any express or implied warranty of -fitness for such uses. - -9. LIMITATION OF LIABILITY. TO THE EXTENT NOT PROHIBITED BY LAW, IN NO EVENT -SHALL LICENSOR OR ANY CONTRIBUTOR BE LIABLE FOR ANY INCIDENTAL, SPECIAL, -INDIRECT OR CONSEQUENTIAL DAMAGES ARISING OUT OF OR RELATING TO THIS LICENSE OR -YOUR USE OR INABILITY TO USE THE COVERED CODE, OR ANY PORTION THEREOF, WHETHER -UNDER A THEORY OF CONTRACT, WARRANTY, TORT (INCLUDING NEGLIGENCE OR STRICT -LIABILITY), PRODUCTS LIABILITY OR OTHERWISE, EVEN IF LICENSOR OR SUCH -CONTRIBUTOR HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES AND -NOTWITHSTANDING THE FAILURE OF ESSENTIAL PURPOSE OF ANY REMEDY. SOME -JURISDICTIONS DO NOT ALLOW THE LIMITATION OF LIABILITY OF INCIDENTAL OR -CONSEQUENTIAL DAMAGES, SO THIS LIMITATION MAY NOT APPLY TO YOU. In no event -shall Licensor's total liability to You for all damages (other than as may be -required by applicable law) under this License exceed the amount of ten dollars -($10.00). - -10. Ownership. Subject to the licenses granted under this License, each -Contributor retains all rights, title and interest in and to any Modifications -made by such Contributor. Licensor retains all rights, title and interest in and -to the Original Code and any Modifications made by or on behalf of Licensor -("Licensor Modifications"), and such Licensor Modifications will not be -automatically subject to this License. Licensor may, at its sole discretion, -choose to license such Licensor Modifications under this License, or on -different terms from those contained in this License or may choose not to -license them at all. - -11. Termination. - -11.1 Term and Termination. The term of this License is perpetual unless -terminated as provided below. This License and the rights granted hereunder will -terminate: - -(a) automatically without notice from Licensor if You fail to comply with any -term(s) of this License and fail to cure such breach within 30 days of becoming -aware of such breach; - -(b) immediately in the event of the circumstances described in Section 12.5(b); -or - -(c) automatically without notice from Licensor if You, at any time during the -term of this License, commence an action for patent infringement against -Licensor (including by cross-claim or counter claim in a lawsuit); - -(d) upon written notice from Licensor if You, at any time during the term of -this License, commence an action for patent infringement against any third party -alleging that the Covered Code itself (excluding combinations with other -software or hardware) infringes any patent (including by cross-claim or counter -claim in a lawsuit). - -11.2 Effect of Termination. Upon termination, You agree to immediately stop any -further use, reproduction, modification, sublicensing and distribution of the -Covered Code and to destroy all copies of the Covered Code that are in your -possession or control. All sublicenses to the Covered Code which have been -properly granted prior to termination shall survive any termination of this -License. Provisions which, by their nature, should remain in effect beyond the -termination of this License shall survive, including but not limited to Sections -3, 5, 8, 9, 10, 11, 12.2 and 13. No party will be liable to any other for -compensation, indemnity or damages of any sort solely as a result of terminating -this License in accordance with its terms, and termination of this License will -be without prejudice to any other right or remedy of any party. - -12. Miscellaneous. - -12.1 Government End Users. The Covered Code is a "commercial item" as defined in -FAR 2.101. Government software and technical data rights in the Covered Code -include only those rights customarily provided to the public as defined in this -License. This customary commercial license in technical data and software is -provided in accordance with FAR 12.211 (Technical Data) and 12.212 (Computer -Software) and, for Department of Defense purchases, DFAR 252.227-7015 (Technical -Data -- Commercial Items) and 227.7202-3 (Rights in Commercial Computer Software -or Computer Software Documentation). Accordingly, all U.S. Government End Users -acquire Covered Code with only those rights set forth herein. - -12.2 Relationship of Parties. This License will not be construed as creating an -agency, partnership, joint venture or any other form of legal association -between or among You, Licensor or any Contributor, and You will not represent to -the contrary, whether expressly, by implication, appearance or otherwise. - -12.3 Independent Development. Nothing in this License will impair Licensor's -right to acquire, license, develop, have others develop for it, market and/or -distribute technology or products that perform the same or similar functions as, -or otherwise compete with, Modifications, Derivative Works, technology or -products that You may develop, produce, market or distribute. - -12.4 Waiver; Construction. Failure by Licensor or any Contributor to enforce any -provision of this License will not be deemed a waiver of future enforcement of -that or any other provision. Any law or regulation which provides that the -language of a contract shall be construed against the drafter will not apply to -this License. - -12.5 Severability. (a) If for any reason a court of competent jurisdiction finds -any provision of this License, or portion thereof, to be unenforceable, that -provision of the License will be enforced to the maximum extent permissible so -as to effect the economic benefits and intent of the parties, and the remainder -of this License will continue in full force and effect. (b) Notwithstanding the -foregoing, if applicable law prohibits or restricts You from fully and/or -specifically complying with Sections 2 and/or 3 or prevents the enforceability -of either of those Sections, this License will immediately terminate and You -must immediately discontinue any use of the Covered Code and destroy all copies -of it that are in your possession or control. - -12.6 Dispute Resolution. Any litigation or other dispute resolution between You -and Licensor relating to this License shall take place in the Seattle, -Washington, and You and Licensor hereby consent to the personal jurisdiction of, -and venue in, the state and federal courts within that District with respect to -this License. The application of the United Nations Convention on Contracts for -the International Sale of Goods is expressly excluded. - -12.7 Export/Import Laws. This software is subject to all export and import laws -and restrictions and regulations of the country in which you receive the Covered -Code and You are solely responsible for ensuring that You do not export, -re-export or import the Covered Code or any direct product thereof in violation -of any such restrictions, laws or regulations, or without all necessary -authorizations. - -12.8 Entire Agreement; Governing Law. This License constitutes the entire -agreement between the parties with respect to the subject matter hereof. This -License shall be governed by the laws of the United States and the State of -Washington. - -Where You are located in the province of Quebec, Canada, the following clause -applies: The parties hereby confirm that they have requested that this License -and all related documents be drafted in English. Les parties ont exigé -que le présent contrat et tous les documents connexes soient -rédigés en anglais. - - EXHIBIT A. - -"Copyright © 1995-2002 -RealNetworks, Inc. and/or its licensors. All Rights Reserved. - -The contents of this file, and the files included with this file, are subject to -the current version of the RealNetworks Public Source License Version 1.0 (the -"RPSL") available at https://www.helixcommunity.org/content/rpsl unless you have -licensed the file under the RealNetworks Community Source License Version 1.0 -(the "RCSL") available at https://www.helixcommunity.org/content/rcsl, in which -case the RCSL will apply. You may also obtain the license terms directly from -RealNetworks. You may not use this file except in compliance with the RPSL or, -if you have a valid RCSL with RealNetworks applicable to this file, the RCSL. -Please see the applicable RPSL or RCSL for the rights, obligations and -limitations governing use of the contents of the file. - -This file is part of the Helix DNA Technology. RealNetworks is the developer of -the Original code and owns the copyrights in the portions it created. - -This file, and the files included with this file, is distributed and made -available on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESS OR -IMPLIED, AND REALNETWORKS HEREBY DISCLAIMS ALL SUCH WARRANTIES, INCLUDING -WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR -PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT. - -Contributor(s): ____________________________________ - -Technology Compatibility Kit Test -Suite(s) Location (if licensed under the RCSL): ______________________________ - -Object Code Notice: Helix DNA Client technology included. Copyright (c) -RealNetworks, Inc., 1995-2002. All rights reserved. - - - EXHIBIT B - -Compatible Source Licenses for the RealNetworks Public Source License. The -following list applies to the most recent version of the license as of October -25, 2002, unless otherwise indicated. - -* Academic Free License -* Apache Software License -* Apple Public Source License -* Artistic license -* Attribution Assurance Licenses -* BSD license -* Common Public License (1) -* Eiffel Forum License -* GNU General Public License (GPL) (1) -* GNU Library or "Lesser" General Public License (LGPL) (1) -* IBM Public License -* Intel Open Source License -* Jabber Open Source License -* MIT license -* MITRE Collaborative Virtual Workspace License (CVW License) -* Motosoto License -* Mozilla Public License 1.0 (MPL) -* Mozilla Public License 1.1 (MPL) -* Nokia Open Source License -* Open Group Test Suite License -* Python Software Foundation License -* Ricoh Source Code Public License -* Sun Industry Standards Source License (SISSL) -* Sun Public License -* University of Illinois/NCSA Open Source License -* Vovida Software License v. 1.0 -* W3C License -* X.Net License -* Zope Public License -* zlib/libpng license - -(1) Note: because this license contains certain reciprocal licensing terms that -purport to extend to independently developed code, You may be prohibited under -the terms of this otherwise compatible license from using code licensed under -its terms with Covered Code because Covered Code may only be licensed under the -RealNetworks Public Source License. Any attempt to apply non RPSL license terms, -including without limitation the GPL, to Covered Code is expressly forbidden. -You are responsible for ensuring that Your use of Compatible Source Licensed -code does not violate either the RPSL or the Compatible Source License. - -The latest version of this list can be found at: -https://www.helixcommunity.org/content/complicense - - EXHIBIT C - -RealNetworks' Trademark policy. - -RealNetworks defines the following trademarks collectively as "Licensor -Trademarks": "RealNetworks", "RealPlayer", "RealJukebox", "RealSystem", -"RealAudio", "RealVideo", "RealOne Player", "RealMedia", "Helix" or any other -trademarks or trade names belonging to RealNetworks. - -RealNetworks "Licensor Trademark Policy" forbids any use of Licensor Trademarks -except as permitted by and in strict compliance at all times with RealNetworks' -third party trademark usage guidelines which are posted at -http://www.realnetworks.com/info/helixlogo.html. - diff --git a/bsp/stm32_radio/mp3/real/projects/visualc/mp3dec.dsp b/bsp/stm32_radio/mp3/real/projects/visualc/mp3dec.dsp deleted file mode 100644 index f6b3bd9b11..0000000000 --- a/bsp/stm32_radio/mp3/real/projects/visualc/mp3dec.dsp +++ /dev/null @@ -1,158 +0,0 @@ -# Microsoft Developer Studio Project File - Name="mp3dec" - Package Owner=<4> -# Microsoft Developer Studio Generated Build File, Format Version 6.00 -# ** DO NOT EDIT ** - -# TARGTYPE "Win32 (x86) Static Library" 0x0104 - -CFG=mp3dec - Win32 Debug -!MESSAGE This is not a valid makefile. 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All Rights Reserved. - * - * The contents of this file, and the files included with this file, are - * subject to the current version of the RealNetworks Public Source License - * Version 1.0 (the "RPSL") available at - * http://www.helixcommunity.org/content/rpsl unless you have licensed - * the file under the RealNetworks Community Source License Version 1.0 - * (the "RCSL") available at http://www.helixcommunity.org/content/rcsl, - * in which case the RCSL will apply. You may also obtain the license terms - * directly from RealNetworks. You may not use this file except in - * compliance with the RPSL or, if you have a valid RCSL with RealNetworks - * applicable to this file, the RCSL. Please see the applicable RPSL or - * RCSL for the rights, obligations and limitations governing use of the - * contents of the file. - * - * This file is part of the Helix DNA Technology. RealNetworks is the - * developer of the Original Code and owns the copyrights in the portions - * it created. - * - * This file, and the files included with this file, is distributed and made - * available on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER - * EXPRESS OR IMPLIED, AND REALNETWORKS HEREBY DISCLAIMS ALL SUCH WARRANTIES, - * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, FITNESS - * FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT. - * - * Technology Compatibility Kit Test Suite(s) Location: - * http://www.helixcommunity.org/content/tck - * - * Contributor(s): - * - * ***** END LICENSE BLOCK ***** */ - -/************************************************************************************** - * Fixed-point MP3 decoder - * Jon Recker (jrecker@real.com), Ken Cooke (kenc@real.com) - * June 2003 - * - * scalfact.c - scalefactor unpacking functions - **************************************************************************************/ - -#include "coder.h" - -/* scale factor lengths (num bits) */ -static const char SFLenTab[16][2] = { - {0, 0}, {0, 1}, - {0, 2}, {0, 3}, - {3, 0}, {1, 1}, - {1, 2}, {1, 3}, - {2, 1}, {2, 2}, - {2, 3}, {3, 1}, - {3, 2}, {3, 3}, - {4, 2}, {4, 3}, -}; - -/************************************************************************************** - * Function: UnpackSFMPEG1 - * - * Description: unpack MPEG 1 scalefactors from bitstream - * - * Inputs: BitStreamInfo, SideInfoSub, ScaleFactorInfoSub structs for this - * granule/channel - * vector of scfsi flags from side info, length = 4 (MAX_SCFBD) - * index of current granule - * ScaleFactorInfoSub from granule 0 (for granule 1, if scfsi[i] is set, - * then we just replicate the scale factors from granule 0 in the - * i'th set of scalefactor bands) - * - * Outputs: updated BitStreamInfo struct - * scalefactors in sfis (short and/or long arrays, as appropriate) - * - * Return: none - * - * Notes: set order of short blocks to s[band][window] instead of s[window][band] - * so that we index through consectutive memory locations when unpacking - * (make sure dequantizer follows same convention) - * Illegal Intensity Position = 7 (always) for MPEG1 scale factors - **************************************************************************************/ -static void UnpackSFMPEG1(BitStreamInfo *bsi, SideInfoSub *sis, ScaleFactorInfoSub *sfis, int *scfsi, int gr, ScaleFactorInfoSub *sfisGr0) -{ - int sfb; - int slen0, slen1; - - /* these can be 0, so make sure GetBits(bsi, 0) returns 0 (no >> 32 or anything) */ - slen0 = (int)SFLenTab[sis->sfCompress][0]; - slen1 = (int)SFLenTab[sis->sfCompress][1]; - - if (sis->blockType == 2) { - /* short block, type 2 (implies winSwitchFlag == 1) */ - if (sis->mixedBlock) { - /* do long block portion */ - for (sfb = 0; sfb < 8; sfb++) - sfis->l[sfb] = (char)GetBits(bsi, slen0); - sfb = 3; - } else { - /* all short blocks */ - sfb = 0; - } - - for ( ; sfb < 6; sfb++) { - sfis->s[sfb][0] = (char)GetBits(bsi, slen0); - sfis->s[sfb][1] = (char)GetBits(bsi, slen0); - sfis->s[sfb][2] = (char)GetBits(bsi, slen0); - } - - for ( ; sfb < 12; sfb++) { - sfis->s[sfb][0] = (char)GetBits(bsi, slen1); - sfis->s[sfb][1] = (char)GetBits(bsi, slen1); - sfis->s[sfb][2] = (char)GetBits(bsi, slen1); - } - - /* last sf band not transmitted */ - sfis->s[12][0] = sfis->s[12][1] = sfis->s[12][2] = 0; - } else { - /* long blocks, type 0, 1, or 3 */ - if(gr == 0) { - /* first granule */ - for (sfb = 0; sfb < 11; sfb++) - sfis->l[sfb] = (char)GetBits(bsi, slen0); - for (sfb = 11; sfb < 21; sfb++) - sfis->l[sfb] = (char)GetBits(bsi, slen1); - return; - } else { - /* second granule - * scfsi: 0 = different scalefactors for each granule, 1 = copy sf's from granule 0 into granule 1 - * for block type == 2, scfsi is always 0 - */ - sfb = 0; - if(scfsi[0]) for( ; sfb < 6 ; sfb++) sfis->l[sfb] = sfisGr0->l[sfb]; - else for( ; sfb < 6 ; sfb++) sfis->l[sfb] = (char)GetBits(bsi, slen0); - if(scfsi[1]) for( ; sfb <11 ; sfb++) sfis->l[sfb] = sfisGr0->l[sfb]; - else for( ; sfb <11 ; sfb++) sfis->l[sfb] = (char)GetBits(bsi, slen0); - if(scfsi[2]) for( ; sfb <16 ; sfb++) sfis->l[sfb] = sfisGr0->l[sfb]; - else for( ; sfb <16 ; sfb++) sfis->l[sfb] = (char)GetBits(bsi, slen1); - if(scfsi[3]) for( ; sfb <21 ; sfb++) sfis->l[sfb] = sfisGr0->l[sfb]; - else for( ; sfb <21 ; sfb++) sfis->l[sfb] = (char)GetBits(bsi, slen1); - } - /* last sf band not transmitted */ - sfis->l[21] = 0; - sfis->l[22] = 0; - } -} - -/* NRTab[size + 3*is_right][block type][partition] - * block type index: 0 = (bt0,bt1,bt3), 1 = bt2 non-mixed, 2 = bt2 mixed - * partition: scale factor groups (sfb1 through sfb4) - * for block type = 2 (mixed or non-mixed) / by 3 is rolled into this table - * (for 3 short blocks per long block) - * see 2.4.3.2 in MPEG 2 (low sample rate) spec - * stuff rolled into this table: - * NRTab[x][1][y] --> (NRTab[x][1][y]) / 3 - * NRTab[x][2][>=1] --> (NRTab[x][2][>=1]) / 3 (first partition is long block) - */ -static const char NRTab[6][3][4] = { - /* non-intensity stereo */ - { {6, 5, 5, 5}, - {3, 3, 3, 3}, /* includes / 3 */ - {6, 3, 3, 3}, /* includes / 3 except for first entry */ - }, - { {6, 5, 7, 3}, - {3, 3, 4, 2}, - {6, 3, 4, 2}, - }, - { {11, 10, 0, 0}, - {6, 6, 0, 0}, - {6, 3, 6, 0}, /* spec = [15,18,0,0], but 15 = 6L + 9S, so move 9/3=3 into col 1, 18/3=6 into col 2 and adj. slen[1,2] below */ - }, - /* intensity stereo, right chan */ - { {7, 7, 7, 0}, - {4, 4, 4, 0}, - {6, 5, 4, 0}, - }, - { {6, 6, 6, 3}, - {4, 3, 3, 2}, - {6, 4, 3, 2}, - }, - { {8, 8, 5, 0}, - {5, 4, 3, 0}, - {6, 6, 3, 0}, - } -}; - -/************************************************************************************** - * Function: UnpackSFMPEG2 - * - * Description: unpack MPEG 2 scalefactors from bitstream - * - * Inputs: BitStreamInfo, SideInfoSub, ScaleFactorInfoSub structs for this - * granule/channel - * index of current granule and channel - * ScaleFactorInfoSub from this granule - * modeExt field from frame header, to tell whether intensity stereo is on - * ScaleFactorJS struct for storing IIP info used in Dequant() - * - * Outputs: updated BitStreamInfo struct - * scalefactors in sfis (short and/or long arrays, as appropriate) - * updated intensityScale and preFlag flags - * - * Return: none - * - * Notes: Illegal Intensity Position = (2^slen) - 1 for MPEG2 scale factors - * - * TODO: optimize the / and % stuff (only do one divide, get modulo x - * with (x / m) * m, etc.) - **************************************************************************************/ -static void UnpackSFMPEG2(BitStreamInfo *bsi, SideInfoSub *sis, ScaleFactorInfoSub *sfis, int gr, int ch, int modeExt, ScaleFactorJS *sfjs) -{ - - int i, sfb, sfcIdx, btIdx, nrIdx, iipTest; - int slen[4], nr[4]; - int sfCompress, preFlag, intensityScale; - - sfCompress = sis->sfCompress; - preFlag = 0; - intensityScale = 0; - - /* stereo mode bits (1 = on): bit 1 = mid-side on/off, bit 0 = intensity on/off */ - if (! ((modeExt & 0x01) && (ch == 1)) ) { - /* in other words: if ((modeExt & 0x01) == 0 || ch == 0) */ - if (sfCompress < 400) { - /* max slen = floor[(399/16) / 5] = 4 */ - slen[0] = (sfCompress >> 4) / 5; - slen[1]= (sfCompress >> 4) % 5; - slen[2]= (sfCompress & 0x0f) >> 2; - slen[3]= (sfCompress & 0x03); - sfcIdx = 0; - } else if (sfCompress < 500) { - /* max slen = floor[(99/4) / 5] = 4 */ - sfCompress -= 400; - slen[0] = (sfCompress >> 2) / 5; - slen[1]= (sfCompress >> 2) % 5; - slen[2]= (sfCompress & 0x03); - slen[3]= 0; - sfcIdx = 1; - } else { - /* max slen = floor[11/3] = 3 (sfCompress = 9 bits in MPEG2) */ - sfCompress -= 500; - slen[0] = sfCompress / 3; - slen[1] = sfCompress % 3; - slen[2] = slen[3] = 0; - if (sis->mixedBlock) { - /* adjust for long/short mix logic (see comment above in NRTab[] definition) */ - slen[2] = slen[1]; - slen[1] = slen[0]; - } - preFlag = 1; - sfcIdx = 2; - } - } else { - /* intensity stereo ch = 1 (right) */ - intensityScale = sfCompress & 0x01; - sfCompress >>= 1; - if (sfCompress < 180) { - /* max slen = floor[35/6] = 5 (from mod 36) */ - slen[0] = (sfCompress / 36); - slen[1] = (sfCompress % 36) / 6; - slen[2] = (sfCompress % 36) % 6; - slen[3] = 0; - sfcIdx = 3; - } else if (sfCompress < 244) { - /* max slen = floor[63/16] = 3 */ - sfCompress -= 180; - slen[0] = (sfCompress & 0x3f) >> 4; - slen[1] = (sfCompress & 0x0f) >> 2; - slen[2] = (sfCompress & 0x03); - slen[3] = 0; - sfcIdx = 4; - } else { - /* max slen = floor[11/3] = 3 (max sfCompress >> 1 = 511/2 = 255) */ - sfCompress -= 244; - slen[0] = (sfCompress / 3); - slen[1] = (sfCompress % 3); - slen[2] = slen[3] = 0; - sfcIdx = 5; - } - } - - /* set index based on block type: (0,1,3) --> 0, (2 non-mixed) --> 1, (2 mixed) ---> 2 */ - btIdx = 0; - if (sis->blockType == 2) - btIdx = (sis->mixedBlock ? 2 : 1); - for (i = 0; i < 4; i++) - nr[i] = (int)NRTab[sfcIdx][btIdx][i]; - - /* save intensity stereo scale factor info */ - if( (modeExt & 0x01) && (ch == 1) ) { - for (i = 0; i < 4; i++) { - sfjs->slen[i] = slen[i]; - sfjs->nr[i] = nr[i]; - } - sfjs->intensityScale = intensityScale; - } - sis->preFlag = preFlag; - - /* short blocks */ - if(sis->blockType == 2) { - if(sis->mixedBlock) { - /* do long block portion */ - iipTest = (1 << slen[0]) - 1; - for (sfb=0; sfb < 6; sfb++) { - sfis->l[sfb] = (char)GetBits(bsi, slen[0]); - } - sfb = 3; /* start sfb for short */ - nrIdx = 1; - } else { - /* all short blocks, so start nr, sfb at 0 */ - sfb = 0; - nrIdx = 0; - } - - /* remaining short blocks, sfb just keeps incrementing */ - for ( ; nrIdx <= 3; nrIdx++) { - iipTest = (1 << slen[nrIdx]) - 1; - for (i=0; i < nr[nrIdx]; i++, sfb++) { - sfis->s[sfb][0] = (char)GetBits(bsi, slen[nrIdx]); - sfis->s[sfb][1] = (char)GetBits(bsi, slen[nrIdx]); - sfis->s[sfb][2] = (char)GetBits(bsi, slen[nrIdx]); - } - } - /* last sf band not transmitted */ - sfis->s[12][0] = sfis->s[12][1] = sfis->s[12][2] = 0; - } else { - /* long blocks */ - sfb = 0; - for (nrIdx = 0; nrIdx <= 3; nrIdx++) { - iipTest = (1 << slen[nrIdx]) - 1; - for(i=0; i < nr[nrIdx]; i++, sfb++) { - sfis->l[sfb] = (char)GetBits(bsi, slen[nrIdx]); - } - } - /* last sf band not transmitted */ - sfis->l[21] = sfis->l[22] = 0; - - } -} - -/************************************************************************************** - * Function: UnpackScaleFactors - * - * Description: parse the fields of the MP3 scale factor data section - * - * Inputs: MP3DecInfo structure filled by UnpackFrameHeader() and UnpackSideInfo() - * buffer pointing to the MP3 scale factor data - * pointer to bit offset (0-7) indicating starting bit in buf[0] - * number of bits available in data buffer - * index of current granule and channel - * - * Outputs: updated platform-specific ScaleFactorInfo struct - * updated bitOffset - * - * Return: length (in bytes) of scale factor data, -1 if null input pointers - **************************************************************************************/ -int UnpackScaleFactors(MP3DecInfo *mp3DecInfo, unsigned char *buf, int *bitOffset, int bitsAvail, int gr, int ch) -{ - int bitsUsed; - unsigned char *startBuf; - BitStreamInfo bitStreamInfo, *bsi; - FrameHeader *fh; - SideInfo *si; - ScaleFactorInfo *sfi; - - /* validate pointers */ - if (!mp3DecInfo || !mp3DecInfo->FrameHeaderPS || !mp3DecInfo->SideInfoPS || !mp3DecInfo->ScaleFactorInfoPS) - return -1; - fh = ((FrameHeader *)(mp3DecInfo->FrameHeaderPS)); - si = ((SideInfo *)(mp3DecInfo->SideInfoPS)); - sfi = ((ScaleFactorInfo *)(mp3DecInfo->ScaleFactorInfoPS)); - - /* init GetBits reader */ - startBuf = buf; - bsi = &bitStreamInfo; - SetBitstreamPointer(bsi, (bitsAvail + *bitOffset + 7) / 8, buf); - if (*bitOffset) - GetBits(bsi, *bitOffset); - - if (fh->ver == MPEG1) - UnpackSFMPEG1(bsi, &si->sis[gr][ch], &sfi->sfis[gr][ch], si->scfsi[ch], gr, &sfi->sfis[0][ch]); - else - UnpackSFMPEG2(bsi, &si->sis[gr][ch], &sfi->sfis[gr][ch], gr, ch, fh->modeExt, &sfi->sfjs); - - mp3DecInfo->part23Length[gr][ch] = si->sis[gr][ch].part23Length; - - bitsUsed = CalcBitsUsed(bsi, buf, *bitOffset); - buf += (bitsUsed + *bitOffset) >> 3; - *bitOffset = (bitsUsed + *bitOffset) & 0x07; - - return (buf - startBuf); -} - diff --git a/bsp/stm32_radio/mp3/real/stproc.c b/bsp/stm32_radio/mp3/real/stproc.c deleted file mode 100644 index 4f6a751b49..0000000000 --- a/bsp/stm32_radio/mp3/real/stproc.c +++ /dev/null @@ -1,296 +0,0 @@ -/* ***** BEGIN LICENSE BLOCK ***** - * Version: RCSL 1.0/RPSL 1.0 - * - * Portions Copyright (c) 1995-2002 RealNetworks, Inc. All Rights Reserved. - * - * The contents of this file, and the files included with this file, are - * subject to the current version of the RealNetworks Public Source License - * Version 1.0 (the "RPSL") available at - * http://www.helixcommunity.org/content/rpsl unless you have licensed - * the file under the RealNetworks Community Source License Version 1.0 - * (the "RCSL") available at http://www.helixcommunity.org/content/rcsl, - * in which case the RCSL will apply. You may also obtain the license terms - * directly from RealNetworks. You may not use this file except in - * compliance with the RPSL or, if you have a valid RCSL with RealNetworks - * applicable to this file, the RCSL. Please see the applicable RPSL or - * RCSL for the rights, obligations and limitations governing use of the - * contents of the file. - * - * This file is part of the Helix DNA Technology. RealNetworks is the - * developer of the Original Code and owns the copyrights in the portions - * it created. - * - * This file, and the files included with this file, is distributed and made - * available on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER - * EXPRESS OR IMPLIED, AND REALNETWORKS HEREBY DISCLAIMS ALL SUCH WARRANTIES, - * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, FITNESS - * FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT. - * - * Technology Compatibility Kit Test Suite(s) Location: - * http://www.helixcommunity.org/content/tck - * - * Contributor(s): - * - * ***** END LICENSE BLOCK ***** */ - -/************************************************************************************** - * Fixed-point MP3 decoder - * Jon Recker (jrecker@real.com), Ken Cooke (kenc@real.com) - * June 2003 - * - * stproc.c - mid-side and intensity (MPEG1 and MPEG2) stereo processing - **************************************************************************************/ - -#include "coder.h" -#include "assembly.h" - -/************************************************************************************** - * Function: MidSideProc - * - * Description: sum-difference stereo reconstruction - * - * Inputs: vector x with dequantized samples from left and right channels - * number of non-zero samples (MAX of left and right) - * assume 1 guard bit in input - * guard bit mask (left and right channels) - * - * Outputs: updated sample vector x - * updated guard bit mask - * - * Return: none - * - * Notes: assume at least 1 GB in input - **************************************************************************************/ -void MidSideProc(int x[MAX_NCHAN][MAX_NSAMP], int nSamps, int mOut[2]) -{ - int i, xr, xl, mOutL, mOutR; - - /* L = (M+S)/sqrt(2), R = (M-S)/sqrt(2) - * NOTE: 1/sqrt(2) done in DequantChannel() - see comments there - */ - mOutL = mOutR = 0; - for(i = 0; i < nSamps; i++) { - xl = x[0][i]; - xr = x[1][i]; - x[0][i] = xl + xr; - x[1][i] = xl - xr; - mOutL |= FASTABS(x[0][i]); - mOutR |= FASTABS(x[1][i]); - } - mOut[0] |= mOutL; - mOut[1] |= mOutR; -} - -/************************************************************************************** - * Function: IntensityProcMPEG1 - * - * Description: intensity stereo processing for MPEG1 - * - * Inputs: vector x with dequantized samples from left and right channels - * number of non-zero samples in left channel - * valid FrameHeader struct - * two each of ScaleFactorInfoSub, CriticalBandInfo structs (both channels) - * flags indicating midSide on/off, mixedBlock on/off - * guard bit mask (left and right channels) - * - * Outputs: updated sample vector x - * updated guard bit mask - * - * Return: none - * - * Notes: assume at least 1 GB in input - * - * TODO: combine MPEG1/2 into one function (maybe) - * make sure all the mixed-block and IIP logic is right - **************************************************************************************/ -void IntensityProcMPEG1(int x[MAX_NCHAN][MAX_NSAMP], int nSamps, FrameHeader *fh, ScaleFactorInfoSub *sfis, - CriticalBandInfo *cbi, int midSideFlag, int mixFlag, int mOut[2]) -{ - int i=0, j=0, n=0, cb=0, w=0; - int sampsLeft, isf, mOutL, mOutR, xl, xr; - int fl, fr, fls[3], frs[3]; - int cbStartL=0, cbStartS=0, cbEndL=0, cbEndS=0; - int *isfTab; - - /* NOTE - this works fine for mixed blocks, as long as the switch point starts in the - * short block section (i.e. on or after sample 36 = sfBand->l[8] = 3*sfBand->s[3] - * is this a safe assumption? - * TODO - intensity + mixed not quite right (diff = 11 on he_mode) - * figure out correct implementation (spec ambiguous about when to do short block reorder) - */ - if (cbi[1].cbType == 0) { - /* long block */ - cbStartL = cbi[1].cbEndL + 1; - cbEndL = cbi[0].cbEndL + 1; - cbStartS = cbEndS = 0; - i = fh->sfBand->l[cbStartL]; - } else if (cbi[1].cbType == 1 || cbi[1].cbType == 2) { - /* short or mixed block */ - cbStartS = cbi[1].cbEndSMax + 1; - cbEndS = cbi[0].cbEndSMax + 1; - cbStartL = cbEndL = 0; - i = 3 * fh->sfBand->s[cbStartS]; - } - - sampsLeft = nSamps - i; /* process to length of left */ - isfTab = (int *)ISFMpeg1[midSideFlag]; - mOutL = mOutR = 0; - - /* long blocks */ - for (cb = cbStartL; cb < cbEndL && sampsLeft > 0; cb++) { - isf = sfis->l[cb]; - if (isf == 7) { - fl = ISFIIP[midSideFlag][0]; - fr = ISFIIP[midSideFlag][1]; - } else { - fl = isfTab[isf]; - fr = isfTab[6] - isfTab[isf]; - } - - n = fh->sfBand->l[cb + 1] - fh->sfBand->l[cb]; - for (j = 0; j < n && sampsLeft > 0; j++, i++) { - xr = MULSHIFT32(fr, x[0][i]) << 2; x[1][i] = xr; mOutR |= FASTABS(xr); - xl = MULSHIFT32(fl, x[0][i]) << 2; x[0][i] = xl; mOutL |= FASTABS(xl); - sampsLeft--; - } - } - - /* short blocks */ - for (cb = cbStartS; cb < cbEndS && sampsLeft >= 3; cb++) { - for (w = 0; w < 3; w++) { - isf = sfis->s[cb][w]; - if (isf == 7) { - fls[w] = ISFIIP[midSideFlag][0]; - frs[w] = ISFIIP[midSideFlag][1]; - } else { - fls[w] = isfTab[isf]; - frs[w] = isfTab[6] - isfTab[isf]; - } - } - - n = fh->sfBand->s[cb + 1] - fh->sfBand->s[cb]; - for (j = 0; j < n && sampsLeft >= 3; j++, i+=3) { - xr = MULSHIFT32(frs[0], x[0][i+0]) << 2; x[1][i+0] = xr; mOutR |= FASTABS(xr); - xl = MULSHIFT32(fls[0], x[0][i+0]) << 2; x[0][i+0] = xl; mOutL |= FASTABS(xl); - xr = MULSHIFT32(frs[1], x[0][i+1]) << 2; x[1][i+1] = xr; mOutR |= FASTABS(xr); - xl = MULSHIFT32(fls[1], x[0][i+1]) << 2; x[0][i+1] = xl; mOutL |= FASTABS(xl); - xr = MULSHIFT32(frs[2], x[0][i+2]) << 2; x[1][i+2] = xr; mOutR |= FASTABS(xr); - xl = MULSHIFT32(fls[2], x[0][i+2]) << 2; x[0][i+2] = xl; mOutL |= FASTABS(xl); - sampsLeft -= 3; - } - } - mOut[0] = mOutL; - mOut[1] = mOutR; - - return; -} - -/************************************************************************************** - * Function: IntensityProcMPEG2 - * - * Description: intensity stereo processing for MPEG2 - * - * Inputs: vector x with dequantized samples from left and right channels - * number of non-zero samples in left channel - * valid FrameHeader struct - * two each of ScaleFactorInfoSub, CriticalBandInfo structs (both channels) - * ScaleFactorJS struct with joint stereo info from UnpackSFMPEG2() - * flags indicating midSide on/off, mixedBlock on/off - * guard bit mask (left and right channels) - * - * Outputs: updated sample vector x - * updated guard bit mask - * - * Return: none - * - * Notes: assume at least 1 GB in input - * - * TODO: combine MPEG1/2 into one function (maybe) - * make sure all the mixed-block and IIP logic is right - * probably redo IIP logic to be simpler - **************************************************************************************/ -void IntensityProcMPEG2(int x[MAX_NCHAN][MAX_NSAMP], int nSamps, FrameHeader *fh, ScaleFactorInfoSub *sfis, - CriticalBandInfo *cbi, ScaleFactorJS *sfjs, int midSideFlag, int mixFlag, int mOut[2]) -{ - int i, j, k, n, r, cb, w; - int fl, fr, mOutL, mOutR, xl, xr; - int sampsLeft; - int isf, sfIdx, tmp, il[23]; - int *isfTab; - int cbStartL, cbStartS, cbEndL, cbEndS; - - isfTab = (int *)ISFMpeg2[sfjs->intensityScale][midSideFlag]; - mOutL = mOutR = 0; - - /* fill buffer with illegal intensity positions (depending on slen) */ - for (k = r = 0; r < 4; r++) { - tmp = (1 << sfjs->slen[r]) - 1; - for (j = 0; j < sfjs->nr[r]; j++, k++) - il[k] = tmp; - } - - if (cbi[1].cbType == 0) { - /* long blocks */ - il[21] = il[22] = 1; - cbStartL = cbi[1].cbEndL + 1; /* start at end of right */ - cbEndL = cbi[0].cbEndL + 1; /* process to end of left */ - i = fh->sfBand->l[cbStartL]; - sampsLeft = nSamps - i; - - for(cb = cbStartL; cb < cbEndL; cb++) { - sfIdx = sfis->l[cb]; - if (sfIdx == il[cb]) { - fl = ISFIIP[midSideFlag][0]; - fr = ISFIIP[midSideFlag][1]; - } else { - isf = (sfis->l[cb] + 1) >> 1; - fl = isfTab[(sfIdx & 0x01 ? isf : 0)]; - fr = isfTab[(sfIdx & 0x01 ? 0 : isf)]; - } - n = MIN(fh->sfBand->l[cb + 1] - fh->sfBand->l[cb], sampsLeft); - - for(j = 0; j < n; j++, i++) { - xr = MULSHIFT32(fr, x[0][i]) << 2; x[1][i] = xr; mOutR |= FASTABS(xr); - xl = MULSHIFT32(fl, x[0][i]) << 2; x[0][i] = xl; mOutL |= FASTABS(xl); - } - - /* early exit once we've used all the non-zero samples */ - sampsLeft -= n; - if (sampsLeft == 0) - break; - } - } else { - /* short or mixed blocks */ - il[12] = 1; - - for(w = 0; w < 3; w++) { - cbStartS = cbi[1].cbEndS[w] + 1; /* start at end of right */ - cbEndS = cbi[0].cbEndS[w] + 1; /* process to end of left */ - i = 3 * fh->sfBand->s[cbStartS] + w; - - /* skip through sample array by 3, so early-exit logic would be more tricky */ - for(cb = cbStartS; cb < cbEndS; cb++) { - sfIdx = sfis->s[cb][w]; - if (sfIdx == il[cb]) { - fl = ISFIIP[midSideFlag][0]; - fr = ISFIIP[midSideFlag][1]; - } else { - isf = (sfis->s[cb][w] + 1) >> 1; - fl = isfTab[(sfIdx & 0x01 ? isf : 0)]; - fr = isfTab[(sfIdx & 0x01 ? 0 : isf)]; - } - n = fh->sfBand->s[cb + 1] - fh->sfBand->s[cb]; - - for(j = 0; j < n; j++, i+=3) { - xr = MULSHIFT32(fr, x[0][i]) << 2; x[1][i] = xr; mOutR |= FASTABS(xr); - xl = MULSHIFT32(fl, x[0][i]) << 2; x[0][i] = xl; mOutL |= FASTABS(xl); - } - } - } - } - mOut[0] = mOutL; - mOut[1] = mOutR; - - return; -} - diff --git a/bsp/stm32_radio/mp3/real/subband.c b/bsp/stm32_radio/mp3/real/subband.c deleted file mode 100644 index c0e6c3dce6..0000000000 --- a/bsp/stm32_radio/mp3/real/subband.c +++ /dev/null @@ -1,96 +0,0 @@ -/* ***** BEGIN LICENSE BLOCK ***** - * Version: RCSL 1.0/RPSL 1.0 - * - * Portions Copyright (c) 1995-2002 RealNetworks, Inc. All Rights Reserved. - * - * The contents of this file, and the files included with this file, are - * subject to the current version of the RealNetworks Public Source License - * Version 1.0 (the "RPSL") available at - * http://www.helixcommunity.org/content/rpsl unless you have licensed - * the file under the RealNetworks Community Source License Version 1.0 - * (the "RCSL") available at http://www.helixcommunity.org/content/rcsl, - * in which case the RCSL will apply. You may also obtain the license terms - * directly from RealNetworks. You may not use this file except in - * compliance with the RPSL or, if you have a valid RCSL with RealNetworks - * applicable to this file, the RCSL. Please see the applicable RPSL or - * RCSL for the rights, obligations and limitations governing use of the - * contents of the file. - * - * This file is part of the Helix DNA Technology. RealNetworks is the - * developer of the Original Code and owns the copyrights in the portions - * it created. - * - * This file, and the files included with this file, is distributed and made - * available on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER - * EXPRESS OR IMPLIED, AND REALNETWORKS HEREBY DISCLAIMS ALL SUCH WARRANTIES, - * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, FITNESS - * FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT. - * - * Technology Compatibility Kit Test Suite(s) Location: - * http://www.helixcommunity.org/content/tck - * - * Contributor(s): - * - * ***** END LICENSE BLOCK ***** */ - -/************************************************************************************** - * Fixed-point MP3 decoder - * Jon Recker (jrecker@real.com), Ken Cooke (kenc@real.com) - * June 2003 - * - * subband.c - subband transform (synthesis filterbank implemented via 32-point DCT - * followed by polyphase filter) - **************************************************************************************/ - -#include "coder.h" -#include "assembly.h" - -/************************************************************************************** - * Function: Subband - * - * Description: do subband transform on all the blocks in one granule, all channels - * - * Inputs: filled MP3DecInfo structure, after calling IMDCT for all channels - * vbuf[ch] and vindex[ch] must be preserved between calls - * - * Outputs: decoded PCM data, interleaved LRLRLR... if stereo - * - * Return: 0 on success, -1 if null input pointers - **************************************************************************************/ -int Subband(MP3DecInfo *mp3DecInfo, short *pcmBuf) -{ - int b; - HuffmanInfo *hi; - IMDCTInfo *mi; - SubbandInfo *sbi; - - /* validate pointers */ - if (!mp3DecInfo || !mp3DecInfo->HuffmanInfoPS || !mp3DecInfo->IMDCTInfoPS || !mp3DecInfo->SubbandInfoPS) - return -1; - - hi = (HuffmanInfo *)mp3DecInfo->HuffmanInfoPS; - mi = (IMDCTInfo *)(mp3DecInfo->IMDCTInfoPS); - sbi = (SubbandInfo*)(mp3DecInfo->SubbandInfoPS); - - if (mp3DecInfo->nChans == 2) { - /* stereo */ - for (b = 0; b < BLOCK_SIZE; b++) { - FDCT32(mi->outBuf[0][b], sbi->vbuf + 0*32, sbi->vindex, (b & 0x01), mi->gb[0]); - FDCT32(mi->outBuf[1][b], sbi->vbuf + 1*32, sbi->vindex, (b & 0x01), mi->gb[1]); - PolyphaseStereo(pcmBuf, sbi->vbuf + sbi->vindex + VBUF_LENGTH * (b & 0x01), polyCoef); - sbi->vindex = (sbi->vindex - (b & 0x01)) & 7; - pcmBuf += (2 * NBANDS); - } - } else { - /* mono */ - for (b = 0; b < BLOCK_SIZE; b++) { - FDCT32(mi->outBuf[0][b], sbi->vbuf + 0*32, sbi->vindex, (b & 0x01), mi->gb[0]); - PolyphaseMono(pcmBuf, sbi->vbuf + sbi->vindex + VBUF_LENGTH * (b & 0x01), polyCoef); - sbi->vindex = (sbi->vindex - (b & 0x01)) & 7; - pcmBuf += NBANDS; - } - } - - return 0; -} - diff --git a/bsp/stm32_radio/mp3/real/trigtabs.c b/bsp/stm32_radio/mp3/real/trigtabs.c deleted file mode 100644 index d3a1d8cc11..0000000000 --- a/bsp/stm32_radio/mp3/real/trigtabs.c +++ /dev/null @@ -1,311 +0,0 @@ -/* ***** BEGIN LICENSE BLOCK ***** - * Version: RCSL 1.0/RPSL 1.0 - * - * Portions Copyright (c) 1995-2002 RealNetworks, Inc. All Rights Reserved. - * - * The contents of this file, and the files included with this file, are - * subject to the current version of the RealNetworks Public Source License - * Version 1.0 (the "RPSL") available at - * http://www.helixcommunity.org/content/rpsl unless you have licensed - * the file under the RealNetworks Community Source License Version 1.0 - * (the "RCSL") available at http://www.helixcommunity.org/content/rcsl, - * in which case the RCSL will apply. You may also obtain the license terms - * directly from RealNetworks. You may not use this file except in - * compliance with the RPSL or, if you have a valid RCSL with RealNetworks - * applicable to this file, the RCSL. Please see the applicable RPSL or - * RCSL for the rights, obligations and limitations governing use of the - * contents of the file. - * - * This file is part of the Helix DNA Technology. RealNetworks is the - * developer of the Original Code and owns the copyrights in the portions - * it created. - * - * This file, and the files included with this file, is distributed and made - * available on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER - * EXPRESS OR IMPLIED, AND REALNETWORKS HEREBY DISCLAIMS ALL SUCH WARRANTIES, - * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, FITNESS - * FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT. - * - * Technology Compatibility Kit Test Suite(s) Location: - * http://www.helixcommunity.org/content/tck - * - * Contributor(s): - * - * ***** END LICENSE BLOCK ***** */ - -/************************************************************************************** - * Fixed-point MP3 decoder - * Jon Recker (jrecker@real.com), Ken Cooke (kenc@real.com) - * June 2003 - * - * trigtabs.c - global ROM tables for pre-calculated trig coefficients - **************************************************************************************/ - -#include "coder.h" - -/* post-IMDCT window, win[blockType][i] - * format = Q31 - * Fused sin window with final stage of IMDCT - * includes 1/sqrt(2) scaling, since we scale by sqrt(2) in dequant in order - * for fast IMDCT36 to be usable - * - * for(i=0;i<9;i++) win[0][i] = sin(pi/36 *(i+0.5)); - * for(i=9;i<36;i++) win[0][i] = -sin(pi/36 *(i+0.5)); - * - * for(i=0;i<9;i++) win[1][i] = sin(pi/36 *(i+0.5)); - * for(i=9;i<18;i++) win[1][i] = -sin(pi/36 *(i+0.5)); - * for(i=18;i<24;i++) win[1][i] = -1; - * for(i=24;i<30;i++) win[1][i] = -sin(pi/12 *(i+0.5-18)); - * for(i=30;i<36;i++) win[1][i] = 0; - * - * for(i=0;i<6;i++) win[3][i] = 0; - * for(i=6;i<9;i++) win[3][i] = sin(pi/12 *(i+0.5-6)); - * for(i=9;i<12;i++) win[3][i] = -sin(pi/12 *(i+0.5-6)); - * for(i=12;i<18;i++) win[3][i] = -1; - * for(i=18;i<36;i++) win[3][i] = -sin(pi/36*(i+0.5)); - * - * for(i=0;i<3;i++) win[2][i] = sin(pi/12*(i+0.5)); - * for(i=3;i<12;i++) win[2][i] = -sin(pi/12*(i+0.5)); - * for(i=12;i<36;i++) win[2][i] = 0; - * - * for (i = 0; i < 4; i++) { - * if (i == 2) { - * win[i][8] *= cos(pi/12 * (0+0.5)); - * win[i][9] *= cos(pi/12 * (0+0.5)); - * win[i][7] *= cos(pi/12 * (1+0.5)); - * win[i][10] *= cos(pi/12 * (1+0.5)); - * win[i][6] *= cos(pi/12 * (2+0.5)); - * win[i][11] *= cos(pi/12 * (2+0.5)); - * win[i][0] *= cos(pi/12 * (3+0.5)); - * win[i][5] *= cos(pi/12 * (3+0.5)); - * win[i][1] *= cos(pi/12 * (4+0.5)); - * win[i][4] *= cos(pi/12 * (4+0.5)); - * win[i][2] *= cos(pi/12 * (5+0.5)); - * win[i][3] *= cos(pi/12 * (5+0.5)); - * } else { - * for (j = 0; j < 9; j++) { - * win[i][8-j] *= cos(pi/36 * (17-j+0.5)); - * win[i][9+j] *= cos(pi/36 * (17-j+0.5)); - * } - * for (j = 0; j < 9; j++) { - * win[i][18+8-j] *= cos(pi/36 * (j+0.5)); - * win[i][18+9+j] *= cos(pi/36 * (j+0.5)); - * } - * } - * } - * for (i = 0; i < 4; i++) - * for (j = 0; j < 36; j++) - * win[i][j] *= 1.0 / sqrt(2); - */ -const int imdctWin[4][36] = { - { - 0x02aace8b, 0x07311c28, 0x0a868fec, 0x0c913b52, 0x0d413ccd, 0x0c913b52, 0x0a868fec, 0x07311c28, - 0x02aace8b, 0xfd16d8dd, 0xf6a09e66, 0xef7a6275, 0xe7dbc161, 0xe0000000, 0xd8243e9f, 0xd0859d8b, - 0xc95f619a, 0xc2e92723, 0xbd553175, 0xb8cee3d8, 0xb5797014, 0xb36ec4ae, 0xb2bec333, 0xb36ec4ae, - 0xb5797014, 0xb8cee3d8, 0xbd553175, 0xc2e92723, 0xc95f619a, 0xd0859d8b, 0xd8243e9f, 0xe0000000, - 0xe7dbc161, 0xef7a6275, 0xf6a09e66, 0xfd16d8dd, - }, - { - 0x02aace8b, 0x07311c28, 0x0a868fec, 0x0c913b52, 0x0d413ccd, 0x0c913b52, 0x0a868fec, 0x07311c28, - 0x02aace8b, 0xfd16d8dd, 0xf6a09e66, 0xef7a6275, 0xe7dbc161, 0xe0000000, 0xd8243e9f, 0xd0859d8b, - 0xc95f619a, 0xc2e92723, 0xbd44ef14, 0xb831a052, 0xb3aa3837, 0xafb789a4, 0xac6145bb, 0xa9adecdc, - 0xa864491f, 0xad1868f0, 0xb8431f49, 0xc8f42236, 0xdda8e6b1, 0xf47755dc, 0x00000000, 0x00000000, - 0x00000000, 0x00000000, 0x00000000, 0x00000000, - }, - { - 0x07311c28, 0x0d413ccd, 0x07311c28, 0xf6a09e66, 0xe0000000, 0xc95f619a, 0xb8cee3d8, 0xb2bec333, - 0xb8cee3d8, 0xc95f619a, 0xe0000000, 0xf6a09e66, 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00000000, 0x00000000, 0x00000000, - }, - { - 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x028e9709, 0x04855ec0, - 0x026743a1, 0xfcde2c10, 0xf515dc82, 0xec93e53b, 0xe4c880f8, 0xdd5d0b08, 0xd63510b7, 0xcf5e834a, - 0xc8e6b562, 0xc2da4105, 0xbd553175, 0xb8cee3d8, 0xb5797014, 0xb36ec4ae, 0xb2bec333, 0xb36ec4ae, - 0xb5797014, 0xb8cee3d8, 0xbd553175, 0xc2e92723, 0xc95f619a, 0xd0859d8b, 0xd8243e9f, 0xe0000000, - 0xe7dbc161, 0xef7a6275, 0xf6a09e66, 0xfd16d8dd, - }, -}; - -/* indexing = [mid-side off/on][intensity scale factor] - * format = Q30, range = [0.0, 1.414] - * - * mid-side off: - * ISFMpeg1[0][i] = tan(i*pi/12) / [1 + tan(i*pi/12)] (left scalefactor) - * = 1 / [1 + tan(i*pi/12)] (right scalefactor) - * - * mid-side on: - * ISFMpeg1[1][i] = sqrt(2) * ISFMpeg1[0][i] - * - * output L = ISFMpeg1[midSide][isf][0] * input L - * output R = ISFMpeg1[midSide][isf][1] * input L - * - * obviously left scalefactor + right scalefactor = 1 (m-s off) or sqrt(2) (m-s on) - * so just store left and calculate right as 1 - left - * (can derive as right = ISFMpeg1[x][6] - left) - * - * if mid-side enabled, multiply joint stereo scale factors by sqrt(2) - * - we scaled whole spectrum by 1/sqrt(2) in Dequant for the M+S/sqrt(2) in MidSideProc - * - but the joint stereo part of the spectrum doesn't need this, so we have to undo it - * - * if scale factor is and illegal intensity position, this becomes a passthrough - * - gain = [1, 0] if mid-side off, since L is coded directly and R = 0 in this region - * - gain = [1, 1] if mid-side on, since L = (M+S)/sqrt(2), R = (M-S)/sqrt(2) - * - and since S = 0 in the joint stereo region (above NZB right) then L = R = M * 1.0 - */ -const int ISFMpeg1[2][7] = { - {0x00000000, 0x0d8658ba, 0x176cf5d0, 0x20000000, 0x28930a2f, 0x3279a745, 0x40000000}, - {0x00000000, 0x13207f5c, 0x2120fb83, 0x2d413ccc, 0x39617e16, 0x4761fa3d, 0x5a827999} -}; - -/* indexing = [intensity scale on/off][mid-side off/on][intensity scale factor] - * format = Q30, range = [0.0, 1.414] - * - * if (isf == 0) kl = 1.0 kr = 1.0 - * else if (isf & 0x01 == 0x01) kl = i0^((isf+1)/2), kr = 1.0 - * else if (isf & 0x01 == 0x00) kl = 1.0, kr = i0^(isf/2) - * - * if (intensityScale == 1) i0 = 1/sqrt(2) = 0x2d413ccc (Q30) - * else i0 = 1/sqrt(sqrt(2)) = 0x35d13f32 (Q30) - * - * see comments for ISFMpeg1 (just above) regarding scaling, sqrt(2), etc. - * - * compress the MPEG2 table using the obvious identities above... - * for isf = [0, 1, 2, ... 30], let sf = table[(isf+1) >> 1] - * - if isf odd, L = sf*L, R = tab[0]*R - * - if isf even, L = tab[0]*L, R = sf*R - */ -const int ISFMpeg2[2][2][16] = { -{ - { - /* intensityScale off, mid-side off */ - 0x40000000, 0x35d13f32, 0x2d413ccc, 0x260dfc14, 0x1fffffff, 0x1ae89f99, 0x16a09e66, 0x1306fe0a, - 0x0fffffff, 0x0d744fcc, 0x0b504f33, 0x09837f05, 0x07ffffff, 0x06ba27e6, 0x05a82799, 0x04c1bf82, - }, - { - /* intensityScale off, mid-side on */ - 0x5a827999, 0x4c1bf827, 0x3fffffff, 0x35d13f32, 0x2d413ccc, 0x260dfc13, 0x1fffffff, 0x1ae89f99, - 0x16a09e66, 0x1306fe09, 0x0fffffff, 0x0d744fcc, 0x0b504f33, 0x09837f04, 0x07ffffff, 0x06ba27e6, - }, -}, -{ - { - /* intensityScale on, mid-side off */ - 0x40000000, 0x2d413ccc, 0x20000000, 0x16a09e66, 0x10000000, 0x0b504f33, 0x08000000, 0x05a82799, - 0x04000000, 0x02d413cc, 0x02000000, 0x016a09e6, 0x01000000, 0x00b504f3, 0x00800000, 0x005a8279, - }, - /* intensityScale on, mid-side on */ - { - 0x5a827999, 0x3fffffff, 0x2d413ccc, 0x1fffffff, 0x16a09e66, 0x0fffffff, 0x0b504f33, 0x07ffffff, - 0x05a82799, 0x03ffffff, 0x02d413cc, 0x01ffffff, 0x016a09e6, 0x00ffffff, 0x00b504f3, 0x007fffff, - } -} -}; - -/* indexing = [intensity scale on/off][left/right] - * format = Q30, range = [0.0, 1.414] - * - * illegal intensity position scalefactors (see comments on ISFMpeg1) - */ -const int ISFIIP[2][2] = { - {0x40000000, 0x00000000}, /* mid-side off */ - {0x40000000, 0x40000000}, /* mid-side on */ -}; - -const unsigned char uniqueIDTab[8] = {0x5f, 0x4b, 0x43, 0x5f, 0x5f, 0x4a, 0x52, 0x5f}; - -/* anti-alias coefficients - see spec Annex B, table 3-B.9 - * csa[0][i] = CSi, csa[1][i] = CAi - * format = Q31 - */ -const int csa[8][2] = { - {0x6dc253f0, 0xbe2500aa}, - {0x70dcebe4, 0xc39e4949}, - {0x798d6e73, 0xd7e33f4a}, - {0x7ddd40a7, 0xe8b71176}, - {0x7f6d20b7, 0xf3e4fe2f}, - {0x7fe47e40, 0xfac1a3c7}, - {0x7ffcb263, 0xfe2ebdc6}, - {0x7fffc694, 0xff86c25d}, -}; - -/* format = Q30, range = [0.0981, 1.9976] - * - * n = 16; - * k = 0; - * for(i=0; i<5; i++, n=n/2) { - * for(p=0; p -#include - -#include "netbuffer.h" -#include "player_ui.h" -#include "player_bg.h" - -#define MP3_DECODE_MP_CNT 2 -#define MP3_DECODE_MP_SZ 2560 - -static rt_uint8_t mempool[(MP3_DECODE_MP_SZ * 2 + 4)* 2]; // 5k x 2 -static struct rt_mempool _mp; -static rt_bool_t is_inited = RT_FALSE; - -rt_size_t sbuf_get_size() -{ - return MP3_DECODE_MP_SZ * 2; -} - -void sbuf_init() -{ - rt_mp_init(&_mp, "mp3", &mempool[0], sizeof(mempool), MP3_DECODE_MP_SZ * 2); -} - -void* sbuf_alloc() -{ - if (is_inited == RT_FALSE) - { - sbuf_init(); - is_inited = RT_TRUE; - } - - return (rt_uint16_t*)rt_mp_alloc(&_mp, RT_WAITING_FOREVER); -} - -void sbuf_release(void* ptr) -{ - rt_mp_free(ptr); -} - -#if STM32_EXT_SRAM -/* netbuf worker stat */ -#define NETBUF_STAT_STOPPED 0 -#define NETBUF_STAT_BUFFERING 1 -#define NETBUF_STAT_SUSPEND 2 -#define NETBUF_STAT_STOPPING 3 - -/* net buffer module */ -struct net_buffer -{ - /* read index and save index in the buffer */ - rt_size_t read_index, save_index; - - /* buffer data and size of buffer */ - rt_uint8_t* buffer_data; - rt_size_t data_length; - rt_size_t size; - - /* buffer ready water mater */ - rt_uint32_t ready_wm, resume_wm; - rt_bool_t is_wait_ready; - rt_sem_t wait_ready, wait_resume; - - /* netbuf worker stat */ - rt_uint8_t stat; -}; -struct net_buffer_job -{ - rt_size_t (*fetch)(rt_uint8_t* ptr, rt_size_t len, void* parameter); - void (*close)(void* parameter); - - void* parameter; -}; - -static struct net_buffer _netbuf; -static rt_mq_t _netbuf_mq = RT_NULL; - -/* netbuf worker public API */ -rt_size_t net_buf_read(rt_uint8_t* buffer, rt_size_t length) -{ - rt_size_t data_length, read_index; - rt_uint32_t level; - - data_length = _netbuf.data_length; - - if ((data_length == 0) && - (_netbuf.stat == NETBUF_STAT_BUFFERING || _netbuf.stat == NETBUF_STAT_SUSPEND)) - { - rt_err_t result; - - /* buffer is not ready. */ - _netbuf.is_wait_ready = RT_TRUE; - rt_kprintf("wait ready, data len: %d, stat %d\n", data_length, _netbuf.stat); - /* set buffer status to buffering */ - player_set_buffer_status(RT_TRUE); - result = rt_sem_take(_netbuf.wait_ready, RT_WAITING_FOREVER); - - /* take semaphore failed, netbuf worker is stopped */ - if (result != RT_EOK) return 0; - } - - /* get read and save index */ - read_index = _netbuf.read_index; - /* re-get data legnth */ - data_length = _netbuf.data_length; - - /* set the length */ - if (length > data_length) length = data_length; - - // rt_kprintf("data len: %d, read idx %d\n", data_length, read_index); - if (data_length > 0) - { - /* copy buffer */ - if (_netbuf.size - read_index > length) - { - rt_memcpy(buffer, &_netbuf.buffer_data[read_index], - length); - _netbuf.read_index += length; - } - else - { - rt_memcpy(buffer, &_netbuf.buffer_data[read_index], - _netbuf.size - read_index); - rt_memcpy(&buffer[_netbuf.size - read_index], - &_netbuf.buffer_data[0], - length - (_netbuf.size - read_index)); - _netbuf.read_index = length - (_netbuf.size - read_index); - } - - level = rt_hw_interrupt_disable(); - _netbuf.data_length -= length; - data_length = _netbuf.data_length; - - if ((_netbuf.stat == NETBUF_STAT_SUSPEND) && data_length < _netbuf.resume_wm) - { - _netbuf.stat = NETBUF_STAT_BUFFERING; - rt_hw_interrupt_enable(level); - - /* resume netbuf worker */ - rt_kprintf("stat[suspend] -> buffering\n"); - rt_sem_release(_netbuf.wait_resume); - } - else - { - rt_hw_interrupt_enable(level); - } - } - - return length; -} - -int net_buf_start_job(rt_size_t (*fetch)(rt_uint8_t* ptr, rt_size_t len, void* parameter), - void (*close)(void* parameter), - void* parameter) -{ - struct net_buffer_job job; - rt_uint32_t level; - - /* job message */ - job.fetch = fetch; - job.close = close; - job.parameter = parameter; - - level = rt_hw_interrupt_disable(); - /* check netbuf worker is stopped */ - if (_netbuf.stat == NETBUF_STAT_STOPPED) - { - /* change stat to buffering if netbuf stopped */ - _netbuf.stat = NETBUF_STAT_BUFFERING; - rt_hw_interrupt_enable(level); - - rt_kprintf("stat[stoppped] -> buffering\n"); - - rt_mq_send(_netbuf_mq, (void*)&job, sizeof(struct net_buffer_job)); - return 0; - } - rt_hw_interrupt_enable(level); - - return -1; -} - -void net_buf_stop_job() -{ - rt_uint32_t level; - - level = rt_hw_interrupt_disable(); - if (_netbuf.stat == NETBUF_STAT_SUSPEND) - { - /* resume the net buffer worker */ - rt_sem_release(_netbuf.wait_resume); - _netbuf.stat = NETBUF_STAT_STOPPING; - rt_kprintf("stat[suspend] -> stopping\n"); - - } - else if (_netbuf.stat == NETBUF_STAT_BUFFERING) - { - /* netbuf worker is working, set stat to stopping */ - _netbuf.stat = NETBUF_STAT_STOPPING; - rt_kprintf("stat[buffering] -> stopping\n"); - } - rt_hw_interrupt_enable(level); -} - -static void net_buf_do_stop(struct net_buffer_job* job) -{ - /* source closed */ - job->close(job->parameter); - - /* set stat to stopped */ - _netbuf.stat = NETBUF_STAT_STOPPED; - rt_kprintf("stat -> stopped\n"); - if (_netbuf.is_wait_ready == RT_TRUE) - { - /* resume the wait for buffer task */ - _netbuf.is_wait_ready = RT_FALSE; - rt_sem_release(_netbuf.wait_ready); - } - /* reset buffer stat */ - _netbuf.data_length = 0; - _netbuf.read_index = 0 ; - _netbuf.save_index = 0; - - rt_kprintf("job done\n"); -} - -#define NETBUF_BLOCK_SIZE 4096 -static void net_buf_do_job(struct net_buffer_job* job) -{ - rt_uint32_t level; - rt_size_t read_length, data_length; - rt_uint8_t *ptr; - - ptr = rt_malloc(NETBUF_BLOCK_SIZE); - - while (1) - { - if (_netbuf.stat == NETBUF_STAT_STOPPING) - { - net_buf_do_stop(job); - break; - } - - /* fetch data buffer */ - read_length = job->fetch(ptr, NETBUF_BLOCK_SIZE, job->parameter); - if (read_length <= 0) - { - net_buf_do_stop(job); - break; - } - else - { - /* got data length in the buffer */ - data_length = _netbuf.data_length; - - /* check avaible buffer to save */ - if ((_netbuf.size - data_length) < read_length) - { - rt_err_t result, level; - - /* no free space yet, suspend itself */ - rt_kprintf("stat[buffering] -> suspend, avaible room %d\n", data_length); - level = rt_hw_interrupt_disable(); - _netbuf.stat = NETBUF_STAT_SUSPEND; - rt_hw_interrupt_enable(level); - result = rt_sem_take(_netbuf.wait_resume, RT_WAITING_FOREVER); - if (result != RT_EOK) - { - /* stop net buffer worker */ - net_buf_do_stop(job); - break; - } - } - - /* there are enough free space to fetch data */ - if ((_netbuf.size - _netbuf.save_index) < read_length) - { - rt_memcpy(&_netbuf.buffer_data[_netbuf.save_index], - ptr, _netbuf.size - _netbuf.save_index); - rt_memcpy(&_netbuf.buffer_data[0], - ptr + (_netbuf.size - _netbuf.save_index), - read_length - (_netbuf.size - _netbuf.save_index)); - - /* move save index */ - _netbuf.save_index = read_length - (_netbuf.size - _netbuf.save_index); - } - else - { - rt_memcpy(&_netbuf.buffer_data[_netbuf.save_index], - ptr, read_length); - - /* move save index */ - _netbuf.save_index += read_length; - if (_netbuf.save_index >= _netbuf.size) _netbuf.save_index = 0; - } - - level = rt_hw_interrupt_disable(); - _netbuf.data_length += read_length; - data_length = _netbuf.data_length; - rt_hw_interrupt_enable(level); - } - - // rt_kprintf("buffering ... %d %c\n", (data_length * 100) / _netbuf.size, '%'); - - /* set buffer position */ - player_set_position(data_length); - - if ((_netbuf.stat == NETBUF_STAT_BUFFERING) - && (data_length >= _netbuf.ready_wm) - && _netbuf.is_wait_ready == RT_TRUE) - { - /* notify the thread for waitting buffer ready */ - rt_kprintf("resume wait buffer\n"); - - _netbuf.is_wait_ready = RT_FALSE; - /* set buffer status to playing */ - player_set_buffer_status(RT_FALSE); - rt_sem_release(_netbuf.wait_ready); - } - } - - /* release fetch buffer */ - rt_free(ptr); -} - -static void net_buf_thread_entry(void* parameter) -{ - rt_err_t result; - struct net_buffer_job job; - - while (1) - { - /* get a job */ - result = rt_mq_recv(_netbuf_mq, (void*)&job, sizeof(struct net_buffer_job), RT_WAITING_FOREVER); - if (result == RT_EOK) - { - /* set stat to buffering */ - if (_netbuf.stat == NETBUF_STAT_BUFFERING) - { - /* reset data length and read/save index */ - _netbuf.data_length = 0; - _netbuf.read_index = _netbuf.save_index = 0; - - /* perform the job */ - net_buf_do_job(&job); - } - } - } -} - -void net_buf_init(rt_size_t size) -{ - rt_thread_t tid; - - /* init net buffer structure */ - _netbuf.read_index = _netbuf.save_index = 0; - _netbuf.size = size; /* net buffer size */ - - /* allocate buffer */ - _netbuf.buffer_data = rt_malloc(_netbuf.size); - _netbuf.data_length = 0; - - /* set ready and resume water mater */ - _netbuf.ready_wm = _netbuf.size * 90/100; - _netbuf.resume_wm = _netbuf.size * 80/100; - - /* set init stat */ - _netbuf.stat = NETBUF_STAT_STOPPED; - rt_kprintf("stat -> stopped\n"); - - _netbuf.wait_ready = rt_sem_create("nready", 0, RT_IPC_FLAG_FIFO); - _netbuf.wait_resume = rt_sem_create("nresum", 0, RT_IPC_FLAG_FIFO); - _netbuf.is_wait_ready = RT_FALSE; - - /* crate message queue */ - _netbuf_mq = rt_mq_create("njob", sizeof(struct net_buffer_job), - 4, RT_IPC_FLAG_FIFO); - - /* create net buffer thread */ - tid = rt_thread_create("nbuf", - net_buf_thread_entry, RT_NULL, - 1024, 22, 5); - if (tid != RT_NULL) - rt_thread_startup(tid); -} -#endif diff --git a/bsp/stm32_radio/netbuffer.h b/bsp/stm32_radio/netbuffer.h deleted file mode 100644 index d9f9e7865d..0000000000 --- a/bsp/stm32_radio/netbuffer.h +++ /dev/null @@ -1,25 +0,0 @@ -#ifndef __NET_BUF_H__ -#define __NET_BUF_H__ - -#include -#include "board.h" - -/* SRAM buffer pool routine */ -rt_size_t sbuf_get_size(void); -void* sbuf_alloc(void); -void sbuf_release(void* ptr); - -#if STM32_EXT_SRAM -/* net buffer routine */ -void net_buf_init(rt_size_t size); - -rt_size_t net_buf_read(rt_uint8_t* buffer, rt_size_t length); - -int net_buf_start_job(rt_size_t (*fetch)(rt_uint8_t* ptr, rt_size_t len, void* parameter), - void (*close)(void* parameter), - void* parameter); -void net_buf_stop_job(void); - -#endif - -#endif diff --git a/bsp/stm32_radio/network.xpm b/bsp/stm32_radio/network.xpm deleted file mode 100644 index 6e47ce1fa6..0000000000 --- a/bsp/stm32_radio/network.xpm +++ /dev/null @@ -1,172 +0,0 @@ -/* XPM */ -static char * network_xpm[] = { -"24 24 145 2", -" c None", -". c #6C6E6A", -"+ c #676965", -"@ c #6B6D6A", -"# c #C6C8C4", -"$ c #F0F1F0", -"% c #F1F1F0", -"& c #C8CAC6", -"* c #646662", -"= c #446795", -"- c #27508B", -"; c #2A538D", -"> c #2E558F", -", c #315890", -"' c #355B92", -") c #385E94", -"! c #3C6196", -"~ c #5C7BA2", -"{ c #F2F3F2", -"] c #626460", -"^ c #F2F2F2", -"/ c #3E6297", -"( c #86ACD5", -"_ c #88AED6", -": c #8BB0D7", -"< c #8DB1D7", -"[ c #8CB1D7", -"} c #8CB0D6", -"| c #8DAED6", -"1 c #5B7AA7", -"2 c #F4F4F4", -"3 c #61635F", -"4 c #30578F", -"5 c #88ADD6", -"6 c #8EB1D7", -"7 c #92B3D8", -"8 c #96B6D8", -"9 c #92B2D6", -"0 c #8CADD3", -"a c #84A7CF", -"b c #5F615D", -"c c #204A87", -"d c #6694C7", -"e c #6391C5", -"f c #618FC3", -"g c #5E8CC1", -"h c #5B8ABF", -"i c #5887BD", -"j c #5684BB", -"k c #5D5F5B", -"l c #5D8CC0", -"m c #5A89BE", -"n c #5886BD", -"o c #5584BB", -"p c #5281B9", -"q c #4F7FB7", -"r c #4D7CB5", -"s c #5C5E5A", -"t c #5482BA", -"u c #5180B8", -"v c #4F7EB6", -"w c #4C7BB4", -"x c #4979B2", -"y c #4676B1", -"z c #4373AF", -"A c #5A5C58", -"B c #406492", -"C c #31527F", -"D c #656D70", -"E c #5E605B", -"F c #C3C4C1", -"G c #80827F", -"H c #C8CAC7", -"I c #545651", -"J c #5E605C", -"K c #6A6E68", -"L c #72756F", -"M c #7B7E79", -"N c #848781", -"O c #8D908A", -"P c #969993", -"Q c #9FA29C", -"R c #416593", -"S c #244E89", -"T c #29518C", -"U c #2D558E", -"V c #325991", -"W c #375C93", -"X c #3B6096", -"Y c #5D7BA3", -"Z c #555753", -"` c #D0D2CE", -" . c #BBBEB7", -".. c #BABDB6", -"+. c #F2F2F1", -"@. c #345A92", -"#. c #81A8D3", -"$. c #83ABD4", -"%. c #8AAFD6", -"&. c #8FB3D8", -"*. c #92B4DA", -"=. c #5978A6", -"-. c #D2D4D1", -";. c #2C548E", -">. c #85ACD5", -",. c #92B5DA", -"'. c #98B9DB", -"). c #95B6DA", -"!. c #90B2D7", -"~. c #88ACD3", -"{. c #464644", -"]. c #719ECE", -"^. c #6E9BCC", -"/. c #6A98C9", -"(. c #6794C7", -"_. c #608EC2", -":. c #5C8BC0", -"<. c #757773", -"[. c #DADAD9", -"}. c #6391C4", -"|. c #5F8DC2", -"1. c #5C8ABF", -"2. c #5181B8", -"3. c #7F817C", -"4. c #ECECEA", -"5. c #5B89BF", -"6. c #5483BA", -"7. c #4D7DB6", -"8. c #4A7AB3", -"9. c #4776B1", -"0. c #80827D", -"a. c #EEEEEC", -"b. c #3F6392", -"c. c #82847F", -"d. c #848680", -"e. c #7F817D", -"f. c #7D7F7B", -"g. c #666863", -"h. c #A8ACA5", -"i. c #B1B3AC", -"j. c #E1E1DE", -"k. c #EDEDEB", -"l. c #E0E0DE", -"m. c #565854", -"n. c #767874", -" ", -" . + + + + + + + + + . ", -" @ # $ % % % % % % % $ & @ ", -" * $ = - ; > , ' ) ! ~ { * ", -" ] ^ / ( _ : < [ } | 1 2 ] ", -" 3 % 4 5 6 7 8 9 0 a ) % 3 ", -" b % c d e f g h i j c % b ", -" k % c l m n o p q r c % k ", -" s % c t u v w x y z c % s ", -" A $ B c c c c c c C D + + + + + + + + + . ", -" E F $ % % % % % % G # $ % % % % % % % $ H @ ", -" I J K L M N O P Q * $ R c S T U V W X Y { * ", -" Z ` .............] +.@.#.$.( %.[ &.*.=.2 ] ", -" Z -.+.+.+.+.+.+.+.3 % ;.>.: ,.'.).!.~.W % 3 ", -" {.Z Z Z Z Z Z Z Z b % c ].^./.(.e _.:.c % b ", -" <.[.<. k % c d }.|.1.i o 2.c % k ", -" 3.4.3. s % c 5.i 6.u 7.8.9.c % s ", -" 0.a.0. A $ B c c c c c c c b.$ A ", -" c...c. E F $ % % % % % % % $ F E ", -" 0.a.0.d.0.e.f.g.J K L M N O P Q h.i.J I ", -" 0.j.a...a.k.l.m.` ............... .` Z ", -" 0.0.c.0.3.n.Z -.+.+.+.+.+.+.+.+.+.-.Z ", -" {.Z Z Z Z Z Z Z Z Z Z Z {. ", -" "}; diff --git a/bsp/stm32_radio/network_disconnect.xpm b/bsp/stm32_radio/network_disconnect.xpm deleted file mode 100644 index 4b9ba17e15..0000000000 --- a/bsp/stm32_radio/network_disconnect.xpm +++ /dev/null @@ -1,98 +0,0 @@ -/* XPM */ -static char * network_disconnect_xpm[] = { -"24 24 71 1", -" c None", -". c #191918", -"+ c #181817", -"@ c #808080", -"# c #EDEDED", -"$ c #6B6B6A", -"% c #161615", -"& c #D8D8D8", -"* c #484848", -"= c #A4A4A4", -"- c #E6E6E6", -"; c #F3F3F3", -"> c #F5F5F6", -", c #C0C0C5", -"' c #F3F3F4", -") c #F0F0F0", -"! c #B7B4C3", -"~ c #B7B5C4", -"{ c #F5F5F5", -"] c #A19DB2", -"^ c #EEEEEE", -"/ c #B6B4C3", -"( c #B7B5C3", -"_ c #B3B1C1", -": c #B5B3C1", -"< c #EAEAEB", -"[ c #EFEFEF", -"} c #A19EB2", -"| c #A09CB1", -"1 c #928FA2", -"2 c #676571", -"3 c #D3D3D3", -"4 c #2A2A2A", -"5 c #090909", -"6 c #8B8B8B", -"7 c #0F0F0E", -"8 c #2A2A29", -"9 c #70706F", -"0 c #898988", -"a c #A8A8A8", -"b c #0E0E0D", -"c c #D1D1D1", -"d c #ECECEC", -"e c #EBEBEB", -"f c #D9D9D9", -"g c #C1C1C1", -"h c #B7B7B7", -"i c #BCBCBC", -"j c #141413", -"k c #7F7F7E", -"l c #B6B6B5", -"m c #C8C8C7", -"n c #C0C0C0", -"o c #949494", -"p c #E5E5E5", -"q c #5D5D5C", -"r c #242423", -"s c #9A9A99", -"t c #C8C8C8", -"u c #C5C5C5", -"v c #E8E8E8", -"w c #BABABA", -"x c #DEDEDE", -"y c #D5D5D5", -"z c #C2C2C2", -"A c #B3B3B3", -"B c #909090", -"C c #B6B6B6", -"D c #C4C4C4", -"E c #1F1F1D", -"F c #000000", -" ", -" .........+ ", -" +@#########$% ", -" .#&*******=-. ", -" .;*>,,>,,'*). ", -" .)*!~~~>{]*). ", -" .^*/(_:<<]*[. ", -" .^*}}|}<<]*^. ", -" .#*]]]]]12.........+ ", -" .;3*****4@#########$% ", -" 56######.#&*******=-. ", -" 7890aaaa.;*>,,>,,'*). ", -" b;)cdeee.)*!~~~>{]*). ", -" bfghiiii.^*/(_:<<]*[. ", -" j........^*}}|}<<]*^. ", -" klk .#*]]]]]]]*#. ", -" kmk .;3*******n#. ", -" k3k 56#########o. ", -" kpk 7890aaaa09q.r ", -" kpskkkkb;)cdeeetuuv. ", -" kwxyzABbfghiiiiCcyD. ", -" kkkkkkE...........F ", -" ", -" "}; diff --git a/bsp/stm32_radio/picture.c b/bsp/stm32_radio/picture.c deleted file mode 100644 index 99dcdca972..0000000000 --- a/bsp/stm32_radio/picture.c +++ /dev/null @@ -1,283 +0,0 @@ -#include -#include -#include - -#include -#include -#include -#include - -#define PICTURE_DIR "/pictures" - -enum picture_view_mode -{ - VIEW_SINGLE_MODE, - VIEW_DIR_MODE, - VIEW_FN_LIST_MODE -}; - -static rtgui_view_t* picture_view = RT_NULL; -static enum picture_view_mode view_mode = VIEW_SINGLE_MODE; - -/* current picture file name */ -static char current_fn[32] = {0}; -static const char** picture_fn_list; -static rt_uint8_t picture_fn_list_size, picture_fn_list_current; - -static void picture_show_prev() -{ - DIR* dir; - struct dirent* entry; - rt_bool_t is_last; - char fn[32]; - - fn[0] = '\0'; - is_last = RT_FALSE; - - dir = opendir(PICTURE_DIR); - if (dir == RT_NULL) - { - rt_kprintf("open directory failed\n"); - return; - } - - do - { - entry = readdir(dir); - if (entry != RT_NULL) - { - if (strstr(entry->d_name, ".hdc") != RT_NULL || - strstr(entry->d_name, ".HDC") != RT_NULL) - { - /* it's a HDC image */ - if ((strcmp(entry->d_name, current_fn) == 0) && - is_last != RT_TRUE) - { - if (fn[0] == '\0') - { - /* it should be the last image */ - is_last = RT_TRUE; - } - else - { - /* display image */ - strcpy(current_fn, fn); - rtgui_widget_update(RTGUI_WIDGET(picture_view)); - closedir(dir); - return; - } - } - strcpy(fn, entry->d_name); - } - } - } while(entry != RT_NULL); - - /* close directory */ - closedir(dir); - - if ((is_last == RT_TRUE) && fn[0] != '\0') - { - strcpy(current_fn, fn); - rtgui_widget_update(RTGUI_WIDGET(picture_view)); - } -} - -static void picture_show_next() -{ - DIR* dir; - struct dirent* entry; - rt_bool_t found, has_image; - - found = RT_FALSE; has_image = RT_FALSE; - -__restart: - dir = opendir(PICTURE_DIR); - if (dir == RT_NULL) - { - rt_kprintf("open directory failed\n"); - return; - } - - do - { - entry = readdir(dir); - if (entry != RT_NULL) - { - if (strstr(entry->d_name, ".hdc") != RT_NULL || - strstr(entry->d_name, ".HDC") != RT_NULL) - { - /* this directory includes image */ - has_image = RT_TRUE; - - if (found == RT_TRUE || current_fn[0] == '\0') - { - strcpy(current_fn, entry->d_name); - rtgui_widget_update(RTGUI_WIDGET(picture_view)); - - closedir(dir); - return; - } - - /* it's a HDC image */ - if (strcmp(entry->d_name, current_fn) == 0) - found = RT_TRUE; - } - } - } while(entry != RT_NULL); - - /* close directory */ - closedir(dir); - - if (has_image != RT_TRUE) return; - current_fn[0] = '\0'; - goto __restart; -} - -static rt_bool_t picture_view_event_handler(struct rtgui_widget* widget, struct rtgui_event* event) -{ - if (event->type == RTGUI_EVENT_PAINT) - { - struct rtgui_dc* dc; - struct rtgui_rect rect; - struct rtgui_image* image; - char fn[32]; - - dc = rtgui_dc_begin_drawing(widget); - if (dc == RT_NULL) return RT_FALSE; - rtgui_widget_get_rect(widget, &rect); - - /* open image */ - rt_snprintf(fn, sizeof(fn), "%s/%s", PICTURE_DIR, current_fn); - image = rtgui_image_create_from_file("hdc", - fn, RT_FALSE); - if (image != RT_NULL) - { - /* blit image */ - rtgui_image_blit(image, dc, &rect); - /* destroy image */ - rtgui_image_destroy(image); - } - else - { - rtgui_dc_fill_rect(dc, &rect); - rtgui_dc_draw_text(dc, "ûÓÐÎļþ±»´ò¿ª", &rect); - } - rtgui_dc_end_drawing(dc); - - return RT_FALSE; - } - else if (event->type == RTGUI_EVENT_KBD) - { - struct rtgui_event_kbd* ekbd = (struct rtgui_event_kbd*)event; - if (ekbd->type == RTGUI_KEYDOWN) - { - switch (ekbd->key) - { - case RTGUIK_RIGHT: - if (view_mode == VIEW_DIR_MODE) picture_show_next(); - else if (view_mode == VIEW_FN_LIST_MODE) - { - picture_fn_list_current ++; - if (picture_fn_list_current == picture_fn_list_size) - { - picture_fn_list_current = 0; - } - strcpy(current_fn, picture_fn_list[picture_fn_list_current]); - rtgui_widget_update(RTGUI_WIDGET(picture_view)); - } - break; - case RTGUIK_LEFT: - if (view_mode == VIEW_DIR_MODE) picture_show_prev(); - else if (view_mode == VIEW_FN_LIST_MODE) - { - if (picture_fn_list_current == 0) - { - picture_fn_list_current = picture_fn_list_size - 1; - } - else picture_fn_list_current --; - - strcpy(current_fn, picture_fn_list[picture_fn_list_current]); - rtgui_widget_update(RTGUI_WIDGET(picture_view)); - } - break; - case RTGUIK_RETURN: - { - rtgui_view_t* view; - - view = RTGUI_VIEW(widget); - - /* close this view */ - current_fn[0] = '\0'; - - /* end of modal */ - rtgui_view_end_modal(view, RTGUI_MODAL_OK); - picture_view = RT_NULL; - } - break; - } - } - return RT_FALSE; - } - - return rtgui_view_event_handler(widget, event); -} - -rtgui_view_t *picture_view_create(struct rtgui_workbench* workbench) -{ - /* create picture view */ - picture_view = rtgui_view_create("Picture Presentation"); - rtgui_widget_set_event_handler(RTGUI_WIDGET(picture_view), - picture_view_event_handler); - - rtgui_workbench_add_view(workbench, picture_view); - /* this view can be focused */ - RTGUI_WIDGET(picture_view)->flag |= RTGUI_WIDGET_FLAG_FOCUSABLE; - - /* show next picture */ - picture_show_next(); - - view_mode = VIEW_DIR_MODE; - - return picture_view; -} - -rtgui_view_t *picture_view_create_view_file(struct rtgui_workbench* workbench, - const char* filename) -{ - strcpy(current_fn, filename); - - /* create picture view */ - picture_view = rtgui_view_create("Picture Presentation"); - rtgui_widget_set_event_handler(RTGUI_WIDGET(picture_view), - picture_view_event_handler); - - rtgui_workbench_add_view(workbench, picture_view); - /* this view can be focused */ - RTGUI_WIDGET(picture_view)->flag |= RTGUI_WIDGET_FLAG_FOCUSABLE; - - view_mode = VIEW_SINGLE_MODE; - - return picture_view; -} - -rtgui_view_t *picture_view_create_view_list(struct rtgui_workbench* workbench, - const char* list[], rt_uint8_t size) -{ - picture_fn_list = list; - picture_fn_list_size = size; - picture_fn_list_current = 0; - strcpy(current_fn, picture_fn_list[picture_fn_list_current]); - - /* create picture view */ - picture_view = rtgui_view_create("Picture Presentation"); - rtgui_widget_set_event_handler(RTGUI_WIDGET(picture_view), - picture_view_event_handler); - - rtgui_workbench_add_view(workbench, picture_view); - /* this view can be focused */ - RTGUI_WIDGET(picture_view)->flag |= RTGUI_WIDGET_FLAG_FOCUSABLE; - - view_mode = VIEW_FN_LIST_MODE; - - return picture_view; -} diff --git a/bsp/stm32_radio/picture.h b/bsp/stm32_radio/picture.h deleted file mode 100644 index 867b9837ec..0000000000 --- a/bsp/stm32_radio/picture.h +++ /dev/null @@ -1,8 +0,0 @@ -#ifndef __PICTURE_H__ -#define __PICTURE_H__ - -rtgui_view_t *picture_view_create(struct rtgui_workbench* workbench); -rtgui_view_t *picture_view_create_view_file(struct rtgui_workbench* workbench, const char* fn); -rtgui_view_t *picture_view_create_view_list(struct rtgui_workbench* workbench, const char* list[], rt_uint8_t size); - -#endif diff --git a/bsp/stm32_radio/play.hdh b/bsp/stm32_radio/play.hdh deleted file mode 100644 index 276852cabc..0000000000 --- a/bsp/stm32_radio/play.hdh +++ /dev/null @@ -1,107 +0,0 @@ -static const unsigned char play_hdh[] = { - 0x48, 0x44, 0x43, 0x00, 0x1c, 0x00, 0x00, 0x00, 0x16, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xdb, 0x8d, 0xdb, 0x8d, - 0xdb, 0x8d, 0xdb, 0x8d, 0xdb, 0x8d, 0xdb, 0x8d, 0xdb, 0x8d, 0xdb, 0x8d, - 0xdb, 0x8d, 0xdb, 0x8d, 0xdb, 0x8d, 0xdb, 0x8d, 0xdb, 0x8d, 0xdb, 0x8d, - 0xdb, 0x8d, 0xdb, 0x8d, 0xdb, 0x8d, 0xdb, 0x8d, 0xdb, 0x8d, 0xdb, 0x8d, - 0xdb, 0x8d, 0xdb, 0x8d, 0xdb, 0x8d, 0xdb, 0x8d, 0xdb, 0x8d, 0xdb, 0x8d, - 0xdb, 0x8d, 0xdb, 0x8d, 0x9d, 0xae, 0xdf, 0xef, 0xbf, 0xe7, 0xbf, 0xe7, - 0xbf, 0xe7, 0xbf, 0xe7, 0xbf, 0xe7, 0xbf, 0xe7, 0xbf, 0xe7, 0xbf, 0xe7, - 0xbf, 0xe7, 0xbf, 0xe7, 0xbf, 0xe7, 0xbf, 0xe7, 0xbf, 0xe7, 0xbf, 0xe7, - 0xbf, 0xe7, 0xbf, 0xe7, 0xbf, 0xe7, 0xbf, 0xe7, 0xbf, 0xe7, 0xbf, 0xe7, - 0xbf, 0xe7, 0xbf, 0xe7, 0xbf, 0xe7, 0xbf, 0xe7, 0xbf, 0xe7, 0x9d, 0xae, - 0x9d, 0xae, 0xdf, 0xef, 0x9f, 0xdf, 0x9f, 0xdf, 0x9f, 0xdf, 0x9f, 0xdf, - 0x9f, 0xdf, 0x9f, 0xdf, 0x9f, 0xdf, 0x9f, 0xdf, 0x9f, 0xdf, 0x9f, 0xdf, - 0x9f, 0xdf, 0x9f, 0xdf, 0x9f, 0xdf, 0x9f, 0xdf, 0x9f, 0xdf, 0x9f, 0xdf, - 0x9f, 0xdf, 0x9f, 0xdf, 0x9f, 0xdf, 0x9f, 0xdf, 0x9f, 0xdf, 0x9f, 0xdf, - 0x9f, 0xdf, 0x9f, 0xdf, 0xdf, 0xef, 0x9d, 0xae, 0x7d, 0xae, 0xbf, 0xef, - 0x9f, 0xdf, 0x9f, 0xdf, 0x9f, 0xdf, 0x9f, 0xdf, 0x9f, 0xdf, 0x9f, 0xdf, - 0x9f, 0xdf, 0x9f, 0xdf, 0x9f, 0xdf, 0x9f, 0xdf, 0x9f, 0xdf, 0x9f, 0xdf, - 0x9f, 0xdf, 0x9f, 0xdf, 0x9f, 0xdf, 0x9f, 0xdf, 0x9f, 0xdf, 0x9f, 0xdf, - 0x9f, 0xdf, 0x9f, 0xdf, 0x9f, 0xdf, 0x9f, 0xdf, 0x9f, 0xdf, 0x9f, 0xdf, - 0xbf, 0xef, 0x7d, 0xae, 0x7d, 0xae, 0xbf, 0xe7, 0x7f, 0xd7, 0x7f, 0xd7, - 0x7f, 0xd7, 0x7f, 0xd7, 0x7f, 0xd7, 0x7f, 0xd7, 0x7f, 0xd7, 0x7f, 0xd7, - 0x7f, 0xd7, 0x7f, 0xd7, 0x7f, 0xd7, 0x7f, 0xd7, 0x7f, 0xd7, 0x7f, 0xd7, - 0x7f, 0xd7, 0x7f, 0xd7, 0x7f, 0xd7, 0x7f, 0xd7, 0x7f, 0xd7, 0x7f, 0xd7, - 0x7f, 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0xcf, 0x5f, 0xcf, 0x5f, 0xcf, - 0x5f, 0xcf, 0x5f, 0xcf, 0x5f, 0xcf, 0x5f, 0xcf, 0x9f, 0xdf, 0x5d, 0xa6, - 0x5c, 0xa6, 0x9f, 0xdf, 0x3f, 0xc7, 0x3f, 0xc7, 0x3f, 0xc7, 0x3f, 0xc7, - 0x3f, 0xc7, 0x3f, 0xc7, 0x3f, 0xc7, 0xd9, 0x4c, 0x3b, 0x4d, 0x3b, 0x4d, - 0xd9, 0x4c, 0x3f, 0xc7, 0x3f, 0xc7, 0xd9, 0x4c, 0x3b, 0x4d, 0x3b, 0x4d, - 0xd9, 0x4c, 0x3f, 0xc7, 0x3f, 0xc7, 0x3f, 0xc7, 0x3f, 0xc7, 0x3f, 0xc7, - 0x3f, 0xc7, 0x3f, 0xc7, 0x9f, 0xdf, 0x5c, 0xa6, 0x3c, 0xa6, 0x7f, 0xdf, - 0x3e, 0xc7, 0x3e, 0xc7, 0x3e, 0xc7, 0x3e, 0xc7, 0x3e, 0xc7, 0x3e, 0xc7, - 0x3e, 0xc7, 0xb8, 0x44, 0x1a, 0x4d, 0x1a, 0x4d, 0xb8, 0x44, 0x3e, 0xc7, - 0x3e, 0xc7, 0xb8, 0x44, 0x1a, 0x4d, 0x1a, 0x4d, 0xb8, 0x44, 0x3e, 0xc7, - 0x3e, 0xc7, 0x3e, 0xc7, 0x3e, 0xc7, 0x3e, 0xc7, 0x3e, 0xc7, 0x3e, 0xc7, - 0x7f, 0xdf, 0x3c, 0xa6, 0x3c, 0x9e, 0x7f, 0xd7, 0x1e, 0xbf, 0x1e, 0xbf, - 0x1e, 0xbf, 0x1e, 0xbf, 0x1e, 0xbf, 0x1e, 0xbf, 0x1e, 0xbf, 0x98, 0x3c, - 0xfa, 0x44, 0xfa, 0x44, 0x98, 0x3c, 0x1e, 0xbf, 0x1e, 0xbf, 0x98, 0x3c, - 0xfa, 0x44, 0xfa, 0x44, 0x98, 0x3c, 0x1e, 0xbf, 0x1e, 0xbf, 0x1e, 0xbf, - 0x1e, 0xbf, 0x1e, 0xbf, 0x1e, 0xbf, 0x1e, 0xbf, 0x7f, 0xd7, 0x3c, 0x9e, - 0x1c, 0x9e, 0x7f, 0xd7, 0xfe, 0xbe, 0xfe, 0xbe, 0xfe, 0xbe, 0xfe, 0xbe, - 0xfe, 0xbe, 0xfe, 0xbe, 0xfe, 0xbe, 0x77, 0x3c, 0xd9, 0x3c, 0xd9, 0x3c, - 0x77, 0x3c, 0xfe, 0xbe, 0xfe, 0xbe, 0x77, 0x3c, 0xd9, 0x3c, 0xd9, 0x3c, - 0x77, 0x3c, 0xfe, 0xbe, 0xfe, 0xbe, 0xfe, 0xbe, 0xfe, 0xbe, 0xfe, 0xbe, - 0xfe, 0xbe, 0xfe, 0xbe, 0x7f, 0xd7, 0x1c, 0x9e, 0x1c, 0x9e, 0x5e, 0xcf, - 0xfe, 0xbe, 0xfe, 0xbe, 0xfe, 0xbe, 0xfe, 0xbe, 0xfe, 0xbe, 0xfe, 0xbe, - 0xfe, 0xbe, 0x56, 0x34, 0x98, 0x3c, 0x98, 0x3c, 0x56, 0x34, 0xfe, 0xbe, - 0xfe, 0xbe, 0x56, 0x34, 0x98, 0x3c, 0x98, 0x3c, 0x56, 0x34, 0xfe, 0xbe, - 0xfe, 0xbe, 0xfe, 0xbe, 0xfe, 0xbe, 0xfe, 0xbe, 0xfe, 0xbe, 0xfe, 0xbe, - 0x5e, 0xcf, 0x1c, 0x9e, 0xfc, 0x95, 0x5e, 0xcf, 0xfe, 0xb6, 0xfe, 0xb6, - 0xfe, 0xb6, 0xfe, 0xb6, 0xfe, 0xb6, 0xfe, 0xb6, 0xfe, 0xb6, 0x36, 0x34, - 0x78, 0x34, 0x78, 0x34, 0x36, 0x34, 0xfe, 0xb6, 0xfe, 0xb6, 0x36, 0x34, - 0x78, 0x34, 0x78, 0x34, 0x36, 0x34, 0xfe, 0xb6, 0xfe, 0xb6, 0xfe, 0xb6, - 0xfe, 0xb6, 0xfe, 0xb6, 0xfe, 0xb6, 0xfe, 0xb6, 0x5e, 0xcf, 0xfc, 0x95, - 0xfb, 0x95, 0x3e, 0xcf, 0xde, 0xb6, 0xde, 0xb6, 0xde, 0xb6, 0xde, 0xb6, - 0xde, 0xb6, 0xde, 0xb6, 0xde, 0xb6, 0xf5, 0x2b, 0x57, 0x34, 0x57, 0x34, - 0xf5, 0x2b, 0xde, 0xb6, 0xde, 0xb6, 0xf5, 0x2b, 0x57, 0x34, 0x57, 0x34, - 0xf5, 0x2b, 0xde, 0xb6, 0xde, 0xb6, 0xde, 0xb6, 0xde, 0xb6, 0xde, 0xb6, - 0xde, 0xb6, 0xde, 0xb6, 0x3e, 0xcf, 0xfb, 0x95, 0xdb, 0x95, 0x3e, 0xc7, - 0xbe, 0xae, 0xbe, 0xae, 0xbe, 0xae, 0xbe, 0xae, 0xbe, 0xae, 0xbe, 0xae, - 0xbe, 0xae, 0xd5, 0x2b, 0x36, 0x2c, 0x36, 0x2c, 0xd5, 0x2b, 0xbe, 0xae, - 0xbe, 0xae, 0xd5, 0x2b, 0x36, 0x2c, 0x36, 0x2c, 0xd5, 0x2b, 0xbe, 0xae, - 0xbe, 0xae, 0xbe, 0xae, 0xbe, 0xae, 0xbe, 0xae, 0xbe, 0xae, 0xbe, 0xae, - 0x3e, 0xc7, 0xdb, 0x95, 0xdb, 0x95, 0x3e, 0xc7, 0xbe, 0xae, 0xbe, 0xae, - 0xbe, 0xae, 0xbe, 0xae, 0xbe, 0xae, 0xbe, 0xae, 0xbe, 0xae, 0x56, 0x44, - 0xd4, 0x23, 0xd4, 0x23, 0x56, 0x44, 0xbe, 0xae, 0xbe, 0xae, 0x56, 0x44, - 0xd4, 0x23, 0xd4, 0x23, 0x56, 0x44, 0xbe, 0xae, 0xbe, 0xae, 0xbe, 0xae, - 0xbe, 0xae, 0xbe, 0xae, 0xbe, 0xae, 0xbe, 0xae, 0x3e, 0xc7, 0xdb, 0x95, - 0xdb, 0x8d, 0x1e, 0xc7, 0x9d, 0xa6, 0x9d, 0xa6, 0x9d, 0xa6, 0x9d, 0xa6, - 0x9d, 0xa6, 0x9d, 0xa6, 0x9d, 0xa6, 0x9d, 0xa6, 0x9d, 0xa6, 0x9d, 0xa6, - 0x9d, 0xa6, 0x9d, 0xa6, 0x9d, 0xa6, 0x9d, 0xa6, 0x9d, 0xa6, 0x9d, 0xa6, - 0x9d, 0xa6, 0x9d, 0xa6, 0x9d, 0xa6, 0x9d, 0xa6, 0x9d, 0xa6, 0x9d, 0xa6, - 0x9d, 0xa6, 0x9d, 0xa6, 0x1e, 0xc7, 0xdb, 0x8d, 0xbb, 0x8d, 0x1e, 0xbf, - 0x9d, 0xa6, 0x9d, 0xa6, 0x9d, 0xa6, 0x9d, 0xa6, 0x9d, 0xa6, 0x9d, 0xa6, - 0x9d, 0xa6, 0x9d, 0xa6, 0x9d, 0xa6, 0x9d, 0xa6, 0x9d, 0xa6, 0x9d, 0xa6, - 0x9d, 0xa6, 0x9d, 0xa6, 0x9d, 0xa6, 0x9d, 0xa6, 0x9d, 0xa6, 0x9d, 0xa6, - 0x9d, 0xa6, 0x9d, 0xa6, 0x9d, 0xa6, 0x9d, 0xa6, 0x9d, 0xa6, 0x9d, 0xa6, - 0x1e, 0xbf, 0xbb, 0x8d, 0xbb, 0x8d, 0x1e, 0xbf, 0x9d, 0xa6, 0x9d, 0xa6, - 0x9d, 0xa6, 0x9d, 0xa6, 0x9d, 0xa6, 0x9d, 0xa6, 0x9d, 0xa6, 0x9d, 0xa6, - 0x9d, 0xa6, 0x9d, 0xa6, 0x9d, 0xa6, 0x9d, 0xa6, 0x9d, 0xa6, 0x9d, 0xa6, - 0x9d, 0xa6, 0x9d, 0xa6, 0x9d, 0xa6, 0x9d, 0xa6, 0x9d, 0xa6, 0x9d, 0xa6, - 0x9d, 0xa6, 0x9d, 0xa6, 0x9d, 0xa6, 0x9d, 0xa6, 0x1e, 0xbf, 0xbb, 0x8d, - 0xbb, 0x8d, 0xfe, 0xbe, 0xfe, 0xbe, 0xfe, 0xbe, 0xfe, 0xbe, 0xfe, 0xbe, - 0xfe, 0xbe, 0xfe, 0xbe, 0xfe, 0xbe, 0xfe, 0xbe, 0xfe, 0xbe, 0xfe, 0xbe, - 0xfe, 0xbe, 0xfe, 0xbe, 0xfe, 0xbe, 0xfe, 0xbe, 0xfe, 0xbe, 0xfe, 0xbe, - 0xfe, 0xbe, 0xfe, 0xbe, 0xfe, 0xbe, 0xfe, 0xbe, 0xfe, 0xbe, 0xfe, 0xbe, - 0xfe, 0xbe, 0xfe, 0xbe, 0xfe, 0xbe, 0xbb, 0x8d, 0xdb, 0x8d, 0xdb, 0x8d, - 0xdb, 0x8d, 0xdb, 0x8d, 0xdb, 0x8d, 0xdb, 0x8d, 0xdb, 0x8d, 0xdb, 0x8d, - 0xdb, 0x8d, 0xdb, 0x8d, 0xdb, 0x8d, 0xdb, 0x8d, 0xdb, 0x8d, 0xdb, 0x8d, - 0xdb, 0x8d, 0xdb, 0x8d, 0xdb, 0x8d, 0xdb, 0x8d, 0xdb, 0x8d, 0xdb, 0x8d, - 0xdb, 0x8d, 0xdb, 0x8d, 0xdb, 0x8d, 0xdb, 0x8d, 0xdb, 0x8d, 0xdb, 0x8d, - 0xdb, 0x8d, 0xdb, 0x8d, -}; diff --git a/bsp/stm32_radio/play_list.c b/bsp/stm32_radio/play_list.c deleted file mode 100644 index 32c7d1d002..0000000000 --- a/bsp/stm32_radio/play_list.c +++ /dev/null @@ -1,103 +0,0 @@ -#include "play_list.h" -#include "player_ui.h" -#include "mp3.h" - -#include - -static struct play_item **play_list = RT_NULL; -static rt_uint16_t play_list_size = 0; -static rt_int16_t play_list_current = 0; - -void play_list_clear() -{ - rt_uint32_t index; - - for (index = 0; index < play_list_size; index ++) - { - rt_free(play_list[index]->fn); - rt_free(play_list[index]); - - play_list[index] = RT_NULL; - } - - rt_free(play_list); - play_list = RT_NULL; - play_list_size = 0; -} - -char* play_list_start() -{ - play_list_current = 0; - return play_list[play_list_current]->fn; -} - -rt_bool_t play_list_is_end() -{ - if ((play_list_current == play_list_size - 1) || - play_list_size == 0) - return RT_TRUE; - - return RT_FALSE; -} - -rt_uint32_t play_list_items(void) -{ - return play_list_size; -} - -struct play_item* play_list_item(rt_uint32_t n) -{ - if (n > play_list_size) return RT_NULL; - return play_list[n]; -} - -void play_list_append(char* fn) -{ - play_list_size ++; - if (play_list == RT_NULL) - play_list = (struct play_item**) rt_malloc (play_list_size * sizeof(struct play_item*)); - else - play_list = (struct play_item**) rt_realloc(play_list, play_list_size * sizeof(struct play_item*)); - - play_list[play_list_size - 1] = (struct play_item*)rt_malloc(sizeof(struct play_item)); - if (strstr(fn, ".mp3") != RT_NULL || - strstr(fn, ".MP3") != RT_NULL) - { - struct tag_info info; - - memset(&info, 0, sizeof(info)); - mp3_get_info(fn, &info); - if (info.title[0] == '\0') - rt_snprintf(play_list[play_list_size - 1]->title, sizeof(play_list[play_list_size - 1]->title), - "<δ֪ÃûÒôÀÖ>"); - else - strcpy(play_list[play_list_size - 1]->title, info.title); - - play_list[play_list_size - 1]->fn = rt_strdup(fn); - play_list[play_list_size - 1]->duration = info.duration; - } - else - { - rt_snprintf(play_list[play_list_size - 1]->title, sizeof(play_list[play_list_size - 1]->title), - "<δ֪ÃûÒôÀÖ>"); - play_list[play_list_size - 1]->fn = rt_strdup(fn); - play_list[play_list_size - 1]->duration = 0; - } -} - -char* play_list_next() -{ - if (play_list_current < play_list_size - 1) play_list_current ++; - return play_list[play_list_current]->fn; -} - -char* play_list_prev() -{ - if (play_list_current > 0) play_list_current --; - return play_list[play_list_current]->fn; -} - -char* play_list_current_item() -{ - return play_list[play_list_current]->fn; -} diff --git a/bsp/stm32_radio/play_list.h b/bsp/stm32_radio/play_list.h deleted file mode 100644 index f7aa05382f..0000000000 --- a/bsp/stm32_radio/play_list.h +++ /dev/null @@ -1,25 +0,0 @@ -#ifndef __PLAY_LIST_H__ -#define __PLAY_LIST_H__ - -#include - -struct play_item -{ - char title[40]; - char *fn; - rt_uint32_t duration; -}; - -void play_list_clear(void); - -char* play_list_start(void); -rt_bool_t play_list_is_end(void); -rt_uint32_t play_list_items(void); -struct play_item* play_list_item(rt_uint32_t n); - -void play_list_append(char* fn); -char* play_list_next(void); -char* play_list_prev(void); -char* play_list_current_item(void); - -#endif diff --git a/bsp/stm32_radio/player_bg.c b/bsp/stm32_radio/player_bg.c deleted file mode 100644 index 6a037fc531..0000000000 --- a/bsp/stm32_radio/player_bg.c +++ /dev/null @@ -1,105 +0,0 @@ -#include "player_bg.h" -#include "player_ui.h" -#include "mp3.h" - -#include - -rt_bool_t is_playing = RT_FALSE; -static rt_mq_t player_thread_mq; -static struct rt_thread player_thread_tid; -static rt_uint8_t player_thread_stack[0x400]; - -rt_bool_t player_is_playing() -{ - return is_playing; -} - -void player_play_req(const char* fn) -{ - struct player_request request; - request.type = PLAYER_REQUEST_PLAY_SINGLE_FILE; - strncpy(request.fn, fn, sizeof(request.fn)); - - /* send to message queue */ - rt_mq_send(player_thread_mq, (void*)&request, sizeof(struct player_request)); -} - -void player_stop_req() -{ - is_playing = RT_FALSE; -} - -void player_thread(void* parameter) -{ - rt_err_t result; - struct player_request request; - - while(1) - { - /* get request from message queue */ - result = rt_mq_recv(player_thread_mq, (void*)&request, - sizeof(struct player_request), RT_WAITING_FOREVER); - if (result == RT_EOK) - { - switch (request.type) - { - case PLAYER_REQUEST_PLAY_SINGLE_FILE: - if ((strstr(request.fn, ".mp3") != RT_NULL) || - (strstr(request.fn, ".MP3") != RT_NULL)) - { - is_playing = RT_TRUE; - player_notify_play(); - - /* get music tag information */ - mp3(request.fn); - - player_notify_stop(); - is_playing = RT_FALSE; - } - else if ((strstr(request.fn, ".wav") != RT_NULL) || - (strstr(request.fn, ".WAV") != RT_NULL)) - { - is_playing = RT_TRUE; - player_notify_play(); - wav(request.fn); - player_notify_stop(); - is_playing = RT_FALSE; - } - else if ((strstr(request.fn, "http://") == request.fn || - (strstr(request.fn, "HTTP://") == request.fn ))) - { - is_playing = RT_TRUE; - player_notify_play(); - ice_mp3(request.fn); - /* notfiy net buffer worker to stop */ - net_buf_stop_job(); - player_notify_stop(); - is_playing = RT_FALSE; - } - break; - } - } - } -} - -void player_init() -{ - rt_err_t result; - - /* create player thread */ - player_thread_mq = rt_mq_create("player", sizeof(struct player_request), - 8, RT_IPC_FLAG_FIFO); - RT_ASSERT(player_thread_mq != RT_NULL); - - result = rt_thread_init(&player_thread_tid, "ply_bg", player_thread, RT_NULL, - player_thread_stack, sizeof(player_thread_stack), - 20, 5); - - if (result != RT_EOK) rt_kprintf("player thread init failed\n"); - else - { - rt_thread_startup(&player_thread_tid); - player_ui_init(); - } -} - diff --git a/bsp/stm32_radio/player_bg.h b/bsp/stm32_radio/player_bg.h deleted file mode 100644 index 6329d6d6bb..0000000000 --- a/bsp/stm32_radio/player_bg.h +++ /dev/null @@ -1,32 +0,0 @@ -#ifndef __PLAYER_BG_H__ -#define __PLAYER_BG_H__ - -#include - -enum PLAYER_REQUEST_TYPE -{ - PLAYER_REQUEST_PLAY_SINGLE_FILE, - PLAYER_REQUEST_PLAY_LIST, - PLAYER_REQUEST_STOP, - PLAYER_REQUEST_FREEZE, - PLAYER_REQUEST_UPDATE_RADIO_LIST, -}; - -struct player_request -{ - enum PLAYER_REQUEST_TYPE type; - char fn[64]; -}; - -/* get player background status */ -rt_bool_t player_is_playing(void); -/* player background thread init */ -void player_init(void); - -/* send a stop request to player background thread */ -void player_stop_req(void); -/* send a play request to player background thread */ -void player_play_req(const char* fn); - -#endif - diff --git a/bsp/stm32_radio/player_ui.c b/bsp/stm32_radio/player_ui.c deleted file mode 100644 index ad6ad51acc..0000000000 --- a/bsp/stm32_radio/player_ui.c +++ /dev/null @@ -1,966 +0,0 @@ -#include -#include -#include - -#include -#include -#include -#include -#include - -#include -#include - -#include "mp3.h" -#include "picture.h" -#include "player_ui.h" -#include "player_bg.h" -#include "play_list.h" -#include "station_list.h" - -#include "play.hdh" -#include "stop.hdh" - -#define RADIO_FN "/radio.pls" - -const static char *time_bg_xpm[] = -{ - "48 20 7 1", - ". c #007DC6", - "+ c #0079C6", - "@ c #0079BD", - "# c #0075BD", - "$ c #0071BD", - "% c #0071B5", - "& c #006DB5", - "................................................", - "................................................", - "................................................", - "................................................", - "................................................", - "++++++++++++++++++++++++++++++++++++++++++++++++", - "++++++++++++++++++++++++++++++++++++++++++++++++", - "@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@", - "@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@", - "@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@", - "################################################", - "################################################", - "################################################", - "################################################", - "$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$", - "%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%", - "%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%", - "&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&", - "&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&", - "&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&", - "&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&" -}; - -static struct rtgui_view* home_view; -static struct rtgui_list_view* function_view; -static struct rtgui_workbench* workbench; -static rtgui_timer_t* info_timer; -static rt_thread_t player_ui_tid = RT_NULL; -static enum PLAYER_MODE player_mode = PLAYER_STOP; -static enum PLAYER_STEP next_step = PLAYER_STEP_STOP; -static struct tag_info tinfo; -static rt_uint32_t play_time; -static rtgui_image_t *time_bg_image; - -void player_play_file(const char* fn); -void player_play_url(const char* url); - -static void info_timer_timeout(rtgui_timer_t* timer, void* parameter) -{ - struct rtgui_dc* dc; - rtgui_color_t saved; - - dc = rtgui_dc_begin_drawing(RTGUI_WIDGET(home_view)); - if (dc == RT_NULL) return ; - - saved = RTGUI_WIDGET_FOREGROUND(RTGUI_WIDGET(home_view)); - - RTGUI_WIDGET_FOREGROUND(RTGUI_WIDGET(home_view)) = RTGUI_RGB(206, 231, 255); - rtgui_dc_draw_hline(dc, 14, 14 + (tinfo.position * 212) / tinfo.duration, 75); - - if ((player_mode == PLAYER_PLAY_RADIO) && ((tinfo.position * 212 + 14)/tinfo.duration) < 226) - { - RTGUI_WIDGET_FOREGROUND(RTGUI_WIDGET(home_view)) = RTGUI_RGB(82, 199, 16); - rtgui_dc_draw_hline(dc, 14 + (tinfo.position * 212) / tinfo.duration, 226, 75); - } - RTGUI_WIDGET_FOREGROUND(RTGUI_WIDGET(home_view)) = saved; - - if (player_mode == PLAYER_PLAY_FILE) - { - rtgui_rect_t rect; - char line[32]; - - play_time++; - rt_snprintf(line, sizeof(line), "%3d:%02d", play_time / 60, play_time % 60); - - rect.x1 = 172; - rect.y1 = 39; - rect.x2 = 220; - rect.y2 = 59; - rtgui_image_blit(time_bg_image, dc, &rect); - rtgui_dc_draw_text(dc, line, &rect); - } - - rtgui_dc_end_drawing(dc); -} - -static void player_update_tag_info(struct rtgui_dc* dc) -{ - rtgui_rect_t rect; - char line[32]; - rtgui_color_t saved; - rtgui_image_t *background; - - saved = rtgui_dc_get_color(dc); - rtgui_dc_set_color(dc, black); - - rect.x1 = 0; - rect.y1 = 0; - rect.x2 = 240; - rect.y2 = 65; - /* draw background */ - background = rtgui_image_create_from_file("hdc", "/resource/bg.hdc", RT_FALSE); - if (background != RT_NULL) - { - rtgui_image_blit(background, dc, &rect); - rtgui_image_destroy(background); - - background = RT_NULL; - } - else - { - rtgui_dc_fill_rect(dc, &rect); - } - - /* draw playing information */ - rect.x1 = 28; - rect.y1 = 12; - rect.x2 = 220; - rect.y2 = rect.y1 + 16; - if (player_mode == PLAYER_STOP) - { - rt_snprintf(line, sizeof(line), "ÍøÂçÊÕÒô»ú"); - rtgui_dc_draw_text(dc, line, &rect); - } - else - rtgui_dc_draw_text(dc, tinfo.title, &rect); - - rect.x1 = 28; - rect.y1 = 39; - rect.x2 = 220; - rect.y2 = 59; - if (player_mode == PLAYER_STOP) - { - rt_snprintf(line, sizeof(line), "radio.rt-thread.org"); - rtgui_dc_draw_text(dc, line, &rect); - } - else - rtgui_dc_draw_text(dc, tinfo.artist, &rect); - - if ((tinfo.duration != 0) && player_mode == PLAYER_PLAY_FILE) - { - play_time = 0; - - rect.x1 = 172; - rt_snprintf(line, sizeof(line), " 0:00"); - rtgui_dc_draw_text(dc, line, &rect); - } - - rtgui_dc_set_color(dc, saved); -} - -static rt_uint32_t read_line(int fd, char* line, rt_uint32_t line_size) -{ - char *pos, *next; - rt_uint32_t length; - - length = read(fd, line, line_size); - if (length > 0) - { - pos = strstr(line, "\r\n"); - if (pos == RT_NULL) - { - pos = strstr(line, "\n"); - next = pos ++; - } - else next = pos + 2; - - if (pos != RT_NULL) - { - *pos = '\0'; - - /* move back */ - lseek(fd, -(length - (next - line)), SEEK_CUR); - - length = pos - line; - } - else length = 0; - } - - return length; -} - -static void function_play_radio(void* parameter) -{ - struct station_list* list; - struct station_item* item; - - list = station_list_create(RADIO_FN); - if (list != RT_NULL) - { - item = station_list_select(list, workbench); - if (item != RT_NULL) - { - player_play_url(item->url); - } - - station_list_destroy(list); - } -} - -static void function_radio_list_update(void* parameter) -{ - extern void update_radio_list_req(void); - extern void update_radio_thread(void* parameter); - extern rt_mq_t update_radio_mq; - rt_thread_t update_radio_list_thread; - - rtgui_view_t *view; - extern rtgui_view_t* update_radio_list_view_create(rtgui_workbench_t* workbench); - - if(update_radio_mq == RT_NULL) - { - update_radio_mq = rt_mq_create("updateRadioList", sizeof(struct player_request), - 1, RT_IPC_FLAG_FIFO); - RT_ASSERT(update_radio_mq != RT_NULL); - - update_radio_list_thread = rt_thread_create("update_bg", update_radio_thread, RT_NULL, - 1024 ,20, 5); - - if (update_radio_list_thread == RT_NULL) rt_kprintf("updateRadioList thread init failed\n"); - else - { - rt_thread_startup(update_radio_list_thread); - update_radio_list_req(); - } - } - - view = update_radio_list_view_create(workbench); - if (view != RT_NULL) - { - rtgui_view_show(view, RT_FALSE); - } - - return; -} - -static void function_filelist(void* parameter) -{ - rtgui_rect_t rect; - rtgui_filelist_view_t *view; - - rtgui_widget_get_rect(RTGUI_WIDGET(workbench), &rect); - view = rtgui_filelist_view_create(workbench, "/", "*.*", &rect); - if (view != RT_NULL) - { - if (rtgui_view_show(RTGUI_VIEW(view), RT_TRUE) == RTGUI_MODAL_OK) - { - char fn[64]; - - /* get open file */ - rt_snprintf(fn, 64, "%s/%s", view->current_directory, - view->items[view->current_item].name); - - if (strstr(view->items[view->current_item].name , ".mp3") != RT_NULL || - strstr(view->items[view->current_item].name , ".MP3") != RT_NULL || - strstr(view->items[view->current_item].name , ".wav") != RT_NULL || - strstr(view->items[view->current_item].name , ".WAV") != RT_NULL) - { - /* clear old play list */ - play_list_clear(); - play_list_append(fn); - - player_mode = PLAYER_PLAY_FILE; - next_step = PLAYER_STEP_STOP; - player_play_file(play_list_start()); - } - else if (strstr(view->items[view->current_item].name , ".m3u") != RT_NULL || - strstr(view->items[view->current_item].name , ".M3U") != RT_NULL) - { - /* read all of music filename to a list */ - int fd; - char line[64]; - - fd = open(fn, O_RDONLY, 0); - if (fd >= 0) - { - rt_uint32_t length; - - length = read_line(fd, line, sizeof(line)); - /* clear old play list */ - play_list_clear(); - - do - { - length = read_line(fd, line, sizeof(line)); - if (length > 0) - { - if (strstr(line, "http:") != RT_NULL) - { - play_list_append(line); - } - else if (line[0] != '/') - { - rt_snprintf(fn, sizeof(fn), "%s/%s", view->current_directory, line); - play_list_append(fn); - } - else play_list_append(line); - } - } - while (length > 0); - - close(fd); - - if (play_list_items() > 0) - { - player_mode = PLAYER_PLAY_FILE; - next_step = PLAYER_STEP_NEXT; - player_play_file(play_list_start()); - } - } - } - } - - /* destroy view */ - rtgui_filelist_view_destroy(view); - } - - return; -} - -static void function_device(void* parameter) -{ - rtgui_view_t *view; - extern rtgui_view_t* device_view_create(rtgui_workbench_t* workbench); - - view = device_view_create(workbench); - if (view != RT_NULL) - { - rtgui_view_show(view, RT_FALSE); - } - - return; -} - -static void function_player(void* parameter) -{ - rtgui_view_show(home_view, RT_FALSE); - return; -} - -static void function_show_picure(void* parameter) -{ - rtgui_view_t *view; - - view = picture_view_create(workbench); - if (view != RT_NULL) - { - rtgui_view_show(view, RT_TRUE); - rtgui_view_destroy(view); - } - - return; -} - -void function_action(void* parameter) -{ - rt_kprintf("item action!\n"); - return; -} - -void function_cable(void* parameter) -{ - extern void USB_cable(void); - USB_cable(); -} - -const struct rtgui_list_item function_list[] = -{ - {"Ñ¡Ôñµç̨", RT_NULL, function_play_radio, RT_NULL}, - {"¸üеç̨", RT_NULL, function_radio_list_update, RT_NULL}, - {"²¥·ÅÎļþ", RT_NULL, function_filelist, RT_NULL}, - {"ä¯ÀÀͼƬ", RT_NULL, function_show_picure, RT_NULL}, - {"É豸ÐÅÏ¢", RT_NULL, function_device, RT_NULL}, - {"Ñ¡ÏîÉèÖÃ", RT_NULL, function_action, RT_NULL}, - {"USB Áª»ú", RT_NULL, function_cable, RT_NULL}, - {"·µ»Ø²¥·ÅÆ÷", RT_NULL, function_player, RT_NULL}, -}; - -void player_set_position(rt_uint32_t position) -{ - if (player_mode != PLAYER_PLAY_RADIO) - { - tinfo.position = position / (tinfo.bit_rate / 8); - } - else - { - tinfo.position = position; - } -} - -void player_set_title(const char* title) -{ - strncpy(tinfo.title, title, 40); -} - -void player_set_buffer_status(rt_bool_t buffering) -{ - if (buffering == RT_TRUE) - strncpy(tinfo.artist, "»º³åÖÐ...", 40); - else - strncpy(tinfo.artist, "²¥·ÅÖÐ...", 40); -} - -enum PLAYER_MODE player_get_mode() -{ - return player_mode; -} - -void player_play_file(const char* fn) -{ - struct rtgui_dc* dc; - rtgui_color_t saved; - rt_bool_t is_mp3; - - is_mp3 = RT_FALSE; - - if (strstr(fn, ".mp3") != RT_NULL || - strstr(fn, ".MP3") != RT_NULL) - is_mp3 = RT_TRUE; - else if (strstr(fn, ".wav") != RT_NULL || - strstr(fn, ".wav") != RT_NULL) - is_mp3 = RT_FALSE; - else return; /* not supported audio format */ - - if (is_mp3 == RT_TRUE) - { - /* get music tag information */ - mp3_get_info(fn, &tinfo); - if (tinfo.title[0] == '\0') - rt_snprintf(tinfo.title, sizeof(tinfo.title), "<δ֪ÃûÒôÀÖ>"); - } - else - { - /* wav file */ - rt_snprintf(tinfo.title, sizeof(tinfo.title), "<δ֪ÃûÒôÀÖ>"); - rt_snprintf(tinfo.artist, sizeof(tinfo.title), ""); - - tinfo.duration = 0; - } - - /* set player mode */ - player_mode = PLAYER_PLAY_FILE; - - dc = rtgui_dc_begin_drawing(RTGUI_WIDGET(home_view)); - if (dc != RT_NULL) - { - rtgui_rect_t play_rect; - rtgui_image_t *button; - - /* update tag information */ - player_update_tag_info(dc); - - /* reset progress bar */ - saved = RTGUI_WIDGET_FOREGROUND(RTGUI_WIDGET(home_view)); - RTGUI_WIDGET_FOREGROUND(RTGUI_WIDGET(home_view)) = RTGUI_RGB(82, 199, 16); - rtgui_dc_draw_hline(dc, 14, 226, 75); - RTGUI_WIDGET_FOREGROUND(RTGUI_WIDGET(home_view)) = saved; - - /* update play button */ - button = rtgui_image_create_from_mem("hdc", - play_hdh, sizeof(play_hdh), RT_FALSE); - play_rect.x1 = 32; - play_rect.y1 = 92; - play_rect.x2 = 61; - play_rect.y2 = 114; - rtgui_image_blit(button, dc, &play_rect); - rtgui_image_destroy(button); - - rtgui_dc_end_drawing(dc); - } - - rtgui_view_show(home_view, RT_FALSE); - - player_play_req(fn); -} - -void player_play_url(const char* url) -{ - struct rtgui_dc* dc; - - /* set music tag information */ - strncpy(tinfo.title, "ÍøÂçµç̨", 40); - player_set_buffer_status(RT_TRUE); - tinfo.duration = 320 * 1024; /* 320 k */ - - /* set player mode */ - player_mode = PLAYER_PLAY_RADIO; - - dc = rtgui_dc_begin_drawing(RTGUI_WIDGET(home_view)); - if (dc != RT_NULL) - { - rtgui_rect_t play_rect; - rtgui_image_t *button; - - /* update tag information */ - player_update_tag_info(dc); - - /* update play button */ - button = rtgui_image_create_from_mem("hdc", - play_hdh, sizeof(play_hdh), RT_FALSE); - play_rect.x1 = 32; - play_rect.y1 = 92; - play_rect.x2 = 61; - play_rect.y2 = 114; - rtgui_image_blit(button, dc, &play_rect); - rtgui_image_destroy(button); - - rtgui_dc_end_drawing(dc); - } - - rtgui_view_show(home_view, RT_FALSE); - - player_play_req(url); -} - -static rt_bool_t home_view_event_handler(struct rtgui_widget* widget, struct rtgui_event* event) -{ - if (event->type == RTGUI_EVENT_PAINT) - { - struct rtgui_dc* dc; - struct rtgui_rect rect; - rtgui_color_t saved; - rtgui_image_t *background; - - dc = rtgui_dc_begin_drawing(widget); - if (dc == RT_NULL) return RT_FALSE; - rtgui_widget_get_rect(widget, &rect); - saved = RTGUI_WIDGET_FOREGROUND(widget); - - /* draw background */ - background = rtgui_image_create_from_file("hdc", "/resource/bg.hdc", RT_FALSE); - if (background != RT_NULL) - { - rtgui_image_t *play; - rtgui_rect_t play_rect; - - rtgui_image_blit(background, dc, &rect); - rtgui_image_destroy(background); - - background = RT_NULL; - - if (player_mode == PLAYER_STOP) - play = rtgui_image_create_from_mem("hdc", stop_hdh, sizeof(stop_hdh), RT_FALSE); - else - play = rtgui_image_create_from_mem("hdc", play_hdh, sizeof(play_hdh), RT_FALSE); - play_rect.x1 = 32; - play_rect.y1 = 92; - play_rect.x2 = 61; - play_rect.y2 = 114; - rtgui_image_blit(play, dc, &play_rect); - rtgui_image_destroy(play); - } - else - { - rtgui_dc_fill_rect(dc, &rect); - } - - /* draw playing information */ - rtgui_dc_set_color(dc, black); - { - char line[32]; - - rect.x1 = 28; - rect.y1 = 12; - rect.x2 = 220; - rect.y2 = rect.y1 + 16; - if (player_mode == PLAYER_STOP) - { - rt_snprintf(line, sizeof(line), "ÍøÂçÊÕÒô»ú"); - rtgui_dc_draw_text(dc, line, &rect); - } - else - rtgui_dc_draw_text(dc, tinfo.title, &rect); - - rect.x1 = 28; - rect.y1 = 39; - rect.x2 = 170; - rect.y2 = 59; - if (player_mode == PLAYER_STOP) - { - rect.x2 = 220; - rt_snprintf(line, sizeof(line), "radio.rt-thread.org"); - rtgui_dc_draw_text(dc, line, &rect); - } - else - rtgui_dc_draw_text(dc, tinfo.artist, &rect); - - if ((tinfo.duration != 0) && (player_mode == PLAYER_PLAY_FILE)) - { - rt_uint32_t t = player_mode == PLAYER_STOP ? tinfo.duration : play_time; - - rect.x1 = 172; - rect.x2 = 220; - rt_snprintf(line, sizeof(line), "%3d:%02d", t / 60, t % 60); - rtgui_dc_draw_text(dc, line, &rect); - } - } - - RTGUI_WIDGET_FOREGROUND(widget) = RTGUI_RGB(82, 199, 16); - rtgui_dc_draw_hline(dc, 14, 226, 75); - - RTGUI_WIDGET_FOREGROUND(widget) = saved; - - if (player_mode == PLAYER_PLAY_FILE) - { - char line[32]; - rt_uint32_t index; - struct play_item* item; - - rect.x1 = 20; - rect.y1 = 150; - rect.x2 = 170; - rect.y2 = 168; - for (index = 0; index < play_list_items() && index < 8; index ++) - { - item = play_list_item(index); - rtgui_dc_draw_text(dc, item->title, &rect); - - rect.x1 = 172; - rect.x2 = 220; - rt_snprintf(line, sizeof(line), "%3d:%02d", item->duration / 60, item->duration % 60); - rtgui_dc_draw_text(dc, line, &rect); - - /* move to next item */ - rect.x1 = 20; - rect.x2 = 170; - rect.y1 += 18; - rect.y2 += 18; - } - } - rtgui_dc_end_drawing(dc); - - return RT_FALSE; - } - else if (event->type == RTGUI_EVENT_KBD) - { - struct rtgui_event_kbd* ekbd = (struct rtgui_event_kbd*)event; - if (ekbd->type == RTGUI_KEYDOWN) - { - switch (ekbd->key) - { - case RTGUIK_RIGHT: - if (player_mode == PLAYER_PLAY_FILE && play_list_items() > 0) - { - player_stop_req(); - next_step = PLAYER_STEP_NEXT; - } - break; - - case RTGUIK_LEFT: - if (player_mode == PLAYER_PLAY_FILE && play_list_items() > 0) - { - player_stop_req(); - next_step = PLAYER_STEP_PREV; - } - break; - - case RTGUIK_RETURN: - if (player_is_playing() == RT_TRUE) - { - player_stop_req(); - next_step = PLAYER_STEP_STOP; - } - else - { - if ((player_mode == PLAYER_STOP) && (play_list_items() > 0)) - { - next_step = PLAYER_STEP_NEXT; - player_play_file(play_list_current_item()); - } - } - break; - - case RTGUIK_DOWN: - rtgui_view_show(RTGUI_VIEW(function_view), RT_FALSE); - break; - } - } - return RT_FALSE; - } - else if (event->type == RTGUI_EVENT_COMMAND) - { - struct rtgui_event_command* ecmd = (struct rtgui_event_command*)event; - - switch (ecmd->command_id) - { - case PLAYER_REQUEST_PLAY_SINGLE_FILE: - case PLAYER_REQUEST_PLAY_LIST: - rtgui_timer_start(info_timer); - break; - - case PLAYER_REQUEST_STOP: - { - rtgui_timer_stop(info_timer); - - switch (next_step) - { - case PLAYER_STEP_STOP: -// #define TEST_MODE -#ifdef TEST_MODE - player_play_file(play_list_start()); - next_step = PLAYER_STEP_STOP; -#else - { - struct rtgui_dc* dc; - rtgui_color_t saved; - rtgui_image_t *button; - rtgui_rect_t play_rect; - - player_mode = PLAYER_STOP; - - dc = rtgui_dc_begin_drawing(widget); - if (dc == RT_NULL) return RT_FALSE; - - player_update_tag_info(dc); - - saved = RTGUI_WIDGET_FOREGROUND(widget); - - RTGUI_WIDGET_FOREGROUND(widget) = RTGUI_RGB(82, 199, 16); - rtgui_dc_draw_hline(dc, 14, 226, 75); - - /* update play button */ - button = rtgui_image_create_from_mem("hdc", stop_hdh, sizeof(stop_hdh), RT_FALSE); - play_rect.x1 = 32; - play_rect.y1 = 92; - play_rect.x2 = 61; - play_rect.y2 = 114; - rtgui_image_blit(button, dc, &play_rect); - rtgui_image_destroy(button); - - RTGUI_WIDGET_FOREGROUND(widget) = saved; - rtgui_dc_end_drawing(dc); - } -#endif - break; - - case PLAYER_STEP_NEXT: - if (play_list_is_end() == RT_TRUE) - { - struct rtgui_dc* dc; - rtgui_color_t saved; - rtgui_image_t *button; - rtgui_rect_t play_rect; - - /* set stat */ - next_step = PLAYER_STEP_STOP; - player_mode = PLAYER_STOP; - - /* update UI */ - dc = rtgui_dc_begin_drawing(widget); - if (dc == RT_NULL) return RT_FALSE; - - player_update_tag_info(dc); - - saved = RTGUI_WIDGET_FOREGROUND(widget); - - RTGUI_WIDGET_FOREGROUND(widget) = RTGUI_RGB(82, 199, 16); - rtgui_dc_draw_hline(dc, 14, 226, 75); - - /* update play button */ - button = rtgui_image_create_from_mem("hdc", - stop_hdh, sizeof(stop_hdh), RT_FALSE); - play_rect.x1 = 32; - play_rect.y1 = 92; - play_rect.x2 = 61; - play_rect.y2 = 114; - rtgui_image_blit(button, dc, &play_rect); - rtgui_image_destroy(button); - - RTGUI_WIDGET_FOREGROUND(widget) = saved; - rtgui_dc_end_drawing(dc); - } - else - { - player_play_file(play_list_next()); - next_step = PLAYER_STEP_NEXT; - } - break; - - case PLAYER_STEP_PREV: - player_play_file(play_list_prev()); - next_step = PLAYER_STEP_NEXT; - break; - }; - } - break; - - case PLAYER_REQUEST_FREEZE: - { - /* stop play */ - if (player_is_playing() == RT_TRUE) - { - player_stop_req(); - next_step = PLAYER_STEP_STOP; - } - - /* delay some tick */ - rt_thread_delay(50); - - /* show a modal view */ - { - rtgui_view_t *view; - rtgui_label_t *label; - rtgui_rect_t rect = {0, 0, 150, 150}, container_rect; - - rtgui_graphic_driver_get_default_rect(&container_rect); - /* set centre */ - rtgui_rect_moveto_align(&container_rect, &rect, RTGUI_ALIGN_CENTER_HORIZONTAL | RTGUI_ALIGN_CENTER_VERTICAL); - view = rtgui_view_create("USB"); - rtgui_workbench_add_view(workbench, view); - - /* set container to window rect */ - container_rect = rect; - - rect.x1 = 0; - rect.y1 = 0; - rect.x2 = 120; - rect.y2 = 20; - label = rtgui_label_create("USB Áª»úÖÐ..."); - rtgui_rect_moveto_align(&container_rect, &rect, RTGUI_ALIGN_CENTER_HORIZONTAL | RTGUI_ALIGN_CENTER_VERTICAL); - rtgui_widget_set_rect(RTGUI_WIDGET(label), &rect); - rtgui_container_add_child(RTGUI_CONTAINER(view), RTGUI_WIDGET(label)); - - rtgui_view_show(view, RT_TRUE); - /* never reach hear */ - } - } - default: - break; - } - - return RT_FALSE; - } - - return rtgui_view_event_handler(widget, event); -} - -rt_bool_t player_workbench_event_handler(rtgui_widget_t *widget, rtgui_event_t *event) -{ - if (event->type == RTGUI_EVENT_KBD) - { - struct rtgui_event_kbd* ekbd = (struct rtgui_event_kbd*)event; - if (((ekbd->type == RTGUI_KEYUP) && ekbd->key == RTGUIK_HOME) - && !RTGUI_WORKBENCH_IS_MODAL_MODE(workbench)) - { - /* active home view */ - if (workbench->current_view != home_view) - { - rtgui_view_show(home_view, RT_FALSE); - return RT_FALSE; - } - } - } - - return rtgui_workbench_event_handler(widget, event); -} - -static void player_entry(void* parameter) -{ - rt_mq_t mq; - rtgui_rect_t rect; - - mq = rt_mq_create("ply_ui", 256, 4, RT_IPC_FLAG_FIFO); - rtgui_thread_register(rt_thread_self(), mq); - - /* create information timer */ - info_timer = rtgui_timer_create(RT_TICK_PER_SECOND, RT_TIMER_FLAG_PERIODIC, info_timer_timeout, RT_NULL); - - time_bg_image = rtgui_image_create_from_mem("xpm", (rt_uint8_t *) time_bg_xpm, sizeof(time_bg_xpm), RT_TRUE); - - workbench = rtgui_workbench_create("main", "workbench"); - if (workbench == RT_NULL) return; - rtgui_widget_set_event_handler(RTGUI_WIDGET(workbench), player_workbench_event_handler); - - /* add home view */ - home_view = rtgui_view_create("Home"); - rtgui_widget_set_event_handler(RTGUI_WIDGET(home_view), home_view_event_handler); - - rtgui_workbench_add_view(workbench, home_view); - /* this view can be focused */ - RTGUI_WIDGET(home_view)->flag |= RTGUI_WIDGET_FLAG_FOCUSABLE; - /* set widget focus */ - rtgui_widget_focus(RTGUI_WIDGET(home_view)); - - rtgui_view_show(home_view, RT_FALSE); - - /* add function view */ - rtgui_widget_get_rect(RTGUI_WIDGET(workbench), &rect); - function_view = rtgui_list_view_create(function_list, - sizeof(function_list)/sizeof(struct rtgui_list_item), - &rect); - rtgui_workbench_add_view(workbench, RTGUI_VIEW(function_view)); - - rtgui_workbench_event_loop(workbench); - - rtgui_thread_deregister(rt_thread_self()); - rt_mq_delete(mq); -} - -void player_notify_play(void) -{ - struct rtgui_event_command ecmd; - RTGUI_EVENT_COMMAND_INIT(&ecmd); - ecmd.type = RTGUI_CMD_USER_INT; - ecmd.command_id = PLAYER_REQUEST_PLAY_SINGLE_FILE; - - rtgui_thread_send(player_ui_tid, &ecmd.parent, sizeof(ecmd)); -} - -void player_notify_stop() -{ - struct rtgui_event_command ecmd; - RTGUI_EVENT_COMMAND_INIT(&ecmd); - ecmd.type = RTGUI_CMD_USER_INT; - ecmd.command_id = PLAYER_REQUEST_STOP; - - rtgui_thread_send(player_ui_tid, &ecmd.parent, sizeof(ecmd)); -} - -void player_ui_init() -{ - player_ui_tid = rt_thread_create("ply_ui", player_entry, RT_NULL, - 4096, 25, 5); - if (player_ui_tid != RT_NULL) - rt_thread_startup(player_ui_tid); -} - -void player_ui_freeze() -{ - struct rtgui_event_command ecmd; - - /* check whether UI starts. */ - if (home_view == RT_NULL || workbench == RT_NULL) return; - - RTGUI_EVENT_COMMAND_INIT(&ecmd); - ecmd.type = RTGUI_CMD_USER_INT; - ecmd.command_id = PLAYER_REQUEST_FREEZE; - - rtgui_thread_send(player_ui_tid, &ecmd.parent, sizeof(ecmd)); -} - diff --git a/bsp/stm32_radio/player_ui.h b/bsp/stm32_radio/player_ui.h deleted file mode 100644 index 27ff3e6ed2..0000000000 --- a/bsp/stm32_radio/player_ui.h +++ /dev/null @@ -1,56 +0,0 @@ -#ifndef __PLAYER_H__ -#define __PLAYER_H__ - -#include - -/* music tag information structure */ -struct tag_info -{ - char title [40]; /* music title */ - char artist[40]; /* music artist */ - - rt_uint32_t duration; /* music total duration (second) */ - rt_uint32_t position; /* music current position (second) */ - - rt_uint32_t bit_rate; /* bit rate */ - rt_uint32_t sampling; /* sampling */ - rt_uint32_t data_start; /* start position of data */ -}; - -enum PLAYER_CMD -{ - PLAYER_CMD_START, - PLAYER_CMD_STOP -}; - -enum PLAYER_MODE -{ - PLAYER_STOP, - PLAYER_PLAY_FILE, - PLAYER_PLAY_RADIO, -}; - -enum PLAYER_STEP -{ - PLAYER_STEP_STOP, - PLAYER_STEP_PREV, - PLAYER_STEP_NEXT, -}; - -/* init player ui */ -void player_ui_init(void); -void player_ui_freeze(void); - -/* notification function, which invoked by player background thread */ -void player_notify_play(void); -void player_notify_stop(void); - -/* set player information */ -void player_set_position(rt_uint32_t position); -void player_set_title(const char* title); -void player_set_buffer_status(rt_bool_t buffering); - -/* get playing mode */ -enum PLAYER_MODE player_get_mode(void); - -#endif diff --git a/bsp/stm32_radio/project.Opt b/bsp/stm32_radio/project.Opt deleted file mode 100644 index 5fcf9f737e..0000000000 --- a/bsp/stm32_radio/project.Opt +++ /dev/null @@ -1,265 +0,0 @@ -### uVision2 Project, (C) Keil Software -### Do not modify ! - - cExt (*.c) - aExt (*.s*; *.src; *.a*) - oExt (*.obj) - lExt (*.lib) - tExt (*.txt; *.h; *.inc) - pExt (*.plm) - CppX (*.cpp) - DaveTm { 0,0,0,0,0,0,0,0 } - -Target (RT-Thread STM32 Radio), 0x0004 // Tools: 'ARM-ADS' -GRPOPT 1,(Startup),1,0,0 -GRPOPT 2,(Kernel),0,0,0 -GRPOPT 3,(STM32),0,0,0 -GRPOPT 4,(StdPeriph_Driver),0,0,0 -GRPOPT 5,(USB-FS-Device_Driver),0,0,0 -GRPOPT 6,(CMSIS),0,0,0 -GRPOPT 7,(finsh),0,0,0 -GRPOPT 8,(Filesystem),0,0,0 -GRPOPT 9,(LwIP),0,0,0 -GRPOPT 10,(mp3),0,0,0 -GRPOPT 11,(RTGUI),0,0,0 -GRPOPT 12,(Mass_Storage),0,0,0 - -OPTFFF 1,1,5,0,0,114,114,0,<.\rtconfig.h> { 44,0,0,0,0,0,0,0,1,0,0,0,255,255,255,255,255,255,255,255,252,255,255,255,226,255,255,255,0,0,0,0,0,0,0,0,133,2,0,0,218,0,0,0 } -OPTFFF 1,2,5,1124073474,0,19,34,0,<.\board.h> { 44,0,0,0,2,0,0,0,3,0,0,0,255,255,255,255,255,255,255,255,252,255,255,255,226,255,255,255,110,0,0,0,145,0,0,0,93,4,0,0,17,2,0,0 } -OPTFFF 1,3,5,0,0,0,0,0,<.\stm32f10x_conf.h> -OPTFFF 1,4,1,0,0,0,0,0,<.\application.c> -OPTFFF 1,5,1,0,0,0,0,0,<.\board.c> -OPTFFF 1,6,1,0,0,0,0,0,<.\startup.c> -OPTFFF 1,7,1,0,0,0,0,0,<.\stm32f10x_it.c> -OPTFFF 1,8,1,436207616,0,0,0,0,<.\usart.c> -OPTFFF 1,9,1,0,0,0,0,0,<.\sdcard.c> -OPTFFF 1,10,1,0,0,0,0,0,<.\rtc.c> -OPTFFF 1,11,1,0,0,0,0,0,<.\dm9000.c> -OPTFFF 1,12,1,889192448,0,0,0,0,<.\fsmc_nand.c> -OPTFFF 1,13,1,0,0,0,0,0,<.\fsmc_sram.c> -OPTFFF 1,14,1,0,0,0,0,0,<.\fmt0371\fmt0371.c> -OPTFFF 1,15,1,0,0,0,0,0,<.\http.c> -OPTFFF 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5,79,1,0,0,0,0,0,<.\Libraries\STM32_USB-FS-Device_Driver\src\otgd_fs_int.c> -OPTFFF 5,80,1,0,0,0,0,0,<.\Libraries\STM32_USB-FS-Device_Driver\src\otgd_fs_pcd.c> -OPTFFF 5,81,1,0,0,0,0,0,<.\Libraries\STM32_USB-FS-Device_Driver\src\usb_core.c> -OPTFFF 5,82,1,0,0,0,0,0,<.\Libraries\STM32_USB-FS-Device_Driver\src\usb_init.c> -OPTFFF 5,83,1,0,0,0,0,0,<.\Libraries\STM32_USB-FS-Device_Driver\src\usb_int.c> -OPTFFF 5,84,1,0,0,0,0,0,<.\Libraries\STM32_USB-FS-Device_Driver\src\usb_mem.c> -OPTFFF 5,85,1,0,0,0,0,0,<.\Libraries\STM32_USB-FS-Device_Driver\src\usb_regs.c> -OPTFFF 5,86,1,0,0,0,0,0,<.\Libraries\STM32_USB-FS-Device_Driver\src\usb_sil.c> -OPTFFF 6,87,1,0,0,0,0,0,<.\Libraries\CMSIS\CM3\CoreSupport\core_cm3.c> -OPTFFF 6,88,1,0,0,0,0,0,<.\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\system_stm32f10x.c> -OPTFFF 7,89,1,0,0,0,0,0,<..\..\finsh\finsh_compiler.c> -OPTFFF 7,90,1,0,0,0,0,0,<..\..\finsh\finsh_error.c> -OPTFFF 7,91,1,0,0,0,0,0,<..\..\finsh\finsh_heap.c> -OPTFFF 7,92,1,0,0,0,0,0,<..\..\finsh\finsh_init.c> -OPTFFF 7,93,1,0,0,0,0,0,<..\..\finsh\finsh_node.c> -OPTFFF 7,94,1,0,0,0,0,0,<..\..\finsh\finsh_ops.c> -OPTFFF 7,95,1,0,0,0,0,0,<..\..\finsh\finsh_parser.c> -OPTFFF 7,96,1,0,0,0,0,0,<..\..\finsh\finsh_token.c> -OPTFFF 7,97,1,0,0,0,0,0,<..\..\finsh\finsh_var.c> -OPTFFF 7,98,1,0,0,0,0,0,<..\..\finsh\finsh_vm.c> -OPTFFF 7,99,1,0,0,0,0,0,<..\..\finsh\shell.c> -OPTFFF 7,100,1,0,0,0,0,0,<..\..\finsh\symbol.c> -OPTFFF 7,101,1,0,0,0,0,0,<..\..\finsh\cmd.c> -OPTFFF 8,102,1,0,0,0,0,0,<..\..\filesystem\dfs\src\dfs_init.c> -OPTFFF 8,103,1,0,0,0,0,0,<..\..\filesystem\dfs\src\dfs_fs.c> -OPTFFF 8,104,1,0,0,0,0,0,<..\..\filesystem\dfs\src\dfs_raw.c> -OPTFFF 8,105,1,0,0,0,0,0,<..\..\filesystem\dfs\src\dfs_util.c> -OPTFFF 8,106,1,0,0,0,0,0,<..\..\filesystem\dfs\src\dfs_posix.c> -OPTFFF 8,107,1,0,0,0,0,0,<..\..\filesystem\dfs\filesystems\elmfat\dfs_elm.c> -OPTFFF 8,108,1,0,0,0,0,0,<..\..\filesystem\dfs\filesystems\elmfat\ff.c> -OPTFFF 9,109,1,0,0,0,0,0,<..\..\net\lwip\src\core\dhcp.c> -OPTFFF 9,110,1,0,0,0,0,0,<..\..\net\lwip\src\core\dns.c> -OPTFFF 9,111,1,0,0,0,0,0,<..\..\net\lwip\src\core\init.c> -OPTFFF 9,112,1,0,0,0,0,0,<..\..\net\lwip\src\core\memp.c> -OPTFFF 9,113,1,0,0,0,0,0,<..\..\net\lwip\src\core\netif.c> -OPTFFF 9,114,1,0,0,0,0,0,<..\..\net\lwip\src\core\pbuf.c> -OPTFFF 9,115,1,0,0,0,0,0,<..\..\net\lwip\src\core\raw.c> -OPTFFF 9,116,1,0,0,0,0,0,<..\..\net\lwip\src\core\stats.c> -OPTFFF 9,117,1,0,0,0,0,0,<..\..\net\lwip\src\core\sys.c> -OPTFFF 9,118,1,0,0,0,0,0,<..\..\net\lwip\src\core\tcp.c> -OPTFFF 9,119,1,0,0,0,0,0,<..\..\net\lwip\src\core\tcp_in.c> -OPTFFF 9,120,1,0,0,0,0,0,<..\..\net\lwip\src\core\tcp_out.c> -OPTFFF 9,121,1,0,0,0,0,0,<..\..\net\lwip\src\core\udp.c> -OPTFFF 9,122,1,0,0,0,0,0,<..\..\net\lwip\src\core\ipv4\autoip.c> -OPTFFF 9,123,1,0,0,0,0,0,<..\..\net\lwip\src\core\ipv4\icmp.c> -OPTFFF 9,124,1,0,0,0,0,0,<..\..\net\lwip\src\core\ipv4\igmp.c> -OPTFFF 9,125,1,0,0,0,0,0,<..\..\net\lwip\src\core\ipv4\inet.c> -OPTFFF 9,126,1,0,0,0,0,0,<..\..\net\lwip\src\core\ipv4\inet_chksum.c> -OPTFFF 9,127,1,0,0,0,0,0,<..\..\net\lwip\src\core\ipv4\ip.c> -OPTFFF 9,128,1,0,0,0,0,0,<..\..\net\lwip\src\core\ipv4\ip_addr.c> -OPTFFF 9,129,1,0,0,0,0,0,<..\..\net\lwip\src\core\ipv4\ip_frag.c> -OPTFFF 9,130,1,0,0,0,0,0,<..\..\net\lwip\src\core\snmp\msg_in.c> -OPTFFF 9,131,1,0,0,0,0,0,<..\..\net\lwip\src\core\snmp\msg_out.c> -OPTFFF 9,132,1,0,0,0,0,0,<..\..\net\lwip\src\api\api_lib.c> -OPTFFF 9,133,1,0,0,0,0,0,<..\..\net\lwip\src\api\api_msg.c> -OPTFFF 9,134,1,0,0,0,0,0,<..\..\net\lwip\src\api\err.c> -OPTFFF 9,135,1,0,0,0,0,0,<..\..\net\lwip\src\api\netbuf.c> -OPTFFF 9,136,1,0,0,0,0,0,<..\..\net\lwip\src\api\netdb.c> -OPTFFF 9,137,1,0,0,0,0,0,<..\..\net\lwip\src\api\netifapi.c> -OPTFFF 9,138,1,0,0,0,0,0,<..\..\net\lwip\src\api\tcpip.c> -OPTFFF 9,139,1,0,0,0,0,0,<..\..\net\lwip\src\netif\etharp.c> -OPTFFF 9,140,1,0,0,0,0,0,<..\..\net\lwip\src\netif\ethernetif.c> -OPTFFF 9,141,1,0,0,0,0,0,<..\..\net\lwip\src\netif\loopif.c> -OPTFFF 9,142,1,0,0,0,0,0,<..\..\net\lwip\src\arch\sys_arch_init.c> -OPTFFF 9,143,1,0,0,0,0,0,<..\..\net\lwip\src\arch\sys_arch.c> -OPTFFF 9,144,1,0,0,0,0,0,<..\..\net\lwip\src\api\sockets.c> -OPTFFF 10,145,1,0,0,0,0,0,<.\mp3\mp3dec.c> -OPTFFF 10,146,1,0,0,0,0,0,<.\mp3\mp3tabs.c> -OPTFFF 10,147,1,0,0,0,0,0,<.\mp3\real\bitstream.c> -OPTFFF 10,148,1,0,0,0,0,0,<.\mp3\real\buffers.c> -OPTFFF 10,149,1,0,0,0,0,0,<.\mp3\real\dct32.c> -OPTFFF 10,150,1,0,0,0,0,0,<.\mp3\real\dequant.c> -OPTFFF 10,151,1,0,0,0,0,0,<.\mp3\real\dqchan.c> -OPTFFF 10,152,1,0,0,0,0,0,<.\mp3\real\huffman.c> -OPTFFF 10,153,1,0,0,0,0,0,<.\mp3\real\hufftabs.c> -OPTFFF 10,154,1,0,0,0,0,0,<.\mp3\real\imdct.c> -OPTFFF 10,155,1,0,0,0,0,0,<.\mp3\real\scalfact.c> -OPTFFF 10,156,1,0,0,0,0,0,<.\mp3\real\stproc.c> -OPTFFF 10,157,1,0,0,0,0,0,<.\mp3\real\subband.c> -OPTFFF 10,158,1,0,0,0,0,0,<.\mp3\real\trigtabs.c> -OPTFFF 10,159,2,0,0,0,0,0,<.\mp3\real\arm\asmpoly_thumb2.s> -OPTFFF 10,160,2,0,0,0,0,0,<.\mp3\real\arm\asmmisc.s> -OPTFFF 11,161,1,0,0,0,0,0,<..\..\rtgui\common\rtgui_object.c> -OPTFFF 11,162,1,0,0,0,0,0,<..\..\rtgui\common\rtgui_system.c> -OPTFFF 11,163,1,0,0,0,0,0,<..\..\rtgui\common\rtgui_theme.c> -OPTFFF 11,164,1,0,0,0,0,0,<..\..\rtgui\common\asc12font.c> -OPTFFF 11,165,1,0,0,0,0,0,<..\..\rtgui\common\asc16font.c> -OPTFFF 11,166,1,0,0,0,0,0,<..\..\rtgui\common\color.c> -OPTFFF 11,167,1,0,0,0,0,0,<..\..\rtgui\common\dc.c> -OPTFFF 11,168,1,0,0,0,0,0,<..\..\rtgui\common\dc_buffer.c> -OPTFFF 11,169,1,0,0,0,0,0,<..\..\rtgui\common\dc_hw.c> -OPTFFF 11,170,1,0,0,0,0,0,<..\..\rtgui\common\filerw.c> -OPTFFF 11,171,1,0,0,0,0,0,<..\..\rtgui\common\font.c> -OPTFFF 11,172,1,0,0,0,0,0,<..\..\rtgui\common\image.c> -OPTFFF 11,173,1,0,0,0,0,0,<..\..\rtgui\common\image_xpm.c> -OPTFFF 11,174,1,0,0,0,0,0,<..\..\rtgui\common\image_hdc.c> -OPTFFF 11,175,1,0,0,0,0,0,<..\..\rtgui\common\region.c> -OPTFFF 11,176,1,0,0,0,0,0,<..\..\rtgui\server\server.c> -OPTFFF 11,177,1,0,0,0,0,0,<..\..\rtgui\server\driver.c> -OPTFFF 11,178,1,0,0,0,0,0,<..\..\rtgui\server\panel.c> -OPTFFF 11,179,1,0,0,0,0,0,<..\..\rtgui\widgets\widget.c> -OPTFFF 11,180,1,0,0,0,0,0,<..\..\rtgui\widgets\window.c> -OPTFFF 11,181,1,0,0,0,0,0,<..\..\rtgui\widgets\workbench.c> -OPTFFF 11,182,1,0,0,0,0,0,<..\..\rtgui\widgets\view.c> -OPTFFF 11,183,1,0,0,0,0,0,<..\..\rtgui\widgets\box.c> -OPTFFF 11,184,1,0,0,0,0,0,<..\..\rtgui\widgets\button.c> -OPTFFF 11,185,1,0,0,0,0,0,<..\..\rtgui\widgets\container.c> -OPTFFF 11,186,1,0,0,0,0,0,<..\..\rtgui\widgets\iconbox.c> -OPTFFF 11,187,1,0,0,0,0,0,<..\..\rtgui\widgets\label.c> -OPTFFF 11,188,1,0,0,0,0,0,<..\..\rtgui\widgets\textbox.c> -OPTFFF 11,189,1,0,0,0,0,0,<..\..\rtgui\widgets\title.c> -OPTFFF 11,190,1,0,0,0,0,0,<..\..\rtgui\widgets\toplevel.c> -OPTFFF 11,191,1,0,0,0,0,0,<..\..\rtgui\server\mouse.c> -OPTFFF 11,192,1,0,0,0,0,0,<..\..\rtgui\server\topwin.c> -OPTFFF 11,193,1,0,0,0,0,0,<..\..\rtgui\common\font_hz_file.c> -OPTFFF 11,194,1,0,0,0,0,0,<..\..\rtgui\common\hz16font.c> -OPTFFF 11,195,1,0,0,0,0,0,<..\..\rtgui\common\hz12font.c> -OPTFFF 11,196,1,0,0,0,0,0,<..\..\rtgui\widgets\list_view.c> -OPTFFF 11,197,1,0,0,0,0,0,<..\..\rtgui\widgets\filelist_view.c> -OPTFFF 12,198,1,0,0,0,0,0,<.\Libraries\Mass_Storage\src\hw_config.c> -OPTFFF 12,199,1,0,0,0,0,0,<.\Libraries\Mass_Storage\src\mass_mal.c> -OPTFFF 12,200,1,0,0,0,0,0,<.\Libraries\Mass_Storage\src\memory.c> -OPTFFF 12,201,1,0,0,0,0,0,<.\Libraries\Mass_Storage\src\usb_bot.c> -OPTFFF 12,202,1,0,0,0,0,0,<.\Libraries\Mass_Storage\src\scsi_data.c> -OPTFFF 12,203,1,0,0,0,0,0,<.\Libraries\Mass_Storage\src\usb_desc.c> -OPTFFF 12,204,1,0,0,0,0,0,<.\Libraries\Mass_Storage\src\usb_endp.c> -OPTFFF 12,205,1,0,0,0,0,0,<.\Libraries\Mass_Storage\src\usb_istr.c> -OPTFFF 12,206,1,0,0,0,0,0,<.\Libraries\Mass_Storage\src\usb_prop.c> -OPTFFF 12,207,1,0,0,0,0,0,<.\Libraries\Mass_Storage\src\usb_pwr.c> -OPTFFF 12,208,1,0,0,0,0,0,<.\Libraries\Mass_Storage\src\usb_scsi.c> -OPTFFF 12,209,1,0,0,0,0,0,<.\Libraries\Mass_Storage\src\usb_main.c> - - -TARGOPT 1, (RT-Thread STM32 Radio) - ADSCLK=8000000 - OPTTT 1,1,1,0 - OPTHX 1,65535,0,0,0 - OPTLX 79,66,8,<.\obj\> - OPTOX 16 - OPTLT 1,1,1,0,1,1,0,1,0,0,0,0 - OPTXL 1,1,1,1,1,1,1,0,0 - OPTFL 1,0,1 - OPTAX 255 - OPTDL (SARMCM3.DLL)()(DARMSTM.DLL)(-pSTM32F103ZE)(SARMCM3.DLL)()(TARMSTM.DLL)(-pSTM32F103ZE) - OPTDBG 49142,7,()()()()()()()()()() (Segger\JL2CM3.dll)()()() - OPTKEY 0,(DLGDARM)((1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(100=-1,-1,-1,-1,0)(110=-1,-1,-1,-1,0)(111=-1,-1,-1,-1,0)(1011=-1,-1,-1,-1,0)(180=-1,-1,-1,-1,0)(120=-1,-1,-1,-1,0)(121=-1,-1,-1,-1,0)(122=-1,-1,-1,-1,0)(123=-1,-1,-1,-1,0)(124=-1,-1,-1,-1,0)(125=-1,-1,-1,-1,0)(126=-1,-1,-1,-1,0)(140=-1,-1,-1,-1,0)(240=-1,-1,-1,-1,0)(190=-1,-1,-1,-1,0)(200=-1,-1,-1,-1,0)(170=-1,-1,-1,-1,0)(130=-1,-1,-1,-1,0)(131=-1,-1,-1,-1,0)(132=-1,-1,-1,-1,0)(133=-1,-1,-1,-1,0)(160=-1,-1,-1,-1,0)(161=-1,-1,-1,-1,0)(162=-1,-1,-1,-1,0)(210=-1,-1,-1,-1,0)(211=-1,-1,-1,-1,0)(220=-1,-1,-1,-1,0)(221=-1,-1,-1,-1,0)(230=-1,-1,-1,-1,0)(234=-1,-1,-1,-1,0)(231=-1,-1,-1,-1,0)(232=-1,-1,-1,-1,0)(233=-1,-1,-1,-1,0)(150=-1,-1,-1,-1,0)(151=-1,-1,-1,-1,0)) - OPTKEY 0,(DLGTARM)((1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(100=-1,-1,-1,-1,0)(110=-1,-1,-1,-1,0)(111=-1,-1,-1,-1,0)(1011=60,91,584,445,0)(180=-1,-1,-1,-1,0)(120=-1,-1,-1,-1,0)(121=-1,-1,-1,-1,0)(122=-1,-1,-1,-1,0)(123=-1,-1,-1,-1,0)(124=-1,-1,-1,-1,0)(125=-1,-1,-1,-1,0)(126=-1,-1,-1,-1,0)(140=-1,-1,-1,-1,0)(240=-1,-1,-1,-1,0)(190=-1,-1,-1,-1,0)(200=-1,-1,-1,-1,0)(170=-1,-1,-1,-1,0)(130=-1,-1,-1,-1,0)(131=-1,-1,-1,-1,0)(132=-1,-1,-1,-1,0)(133=-1,-1,-1,-1,0)(160=-1,-1,-1,-1,0)(161=-1,-1,-1,-1,0)(162=-1,-1,-1,-1,0)(210=-1,-1,-1,-1,0)(211=-1,-1,-1,-1,0)(220=-1,-1,-1,-1,0)(221=-1,-1,-1,-1,0)(230=-1,-1,-1,-1,0)(231=-1,-1,-1,-1,0)(232=-1,-1,-1,-1,0)(233=-1,-1,-1,-1,0)(150=-1,-1,-1,-1,0)(151=-1,-1,-1,-1,0)) - OPTKEY 0,(ARMDBGFLAGS)(-T0) - OPTKEY 0,(DLGUARM)((105=150,189,819,540,0)(106=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0)) - OPTKEY 0,(JL2CM3)(-U10000002 -O718 -S10 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -N00("ARM CoreSight SW-DP") -D00(1BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8004 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TRE0 -FO27 -FD20000000 -FC800 -FN1 -FF0STM32F10x_512 -FS08000000 -FL080000) - OPTBB 0,0,406,1,134342740,0,0,0,0,1,()() - OPTWA 0,1,(_mp) - OPTWA 1,1,(_netbuf) - OPTWA 2,1,(decoder) - OPTMM 1,8,(text) - OPTMM 2,8,(mimeBuffer) - OPTDF 0x82 - OPTLE <> - OPTLC <> -EndOpt - diff --git a/bsp/stm32_radio/project.Uv2 b/bsp/stm32_radio/project.Uv2 deleted file mode 100644 index 7d601f3244..0000000000 --- a/bsp/stm32_radio/project.Uv2 +++ /dev/null @@ -1,385 +0,0 @@ -### uVision2 Project, (C) Keil Software -### Do not modify ! - -Target (RT-Thread STM32 Radio), 0x0004 // Tools: 'ARM-ADS' - -Group (Startup) -Group (Kernel) -Group (STM32) -Group (StdPeriph_Driver) -Group (USB-FS-Device_Driver) -Group (CMSIS) -Group (finsh) -Group (Filesystem) -Group (LwIP) -Group (mp3) -Group (RTGUI) -Group (Mass_Storage) - -File 1,5,<.\rtconfig.h> -File 1,5,<.\board.h> -File 1,5,<.\stm32f10x_conf.h> -File 1,1,<.\application.c> -File 1,1,<.\board.c> -File 1,1,<.\startup.c> -File 1,1,<.\stm32f10x_it.c> -File 1,1,<.\usart.c> -File 1,1,<.\sdcard.c> -File 1,1,<.\rtc.c> -File 1,1,<.\dm9000.c> -File 1,1,<.\fsmc_nand.c> -File 1,1,<.\fsmc_sram.c> -File 1,1,<.\fmt0371\fmt0371.c> -File 1,1,<.\http.c> -File 1,1,<.\lcd.c> -File 1,1,<.\mp3.c> -File 1,1,<.\wav.c> -File 1,1,<.\netbuffer.c> -File 1,1,<.\key.c> -File 1,1,<.\info.c> -File 1,1,<.\device_info.c> -File 1,1,<.\player_ui.c> -File 1,1,<.\player_bg.c> -File 1,1,<.\play_list.c> -File 1,1,<.\codec.c> -File 1,1,<.\spi_flash.c> -File 1,1,<.\remote.c> -File 1,1,<.\picture.c> -File 1,1,<.\station_list.c> -File 1,1,<.\ili9325\ili9325.c> -File 1,1,<.\touch.c> -File 1,1,<.\radio_list_update.c> -File 2,1,<..\..\src\clock.c> -File 2,1,<..\..\src\idle.c> -File 2,1,<..\..\src\ipc.c> -File 2,1,<..\..\src\mempool.c> -File 2,1,<..\..\src\mem.c> -File 2,1,<..\..\src\object.c> -File 2,1,<..\..\src\scheduler.c> -File 2,1,<..\..\src\thread.c> -File 2,1,<..\..\src\timer.c> -File 2,1,<..\..\src\irq.c> -File 2,1,<..\..\src\kservice.c> -File 2,1,<..\..\src\device.c> -File 2,1,<..\..\src\slab.c> -File 3,1,<..\..\libcpu\arm\stm32\stack.c> -File 3,1,<..\..\libcpu\arm\stm32\interrupt.c> -File 3,1,<..\..\libcpu\arm\stm32\cpu.c> -File 3,1,<..\..\libcpu\arm\stm32\serial.c> -File 3,2,<..\..\libcpu\arm\stm32\context_rvds.S> -File 3,2,<..\..\libcpu\arm\stm32\start_rvds.s> -File 3,1,<..\..\libcpu\arm\stm32\fault.c> -File 3,2,<..\..\libcpu\arm\stm32\fault_rvds.S> -File 4,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\misc.c> -File 4,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_adc.c> -File 4,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_bkp.c> -File 4,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_can.c> -File 4,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_crc.c> -File 4,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_dac.c> -File 4,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_dbgmcu.c> -File 4,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_dma.c> -File 4,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_exti.c> -File 4,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_flash.c> -File 4,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_fsmc.c> -File 4,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_gpio.c> -File 4,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_i2c.c> -File 4,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_iwdg.c> -File 4,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_pwr.c> -File 4,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_rcc.c> -File 4,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_rtc.c> -File 4,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_sdio.c> -File 4,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_spi.c> -File 4,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_tim.c> -File 4,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_usart.c> -File 4,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_wwdg.c> -File 5,1,<.\Libraries\STM32_USB-FS-Device_Driver\src\otgd_fs_cal.c> -File 5,1,<.\Libraries\STM32_USB-FS-Device_Driver\src\otgd_fs_dev.c> -File 5,1,<.\Libraries\STM32_USB-FS-Device_Driver\src\otgd_fs_int.c> -File 5,1,<.\Libraries\STM32_USB-FS-Device_Driver\src\otgd_fs_pcd.c> -File 5,1,<.\Libraries\STM32_USB-FS-Device_Driver\src\usb_core.c> -File 5,1,<.\Libraries\STM32_USB-FS-Device_Driver\src\usb_init.c> -File 5,1,<.\Libraries\STM32_USB-FS-Device_Driver\src\usb_int.c> -File 5,1,<.\Libraries\STM32_USB-FS-Device_Driver\src\usb_mem.c> -File 5,1,<.\Libraries\STM32_USB-FS-Device_Driver\src\usb_regs.c> -File 5,1,<.\Libraries\STM32_USB-FS-Device_Driver\src\usb_sil.c> -File 6,1,<.\Libraries\CMSIS\CM3\CoreSupport\core_cm3.c> -File 6,1,<.\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\system_stm32f10x.c> -File 7,1,<..\..\finsh\finsh_compiler.c> -File 7,1,<..\..\finsh\finsh_error.c> -File 7,1,<..\..\finsh\finsh_heap.c> -File 7,1,<..\..\finsh\finsh_init.c> -File 7,1,<..\..\finsh\finsh_node.c> -File 7,1,<..\..\finsh\finsh_ops.c> -File 7,1,<..\..\finsh\finsh_parser.c> -File 7,1,<..\..\finsh\finsh_token.c> -File 7,1,<..\..\finsh\finsh_var.c> -File 7,1,<..\..\finsh\finsh_vm.c> -File 7,1,<..\..\finsh\shell.c> -File 7,1,<..\..\finsh\symbol.c> -File 7,1,<..\..\finsh\cmd.c> -File 8,1,<..\..\filesystem\dfs\src\dfs_init.c> -File 8,1,<..\..\filesystem\dfs\src\dfs_fs.c> -File 8,1,<..\..\filesystem\dfs\src\dfs_raw.c> -File 8,1,<..\..\filesystem\dfs\src\dfs_util.c> -File 8,1,<..\..\filesystem\dfs\src\dfs_posix.c> -File 8,1,<..\..\filesystem\dfs\filesystems\elmfat\dfs_elm.c> -File 8,1,<..\..\filesystem\dfs\filesystems\elmfat\ff.c> -File 9,1,<..\..\net\lwip\src\core\dhcp.c> -File 9,1,<..\..\net\lwip\src\core\dns.c> -File 9,1,<..\..\net\lwip\src\core\init.c> -File 9,1,<..\..\net\lwip\src\core\memp.c> -File 9,1,<..\..\net\lwip\src\core\netif.c> -File 9,1,<..\..\net\lwip\src\core\pbuf.c> -File 9,1,<..\..\net\lwip\src\core\raw.c> -File 9,1,<..\..\net\lwip\src\core\stats.c> -File 9,1,<..\..\net\lwip\src\core\sys.c> -File 9,1,<..\..\net\lwip\src\core\tcp.c> -File 9,1,<..\..\net\lwip\src\core\tcp_in.c> -File 9,1,<..\..\net\lwip\src\core\tcp_out.c> -File 9,1,<..\..\net\lwip\src\core\udp.c> -File 9,1,<..\..\net\lwip\src\core\ipv4\autoip.c> -File 9,1,<..\..\net\lwip\src\core\ipv4\icmp.c> -File 9,1,<..\..\net\lwip\src\core\ipv4\igmp.c> -File 9,1,<..\..\net\lwip\src\core\ipv4\inet.c> -File 9,1,<..\..\net\lwip\src\core\ipv4\inet_chksum.c> -File 9,1,<..\..\net\lwip\src\core\ipv4\ip.c> -File 9,1,<..\..\net\lwip\src\core\ipv4\ip_addr.c> -File 9,1,<..\..\net\lwip\src\core\ipv4\ip_frag.c> -File 9,1,<..\..\net\lwip\src\core\snmp\msg_in.c> -File 9,1,<..\..\net\lwip\src\core\snmp\msg_out.c> -File 9,1,<..\..\net\lwip\src\api\api_lib.c> -File 9,1,<..\..\net\lwip\src\api\api_msg.c> -File 9,1,<..\..\net\lwip\src\api\err.c> -File 9,1,<..\..\net\lwip\src\api\netbuf.c> -File 9,1,<..\..\net\lwip\src\api\netdb.c> -File 9,1,<..\..\net\lwip\src\api\netifapi.c> -File 9,1,<..\..\net\lwip\src\api\tcpip.c> -File 9,1,<..\..\net\lwip\src\netif\etharp.c> -File 9,1,<..\..\net\lwip\src\netif\ethernetif.c> -File 9,1,<..\..\net\lwip\src\netif\loopif.c> -File 9,1,<..\..\net\lwip\src\arch\sys_arch_init.c> -File 9,1,<..\..\net\lwip\src\arch\sys_arch.c> -File 9,1,<..\..\net\lwip\src\api\sockets.c> -File 10,1,<.\mp3\mp3dec.c> -File 10,1,<.\mp3\mp3tabs.c> -File 10,1,<.\mp3\real\bitstream.c> -File 10,1,<.\mp3\real\buffers.c> -File 10,1,<.\mp3\real\dct32.c> -File 10,1,<.\mp3\real\dequant.c> -File 10,1,<.\mp3\real\dqchan.c> -File 10,1,<.\mp3\real\huffman.c> -File 10,1,<.\mp3\real\hufftabs.c> -File 10,1,<.\mp3\real\imdct.c> -File 10,1,<.\mp3\real\scalfact.c> -File 10,1,<.\mp3\real\stproc.c> -File 10,1,<.\mp3\real\subband.c> -File 10,1,<.\mp3\real\trigtabs.c> -File 10,2,<.\mp3\real\arm\asmpoly_thumb2.s> -File 10,2,<.\mp3\real\arm\asmmisc.s> -File 11,1,<..\..\rtgui\common\rtgui_object.c> -File 11,1,<..\..\rtgui\common\rtgui_system.c> -File 11,1,<..\..\rtgui\common\rtgui_theme.c> -File 11,1,<..\..\rtgui\common\asc12font.c> -File 11,1,<..\..\rtgui\common\asc16font.c> -File 11,1,<..\..\rtgui\common\color.c> -File 11,1,<..\..\rtgui\common\dc.c> -File 11,1,<..\..\rtgui\common\dc_buffer.c> -File 11,1,<..\..\rtgui\common\dc_hw.c> -File 11,1,<..\..\rtgui\common\filerw.c> -File 11,1,<..\..\rtgui\common\font.c> -File 11,1,<..\..\rtgui\common\image.c> -File 11,1,<..\..\rtgui\common\image_xpm.c> -File 11,1,<..\..\rtgui\common\image_hdc.c> -File 11,1,<..\..\rtgui\common\region.c> -File 11,1,<..\..\rtgui\server\server.c> -File 11,1,<..\..\rtgui\server\driver.c> -File 11,1,<..\..\rtgui\server\panel.c> -File 11,1,<..\..\rtgui\widgets\widget.c> -File 11,1,<..\..\rtgui\widgets\window.c> -File 11,1,<..\..\rtgui\widgets\workbench.c> -File 11,1,<..\..\rtgui\widgets\view.c> -File 11,1,<..\..\rtgui\widgets\box.c> -File 11,1,<..\..\rtgui\widgets\button.c> -File 11,1,<..\..\rtgui\widgets\container.c> -File 11,1,<..\..\rtgui\widgets\iconbox.c> -File 11,1,<..\..\rtgui\widgets\label.c> -File 11,1,<..\..\rtgui\widgets\textbox.c> -File 11,1,<..\..\rtgui\widgets\title.c> -File 11,1,<..\..\rtgui\widgets\toplevel.c> -File 11,1,<..\..\rtgui\server\mouse.c> -File 11,1,<..\..\rtgui\server\topwin.c> -File 11,1,<..\..\rtgui\common\font_hz_file.c> -File 11,1,<..\..\rtgui\common\hz16font.c> -File 11,1,<..\..\rtgui\common\hz12font.c> -File 11,1,<..\..\rtgui\widgets\list_view.c> -File 11,1,<..\..\rtgui\widgets\filelist_view.c> -File 12,1,<.\Libraries\Mass_Storage\src\hw_config.c> -File 12,1,<.\Libraries\Mass_Storage\src\mass_mal.c> -File 12,1,<.\Libraries\Mass_Storage\src\memory.c> -File 12,1,<.\Libraries\Mass_Storage\src\usb_bot.c> -File 12,1,<.\Libraries\Mass_Storage\src\scsi_data.c> -File 12,1,<.\Libraries\Mass_Storage\src\usb_desc.c> -File 12,1,<.\Libraries\Mass_Storage\src\usb_endp.c> -File 12,1,<.\Libraries\Mass_Storage\src\usb_istr.c> -File 12,1,<.\Libraries\Mass_Storage\src\usb_prop.c> -File 12,1,<.\Libraries\Mass_Storage\src\usb_pwr.c> -File 12,1,<.\Libraries\Mass_Storage\src\usb_scsi.c> -File 12,1,<.\Libraries\Mass_Storage\src\usb_main.c> - - -Options 1,0,0 // Target 'RT-Thread STM32 Radio' - Device (STM32F103ZE) - Vendor (STMicroelectronics) - Cpu (IRAM(0x20000000-0x2000FFFF) IROM(0x8000000-0x807FFFF) CLOCK(8000000) CPUTYPE("Cortex-M3")) - FlashUt () - StupF ("STARTUP\ST\STM32F10x.s" ("STM32 Startup Code")) - FlashDR (UL2CM3(-O14 -S0 -C0 -N00("ARM Cortex-M3") -D00(1BA00477) -L00(4) -FO7 -FD20000000 -FC800 -FN1 -FF0STM32F10x_512 -FS08000000 -FL080000)) - DevID (4216) - Rgf (stm32f10x_lib.h) - Mem () - C () - A () - RL () - OH () - DBC_IFX () - DBC_CMS () - DBC_AMS () - DBC_LMS () - UseEnv=0 - EnvBin () - EnvInc () - EnvLib () - EnvReg (ST\STM32F10x\) - OrgReg (ST\STM32F10x\) - TgStat=16 - OutDir (.\obj\) - OutName (rtthread-stm32) - GenApp=1 - GenLib=0 - GenHex=0 - Debug=1 - Browse=0 - LstDir (.\obj\) - HexSel=1 - MG32K=0 - TGMORE=0 - RunUsr 0 0 <> - RunUsr 1 0 <> - BrunUsr 0 0 <> - BrunUsr 1 0 <> - CrunUsr 0 0 <> - CrunUsr 1 0 <> - SVCSID <> - GLFLAGS=1790 - ADSFLGA { 243,31,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 } - ACPUTYP ("Cortex-M3") - RVDEV () - ADSTFLGA { 0,12,0,2,99,0,1,66,0,0,0,0,0,0,0,0,0,0,0,0 } - OCMADSOCM { 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 } - OCMADSIRAM { 0,0,0,0,32,0,0,1,0 } - OCMADSIROM { 1,0,0,0,8,0,0,8,0 } - OCMADSXRAM { 0,0,0,0,0,0,0,0,0 } - OCR_RVCT { 1,0,0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,1,0,0,0,8,0,0,8,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,32,0,0,1,0,0,0,0,0,0,0,0,0,0 } - RV_STAVEC () - ADSCCFLG { 5,32,0,4,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 } - ADSCMISC (--diag_suppress=870) - ADSCDEFN (USE_STDPERIPH_DRIVER, STM32F10X_HD,) - ADSCUDEF () - ADSCINCD (.;.\Libraries\CMSIS\CM3\CoreSupport;.\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x;.\Libraries\STM32F10x_StdPeriph_Driver\inc;..\..\include;..\..\libcpu\arm\stm32;..\..\finsh;..\..\net\lwip\src;..\..\net\lwip\src\include;..\..\net\lwip\src\arch\include;..\..\net\lwip\src\include\ipv4;..\..\filesystem\dfs;..\..\filesystem\dfs\include;..\..\filesystem\dfs\filesystems\efsl\src\include;..\..\filesystem\dfs\filesystems\efsl\src\base\include;..\..\filesystem\dfs\filesystems\efsl\src\fs\vfat\include;..\..\rtgui\include;..\..\rtgui\common\libz) - ADSASFLG { 1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 } - ADSAMISC () - ADSADEFN () - ADSAUDEF () - ADSAINCD () - PropFld { 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 } - IncBld=1 - AlwaysBuild=0 - GenAsm=0 - AsmAsm=0 - PublicsOnly=0 - StopCode=3 - CustArgs () - LibMods () - ADSLDFG { 17,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 } - ADSLDTA (0x08000000) - ADSLDDA (0x20000000) - ADSLDSC () - ADSLDIB () - ADSLDIC () - ADSLDMC (--keep __fsym_* --keep __vsym_*) - ADSLDIF () - ADSLDDW () - OPTDL (SARMCM3.DLL)()(DARMSTM.DLL)(-pSTM32F103ZE)(SARMCM3.DLL)()(TARMSTM.DLL)(-pSTM32F103ZE) - OPTDBG 49142,7,()()()()()()()()()() (Segger\JL2CM3.dll)()()() - FLASH1 { 1,0,0,0,1,0,0,0,6,16,0,0,0,0,0,0,0,0,0,0 } - FLASH2 (Segger\JL2CM3.dll) - FLASH3 () - FLASH4 () -EndOpt - -Options 1,5,0 // Group 'USB-FS-Device_Driver' - PropFld { 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 } - IncBld=2 - AlwaysBuild=2 - GenAsm=2 - AsmAsm=2 - PublicsOnly=2 - StopCode=11 - CustArgs () - LibMods () - ADSCCFLG { 2,84,85,33,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 } - ADSCMISC () - ADSCDEFN () - ADSCUDEF () - ADSCINCD (.\Libraries\STM32_USB-FS-Device_Driver\inc;.\Libraries\Mass_Storage\inc) - ADSASFLG { 170,42,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 } - ADSAMISC () - ADSADEFN () - ADSAUDEF () - ADSAINCD () -EndOpt - -Options 1,10,0 // Group 'mp3' - PropFld { 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 } - IncBld=2 - AlwaysBuild=2 - GenAsm=2 - AsmAsm=2 - PublicsOnly=2 - StopCode=11 - CustArgs () - LibMods () - ADSCCFLG { 18,84,85,33,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 } - ADSCMISC () - ADSCDEFN () - ADSCUDEF () - ADSCINCD (.\mp3\pub) - ADSASFLG { 170,42,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 } - ADSAMISC () - ADSADEFN () - ADSAUDEF () - ADSAINCD () -EndOpt - -Options 1,12,0 // Group 'Mass_Storage' - PropFld { 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 } - IncBld=2 - AlwaysBuild=2 - GenAsm=2 - AsmAsm=2 - PublicsOnly=2 - StopCode=11 - CustArgs () - LibMods () - ADSCCFLG { 2,84,85,33,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 } - ADSCMISC () - ADSCDEFN () - ADSCUDEF () - ADSCINCD (.\Libraries\Mass_Storage\inc;.\Libraries\STM32_USB-FS-Device_Driver\inc) - ADSASFLG { 170,42,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 } - ADSAMISC () - ADSADEFN () - ADSAUDEF () - ADSAINCD () -EndOpt - diff --git a/bsp/stm32_radio/radio_list_update.c b/bsp/stm32_radio/radio_list_update.c deleted file mode 100644 index 0a24fdecd3..0000000000 --- a/bsp/stm32_radio/radio_list_update.c +++ /dev/null @@ -1,368 +0,0 @@ -#include -#include -#include -#include - -#include -#include - -#include -#include -#include -#include -#include - -#include "http.h" -#include "player_bg.h" - -/* */ -#define RADIO_FN "/radio.pls" -#define RADIO_LIST_UPDATE_URL "http://radio.rt-thread.org/radio.pls" -/* */ - -/* */ -extern int http_read_line( int socket, char * buffer, int size ); -extern int http_is_error_header(char *mime_buf); -extern int http_resolve_address(struct sockaddr_in *server, const char * url, char *host_addr, char** request); -/* */ - -const char _radio_list_update_get[] = "GET %s HTTP/1.0\r\nHost: %s:%d\r\nUser-Agent: RT-Thread HTTP Agent\r\nConnection: close\r\n\r\n"; -rt_mq_t update_radio_mq = RT_NULL; -static struct rtgui_view* update_radio_list_view = RT_NULL; - -typedef enum -{ - UPDATE_RAIDO_LIST_PROC, - UPDATE_RADIO_LIST_CONNECT_FAILED, - UPDATE_RADIO_LIST_SUCCEED, -} UPDATE_RADIO_LIST_STATE; - -static UPDATE_RADIO_LIST_STATE update_radio_list_state; - -int radio_list_update_servicer_connect(struct sockaddr_in* server, char* host_addr, const char* url) -{ - int socket_handle; - int peer_handle; - int rc; - char mimeBuffer[256]; - - if((socket_handle = socket( PF_INET, SOCK_STREAM, IPPROTO_TCP )) < 0) - { - rt_kprintf( "RLUS: SOCKET FAILED\n" ); - return -1; - } - - peer_handle = connect( socket_handle, (struct sockaddr *) server, sizeof(*server)); - if ( peer_handle < 0 ) - { - closesocket(socket_handle); - rt_kprintf( "RLUS: CONNECT FAILED %i\n", peer_handle ); - return -1; - } - - { - char *buf; - rt_uint32_t length; - - buf = rt_malloc (512); - if (*url) - length = rt_snprintf(buf, 512, _radio_list_update_get, url, host_addr, ntohs(server->sin_port)); - else - length = rt_snprintf(buf, 512, _radio_list_update_get, "/", host_addr, ntohs(server->sin_port)); - - rc = send(peer_handle, buf, length, 0); - rt_kprintf("radio list update request:\n%s", buf); - - /* release buffer */ - rt_free(buf); - } - /* read the header information */ - while ( 1 ) - { - // read a line from the header information. - rc = http_read_line(peer_handle, mimeBuffer, 100); - rt_kprintf(">>%s", mimeBuffer); - - if ( rc < 0 ) - { - closesocket(peer_handle); - return rc; - } - // End of headers is a blank line. exit. - if (rc == 0) break; - if ((rc == 2) && (mimeBuffer[0] == '\r')) break; - - if (strstr(mimeBuffer, "HTTP/1.")) - { - rc = http_is_error_header(mimeBuffer); - if(rc) - { - rt_kprintf("HTTP: status code = %d!\n", rc); - closesocket(peer_handle); - return -rc; - } - } - - if (strstr(mimeBuffer, "content-type:")) - { - /* check content-type */ - if (strstr(mimeBuffer, "text/plain") == RT_NULL) - { - rt_kprintf("radio list update content is not text/plain.\n"); - closesocket(peer_handle); - return -1; - } - } - - if (strstr(mimeBuffer, "Content-Type:")) - { - /* check content-type */ - if (strstr(mimeBuffer, "text/plain") == RT_NULL) - { - rt_kprintf("radio list update content is not text/plain.\n"); - closesocket(peer_handle); - return -1; - } - } - } - - return peer_handle; -} - -int radio_list_update_servicer_session_open(char* url) -{ - int peer_handle = -1; - struct sockaddr_in server; - char *request, host_addr[32]; - - if(http_resolve_address(&server, url, &host_addr[0], &request) != 0) - { - return -1; - } - rt_kprintf("connect to: %s...\n", host_addr); - - if((peer_handle = radio_list_update_servicer_connect(&server, host_addr, request)) < 0) - { - rt_kprintf("radio list update: failed to connect to '%s'!\n", host_addr); - } - return peer_handle; - -} -int update_radio_list(char* url) -{ - char *buf = NULL; - int peer_handle = 0; - int fd; - int rc; - - peer_handle = radio_list_update_servicer_session_open(url); - - if(peer_handle < 0) - { - return -1; - } - - fd = open(RADIO_FN, O_WRONLY | O_CREAT | O_TRUNC, 0); - if(fd < 0) - { - return -1; - } - buf = rt_malloc (512); - while ( 1 ) - { - // read a line from the header information. - rc = http_read_line(peer_handle, buf, 100); - - if ( rc < 0 ) break; - - // End of headers is a blank line. exit. - if (rc == 0) break; - if ((rc == 2) && (buf[0] == '\r')) break; - rt_kprintf(">>%s", buf); - - write(fd, buf, rc); - } - rt_free(buf); - - closesocket(peer_handle); - - if(close(fd) == 0) - { - rt_kprintf("Update radio list succeed \r\n"); - } - return 0; -} - -void update_radio_list_req(void) -{ - - struct player_request request; - extern rt_mq_t player_thread_mq; - char* ch = RT_NULL; - - update_radio_list_state = UPDATE_RAIDO_LIST_PROC; - request.type = PLAYER_REQUEST_UPDATE_RADIO_LIST; - ch = strcpy(request.fn, RADIO_LIST_UPDATE_URL); - - /* send to message queue */ - rt_mq_send(update_radio_mq, (void*)&request, sizeof(struct player_request)); - -} - -void update_radio_thread(void* parameter) -{ - rt_err_t result; - struct player_request request; - rt_thread_t update_radio_list_thread; - - - while(1) - { - /* get request from message queue */ - result = rt_mq_recv(update_radio_mq, (void*)&request, - sizeof(struct player_request), RT_WAITING_FOREVER); - if (result == RT_EOK) - { - switch (request.type) - { - - case PLAYER_REQUEST_UPDATE_RADIO_LIST: - if ((strstr(request.fn, "http://") == request.fn || - (strstr(request.fn, "HTTP://") == request.fn ))) - { - struct rtgui_event_command ecmd; - - if(update_radio_list(request.fn)==0) - { - update_radio_list_state = UPDATE_RADIO_LIST_SUCCEED; - } - else - { - update_radio_list_state = UPDATE_RADIO_LIST_CONNECT_FAILED; - } - RTGUI_EVENT_COMMAND_INIT(&ecmd); - ecmd.type = RTGUI_EVENT_PAINT; - ecmd.command_id = PLAYER_REQUEST_UPDATE_RADIO_LIST; - rtgui_thread_send(rt_thread_find("ply_ui"), &ecmd.parent, sizeof(ecmd)); - } - break; - } - } - rt_mq_delete(update_radio_mq); - update_radio_mq = RT_NULL; - update_radio_list_thread = rt_thread_self(); - rt_thread_delete(update_radio_list_thread); - } -} - -void drawing_update_state_info(struct rtgui_widget* widget) -{ - char* line; - struct rtgui_dc* dc; - struct rtgui_rect rect; - - line = rtgui_malloc(256); - if (line == RT_NULL) return ; - - dc = rtgui_dc_begin_drawing(widget); - if (dc == RT_NULL) - { - rt_free(line); - return; - } - - rtgui_widget_get_rect(widget, &rect); - - /* fill background */ - rtgui_dc_fill_rect(dc, &rect); - - rect.y2 = rect.y1 + 18; - switch(update_radio_list_state) - { - case UPDATE_RAIDO_LIST_PROC: - sprintf(line, "ÕýÔÚ¸üеç̨Áбí......"); - break ; - - case UPDATE_RADIO_LIST_CONNECT_FAILED: - sprintf(line, "¸üеç̨Áбíʧ°Ü,Çë·µ»Ø"); - break; - - case UPDATE_RADIO_LIST_SUCCEED: - sprintf(line, "¸üеç̨Áбí³É¹¦,Çë·µ»Ø"); - break; - } - - rtgui_dc_draw_text(dc, line, &rect); - - rtgui_dc_end_drawing(dc); - - rtgui_free(line); -} - -static rt_bool_t update_radio_list_view_event_handler(struct rtgui_widget* widget, struct rtgui_event* event) -{ - switch (event->type) - { - case RTGUI_EVENT_COMMAND: - { - struct rtgui_event_command* ecmd = (struct rtgui_event_command*)event; - switch(ecmd->type) - { - case RTGUI_EVENT_PAINT: - drawing_update_state_info(widget); - return RT_FALSE; - } - return RT_FALSE; - } - case RTGUI_EVENT_PAINT: - { - drawing_update_state_info(widget); - return RT_FALSE; - } - - case RTGUI_EVENT_KBD: - { - struct rtgui_event_kbd* ekbd; - - ekbd = (struct rtgui_event_kbd*)event; - if (ekbd->type == RTGUI_KEYDOWN && ekbd->key == RTGUIK_RETURN) - { - rtgui_workbench_t* workbench; - - workbench = RTGUI_WORKBENCH(RTGUI_WIDGET(update_radio_list_view)->parent); - rtgui_workbench_remove_view(workbench, update_radio_list_view); - - rtgui_view_destroy(update_radio_list_view); - update_radio_list_view = RT_NULL; - } - } - return RT_FALSE; - } - - /* use parent event handler */ - return rtgui_view_event_handler(widget, event); -} - -rtgui_view_t *update_radio_list_view_create(rtgui_workbench_t* workbench) -{ - if (update_radio_list_view != RT_NULL) - { - rtgui_view_show(update_radio_list_view, RT_FALSE); - } - else - { - /* create a view */ - update_radio_list_view = rtgui_view_create("update radio list Info"); - /* set view event handler */ - rtgui_widget_set_event_handler(RTGUI_WIDGET(update_radio_list_view), update_radio_list_view_event_handler); - /* this view can be focused */ - RTGUI_WIDGET(update_radio_list_view)->flag |= RTGUI_WIDGET_FLAG_FOCUSABLE; - - /* add view to workbench */ - rtgui_workbench_add_view(workbench, update_radio_list_view); - } - - return update_radio_list_view; -} - - diff --git a/bsp/stm32_radio/remote.c b/bsp/stm32_radio/remote.c deleted file mode 100644 index 40fb46f392..0000000000 --- a/bsp/stm32_radio/remote.c +++ /dev/null @@ -1,507 +0,0 @@ -/* -+---------------------------------------------------- -| -| ºìÍâ×Ôѧϰң¿Ø -| -| Chang Logs: -| Date Author Notes -| 2010-01-02 aozima The bate version. -| 2010-02-10 aozima change printf string ÖÐÎÄ to english. -| 2010-03-25 aozima add remote_fn define. -+---------------------------------------------------- -*/ - -#include -#include -#include - -/* Öض¨Òåprintf */ -#define printf rt_kprintf -/* ÉèÖÃÔÊÐíÆ«²î,µ¥Î»0.01ms */ -#define remote_deviation 15 -#define remote_code_len_max 100 -/* Ñù±¾±£´æÎļþÃûȫ·¾¶ */ -#define remote_fn "/resource/remote.txt" - -/* ºìÍâģʽ 0:ûÆô¶¯,1:×Ôѧϰ,2:Õý³£½âÂë */ -unsigned int rem_mode = 0; - -static unsigned int first_tick = 0; -static unsigned int rx_count = 0; -static unsigned short rm_code[remote_code_len_max]; - -struct rem_codes_typedef -{ - unsigned int len; - unsigned short rem_code[remote_code_len_max]; -}; -struct rem_codes_typedef * p_rem_code_src = RT_NULL; - -static const char str1[]="KEY_UP"; /* ÉÏ */ -static const char str2[]="KEY_DOWN"; /* Ï */ -static const char str3[]="KEY_LEFT"; /* ×ó */ -static const char str4[]="KEY_RIGHT"; /* ÓÒ */ -static const char str5[]="KEY_ENTER"; /* È·ÈÏ */ -static const char str6[]="KEY_RETURN"; /* ·µ»Ø */ -static const char * desc_key[6]= {str1,str2,str3,str4,str5,str6}; - - -/* tim5 configure */ -static void TIM5_Configuration(void) -{ - /* ʱÖÓ¼°·ÖƵÉèÖà */ - { - TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure; - /* Time Base configuration */ - /* 72M/720 = 0.01ms */ - TIM_TimeBaseStructure.TIM_Prescaler = 720-1; - //¼ÆÊýģʽ:ÏòÉϼÆÊý - TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up; - TIM_TimeBaseStructure.TIM_Period = 0xFFFF; - TIM_TimeBaseStructure.TIM_ClockDivision = TIM_CKD_DIV1; - //ÖØмÆÊýµÄÆðʼֵ - TIM_TimeBaseStructure.TIM_RepetitionCounter = 0; - - TIM_TimeBaseInit(TIM5, &TIM_TimeBaseStructure); - } - - /* ²¶»ñÉèÖà */ - { - TIM_ICInitTypeDef TIM_ICInitStructure; - - TIM_ICInitStructure.TIM_ICPrescaler = TIM_ICPSC_DIV1;/* ÿ´Î¼ì²âµ½²¶»ñÊäÈë¾Í´¥·¢Ò»´Î²¶»ñ */ - TIM_ICInitStructure.TIM_ICFilter = 8;/* Â˲¨ */ - - TIM_ICInitStructure.TIM_Channel = TIM_Channel_3;//Ñ¡ÔñͨµÀ3 - TIM_ICInitStructure.TIM_ICPolarity = TIM_ICPolarity_Falling;//ϽµÑØ - TIM_ICInitStructure.TIM_ICSelection = TIM_ICSelection_DirectTI;//ͨµÀ·½ÏòÑ¡Ôñ - TIM_ICInit(TIM5, &TIM_ICInitStructure); - - TIM_ICInitStructure.TIM_Channel = TIM_Channel_4;//Ñ¡ÔñͨµÀ3 - TIM_ICInitStructure.TIM_ICPolarity = TIM_ICPolarity_Rising;//ÉÏÉýÑØ - TIM_ICInitStructure.TIM_ICSelection = TIM_ICSelection_IndirectTI;//ͨµÀ·½ÏòÑ¡Ôñ - TIM_ICInit(TIM5, &TIM_ICInitStructure); - } - - /* ÊäÈë´¥·¢Ô´Ñ¡Ôñ:ÍⲿÊäÈë´¥·¢ */ - TIM_SelectInputTrigger(TIM5, TIM_TS_ETRF);//TIM_TS_ETRF Íⲿ´¥·¢ - /* ´Óģʽ-¸´Î»Ä£Ê½ */ - /* TIM_SlaveMode_Reset 4:Ñ¡ÖеĴ¥·¢ÊäÈë(TRGI)µÄÉÏÉýÑØÖØгõʼ»¯¼ÆÊýÆ÷£¬²¢ÇÒ²úÉúÒ»¸ö¸üмĴæÆ÷µÄÐźŠ*/ - TIM_SelectSlaveMode(TIM5, TIM_SlaveMode_Reset); - TIM_SelectMasterSlaveMode(TIM5, TIM_MasterSlaveMode_Enable); - - /* TIM enable counter */ - TIM_Cmd(TIM5, ENABLE); - - /* Enable the CC3 and CC4 Interrupt Request */ - TIM_ITConfig(TIM5, TIM_IT_CC3, ENABLE); - TIM_ITConfig(TIM5, TIM_IT_CC4, ENABLE); -} - -static void NVIC_Configuration(void) -{ - NVIC_InitTypeDef NVIC_InitStructure; - - /* Enable the TIM5 global Interrupt */ - NVIC_InitStructure.NVIC_IRQChannel = TIM5_IRQn; - NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1; - NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1; - NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; - NVIC_Init(&NVIC_InitStructure); -} - -static void RCC_Configuration(void) -{ - RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO,ENABLE); - - /* TIM5 clock enable */ - RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM5, ENABLE); - - /* clock enable */ - RCC_APB2PeriphClockCmd( RCC_APB2Periph_GPIOA ,ENABLE); -} - -static void GPIO_Configuration(void) -{ - GPIO_InitTypeDef GPIO_InitStructure; - - /* TIM5 channel 3 pin (PA.02) configuration */ - GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2; - GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IPU; - GPIO_InitStructure.GPIO_Speed = GPIO_Speed_10MHz; - - GPIO_Init(GPIOA, &GPIO_InitStructure); -} - -void rem_start(void) -{ - RCC_Configuration(); - GPIO_Configuration(); - - /* configure TIM5 for remote and encoder */ - NVIC_Configuration(); - TIM5_Configuration(); - - p_rem_code_src = rt_malloc( sizeof(struct rem_codes_typedef)*6 ); - if( p_rem_code_src != RT_NULL) - { - rt_memset(p_rem_code_src,0, sizeof(struct rem_codes_typedef)*6 ); - - /* ½â¶ÁºìÍâÐÅÏ¢ */ - { - int fd,size; - char buf[7];/* Îļþ¶ÁÈ¡ÁÙʱ»º´æ #####\r\n */ - unsigned int i; - unsigned short tmp; - unsigned int read_index = 0; - unsigned int EOF_flag = 1; - - printf("\r\ndecode remote codes"); - fd = open(remote_fn,O_RDONLY,0); - if( fd>0 ) - { - printf("\r/resource/remote.txt open succeed"); - while( EOF_flag ) - { - /* ¶ÁÈ¡³¤¶È */ - size = read(fd,buf,7); - if( (size == 7) && (buf[5]=='\r') && buf[6]=='\n' ) - { - /* ת»»µÃµ½Ñù±¾Êý¾Ý³¤¶È */ - tmp = (buf[0]-'0')*10000 - + (buf[1]-'0')*1000 - + (buf[2]-'0')*100 - + (buf[3]-'0')*10 - + (buf[4]-'0'); - if( tmp<100 ) - { - unsigned int code_len = tmp; - p_rem_code_src[read_index].len = code_len; - /* Èç¹ûÑù±¾³¤¶È·ûºÏ ¾Í¿ªÊ¼´ÓÎļþ¶ÁÈ¡±àÂëÊý¾Ý */ - for(i=0; i 0 && p_rem_code_src[0].len < remote_code_len_max ) - { - /* ÉèÖù¤×÷ģʽΪÕý³£Ê¶±ðģʽ */ - rem_mode = 2; - printf("\r\ndecode succeed,The remote enable\r\n"); - } - else - { - /* ÉèÖù¤×÷ģʽΪÕý³£Ê¶±ðģʽ */ - rem_mode = 0; - printf("\r\nrem_codes decode fail,The remote disable\r\n"); - } - } - else - { - printf("\rrem_codes /resource/remote.txt open fail! fd:%d\r\nThe remote disbale.\r\nplease run rem_study()\r\n",fd); - } - close(fd); - }/* ½â¶ÁºìÍâÐÅÏ¢ */ - - } - else - { - rem_mode = 0; - printf("\r\nmalloc rem_codes[] fail!!!\r\nThe remote disable!"); - } -} - -#include -void rem_encoder(struct rtgui_event_kbd * p) -{ - struct rtgui_event_kbd * p_kbd_event = p; - - /* ¼ì²éÊÇ·ñÓÐÊý¾Ý±»²¶»ñ */ - if( (rem_mode==2) && (rt_tick_get()>first_tick+10) && (rx_count > 0) ) - { - /* ÊÖ¶¯ÇåÁãµÚÒ»¸ö²¶»ñ½á¹û */ - rm_code[0] = 0; - rx_count = 0; - - /* Æ¥Å䲶»ñµÄÊý¾Ý */ - { - unsigned int tmp; - unsigned int err_flag = 0; - unsigned int rem_cmp_n = 6; - - /* Ñ­»·Æ¥ÅäËùÓÐKEY */ - while( rem_cmp_n ) - { - unsigned int tmp2 = p_rem_code_src[ 6-rem_cmp_n ].len; - //printf("\r\nrem_cmp_n:%d tmp2:%d",rem_cmp_n,tmp2); - if( tmp2 ) - { - - for(tmp=0; tmp p_rem_code_src[6-rem_cmp_n].rem_code[tmp]-remote_deviation)) ) - { - err_flag = 1; - } - } - } - else - { - err_flag = 1; - printf("\r\nThe rem codes len is 0."); - } - - if( err_flag==0 ) - { - /* ¶Ô±ÈÈ«²¿Êý¾Ý·ûºÏ */ - printf("\r\nmatch key: %s",desc_key[6-rem_cmp_n]); - switch( rem_cmp_n ) - { - case 6: - p_kbd_event->key = RTGUIK_UP; - break; - case 5: - p_kbd_event->key = RTGUIK_DOWN; - break; - case 4: - p_kbd_event->key = RTGUIK_LEFT; - break; - case 3: - p_kbd_event->key = RTGUIK_RIGHT; - break; - case 2: - p_kbd_event->key = RTGUIK_RETURN; - break; - case 1: - p_kbd_event->key = RTGUIK_HOME; - break; - default: - break; - } - rem_cmp_n = 0; - } - else - { - /* ¶Ô±È²»·ûºÏ,ÇåÁã´íÎó±êÖÂ,ÒÔ½øÐÐÏÂÒ»´Î¶Ô±È */ - err_flag = 0; - rem_cmp_n --; - } - - } - } - }//ºìÍâÒ£¿ØÆ¥Åä -} - -/* remote isr */ -void remote_isr(void) -{ - static unsigned int clr_flag = 1; - unsigned int tick_now = rt_tick_get(); - - /* ºìÍâÒ£¿ØϽµÑØ */ - if(TIM_GetITStatus(TIM5, TIM_IT_CC3) == SET) - { - switch( rem_mode ) - { - case 0://δÆô¶¯ - break; - case 1://×Ôѧϰ - if( (rx_count==0) || (rx_count>90) || (tick_now>first_tick+10) ) - { - //ÐèÒªÇå0 - rx_count = 0; - clr_flag = 1; - } - if( rx_count < remote_code_len_max ) - { - rm_code[rx_count++] = TIM_GetCapture3(TIM5); - } - break; - case 2://Õý³£½âÂë - if( (rx_count>90) || tick_now>first_tick+10 ) - { - rx_count = 0; - clr_flag = 1; - } - if(rx_count < remote_code_len_max ) - { - rm_code[rx_count++] = TIM_GetCapture3(TIM5); - } - break; - default: - rem_mode = 0;//ÉèÖÃģʽΪδÆô¶¯ - break; - } - TIM_ClearITPendingBit(TIM5, TIM_IT_CC3); - } - - /* ºìÍâÒ£¿ØÉÏÉýÑØ */ - if(TIM_GetITStatus(TIM5, TIM_IT_CC4) == SET) - { - switch( rem_mode ) - { - case 0://δÆô¶¯ - break; - case 1://×Ôѧϰ - if( rx_count < remote_code_len_max ) - { - rm_code[rx_count++] = TIM_GetCapture4(TIM5); - } - break; - case 2://Õý³£½âÂë - if( rx_count < remote_code_len_max ) - { - rm_code[rx_count++] = TIM_GetCapture4(TIM5); - } - break; - default: - rem_mode = 0;//ÉèÖÃģʽΪδÆô¶¯ - break; - } - TIM_ClearITPendingBit(TIM5, TIM_IT_CC4); - } - - //¸üÐÂʱ¼ä´Á - first_tick = tick_now; - //¼ì²âÊÇ·ñÐèÒªÖØÖüÆÊýÆ÷ - if( clr_flag ) - { - //ÖØÖüÆÊýÆ÷ - TIM_SetCounter(TIM5,0); - clr_flag = 0; - } -} - -#include -/* Æô¶¯ºìÍâѧϰ³ÌÐò */ -int rem_study(void) -{ - unsigned int i; - - int fd,size; - unsigned char tmp_buf[ (remote_code_len_max+1)*7 ]; - - rem_mode = 1; - rx_count = 0; - printf("\r\nremote studing....."); - fd = open(remote_fn,O_WRONLY | O_TRUNC,0); - if( !(fd<0) ) - { - printf("\r\n/resource/remote.txt create succeed."); - } - else - { - printf("\r/resource/remote.txt create fail.\r\nabort."); - return -1; - } - - /* ѧϰ6¸ö¼üÅÌ */ - for( i=0; i<6; i++) - { - unsigned int is_ok = 1; - printf("\r\npress key %s",desc_key[i]); - while( is_ok==1 ) - { - if( (rem_mode==1) && (rt_tick_get()>first_tick+10) && (rx_count > 0) ) - { - unsigned int a,b; - unsigned char * p = tmp_buf; - - printf("\r\n%s",desc_key[i]); - - b = rx_count; - p_rem_code_src[i].len = rx_count; - - /* TIM disable counter */ - TIM_Cmd(TIM5, DISABLE); - /* disable the CC3 and CC4 Interrupt Request */ - TIM_ITConfig(TIM5, TIM_IT_CC3, DISABLE); - TIM_ITConfig(TIM5, TIM_IT_CC4, DISABLE); - - p[0] = rx_count / 10000 +'0'; - rx_count = rx_count % 10000; - p[1] = rx_count / 1000 +'0'; - rx_count = rx_count % 1000; - p[2] = rx_count / 100 +'0'; - rx_count = rx_count % 100; - p[3] = rx_count / 10 +'0'; - rx_count = rx_count % 10; - p[4] = rx_count +'0'; - rx_count = 0; - p[5] = '\r'; - p[6] = '\n'; - p += 7; - - rm_code[0] = 0; - - for( a=0; aEWZ@?r;mB|E@jJ2oOsRgB1k z`CkbxfWc!c8WbnD7q;fJ$5OuJRU*f-QsIs5LYczsl1>XhN1m0sgnQ_D+Zql}iGj_& zRdb{zG7_JQCzF6t8#l$y#Ad!qZlGO^Jt+9$#^s-u3v7OgExJV`;-4d!Zn1Aw8yJbG z*7MtLu~OEcf*AbQn-2=*&~9=AaE@%~%R{-ZnG=Q|laq!k-KU&?NWcH@h0Q{lJAe>H z52y|(G(x?KuXPGVt5mO-+n%41Egq~dU0G@Ksn(}N@WI1 zc_wz|tFgl5(!1SqH{dCp^VEdE1FpUJdjy6lt6P2Zx!DP+SrfHCk*Y~ zr(EPxwhMfMm4@juOK|4Qk}V{?2bN%KK| z2h^3~$T^5Xy`(H7=Q#3Sl>_n@q9M;%Gw^t^iXUTNKS%ZjqJyFt7Goo68~1bBd=BR1 zqY6gF3-zW!^D91Ip_-vo!;?&X`rt}6AKznX6t9bCYrK#BXy#xMG5Tv(lz(4MUd~Nl@n&)jg z$E2Te`ubtC)$7gyR@kpKLq6I!x)>ZArMuTR3U5$~2Q&A7cURMNVtM@S1f00`?oWv) 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rt_rtc_control(rt_device_t dev, rt_uint8_t cmd, void *args) -{ - rt_time_t *time; - RT_ASSERT(dev != RT_NULL); - - switch (cmd) - { - case RT_DEVICE_CTRL_RTC_GET_TIME: - time = (rt_time_t *)args; - /* read device */ - *time = RTC_GetCounter(); - break; - - case RT_DEVICE_CTRL_RTC_SET_TIME: - { - time = (rt_time_t *)args; - - /* Enable PWR and BKP clocks */ - RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR | RCC_APB1Periph_BKP, ENABLE); - - /* Allow access to BKP Domain */ - PWR_BackupAccessCmd(ENABLE); - - /* Wait until last write operation on RTC registers has finished */ - RTC_WaitForLastTask(); - - /* Change the current time */ - RTC_SetCounter(*time); - - /* Wait until last write operation on RTC registers has finished */ - RTC_WaitForLastTask(); - - BKP_WriteBackupRegister(BKP_DR1, 0xA5A5); - } - break; - } - - return RT_EOK; -} - -/******************************************************************************* -* Function Name : RTC_Configuration -* Description : Configures the RTC. -* Input : None -* Output : None -* Return : 0 reday,-1 error. -*******************************************************************************/ -int RTC_Configuration(void) -{ - u32 count=0x200000; - - /* Enable PWR and BKP clocks */ - RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR | RCC_APB1Periph_BKP, ENABLE); - - /* Allow access to BKP Domain */ - PWR_BackupAccessCmd(ENABLE); - - /* Reset Backup Domain */ - BKP_DeInit(); - - /* Enable LSE */ - RCC_LSEConfig(RCC_LSE_ON); - /* Wait till LSE is ready */ - while ( (RCC_GetFlagStatus(RCC_FLAG_LSERDY) == RESET) && (--count) ); - if ( count == 0 ) - { - return -1; - } - - /* Select LSE as RTC Clock Source */ - RCC_RTCCLKConfig(RCC_RTCCLKSource_LSE); - - /* Enable RTC Clock */ - RCC_RTCCLKCmd(ENABLE); - - /* Wait for RTC registers synchronization */ - RTC_WaitForSynchro(); - - /* Wait until last write operation on RTC registers has finished */ - RTC_WaitForLastTask(); - - /* Set RTC prescaler: set RTC period to 1sec */ - RTC_SetPrescaler(32767); /* RTC period = RTCCLK/RTC_PR = (32.768 KHz)/(32767+1) */ - - /* Wait until last write operation on RTC registers has finished */ - RTC_WaitForLastTask(); - - return 0; -} - -void rt_hw_rtc_init(void) -{ - rtc.type = RT_Device_Class_RTC; - - if (BKP_ReadBackupRegister(BKP_DR1) != 0xA5A5) - { - rt_kprintf("rtc is not configured\n"); - rt_kprintf("please configure with set_date and set_time\n"); - if ( RTC_Configuration() != 0) - { - rt_kprintf("rtc configure fail...\r\n"); - return ; - } - } - else - { - /* Wait for RTC registers synchronization */ - RTC_WaitForSynchro(); - } - - /* register rtc device */ - rtc.init = RT_NULL; - rtc.open = rt_rtc_open; - rtc.close = RT_NULL; - rtc.read = rt_rtc_read; - rtc.write = RT_NULL; - rtc.control = rt_rtc_control; - - /* no private */ - rtc.private = RT_NULL; - - rt_device_register(&rtc, "rtc", RT_DEVICE_FLAG_RDWR); - - return; -} - -#ifdef RT_USING_FINSH -#include -#include -time_t time(time_t* t) -{ - rt_device_t device; - time_t time; - - device = rt_device_find("rtc"); - if (device != RT_NULL) - { - rt_device_control(device, RT_DEVICE_CTRL_RTC_GET_TIME, &time); - if (t != RT_NULL) *t = time; - } - - return time; -} - -void set_date(rt_uint32_t year, rt_uint32_t month, rt_uint32_t day) -{ - time_t now; - struct tm* ti; - rt_device_t device; - - ti = RT_NULL; - /* get current time */ - time(&now); - - ti = localtime(&now); - if (ti != RT_NULL) - { - ti->tm_year = year - 1900; - ti->tm_mon = month - 1; /* ti->tm_mon = month; 0~11 */ - ti->tm_mday = day; - } - - now = mktime(ti); - - device = rt_device_find("rtc"); - if (device != RT_NULL) - { - rt_rtc_control(device, RT_DEVICE_CTRL_RTC_SET_TIME, &now); - } -} -FINSH_FUNCTION_EXPORT(set_date, set date. e.g: set_date(2010,2,28)) - -void set_time(rt_uint32_t hour, rt_uint32_t minute, rt_uint32_t second) -{ - time_t now; - struct tm* ti; - rt_device_t device; - - ti = RT_NULL; - /* get current time */ - time(&now); - - ti = localtime(&now); - if (ti != RT_NULL) - { - ti->tm_hour = hour; - ti->tm_min = minute; - ti->tm_sec = second; - } - - now = mktime(ti); - device = rt_device_find("rtc"); - if (device != RT_NULL) - { - rt_rtc_control(device, RT_DEVICE_CTRL_RTC_SET_TIME, &now); - } -} -FINSH_FUNCTION_EXPORT(set_time, set time. e.g: set_time(23,59,59)) - -void list_date() -{ - time_t now; - - time(&now); - rt_kprintf("%s\n", ctime(&now)); -} -FINSH_FUNCTION_EXPORT(list_date, show date and time.) -#endif diff --git a/bsp/stm32_radio/rtc.h b/bsp/stm32_radio/rtc.h deleted file mode 100644 index 29154aef94..0000000000 --- a/bsp/stm32_radio/rtc.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef __RTC_H__ -#define __RTC_H__ - -void rt_hw_rtc_init(void); - -#endif diff --git a/bsp/stm32_radio/rtconfig.h b/bsp/stm32_radio/rtconfig.h deleted file mode 100644 index 5df75de88d..0000000000 --- a/bsp/stm32_radio/rtconfig.h +++ /dev/null @@ -1,184 +0,0 @@ -/* RT-Thread config file */ -#ifndef __RTTHREAD_CFG_H__ -#define __RTTHREAD_CFG_H__ - -/* RT_NAME_MAX*/ -#define RT_NAME_MAX 8 - -/* RT_ALIGN_SIZE*/ -#define RT_ALIGN_SIZE 4 - -/* PRIORITY_MAX*/ -#define RT_THREAD_PRIORITY_MAX 32 - -/* Tick per Second*/ -#define RT_TICK_PER_SECOND 100 - -/* SECTION: RT_DEBUG */ -/* Thread Debug*/ -#define RT_DEBUG -/* #define RT_THREAD_DEBUG */ - -#define RT_USING_OVERFLOW_CHECK - -/* Using Hook*/ -#define RT_USING_HOOK - -/* SECTION: IPC */ -/* Using Semaphore*/ -#define RT_USING_SEMAPHORE - -/* Using Mutex*/ -#define RT_USING_MUTEX - -/* Using Event*/ -#define RT_USING_EVENT - -/* Using MailBox*/ -#define RT_USING_MAILBOX - -/* Using Message Queue*/ -#define RT_USING_MESSAGEQUEUE - -/* SECTION: Memory Management */ -/* Using Memory Pool Management*/ -#define RT_USING_MEMPOOL - -/* Using Dynamic Heap Management*/ -#define RT_USING_HEAP - -/* Using Small MM*/ -#define RT_USING_SMALL_MEM - -/* Using SLAB Allocator*/ -/* #define RT_USING_SLAB */ - -/* SECTION: Device System */ -/* Using Device System*/ -#define RT_USING_DEVICE -#define RT_USING_UART1 -// #define RT_USING_UART2 -// #define RT_USING_UART3 - -/* SECTION: Console options */ -/* the buffer size of console*/ -#define RT_CONSOLEBUF_SIZE 128 - -/* SECTION: FinSH shell options */ -/* Using FinSH as Shell*/ -#define RT_USING_FINSH -/* Using symbol table */ -#define FINSH_USING_SYMTAB -#define FINSH_USING_DESCRIPTION -#define FINSH_DEVICE_NAME "uart1" - -/* SECTION: C++ support */ -/* Using C++ support*/ -/* #define RT_USING_CPLUSPLUS */ - -#define RT_USING_DFS -/* #define RT_USING_DFS_EFSL */ -/* byte alignment for EFSL */ -#define BYTE_ALIGNMENT - -#define RT_USING_DFS_ELMFAT -#define RT_DFS_ELM_WORD_ACCESS -#define RT_DFS_ELM_DRIVES 2 - -/* SECTION: DFS options */ -/* the max number of mounted filesystem */ -#define DFS_FILESYSTEMS_MAX 2 -/* the max number of opened files */ -#define DFS_FD_MAX 8 -/* the max number of cached sector */ -#define DFS_CACHE_MAX_NUM 4 - -/* SECTION: lwip, a lighwight TCP/IP protocol stack */ -/* Using lighweight TCP/IP protocol stack */ -#define RT_USING_LWIP - -/* Trace LwIP protocol */ -/* #define RT_LWIP_DEBUG */ - -/* LwIP uses RT-Thread Memory Management */ -#define RT_LWIP_USING_RT_MEM - -/* Enable ICMP protocol */ -#define RT_LWIP_ICMP - -/* Enable IGMP protocol */ -/* #define RT_LWIP_IGMP */ - -/* Enable UDP protocol */ -#define RT_LWIP_UDP - -/* Enable TCP protocol */ -#define RT_LWIP_TCP - -/* the number of simulatenously active TCP connections */ -#define RT_LWIP_TCP_PCB_NUM 3 - -/* TCP sender buffer space */ -#define RT_LWIP_TCP_SND_BUF 2048 - -/* TCP Window Size */ -#define RT_LWIP_TCP_WND (1024 * 20) - -/* Enable SNMP protocol */ -/* #define RT_LWIP_SNMP */ - -/* Using DHCP */ -#define RT_LWIP_DHCP - -/* Using DNS */ -#define RT_LWIP_DNS - -/* ip address of target */ -#define RT_LWIP_IPADDR0 192 -#define RT_LWIP_IPADDR1 168 -#define RT_LWIP_IPADDR2 1 -#define RT_LWIP_IPADDR3 30 - -/* gateway address of target */ -#define RT_LWIP_GWADDR0 192 -#define RT_LWIP_GWADDR1 168 -#define RT_LWIP_GWADDR2 1 -#define RT_LWIP_GWADDR3 1 - -/* mask address of target */ -#define RT_LWIP_MSKADDR0 255 -#define RT_LWIP_MSKADDR1 255 -#define RT_LWIP_MSKADDR2 255 -#define RT_LWIP_MSKADDR3 0 - -/* tcp thread options */ -#define RT_LWIP_TCPTHREAD_PRIORITY 10 -#define RT_LWIP_TCPTHREAD_MBOX_SIZE 4 -#define RT_LWIP_TCPTHREAD_STACKSIZE 1024 - -/* ethernet if thread options */ -#define RT_LWIP_ETHTHREAD_PRIORITY 12 -#define RT_LWIP_ETHTHREAD_MBOX_SIZE 4 -#define RT_LWIP_ETHTHREAD_STACKSIZE 512 - -/* SECTION: RT-Thread/GUI */ -#define RT_USING_RTGUI - -/* name length of RTGUI object */ -#define RTGUI_NAME_MAX 12 -/* support 16 weight font */ -#define RTGUI_USING_FONT16 -/* support Chinese font */ -#define RTGUI_USING_FONTHZ -/* use DFS as file interface */ -#define RTGUI_USING_DFS_FILERW -/* use font file as Chinese font */ -#define RTGUI_USING_HZ_FILE -/* use small size in RTGUI */ -#define RTGUI_USING_SMALL_SIZE -/* use mouse cursor */ -/* #define RTGUI_USING_MOUSE_CURSOR */ -/* default font size in RTGUI */ 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© COPYRIGHT 2009 STMicroelectronics
- */ - -/* Includes ------------------------------------------------------------------*/ -#include "sdcard.h" -#include - -/** @addtogroup STM32F10x_StdPeriph_Examples - * @{ - */ - -/** @addtogroup SDIO_Example - * @{ - */ - -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ -#define NULL 0 -#define SDIO_STATIC_FLAGS ((uint32_t)0x000005FF) -#define SDIO_CMD0TIMEOUT ((uint32_t)0x00002710) -#define SDIO_FIFO_Address ((uint32_t)0x40018080) - -/* Mask for errors Card Status R1 (OCR Register) */ -#define SD_OCR_ADDR_OUT_OF_RANGE ((uint32_t)0x80000000) -#define SD_OCR_ADDR_MISALIGNED ((uint32_t)0x40000000) -#define SD_OCR_BLOCK_LEN_ERR ((uint32_t)0x20000000) -#define SD_OCR_ERASE_SEQ_ERR ((uint32_t)0x10000000) -#define SD_OCR_BAD_ERASE_PARAM ((uint32_t)0x08000000) -#define SD_OCR_WRITE_PROT_VIOLATION ((uint32_t)0x04000000) -#define SD_OCR_LOCK_UNLOCK_FAILED ((uint32_t)0x01000000) -#define SD_OCR_COM_CRC_FAILED ((uint32_t)0x00800000) -#define SD_OCR_ILLEGAL_CMD ((uint32_t)0x00400000) -#define SD_OCR_CARD_ECC_FAILED ((uint32_t)0x00200000) -#define SD_OCR_CC_ERROR ((uint32_t)0x00100000) -#define SD_OCR_GENERAL_UNKNOWN_ERROR ((uint32_t)0x00080000) -#define SD_OCR_STREAM_READ_UNDERRUN ((uint32_t)0x00040000) -#define SD_OCR_STREAM_WRITE_OVERRUN ((uint32_t)0x00020000) -#define SD_OCR_CID_CSD_OVERWRIETE ((uint32_t)0x00010000) -#define SD_OCR_WP_ERASE_SKIP ((uint32_t)0x00008000) -#define SD_OCR_CARD_ECC_DISABLED ((uint32_t)0x00004000) -#define SD_OCR_ERASE_RESET ((uint32_t)0x00002000) -#define SD_OCR_AKE_SEQ_ERROR ((uint32_t)0x00000008) -#define SD_OCR_ERRORBITS ((uint32_t)0xFDFFE008) - -/* Masks for R6 Response */ -#define SD_R6_GENERAL_UNKNOWN_ERROR ((uint32_t)0x00002000) -#define SD_R6_ILLEGAL_CMD ((uint32_t)0x00004000) -#define SD_R6_COM_CRC_FAILED ((uint32_t)0x00008000) - -#define SD_VOLTAGE_WINDOW_SD ((uint32_t)0x80100000) -#define SD_HIGH_CAPACITY ((uint32_t)0x40000000) -#define SD_STD_CAPACITY ((uint32_t)0x00000000) -#define SD_CHECK_PATTERN ((uint32_t)0x000001AA) -#define SD_VOLTAGE_WINDOW_MMC ((uint32_t)0x80FF8000) - -#define SD_MAX_VOLT_TRIAL ((uint32_t)0x0000FFFF) -#define SD_ALLZERO ((uint32_t)0x00000000) - -#define SD_WIDE_BUS_SUPPORT ((uint32_t)0x00040000) -#define SD_SINGLE_BUS_SUPPORT ((uint32_t)0x00010000) -#define SD_CARD_LOCKED ((uint32_t)0x02000000) -#define SD_CARD_PROGRAMMING ((uint32_t)0x00000007) -#define SD_CARD_RECEIVING ((uint32_t)0x00000006) -#define SD_DATATIMEOUT ((uint32_t)0xFFFFFFFF) -#define SD_0TO7BITS ((uint32_t)0x000000FF) -#define SD_8TO15BITS ((uint32_t)0x0000FF00) -#define SD_16TO23BITS ((uint32_t)0x00FF0000) -#define SD_24TO31BITS ((uint32_t)0xFF000000) -#define SD_MAX_DATA_LENGTH ((uint32_t)0x01FFFFFF) - -#define SD_HALFFIFO ((uint32_t)0x00000008) -#define SD_HALFFIFOBYTES ((uint32_t)0x00000020) - -/* Command Class Supported */ -#define SD_CCCC_LOCK_UNLOCK ((uint32_t)0x00000080) -#define SD_CCCC_WRITE_PROT ((uint32_t)0x00000040) -#define SD_CCCC_ERASE ((uint32_t)0x00000020) - -/* Following commands are SD Card Specific commands. - SDIO_APP_CMD should be sent before sending these commands. */ -#define SDIO_SEND_IF_COND ((uint32_t)0x00000008) - -#define SDIO_INIT_CLK_DIV ((uint8_t)0xB2) -#define SDIO_TRANSFER_CLK_DIV ((uint8_t)0x1) - -/* Private macro -------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -static uint32_t CardType = SDIO_STD_CAPACITY_SD_CARD_V1_1; -static uint32_t CSD_Tab[4], CID_Tab[4], RCA = 0; -static uint32_t DeviceMode = SD_POLLING_MODE; -static uint32_t TotalNumberOfBytes = 0, StopCondition = 0; -uint32_t *SrcBuffer, *DestBuffer; -volatile SD_Error TransferError = SD_OK; -__IO uint32_t TransferEnd = 0; -__IO uint32_t NumberOfBytes = 0; -SDIO_InitTypeDef SDIO_InitStructure; -SDIO_CmdInitTypeDef SDIO_CmdInitStructure; -SDIO_DataInitTypeDef SDIO_DataInitStructure; - -/* Private function prototypes -----------------------------------------------*/ -static SD_Error CmdError(void); -static SD_Error CmdResp1Error(uint8_t cmd); -static SD_Error CmdResp7Error(void); -static SD_Error CmdResp3Error(void); -static SD_Error CmdResp2Error(void); -static SD_Error CmdResp6Error(uint8_t cmd, uint16_t *prca); -static SD_Error SDEnWideBus(FunctionalState NewState); -static SD_Error IsCardProgramming(uint8_t *pstatus); -static SD_Error FindSCR(uint16_t rca, uint32_t *pscr); -static uint8_t convert_from_bytes_to_power_of_two(uint16_t NumberOfBytes); -static void GPIO_Configuration(void); -static void DMA_TxConfiguration(uint32_t *BufferSRC, uint32_t BufferSize); -static void DMA_RxConfiguration(uint32_t *BufferDST, uint32_t BufferSize); - -/* Private functions ---------------------------------------------------------*/ - -/** - * @brief Initializes the SD Card and put it into StandBy State (Ready - * for data transfer). - * @param None - * @retval SD_Error: SD Card Error code. - */ -SD_Error SD_Init(void) -{ - SD_Error errorstatus = SD_OK; - - /* Configure SDIO interface GPIO */ - GPIO_Configuration(); - - /* Enable the SDIO AHB Clock */ - RCC_AHBPeriphClockCmd(RCC_AHBPeriph_SDIO, ENABLE); - - /* Enable the DMA2 Clock */ - RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA2, ENABLE); - - SDIO_DeInit(); - - errorstatus = SD_PowerON(); - - if (errorstatus != SD_OK) - { - /* CMD Response TimeOut (wait for CMDSENT flag) */ - return(errorstatus); - } - - errorstatus = SD_InitializeCards(); - - if (errorstatus != SD_OK) - { - /* CMD Response TimeOut (wait for CMDSENT flag) */ - return(errorstatus); - } - - /* Configure the SDIO peripheral */ - /* HCLK = 72 MHz, SDIOCLK = 72 MHz, SDIO_CK = HCLK/(2 + 1) = 24 MHz */ - SDIO_InitStructure.SDIO_ClockDiv = SDIO_TRANSFER_CLK_DIV; - SDIO_InitStructure.SDIO_ClockEdge = SDIO_ClockEdge_Rising; - SDIO_InitStructure.SDIO_ClockBypass = SDIO_ClockBypass_Disable; - SDIO_InitStructure.SDIO_ClockPowerSave = SDIO_ClockPowerSave_Disable; - SDIO_InitStructure.SDIO_BusWide = SDIO_BusWide_1b; - SDIO_InitStructure.SDIO_HardwareFlowControl = SDIO_HardwareFlowControl_Enable; - SDIO_Init(&SDIO_InitStructure); - - return(errorstatus); -} - -/** - * @brief Enquires cards about their operating voltage and configures - * clock controls. - * @param None - * @retval SD_Error: SD Card Error code. - */ -SD_Error SD_PowerON(void) -{ - SD_Error errorstatus = SD_OK; - uint32_t response = 0, count = 0; - bool validvoltage = FALSE; - uint32_t SDType = SD_STD_CAPACITY; - - /* Power ON Sequence -------------------------------------------------------*/ - /* Configure the SDIO peripheral */ - SDIO_InitStructure.SDIO_ClockDiv = SDIO_INIT_CLK_DIV; /* HCLK = 72MHz, SDIOCLK = 72MHz, SDIO_CK = HCLK/(178 + 2) = 400 KHz */ - SDIO_InitStructure.SDIO_ClockEdge = SDIO_ClockEdge_Rising; - SDIO_InitStructure.SDIO_ClockBypass = SDIO_ClockBypass_Disable; - SDIO_InitStructure.SDIO_ClockPowerSave = SDIO_ClockPowerSave_Disable; - SDIO_InitStructure.SDIO_BusWide = SDIO_BusWide_1b; - SDIO_InitStructure.SDIO_HardwareFlowControl = SDIO_HardwareFlowControl_Disable; - SDIO_Init(&SDIO_InitStructure); - - /* Set Power State to ON */ - SDIO_SetPowerState(SDIO_PowerState_ON); - - /* Enable SDIO Clock */ - SDIO_ClockCmd(ENABLE); - - /* CMD0: GO_IDLE_STATE -------------------------------------------------------*/ - /* No CMD response required */ - SDIO_CmdInitStructure.SDIO_Argument = 0x0; - SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_GO_IDLE_STATE; - SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_No; - SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; - SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; - SDIO_SendCommand(&SDIO_CmdInitStructure); - - errorstatus = CmdError(); - - if (errorstatus != SD_OK) - { - /* CMD Response TimeOut (wait for CMDSENT flag) */ - return(errorstatus); - } - - /* CMD8: SEND_IF_COND --------------------------------------------------------*/ - /* Send CMD8 to verify SD card interface operating condition */ - /* Argument: - [31:12]: Reserved (shall be set to '0') - - [11:8]: Supply Voltage (VHS) 0x1 (Range: 2.7-3.6 V) - - [7:0]: Check Pattern (recommended 0xAA) */ - /* CMD Response: R7 */ - SDIO_CmdInitStructure.SDIO_Argument = SD_CHECK_PATTERN; - SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_SEND_IF_COND; - SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; - SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; - SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; - SDIO_SendCommand(&SDIO_CmdInitStructure); - - errorstatus = CmdResp7Error(); - - if (errorstatus == SD_OK) - { - CardType = SDIO_STD_CAPACITY_SD_CARD_V2_0; /* SD Card 2.0 */ - SDType = SD_HIGH_CAPACITY; - } - else - { - /* CMD55 */ - SDIO_CmdInitStructure.SDIO_Argument = 0x00; - SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_APP_CMD; - SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; - SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; - SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; - SDIO_SendCommand(&SDIO_CmdInitStructure); - errorstatus = CmdResp1Error(SDIO_APP_CMD); - } - /* CMD55 */ - SDIO_CmdInitStructure.SDIO_Argument = 0x00; - SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_APP_CMD; - SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; - SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; - SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; - SDIO_SendCommand(&SDIO_CmdInitStructure); - errorstatus = CmdResp1Error(SDIO_APP_CMD); - - /* If errorstatus is Command TimeOut, it is a MMC card */ - /* If errorstatus is SD_OK it is a SD card: SD card 2.0 (voltage range mismatch) - or SD card 1.x */ - if (errorstatus == SD_OK) - { - /* SD CARD */ - /* Send ACMD41 SD_APP_OP_COND with Argument 0x80100000 */ - while ((!validvoltage) && (count < SD_MAX_VOLT_TRIAL)) - { - - /* SEND CMD55 APP_CMD with RCA as 0 */ - SDIO_CmdInitStructure.SDIO_Argument = 0x00; - SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_APP_CMD; - SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; - SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; - SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; - SDIO_SendCommand(&SDIO_CmdInitStructure); - - errorstatus = CmdResp1Error(SDIO_APP_CMD); - - if (errorstatus != SD_OK) - { - return(errorstatus); - } - SDIO_CmdInitStructure.SDIO_Argument = SD_VOLTAGE_WINDOW_SD | SDType; - SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_SD_APP_OP_COND; - SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; - SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; - SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; - SDIO_SendCommand(&SDIO_CmdInitStructure); - - errorstatus = CmdResp3Error(); - if (errorstatus != SD_OK) - { - return(errorstatus); - } - - response = SDIO_GetResponse(SDIO_RESP1); - validvoltage = (bool) (((response >> 31) == 1) ? 1 : 0); - count++; - } - if (count >= SD_MAX_VOLT_TRIAL) - { - errorstatus = SD_INVALID_VOLTRANGE; - return(errorstatus); - } - - if (response &= SD_HIGH_CAPACITY) - { - CardType = SDIO_HIGH_CAPACITY_SD_CARD; - } - }/* else MMC Card */ - else - { - CardType = SDIO_MULTIMEDIA_CARD; - - /* Send CMD1 SEND_OP_COND with Argument 0x80FF8000 */ - while ((!validvoltage) && (count < SD_MAX_VOLT_TRIAL)) - { - /* SEND CMD55 APP_CMD with RCA as 0 */ - SDIO_CmdInitStructure.SDIO_Argument = SD_VOLTAGE_WINDOW_MMC; - SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_SEND_OP_COND; - SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; - SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; - SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; - SDIO_SendCommand(&SDIO_CmdInitStructure); - - errorstatus = CmdResp3Error(); - if (errorstatus != SD_OK) - { - return(errorstatus); - } - - response = SDIO_GetResponse(SDIO_RESP1); - validvoltage = (bool) (((response >> 31) == 1) ? 1 : 0); - count++; - } - if (count >= SD_MAX_VOLT_TRIAL) - { - errorstatus = SD_INVALID_VOLTRANGE; - return(errorstatus); - } - } - - return(SD_OK); -} - -/** - * @brief Turns the SDIO output signals off. - * @param None - * @retval SD_Error: SD Card Error code. - */ -SD_Error SD_PowerOFF(void) -{ - SD_Error errorstatus = SD_OK; - - /* Set Power State to OFF */ - SDIO_SetPowerState(SDIO_PowerState_OFF); - - return(errorstatus); -} - -/** - * @brief Intialises all cards or single card as the case may be. - * Card(s) come into standby state. - * @param None - * @retval SD_Error: SD Card Error code. - */ -SD_Error SD_InitializeCards(void) -{ - SD_Error errorstatus = SD_OK; - uint16_t rca = 0x01; - - if (SDIO_GetPowerState() == SDIO_PowerState_OFF) - { - errorstatus = SD_REQUEST_NOT_APPLICABLE; - return(errorstatus); - } - - if (SDIO_SECURE_DIGITAL_IO_CARD != CardType) - { - /* Send CMD2 ALL_SEND_CID */ - SDIO_CmdInitStructure.SDIO_Argument = 0x0; - SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_ALL_SEND_CID; - SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Long; - SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; - SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; - SDIO_SendCommand(&SDIO_CmdInitStructure); - - errorstatus = CmdResp2Error(); - - if (SD_OK != errorstatus) - { - return(errorstatus); - } - - CID_Tab[0] = SDIO_GetResponse(SDIO_RESP1); - CID_Tab[1] = SDIO_GetResponse(SDIO_RESP2); - CID_Tab[2] = SDIO_GetResponse(SDIO_RESP3); - CID_Tab[3] = SDIO_GetResponse(SDIO_RESP4); - } - if ((SDIO_STD_CAPACITY_SD_CARD_V1_1 == CardType) || (SDIO_STD_CAPACITY_SD_CARD_V2_0 == CardType) || (SDIO_SECURE_DIGITAL_IO_COMBO_CARD == CardType) - || (SDIO_HIGH_CAPACITY_SD_CARD == CardType)) - { - /* Send CMD3 SET_REL_ADDR with argument 0 */ - /* SD Card publishes its RCA. */ - SDIO_CmdInitStructure.SDIO_Argument = 0x00; - SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_SET_REL_ADDR; - SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; - SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; - SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; - SDIO_SendCommand(&SDIO_CmdInitStructure); - - errorstatus = CmdResp6Error(SDIO_SET_REL_ADDR, &rca); - - if (SD_OK != errorstatus) - { - return(errorstatus); - } - } - if (SDIO_MULTIMEDIA_CARD == CardType) - { - /* Send CMD3 SET_REL_ADDR with argument 0 */ - /* SD Card publishes its RCA. */ - SDIO_CmdInitStructure.SDIO_Argument = (uint32_t)(rca << 16); - SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_SET_REL_ADDR; - SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; - SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; - SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; - SDIO_SendCommand(&SDIO_CmdInitStructure); - - errorstatus = CmdResp2Error(); - - if (SD_OK != errorstatus) - { - return(errorstatus); - } - } - - if (SDIO_SECURE_DIGITAL_IO_CARD != CardType) - { - RCA = rca; - - /* Send CMD9 SEND_CSD with argument as card's RCA */ - SDIO_CmdInitStructure.SDIO_Argument = (uint32_t)(rca << 16); - SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_SEND_CSD; - SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Long; - SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; - SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; - SDIO_SendCommand(&SDIO_CmdInitStructure); - - errorstatus = CmdResp2Error(); - - if (SD_OK != errorstatus) - { - return(errorstatus); - } - - CSD_Tab[0] = SDIO_GetResponse(SDIO_RESP1); - CSD_Tab[1] = SDIO_GetResponse(SDIO_RESP2); - CSD_Tab[2] = SDIO_GetResponse(SDIO_RESP3); - CSD_Tab[3] = SDIO_GetResponse(SDIO_RESP4); - } - - errorstatus = SD_OK; /* All cards get intialized */ - - return(errorstatus); -} - -/** - * @brief Returns information about specific card. - * @param cardinfo : pointer to a SD_CardInfo structure - * that contains all SD card information. - * @retval SD_Error: SD Card Error code. - */ -SD_Error SD_GetCardInfo(SD_CardInfo *cardinfo) -{ - SD_Error errorstatus = SD_OK; - uint8_t tmp = 0; - - cardinfo->CardType = (uint8_t)CardType; - cardinfo->RCA = (uint16_t)RCA; - - /* Byte 0 */ - tmp = (uint8_t)((CSD_Tab[0] & 0xFF000000) >> 24); - cardinfo->SD_csd.CSDStruct = (tmp & 0xC0) >> 6; - cardinfo->SD_csd.SysSpecVersion = (tmp & 0x3C) >> 2; - cardinfo->SD_csd.Reserved1 = tmp & 0x03; - - /* Byte 1 */ - tmp = (uint8_t)((CSD_Tab[0] & 0x00FF0000) >> 16); - cardinfo->SD_csd.TAAC = tmp; - - /* Byte 2 */ - tmp = (uint8_t)((CSD_Tab[0] & 0x0000FF00) >> 8); - cardinfo->SD_csd.NSAC = tmp; - - /* Byte 3 */ - tmp = (uint8_t)(CSD_Tab[0] & 0x000000FF); - cardinfo->SD_csd.MaxBusClkFrec = tmp; - - /* Byte 4 */ - tmp = (uint8_t)((CSD_Tab[1] & 0xFF000000) >> 24); - cardinfo->SD_csd.CardComdClasses = tmp << 4; - - /* Byte 5 */ - tmp = (uint8_t)((CSD_Tab[1] & 0x00FF0000) >> 16); - cardinfo->SD_csd.CardComdClasses |= (tmp & 0xF0) >> 4; - cardinfo->SD_csd.RdBlockLen = tmp & 0x0F; - - /* Byte 6 */ - tmp = (uint8_t)((CSD_Tab[1] & 0x0000FF00) >> 8); - cardinfo->SD_csd.PartBlockRead = (tmp & 0x80) >> 7; - cardinfo->SD_csd.WrBlockMisalign = (tmp & 0x40) >> 6; - cardinfo->SD_csd.RdBlockMisalign = (tmp & 0x20) >> 5; - cardinfo->SD_csd.DSRImpl = (tmp & 0x10) >> 4; - cardinfo->SD_csd.Reserved2 = 0; /* Reserved */ - - if ((CardType == SDIO_STD_CAPACITY_SD_CARD_V1_1) || (CardType == SDIO_STD_CAPACITY_SD_CARD_V2_0)) - { - cardinfo->SD_csd.DeviceSize = (tmp & 0x03) << 10; - - /* Byte 7 */ - tmp = (uint8_t)(CSD_Tab[1] & 0x000000FF); - cardinfo->SD_csd.DeviceSize |= (tmp) << 2; - - /* Byte 8 */ - tmp = (uint8_t)((CSD_Tab[2] & 0xFF000000) >> 24); - cardinfo->SD_csd.DeviceSize |= (tmp & 0xC0) >> 6; - - cardinfo->SD_csd.MaxRdCurrentVDDMin = (tmp & 0x38) >> 3; - cardinfo->SD_csd.MaxRdCurrentVDDMax = (tmp & 0x07); - - /* Byte 9 */ - tmp = (uint8_t)((CSD_Tab[2] & 0x00FF0000) >> 16); - cardinfo->SD_csd.MaxWrCurrentVDDMin = (tmp & 0xE0) >> 5; - cardinfo->SD_csd.MaxWrCurrentVDDMax = (tmp & 0x1C) >> 2; - cardinfo->SD_csd.DeviceSizeMul = (tmp & 0x03) << 1; - /* Byte 10 */ - tmp = (uint8_t)((CSD_Tab[2] & 0x0000FF00) >> 8); - cardinfo->SD_csd.DeviceSizeMul |= (tmp & 0x80) >> 7; - - cardinfo->CardCapacity = (cardinfo->SD_csd.DeviceSize + 1) ; - cardinfo->CardCapacity *= (1 << (cardinfo->SD_csd.DeviceSizeMul + 2)); - cardinfo->CardBlockSize = 1 << (cardinfo->SD_csd.RdBlockLen); - cardinfo->CardCapacity *= cardinfo->CardBlockSize; - } - else if (CardType == SDIO_HIGH_CAPACITY_SD_CARD) - { - /* Byte 7 */ - tmp = (uint8_t)(CSD_Tab[1] & 0x000000FF); - cardinfo->SD_csd.DeviceSize = (tmp & 0x3F) << 16; - - /* Byte 8 */ - tmp = (uint8_t)((CSD_Tab[2] & 0xFF000000) >> 24); - - cardinfo->SD_csd.DeviceSize |= (tmp << 8); - - /* Byte 9 */ - tmp = (uint8_t)((CSD_Tab[2] & 0x00FF0000) >> 16); - - cardinfo->SD_csd.DeviceSize |= (tmp); - - /* Byte 10 */ - tmp = (uint8_t)((CSD_Tab[2] & 0x0000FF00) >> 8); - - cardinfo->CardCapacity = (cardinfo->SD_csd.DeviceSize + 1) * 512 * 1024; - cardinfo->CardBlockSize = 512; - } - - - cardinfo->SD_csd.EraseGrSize = (tmp & 0x40) >> 6; - cardinfo->SD_csd.EraseGrMul = (tmp & 0x3F) << 1; - - /* Byte 11 */ - tmp = (uint8_t)(CSD_Tab[2] & 0x000000FF); - cardinfo->SD_csd.EraseGrMul |= (tmp & 0x80) >> 7; - cardinfo->SD_csd.WrProtectGrSize = (tmp & 0x7F); - - /* Byte 12 */ - tmp = (uint8_t)((CSD_Tab[3] & 0xFF000000) >> 24); - cardinfo->SD_csd.WrProtectGrEnable = (tmp & 0x80) >> 7; - cardinfo->SD_csd.ManDeflECC = (tmp & 0x60) >> 5; - cardinfo->SD_csd.WrSpeedFact = (tmp & 0x1C) >> 2; - cardinfo->SD_csd.MaxWrBlockLen = (tmp & 0x03) << 2; - - /* Byte 13 */ - tmp = (uint8_t)((CSD_Tab[3] & 0x00FF0000) >> 16); - cardinfo->SD_csd.MaxWrBlockLen |= (tmp & 0xC0) >> 6; - cardinfo->SD_csd.WriteBlockPaPartial = (tmp & 0x20) >> 5; - cardinfo->SD_csd.Reserved3 = 0; - cardinfo->SD_csd.ContentProtectAppli = (tmp & 0x01); - - /* Byte 14 */ - tmp = (uint8_t)((CSD_Tab[3] & 0x0000FF00) >> 8); - cardinfo->SD_csd.FileFormatGrouop = (tmp & 0x80) >> 7; - cardinfo->SD_csd.CopyFlag = (tmp & 0x40) >> 6; - cardinfo->SD_csd.PermWrProtect = (tmp & 0x20) >> 5; - cardinfo->SD_csd.TempWrProtect = (tmp & 0x10) >> 4; - cardinfo->SD_csd.FileFormat = (tmp & 0x0C) >> 2; - cardinfo->SD_csd.ECC = (tmp & 0x03); - - /* Byte 15 */ - tmp = (uint8_t)(CSD_Tab[3] & 0x000000FF); - cardinfo->SD_csd.CSD_CRC = (tmp & 0xFE) >> 1; - cardinfo->SD_csd.Reserved4 = 1; - - - /* Byte 0 */ - tmp = (uint8_t)((CID_Tab[0] & 0xFF000000) >> 24); - cardinfo->SD_cid.ManufacturerID = tmp; - - /* Byte 1 */ - tmp = (uint8_t)((CID_Tab[0] & 0x00FF0000) >> 16); - cardinfo->SD_cid.OEM_AppliID = tmp << 8; - - /* Byte 2 */ - tmp = (uint8_t)((CID_Tab[0] & 0x000000FF00) >> 8); - cardinfo->SD_cid.OEM_AppliID |= tmp; - - /* Byte 3 */ - tmp = (uint8_t)(CID_Tab[0] & 0x000000FF); - cardinfo->SD_cid.ProdName1 = tmp << 24; - - /* Byte 4 */ - tmp = (uint8_t)((CID_Tab[1] & 0xFF000000) >> 24); - cardinfo->SD_cid.ProdName1 |= tmp << 16; - - /* Byte 5 */ - tmp = (uint8_t)((CID_Tab[1] & 0x00FF0000) >> 16); - cardinfo->SD_cid.ProdName1 |= tmp << 8; - - /* Byte 6 */ - tmp = (uint8_t)((CID_Tab[1] & 0x0000FF00) >> 8); - cardinfo->SD_cid.ProdName1 |= tmp; - - /* Byte 7 */ - tmp = (uint8_t)(CID_Tab[1] & 0x000000FF); - cardinfo->SD_cid.ProdName2 = tmp; - - /* Byte 8 */ - tmp = (uint8_t)((CID_Tab[2] & 0xFF000000) >> 24); - cardinfo->SD_cid.ProdRev = tmp; - - /* Byte 9 */ - tmp = (uint8_t)((CID_Tab[2] & 0x00FF0000) >> 16); - cardinfo->SD_cid.ProdSN = tmp << 24; - - /* Byte 10 */ - tmp = (uint8_t)((CID_Tab[2] & 0x0000FF00) >> 8); - cardinfo->SD_cid.ProdSN |= tmp << 16; - - /* Byte 11 */ - tmp = (uint8_t)(CID_Tab[2] & 0x000000FF); - cardinfo->SD_cid.ProdSN |= tmp << 8; - - /* Byte 12 */ - tmp = (uint8_t)((CID_Tab[3] & 0xFF000000) >> 24); - cardinfo->SD_cid.ProdSN |= tmp; - - /* Byte 13 */ - tmp = (uint8_t)((CID_Tab[3] & 0x00FF0000) >> 16); - cardinfo->SD_cid.Reserved1 |= (tmp & 0xF0) >> 4; - cardinfo->SD_cid.ManufactDate = (tmp & 0x0F) << 8; - - /* Byte 14 */ - tmp = (uint8_t)((CID_Tab[3] & 0x0000FF00) >> 8); - cardinfo->SD_cid.ManufactDate |= tmp; - - /* Byte 15 */ - tmp = (uint8_t)(CID_Tab[3] & 0x000000FF); - cardinfo->SD_cid.CID_CRC = (tmp & 0xFE) >> 1; - cardinfo->SD_cid.Reserved2 = 1; - - return(errorstatus); -} - -/** - * @brief Enables wide bus opeartion for the requeseted card if - * supported by card. - * @param WideMode: Specifies the SD card wide bus mode. - * This parameter can be one of the following values: - * @arg SDIO_BusWide_8b: 8-bit data transfer (Only for MMC) - * @arg SDIO_BusWide_4b: 4-bit data transfer - * @arg SDIO_BusWide_1b: 1-bit data transfer - * @retval SD_Error: SD Card Error code. - */ -SD_Error SD_EnableWideBusOperation(uint32_t WideMode) -{ - SD_Error errorstatus = SD_OK; - - /* MMC Card doesn't support this feature */ - if (SDIO_MULTIMEDIA_CARD == CardType) - { - errorstatus = SD_UNSUPPORTED_FEATURE; - return(errorstatus); - } - else if ((SDIO_STD_CAPACITY_SD_CARD_V1_1 == CardType) || (SDIO_STD_CAPACITY_SD_CARD_V2_0 == CardType) || (SDIO_HIGH_CAPACITY_SD_CARD == CardType)) - { - if (SDIO_BusWide_8b == WideMode) - { - errorstatus = SD_UNSUPPORTED_FEATURE; - return(errorstatus); - } - else if (SDIO_BusWide_4b == WideMode) - { - errorstatus = SDEnWideBus(ENABLE); - - if (SD_OK == errorstatus) - { - /* Configure the SDIO peripheral */ - SDIO_InitStructure.SDIO_ClockDiv = SDIO_TRANSFER_CLK_DIV; - SDIO_InitStructure.SDIO_ClockEdge = SDIO_ClockEdge_Rising; - SDIO_InitStructure.SDIO_ClockBypass = SDIO_ClockBypass_Disable; - SDIO_InitStructure.SDIO_ClockPowerSave = SDIO_ClockPowerSave_Disable; - SDIO_InitStructure.SDIO_BusWide = SDIO_BusWide_4b; - SDIO_InitStructure.SDIO_HardwareFlowControl = SDIO_HardwareFlowControl_Disable; - SDIO_Init(&SDIO_InitStructure); - } - } - else - { - errorstatus = SDEnWideBus(DISABLE); - - if (SD_OK == errorstatus) - { - /* Configure the SDIO peripheral */ - SDIO_InitStructure.SDIO_ClockDiv = SDIO_TRANSFER_CLK_DIV; - SDIO_InitStructure.SDIO_ClockEdge = SDIO_ClockEdge_Rising; - SDIO_InitStructure.SDIO_ClockBypass = SDIO_ClockBypass_Disable; - SDIO_InitStructure.SDIO_ClockPowerSave = SDIO_ClockPowerSave_Disable; - SDIO_InitStructure.SDIO_BusWide = SDIO_BusWide_1b; - SDIO_InitStructure.SDIO_HardwareFlowControl = SDIO_HardwareFlowControl_Disable; - SDIO_Init(&SDIO_InitStructure); - } - } - } - - return(errorstatus); -} - -/** - * @brief Sets device mode whether to operate in Polling, Interrupt or - * DMA mode. - * @param Mode: Specifies the Data Transfer mode. - * This parameter can be one of the following values: - * @arg SD_DMA_MODE: Data transfer using DMA. - * @arg SD_INTERRUPT_MODE: Data transfer using interrupts. - * @arg SD_POLLING_MODE: Data transfer using flags. - * @retval SD_Error: SD Card Error code. - */ -SD_Error SD_SetDeviceMode(uint32_t Mode) -{ - SD_Error errorstatus = SD_OK; - - if ((Mode == SD_DMA_MODE) || (Mode == SD_INTERRUPT_MODE) || (Mode == SD_POLLING_MODE)) - { - DeviceMode = Mode; - } - else - { - errorstatus = SD_INVALID_PARAMETER; - } - return(errorstatus); - -} - -/** - * @brief Selects od Deselects the corresponding card. - * @param addr: Address of the Card to be selected. - * @retval SD_Error: SD Card Error code. - */ -SD_Error SD_SelectDeselect(uint32_t addr) -{ - SD_Error errorstatus = SD_OK; - - /* Send CMD7 SDIO_SEL_DESEL_CARD */ - SDIO_CmdInitStructure.SDIO_Argument = addr; - SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_SEL_DESEL_CARD; - SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; - SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; - SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; - SDIO_SendCommand(&SDIO_CmdInitStructure); - - errorstatus = CmdResp1Error(SDIO_SEL_DESEL_CARD); - - return(errorstatus); -} - -/** - * @brief Allows to read one block from a specified address in a card. - * @param addr: Address from where data are to be read. - * @param readbuff: pointer to the buffer that will contain the - * received data - * @param BlockSize: the SD card Data block size. - * @retval SD_Error: SD Card Error code. - */ -SD_Error SD_ReadBlock(uint32_t addr, uint32_t *readbuff, uint16_t BlockSize) -{ - SD_Error errorstatus = SD_OK; - uint32_t count = 0, *tempbuff = readbuff; - uint8_t power = 0; - - if (NULL == readbuff) - { - errorstatus = SD_INVALID_PARAMETER; - return(errorstatus); - } - - TransferError = SD_OK; - TransferEnd = 0; - TotalNumberOfBytes = 0; - - /* Clear all DPSM configuration */ - SDIO_DataInitStructure.SDIO_DataTimeOut = SD_DATATIMEOUT; - SDIO_DataInitStructure.SDIO_DataLength = 0; - SDIO_DataInitStructure.SDIO_DataBlockSize = SDIO_DataBlockSize_1b; - SDIO_DataInitStructure.SDIO_TransferDir = SDIO_TransferDir_ToCard; - SDIO_DataInitStructure.SDIO_TransferMode = SDIO_TransferMode_Block; - SDIO_DataInitStructure.SDIO_DPSM = SDIO_DPSM_Disable; - SDIO_DataConfig(&SDIO_DataInitStructure); - SDIO_DMACmd(DISABLE); - - if (SDIO_GetResponse(SDIO_RESP1) & SD_CARD_LOCKED) - { - errorstatus = SD_LOCK_UNLOCK_FAILED; - return(errorstatus); - } - - if (CardType == SDIO_HIGH_CAPACITY_SD_CARD) - { - BlockSize = 512; - addr /= 512; - } - if ((BlockSize > 0) && (BlockSize <= 2048) && ((BlockSize & (BlockSize - 1)) == 0)) - { - power = convert_from_bytes_to_power_of_two(BlockSize); - - /* Set Block Size for Card */ - SDIO_CmdInitStructure.SDIO_Argument = (uint32_t) BlockSize; - SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_SET_BLOCKLEN; - SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; - SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; - SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; - SDIO_SendCommand(&SDIO_CmdInitStructure); - - errorstatus = CmdResp1Error(SDIO_SET_BLOCKLEN); - - if (SD_OK != errorstatus) - { - return(errorstatus); - } - } - else - { - errorstatus = SD_INVALID_PARAMETER; - return(errorstatus); - } - - SDIO_DataInitStructure.SDIO_DataTimeOut = SD_DATATIMEOUT; - SDIO_DataInitStructure.SDIO_DataLength = BlockSize; - SDIO_DataInitStructure.SDIO_DataBlockSize = (uint32_t) power << 4; - SDIO_DataInitStructure.SDIO_TransferDir = SDIO_TransferDir_ToSDIO; - SDIO_DataInitStructure.SDIO_TransferMode = SDIO_TransferMode_Block; - SDIO_DataInitStructure.SDIO_DPSM = SDIO_DPSM_Enable; - SDIO_DataConfig(&SDIO_DataInitStructure); - - TotalNumberOfBytes = BlockSize; - StopCondition = 0; - DestBuffer = readbuff; - - /* Send CMD17 READ_SINGLE_BLOCK */ - SDIO_CmdInitStructure.SDIO_Argument = (uint32_t)addr; - SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_READ_SINGLE_BLOCK; - SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; - SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; - SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; - SDIO_SendCommand(&SDIO_CmdInitStructure); - - errorstatus = CmdResp1Error(SDIO_READ_SINGLE_BLOCK); - - if (errorstatus != SD_OK) - { - return(errorstatus); - } - /* In case of single block transfer, no need of stop transfer at all.*/ - if (DeviceMode == SD_POLLING_MODE) - { - /* Polling mode */ - while (!(SDIO->STA &(SDIO_FLAG_RXOVERR | SDIO_FLAG_DCRCFAIL | SDIO_FLAG_DTIMEOUT | SDIO_FLAG_DBCKEND | SDIO_FLAG_STBITERR))) - { - if (SDIO_GetFlagStatus(SDIO_FLAG_RXFIFOHF) != RESET) - { - for (count = 0; count < 8; count++) - { - *(tempbuff + count) = SDIO_ReadData(); - } - tempbuff += 8; - } - } - - if (SDIO_GetFlagStatus(SDIO_FLAG_DTIMEOUT) != RESET) - { - SDIO_ClearFlag(SDIO_FLAG_DTIMEOUT); - errorstatus = SD_DATA_TIMEOUT; - return(errorstatus); - } - else if (SDIO_GetFlagStatus(SDIO_FLAG_DCRCFAIL) != RESET) - { - SDIO_ClearFlag(SDIO_FLAG_DCRCFAIL); - errorstatus = SD_DATA_CRC_FAIL; - return(errorstatus); - } - else if (SDIO_GetFlagStatus(SDIO_FLAG_RXOVERR) != RESET) - { - SDIO_ClearFlag(SDIO_FLAG_RXOVERR); - errorstatus = SD_RX_OVERRUN; - return(errorstatus); - } - else if (SDIO_GetFlagStatus(SDIO_FLAG_STBITERR) != RESET) - { - SDIO_ClearFlag(SDIO_FLAG_STBITERR); - errorstatus = SD_START_BIT_ERR; - return(errorstatus); - } - while (SDIO_GetFlagStatus(SDIO_FLAG_RXDAVL) != RESET) - { - *tempbuff = SDIO_ReadData(); - tempbuff++; - } - - /* Clear all the static flags */ - SDIO_ClearFlag(SDIO_STATIC_FLAGS); - } - else if (DeviceMode == SD_INTERRUPT_MODE) - { - SDIO_ITConfig(SDIO_IT_DCRCFAIL | SDIO_IT_DTIMEOUT | SDIO_IT_DATAEND | SDIO_IT_RXOVERR | SDIO_IT_RXFIFOHF | SDIO_IT_STBITERR, ENABLE); - while ((TransferEnd == 0) && (TransferError == SD_OK)) - {} - if (TransferError != SD_OK) - { - return(TransferError); - } - } - else if (DeviceMode == SD_DMA_MODE) - { - rt_tick_t tick; - - SDIO_ITConfig(SDIO_IT_DCRCFAIL | SDIO_IT_DTIMEOUT | SDIO_IT_DATAEND | SDIO_IT_RXOVERR | SDIO_IT_STBITERR, ENABLE); - SDIO_DMACmd(ENABLE); - tick = rt_tick_get(); - DMA_RxConfiguration(readbuff, BlockSize); - while (DMA_GetFlagStatus(DMA2_FLAG_TC4) == RESET) - { - if ((TransferError != SD_OK) || (rt_tick_get() - tick > 10)) - { - errorstatus = SD_ERROR; - // rt_kprintf("sd error\n"); - break; - } - } - } - return(errorstatus); -} - -/** - * @brief Allows to read blocks from a specified address in a card. - * @param addr: Address from where data are to be read. - * @param readbuff: pointer to the buffer that will contain the - * received data. - * @param BlockSize: the SD card Data block size. - * @param NumberOfBlocks: number of blocks to be read. - * @retval SD_Error: SD Card Error code. - */ -SD_Error SD_ReadMultiBlocks(uint32_t addr, uint32_t *readbuff, uint16_t BlockSize, uint32_t NumberOfBlocks) -{ - SD_Error errorstatus = SD_OK; - uint32_t count = 0, *tempbuff = readbuff; - uint8_t power = 0; - - if (NULL == readbuff) - { - errorstatus = SD_INVALID_PARAMETER; - return(errorstatus); - } - - TransferError = SD_OK; - TransferEnd = 0; - TotalNumberOfBytes = 0; - - /* Clear all DPSM configuration */ - SDIO_DataInitStructure.SDIO_DataTimeOut = SD_DATATIMEOUT; - SDIO_DataInitStructure.SDIO_DataLength = 0; - SDIO_DataInitStructure.SDIO_DataBlockSize = SDIO_DataBlockSize_1b; - SDIO_DataInitStructure.SDIO_TransferDir = SDIO_TransferDir_ToCard; - SDIO_DataInitStructure.SDIO_TransferMode = SDIO_TransferMode_Block; - SDIO_DataInitStructure.SDIO_DPSM = SDIO_DPSM_Disable; - SDIO_DataConfig(&SDIO_DataInitStructure); - SDIO_DMACmd(DISABLE); - - if (SDIO_GetResponse(SDIO_RESP1) & SD_CARD_LOCKED) - { - errorstatus = SD_LOCK_UNLOCK_FAILED; - return(errorstatus); - } - - if (CardType == SDIO_HIGH_CAPACITY_SD_CARD) - { - BlockSize = 512; - addr /= 512; - } - - if ((BlockSize > 0) && (BlockSize <= 2048) && (0 == (BlockSize & (BlockSize - 1)))) - { - power = convert_from_bytes_to_power_of_two(BlockSize); - - /* Set Block Size for Card */ - SDIO_CmdInitStructure.SDIO_Argument = (uint32_t) BlockSize; - SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_SET_BLOCKLEN; - SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; - SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; - SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; - SDIO_SendCommand(&SDIO_CmdInitStructure); - - errorstatus = CmdResp1Error(SDIO_SET_BLOCKLEN); - - if (SD_OK != errorstatus) - { - return(errorstatus); - } - } - else - { - errorstatus = SD_INVALID_PARAMETER; - return(errorstatus); - } - - if (NumberOfBlocks > 1) - { - /* Common to all modes */ - if (NumberOfBlocks * BlockSize > SD_MAX_DATA_LENGTH) - { - errorstatus = SD_INVALID_PARAMETER; - return(errorstatus); - } - - TotalNumberOfBytes = NumberOfBlocks * BlockSize; - StopCondition = 1; - DestBuffer = readbuff; - - SDIO_DataInitStructure.SDIO_DataTimeOut = SD_DATATIMEOUT; - SDIO_DataInitStructure.SDIO_DataLength = NumberOfBlocks * BlockSize; - SDIO_DataInitStructure.SDIO_DataBlockSize = (uint32_t) power << 4; - SDIO_DataInitStructure.SDIO_TransferDir = SDIO_TransferDir_ToSDIO; - SDIO_DataInitStructure.SDIO_TransferMode = SDIO_TransferMode_Block; - SDIO_DataInitStructure.SDIO_DPSM = SDIO_DPSM_Enable; - SDIO_DataConfig(&SDIO_DataInitStructure); - - /* Send CMD18 READ_MULT_BLOCK with argument data address */ - SDIO_CmdInitStructure.SDIO_Argument = (uint32_t)addr; - SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_READ_MULT_BLOCK; - SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; - SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; - SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; - SDIO_SendCommand(&SDIO_CmdInitStructure); - - errorstatus = CmdResp1Error(SDIO_READ_MULT_BLOCK); - - if (errorstatus != SD_OK) - { - return(errorstatus); - } - - if (DeviceMode == SD_POLLING_MODE) - { - /* Polling mode */ - while (!(SDIO->STA &(SDIO_FLAG_RXOVERR | SDIO_FLAG_DCRCFAIL | SDIO_FLAG_DATAEND | SDIO_FLAG_DTIMEOUT | SDIO_FLAG_STBITERR))) - { - if (SDIO_GetFlagStatus(SDIO_FLAG_RXFIFOHF) != RESET) - { - for (count = 0; count < SD_HALFFIFO; count++) - { - *(tempbuff + count) = SDIO_ReadData(); - } - tempbuff += SD_HALFFIFO; - } - } - - if (SDIO_GetFlagStatus(SDIO_FLAG_DTIMEOUT) != RESET) - { - SDIO_ClearFlag(SDIO_FLAG_DTIMEOUT); - errorstatus = SD_DATA_TIMEOUT; - return(errorstatus); - } - else if (SDIO_GetFlagStatus(SDIO_FLAG_DCRCFAIL) != RESET) - { - SDIO_ClearFlag(SDIO_FLAG_DCRCFAIL); - errorstatus = SD_DATA_CRC_FAIL; - return(errorstatus); - } - else if (SDIO_GetFlagStatus(SDIO_FLAG_RXOVERR) != RESET) - { - SDIO_ClearFlag(SDIO_FLAG_RXOVERR); - errorstatus = SD_RX_OVERRUN; - return(errorstatus); - } - else if (SDIO_GetFlagStatus(SDIO_FLAG_STBITERR) != RESET) - { - SDIO_ClearFlag(SDIO_FLAG_STBITERR); - errorstatus = SD_START_BIT_ERR; - return(errorstatus); - } - while (SDIO_GetFlagStatus(SDIO_FLAG_RXDAVL) != RESET) - { - *tempbuff = SDIO_ReadData(); - tempbuff++; - } - - if (SDIO_GetFlagStatus(SDIO_FLAG_DATAEND) != RESET) - { - /* In Case Of SD-CARD Send Command STOP_TRANSMISSION */ - if ((SDIO_STD_CAPACITY_SD_CARD_V1_1 == CardType) || (SDIO_HIGH_CAPACITY_SD_CARD == CardType) || (SDIO_STD_CAPACITY_SD_CARD_V2_0 == CardType)) - { - /* Send CMD12 STOP_TRANSMISSION */ - SDIO_CmdInitStructure.SDIO_Argument = 0x0; - SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_STOP_TRANSMISSION; - SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; - SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; - SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; - SDIO_SendCommand(&SDIO_CmdInitStructure); - - errorstatus = CmdResp1Error(SDIO_STOP_TRANSMISSION); - - if (errorstatus != SD_OK) - { - return(errorstatus); - } - } - } - /* Clear all the static flags */ - SDIO_ClearFlag(SDIO_STATIC_FLAGS); - } - else if (DeviceMode == SD_INTERRUPT_MODE) - { - SDIO_ITConfig(SDIO_IT_DCRCFAIL | SDIO_IT_DTIMEOUT | SDIO_IT_DATAEND | SDIO_IT_RXOVERR | SDIO_IT_RXFIFOHF | SDIO_IT_STBITERR, ENABLE); - while ((TransferEnd == 0) && (TransferError == SD_OK)) - {} - if (TransferError != SD_OK) - { - return(TransferError); - } - } - else if (DeviceMode == SD_DMA_MODE) - { - rt_tick_t tick; - - SDIO_ITConfig(SDIO_IT_DCRCFAIL | SDIO_IT_DTIMEOUT | SDIO_IT_DATAEND | SDIO_IT_RXOVERR | SDIO_IT_STBITERR, ENABLE); - SDIO_DMACmd(ENABLE); - tick = rt_tick_get(); - DMA_RxConfiguration(readbuff, (NumberOfBlocks * BlockSize)); - while (DMA_GetFlagStatus(DMA2_FLAG_TC4) == RESET) - { - if ((TransferError != SD_OK) || (rt_tick_get() - tick > 10)) - { - errorstatus = SD_ERROR; - // rt_kprintf("sd error\n"); - return errorstatus; - } - } - while ((TransferEnd == 0) && (TransferError == SD_OK)) - {} - if (TransferError != SD_OK) - { - return(TransferError); - } - } - } - return(errorstatus); -} - -/** - * @brief Allows to write one block starting from a specified address - * in a card. - * @param addr: Address from where data are to be read. - * @param writebuff: pointer to the buffer that contain the data to be - * transferred. - * @param BlockSize: the SD card Data block size. - * @retval SD_Error: SD Card Error code. - */ -SD_Error SD_WriteBlock(uint32_t addr, uint32_t *writebuff, uint16_t BlockSize) -{ - SD_Error errorstatus = SD_OK; - uint8_t power = 0, cardstate = 0; - uint32_t timeout = 0, bytestransferred = 0; - uint32_t cardstatus = 0, count = 0, restwords = 0; - uint32_t *tempbuff = writebuff; - - if (writebuff == NULL) - { - errorstatus = SD_INVALID_PARAMETER; - return(errorstatus); - } - - TransferError = SD_OK; - TransferEnd = 0; - TotalNumberOfBytes = 0; - - SDIO_DataInitStructure.SDIO_DataTimeOut = SD_DATATIMEOUT; - SDIO_DataInitStructure.SDIO_DataLength = 0; - SDIO_DataInitStructure.SDIO_DataBlockSize = SDIO_DataBlockSize_1b; - SDIO_DataInitStructure.SDIO_TransferDir = SDIO_TransferDir_ToCard; - SDIO_DataInitStructure.SDIO_TransferMode = SDIO_TransferMode_Block; - SDIO_DataInitStructure.SDIO_DPSM = SDIO_DPSM_Disable; - SDIO_DataConfig(&SDIO_DataInitStructure); - SDIO_DMACmd(DISABLE); - - if (SDIO_GetResponse(SDIO_RESP1) & SD_CARD_LOCKED) - { - errorstatus = SD_LOCK_UNLOCK_FAILED; - return(errorstatus); - } - - if (CardType == SDIO_HIGH_CAPACITY_SD_CARD) - { - BlockSize = 512; - addr /= 512; - } - - /* Set the block size, both on controller and card */ - if ((BlockSize > 0) && (BlockSize <= 2048) && ((BlockSize & (BlockSize - 1)) == 0)) - { - power = convert_from_bytes_to_power_of_two(BlockSize); - - SDIO_CmdInitStructure.SDIO_Argument = (uint32_t) BlockSize; - SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_SET_BLOCKLEN; - SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; - SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; - SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; - SDIO_SendCommand(&SDIO_CmdInitStructure); - - errorstatus = CmdResp1Error(SDIO_SET_BLOCKLEN); - - if (errorstatus != SD_OK) - { - return(errorstatus); - } - } - else - { - errorstatus = SD_INVALID_PARAMETER; - return(errorstatus); - } - - /* Wait till card is ready for data Added */ - SDIO_CmdInitStructure.SDIO_Argument = (uint32_t) (RCA << 16); - SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_SEND_STATUS; - SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; - SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; - SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; - SDIO_SendCommand(&SDIO_CmdInitStructure); - - errorstatus = CmdResp1Error(SDIO_SEND_STATUS); - - if (errorstatus != SD_OK) - { - return(errorstatus); - } - - cardstatus = SDIO_GetResponse(SDIO_RESP1); - - timeout = SD_DATATIMEOUT; - - while (((cardstatus & 0x00000100) == 0) && (timeout > 0)) - { - timeout--; - SDIO_CmdInitStructure.SDIO_Argument = (uint32_t) (RCA << 16); - SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_SEND_STATUS; - SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; - SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; - SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; - SDIO_SendCommand(&SDIO_CmdInitStructure); - - errorstatus = CmdResp1Error(SDIO_SEND_STATUS); - - if (errorstatus != SD_OK) - { - return(errorstatus); - } - cardstatus = SDIO_GetResponse(SDIO_RESP1); - } - - if (timeout == 0) - { - return(SD_ERROR); - } - - /* Send CMD24 WRITE_SINGLE_BLOCK */ - SDIO_CmdInitStructure.SDIO_Argument = addr; - SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_WRITE_SINGLE_BLOCK; - SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; - SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; - SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; - SDIO_SendCommand(&SDIO_CmdInitStructure); - - errorstatus = CmdResp1Error(SDIO_WRITE_SINGLE_BLOCK); - - if (errorstatus != SD_OK) - { - return(errorstatus); - } - - TotalNumberOfBytes = BlockSize; - StopCondition = 0; - SrcBuffer = writebuff; - - SDIO_DataInitStructure.SDIO_DataTimeOut = SD_DATATIMEOUT; - SDIO_DataInitStructure.SDIO_DataLength = BlockSize; - SDIO_DataInitStructure.SDIO_DataBlockSize = (uint32_t) power << 4; - SDIO_DataInitStructure.SDIO_TransferDir = SDIO_TransferDir_ToCard; - SDIO_DataInitStructure.SDIO_TransferMode = SDIO_TransferMode_Block; - SDIO_DataInitStructure.SDIO_DPSM = SDIO_DPSM_Enable; - SDIO_DataConfig(&SDIO_DataInitStructure); - - /* In case of single data block transfer no need of stop command at all */ - if (DeviceMode == SD_POLLING_MODE) - { - while (!(SDIO->STA & (SDIO_FLAG_DBCKEND | SDIO_FLAG_TXUNDERR | SDIO_FLAG_DCRCFAIL | SDIO_FLAG_DTIMEOUT | SDIO_FLAG_STBITERR))) - { - if (SDIO_GetFlagStatus(SDIO_FLAG_TXFIFOHE) != RESET) - { - if ((TotalNumberOfBytes - bytestransferred) < 32) - { - restwords = ((TotalNumberOfBytes - bytestransferred) % 4 == 0) ? ((TotalNumberOfBytes - bytestransferred) / 4) : (( TotalNumberOfBytes - bytestransferred) / 4 + 1); - - for (count = 0; count < restwords; count++, tempbuff++, bytestransferred += 4) - { - SDIO_WriteData(*tempbuff); - } - } - else - { - for (count = 0; count < 8; count++) - { - SDIO_WriteData(*(tempbuff + count)); - } - tempbuff += 8; - bytestransferred += 32; - } - } - } - if (SDIO_GetFlagStatus(SDIO_FLAG_DTIMEOUT) != RESET) - { - SDIO_ClearFlag(SDIO_FLAG_DTIMEOUT); - errorstatus = SD_DATA_TIMEOUT; - return(errorstatus); - } - else if (SDIO_GetFlagStatus(SDIO_FLAG_DCRCFAIL) != RESET) - { - SDIO_ClearFlag(SDIO_FLAG_DCRCFAIL); - errorstatus = SD_DATA_CRC_FAIL; - return(errorstatus); - } - else if (SDIO_GetFlagStatus(SDIO_FLAG_TXUNDERR) != RESET) - { - SDIO_ClearFlag(SDIO_FLAG_TXUNDERR); - errorstatus = SD_TX_UNDERRUN; - return(errorstatus); - } - else if (SDIO_GetFlagStatus(SDIO_FLAG_STBITERR) != RESET) - { - SDIO_ClearFlag(SDIO_FLAG_STBITERR); - errorstatus = SD_START_BIT_ERR; - return(errorstatus); - } - } - else if (DeviceMode == SD_INTERRUPT_MODE) - { - SDIO_ITConfig(SDIO_IT_DCRCFAIL | SDIO_IT_DTIMEOUT | SDIO_IT_DATAEND | SDIO_FLAG_TXFIFOHE | SDIO_IT_TXUNDERR | SDIO_IT_STBITERR, ENABLE); - while ((TransferEnd == 0) && (TransferError == SD_OK)) - {} - if (TransferError != SD_OK) - { - return(TransferError); - } - } - else if (DeviceMode == SD_DMA_MODE) - { - SDIO_ITConfig(SDIO_IT_DCRCFAIL | SDIO_IT_DTIMEOUT | SDIO_IT_DATAEND | SDIO_IT_TXUNDERR | SDIO_IT_STBITERR, ENABLE); - DMA_TxConfiguration(writebuff, BlockSize); - SDIO_DMACmd(ENABLE); - while (DMA_GetFlagStatus(DMA2_FLAG_TC4) == RESET) - {} - while ((TransferEnd == 0) && (TransferError == SD_OK)) - {} - if (TransferError != SD_OK) - { - return(TransferError); - } - } - - /* Clear all the static flags */ - SDIO_ClearFlag(SDIO_STATIC_FLAGS); - - /* Wait till the card is in programming state */ - errorstatus = IsCardProgramming(&cardstate); - - while ((errorstatus == SD_OK) && ((cardstate == SD_CARD_PROGRAMMING) || (cardstate == SD_CARD_RECEIVING))) - { - errorstatus = IsCardProgramming(&cardstate); - } - - return(errorstatus); -} - -/** - * @brief Allows to write blocks starting from a specified address in - * a card. - * @param addr: Address from where data are to be read. - * @param writebuff: pointer to the buffer that contain the data to be - * transferred. - * @param BlockSize: the SD card Data block size. - * @param NumberOfBlocks: number of blocks to be written. - * @retval SD_Error: SD Card Error code. - */ -SD_Error SD_WriteMultiBlocks(uint32_t addr, uint32_t *writebuff, uint16_t BlockSize, uint32_t NumberOfBlocks) -{ - SD_Error errorstatus = SD_OK; - uint8_t power = 0, cardstate = 0; - uint32_t bytestransferred = 0; - uint32_t count = 0, restwords = 0; - uint32_t *tempbuff = writebuff; - - if (writebuff == NULL) - { - errorstatus = SD_INVALID_PARAMETER; - return(errorstatus); - } - - TransferError = SD_OK; - TransferEnd = 0; - TotalNumberOfBytes = 0; - - SDIO_DataInitStructure.SDIO_DataTimeOut = SD_DATATIMEOUT; - SDIO_DataInitStructure.SDIO_DataLength = 0; - SDIO_DataInitStructure.SDIO_DataBlockSize = SDIO_DataBlockSize_1b; - SDIO_DataInitStructure.SDIO_TransferDir = SDIO_TransferDir_ToCard; - SDIO_DataInitStructure.SDIO_TransferMode = SDIO_TransferMode_Block; - SDIO_DataInitStructure.SDIO_DPSM = SDIO_DPSM_Disable; - SDIO_DataConfig(&SDIO_DataInitStructure); - SDIO_DMACmd(DISABLE); - - if (SDIO_GetResponse(SDIO_RESP1) & SD_CARD_LOCKED) - { - errorstatus = SD_LOCK_UNLOCK_FAILED; - return(errorstatus); - } - - if (CardType == SDIO_HIGH_CAPACITY_SD_CARD) - { - BlockSize = 512; - addr /= 512; - } - - /* Set the block size, both on controller and card */ - if ((BlockSize > 0) && (BlockSize <= 2048) && ((BlockSize & (BlockSize - 1)) == 0)) - { - power = convert_from_bytes_to_power_of_two(BlockSize); - - SDIO_CmdInitStructure.SDIO_Argument = (uint32_t) BlockSize; - SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_SET_BLOCKLEN; - SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; - SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; - SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; - SDIO_SendCommand(&SDIO_CmdInitStructure); - - errorstatus = CmdResp1Error(SDIO_SET_BLOCKLEN); - - if (errorstatus != SD_OK) - { - return(errorstatus); - } - } - else - { - errorstatus = SD_INVALID_PARAMETER; - return(errorstatus); - } - - /* Wait till card is ready for data Added */ - SDIO_CmdInitStructure.SDIO_Argument = (uint32_t) (RCA << 16); - SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_SEND_STATUS; - SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; - SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; - SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; - SDIO_SendCommand(&SDIO_CmdInitStructure); - - errorstatus = CmdResp1Error(SDIO_SEND_STATUS); - - if (errorstatus != SD_OK) - { - return(errorstatus); - } - - if (NumberOfBlocks > 1) - { - /* Common to all modes */ - if (NumberOfBlocks * BlockSize > SD_MAX_DATA_LENGTH) - { - errorstatus = SD_INVALID_PARAMETER; - return(errorstatus); - } - - if ((SDIO_STD_CAPACITY_SD_CARD_V1_1 == CardType) || (SDIO_STD_CAPACITY_SD_CARD_V2_0 == CardType) || (SDIO_HIGH_CAPACITY_SD_CARD == CardType)) - { - /* To improve performance */ - SDIO_CmdInitStructure.SDIO_Argument = (uint32_t) (RCA << 16); - SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_APP_CMD; - SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; - SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; - SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; - SDIO_SendCommand(&SDIO_CmdInitStructure); - - - errorstatus = CmdResp1Error(SDIO_APP_CMD); - - if (errorstatus != SD_OK) - { - return(errorstatus); - } - /* To improve performance */ - SDIO_CmdInitStructure.SDIO_Argument = (uint32_t)NumberOfBlocks; - SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_SET_BLOCK_COUNT; - SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; - SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; - SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; - SDIO_SendCommand(&SDIO_CmdInitStructure); - - errorstatus = CmdResp1Error(SDIO_SET_BLOCK_COUNT); - - if (errorstatus != SD_OK) - { - return(errorstatus); - } - } - - /* Send CMD25 WRITE_MULT_BLOCK with argument data address */ - SDIO_CmdInitStructure.SDIO_Argument = (uint32_t)addr; - SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_WRITE_MULT_BLOCK; - SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; - SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; - SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; - SDIO_SendCommand(&SDIO_CmdInitStructure); - - errorstatus = CmdResp1Error(SDIO_WRITE_MULT_BLOCK); - - if (SD_OK != errorstatus) - { - return(errorstatus); - } - - TotalNumberOfBytes = NumberOfBlocks * BlockSize; - StopCondition = 1; - SrcBuffer = writebuff; - - SDIO_DataInitStructure.SDIO_DataTimeOut = SD_DATATIMEOUT; - SDIO_DataInitStructure.SDIO_DataLength = NumberOfBlocks * BlockSize; - SDIO_DataInitStructure.SDIO_DataBlockSize = (uint32_t) power << 4; - SDIO_DataInitStructure.SDIO_TransferDir = SDIO_TransferDir_ToCard; - SDIO_DataInitStructure.SDIO_TransferMode = SDIO_TransferMode_Block; - SDIO_DataInitStructure.SDIO_DPSM = SDIO_DPSM_Enable; - SDIO_DataConfig(&SDIO_DataInitStructure); - - if (DeviceMode == SD_POLLING_MODE) - { - while (!(SDIO->STA & (SDIO_FLAG_TXUNDERR | SDIO_FLAG_DCRCFAIL | SDIO_FLAG_DATAEND | SDIO_FLAG_DTIMEOUT | SDIO_FLAG_STBITERR))) - { - if (SDIO_GetFlagStatus(SDIO_FLAG_TXFIFOHE) != RESET) - { - if (!((TotalNumberOfBytes - bytestransferred) < SD_HALFFIFOBYTES)) - { - for (count = 0; count < SD_HALFFIFO; count++) - { - SDIO_WriteData(*(tempbuff + count)); - } - tempbuff += SD_HALFFIFO; - bytestransferred += SD_HALFFIFOBYTES; - } - else - { - restwords = ((TotalNumberOfBytes - bytestransferred) % 4 == 0) ? ((TotalNumberOfBytes - bytestransferred) / 4) : - ((TotalNumberOfBytes - bytestransferred) / 4 + 1); - - for (count = 0; count < restwords; count++, tempbuff++, bytestransferred += 4) - { - SDIO_WriteData(*tempbuff); - } - } - } - } - - if (SDIO_GetFlagStatus(SDIO_FLAG_DTIMEOUT) != RESET) - { - SDIO_ClearFlag(SDIO_FLAG_DTIMEOUT); - errorstatus = SD_DATA_TIMEOUT; - return(errorstatus); - } - else if (SDIO_GetFlagStatus(SDIO_FLAG_DCRCFAIL) != RESET) - { - SDIO_ClearFlag(SDIO_FLAG_DCRCFAIL); - errorstatus = SD_DATA_CRC_FAIL; - return(errorstatus); - } - else if (SDIO_GetFlagStatus(SDIO_FLAG_TXUNDERR) != RESET) - { - SDIO_ClearFlag(SDIO_FLAG_TXUNDERR); - errorstatus = SD_TX_UNDERRUN; - return(errorstatus); - } - else if (SDIO_GetFlagStatus(SDIO_FLAG_STBITERR) != RESET) - { - SDIO_ClearFlag(SDIO_FLAG_STBITERR); - errorstatus = SD_START_BIT_ERR; - return(errorstatus); - } - - if (SDIO_GetFlagStatus(SDIO_FLAG_DATAEND) != RESET) - { - if ((SDIO_STD_CAPACITY_SD_CARD_V1_1 == CardType) || (SDIO_STD_CAPACITY_SD_CARD_V2_0 == CardType) || (SDIO_HIGH_CAPACITY_SD_CARD == CardType)) - { - /* Send CMD12 STOP_TRANSMISSION */ - SDIO_CmdInitStructure.SDIO_Argument = 0x0; - SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_STOP_TRANSMISSION; - SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; - SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; - SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; - SDIO_SendCommand(&SDIO_CmdInitStructure); - - - errorstatus = CmdResp1Error(SDIO_STOP_TRANSMISSION); - - if (errorstatus != SD_OK) - { - return(errorstatus); - } - } - } - } - else if (DeviceMode == SD_INTERRUPT_MODE) - { - SDIO_ITConfig(SDIO_IT_DCRCFAIL | SDIO_IT_DTIMEOUT | SDIO_IT_DATAEND | SDIO_IT_TXFIFOHE | SDIO_IT_TXUNDERR | SDIO_IT_STBITERR, ENABLE); - while ((TransferEnd == 0) && (TransferError == SD_OK)) - {} - if (TransferError != SD_OK) - { - return(TransferError); - } - } - else if (DeviceMode == SD_DMA_MODE) - { - SDIO_ITConfig(SDIO_IT_DCRCFAIL | SDIO_IT_DTIMEOUT | SDIO_IT_DATAEND | SDIO_IT_TXUNDERR | SDIO_IT_STBITERR, ENABLE); - SDIO_DMACmd(ENABLE); - DMA_TxConfiguration(writebuff, (NumberOfBlocks * BlockSize)); - while (DMA_GetFlagStatus(DMA2_FLAG_TC4) == RESET) - {} - while ((TransferEnd == 0) && (TransferError == SD_OK)) - {} - if (TransferError != SD_OK) - { - return(TransferError); - } - } - } - /* Clear all the static flags */ - SDIO_ClearFlag(SDIO_STATIC_FLAGS); - - /* Wait till the card is in programming state */ - errorstatus = IsCardProgramming(&cardstate); - - while ((errorstatus == SD_OK) && ((cardstate == SD_CARD_PROGRAMMING) || (cardstate == SD_CARD_RECEIVING))) - { - errorstatus = IsCardProgramming(&cardstate); - } - - return(errorstatus); -} - -/** - * @brief Gets the cuurent data transfer state. - * @param None - * @retval SDTransferState: Data Transfer state. - * This value can be: - * - SD_NO_TRANSFER: No data transfer is acting - * - SD_TRANSFER_IN_PROGRESS: Data transfer is acting - */ -SDTransferState SD_GetTransferState(void) -{ - if (SDIO->STA & (SDIO_FLAG_TXACT | SDIO_FLAG_RXACT)) - { - return(SD_TRANSFER_IN_PROGRESS); - } - else - { - return(SD_NO_TRANSFER); - } -} - -/** - * @brief Aborts an ongoing data transfer. - * @param None - * @retval SD_Error: SD Card Error code. - */ -SD_Error SD_StopTransfer(void) -{ - SD_Error errorstatus = SD_OK; - - /* Send CMD12 STOP_TRANSMISSION */ - SDIO_CmdInitStructure.SDIO_Argument = 0x0; - SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_STOP_TRANSMISSION; - SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; - SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; - SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; - SDIO_SendCommand(&SDIO_CmdInitStructure); - - errorstatus = CmdResp1Error(SDIO_STOP_TRANSMISSION); - - return(errorstatus); -} - -/** - * @brief Allows to erase memory area specified for the given card. - * @param startaddr: the start address. - * @param endaddr: the end address. - * @retval SD_Error: SD Card Error code. - */ -SD_Error SD_Erase(uint32_t startaddr, uint32_t endaddr) -{ - SD_Error errorstatus = SD_OK; - uint32_t delay = 0; - __IO uint32_t maxdelay = 0; - uint8_t cardstate = 0; - - /* Check if the card coomnd class supports erase command */ - if (((CSD_Tab[1] >> 20) & SD_CCCC_ERASE) == 0) - { - errorstatus = SD_REQUEST_NOT_APPLICABLE; - return(errorstatus); - } - - maxdelay = 72000 / ((SDIO->CLKCR & 0xFF) + 2); - - if (SDIO_GetResponse(SDIO_RESP1) & SD_CARD_LOCKED) - { - errorstatus = SD_LOCK_UNLOCK_FAILED; - return(errorstatus); - } - - if (CardType == SDIO_HIGH_CAPACITY_SD_CARD) - { - startaddr /= 512; - endaddr /= 512; - } - - /* According to sd-card spec 1.0 ERASE_GROUP_START (CMD32) and erase_group_end(CMD33) */ - if ((SDIO_STD_CAPACITY_SD_CARD_V1_1 == CardType) || (SDIO_STD_CAPACITY_SD_CARD_V2_0 == CardType) || (SDIO_HIGH_CAPACITY_SD_CARD == CardType)) - { - /* Send CMD32 SD_ERASE_GRP_START with argument as addr */ - SDIO_CmdInitStructure.SDIO_Argument = startaddr; - SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_SD_ERASE_GRP_START; - SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; - SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; - SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; - SDIO_SendCommand(&SDIO_CmdInitStructure); - - errorstatus = CmdResp1Error(SDIO_SD_ERASE_GRP_START); - if (errorstatus != SD_OK) - { - return(errorstatus); - } - - /* Send CMD33 SD_ERASE_GRP_END with argument as addr */ - SDIO_CmdInitStructure.SDIO_Argument = endaddr; - SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_SD_ERASE_GRP_END; - SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; - SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; - SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; - SDIO_SendCommand(&SDIO_CmdInitStructure); - - errorstatus = CmdResp1Error(SDIO_SD_ERASE_GRP_END); - if (errorstatus != SD_OK) - { - return(errorstatus); - } - } - - /* Send CMD38 ERASE */ - SDIO_CmdInitStructure.SDIO_Argument = 0; - SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_ERASE; - SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; - SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; - SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; - SDIO_SendCommand(&SDIO_CmdInitStructure); - - errorstatus = CmdResp1Error(SDIO_ERASE); - - if (errorstatus != SD_OK) - { - return(errorstatus); - } - - for (delay = 0; delay < maxdelay; delay++) - {} - - /* Wait till the card is in programming state */ - errorstatus = IsCardProgramming(&cardstate); - - while ((errorstatus == SD_OK) && ((SD_CARD_PROGRAMMING == cardstate) || (SD_CARD_RECEIVING == cardstate))) - { - errorstatus = IsCardProgramming(&cardstate); - } - - return(errorstatus); -} - -/** - * @brief Returns the current card's status. - * @param pcardstatus: pointer to the buffer that will contain the SD - * card status (Card Status register). - * @retval SD_Error: SD Card Error code. - */ -SD_Error SD_SendStatus(uint32_t *pcardstatus) -{ - SD_Error errorstatus = SD_OK; - - if (pcardstatus == NULL) - { - errorstatus = SD_INVALID_PARAMETER; - return(errorstatus); - } - - SDIO_CmdInitStructure.SDIO_Argument = (uint32_t) RCA << 16; - SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_SEND_STATUS; - SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; - SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; - SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; - SDIO_SendCommand(&SDIO_CmdInitStructure); - - - errorstatus = CmdResp1Error(SDIO_SEND_STATUS); - - if (errorstatus != SD_OK) - { - return(errorstatus); - } - - *pcardstatus = SDIO_GetResponse(SDIO_RESP1); - - return(errorstatus); -} - -/** - * @brief Returns the current SD card's status. - * @param psdstatus: pointer to the buffer that will contain the SD - * card status (SD Status register). - * @retval SD_Error: SD Card Error code. - */ -SD_Error SD_SendSDStatus(uint32_t *psdstatus) -{ - SD_Error errorstatus = SD_OK; - uint32_t count = 0; - - if (SDIO_GetResponse(SDIO_RESP1) & SD_CARD_LOCKED) - { - errorstatus = SD_LOCK_UNLOCK_FAILED; - return(errorstatus); - } - - /* Set block size for card if it is not equal to current block size for card. */ - SDIO_CmdInitStructure.SDIO_Argument = 64; - SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_SET_BLOCKLEN; - SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; - SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; - SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; - SDIO_SendCommand(&SDIO_CmdInitStructure); - - errorstatus = CmdResp1Error(SDIO_SET_BLOCKLEN); - - if (errorstatus != SD_OK) - { - return(errorstatus); - } - - /* CMD55 */ - SDIO_CmdInitStructure.SDIO_Argument = (uint32_t) RCA << 16; - SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_APP_CMD; - SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; - SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; - SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; - SDIO_SendCommand(&SDIO_CmdInitStructure); - errorstatus = CmdResp1Error(SDIO_APP_CMD); - - if (errorstatus != SD_OK) - { - return(errorstatus); - } - - SDIO_DataInitStructure.SDIO_DataTimeOut = SD_DATATIMEOUT; - SDIO_DataInitStructure.SDIO_DataLength = 64; - SDIO_DataInitStructure.SDIO_DataBlockSize = SDIO_DataBlockSize_64b; - SDIO_DataInitStructure.SDIO_TransferDir = SDIO_TransferDir_ToSDIO; - SDIO_DataInitStructure.SDIO_TransferMode = SDIO_TransferMode_Block; - SDIO_DataInitStructure.SDIO_DPSM = SDIO_DPSM_Enable; - SDIO_DataConfig(&SDIO_DataInitStructure); - - /* Send ACMD13 SD_APP_STAUS with argument as card's RCA.*/ - SDIO_CmdInitStructure.SDIO_Argument = 0; - SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_SD_APP_STAUS; - SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; - SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; - SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; - SDIO_SendCommand(&SDIO_CmdInitStructure); - errorstatus = CmdResp1Error(SDIO_SD_APP_STAUS); - - if (errorstatus != SD_OK) - { - return(errorstatus); - } - - while (!(SDIO->STA &(SDIO_FLAG_RXOVERR | SDIO_FLAG_DCRCFAIL | SDIO_FLAG_DTIMEOUT | SDIO_FLAG_DBCKEND | SDIO_FLAG_STBITERR))) - { - if (SDIO_GetFlagStatus(SDIO_FLAG_RXFIFOHF) != RESET) - { - for (count = 0; count < 8; count++) - { - *(psdstatus + count) = SDIO_ReadData(); - } - psdstatus += 8; - } - } - - if (SDIO_GetFlagStatus(SDIO_FLAG_DTIMEOUT) != RESET) - { - SDIO_ClearFlag(SDIO_FLAG_DTIMEOUT); - errorstatus = SD_DATA_TIMEOUT; - return(errorstatus); - } - else if (SDIO_GetFlagStatus(SDIO_FLAG_DCRCFAIL) != RESET) - { - SDIO_ClearFlag(SDIO_FLAG_DCRCFAIL); - errorstatus = SD_DATA_CRC_FAIL; - return(errorstatus); - } - else if (SDIO_GetFlagStatus(SDIO_FLAG_RXOVERR) != RESET) - { - SDIO_ClearFlag(SDIO_FLAG_RXOVERR); - errorstatus = SD_RX_OVERRUN; - return(errorstatus); - } - else if (SDIO_GetFlagStatus(SDIO_FLAG_STBITERR) != RESET) - { - SDIO_ClearFlag(SDIO_FLAG_STBITERR); - errorstatus = SD_START_BIT_ERR; - return(errorstatus); - } - - while (SDIO_GetFlagStatus(SDIO_FLAG_RXDAVL) != RESET) - { - *psdstatus = SDIO_ReadData(); - psdstatus++; - } - - /* Clear all the static status flags*/ - SDIO_ClearFlag(SDIO_STATIC_FLAGS); - psdstatus -= 16; - for (count = 0; count < 16; count++) - { - psdstatus[count] = ((psdstatus[count] & SD_0TO7BITS) << 24) |((psdstatus[count] & SD_8TO15BITS) << 8) | - ((psdstatus[count] & SD_16TO23BITS) >> 8) |((psdstatus[count] & SD_24TO31BITS) >> 24); - } - return(errorstatus); -} - -/** - * @brief Allows to process all the interrupts that are high. - * @param None - * @retval SD_Error: SD Card Error code. - */ -SD_Error SD_ProcessIRQSrc(void) -{ - uint32_t count = 0, restwords = 0; - - if (DeviceMode == SD_INTERRUPT_MODE) - { - if (SDIO_GetITStatus(SDIO_IT_RXFIFOHF) != RESET) - { - for (count = 0; count < SD_HALFFIFO; count++) - { - *(DestBuffer + count) = SDIO_ReadData(); - } - DestBuffer += SD_HALFFIFO; - NumberOfBytes += SD_HALFFIFOBYTES; - } - else if (SDIO_GetITStatus(SDIO_IT_TXFIFOHE) != RESET) - { - if ((TotalNumberOfBytes - NumberOfBytes) < SD_HALFFIFOBYTES) - { - restwords = ((TotalNumberOfBytes - NumberOfBytes) % 4 == 0) ? - ((TotalNumberOfBytes - NumberOfBytes) / 4) : - ((TotalNumberOfBytes - NumberOfBytes) / 4 + 1); - - for (count = 0; count < restwords; count++, SrcBuffer++, NumberOfBytes += 4) - { - SDIO_WriteData(*SrcBuffer); - } - } - else - { - for (count = 0; count < SD_HALFFIFO; count++) - { - SDIO_WriteData(*(SrcBuffer + count)); - } - - SrcBuffer += SD_HALFFIFO; - NumberOfBytes += SD_HALFFIFOBYTES; - } - } - } - - if (SDIO_GetITStatus(SDIO_IT_DATAEND) != RESET) - { - if (DeviceMode != SD_DMA_MODE) - { - while ((SDIO_GetFlagStatus(SDIO_FLAG_RXDAVL) != RESET) && (NumberOfBytes < TotalNumberOfBytes)) - { - *DestBuffer = SDIO_ReadData(); - DestBuffer++; - NumberOfBytes += 4; - } - } - - if (StopCondition == 1) - { - TransferError = SD_StopTransfer(); - } - else - { - TransferError = SD_OK; - } - SDIO_ClearITPendingBit(SDIO_IT_DATAEND); - SDIO_ITConfig(SDIO_IT_DCRCFAIL | SDIO_IT_DTIMEOUT | SDIO_IT_DATAEND | - SDIO_IT_TXFIFOHE | SDIO_IT_RXFIFOHF | SDIO_IT_TXUNDERR | - SDIO_IT_RXOVERR | SDIO_IT_STBITERR, DISABLE); - TransferEnd = 1; - NumberOfBytes = 0; - return(TransferError); - } - - if (SDIO_GetITStatus(SDIO_IT_DCRCFAIL) != RESET) - { - SDIO_ClearITPendingBit(SDIO_IT_DCRCFAIL); - SDIO_ITConfig(SDIO_IT_DCRCFAIL | SDIO_IT_DTIMEOUT | SDIO_IT_DATAEND | - SDIO_IT_TXFIFOHE | SDIO_IT_RXFIFOHF | SDIO_IT_TXUNDERR | - SDIO_IT_RXOVERR | SDIO_IT_STBITERR, DISABLE); - NumberOfBytes = 0; - TransferError = SD_DATA_CRC_FAIL; - return(SD_DATA_CRC_FAIL); - } - - if (SDIO_GetITStatus(SDIO_IT_DTIMEOUT) != RESET) - { - SDIO_ClearITPendingBit(SDIO_IT_DTIMEOUT); - SDIO_ITConfig(SDIO_IT_DCRCFAIL | SDIO_IT_DTIMEOUT | SDIO_IT_DATAEND | - SDIO_IT_TXFIFOHE | SDIO_IT_RXFIFOHF | SDIO_IT_TXUNDERR | - SDIO_IT_RXOVERR | SDIO_IT_STBITERR, DISABLE); - NumberOfBytes = 0; - TransferError = SD_DATA_TIMEOUT; - return(SD_DATA_TIMEOUT); - } - - if (SDIO_GetITStatus(SDIO_IT_RXOVERR) != RESET) - { - SDIO_ClearITPendingBit(SDIO_IT_RXOVERR); - SDIO_ITConfig(SDIO_IT_DCRCFAIL | SDIO_IT_DTIMEOUT | SDIO_IT_DATAEND | - SDIO_IT_TXFIFOHE | SDIO_IT_RXFIFOHF | SDIO_IT_TXUNDERR | - SDIO_IT_RXOVERR | SDIO_IT_STBITERR, DISABLE); - NumberOfBytes = 0; - TransferError = SD_RX_OVERRUN; - return(SD_RX_OVERRUN); - } - - if (SDIO_GetITStatus(SDIO_IT_TXUNDERR) != RESET) - { - SDIO_ClearITPendingBit(SDIO_IT_TXUNDERR); - SDIO_ITConfig(SDIO_IT_DCRCFAIL | SDIO_IT_DTIMEOUT | SDIO_IT_DATAEND | - SDIO_IT_TXFIFOHE | SDIO_IT_RXFIFOHF | SDIO_IT_TXUNDERR | - SDIO_IT_RXOVERR | SDIO_IT_STBITERR, DISABLE); - NumberOfBytes = 0; - TransferError = SD_TX_UNDERRUN; - return(SD_TX_UNDERRUN); - } - - if (SDIO_GetITStatus(SDIO_IT_STBITERR) != RESET) - { - SDIO_ClearITPendingBit(SDIO_IT_STBITERR); - SDIO_ITConfig(SDIO_IT_DCRCFAIL | SDIO_IT_DTIMEOUT | SDIO_IT_DATAEND | - SDIO_IT_TXFIFOHE | SDIO_IT_RXFIFOHF | SDIO_IT_TXUNDERR | - SDIO_IT_RXOVERR | SDIO_IT_STBITERR, DISABLE); - NumberOfBytes = 0; - TransferError = SD_START_BIT_ERR; - return(SD_START_BIT_ERR); - } - - return(SD_OK); -} - -/** - * @brief Checks for error conditions for CMD0. - * @param None - * @retval SD_Error: SD Card Error code. - */ -static SD_Error CmdError(void) -{ - SD_Error errorstatus = SD_OK; - uint32_t timeout; - - timeout = SDIO_CMD0TIMEOUT; /* 10000 */ - - while ((timeout > 0) && (SDIO_GetFlagStatus(SDIO_FLAG_CMDSENT) == RESET)) - { - timeout--; - } - - if (timeout == 0) - { - errorstatus = SD_CMD_RSP_TIMEOUT; - return(errorstatus); - } - - /* Clear all the static flags */ - SDIO_ClearFlag(SDIO_STATIC_FLAGS); - - return(errorstatus); -} - -/** - * @brief Checks for error conditions for R7. - * response. - * @param None - * @retval SD_Error: SD Card Error code. - */ -static SD_Error CmdResp7Error(void) -{ - SD_Error errorstatus = SD_OK; - uint32_t status; - uint32_t timeout = SDIO_CMD0TIMEOUT; - - status = SDIO->STA; - - while (!(status & (SDIO_FLAG_CCRCFAIL | SDIO_FLAG_CMDREND | SDIO_FLAG_CTIMEOUT)) && (timeout > 0)) - { - timeout--; - status = SDIO->STA; - } - - if ((timeout == 0) || (status & SDIO_FLAG_CTIMEOUT)) - { - /* Card is not V2.0 complient or card does not support the set voltage range */ - errorstatus = SD_CMD_RSP_TIMEOUT; - SDIO_ClearFlag(SDIO_FLAG_CTIMEOUT); - return(errorstatus); - } - - if (status & SDIO_FLAG_CMDREND) - { - /* Card is SD V2.0 compliant */ - errorstatus = SD_OK; - SDIO_ClearFlag(SDIO_FLAG_CMDREND); - return(errorstatus); - } - return(errorstatus); -} - -/** - * @brief Checks for error conditions for R1. - * response - * @param cmd: The sent command index. - * @retval SD_Error: SD Card Error code. - */ -static SD_Error CmdResp1Error(uint8_t cmd) -{ - SD_Error errorstatus = SD_OK; - uint32_t status; - uint32_t response_r1; - - status = SDIO->STA; - - while (!(status & (SDIO_FLAG_CCRCFAIL | SDIO_FLAG_CMDREND | SDIO_FLAG_CTIMEOUT))) - { - status = SDIO->STA; - } - - if (status & SDIO_FLAG_CTIMEOUT) - { - errorstatus = SD_CMD_RSP_TIMEOUT; - SDIO_ClearFlag(SDIO_FLAG_CTIMEOUT); - return(errorstatus); - } - else if (status & SDIO_FLAG_CCRCFAIL) - { - errorstatus = SD_CMD_CRC_FAIL; - SDIO_ClearFlag(SDIO_FLAG_CCRCFAIL); - return(errorstatus); - } - - /* Check response received is of desired command */ - if (SDIO_GetCommandResponse() != cmd) - { - errorstatus = SD_ILLEGAL_CMD; - return(errorstatus); - } - - /* Clear all the static flags */ - SDIO_ClearFlag(SDIO_STATIC_FLAGS); - - /* We have received response, retrieve it for analysis */ - response_r1 = SDIO_GetResponse(SDIO_RESP1); - - if ((response_r1 & SD_OCR_ERRORBITS) == SD_ALLZERO) - { - return(errorstatus); - } - - if (response_r1 & SD_OCR_ADDR_OUT_OF_RANGE) - { - return(SD_ADDR_OUT_OF_RANGE); - } - - if (response_r1 & SD_OCR_ADDR_MISALIGNED) - { - return(SD_ADDR_MISALIGNED); - } - - if (response_r1 & SD_OCR_BLOCK_LEN_ERR) - { - return(SD_BLOCK_LEN_ERR); - } - - if (response_r1 & SD_OCR_ERASE_SEQ_ERR) - { - return(SD_ERASE_SEQ_ERR); - } - - if (response_r1 & SD_OCR_BAD_ERASE_PARAM) - { - return(SD_BAD_ERASE_PARAM); - } - - if (response_r1 & SD_OCR_WRITE_PROT_VIOLATION) - { - return(SD_WRITE_PROT_VIOLATION); - } - - if (response_r1 & SD_OCR_LOCK_UNLOCK_FAILED) - { - return(SD_LOCK_UNLOCK_FAILED); - } - - if (response_r1 & SD_OCR_COM_CRC_FAILED) - { - return(SD_COM_CRC_FAILED); - } - - if (response_r1 & SD_OCR_ILLEGAL_CMD) - { - return(SD_ILLEGAL_CMD); - } - - if (response_r1 & SD_OCR_CARD_ECC_FAILED) - { - return(SD_CARD_ECC_FAILED); - } - - if (response_r1 & SD_OCR_CC_ERROR) - { - return(SD_CC_ERROR); - } - - if (response_r1 & SD_OCR_GENERAL_UNKNOWN_ERROR) - { - return(SD_GENERAL_UNKNOWN_ERROR); - } - - if (response_r1 & SD_OCR_STREAM_READ_UNDERRUN) - { - return(SD_STREAM_READ_UNDERRUN); - } - - if (response_r1 & SD_OCR_STREAM_WRITE_OVERRUN) - { - return(SD_STREAM_WRITE_OVERRUN); - } - - if (response_r1 & SD_OCR_CID_CSD_OVERWRIETE) - { - return(SD_CID_CSD_OVERWRITE); - } - - if (response_r1 & SD_OCR_WP_ERASE_SKIP) - { - return(SD_WP_ERASE_SKIP); - } - - if (response_r1 & SD_OCR_CARD_ECC_DISABLED) - { - return(SD_CARD_ECC_DISABLED); - } - - if (response_r1 & SD_OCR_ERASE_RESET) - { - return(SD_ERASE_RESET); - } - - if (response_r1 & SD_OCR_AKE_SEQ_ERROR) - { - return(SD_AKE_SEQ_ERROR); - } - return(errorstatus); -} - -/** - * @brief Checks for error conditions for R3 (OCR). - * response. - * @param None - * @retval SD_Error: SD Card Error code. - */ -static SD_Error CmdResp3Error(void) -{ - SD_Error errorstatus = SD_OK; - uint32_t status; - - status = SDIO->STA; - - while (!(status & (SDIO_FLAG_CCRCFAIL | SDIO_FLAG_CMDREND | SDIO_FLAG_CTIMEOUT))) - { - status = SDIO->STA; - } - - if (status & SDIO_FLAG_CTIMEOUT) - { - errorstatus = SD_CMD_RSP_TIMEOUT; - SDIO_ClearFlag(SDIO_FLAG_CTIMEOUT); - return(errorstatus); - } - /* Clear all the static flags */ - SDIO_ClearFlag(SDIO_STATIC_FLAGS); - return(errorstatus); -} - -/** - * @brief Checks for error conditions for R2 (CID or CSD). - * response. - * @param None - * @retval SD_Error: SD Card Error code. - */ -static SD_Error CmdResp2Error(void) -{ - SD_Error errorstatus = SD_OK; - uint32_t status; - - status = SDIO->STA; - - while (!(status & (SDIO_FLAG_CCRCFAIL | SDIO_FLAG_CTIMEOUT | SDIO_FLAG_CMDREND))) - { - status = SDIO->STA; - } - - if (status & SDIO_FLAG_CTIMEOUT) - { - errorstatus = SD_CMD_RSP_TIMEOUT; - SDIO_ClearFlag(SDIO_FLAG_CTIMEOUT); - return(errorstatus); - } - else if (status & SDIO_FLAG_CCRCFAIL) - { - errorstatus = SD_CMD_CRC_FAIL; - SDIO_ClearFlag(SDIO_FLAG_CCRCFAIL); - return(errorstatus); - } - - /* Clear all the static flags */ - SDIO_ClearFlag(SDIO_STATIC_FLAGS); - - return(errorstatus); -} - -/** - * @brief Checks for error conditions for R6 (RCA). - * response. - * @param cmd: The sent command index. - * @param prca: pointer to the variable that will contain the SD - * card relative address RCA. - * @retval SD_Error: SD Card Error code. - */ -static SD_Error CmdResp6Error(uint8_t cmd, uint16_t *prca) -{ - SD_Error errorstatus = SD_OK; - uint32_t status; - uint32_t response_r1; - - status = SDIO->STA; - - while (!(status & (SDIO_FLAG_CCRCFAIL | SDIO_FLAG_CTIMEOUT | SDIO_FLAG_CMDREND))) - { - status = SDIO->STA; - } - - if (status & SDIO_FLAG_CTIMEOUT) - { - errorstatus = SD_CMD_RSP_TIMEOUT; - SDIO_ClearFlag(SDIO_FLAG_CTIMEOUT); - return(errorstatus); - } - else if (status & SDIO_FLAG_CCRCFAIL) - { - errorstatus = SD_CMD_CRC_FAIL; - SDIO_ClearFlag(SDIO_FLAG_CCRCFAIL); - return(errorstatus); - } - - /* Check response received is of desired command */ - if (SDIO_GetCommandResponse() != cmd) - { - errorstatus = SD_ILLEGAL_CMD; - return(errorstatus); - } - - /* Clear all the static flags */ - SDIO_ClearFlag(SDIO_STATIC_FLAGS); - - /* We have received response, retrieve it. */ - response_r1 = SDIO_GetResponse(SDIO_RESP1); - - if (SD_ALLZERO == (response_r1 & (SD_R6_GENERAL_UNKNOWN_ERROR | SD_R6_ILLEGAL_CMD | SD_R6_COM_CRC_FAILED))) - { - *prca = (uint16_t) (response_r1 >> 16); - return(errorstatus); - } - - if (response_r1 & SD_R6_GENERAL_UNKNOWN_ERROR) - { - return(SD_GENERAL_UNKNOWN_ERROR); - } - - if (response_r1 & SD_R6_ILLEGAL_CMD) - { - return(SD_ILLEGAL_CMD); - } - - if (response_r1 & SD_R6_COM_CRC_FAILED) - { - return(SD_COM_CRC_FAILED); - } - - return(errorstatus); -} - -/** - * @brief Enables or disables the SDIO wide bus mode. - * @param NewState: new state of the SDIO wide bus mode. - * This parameter can be: ENABLE or DISABLE. - * @retval SD_Error: SD Card Error code. - */ -static SD_Error SDEnWideBus(FunctionalState NewState) -{ - SD_Error errorstatus = SD_OK; - - uint32_t scr[2] = {0, 0}; - - if (SDIO_GetResponse(SDIO_RESP1) & SD_CARD_LOCKED) - { - errorstatus = SD_LOCK_UNLOCK_FAILED; - return(errorstatus); - } - - /* Get SCR Register */ - errorstatus = FindSCR(RCA, scr); - - if (errorstatus != SD_OK) - { - return(errorstatus); - } - - /* If wide bus operation to be enabled */ - if (NewState == ENABLE) - { - /* If requested card supports wide bus operation */ - if ((scr[1] & SD_WIDE_BUS_SUPPORT) != SD_ALLZERO) - { - /* Send CMD55 APP_CMD with argument as card's RCA.*/ - SDIO_CmdInitStructure.SDIO_Argument = (uint32_t) RCA << 16; - SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_APP_CMD; - SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; - SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; - SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; - SDIO_SendCommand(&SDIO_CmdInitStructure); - - errorstatus = CmdResp1Error(SDIO_APP_CMD); - - if (errorstatus != SD_OK) - { - return(errorstatus); - } - - /* Send ACMD6 APP_CMD with argument as 2 for wide bus mode */ - SDIO_CmdInitStructure.SDIO_Argument = 0x2; - SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_APP_SD_SET_BUSWIDTH; - SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; - SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; - SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; - SDIO_SendCommand(&SDIO_CmdInitStructure); - - errorstatus = CmdResp1Error(SDIO_APP_SD_SET_BUSWIDTH); - - if (errorstatus != SD_OK) - { - return(errorstatus); - } - return(errorstatus); - } - else - { - errorstatus = SD_REQUEST_NOT_APPLICABLE; - return(errorstatus); - } - } /* If wide bus operation to be disabled */ - else - { - /* If requested card supports 1 bit mode operation */ - if ((scr[1] & SD_SINGLE_BUS_SUPPORT) != SD_ALLZERO) - { - /* Send CMD55 APP_CMD with argument as card's RCA.*/ - SDIO_CmdInitStructure.SDIO_Argument = (uint32_t) RCA << 16; - SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_APP_CMD; - SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; - SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; - SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; - SDIO_SendCommand(&SDIO_CmdInitStructure); - - - errorstatus = CmdResp1Error(SDIO_APP_CMD); - - if (errorstatus != SD_OK) - { - return(errorstatus); - } - - /* Send ACMD6 APP_CMD with argument as 2 for wide bus mode */ - SDIO_CmdInitStructure.SDIO_Argument = 0x00; - SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_APP_SD_SET_BUSWIDTH; - SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; - SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; - SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; - SDIO_SendCommand(&SDIO_CmdInitStructure); - - errorstatus = CmdResp1Error(SDIO_APP_SD_SET_BUSWIDTH); - - if (errorstatus != SD_OK) - { - return(errorstatus); - } - - return(errorstatus); - } - else - { - errorstatus = SD_REQUEST_NOT_APPLICABLE; - return(errorstatus); - } - } -} - -/** - * @brief Checks if the SD card is in programming state. - * @param pstatus: pointer to the variable that will contain the SD - * card state. - * @retval SD_Error: SD Card Error code. - */ -static SD_Error IsCardProgramming(uint8_t *pstatus) -{ - SD_Error errorstatus = SD_OK; - __IO uint32_t respR1 = 0, status = 0; - - SDIO_CmdInitStructure.SDIO_Argument = (uint32_t) RCA << 16; - SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_SEND_STATUS; - SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; - SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; - SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; - SDIO_SendCommand(&SDIO_CmdInitStructure); - - status = SDIO->STA; - while (!(status & (SDIO_FLAG_CCRCFAIL | SDIO_FLAG_CMDREND | SDIO_FLAG_CTIMEOUT))) - { - status = SDIO->STA; - } - - if (status & SDIO_FLAG_CTIMEOUT) - { - errorstatus = SD_CMD_RSP_TIMEOUT; - SDIO_ClearFlag(SDIO_FLAG_CTIMEOUT); - return(errorstatus); - } - else if (status & SDIO_FLAG_CCRCFAIL) - { - errorstatus = SD_CMD_CRC_FAIL; - SDIO_ClearFlag(SDIO_FLAG_CCRCFAIL); - return(errorstatus); - } - - status = (uint32_t)SDIO_GetCommandResponse(); - - /* Check response received is of desired command */ - if (status != SDIO_SEND_STATUS) - { - errorstatus = SD_ILLEGAL_CMD; - return(errorstatus); - } - - /* Clear all the static flags */ - SDIO_ClearFlag(SDIO_STATIC_FLAGS); - - - /* We have received response, retrieve it for analysis */ - respR1 = SDIO_GetResponse(SDIO_RESP1); - - /* Find out card status */ - *pstatus = (uint8_t) ((respR1 >> 9) & 0x0000000F); - - if ((respR1 & SD_OCR_ERRORBITS) == SD_ALLZERO) - { - return(errorstatus); - } - - if (respR1 & SD_OCR_ADDR_OUT_OF_RANGE) - { - return(SD_ADDR_OUT_OF_RANGE); - } - - if (respR1 & SD_OCR_ADDR_MISALIGNED) - { - return(SD_ADDR_MISALIGNED); - } - - if (respR1 & SD_OCR_BLOCK_LEN_ERR) - { - return(SD_BLOCK_LEN_ERR); - } - - if (respR1 & SD_OCR_ERASE_SEQ_ERR) - { - return(SD_ERASE_SEQ_ERR); - } - - if (respR1 & SD_OCR_BAD_ERASE_PARAM) - { - return(SD_BAD_ERASE_PARAM); - } - - if (respR1 & SD_OCR_WRITE_PROT_VIOLATION) - { - return(SD_WRITE_PROT_VIOLATION); - } - - if (respR1 & SD_OCR_LOCK_UNLOCK_FAILED) - { - return(SD_LOCK_UNLOCK_FAILED); - } - - if (respR1 & SD_OCR_COM_CRC_FAILED) - { - return(SD_COM_CRC_FAILED); - } - - if (respR1 & SD_OCR_ILLEGAL_CMD) - { - return(SD_ILLEGAL_CMD); - } - - if (respR1 & SD_OCR_CARD_ECC_FAILED) - { - return(SD_CARD_ECC_FAILED); - } - - if (respR1 & SD_OCR_CC_ERROR) - { - return(SD_CC_ERROR); - } - - if (respR1 & SD_OCR_GENERAL_UNKNOWN_ERROR) - { - return(SD_GENERAL_UNKNOWN_ERROR); - } - - if (respR1 & SD_OCR_STREAM_READ_UNDERRUN) - { - return(SD_STREAM_READ_UNDERRUN); - } - - if (respR1 & SD_OCR_STREAM_WRITE_OVERRUN) - { - return(SD_STREAM_WRITE_OVERRUN); - } - - if (respR1 & SD_OCR_CID_CSD_OVERWRIETE) - { - return(SD_CID_CSD_OVERWRITE); - } - - if (respR1 & SD_OCR_WP_ERASE_SKIP) - { - return(SD_WP_ERASE_SKIP); - } - - if (respR1 & SD_OCR_CARD_ECC_DISABLED) - { - return(SD_CARD_ECC_DISABLED); - } - - if (respR1 & SD_OCR_ERASE_RESET) - { - return(SD_ERASE_RESET); - } - - if (respR1 & SD_OCR_AKE_SEQ_ERROR) - { - return(SD_AKE_SEQ_ERROR); - } - - return(errorstatus); -} - -/** - * @brief Find the SD card SCR register value. - * @param rca: selected card address. - * @param pscr: pointer to the buffer that will contain the SCR value. - * @retval SD_Error: SD Card Error code. - */ -static SD_Error FindSCR(uint16_t rca, uint32_t *pscr) -{ - uint32_t index = 0; - SD_Error errorstatus = SD_OK; - uint32_t tempscr[2] = {0, 0}; - - /* Set Block Size To 8 Bytes */ - /* Send CMD55 APP_CMD with argument as card's RCA */ - SDIO_CmdInitStructure.SDIO_Argument = (uint32_t)8; - SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_SET_BLOCKLEN; - SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; - SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; - SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; - SDIO_SendCommand(&SDIO_CmdInitStructure); - - errorstatus = CmdResp1Error(SDIO_SET_BLOCKLEN); - - if (errorstatus != SD_OK) - { - return(errorstatus); - } - - /* Send CMD55 APP_CMD with argument as card's RCA */ - SDIO_CmdInitStructure.SDIO_Argument = (uint32_t) RCA << 16; - SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_APP_CMD; - SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; - SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; - SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; - SDIO_SendCommand(&SDIO_CmdInitStructure); - - errorstatus = CmdResp1Error(SDIO_APP_CMD); - - if (errorstatus != SD_OK) - { - return(errorstatus); - } - SDIO_DataInitStructure.SDIO_DataTimeOut = SD_DATATIMEOUT; - SDIO_DataInitStructure.SDIO_DataLength = 8; - SDIO_DataInitStructure.SDIO_DataBlockSize = SDIO_DataBlockSize_8b; - SDIO_DataInitStructure.SDIO_TransferDir = SDIO_TransferDir_ToSDIO; - SDIO_DataInitStructure.SDIO_TransferMode = SDIO_TransferMode_Block; - SDIO_DataInitStructure.SDIO_DPSM = SDIO_DPSM_Enable; - SDIO_DataConfig(&SDIO_DataInitStructure); - - - /* Send ACMD51 SD_APP_SEND_SCR with argument as 0 */ - SDIO_CmdInitStructure.SDIO_Argument = 0x0; - SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_SD_APP_SEND_SCR; - SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; - SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; - SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; - SDIO_SendCommand(&SDIO_CmdInitStructure); - - errorstatus = CmdResp1Error(SDIO_SD_APP_SEND_SCR); - - if (errorstatus != SD_OK) - { - return(errorstatus); - } - - while (!(SDIO->STA & (SDIO_FLAG_RXOVERR | SDIO_FLAG_DCRCFAIL | SDIO_FLAG_DTIMEOUT | SDIO_FLAG_DBCKEND | SDIO_FLAG_STBITERR))) - { - if (SDIO_GetFlagStatus(SDIO_FLAG_RXDAVL) != RESET) - { - *(tempscr + index) = SDIO_ReadData(); - index++; - } - } - - if (SDIO_GetFlagStatus(SDIO_FLAG_DTIMEOUT) != RESET) - { - SDIO_ClearFlag(SDIO_FLAG_DTIMEOUT); - errorstatus = SD_DATA_TIMEOUT; - return(errorstatus); - } - else if (SDIO_GetFlagStatus(SDIO_FLAG_DCRCFAIL) != RESET) - { - SDIO_ClearFlag(SDIO_FLAG_DCRCFAIL); - errorstatus = SD_DATA_CRC_FAIL; - return(errorstatus); - } - else if (SDIO_GetFlagStatus(SDIO_FLAG_RXOVERR) != RESET) - { - SDIO_ClearFlag(SDIO_FLAG_RXOVERR); - errorstatus = SD_RX_OVERRUN; - return(errorstatus); - } - else if (SDIO_GetFlagStatus(SDIO_FLAG_STBITERR) != RESET) - { - SDIO_ClearFlag(SDIO_FLAG_STBITERR); - errorstatus = SD_START_BIT_ERR; - return(errorstatus); - } - - /* Clear all the static flags */ - SDIO_ClearFlag(SDIO_STATIC_FLAGS); - - *(pscr + 1) = ((tempscr[0] & SD_0TO7BITS) << 24) | ((tempscr[0] & SD_8TO15BITS) << 8) | ((tempscr[0] & SD_16TO23BITS) >> 8) | ((tempscr[0] & SD_24TO31BITS) >> 24); - - *(pscr) = ((tempscr[1] & SD_0TO7BITS) << 24) | ((tempscr[1] & SD_8TO15BITS) << 8) | ((tempscr[1] & SD_16TO23BITS) >> 8) | ((tempscr[1] & SD_24TO31BITS) >> 24); - - return(errorstatus); -} - -/** - * @brief Converts the number of bytes in power of two and returns the - * power. - * @param NumberOfBytes: number of bytes. - * @retval None - */ -static uint8_t convert_from_bytes_to_power_of_two(uint16_t NumberOfBytes) -{ - uint8_t count = 0; - - while (NumberOfBytes != 1) - { - NumberOfBytes >>= 1; - count++; - } - return(count); -} - -/** - * @brief Configures the SDIO Corresponding GPIO Ports - * @param None - * @retval None - */ -static void GPIO_Configuration(void) -{ - GPIO_InitTypeDef GPIO_InitStructure; - - /* GPIOC and GPIOD Periph clock enable */ - RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOC | RCC_APB2Periph_GPIOD, ENABLE); - - /* Configure PC.08, PC.09, PC.10, PC.11, PC.12 pin: D0, D1, D2, D3, CLK pin */ - GPIO_InitStructure.GPIO_Pin = GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10 | GPIO_Pin_11 | GPIO_Pin_12; - GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; - GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; - GPIO_Init(GPIOC, &GPIO_InitStructure); - - /* Configure PD.02 CMD line */ - GPIO_InitStructure.GPIO_Pin = GPIO_Pin_2; - GPIO_Init(GPIOD, &GPIO_InitStructure); -} - -/** - * @brief Configures the DMA2 Channel4 for SDIO Tx request. - * @param BufferSRC: pointer to the source buffer - * @param BufferSize: buffer size - * @retval None - */ -static void DMA_TxConfiguration(uint32_t *BufferSRC, uint32_t BufferSize) -{ - DMA_InitTypeDef DMA_InitStructure; - - DMA_ClearFlag(DMA2_FLAG_TC4 | DMA2_FLAG_TE4 | DMA2_FLAG_HT4 | DMA2_FLAG_GL4); - - /* DMA2 Channel4 disable */ - DMA_Cmd(DMA2_Channel4, DISABLE); - - /* DMA2 Channel4 Config */ - DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)SDIO_FIFO_Address; - DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)BufferSRC; - DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST; - DMA_InitStructure.DMA_BufferSize = BufferSize / 4; - DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable; - DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable; - DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Word; - DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Word; - DMA_InitStructure.DMA_Mode = DMA_Mode_Normal; - DMA_InitStructure.DMA_Priority = DMA_Priority_High; - DMA_InitStructure.DMA_M2M = DMA_M2M_Disable; - DMA_Init(DMA2_Channel4, &DMA_InitStructure); - - /* DMA2 Channel4 enable */ - DMA_Cmd(DMA2_Channel4, ENABLE); -} - -/** - * @brief Configures the DMA2 Channel4 for SDIO Rx request. - * @param BufferDST: pointer to the destination buffer - * @param BufferSize: buffer size - * @retval None - */ -static void DMA_RxConfiguration(uint32_t *BufferDST, uint32_t BufferSize) -{ - DMA_InitTypeDef DMA_InitStructure; - - DMA_ClearFlag(DMA2_FLAG_TC4 | DMA2_FLAG_TE4 | DMA2_FLAG_HT4 | DMA2_FLAG_GL4); - - /* DMA2 Channel4 disable */ - DMA_Cmd(DMA2_Channel4, DISABLE); - - /* DMA2 Channel4 Config */ - DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)SDIO_FIFO_Address; - DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)BufferDST; - DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralSRC; - DMA_InitStructure.DMA_BufferSize = BufferSize / 4; - DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable; - DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable; - DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Word; - DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Word; - DMA_InitStructure.DMA_Mode = DMA_Mode_Normal; - DMA_InitStructure.DMA_Priority = DMA_Priority_High; - DMA_InitStructure.DMA_M2M = DMA_M2M_Disable; - DMA_Init(DMA2_Channel4, &DMA_InitStructure); - - /* DMA2 Channel4 enable */ - DMA_Cmd(DMA2_Channel4, ENABLE); -} - -/** - * @} - */ - -/** - * @} - */ - -/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/ - -/* - * RT-Thread SD Card Driver - * 20090417 Bernard - */ -#include -#include - -/* set sector size to 512 */ -#define SECTOR_SIZE 512 - -static struct rt_device sdcard_device; -static SD_CardInfo SDCardInfo; -static struct dfs_partition part; -static struct rt_semaphore sd_lock; -static rt_uint8_t _sdcard_buffer[SECTOR_SIZE]; - -/* RT-Thread Device Driver Interface */ -static rt_err_t rt_sdcard_init(rt_device_t dev) -{ - NVIC_InitTypeDef NVIC_InitStructure; - - NVIC_InitStructure.NVIC_IRQChannel = SDIO_IRQn; - NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0; - NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; - NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; - NVIC_Init(&NVIC_InitStructure); - - if (rt_sem_init(&sd_lock, "sdlock", 1, RT_IPC_FLAG_FIFO) != RT_EOK) - { - rt_kprintf("init sd lock semaphore failed\n"); - } - - return RT_EOK; -} - -static rt_err_t rt_sdcard_open(rt_device_t dev, rt_uint16_t oflag) -{ - return RT_EOK; -} - -static rt_err_t rt_sdcard_close(rt_device_t dev) -{ - return RT_EOK; -} - -static rt_size_t rt_sdcard_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size) -{ - SD_Error status; - rt_uint32_t nr = size / SECTOR_SIZE, retry; - - rt_sem_take(&sd_lock, RT_WAITING_FOREVER); - - retry = 3; - while(retry) - { - /* read all sectors */ - if (((rt_uint32_t)buffer % 4 != 0) || - ((rt_uint32_t)buffer > 0x20080000)) - { - rt_uint32_t index; - - /* which is not alignment with 4 or chip SRAM */ - for (index = 0; index < nr; index ++) - { - status = SD_ReadBlock((part.offset + index) * SECTOR_SIZE + pos, - (uint32_t*)_sdcard_buffer, SECTOR_SIZE); - - if (status != SD_OK) break; - - /* copy to the buffer */ - rt_memcpy(((rt_uint8_t*)buffer + index * SECTOR_SIZE), _sdcard_buffer, SECTOR_SIZE); - } - } - else - { - if (nr == 1) - { - status = SD_ReadBlock(part.offset * SECTOR_SIZE + pos, - (uint32_t*)buffer, SECTOR_SIZE); - } - else - { - status = SD_ReadMultiBlocks(part.offset * SECTOR_SIZE + pos, - (uint32_t*)buffer, SECTOR_SIZE, nr); - } - } - - if (status == SD_OK) break; - - retry --; - } - rt_sem_release(&sd_lock); - - if (status == SD_OK) return size; - - rt_kprintf("read failed: %d, buffer 0x%08x\n", status, buffer); - return 0; -} - -static rt_size_t rt_sdcard_write (rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size) -{ - SD_Error status; - rt_uint32_t nr = size / SECTOR_SIZE; - - rt_sem_take(&sd_lock, RT_WAITING_FOREVER); - - /* read all sectors */ - if (((rt_uint32_t)buffer % 4 != 0) || - ((rt_uint32_t)buffer > 0x20080000)) - { - rt_uint32_t index; - - /* which is not alignment with 4 or chip SRAM */ - for (index = 0; index < nr; index ++) - { - /* copy to the buffer */ - rt_memcpy(_sdcard_buffer, ((rt_uint8_t*)buffer + index * SECTOR_SIZE), SECTOR_SIZE); - - status = SD_WriteBlock((part.offset + index) * SECTOR_SIZE + pos, - (uint32_t*)_sdcard_buffer, SECTOR_SIZE); - - if (status != SD_OK) break; - } - } - else - { - if (nr == 1) - { - status = SD_WriteBlock(part.offset * SECTOR_SIZE + pos, - (uint32_t*)buffer, SECTOR_SIZE); - } - else - { - status = SD_WriteMultiBlocks(part.offset * SECTOR_SIZE + pos, - (uint32_t*)buffer, SECTOR_SIZE, nr); - } - } - - rt_sem_release(&sd_lock); - - if (status == SD_OK) return size; - - rt_kprintf("write failed: %d, buffer 0x%08x\n", status, buffer); - return 0; -} - -static rt_err_t rt_sdcard_control(rt_device_t dev, rt_uint8_t cmd, void *args) -{ - return RT_EOK; -} - -void rt_hw_sdcard_init() -{ - if (SD_Init() == SD_OK) - { - SD_Error status; - rt_uint8_t *sector; - - status = SD_GetCardInfo(&SDCardInfo); - if (status != SD_OK) goto __return; - - status = SD_SelectDeselect((u32) (SDCardInfo.RCA << 16)); - if (status != SD_OK) goto __return; - - SD_EnableWideBusOperation(SDIO_BusWide_1b); - SD_SetDeviceMode(SD_DMA_MODE); - - /* get the first sector to read partition table */ - sector = (rt_uint8_t*) rt_malloc (512); - if (sector == RT_NULL) - { - rt_kprintf("allocate partition sector buffer failed\n"); - return; - } - status = SD_ReadBlock(0, (uint32_t*)sector, 512); - if (status == SD_OK) - { - /* get the first partition */ - if (dfs_filesystem_get_partition(&part, sector, 0) != 0) - { - /* there is no partition */ - part.offset = 0; - part.size = 0; - } - } - else - { - /* there is no partition table */ - part.offset = 0; - part.size = 0; - } - - /* release sector buffer */ - rt_free(sector); - - /* register sdcard device */ - sdcard_device.init = rt_sdcard_init; - sdcard_device.open = rt_sdcard_open; - sdcard_device.close = rt_sdcard_close; - sdcard_device.read = rt_sdcard_read; - sdcard_device.write = rt_sdcard_write; - sdcard_device.control = rt_sdcard_control; - - /* no private */ - sdcard_device.private = &SDCardInfo; - - rt_device_register(&sdcard_device, "sd0", - RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_REMOVABLE | RT_DEVICE_FLAG_STANDALONE); - - return; - } - -__return: - rt_kprintf("sdcard init failed\n"); -} diff --git a/bsp/stm32_radio/sdcard.h b/bsp/stm32_radio/sdcard.h deleted file mode 100644 index fd89d94afb..0000000000 --- a/bsp/stm32_radio/sdcard.h +++ /dev/null @@ -1,285 +0,0 @@ -/** - ****************************************************************************** - * @file SDIO/sdcard.h - * @author MCD Application Team - * @version V3.1.2 - * @date 09/28/2009 - * @brief This file contains all the functions prototypes for the SD Card - * driver firmware library. - ****************************************************************************** - * @copy - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2009 STMicroelectronics

- */ - -/** @addtogroup STM32F10x_StdPeriph_Examples - * @{ - */ - -/** @addtogroup SDIO_Example - * @{ - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __SDCARD_H -#define __SDCARD_H - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x.h" - -/* Exported types ------------------------------------------------------------*/ -typedef enum -{ - /* SDIO specific error defines */ - SD_CMD_CRC_FAIL = (1), /* Command response received (but CRC check failed) */ - SD_DATA_CRC_FAIL = (2), /* Data bock sent/received (CRC check Failed) */ - SD_CMD_RSP_TIMEOUT = (3), /* Command response timeout */ - SD_DATA_TIMEOUT = (4), /* Data time out */ - SD_TX_UNDERRUN = (5), /* Transmit FIFO under-run */ - SD_RX_OVERRUN = (6), /* Receive FIFO over-run */ - SD_START_BIT_ERR = (7), /* Start bit not detected on all data signals in widE bus mode */ - SD_CMD_OUT_OF_RANGE = (8), /* CMD's argument was out of range.*/ - SD_ADDR_MISALIGNED = (9), /* Misaligned address */ - SD_BLOCK_LEN_ERR = (10), /* Transferred block length is not allowed for the card or the number of transferred bytes does not match the block length */ - SD_ERASE_SEQ_ERR = (11), /* An error in the sequence of erase command occurs.*/ - SD_BAD_ERASE_PARAM = (12), /* An Invalid selection for erase groups */ - SD_WRITE_PROT_VIOLATION = (13), /* Attempt to program a write protect block */ - SD_LOCK_UNLOCK_FAILED = (14), /* Sequence or password error has been detected in unlock command or if there was an attempt to access a locked card */ - SD_COM_CRC_FAILED = (15), /* CRC check of the previous command failed */ - SD_ILLEGAL_CMD = (16), /* Command is not legal for the card state */ - SD_CARD_ECC_FAILED = (17), /* Card internal ECC was applied but failed to correct the data */ - SD_CC_ERROR = (18), /* Internal card controller error */ - SD_GENERAL_UNKNOWN_ERROR = (19), /* General or Unknown error */ - SD_STREAM_READ_UNDERRUN = (20), /* The card could not sustain data transfer in stream read operation. */ - SD_STREAM_WRITE_OVERRUN = (21), /* The card could not sustain data programming in stream mode */ - SD_CID_CSD_OVERWRITE = (22), /* CID/CSD overwrite error */ - SD_WP_ERASE_SKIP = (23), /* only partial address space was erased */ - SD_CARD_ECC_DISABLED = (24), /* Command has been executed without using internal ECC */ - SD_ERASE_RESET = (25), /* Erase sequence was cleared before executing because an out of erase sequence command was received */ - SD_AKE_SEQ_ERROR = (26), /* Error in sequence of authentication. */ - SD_INVALID_VOLTRANGE = (27), - SD_ADDR_OUT_OF_RANGE = (28), - SD_SWITCH_ERROR = (29), - SD_SDIO_DISABLED = (30), - SD_SDIO_FUNCTION_BUSY = (31), - SD_SDIO_FUNCTION_FAILED = (32), - SD_SDIO_UNKNOWN_FUNCTION = (33), - - /* Standard error defines */ - SD_INTERNAL_ERROR, - SD_NOT_CONFIGURED, - SD_REQUEST_PENDING, - SD_REQUEST_NOT_APPLICABLE, - SD_INVALID_PARAMETER, - SD_UNSUPPORTED_FEATURE, - SD_UNSUPPORTED_HW, - SD_ERROR, - SD_OK, -} SD_Error; - -/* SDIO Commands Index */ -#define SDIO_GO_IDLE_STATE ((uint8_t)0) -#define SDIO_SEND_OP_COND ((uint8_t)1) -#define SDIO_ALL_SEND_CID ((uint8_t)2) -#define SDIO_SET_REL_ADDR ((uint8_t)3) /* SDIO_SEND_REL_ADDR for SD Card */ -#define SDIO_SET_DSR ((uint8_t)4) -#define SDIO_SDIO_SEN_OP_COND ((uint8_t)5) -#define SDIO_HS_SWITCH ((uint8_t)6) -#define SDIO_SEL_DESEL_CARD ((uint8_t)7) -#define SDIO_HS_SEND_EXT_CSD ((uint8_t)8) -#define SDIO_SEND_CSD ((uint8_t)9) -#define SDIO_SEND_CID ((uint8_t)10) -#define SDIO_READ_DAT_UNTIL_STOP ((uint8_t)11) /* SD Card doesn't support it */ -#define SDIO_STOP_TRANSMISSION ((uint8_t)12) -#define SDIO_SEND_STATUS ((uint8_t)13) -#define SDIO_HS_BUSTEST_READ ((uint8_t)14) -#define SDIO_GO_INACTIVE_STATE ((uint8_t)15) -#define SDIO_SET_BLOCKLEN ((uint8_t)16) -#define SDIO_READ_SINGLE_BLOCK ((uint8_t)17) -#define SDIO_READ_MULT_BLOCK ((uint8_t)18) -#define SDIO_HS_BUSTEST_WRITE ((uint8_t)19) -#define SDIO_WRITE_DAT_UNTIL_STOP ((uint8_t)20) /* SD Card doesn't support it */ -#define SDIO_SET_BLOCK_COUNT ((uint8_t)23) /* SD Card doesn't support it */ -#define SDIO_WRITE_SINGLE_BLOCK ((uint8_t)24) -#define SDIO_WRITE_MULT_BLOCK ((uint8_t)25) -#define SDIO_PROG_CID ((uint8_t)26) /* reserved for manufacturers */ -#define SDIO_PROG_CSD ((uint8_t)27) -#define SDIO_SET_WRITE_PROT ((uint8_t)28) -#define SDIO_CLR_WRITE_PROT ((uint8_t)29) -#define SDIO_SEND_WRITE_PROT ((uint8_t)30) -#define SDIO_SD_ERASE_GRP_START ((uint8_t)32) /* To set the address of the first write - block to be erased. (For SD card only) */ -#define SDIO_SD_ERASE_GRP_END ((uint8_t)33) /* To set the address of the last write block of the - continuous range to be erased. (For SD card only) */ -#define SDIO_ERASE_GRP_START ((uint8_t)35) /* To set the address of the first write block to be erased. - (For MMC card only spec 3.31) */ - -#define SDIO_ERASE_GRP_END ((uint8_t)36) /* To set the address of the last write block of the - continuous range to be erased. (For MMC card only spec 3.31) */ - -#define SDIO_ERASE ((uint8_t)38) -#define SDIO_FAST_IO ((uint8_t)39) /* SD Card doesn't support it */ -#define SDIO_GO_IRQ_STATE ((uint8_t)40) /* SD Card doesn't support it */ -#define SDIO_LOCK_UNLOCK ((uint8_t)42) -#define SDIO_APP_CMD ((uint8_t)55) -#define SDIO_GEN_CMD ((uint8_t)56) -#define SDIO_NO_CMD ((uint8_t)64) - -/* Following commands are SD Card Specific commands. - SDIO_APP_CMD should be sent before sending these - commands. */ -#define SDIO_APP_SD_SET_BUSWIDTH ((uint8_t)6) /* For SD Card only */ -#define SDIO_SD_APP_STAUS ((uint8_t)13) /* For SD Card only */ -#define SDIO_SD_APP_SEND_NUM_WRITE_BLOCKS ((uint8_t)22) /* For SD Card only */ -#define SDIO_SD_APP_OP_COND ((uint8_t)41) /* For SD Card only */ -#define SDIO_SD_APP_SET_CLR_CARD_DETECT ((uint8_t)42) /* For SD Card only */ -#define SDIO_SD_APP_SEND_SCR ((uint8_t)51) /* For SD Card only */ -#define SDIO_SDIO_RW_DIRECT ((uint8_t)52) /* For SD I/O Card only */ -#define SDIO_SDIO_RW_EXTENDED ((uint8_t)53) /* For SD I/O Card only */ - -/* Following commands are SD Card Specific security commands. - SDIO_APP_CMD should be sent before sending these commands. */ -#define SDIO_SD_APP_GET_MKB ((uint8_t)43) /* For SD Card only */ -#define SDIO_SD_APP_GET_MID ((uint8_t)44) /* For SD Card only */ -#define SDIO_SD_APP_SET_CER_RN1 ((uint8_t)45) /* For SD Card only */ -#define SDIO_SD_APP_GET_CER_RN2 ((uint8_t)46) /* For SD Card only */ -#define SDIO_SD_APP_SET_CER_RES2 ((uint8_t)47) /* For SD Card only */ -#define SDIO_SD_APP_GET_CER_RES1 ((uint8_t)48) /* For SD Card only */ -#define SDIO_SD_APP_SECURE_READ_MULTIPLE_BLOCK ((uint8_t)18) /* For SD Card only */ -#define SDIO_SD_APP_SECURE_WRITE_MULTIPLE_BLOCK ((uint8_t)25) /* For SD Card only */ -#define SDIO_SD_APP_SECURE_ERASE ((uint8_t)38) /* For SD Card only */ -#define SDIO_SD_APP_CHANGE_SECURE_AREA ((uint8_t)49) /* For SD Card only */ -#define SDIO_SD_APP_SECURE_WRITE_MKB ((uint8_t)48) /* For SD Card only */ - -typedef enum -{ - SD_NO_TRANSFER = 0, - SD_TRANSFER_IN_PROGRESS -} SDTransferState; - -typedef struct -{ - uint16_t TransferredBytes; - SD_Error TransferError; - uint8_t padding; -} SDLastTransferInfo; - -typedef struct /* Card Specific Data */ -{ - __IO uint8_t CSDStruct; /* CSD structure */ - __IO uint8_t SysSpecVersion; /* System specification version */ - __IO uint8_t Reserved1; /* Reserved */ - __IO uint8_t TAAC; /* Data read access-time 1 */ - __IO uint8_t NSAC; /* Data read access-time 2 in CLK cycles */ - __IO uint8_t MaxBusClkFrec; /* Max. bus clock frequency */ - __IO uint16_t CardComdClasses; /* Card command classes */ - __IO uint8_t RdBlockLen; /* Max. read data block length */ - __IO uint8_t PartBlockRead; /* Partial blocks for read allowed */ - __IO uint8_t WrBlockMisalign; /* Write block misalignment */ - __IO uint8_t RdBlockMisalign; /* Read block misalignment */ - __IO uint8_t DSRImpl; /* DSR implemented */ - __IO uint8_t Reserved2; /* Reserved */ - __IO uint32_t DeviceSize; /* Device Size */ - __IO uint8_t MaxRdCurrentVDDMin; /* Max. read current @ VDD min */ - __IO uint8_t MaxRdCurrentVDDMax; /* Max. read current @ VDD max */ - __IO uint8_t MaxWrCurrentVDDMin; /* Max. write current @ VDD min */ - __IO uint8_t MaxWrCurrentVDDMax; /* Max. write current @ VDD max */ - __IO uint8_t DeviceSizeMul; /* Device size multiplier */ - __IO uint8_t EraseGrSize; /* Erase group size */ - __IO uint8_t EraseGrMul; /* Erase group size multiplier */ - __IO uint8_t WrProtectGrSize; /* Write protect group size */ - __IO uint8_t WrProtectGrEnable; /* Write protect group enable */ - __IO uint8_t ManDeflECC; /* Manufacturer default ECC */ - __IO uint8_t WrSpeedFact; /* Write speed factor */ - __IO uint8_t MaxWrBlockLen; /* Max. write data block length */ - __IO uint8_t WriteBlockPaPartial; /* Partial blocks for write allowed */ - __IO uint8_t Reserved3; /* Reserded */ - __IO uint8_t ContentProtectAppli; /* Content protection application */ - __IO uint8_t FileFormatGrouop; /* File format group */ - __IO uint8_t CopyFlag; /* Copy flag (OTP) */ - __IO uint8_t PermWrProtect; /* Permanent write protection */ - __IO uint8_t TempWrProtect; /* Temporary write protection */ - __IO uint8_t FileFormat; /* File Format */ - __IO uint8_t ECC; /* ECC code */ - __IO uint8_t CSD_CRC; /* CSD CRC */ - __IO uint8_t Reserved4; /* always 1*/ -} SD_CSD; - -typedef struct /*Card Identification Data*/ -{ - __IO uint8_t ManufacturerID; /* ManufacturerID */ - __IO uint16_t OEM_AppliID; /* OEM/Application ID */ - __IO uint32_t ProdName1; /* Product Name part1 */ - __IO uint8_t ProdName2; /* Product Name part2*/ - __IO uint8_t ProdRev; /* Product Revision */ - __IO uint32_t ProdSN; /* Product Serial Number */ - __IO uint8_t Reserved1; /* Reserved1 */ - __IO uint16_t ManufactDate; /* Manufacturing Date */ - __IO uint8_t CID_CRC; /* CID CRC */ - __IO uint8_t Reserved2; /* always 1 */ -} SD_CID; - -typedef struct -{ - SD_CSD SD_csd; - SD_CID SD_cid; - uint32_t CardCapacity; /* Card Capacity */ - uint32_t CardBlockSize; /* Card Block Size */ - uint16_t RCA; - uint8_t CardType; -} SD_CardInfo; - -/* Exported constants --------------------------------------------------------*/ -#define SD_DMA_MODE ((uint32_t)0x00000000) -#define SD_INTERRUPT_MODE ((uint32_t)0x00000001) -#define SD_POLLING_MODE ((uint32_t)0x00000002) - -/* Supported Memory Cards */ -#define SDIO_STD_CAPACITY_SD_CARD_V1_1 ((uint32_t)0x0) -#define SDIO_STD_CAPACITY_SD_CARD_V2_0 ((uint32_t)0x1) -#define SDIO_HIGH_CAPACITY_SD_CARD ((uint32_t)0x2) -#define SDIO_MULTIMEDIA_CARD ((uint32_t)0x3) -#define SDIO_SECURE_DIGITAL_IO_CARD ((uint32_t)0x4) -#define SDIO_HIGH_SPEED_MULTIMEDIA_CARD ((uint32_t)0x5) -#define SDIO_SECURE_DIGITAL_IO_COMBO_CARD ((uint32_t)0x6) -#define SDIO_HIGH_CAPACITY_MMC_CARD ((uint32_t)0x7) - -/* Exported macro ------------------------------------------------------------*/ -/* Exported functions ------------------------------------------------------- */ -SD_Error SD_Init(void); -SD_Error SD_PowerON(void); -SD_Error SD_PowerOFF(void); -SD_Error SD_InitializeCards(void); -SD_Error SD_GetCardInfo(SD_CardInfo *cardinfo); -SD_Error SD_EnableWideBusOperation(uint32_t WideMode); -SD_Error SD_SetDeviceMode(uint32_t Mode); -SD_Error SD_SelectDeselect(uint32_t addr); -SD_Error SD_ReadBlock(uint32_t addr, uint32_t *readbuff, uint16_t BlockSize); -SD_Error SD_ReadMultiBlocks(uint32_t addr, uint32_t *readbuff, uint16_t BlockSize, uint32_t NumberOfBlocks); -SD_Error SD_WriteBlock(uint32_t addr, uint32_t *writebuff, uint16_t BlockSize); -SD_Error SD_WriteMultiBlocks(uint32_t addr, uint32_t *writebuff, uint16_t BlockSize, uint32_t NumberOfBlocks); -SDTransferState SD_GetTransferState(void); -SD_Error SD_StopTransfer(void); -SD_Error SD_Erase(uint32_t startaddr, uint32_t endaddr); -SD_Error SD_SendStatus(uint32_t *pcardstatus); -SD_Error SD_SendSDStatus(uint32_t *psdstatus); -SD_Error SD_ProcessIRQSrc(void); - -#endif /* __SDCARD_H */ - -/** - * @} - */ - -/** - * @} - */ - -/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/spi_flash.c b/bsp/stm32_radio/spi_flash.c deleted file mode 100644 index d5b0e06d4f..0000000000 --- a/bsp/stm32_radio/spi_flash.c +++ /dev/null @@ -1,317 +0,0 @@ -#include -#include "board.h" -#include "spi_flash.h" -#include "rtthread.h" - -/* - * WARNING: !!! ENABLING DMA MODE MAY DESTROY YOUR DATA IN THE SPI FLASH !!! - * Don't set SPI_FLASH_USE_DMA to 1 unless you know what you're doing! - * However, readonly access is just fine. :) - */ -#define SPI_FLASH_USE_DMA 0 -#define SECTOR_SIZE 512 - -extern uint8_t SPI_WriteByte(unsigned char data); - -#if SPI_FLASH_USE_DMA -static uint8_t dummy = 0; -static uint8_t _spi_flash_buffer[SECTOR_SIZE]; -#endif - -/********************** hardware *************************************/ -/* SPI_FLASH_CS PA4 */ -/* SPI_FLASH_RST PA3 */ -#define FLASH_RST_0() GPIO_ResetBits(GPIOA,GPIO_Pin_3) -#define FLASH_RST_1() GPIO_SetBits(GPIOA,GPIO_Pin_3) - -#define FLASH_CS_0() GPIO_ResetBits(GPIOA,GPIO_Pin_4) -#define FLASH_CS_1() GPIO_SetBits(GPIOA,GPIO_Pin_4) -/********************** hardware *************************************/ - -static void GPIO_Configuration(void) -{ - GPIO_InitTypeDef GPIO_InitStructure; - - RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA, ENABLE); - - GPIO_InitStructure.GPIO_Pin = GPIO_Pin_4 | GPIO_Pin_3; - GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP; - GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz; - GPIO_Init(GPIOA, &GPIO_InitStructure); - - FLASH_RST_0(); // RESET - FLASH_CS_1(); - FLASH_RST_1(); -} - -#if SPI_FLASH_USE_DMA -static void DMA_RxConfiguration(rt_uint32_t addr, rt_size_t size) -{ - DMA_InitTypeDef DMA_InitStructure; - - DMA_ClearFlag(DMA1_FLAG_TC2 | DMA1_FLAG_TE2 | DMA1_FLAG_TC3 | DMA1_FLAG_TE3); - dummy = 0; - - /* DMA Channel configuration ----------------------------------------------*/ - DMA_Cmd(DMA1_Channel2, DISABLE); - DMA_InitStructure.DMA_PeripheralBaseAddr = (u32)(&(SPI1->DR)); - DMA_InitStructure.DMA_MemoryBaseAddr = (u32) addr; - DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralSRC; - DMA_InitStructure.DMA_BufferSize = size; - DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable; - DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable; - DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte; - DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte; - DMA_InitStructure.DMA_Priority = DMA_Priority_VeryHigh; - DMA_InitStructure.DMA_Mode = DMA_Mode_Normal; - DMA_InitStructure.DMA_M2M = DMA_M2M_Disable; - DMA_Init(DMA1_Channel2, &DMA_InitStructure); - - DMA_Cmd(DMA1_Channel2, ENABLE); - - /* Dummy TX channel configuration */ - DMA_Cmd(DMA1_Channel3, DISABLE); - DMA_InitStructure.DMA_PeripheralBaseAddr = (u32)(&(SPI1->DR)); - DMA_InitStructure.DMA_MemoryBaseAddr = (u32)(&dummy); - DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST; - DMA_InitStructure.DMA_BufferSize = size; - DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable; - DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Disable; - DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte; - DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte; - DMA_InitStructure.DMA_Priority = DMA_Priority_Medium; - DMA_InitStructure.DMA_Mode = DMA_Mode_Normal; - DMA_InitStructure.DMA_M2M = DMA_M2M_Disable; - DMA_Init(DMA1_Channel3, &DMA_InitStructure); - - DMA_Cmd(DMA1_Channel3, ENABLE); -} -#endif - -static uint8_t SPI_HostReadByte(void) -{ - //return SPI_WriteByte(0x00); - //Wait until the transmit buffer is empty - //while (SPI_I2S_GetFlagStatus(SPI1, SPI_I2S_FLAG_TXE) == RESET); - while( (SPI1->SR & SPI_I2S_FLAG_TXE) == RESET); - // Send the byte - SPI_I2S_SendData(SPI1, 0); - - //Wait until a data is received - //while (SPI_I2S_GetFlagStatus(SPI1, SPI_I2S_FLAG_RXNE) == RESET); - while( (SPI1->SR & SPI_I2S_FLAG_RXNE) == RESET); - // Get the received data - return SPI_I2S_ReceiveData(SPI1); - -} - -static void SPI_HostWriteByte(uint8_t wByte) -{ - SPI_WriteByte(wByte); -} - -/*****************************************************************************/ -/*Status Register Format: */ -/* ------------------------------------------------------------------------- */ -/* | bit7 | bit6 | bit5 | bit4 | bit3 | bit2 | bit1 | bit0 | */ -/* |--------|--------|--------|--------|--------|--------|--------|--------| */ -/* |RDY/BUSY| COMP | device density | X | X | */ -/* ------------------------------------------------------------------------- */ -/* 0:busy | | AT45DB041:0111 | protect|page size */ -/* 1:ready | | AT45DB161:1011 | */ -/* --------------------------------------------------------------------------*/ -/*****************************************************************************/ -static uint8_t AT45DB_StatusRegisterRead(void) -{ - uint8_t i; - - FLASH_CS_0(); - SPI_HostWriteByte(AT45DB_READ_STATE_REGISTER); - i = SPI_HostReadByte(); - FLASH_CS_1(); - - return i; -} - -static void wait_busy(void) -{ - uint16_t i = 0; - while (i++ < 10000) - { - if (AT45DB_StatusRegisterRead() & 0x80) - { - return; - } - } - rt_kprintf("\r\nSPI_FLASH timeout!!!\r\n"); -} - -static void read_page(uint32_t page, uint8_t *pHeader) -{ -#if SPI_FLASH_USE_DMA - rt_sem_take(&spi1_lock, RT_WAITING_FOREVER); - - DMA_RxConfiguration((rt_uint32_t) pHeader, SECTOR_SIZE); - - FLASH_CS_0(); - - SPI_HostWriteByte(AT45DB_MM_PAGE_READ); - SPI_HostWriteByte((uint8_t)(page >> 6)); - SPI_HostWriteByte((uint8_t)(page << 2)); - SPI_HostWriteByte(0x00); - - // 4 don't care bytes - SPI_HostWriteByte(0x00); - SPI_HostWriteByte(0x00); - SPI_HostWriteByte(0x00); - SPI_HostWriteByte(0x00); - - SPI_I2S_ClearFlag(SPI1, SPI_I2S_FLAG_RXNE); - SPI_I2S_DMACmd(SPI1, SPI_I2S_DMAReq_Tx | SPI_I2S_DMAReq_Rx, ENABLE); - while (DMA_GetFlagStatus(DMA1_FLAG_TC2) == RESET); - - FLASH_CS_1(); - - SPI_I2S_DMACmd(SPI1, SPI_I2S_DMAReq_Tx | SPI_I2S_DMAReq_Rx, DISABLE); - - rt_sem_release(&spi1_lock); -#else - uint16_t i; - - rt_sem_take(&spi1_lock, RT_WAITING_FOREVER); - - FLASH_CS_0(); - - SPI_HostWriteByte(AT45DB_MM_PAGE_READ); - SPI_HostWriteByte((uint8_t)(page >> 6)); - SPI_HostWriteByte((uint8_t)(page << 2)); - SPI_HostWriteByte(0x00); - - // 4 don't care bytes - SPI_HostWriteByte(0x00); - SPI_HostWriteByte(0x00); - SPI_HostWriteByte(0x00); - SPI_HostWriteByte(0x00); - - for (i = 0; i < SECTOR_SIZE; i++) - { - *pHeader++ = SPI_HostReadByte(); - } - - FLASH_CS_1(); - - rt_sem_release(&spi1_lock); -#endif -} - -static void write_page(uint32_t page, uint8_t *pHeader) -{ - uint16_t i; - - rt_sem_take(&spi1_lock, RT_WAITING_FOREVER); - - FLASH_CS_0(); - - SPI_HostWriteByte(AT45DB_MM_PAGE_PROG_THRU_BUFFER1); - SPI_HostWriteByte((uint8_t) (page >> 6)); - SPI_HostWriteByte((uint8_t) (page << 2)); - SPI_HostWriteByte(0x00); - - for (i = 0; i < SECTOR_SIZE; i++) - { - SPI_HostWriteByte(*pHeader++); - } - - FLASH_CS_1(); - - wait_busy(); - - rt_sem_release(&spi1_lock); -} - - -#include -/* SPI DEVICE */ -static struct rt_device spi_flash_device; - -/* RT-Thread Device Driver Interface */ -static rt_err_t rt_spi_flash_init(rt_device_t dev) -{ - return RT_EOK; -} - -static rt_err_t rt_spi_flash_open(rt_device_t dev, rt_uint16_t oflag) -{ - - return RT_EOK; -} - -static rt_err_t rt_spi_flash_close(rt_device_t dev) -{ - return RT_EOK; -} - -static rt_err_t rt_spi_flash_control(rt_device_t dev, rt_uint8_t cmd, void *args) -{ - return RT_EOK; -} - -static rt_size_t rt_spi_flash_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size) -{ - rt_uint32_t index, nr; - - nr = size / SECTOR_SIZE; - - for (index = 0; index < nr; index++) - { - /* only supply single block read: block size 512Byte */ -#if SPI_FLASH_USE_DMA - read_page((pos / SECTOR_SIZE + index), _spi_flash_buffer); - rt_memcpy(((rt_uint8_t *) buffer + index * SECTOR_SIZE), _spi_flash_buffer, SECTOR_SIZE); -#else - read_page((pos / SECTOR_SIZE + index), ((rt_uint8_t *) buffer + index * SECTOR_SIZE)); -#endif - } - - return nr * SECTOR_SIZE; -} - -static rt_size_t rt_spi_flash_write(rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size) -{ - rt_uint32_t index, nr; - - nr = size / SECTOR_SIZE; - - for (index = 0; index < nr; index++) - { - /* only supply single block write: block size 512Byte */ - write_page((pos / SECTOR_SIZE + index), ((rt_uint8_t *) buffer + index * SECTOR_SIZE)); - } - - return nr * SECTOR_SIZE; -} - -void rt_hw_spi_flash_init(void) -{ - GPIO_Configuration(); - -#if SPI_FLASH_USE_DMA - /* Enable the DMA1 Clock */ - RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE); -#endif - - /* register spi_flash device */ - spi_flash_device.type = RT_Device_Class_Block; - spi_flash_device.init = rt_spi_flash_init; - spi_flash_device.open = rt_spi_flash_open; - spi_flash_device.close = rt_spi_flash_close; - spi_flash_device.read = rt_spi_flash_read; - spi_flash_device.write = rt_spi_flash_write; - spi_flash_device.control = rt_spi_flash_control; - - /* no private */ - spi_flash_device.private = RT_NULL; - - rt_device_register(&spi_flash_device, "spi0", - RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_STANDALONE); -} diff --git a/bsp/stm32_radio/spi_flash.h b/bsp/stm32_radio/spi_flash.h deleted file mode 100644 index 66a38285fe..0000000000 --- a/bsp/stm32_radio/spi_flash.h +++ /dev/null @@ -1,26 +0,0 @@ -#ifndef SPI_FLASH_H_INCLUDED -#define SPI_FLASH_H_INCLUDED - -/* -user for AT45DB161. -copy form : http://www.ourdev.cn/bbs/bbs_content.jsp?bbs_sn=737106 -thanks to gxlujd. -*/ - -#define AT45DB_BUFFER_1_WRITE 0x84 /* дÈëµÚÒ»»º³åÇø */ -#define AT45DB_BUFFER_2_WRITE 0x87 /* дÈëµÚ¶þ»º³åÇø */ -#define AT45DB_BUFFER_1_READ 0xD4 /* ¶ÁÈ¡µÚÒ»»º³åÇø */ -#define AT45DB_BUFFER_2_READ 0xD6 /* ¶ÁÈ¡µÚ¶þ»º³åÇø */ -#define AT45DB_B1_TO_MM_PAGE_PROG_WITH_ERASE 0x83 /* ½«µÚÒ»»º³åÇøµÄÊý¾ÝдÈëÖ÷´æ´¢Æ÷£¨²Á³ýģʽ£©*/ -#define AT45DB_B2_TO_MM_PAGE_PROG_WITH_ERASE 0x86 /* ½«µÚ¶þ»º³åÇøµÄÊý¾ÝдÈëÖ÷´æ´¢Æ÷£¨²Á³ýģʽ£©*/ -#define AT45DB_MM_PAGE_TO_B1_XFER 0x53 /* ½«Ö÷´æ´¢Æ÷µÄÖ¸¶¨Ò³Êý¾Ý¼ÓÔص½µÚÒ»»º³åÇø */ -#define AT45DB_MM_PAGE_TO_B2_XFER 0x55 /* ½«Ö÷´æ´¢Æ÷µÄÖ¸¶¨Ò³Êý¾Ý¼ÓÔص½µÚ¶þ»º³åÇø */ -#define AT45DB_PAGE_ERASE 0x81 /* ҳɾ³ý£¨Ã¿Ò³512/528×Ö½Ú£© */ -#define AT45DB_SECTOR_ERASE 0x7C /* ÉÈÇø²Á³ý£¨Ã¿ÉÈÇø128K×Ö½Ú£©*/ -#define AT45DB_READ_STATE_REGISTER 0xD7 /* ¶Áȡ״̬¼Ä´æÆ÷ */ -#define AT45DB_MM_PAGE_READ 0xD2 /* ¶ÁÈ¡Ö÷´¢´æÆ÷µÄÖ¸¶¨Ò³ */ -#define AT45DB_MM_PAGE_PROG_THRU_BUFFER1 0x82 /* ͨ¹ý»º³åÇøдÈëÖ÷´¢´æÆ÷ */ - -extern void rt_hw_spi_flash_init(void); - -#endif /* SPI_FLASH_H_INCLUDED */ diff --git a/bsp/stm32_radio/startup.c b/bsp/stm32_radio/startup.c deleted file mode 100644 index 39ff800b2f..0000000000 --- a/bsp/stm32_radio/startup.c +++ /dev/null @@ -1,149 +0,0 @@ -/* - * File : startup.c - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2006, RT-Thread Develop Team - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://openlab.rt-thread.com/license/LICENSE - * - * Change Logs: - * Date Author Notes - * 2006-08-31 Bernard first implementation - */ - -#include -#include - -#include "board.h" -#include "rtc.h" -#include "spi_flash.h" - -#include - -#ifdef RT_USING_LWIP -#include -#include "dm9000.h" -#endif - -/** - * @addtogroup STM32 - */ - -/*@{*/ -#ifdef __CC_ARM -extern int Image$$RW_IRAM1$$ZI$$Limit; -#elif __ICCARM__ -#pragma section="HEAP" -#else -extern int __bss_end; -#endif - -#ifdef RT_USING_FINSH -extern void finsh_system_init(void); -extern void finsh_set_device(const char* device); -#endif -extern int rt_application_init(void); -extern rt_err_t codec_hw_init(void); -extern rt_err_t codec_hw_init(void); -#ifdef DEBUG -/******************************************************************************* -* Function Name : assert_failed -* Description : Reports the name of the source file and the source line number -* where the assert error has occurred. -* Input : - file: pointer to the source file name -* - line: assert error line source number -* Output : None -* Return : None -*******************************************************************************/ -void assert_failed(u8* file, u32 line) -{ - rt_kprintf("\n\r Wrong parameter value detected on\r\n"); - rt_kprintf(" file %s\r\n", file); - rt_kprintf(" line %d\r\n", line); - - while (1) ; -} -#endif - -/** - * This function will startup RT-Thread RTOS. - */ -void rtthread_startup(void) -{ - /* init board */ - rt_hw_board_init(); - - /* show version */ - rt_show_version(); - - /* init tick */ - rt_system_tick_init(); - - /* init kernel object */ - rt_system_object_init(); - - /* init timer system */ - rt_system_timer_init(); - -#ifdef RT_USING_HEAP -#if STM32_EXT_SRAM - rt_system_heap_init((void*)STM32_EXT_SRAM_BEGIN, (void*)STM32_EXT_SRAM_END); -#else -#ifdef __CC_ARM - rt_system_heap_init((void*)&Image$$RW_IRAM1$$ZI$$Limit, (void*)STM32_SRAM_END); -#elif __ICCARM__ - rt_system_heap_init(__segment_end("HEAP"), (void*)STM32_SRAM_END); -#else - /* init memory system */ - rt_system_heap_init((void*)&__bss_end, (void*)STM32_SRAM_END); -#endif -#endif -#endif - - /* init scheduler system */ - rt_system_scheduler_init(); - - codec_hw_init(); - - /* init hardware device */ -#ifdef RT_USING_DFS - GPIO_ResetBits(GPIOC,GPIO_Pin_6); /* SD card power up */ - rt_hw_sdcard_init(); - rt_hw_spi_flash_init(); -#endif - - /* init all device */ - rt_device_init_all(); - - /* init application */ - rt_application_init(); - -#ifdef RT_USING_FINSH - /* init finsh */ - finsh_system_init(); - finsh_set_device("uart1"); -#endif - - /* init idle thread */ - rt_thread_idle_init(); - - /* start scheduler */ - rt_system_scheduler_start(); - - /* never reach here */ - return ; -} - -int main(void) -{ - rt_uint32_t UNUSED level; - - /* disable interrupt first */ - level = rt_hw_interrupt_disable(); - rtthread_startup(); - - return 0; -} - -/*@}*/ diff --git a/bsp/stm32_radio/station_list.c b/bsp/stm32_radio/station_list.c deleted file mode 100644 index 08758f5cd5..0000000000 --- a/bsp/stm32_radio/station_list.c +++ /dev/null @@ -1,221 +0,0 @@ -#include -#include -#include "station_list.h" - -static rt_uint32_t read_line(int fd, char* line, rt_uint32_t line_size) -{ - char *pos, *next; - rt_uint32_t length; - - length = read(fd, line, line_size); - if (length > 0) - { - pos = strstr(line, "\r\n"); - if (pos == RT_NULL) - { - pos = strstr(line, "\n"); - next = pos ++; - } - else next = pos + 2; - - if (pos != RT_NULL) - { - *pos = '\0'; - - /* move back */ - lseek(fd, -(length - (next - line)), SEEK_CUR); - - length = pos - line; - } - else length = 0; - } - - return length; -} - -static char *strncasestr(const char *haystack, const char *needle) -{ - size_t nl=strlen(needle); - size_t hl=strlen(haystack); - size_t i; - - if (!nl) goto found; - if (nl>hl) return 0; - for (i=hl-nl+1; i; --i) - { - if (*haystack==*needle && !strncasecmp(haystack,needle,nl)) -found: - return (char*)haystack; - ++haystack; - } - return 0; -} - -/* - station list file format: - - [playlist] - numberofentries=1 - File1=http://67.159.5.47:8110 - Title1=(#1 - 7/500) The Dominican.net Radio - */ -struct station_list* station_list_create(const char* fn) -{ - int fd; - rt_uint32_t length, index; - struct station_list* list; - char *line, *pos, prefix[8]; - - list = (struct station_list*)rt_malloc(sizeof(struct station_list)); - if (list == RT_NULL) goto _return0; /* no memory */ - list->count = 0; list->items = RT_NULL; - -#define LINE_BUFFER_SIZE 128 - line = rt_malloc(LINE_BUFFER_SIZE); - if (line == RT_NULL) - goto _return1; /* no memory */ - - fd = open(fn, O_RDONLY, 0); - if (fd < 0) goto _return2; /* open file failed */ - - length = read_line(fd, line, LINE_BUFFER_SIZE); - pos = strncasestr(line, "[playlist]"); - if (pos == RT_NULL) - { - station_list_destroy(list); - list = RT_NULL; - goto _return2; - } - - length = read_line(fd, line, LINE_BUFFER_SIZE); - pos = strncasestr(line, "numberofentries="); - if (pos != RT_NULL) - { - list->count = (int)strtol(pos + strlen("numberofentries="), RT_NULL, 10); - if (list->count > 0) - { - list->items = (struct station_item*) rt_malloc (sizeof(struct station_item) * list->count); - rt_memset(list->items, 0, sizeof(struct station_item) * list->count); - } - } - else - { - station_list_destroy(list); - list = RT_NULL; - goto _return2; - } - - if (list->items == RT_NULL) - { - station_list_destroy(list); - list = RT_NULL; - goto _return2; - } - - index = 0; - while (index < list->count) - { - length = read_line(fd, line, LINE_BUFFER_SIZE); - if (length > 0) - { - rt_snprintf(prefix, sizeof(prefix), "File%d", index + 1); - pos = strncasestr(line, prefix); - if (pos != RT_NULL) - strncpy(list->items[index].url, pos + strlen(prefix) + 1, 128); - - rt_snprintf(prefix, sizeof(prefix), "Title%d", index + 1); - pos = strncasestr(line, prefix); - if (pos != RT_NULL) - { - strncpy(list->items[index].title, pos + strlen(prefix) + 1, 40); - index ++; - } - } - else break; - } - -_return2: - close(fd); -_return1: - rt_free(line); - -_return0: - return list; -} - -void station_list_destroy(struct station_list* list) -{ - /* release memory */ - rt_free(list->items); - rt_free(list); -} - -/* update station list file from network */ -void station_list_update(struct rtgui_workbench* workbench) -{ -} - -static void station_list_selected(void* parameter) -{ - rtgui_list_view_t *view; - - view = RTGUI_LIST_VIEW(parameter); - - if (view->current_item != 0) - rtgui_view_end_modal(RTGUI_VIEW(view), RTGUI_MODAL_OK); - else - rtgui_view_end_modal(RTGUI_VIEW(view), RTGUI_MODAL_CANCEL); -} - -/* select a station from list */ -struct station_item* station_list_select(struct station_list* list, struct rtgui_workbench* workbench) -{ - rt_size_t index; - rtgui_rect_t rect; - rtgui_list_view_t *view; - struct rtgui_list_item* items; - struct station_item* station; - char exit_str[] = "·µ»Ø.."; - - RT_ASSERT(list != RT_NULL); - RT_ASSERT(workbench != RT_NULL); - - station = RT_NULL; - - items = (struct rtgui_list_item*) rt_malloc (sizeof(struct rtgui_list_item) * (list->count + 1)); - if (items == RT_NULL) return RT_NULL; /* no memory */ - - /* create view */ - rtgui_widget_get_rect(RTGUI_WIDGET(workbench), &rect); - view = rtgui_list_view_create(items, list->count + 1, &rect); - - items[0].image = RT_NULL; - items[0].action = station_list_selected; - items[0].name = exit_str; - items[0].parameter = view; - - for (index = 1; index < list->count + 1; index ++) - { - items[index].image = RT_NULL; - items[index].action = station_list_selected; - items[index].name = list->items[index - 1].title; - items[index].parameter = view; - } - - /* add view to workbench */ - rtgui_workbench_add_view(workbench, RTGUI_VIEW(view)); - - /* show view as modal */ - if (rtgui_view_show(RTGUI_VIEW(view), RT_TRUE) == RTGUI_MODAL_OK) - { - station = &list->items[view->current_item - 1]; - } - - /* destroy view */ - rtgui_list_view_destroy(view); - /* release items */ - rt_free(items); - - return station; -} - diff --git a/bsp/stm32_radio/station_list.h b/bsp/stm32_radio/station_list.h deleted file mode 100644 index 6f7956ec84..0000000000 --- a/bsp/stm32_radio/station_list.h +++ /dev/null @@ -1,31 +0,0 @@ -#ifndef __STATION_LIST_H__ -#define __STATION_LIST_H__ - -#include -#include -#include -#include - -struct station_item -{ - char title[40]; - char url[128]; -}; - -struct station_list -{ - rt_uint32_t count; - struct station_item* items; -}; - -struct station_list* station_list_create(const char* fn); -void station_list_destroy(struct station_list* list); - -/* update station list file from network */ -void station_list_update(struct rtgui_workbench* workbench); - -/* select a station from list */ -struct station_item* station_list_select(struct station_list* list, struct rtgui_workbench* workbench); - -#endif - diff --git a/bsp/stm32_radio/stm32f10x_conf.h b/bsp/stm32_radio/stm32f10x_conf.h deleted file mode 100644 index 84733f44dc..0000000000 --- a/bsp/stm32_radio/stm32f10x_conf.h +++ /dev/null @@ -1,76 +0,0 @@ -/** - ****************************************************************************** - * @file Project/Template/stm32f10x_conf.h - * @author MCD Application Team - * @version V3.1.0 - * @date 06/19/2009 - * @brief Library configuration file. - ****************************************************************************** - * @copy - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2009 STMicroelectronics

- */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F10x_CONF_H -#define __STM32F10x_CONF_H - -/* Includes ------------------------------------------------------------------*/ -/* Uncomment the line below to enable peripheral header file inclusion */ -/* #include "stm32f10x_adc.h" */ -#include "stm32f10x_bkp.h" -/* #include "stm32f10x_can.h" */ -/* #include "stm32f10x_crc.h" */ -/* #include "stm32f10x_dac.h" */ -/* #include "stm32f10x_dbgmcu.h" */ -#include "stm32f10x_dma.h" -#include "stm32f10x_exti.h" -#include "stm32f10x_flash.h" -#include "stm32f10x_fsmc.h" -#include "stm32f10x_gpio.h" -/* #include "stm32f10x_i2c.h" */ -/* #include "stm32f10x_iwdg.h" */ -#include "stm32f10x_pwr.h" -#include "stm32f10x_rcc.h" -#include "stm32f10x_rtc.h" -#include "stm32f10x_sdio.h" -#include "stm32f10x_spi.h" -#include "stm32f10x_tim.h" -#include "stm32f10x_usart.h" -/* #include "stm32f10x_wwdg.h" */ -#include "misc.h" /* High level functions for NVIC and SysTick (add-on to CMSIS functions) */ - -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ -/* Uncomment the line below to expanse the "assert_param" macro in the - Standard Peripheral Library drivers code */ -/* #define USE_FULL_ASSERT 1 */ - -/* Exported macro ------------------------------------------------------------*/ -#ifdef USE_FULL_ASSERT - -/** - * @brief The assert_param macro is used for function's parameters check. - * @param expr: If expr is false, it calls assert_failed function - * which reports the name of the source file and the source - * line number of the call that failed. - * If expr is true, it returns no value. - * @retval None - */ -#define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__)) -/* Exported functions ------------------------------------------------------- */ -void assert_failed(uint8_t* file, uint32_t line); -#else -#define assert_param(expr) ((void)0) -#endif /* USE_FULL_ASSERT */ - -#endif /* __STM32F10x_CONF_H */ - -/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/stm32f10x_it.c b/bsp/stm32_radio/stm32f10x_it.c deleted file mode 100644 index 907fa8d4c5..0000000000 --- a/bsp/stm32_radio/stm32f10x_it.c +++ /dev/null @@ -1,668 +0,0 @@ -/******************** (C) COPYRIGHT 2008 STMicroelectronics ******************** -* File Name : stm32f10x_it.c -* Author : MCD Application Team -* Version : V1.1.2 -* Date : 09/22/2008 -* Description : Main Interrupt Service Routines. -* This file provides template for all exceptions handler -* and peripherals interrupt service routine. -******************************************************************************** -* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS -* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. -* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, -* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE -* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING -* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -/* Includes ------------------------------------------------------------------*/ -#include -#include -#include "board.h" - -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ -/* Private macro -------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/* Private function prototypes -----------------------------------------------*/ -/* Private functions ---------------------------------------------------------*/ - -extern void rt_hw_timer_handler(void); -extern void rt_hw_interrupt_thread_switch(void); - -/******************************************************************************* -* Function Name : NMIException -* Description : This function handles NMI exception. -* Input : None -* Output : None -* Return : None -*******************************************************************************/ -void NMIException(void) -{ -} - -/******************************************************************************* -* Function Name : HardFaultException -* Description : This function handles Hard Fault exception. -* Input : None -* Output : None -* Return : None -*******************************************************************************/ -void HardFaultException(void) -{ - /* Go to infinite loop when Hard Fault exception occurs */ - rt_kprintf("hard fault exception\n"); - while (1) - { - } -} - -/******************************************************************************* -* Function Name : MemManageException -* Description : This function handles Memory Manage exception. -* Input : None -* Output : None -* Return : None -*******************************************************************************/ -void MemManageException(void) -{ - /* Go to infinite loop when Memory Manage exception occurs */ - rt_kprintf("memory manage exception\n"); - while (1) - { - } -} - -/******************************************************************************* -* Function Name : BusFaultException -* Description : This function handles Bus Fault exception. -* Input : None -* Output : None -* Return : None -*******************************************************************************/ -void BusFaultException(void) -{ - /* Go to infinite loop when Bus Fault exception occurs */ - rt_kprintf("bus fault exception\n"); - while (1) - { - } -} - -/******************************************************************************* -* Function Name : UsageFaultException -* Description : This function handles Usage Fault exception. -* Input : None -* Output : None -* Return : None -*******************************************************************************/ -void UsageFaultException(void) -{ - /* Go to infinite loop when Usage Fault exception occurs */ - rt_kprintf("usage fault exception\n"); - while (1) - { - } -} - -/******************************************************************************* -* Function Name : DebugMonitor -* Description : This function handles Debug Monitor exception. -* Input : None -* Output : None -* Return : None -*******************************************************************************/ -void DebugMonitor(void) -{ -} - -/******************************************************************************* -* Function Name : SVCHandler -* Description : This function handles SVCall exception. -* Input : None -* Output : None -* Return : None -*******************************************************************************/ -void SVCHandler(void) -{ -} - -/******************************************************************************* -* Function Name : SysTickHandler -* Description : This function handles SysTick Handler. -* Input : None -* Output : None -* Return : None -*******************************************************************************/ -void SysTickHandler(void) -{ - /* handle os tick */ - rt_hw_timer_handler(); -} - -/******************************************************************************* -* Function Name : WWDG_IRQHandler -* Description : This function handles WWDG interrupt request. -* Input : None -* Output : None -* Return : None -*******************************************************************************/ -void WWDG_IRQHandler(void) -{ -} - -/******************************************************************************* -* Function Name : PVD_IRQHandler -* Description : This function handles PVD interrupt request. -* Input : None -* Output : None -* Return : None -*******************************************************************************/ -void PVD_IRQHandler(void) -{ -} - -/******************************************************************************* -* Function Name : TAMPER_IRQHandler -* Description : This function handles Tamper interrupt request. -* Input : None -* Output : None -* Return : None -*******************************************************************************/ -void TAMPER_IRQHandler(void) -{ -} - -/******************************************************************************* -* Function Name : RTC_IRQHandler -* Description : This function handles RTC global interrupt request. -* Input : None -* Output : None -* Return : None -*******************************************************************************/ -void RTC_IRQHandler(void) -{ - if (RTC_GetITStatus(RTC_IT_SEC) != RESET) - { - /* Clear the RTC Second interrupt */ - RTC_ClearITPendingBit(RTC_IT_SEC); - - /* Wait until last write operation on RTC registers has finished */ - RTC_WaitForLastTask(); - - /* Reset RTC Counter when Time is 23:59:59 */ - if (RTC_GetCounter() == 0x00015180) - { - RTC_SetCounter(0x0); - /* Wait until last write operation on RTC registers has finished */ - RTC_WaitForLastTask(); - } - } -} - -/******************************************************************************* -* Function Name : FLASH_IRQHandler -* Description : This function handles Flash interrupt request. -* Input : None -* Output : None -* Return : None -*******************************************************************************/ -void FLASH_IRQHandler(void) -{ -} - -/******************************************************************************* -* Function Name : RCC_IRQHandler -* Description : This function handles RCC interrupt request. -* Input : None -* Output : None -* Return : None -*******************************************************************************/ -void RCC_IRQHandler(void) -{ -} - -/******************************************************************************* -* Function Name : EXTI0_IRQHandler -* Description : This function handles External interrupt Line 0 request. -* Input : None -* Output : None -* Return : None -*******************************************************************************/ -void EXTI0_IRQHandler(void) -{ -} - -/******************************************************************************* -* Function Name : EXTI2_IRQHandler -* Description : This function handles External interrupt Line 2 request. -* Input : None -* Output : None -* Return : None -*******************************************************************************/ -void EXTI2_IRQHandler(void) -{ -} - -/******************************************************************************* -* Function Name : EXTI3_IRQHandler -* Description : This function handles External interrupt Line 3 request. -* Input : None -* Output : None -* Return : None -*******************************************************************************/ -void EXTI3_IRQHandler(void) -{ -} - -/******************************************************************************* -* Function Name : EXTI4_IRQHandler -* Description : This function handles External interrupt Line 4 request. -* Input : None -* Output : None -* Return : None -*******************************************************************************/ -void EXTI4_IRQHandler(void) -{ -#ifdef RT_USING_LWIP - extern void rt_dm9000_isr(void); - - /* enter interrupt */ - rt_interrupt_enter(); - - rt_dm9000_isr(); - - /* Clear the Key Button EXTI line pending bit */ - EXTI_ClearITPendingBit(EXTI_Line4); - - /* leave interrupt */ - rt_interrupt_leave(); - rt_hw_interrupt_thread_switch(); -#endif -} - -/******************************************************************************* -* Function Name : DMA1_Channel1_IRQHandler -* Description : This function handles DMA1 Channel 1 interrupt request. -* Input : None -* Output : None -* Return : None -*******************************************************************************/ -void DMA1_Channel1_IRQHandler(void) -{ -} - -/******************************************************************************* -* Function Name : DMA1_Channel2_IRQHandler -* Description : This function handles DMA1 Channel 2 interrupt request. -* Input : None -* Output : None -* Return : None -*******************************************************************************/ -void DMA1_Channel2_IRQHandler(void) -{ -#ifdef RT_USING_UART3 - extern struct rt_device uart3_device; - - /* enter interrupt */ - rt_interrupt_enter(); - - if (DMA_GetITStatus(DMA1_IT_TC2)) - { - /* transmission complete, invoke serial dma tx isr */ - rt_hw_serial_dma_tx_isr(&uart3_device); - } - - /* clear DMA flag */ - DMA_ClearFlag(DMA1_FLAG_TC2 | DMA1_FLAG_TE2); - - /* leave interrupt */ - rt_interrupt_leave(); - rt_hw_interrupt_thread_switch(); -#endif -} - -/******************************************************************************* -* Function Name : DMA1_Channel3_IRQHandler -* Description : This function handles DMA1 Channel 3 interrupt request. -* Input : None -* Output : None -* Return : None -*******************************************************************************/ -void DMA1_Channel3_IRQHandler(void) -{ -} - -/******************************************************************************* -* Function Name : DMA1_Channel4_IRQHandler -* Description : This function handles DMA1 Channel 4 interrupt request. -* Input : None -* Output : None -* Return : None -*******************************************************************************/ -void DMA1_Channel4_IRQHandler(void) -{ -} - -/******************************************************************************* -* Function Name : DMA1_Channel5_IRQHandler -* Description : This function handles DMA1 Channel 5 interrupt request. -* Input : None -* Output : None -* Return : None -*******************************************************************************/ -void DMA1_Channel5_IRQHandler(void) -{ -#if !CODEC_USE_SPI3 - extern void codec_dma_isr(void); - - /* enter interrupt */ - rt_interrupt_enter(); - - if (DMA_GetITStatus(DMA1_IT_TC5)) - { - /* clear DMA flag */ - DMA_ClearFlag(DMA1_FLAG_TC5 | DMA1_FLAG_TE5); - - // rt_kprintf("DMA\n"); - /* transmission complete, invoke serial dma tx isr */ - codec_dma_isr(); - } - - /* leave interrupt */ - rt_interrupt_leave(); -#endif -} - -/******************************************************************************* -* Function Name : DMA1_Channel6_IRQHandler -* Description : This function handles DMA1 Channel 6 interrupt request. -* Input : None -* Output : None -* Return : None -*******************************************************************************/ -void DMA1_Channel6_IRQHandler(void) -{ -#ifdef RT_USING_UART2 - extern struct rt_device uart2_device; - - /* enter interrupt */ - rt_interrupt_enter(); - - /* clear DMA flag */ - DMA_ClearFlag(DMA1_FLAG_TC6 | DMA1_FLAG_TE6); - rt_hw_serial_dma_rx_isr(&uart2_device); - - /* leave interrupt */ - rt_interrupt_leave(); - rt_hw_interrupt_thread_switch(); -#endif -} - -/******************************************************************************* -* Function Name : EXTI9_5_IRQHandler -* Description : This function handles External lines 9 to 5 interrupt request. -* Input : None -* Output : None -* Return : None -*******************************************************************************/ -void EXTI9_5_IRQHandler(void) -{ -#ifdef RT_USING_LWIP - extern void rt_dm9000_isr(void); - - /* enter interrupt */ - rt_interrupt_enter(); - - rt_dm9000_isr(); - - /* Clear the Key Button EXTI line pending bit */ - EXTI_ClearITPendingBit(EXTI_Line7); - - /* leave interrupt */ - rt_interrupt_leave(); - rt_hw_interrupt_thread_switch(); -#endif -} - -/******************************************************************************* -* Function Name : USART1_IRQHandler -* Description : This function handles USART1 global interrupt request. -* Input : None -* Output : None -* Return : None -*******************************************************************************/ -void USART1_IRQHandler(void) -{ -#ifdef RT_USING_UART1 - extern struct rt_device uart1_device; - /* enter interrupt */ - rt_interrupt_enter(); - - rt_hw_serial_isr(&uart1_device); - - /* leave interrupt */ - rt_interrupt_leave(); - rt_hw_interrupt_thread_switch(); -#endif -} - -/******************************************************************************* -* Function Name : USART2_IRQHandler -* Description : This function handles USART2 global interrupt request. -* Input : None -* Output : None -* Return : None -*******************************************************************************/ -void USART2_IRQHandler(void) -{ -#ifdef RT_USING_UART2 - extern struct rt_device uart2_device; - - /* enter interrupt */ - rt_interrupt_enter(); - - rt_hw_serial_isr(&uart2_device); - - /* leave interrupt */ - rt_interrupt_leave(); - rt_hw_interrupt_thread_switch(); -#endif -} - -/******************************************************************************* -* Function Name : USART3_IRQHandler -* Description : This function handles USART3 global interrupt request. -* Input : None -* Output : None -* Return : None -*******************************************************************************/ -void USART3_IRQHandler(void) -{ -#ifdef RT_USING_UART3 - extern struct rt_device uart3_device; - - /* enter interrupt */ - rt_interrupt_enter(); - - rt_hw_serial_isr(&uart3_device); - - /* leave interrupt */ - rt_interrupt_leave(); - rt_hw_interrupt_thread_switch(); -#endif -} - -/******************************************************************************* -* Function Name : EXTI15_10_IRQHandler -* Description : This function handles External lines 15 to 10 interrupt request. -* Input : None -* Output : None -* Return : None -*******************************************************************************/ -void EXTI15_10_IRQHandler(void) -{ -} - -/******************************************************************************* -* Function Name : RTCAlarm_IRQHandler -* Description : This function handles RTC Alarm interrupt request. -* Input : None -* Output : None -* Return : None -*******************************************************************************/ -void RTCAlarm_IRQHandler(void) -{ -} - -/******************************************************************************* -* Function Name : USBWakeUp_IRQHandler -* Description : This function handles USB WakeUp interrupt request. -* Input : None -* Output : None -* Return : None -*******************************************************************************/ -void USBWakeUp_IRQHandler(void) -{ -} - -/******************************************************************************* -* Function Name : TIM8_BRK_IRQHandler -* Description : This function handles TIM8 Break interrupt request. -* Input : None -* Output : None -* Return : None -*******************************************************************************/ -void TIM8_BRK_IRQHandler(void) -{ -} - -/******************************************************************************* -* Function Name : TIM8_UP_IRQHandler -* Description : This function handles TIM8 overflow and update interrupt -* request. -* Input : None -* Output : None -* Return : None -*******************************************************************************/ -void TIM8_UP_IRQHandler(void) -{ -} - -/******************************************************************************* -* Function Name : TIM8_TRG_COM_IRQHandler -* Description : This function handles TIM8 Trigger and commutation interrupts -* requests. -* Input : None -* Output : None -* Return : None -*******************************************************************************/ -void TIM8_TRG_COM_IRQHandler(void) -{ -} - -/******************************************************************************* -* Function Name : TIM8_CC_IRQHandler -* Description : This function handles TIM8 capture compare interrupt request. -* Input : None -* Output : None -* Return : None -*******************************************************************************/ -void TIM8_CC_IRQHandler(void) -{ -} - -/******************************************************************************* -* Function Name : ADC3_IRQHandler -* Description : This function handles ADC3 global interrupt request. -* Input : None -* Output : None -* Return : None -*******************************************************************************/ -void ADC3_IRQHandler(void) -{ -} - -/******************************************************************************* -* Function Name : FSMC_IRQHandler -* Description : This function handles FSMC global interrupt request. -* Input : None -* Output : None -* Return : None -*******************************************************************************/ -void FSMC_IRQHandler(void) -{ -} - -/******************************************************************************* -* Function Name : SDIO_IRQHandler -* Description : This function handles SDIO global interrupt request. -* Input : None -* Output : None -* Return : None -*******************************************************************************/ -void SDIO_IRQHandler(void) -{ -#ifdef RT_USING_DFS - extern int SD_ProcessIRQSrc(void); - - /* enter interrupt */ - rt_interrupt_enter(); - - /* Process All SDIO Interrupt Sources */ - SD_ProcessIRQSrc(); - - /* leave interrupt */ - rt_interrupt_leave(); - rt_hw_interrupt_thread_switch(); -#endif -} - -/******************************************************************************* -* Function Name : DMA2_Channel2_IRQHandler -* Description : This function handles DMA2 Channel 2 interrupt request. -* Input : None -* Output : None -* Return : None -*******************************************************************************/ -void DMA2_Channel2_IRQHandler(void) -{ -#if CODEC_USE_SPI3 - extern void codec_dma_isr(void); - - /* enter interrupt */ - rt_interrupt_enter(); - - if (DMA_GetITStatus(DMA2_IT_TC2)) - { - /* clear DMA flag */ - DMA_ClearFlag(DMA2_FLAG_TC2 | DMA2_FLAG_TE2); - - /* transmission complete, invoke serial dma tx isr */ - codec_dma_isr(); - } - - /* leave interrupt */ - rt_interrupt_leave(); -#endif -} - -/* add on 2009-12-31 for usb */ -extern void CTR_HP(void); -extern void USB_Istr(void); -void USB_HP_CAN1_TX_IRQHandler(void) -{ - CTR_HP(); -} - -void USB_LP_CAN1_RX0_IRQHandler(void) -{ - USB_Istr(); -} - -/* add on 2010-01-02 for remote */ -extern void remote_isr(void); -void TIM5_IRQHandler(void) -{ - remote_isr(); -} diff --git a/bsp/stm32_radio/stm32f10x_it.h b/bsp/stm32_radio/stm32f10x_it.h deleted file mode 100644 index bb7c9d06ae..0000000000 --- a/bsp/stm32_radio/stm32f10x_it.h +++ /dev/null @@ -1,110 +0,0 @@ -/******************** (C) COPYRIGHT 2008 STMicroelectronics ******************** -* File Name : stm32f10x_it.h -* Author : MCD Application Team -* Version : V2.0.3 -* Date : 09/22/2008 -* Description : This file contains the headers of the interrupt handlers. -******************************************************************************** -* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS -* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. -* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, -* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE -* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING -* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F10x_IT_H -#define __STM32F10x_IT_H - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x_lib.h" - -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ -/* Exported macro ------------------------------------------------------------*/ -/* Exported functions ------------------------------------------------------- */ - -void NMIException(void); -void HardFaultException(void); -void MemManageException(void); -void BusFaultException(void); -void UsageFaultException(void); -void DebugMonitor(void); -void SVCHandler(void); -void rt_hw_pend_sv(void); -void SysTickHandler(void); -void WWDG_IRQHandler(void); -void PVD_IRQHandler(void); -void TAMPER_IRQHandler(void); -void RTC_IRQHandler(void); -void FLASH_IRQHandler(void); -void RCC_IRQHandler(void); -void EXTI0_IRQHandler(void); -void EXTI1_IRQHandler(void); -void EXTI2_IRQHandler(void); -void EXTI3_IRQHandler(void); -void EXTI4_IRQHandler(void); -void DMA1_Channel1_IRQHandler(void); -void DMA1_Channel2_IRQHandler(void); -void DMA1_Channel3_IRQHandler(void); -void DMA1_Channel4_IRQHandler(void); -void DMA1_Channel5_IRQHandler(void); -void DMA1_Channel6_IRQHandler(void); -void DMA1_Channel7_IRQHandler(void); -void ADC1_2_IRQHandler(void); -void USB_HP_CAN1_TX_IRQHandler(void); -void USB_LP_CAN1_RX0_IRQHandler(void); -void CAN1_RX1_IRQHandler(void); -void CAN1_SCE_IRQHandler(void); -void EXTI9_5_IRQHandler(void); -void TIM1_BRK_IRQHandler(void); -void TIM1_UP_IRQHandler(void); -void TIM1_TRG_COM_IRQHandler(void); -void TIM1_CC_IRQHandler(void); -void TIM2_IRQHandler(void); -void TIM3_IRQHandler(void); -void TIM4_IRQHandler(void); -void I2C1_EV_IRQHandler(void); -void I2C1_ER_IRQHandler(void); -void I2C2_EV_IRQHandler(void); -void I2C2_ER_IRQHandler(void); -void SPI1_IRQHandler(void); -void SPI2_IRQHandler(void); -void USART1_IRQHandler(void); -void USART2_IRQHandler(void); -void USART3_IRQHandler(void); -void EXTI15_10_IRQHandler(void); -void RTCAlarm_IRQHandler(void); -void USBWakeUp_IRQHandler(void); -/****** HD ******/ -void TIM8_BRK_IRQHandler(void); -void TIM8_UP_IRQHandler(void); -void TIM8_TRG_COM_IRQHandler(void); -void TIM8_CC_IRQHandler(void); -void ADC3_IRQHandler(void); -void FSMC_IRQHandler(void); -void SDIO_IRQHandler(void); -void TIM5_IRQHandler(void); -void SPI3_IRQHandler(void); -void UART4_IRQHandler(void); -void UART5_IRQHandler(void); -void TIM6_IRQHandler(void); -void TIM7_IRQHandler(void); -void DMA2_Channel1_IRQHandler(void); -void DMA2_Channel2_IRQHandler(void); -void DMA2_Channel3_IRQHandler(void); -void DMA2_Channel4_5_IRQHandler(void); -/********* CL **********/ -void DMA2_Channel5_IRQHandler(void); -void ETH_IRQHandler(void); -void ETH_WKUP_IRQHandler(void); -void CAN2_TX_IRQHandler(void); -void CAN2_RX0_IRQHandler(void); -void CAN2_RX1_IRQHandler(void); -void CAN2_SCE_IRQHandler(void); -void OTG_FS_IRQHandler(void); - -#endif /* __STM32F10x_IT_H */ - -/******************* (C) COPYRIGHT 2008 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32_radio/stop.hdh b/bsp/stm32_radio/stop.hdh deleted file mode 100644 index 9271b7ec9a..0000000000 --- a/bsp/stm32_radio/stop.hdh +++ /dev/null @@ -1,107 +0,0 @@ -static const unsigned char stop_hdh[] = { - 0x48, 0x44, 0x43, 0x00, 0x1c, 0x00, 0x00, 0x00, 0x16, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xdb, 0x8d, 0xdb, 0x8d, - 0xdb, 0x8d, 0xdb, 0x8d, 0xdb, 0x8d, 0xdb, 0x8d, 0xdb, 0x8d, 0xdb, 0x8d, - 0xdb, 0x8d, 0xdb, 0x8d, 0xdb, 0x8d, 0xdb, 0x8d, 0xdb, 0x8d, 0xdb, 0x8d, - 0xdb, 0x8d, 0xdb, 0x8d, 0xdb, 0x8d, 0xdb, 0x8d, 0xdb, 0x8d, 0xdb, 0x8d, - 0xdb, 0x8d, 0xdb, 0x8d, 0xdb, 0x8d, 0xdb, 0x8d, 0xdb, 0x8d, 0xdb, 0x8d, - 0xdb, 0x8d, 0xdb, 0x8d, 0x9d, 0xae, 0xdf, 0xef, 0xbf, 0xe7, 0xbf, 0xe7, - 0xbf, 0xe7, 0xbf, 0xe7, 0xbf, 0xe7, 0xbf, 0xe7, 0xbf, 0xe7, 0xbf, 0xe7, - 0xbf, 0xe7, 0xbf, 0xe7, 0xbf, 0xe7, 0xbf, 0xe7, 0xbf, 0xe7, 0xbf, 0xe7, - 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-#include -#include - -static rtgui_image_t *background = RT_NULL; -static rt_bool_t view_event_handler(struct rtgui_widget* widget, struct rtgui_event* event) -{ - if (event->type == RTGUI_EVENT_PAINT) - { - struct rtgui_dc* dc; - struct rtgui_rect rect; - - dc = rtgui_dc_begin_drawing(widget); - if (dc == RT_NULL) return RT_FALSE; - rtgui_widget_get_rect(widget, &rect); - - rtgui_dc_fill_rect(dc, &rect); - - if (background != RT_NULL) - rtgui_image_blit(background, dc, &rect); - - rtgui_dc_draw_text(dc, "Radio Today", &rect); - - rtgui_dc_end_drawing(dc); - - return RT_FALSE; - } - - return rtgui_view_event_handler(widget, event); -} - -static void today_entry(void* parameter) -{ - rt_mq_t mq; - struct rtgui_view* view; - struct rtgui_workbench* workbench; - - mq = rt_mq_create("qToday", 256, 4, RT_IPC_FLAG_FIFO); - rtgui_thread_register(rt_thread_self(), mq); - - /* create background image */ - background = rtgui_image_create_from_file("png", - "/bg.png", RT_FALSE); - - workbench = rtgui_workbench_create("main", "workbench"); - if (workbench == RT_NULL) return; - - view = rtgui_view_create("Today"); - rtgui_widget_set_event_handler(RTGUI_WIDGET(view), view_event_handler); - - rtgui_workbench_add_view(workbench, view); - - rtgui_view_show(view); - - rtgui_workbench_event_loop(workbench); - - rtgui_thread_deregister(rt_thread_self()); - rt_mq_delete(mq); -} - -void today_init() -{ - rt_thread_t tid; - - tid = rt_thread_create("today", - today_entry, RT_NULL, - 2048, 25, 10); - - if (tid != RT_NULL) rt_thread_startup(tid); -} diff --git a/bsp/stm32_radio/touch.c b/bsp/stm32_radio/touch.c deleted file mode 100644 index 730b67f931..0000000000 --- a/bsp/stm32_radio/touch.c +++ /dev/null @@ -1,143 +0,0 @@ -#include "stm32f10x.h" -#include "rtthread.h" -#include "board.h" - -#if (LCD_VERSION == 2) -/* -MISO PA6 -MOSI PA7 -CLK PA5 -CS PC4 -*/ - -#define CS_0() GPIO_ResetBits(GPIOC,GPIO_Pin_4) -#define CS_1() GPIO_SetBits(GPIOC,GPIO_Pin_4) - -/* -7 6 - 4 3 2 1-0 -s A2-A0 MODE SER/DFR PD1-PD0 -*/ -#define TOUCH_MSR_Y 0x90 //¶ÁXÖá×ø±êÖ¸Áî addr:1 -#define TOUCH_MSR_X 0xD0 //¶ÁYÖá×ø±êÖ¸Áî addr:3 - - -extern unsigned char SPI_WriteByte(unsigned char data); - -//SPIдÊý¾Ý -static void WriteDataTo7843(unsigned char num) -{ - SPI_WriteByte(num); -} - -//´¥Ãþ´¦Àí -void Go_Touch(void) -{ - unsigned int X; - unsigned int Y; - - CS_0(); - WriteDataTo7843(TOUCH_MSR_X | 1); /* ·¢ËͶÁX×ø±êÃüÁî²¢¹Ø±ÕÖÐ¶Ï */ - X = SPI_WriteByte(0x00)<<4; /* ¶ÁÈ¡µÚÒ»×Ö½ÚMSB */ - X |= ((SPI_WriteByte(TOUCH_MSR_Y | 1)>>4)&0x0F );/* ¶ÁÈ¡µÚ¶þ×Ö½Ú Í¬Ê±·¢ËͶÁYÖá×ø±êÃüÁîÐÐ*/ - Y = SPI_WriteByte(0x00)<<4; /* ¶ÁÈ¡µÚÒ»×Ö½ÚMSB */ - Y |= ((SPI_WriteByte(1<<7)>>4)&0x0F ); /* ¶ÁÈ¡µÚ¶þ×Ö½Ú²¢ÖØдò¿ªÖÐ¶Ï */ - CS_1(); - - rt_kprintf("\r\nX: %04d Y: %04d",X,Y); -} - -static void NVIC_Configuration(void) -{ - NVIC_InitTypeDef NVIC_InitStructure; - - /* Enable the EXTI0 Interrupt */ - NVIC_InitStructure.NVIC_IRQChannel = EXTI1_IRQn; - NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1; - NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; - NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; - NVIC_Init(&NVIC_InitStructure); -} - -static void exti_int_config(void) -{ - EXTI_InitTypeDef EXTI_InitStructure; - - /* PB1 touch INT */ - { - GPIO_InitTypeDef GPIO_InitStructure; - RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB,ENABLE); - - GPIO_InitStructure.GPIO_Pin = GPIO_Pin_1; - GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IPU; - GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz; - GPIO_Init(GPIOB,&GPIO_InitStructure); - } - - GPIO_EXTILineConfig(GPIO_PortSourceGPIOB, GPIO_PinSource1); - - /* Configure EXTI */ - EXTI_InitStructure.EXTI_Line = EXTI_Line1; - EXTI_InitStructure.EXTI_Mode = EXTI_Mode_Interrupt; - EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Falling;//FallingϽµÑØ RisingÉÏÉý - EXTI_InitStructure.EXTI_LineCmd = ENABLE; - EXTI_Init(&EXTI_InitStructure); - - EXTI_ClearITPendingBit(EXTI_Line1); -} - -#include -void touch_test(void) -{ - SPI_InitTypeDef SPI_InitStructure; - - rt_kprintf("\r\ntouch testing....\r\n"); - - RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO,ENABLE); - - /* Enable SPI_MASTER */ - SPI_Cmd(SPI1, DISABLE); - - /*------------------------ SPI1 configuration ------------------------*/ - SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex;//SPI_Direction_1Line_Tx; - SPI_InitStructure.SPI_Mode = SPI_Mode_Master; - SPI_InitStructure.SPI_DataSize = SPI_DataSize_8b; - SPI_InitStructure.SPI_CPOL = SPI_CPOL_Low; - SPI_InitStructure.SPI_CPHA = SPI_CPHA_1Edge; - SPI_InitStructure.SPI_NSS = SPI_NSS_Soft; - SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_64;/* 72M/64=1.125M */ - SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB; - SPI_InitStructure.SPI_CRCPolynomial = 7; - - SPI_I2S_DeInit(SPI1); - SPI_Init(SPI1, &SPI_InitStructure); - - /* Enable SPI_MASTER */ - SPI_Cmd(SPI1, ENABLE); - - NVIC_Configuration(); - exti_int_config(); - - /* PC4 touch CS */ - { - GPIO_InitTypeDef GPIO_InitStructure; - - RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOC,ENABLE); - - GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP; - GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; - GPIO_InitStructure.GPIO_Pin = GPIO_Pin_4; - GPIO_Init(GPIOC,&GPIO_InitStructure); - CS_1(); - } - CS_0(); - WriteDataTo7843( 1<<7 ); /* ´ò¿ªÖÐ¶Ï */ - CS_1(); -} -FINSH_FUNCTION_EXPORT(touch_test, touch_test) - -void EXTI1_IRQHandler(void) -{ - EXTI_ClearITPendingBit(EXTI_Line1); - Go_Touch(); -} -#endif diff --git a/bsp/stm32_radio/usart.c b/bsp/stm32_radio/usart.c deleted file mode 100644 index bc05e93c77..0000000000 --- a/bsp/stm32_radio/usart.c +++ /dev/null @@ -1,340 +0,0 @@ -/* - * File : usart.c - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2009, RT-Thread Development Team - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rt-thread.org/license/LICENSE - * - * Change Logs: - * Date Author Notes - * 2009-01-05 Bernard the first version - * 2010-03-29 Bernard remove interrupt Tx and DMA Rx mode - */ - -#include "usart.h" -#include -#include - -/* - * Use UART1 as console output and finsh input - * interrupt Rx and poll Tx (stream mode) - * - * Use UART2 with interrupt Rx and poll Tx - * Use UART3 with DMA Tx and interrupt Rx -- DMA channel 2 - * - * USART DMA setting on STM32 - * USART1 Tx --> DMA Channel 4 - * USART1 Rx --> DMA Channel 5 - * USART2 Tx --> DMA Channel 7 - * USART2 Rx --> DMA Channel 6 - * USART3 Tx --> DMA Channel 2 - * USART3 Rx --> DMA Channel 3 - */ - -#ifdef RT_USING_UART1 -struct stm32_serial_int_rx uart1_int_rx; -struct stm32_serial_device uart1 = -{ - USART1, - &uart1_int_rx, - RT_NULL -}; -struct rt_device uart1_device; -#endif - -#ifdef RT_USING_UART2 -struct stm32_serial_int_rx uart2_int_rx; -struct stm32_serial_device uart2 = -{ - USART2, - &uart2_int_rx, - RT_NULL -}; -struct rt_device uart2_device; -#endif - -#ifdef RT_USING_UART3 -struct stm32_serial_int_rx uart3_int_rx; -struct stm32_serial_dma_tx uart3_dma_tx; -struct stm32_serial_device uart3 = -{ - USART3, - &uart3_int_rx, - &uart3_dma_tx -}; -struct rt_device uart3_device; -#endif - -#define USART1_DR_Base 0x40013804 -#define USART2_DR_Base 0x40004404 -#define USART3_DR_Base 0x40004804 - -/* USART1_REMAP = 0 */ -#define UART1_GPIO_TX GPIO_Pin_9 -#define UART1_GPIO_RX GPIO_Pin_10 -#define UART1_GPIO GPIOA -#define RCC_APBPeriph_UART1 RCC_APB2Periph_USART1 -#define UART1_TX_DMA DMA1_Channel4 -#define UART1_RX_DMA DMA1_Channel5 - -#if defined(STM32F10X_LD) || defined(STM32F10X_MD) || defined(STM32F10X_CL) -#define UART2_GPIO_TX GPIO_Pin_5 -#define UART2_GPIO_RX GPIO_Pin_6 -#define UART2_GPIO GPIOD -#define RCC_APBPeriph_UART2 RCC_APB1Periph_USART2 -#else /* for STM32F10X_HD */ -/* USART2_REMAP = 0 */ -#define UART2_GPIO_TX GPIO_Pin_2 -#define UART2_GPIO_RX GPIO_Pin_3 -#define UART2_GPIO GPIOA -#define RCC_APBPeriph_UART2 RCC_APB1Periph_USART2 -#define UART2_TX_DMA DMA1_Channel7 -#define UART2_RX_DMA DMA1_Channel6 -#endif - -/* USART3_REMAP[1:0] = 00 */ -#define UART3_GPIO_RX GPIO_Pin_11 -#define UART3_GPIO_TX GPIO_Pin_10 -#define UART3_GPIO GPIOB -#define RCC_APBPeriph_UART3 RCC_APB1Periph_USART3 -#define UART3_TX_DMA DMA1_Channel2 -#define UART3_RX_DMA DMA1_Channel3 - -static void RCC_Configuration(void) -{ - RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO, ENABLE); - -#ifdef RT_USING_UART1 - /* Enable USART1 and GPIOA clocks */ - RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1 | RCC_APB2Periph_GPIOA, ENABLE); -#endif - -#ifdef RT_USING_UART2 - -#if (defined(STM32F10X_LD) || defined(STM32F10X_MD) || defined(STM32F10X_CL)) - /* Enable AFIO and GPIOD clock */ - RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO | RCC_APB2Periph_GPIOD, ENABLE); - - /* Enable the USART2 Pins Software Remapping */ - GPIO_PinRemapConfig(GPIO_Remap_USART2, ENABLE); -#else - /* Enable AFIO and GPIOA clock */ - RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO | RCC_APB2Periph_GPIOA, ENABLE); -#endif - - /* Enable USART2 clock */ - RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2, ENABLE); -#endif - -#ifdef RT_USING_UART3 - RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB, ENABLE); - /* Enable USART3 clock */ - RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART3, ENABLE); - - /* DMA clock enable */ - RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE); -#endif -} - -static void GPIO_Configuration(void) -{ - GPIO_InitTypeDef GPIO_InitStructure; - -#ifdef RT_USING_UART1 - /* Configure USART1 Rx (PA.10) as input floating */ - GPIO_InitStructure.GPIO_Pin = UART1_GPIO_RX; - GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; - GPIO_Init(UART1_GPIO, &GPIO_InitStructure); - - /* Configure USART1 Tx (PA.09) as alternate function push-pull */ - GPIO_InitStructure.GPIO_Pin = UART1_GPIO_TX; - GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; - GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; - GPIO_Init(UART1_GPIO, &GPIO_InitStructure); -#endif - -#ifdef RT_USING_UART2 - /* Configure USART2 Rx as input floating */ - GPIO_InitStructure.GPIO_Pin = UART2_GPIO_RX; - GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; - GPIO_Init(UART2_GPIO, &GPIO_InitStructure); - - /* Configure USART2 Tx as alternate function push-pull */ - GPIO_InitStructure.GPIO_Pin = UART2_GPIO_TX; - GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; - GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; - GPIO_Init(UART2_GPIO, &GPIO_InitStructure); -#endif - -#ifdef RT_USING_UART3 - /* Configure USART3 Rx as input floating */ - GPIO_InitStructure.GPIO_Pin = UART3_GPIO_RX; - GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; - GPIO_Init(UART3_GPIO, &GPIO_InitStructure); - - /* Configure USART3 Tx as alternate function push-pull */ - GPIO_InitStructure.GPIO_Pin = UART3_GPIO_TX; - GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; - GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; - GPIO_Init(UART3_GPIO, &GPIO_InitStructure); -#endif -} - -static void NVIC_Configuration(void) -{ - NVIC_InitTypeDef NVIC_InitStructure; - - /* Configure the NVIC Preemption Priority Bits */ - NVIC_PriorityGroupConfig(NVIC_PriorityGroup_0); - -#ifdef RT_USING_UART1 - /* Enable the USART1 Interrupt */ - NVIC_InitStructure.NVIC_IRQChannel = USART1_IRQn; - NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; - NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; - NVIC_Init(&NVIC_InitStructure); -#endif - -#ifdef RT_USING_UART2 - /* Enable the USART2 Interrupt */ - NVIC_InitStructure.NVIC_IRQChannel = USART2_IRQn; - NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1; - NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; - NVIC_Init(&NVIC_InitStructure); -#endif - -#ifdef RT_USING_UART3 - /* Enable the USART3 Interrupt */ - NVIC_InitStructure.NVIC_IRQChannel = USART3_IRQn; - NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1; - NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; - NVIC_Init(&NVIC_InitStructure); - - /* Enable the DMA1 Channel2 Interrupt */ - NVIC_InitStructure.NVIC_IRQChannel = DMA1_Channel2_IRQn; - NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1; - NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; - NVIC_Init(&NVIC_InitStructure); -#endif -} - -static void DMA_Configuration(void) -{ -#if defined (RT_USING_UART3) - DMA_InitTypeDef DMA_InitStructure; - - /* fill init structure */ - DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable; - DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable; - DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte; - DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte; - DMA_InitStructure.DMA_Mode = DMA_Mode_Normal; - DMA_InitStructure.DMA_Priority = DMA_Priority_VeryHigh; - DMA_InitStructure.DMA_M2M = DMA_M2M_Disable; - - /* DMA1 Channel5 (triggered by USART3 Tx event) Config */ - DMA_DeInit(UART3_TX_DMA); - DMA_InitStructure.DMA_PeripheralBaseAddr = USART3_DR_Base; - DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST; - DMA_InitStructure.DMA_MemoryBaseAddr = (u32)0; - DMA_InitStructure.DMA_BufferSize = 0; - DMA_Init(UART3_TX_DMA, &DMA_InitStructure); - DMA_ITConfig(UART3_TX_DMA, DMA_IT_TC | DMA_IT_TE, ENABLE); - DMA_ClearFlag(DMA1_FLAG_TC5); -#endif -} - -/* - * Init all related hardware in here - * rt_hw_serial_init() will register all supported USART device - */ -void rt_hw_usart_init() -{ - USART_InitTypeDef USART_InitStructure; - USART_ClockInitTypeDef USART_ClockInitStructure; - - RCC_Configuration(); - - GPIO_Configuration(); - - NVIC_Configuration(); - - DMA_Configuration(); - - /* uart init */ -#ifdef RT_USING_UART1 - USART_InitStructure.USART_BaudRate = 115200; - USART_InitStructure.USART_WordLength = USART_WordLength_8b; - USART_InitStructure.USART_StopBits = USART_StopBits_1; - USART_InitStructure.USART_Parity = USART_Parity_No; - USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None; - USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx; - USART_ClockInitStructure.USART_Clock = USART_Clock_Disable; - USART_ClockInitStructure.USART_CPOL = USART_CPOL_Low; - USART_ClockInitStructure.USART_CPHA = USART_CPHA_2Edge; - USART_ClockInitStructure.USART_LastBit = USART_LastBit_Disable; - USART_Init(USART1, &USART_InitStructure); - USART_ClockInit(USART1, &USART_ClockInitStructure); - - /* register uart1 */ - rt_hw_serial_register(&uart1_device, "uart1", - RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM, - &uart1); - - /* enable interrupt */ - USART_ITConfig(USART1, USART_IT_RXNE, ENABLE); -#endif - -#ifdef RT_USING_UART2 - USART_InitStructure.USART_BaudRate = 115200; - USART_InitStructure.USART_WordLength = USART_WordLength_8b; - USART_InitStructure.USART_StopBits = USART_StopBits_1; - USART_InitStructure.USART_Parity = USART_Parity_No; - USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None; - USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx; - USART_ClockInitStructure.USART_Clock = USART_Clock_Disable; - USART_ClockInitStructure.USART_CPOL = USART_CPOL_Low; - USART_ClockInitStructure.USART_CPHA = USART_CPHA_2Edge; - USART_ClockInitStructure.USART_LastBit = USART_LastBit_Disable; - USART_Init(USART2, &USART_InitStructure); - USART_ClockInit(USART2, &USART_ClockInitStructure); - - /* register uart2 */ - rt_hw_serial_register(&uart2_device, "uart2", - RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM, - &uart2); - - /* Enable USART2 DMA Rx request */ - USART_ITConfig(USART2, USART_IT_RXNE, ENABLE); -#endif - -#ifdef RT_USING_UART3 - USART_InitStructure.USART_BaudRate = 115200; - USART_InitStructure.USART_WordLength = USART_WordLength_8b; - USART_InitStructure.USART_StopBits = USART_StopBits_1; - USART_InitStructure.USART_Parity = USART_Parity_No; - USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None; - USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx; - USART_ClockInitStructure.USART_Clock = USART_Clock_Disable; - USART_ClockInitStructure.USART_CPOL = USART_CPOL_Low; - USART_ClockInitStructure.USART_CPHA = USART_CPHA_2Edge; - USART_ClockInitStructure.USART_LastBit = USART_LastBit_Disable; - USART_Init(USART3, &USART_InitStructure); - USART_ClockInit(USART3, &USART_ClockInitStructure); - - uart3_dma_tx.dma_channel= UART3_TX_DMA; - - /* register uart3 */ - rt_hw_serial_register(&uart3_device, "uart3", - RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_DMA_TX, - &uart3); - - /* Enable USART3 DMA Tx request */ - USART_DMACmd(USART3, USART_DMAReq_Tx , ENABLE); - - /* enable interrupt */ - USART_ITConfig(USART3, USART_IT_RXNE, ENABLE); -#endif -} diff --git a/bsp/stm32_radio/usart.h b/bsp/stm32_radio/usart.h deleted file mode 100644 index 36c5f19b1e..0000000000 --- a/bsp/stm32_radio/usart.h +++ /dev/null @@ -1,23 +0,0 @@ -/* - * File : usart.h - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2009, RT-Thread Development Team - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rt-thread.org/license/LICENSE - * - * Change Logs: - * Date Author Notes - * 2009-01-05 Bernard the first version - */ - -#ifndef __USART_H__ -#define __USART_H__ - -#include -#include - -void rt_hw_usart_init(void); - -#endif diff --git a/bsp/stm32_radio/wav.c b/bsp/stm32_radio/wav.c deleted file mode 100644 index 18105834e1..0000000000 --- a/bsp/stm32_radio/wav.c +++ /dev/null @@ -1,48 +0,0 @@ -#include -#include -#include "netbuffer.h" -#include "stm32f10x.h" - -static rt_err_t wav_tx_done(rt_device_t dev, void *buffer) -{ - /* release memory block */ - sbuf_release(buffer); - - return RT_EOK; -} - -void wav(char* filename) -{ - int fd; - rt_size_t block_size; - - block_size = sbuf_get_size(); - block_size = (block_size / 512) * 512; - - fd = open(filename, O_RDONLY, 0); - if (fd >= 0) - { - rt_uint8_t* buf; - rt_size_t len; - rt_device_t device; - - /* open audio device and set tx done call back */ - device = rt_device_find("snd"); - rt_device_set_tx_complete(device, wav_tx_done); - rt_device_open(device, RT_DEVICE_OFLAG_WRONLY); - - do - { - buf = sbuf_alloc(); - len = read(fd, (char*)buf, block_size); - if (len > 0) rt_device_write(device, 0, buf, len); - else sbuf_release(buf); - } while (len != 0); - - /* close device and file */ - rt_device_close(device); - close(fd); - } -} -FINSH_FUNCTION_EXPORT(wav, wav test) - diff --git a/bsp/stm32_radio/wma.c b/bsp/stm32_radio/wma.c deleted file mode 100644 index cbed5ff89c..0000000000 --- a/bsp/stm32_radio/wma.c +++ /dev/null @@ -1,1049 +0,0 @@ -#include -#include - -#include "libwma/asf.h" -#include "libwma/wmadec.h" - -int packet_count=0; - -/* The output buffer containing the decoded samples (channels 0 and 1) - BLOCK_MAX_SIZE is 2048 (samples) and MAX_CHANNELS is 2. - */ - -static rt_uint32_t decoded[BLOCK_MAX_SIZE * MAX_CHANNELS]; - -/* NOTE: WMADecodeContext is 120152 bytes (on x86) */ -static WMADecodeContext wmadec; - -enum asf_error_e { - ASF_ERROR_INTERNAL = -1, /* incorrect input to API calls */ - ASF_ERROR_OUTOFMEM = -2, /* some malloc inside program failed */ - ASF_ERROR_EOF = -3, /* unexpected end of file */ - ASF_ERROR_IO = -4, /* error reading or writing to file */ - ASF_ERROR_INVALID_LENGTH = -5, /* length value conflict in input data */ - ASF_ERROR_INVALID_VALUE = -6, /* other value conflict in input data */ - ASF_ERROR_INVALID_OBJECT = -7, /* ASF object missing or in wrong place */ - ASF_ERROR_OBJECT_SIZE = -8, /* invalid ASF object size (too small) */ - ASF_ERROR_SEEKABLE = -9, /* file not seekable */ - ASF_ERROR_SEEK = -10, /* file is seekable but seeking failed */ - ASF_ERROR_ENCRYPTED = -11 /* file is encrypted */ -}; - -// #define DEBUGF rt_kprintf - -#ifndef MIN -#define MIN(a,b) ((a) < (b) ? (a) : (b)) -#endif - -/* always little endian */ -#define read_uint16le(stream,buf) stream_buffer_read((stream), (rt_uint8_t*)(buf), 2) -#define read_uint32le(stream,buf) stream_buffer_read((stream), (rt_uint8_t*)(buf), 4) -#define read_uint64le(stream,buf) stream_buffer_read((stream), (rt_uint8_t*)(buf), 8) - -#define ID3V2_BUF_SIZE 300 - -struct id3_tag -{ - char* title; - char* artist; - char* album; - char* year_string; - char* comment; - char* genre_string; - char* track_string; - char* albumartist; - char* composer; - - /* Musicbrainz Track ID */ - char* mb_track_id; - - int year; - int tracknum; - - rt_uint32_t bitrate; /* bit rate */ - rt_uint32_t frequency; /* sample frequency */ - rt_uint32_t length; /* length */ - - rt_size_t first_frame_offset; /* Byte offset to first real MP3 frame. - Used for skipping leading garbage to - avoid gaps between tracks. */ - - rt_uint32_t frame_count; /* number of frames in the file (if VBR) */ - rt_size_t offset; /* bytes played */ - - /* these following two fields are used for local buffering */ - char id3v2buf[ID3V2_BUF_SIZE]; - char id3v1buf[4][92]; - - rt_uint32_t user_data; /* user data */ -}; - -/* TODO: Just read the GUIDs into a 16-byte array, and use memcmp to compare */ -struct guid_s { - rt_uint32_t v1; - rt_uint16_t v2; - rt_uint16_t v3; - rt_uint8_t v4[8]; -}; -typedef struct guid_s guid_t; -typedef long long rt_uint64_t; - -struct asf_object_s { - guid_t guid; - rt_uint64_t size; - rt_uint64_t datalen; -}; -typedef struct asf_object_s asf_object_t; - -static const guid_t asf_guid_null = -{0x00000000, 0x0000, 0x0000, {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}}; - -/* top level object guids */ - -static const guid_t asf_guid_header = -{0x75B22630, 0x668E, 0x11CF, {0xA6, 0xD9, 0x00, 0xAA, 0x00, 0x62, 0xCE, 0x6C}}; - -static const guid_t asf_guid_data = -{0x75B22636, 0x668E, 0x11CF, {0xA6, 0xD9, 0x00, 0xAA, 0x00, 0x62, 0xCE, 0x6C}}; - -static const guid_t asf_guid_index = -{0x33000890, 0xE5B1, 0x11CF, {0x89, 0xF4, 0x00, 0xA0, 0xC9, 0x03, 0x49, 0xCB}}; - -/* header level object guids */ - -static const guid_t asf_guid_file_properties = -{0x8cabdca1, 0xa947, 0x11cf, {0x8E, 0xe4, 0x00, 0xC0, 0x0C, 0x20, 0x53, 0x65}}; - -static const guid_t asf_guid_stream_properties = -{0xB7DC0791, 0xA9B7, 0x11CF, {0x8E, 0xE6, 0x00, 0xC0, 0x0C, 0x20, 0x53, 0x65}}; - -static const guid_t asf_guid_content_description = -{0x75B22633, 0x668E, 0x11CF, {0xA6, 0xD9, 0x00, 0xAA, 0x00, 0x62, 0xCE, 0x6C}}; - -static const guid_t asf_guid_extended_content_description = -{0xD2D0A440, 0xE307, 0x11D2, {0x97, 0xF0, 0x00, 0xA0, 0xC9, 0x5E, 0xA8, 0x50}}; - -static const guid_t asf_guid_content_encryption = -{0x2211b3fb, 0xbd23, 0x11d2, {0xb4, 0xb7, 0x00, 0xa0, 0xc9, 0x55, 0xfc, 0x6e}}; - -static const guid_t asf_guid_extended_content_encryption = -{0x298ae614, 0x2622, 0x4c17, {0xb9, 0x35, 0xda, 0xe0, 0x7e, 0xe9, 0x28, 0x9c}}; - -/* stream type guids */ - -static const guid_t asf_guid_stream_type_audio = -{0xF8699E40, 0x5B4D, 0x11CF, {0xA8, 0xFD, 0x00, 0x80, 0x5F, 0x5C, 0x44, 0x2B}}; - -#define STREAM_BUFFER_SIZE 1024 -struct stream_buffer -{ - rt_uint32_t length; - rt_uint32_t position; /* current position in the buffer */ - - rt_uint8_t *buffer; - rt_size_t buffer_size; - - /* file descriptor of this stream buffer */ - int fd; - rt_bool_t eof; -}; - -struct stream_buffer* stream; -struct id3_tag _id3; -struct id3_tag* id3; - -rt_size_t stream_buffer_read(struct stream_buffer* stream, rt_uint8_t* ptr, rt_size_t len) -{ - rt_size_t rest_bytes; - - if (stream->position + len > stream->length) - { - rest_bytes = stream->length - stream->position; - memcpy(ptr, &stream->buffer[stream->position], rest_bytes); - ptr += rest_bytes; - - /* read more buffer */ - stream->length = read(stream->fd, &stream->buffer[0], stream->buffer_size); - - if (stream->length < len - rest_bytes) - { - stream->position = stream->length; - stream->eof = RT_TRUE; - } - else - stream->position = len - rest_bytes; - - memcpy(ptr, &stream->buffer[0], stream->position); - return rest_bytes + stream->position; - } - - memcpy(ptr, &stream->buffer[stream->position], len); - stream->position += len; - - return len; -} - -void stream_buffer_advance(struct stream_buffer* stream, rt_size_t size) -{ - if (stream->position + size < stream->length) - { - stream->position += size; - return; - } - - stream->position = size - (stream->length - stream->position); - stream->length = read(stream->fd, stream->buffer, stream->buffer_size); - if (stream->length < stream->position) stream->eof = RT_TRUE; -}; - -rt_uint8_t *stream_buffer_request(struct stream_buffer* stream, rt_size_t *r_size, rt_size_t size) -{ - rt_size_t rest_bytes, read_bytes, read_result; - - if (size > stream->buffer_size) return RT_NULL; /* request size more than the buffer size */ - - if (stream->position + size < stream->length) - { - *r_size = size; - return &stream->buffer[stream->position]; - } - - /* read more data */ - rest_bytes = stream->length - stream->position; - memmove(&stream->buffer[0], &stream->buffer[stream->position], rest_bytes); - - read_bytes = stream->buffer_size - rest_bytes; - read_bytes = (read_bytes / 512) * 512; /* align to 512 */ - - read_result = read(stream->fd, &stream->buffer[rest_bytes], read_bytes); - stream->position = 0; - stream->length = read_result + rest_bytes; - *r_size = size; - - return &stream->buffer[0]; -} - -struct stream_buffer* stream_buffer_create(int fd) -{ - struct stream_buffer* buffer = (struct stream_buffer*) rt_malloc(sizeof(struct stream_buffer)); - if (buffer != RT_NULL) - { - buffer->fd = fd; - buffer->eof = RT_FALSE; - - buffer->length = 0; - buffer->position = 0; - - buffer->buffer_size = STREAM_BUFFER_SIZE; - buffer->buffer = rt_malloc(buffer->buffer_size); - } - - return buffer; -} - -void stream_buffer_close(struct stream_buffer* stream) -{ - rt_free(stream->buffer); - close(stream->fd); -} - -static int asf_guid_match(const guid_t *guid1, const guid_t *guid2) -{ - if((guid1->v1 != guid2->v1) || - (guid1->v2 != guid2->v2) || - (guid1->v3 != guid2->v3) || - (rt_memcmp(guid1->v4, guid2->v4, 8))) - { - return 0; - } - - return 1; -} - -/* Read the 16 byte GUID from a file */ -static void asf_readGUID(struct stream_buffer* stream, guid_t* guid) -{ - read_uint32le(stream, &guid->v1); - read_uint16le(stream, &guid->v2); - read_uint16le(stream, &guid->v3); - stream_buffer_read(stream, guid->v4, 8); -} - -static void asf_read_object_header(asf_object_t *obj, struct stream_buffer* stream) -{ - asf_readGUID(stream, &obj->guid); - read_uint64le(stream, &obj->size); - obj->datalen = 0; -} - -/* Parse an integer from the extended content object - we always - convert to an int, regardless of native format. -*/ -static int asf_intdecode(struct stream_buffer* stream, int type, int length) -{ - rt_uint16_t tmp16; - rt_uint32_t tmp32; - rt_uint64_t tmp64; - - if (type==3) { - read_uint32le(stream, &tmp32); - stream_buffer_advance(stream,length - 4); - return (int)tmp32; - } else if (type==4) { - read_uint64le(stream, &tmp64); - stream_buffer_advance(stream,length - 8); - return (int)tmp64; - } else if (type == 5) { - read_uint16le(stream, &tmp16); - stream_buffer_advance(stream,length - 2); - return (int)tmp16; - } - - return 0; -} - -#define MASK 0xC0 /* 11000000 */ -#define COMP 0x80 /* 10x */ -static const unsigned char utf8comp[6] = -{ - 0x00, 0xC0, 0xE0, 0xF0, 0xF8, 0xFC -}; -/* Encode a UCS value as UTF-8 and return a pointer after this UTF-8 char. */ -unsigned char* utf8encode(unsigned long ucs, unsigned char *utf8) -{ - int tail = 0; - - if (ucs > 0x7F) - while (ucs >> (5*tail + 6)) - tail++; - - *utf8++ = (ucs >> (6*tail)) | utf8comp[tail]; - while (tail--) - *utf8++ = ((ucs >> (6*tail)) & (MASK ^ 0xFF)) | COMP; - - return utf8; -} - -/* Decode a LE utf16 string from a disk buffer into a fixed-sized - utf8 buffer. -*/ -static void asf_utf16LEdecode(struct stream_buffer* stream, - rt_uint16_t utf16bytes, - unsigned char **utf8, - int* utf8bytes) -{ - unsigned long ucs; - int n; - unsigned char utf16buf[256]; - unsigned char* utf16 = utf16buf; - unsigned char* newutf8; - - n = stream_buffer_read(stream, utf16buf, MIN(sizeof(utf16buf), utf16bytes)); - utf16bytes -= n; - - while (n > 0) { - /* Check for a surrogate pair */ - if (utf16[1] >= 0xD8 && utf16[1] < 0xE0) { - if (n < 4) { - /* Run out of utf16 bytes, read some more */ - utf16buf[0] = utf16[0]; - utf16buf[1] = utf16[1]; - - n = stream_buffer_read(stream, utf16buf + 2, MIN(sizeof(utf16buf)-2, utf16bytes)); - utf16 = utf16buf; - utf16bytes -= n; - n += 2; - } - - if (n < 4) { - /* Truncated utf16 string, abort */ - break; - } - ucs = 0x10000 + ((utf16[0] << 10) | ((utf16[1] - 0xD8) << 18) - | utf16[2] | ((utf16[3] - 0xDC) << 8)); - utf16 += 4; - n -= 4; - } else { - ucs = (utf16[0] | (utf16[1] << 8)); - utf16 += 2; - n -= 2; - } - - if (*utf8bytes > 6) { - newutf8 = utf8encode(ucs, *utf8); - *utf8bytes -= (newutf8 - *utf8); - *utf8 += (newutf8 - *utf8); - } - - /* We have run out of utf16 bytes, read more if available */ - if ((n == 0) && (utf16bytes > 0)) { - n = stream_buffer_read(stream, utf16buf, MIN(sizeof(utf16buf), utf16bytes)); - utf16 = utf16buf; - utf16bytes -= n; - } - } - - *utf8[0] = 0; - --*utf8bytes; - - if (utf16bytes > 0) { - /* Skip any remaining bytes */ - stream_buffer_advance(stream, utf16bytes); - } - return; -} - -static int asf_parse_header(struct stream_buffer* stream, struct id3_tag* id3, - asf_waveformatex_t* wfx) -{ - asf_object_t current; - asf_object_t header; - rt_uint64_t datalen; - int i; - int fileprop = 0; - rt_uint64_t play_duration; - rt_uint16_t flags; - rt_uint32_t subobjects; - rt_uint8_t utf8buf[512]; - int id3buf_remaining = sizeof(id3->id3v2buf) + sizeof(id3->id3v1buf); - unsigned char* id3buf = (unsigned char*)id3->id3v2buf; - - asf_read_object_header((asf_object_t *) &header, stream); - - DEBUGF("header.size=%d\n",(int)header.size); - if (header.size < 30) { - /* invalid size for header object */ - return ASF_ERROR_OBJECT_SIZE; - } - - read_uint32le(stream, &subobjects); - - /* Two reserved bytes - do we need to read them? */ - stream_buffer_advance(stream, 2); - - DEBUGF("Read header - size=%d, subobjects=%d\n",(int)header.size, (int)subobjects); - - if (subobjects > 0) { - header.datalen = header.size - 30; - - /* TODO: Check that we have datalen bytes left in the file */ - datalen = header.datalen; - - for (i=0; i<(int)subobjects; i++) { - DEBUGF("Parsing header object %d - datalen=%d\n",i,(int)datalen); - if (datalen < 24) { - DEBUGF("not enough data for reading object\n"); - break; - } - - asf_read_object_header(¤t, stream); - - if (current.size > datalen || current.size < 24) { - DEBUGF("invalid object size - current.size=%d, datalen=%d\n",(int)current.size,(int)datalen); - break; - } - - if (asf_guid_match(¤t.guid, &asf_guid_file_properties)) { - if (current.size < 104) - return ASF_ERROR_OBJECT_SIZE; - - if (fileprop) { - /* multiple file properties objects not allowed */ - return ASF_ERROR_INVALID_OBJECT; - } - - fileprop = 1; - /* All we want is the play duration - uint64_t at offset 40 */ - stream_buffer_advance(stream, 40); - - read_uint64le(stream, &play_duration); - id3->length = play_duration / 10000; - - DEBUGF("****** length = %lums\n", id3->length); - - /* Read the packet size - uint32_t at offset 68 */ - stream_buffer_advance(stream, 20); - read_uint32le(stream, &wfx->packet_size); - - /* Skip bytes remaining in object */ - stream_buffer_advance(stream, current.size - 24 - 72); - } else if (asf_guid_match(¤t.guid, &asf_guid_stream_properties)) { - guid_t guid; - rt_uint32_t propdatalen; - - if (current.size < 78) - return ASF_ERROR_OBJECT_SIZE; - - asf_readGUID(stream, &guid); - - stream_buffer_advance(stream, 24); - read_uint32le(stream, &propdatalen); - stream_buffer_advance(stream, 4); - read_uint16le(stream, &flags); - - if (!asf_guid_match(&guid, &asf_guid_stream_type_audio)) { - DEBUGF("Found stream properties for non audio stream, skipping\n"); - stream_buffer_advance(stream,current.size - 24 - 50); - } else if (wfx->audiostream == -1) { - stream_buffer_advance(stream, 4); - DEBUGF("Found stream properties for audio stream %d\n",flags&0x7f); - - if (propdatalen < 18) { - return ASF_ERROR_INVALID_LENGTH; - } - - read_uint16le(stream, &wfx->codec_id); - read_uint16le(stream, &wfx->channels); - read_uint32le(stream, &wfx->rate); - read_uint32le(stream, &wfx->bitrate); - wfx->bitrate *= 8; - read_uint16le(stream, &wfx->blockalign); - read_uint16le(stream, &wfx->bitspersample); - read_uint16le(stream, &wfx->datalen); - - /* Round bitrate to the nearest kbit */ - id3->bitrate = (wfx->bitrate + 500) / 1000; - id3->frequency = wfx->rate; - - if (wfx->codec_id == ASF_CODEC_ID_WMAV1) { - stream_buffer_read(stream, wfx->data, 4); - stream_buffer_advance(stream, current.size - 24 - 72 - 4); - wfx->audiostream = flags&0x7f; - } else if (wfx->codec_id == ASF_CODEC_ID_WMAV2) { - stream_buffer_read(stream, wfx->data, 6); - stream_buffer_advance(stream,current.size - 24 - 72 - 6); - wfx->audiostream = flags&0x7f; - } else { - DEBUGF("Unsupported WMA codec (Pro, Lossless, Voice, etc)\n"); - stream_buffer_advance(stream,current.size - 24 - 72); - } - } - } else if (asf_guid_match(¤t.guid, &asf_guid_content_description)) { - /* Object contains five 16-bit string lengths, followed by the five strings: - title, artist, copyright, description, rating - */ - rt_uint16_t strlength[5]; - int i; - - DEBUGF("Found GUID_CONTENT_DESCRIPTION - size=%d\n",(int)(current.size - 24)); - - /* Read the 5 string lengths - number of bytes included trailing zero */ - for (i=0; i<5; i++) { - read_uint16le(stream, &strlength[i]); - DEBUGF("strlength = %u\n",strlength[i]); - } - - if (strlength[0] > 0) { /* 0 - Title */ - id3->title = id3buf; - asf_utf16LEdecode(stream, strlength[0], &id3buf, &id3buf_remaining); - } - - if (strlength[1] > 0) { /* 1 - Artist */ - id3->artist = id3buf; - asf_utf16LEdecode(stream, strlength[1], &id3buf, &id3buf_remaining); - } - - stream_buffer_advance(stream, strlength[2]); /* 2 - copyright */ - - if (strlength[3] > 0) { /* 3 - description */ - id3->comment = id3buf; - asf_utf16LEdecode(stream, strlength[3], &id3buf, &id3buf_remaining); - } - - stream_buffer_advance(stream, strlength[4]); /* 4 - rating */ - } else if (asf_guid_match(¤t.guid, &asf_guid_extended_content_description)) { - rt_uint16_t count; - int i; - int bytesleft = current.size - 24; - DEBUGF("Found GUID_EXTENDED_CONTENT_DESCRIPTION\n"); - - read_uint16le(stream, &count); - bytesleft -= 2; - DEBUGF("extended metadata count = %u\n",count); - - for (i=0; i < count; i++) { - rt_uint16_t length, type; - unsigned char* utf8 = utf8buf; - int utf8length = 512; - - read_uint16le(stream, &length); - asf_utf16LEdecode(stream, length, &utf8, &utf8length); - bytesleft -= 2 + length; - - read_uint16le(stream, &type); - read_uint16le(stream, &length); - - if (!strcmp("WM/TrackNumber",utf8buf)) { - if (type == 0) { - id3->track_string = id3buf; - asf_utf16LEdecode(stream, length, &id3buf, &id3buf_remaining); - id3->tracknum = atoi(id3->track_string); - } else if ((type >=2) && (type <= 5)) { - id3->tracknum = asf_intdecode(stream, type, length); - } else { - stream_buffer_advance(stream, length); - } - } else if ((!strcmp("WM/Genre",utf8buf)) && (type == 0)) { - id3->genre_string = id3buf; - asf_utf16LEdecode(stream, length, &id3buf, &id3buf_remaining); - } else if ((!strcmp("WM/AlbumTitle",utf8buf)) && (type == 0)) { - id3->album = id3buf; - asf_utf16LEdecode(stream, length, &id3buf, &id3buf_remaining); - } else if ((!strcmp("WM/AlbumArtist",utf8buf)) && (type == 0)) { - id3->albumartist = id3buf; - asf_utf16LEdecode(stream, length, &id3buf, &id3buf_remaining); - } else if ((!strcmp("WM/Composer",utf8buf)) && (type == 0)) { - id3->composer = id3buf; - asf_utf16LEdecode(stream, length, &id3buf, &id3buf_remaining); - } else if (!strcmp("WM/Year",utf8buf)) { - if (type == 0) { - id3->year_string = id3buf; - asf_utf16LEdecode(stream, length, &id3buf, &id3buf_remaining); - id3->year = atoi(id3->year_string); - } else if ((type >=2) && (type <= 5)) { - id3->year = asf_intdecode(stream, type, length); - } else { - stream_buffer_advance(stream, length); - } - } else if (!strncmp("replaygain_", utf8buf, 11)) { - char* value = id3buf; - int buf_len = id3buf_remaining; - int len; - asf_utf16LEdecode(stream, length, &id3buf, &id3buf_remaining); - len = 0; // parse_replaygain(utf8buf, value, id3, value, buf_len); - - if (len == 0) { - /* Don't need to keep the value */ - id3buf = value; - id3buf_remaining = buf_len; - } - } else if (!strcmp("MusicBrainz/Track Id", utf8buf)) { - id3->mb_track_id = id3buf; - asf_utf16LEdecode(stream, length, &id3buf, &id3buf_remaining); - } else { - stream_buffer_advance(stream, length); - } - bytesleft -= 4 + length; - } - - stream_buffer_advance(stream, bytesleft); - } else if (asf_guid_match(¤t.guid, &asf_guid_content_encryption) - || asf_guid_match(¤t.guid, &asf_guid_extended_content_encryption)) { - DEBUGF("File is encrypted\n"); - return ASF_ERROR_ENCRYPTED; - } else { - DEBUGF("Skipping %d bytes of object\n",(int)(current.size - 24)); - stream_buffer_advance(stream,current.size - 24); - } - - DEBUGF("Parsed object - size = %d\n",(int)current.size); - datalen -= current.size; - } - - if (i != (int)subobjects || datalen != 0) { - DEBUGF("header data doesn't match given subobject count\n"); - return ASF_ERROR_INVALID_VALUE; - } - - DEBUGF("%d subobjects read successfully\n", i); - } - - DEBUGF("header validated correctly\n"); - - return 0; -} - -rt_bool_t get_asf_metadata(struct stream_buffer* stream, struct id3_tag* id3) -{ - int res; - asf_object_t obj; - asf_waveformatex_t* wfx; - - wfx = (asf_waveformatex_t*) rt_malloc(sizeof(asf_waveformatex_t)); - if (wfx == RT_NULL) return RT_FALSE; - - wfx->audiostream = -1; - - res = asf_parse_header(stream, id3, wfx); - if (res < 0) { - DEBUGF("ASF: parsing error - %d\n",res); - return RT_FALSE; - } - - if (wfx->audiostream == -1) { - DEBUGF("ASF: No WMA streams found\n"); - rt_free(wfx); - return RT_FALSE; - } - - asf_read_object_header(&obj, stream); - - if (!asf_guid_match(&obj.guid, &asf_guid_data)) { - DEBUGF("ASF: No data object found\n"); - rt_free(wfx); - return RT_FALSE; - } - - /* Store the current file position - no need to parse the header - again in the codec. The +26 skips the rest of the data object - header. - */ - id3->first_frame_offset = 26; - /* set wfx to user data */ - id3->user_data = (rt_uint32_t)wfx; - - return RT_TRUE; -} - - -/* Read an unaligned 32-bit little endian long from buffer. */ -static unsigned long get_long_le(void* buf) -{ - unsigned char* p = (unsigned char*) buf; - - return p[0] | (p[1] << 8) | (p[2] << 16) | (p[3] << 24); -} - -/* Read an unaligned 16-bit little endian short from buffer. */ -static unsigned short get_short_le(void* buf) -{ - unsigned char* p = (unsigned char*) buf; - - return p[0] | (p[1] << 8); -} - -#define GETLEN2b(bits) (((bits) == 0x03) ? 4 : bits) - -#define GETVALUE2b(bits, data) \ - (((bits) != 0x03) ? ((bits) != 0x02) ? ((bits) != 0x01) ? \ - 0 : *(data) : get_short_le(data) : get_long_le(data)) - -static int asf_read_packet(rt_uint8_t** audiobuf, int* audiobufsize, int* packetlength, asf_waveformatex_t* wfx) -{ - rt_uint8_t tmp8, packet_flags, packet_property; - int stream_id; - int ec_length, opaque_data, ec_length_type; - int datalen; - rt_uint8_t data[18]; - rt_uint8_t* datap; - rt_uint32_t length; - rt_uint32_t padding_length; - rt_uint32_t send_time; - rt_uint16_t duration; - rt_uint16_t payload_count; - int payload_length_type; - rt_uint32_t payload_hdrlen; - int payload_datalen; - int multiple; - rt_uint32_t replicated_length; - rt_uint32_t media_object_number; - rt_uint32_t media_object_offset; - rt_uint32_t bytesread = 0; - rt_uint8_t* buf; - size_t bufsize; - int i; - /*DEBUGF("Reading new packet at %d bytes ", (int)ci->curpos);*/ - - if (stream_buffer_read(stream, &tmp8, 1) == 0) { - return ASF_ERROR_EOF; - } - bytesread++; - - /* TODO: We need a better way to detect endofstream */ - if (tmp8 != 0x82) { - DEBUGF("Read failed: packet did not sync\n"); - return -1; - } - - - if (tmp8 & 0x80) { - ec_length = tmp8 & 0x0f; - opaque_data = (tmp8 >> 4) & 0x01; - ec_length_type = (tmp8 >> 5) & 0x03; - - if (ec_length_type != 0x00 || opaque_data != 0 || ec_length != 0x02) { - DEBUGF("incorrect error correction flags\n"); - return ASF_ERROR_INVALID_VALUE; - } - - /* Skip ec_data */ - stream_buffer_advance(stream, ec_length); - bytesread += ec_length; - } else { - ec_length = 0; - } - - if (stream_buffer_read(stream, &packet_flags, 1) == 0) { return ASF_ERROR_EOF; } - if (stream_buffer_read(stream, &packet_property, 1) == 0) { return ASF_ERROR_EOF; } - bytesread += 2; - - datalen = GETLEN2b((packet_flags >> 1) & 0x03) + - GETLEN2b((packet_flags >> 3) & 0x03) + - GETLEN2b((packet_flags >> 5) & 0x03) + 6; - - if (stream_buffer_read(stream, data, datalen) == 0) { - return ASF_ERROR_EOF; - } - - bytesread += datalen; - - datap = data; - length = GETVALUE2b((packet_flags >> 5) & 0x03, datap); - datap += GETLEN2b((packet_flags >> 5) & 0x03); - /* sequence value is not used */ - GETVALUE2b((packet_flags >> 1) & 0x03, datap); - datap += GETLEN2b((packet_flags >> 1) & 0x03); - padding_length = GETVALUE2b((packet_flags >> 3) & 0x03, datap); - datap += GETLEN2b((packet_flags >> 3) & 0x03); - send_time = get_long_le(datap); - datap += 4; - duration = get_short_le(datap); - datap += 2; - /*DEBUGF("and duration %d ms\n", duration);*/ - - /* this is really idiotic, packet length can (and often will) be - * undefined and we just have to use the header packet size as the size - * value */ - if (!((packet_flags >> 5) & 0x03)) { - length = wfx->packet_size; - } - - /* this is also really idiotic, if packet length is smaller than packet - * size, we need to manually add the additional bytes into padding length - */ - if (length < wfx->packet_size) { - padding_length += wfx->packet_size - length; - length = wfx->packet_size; - } - - if (length > wfx->packet_size) { - DEBUGF("packet with too big length value\n"); - return ASF_ERROR_INVALID_LENGTH; - } - - /* check if we have multiple payloads */ - if (packet_flags & 0x01) { - if (stream_buffer_read(stream, &tmp8, 1) == 0) { - return ASF_ERROR_EOF; - } - payload_count = tmp8 & 0x3f; - payload_length_type = (tmp8 >> 6) & 0x03; - bytesread++; - } else { - payload_count = 1; - payload_length_type = 0x02; /* not used */ - } - - if (length < bytesread) { - DEBUGF("header exceeded packet size, invalid file - length=%d, bytesread=%d\n",(int)length,(int)bytesread); - /* FIXME: should this be checked earlier? */ - return ASF_ERROR_INVALID_LENGTH; - } - - - /* We now parse the individual payloads, and move all payloads - belonging to our audio stream to a contiguous block, starting at - the location of the first payload. - */ - - *audiobuf = NULL; - *audiobufsize = 0; - *packetlength = length - bytesread; - - buf = stream_buffer_request(stream, &bufsize, length); - datap = buf; - - if (bufsize != length) { - /* This should only happen with packets larger than 32KB (the - guard buffer size). All the streams I've seen have - relatively small packets less than about 8KB), but I don't - know what is expected. - */ - DEBUGF("Could not read packet (requested %d bytes, received %d), aborting\n", - (int)length,(int)bufsize); - return -1; - } - - for (i=0; i> 2) & 0x03) + - GETLEN2b((packet_property >> 4) & 0x03); - - //DEBUGF("payload_hdrlen = %d\n",payload_hdrlen); - if (payload_hdrlen > sizeof(data)) { - DEBUGF("Unexpectedly long datalen in data - %d\n",datalen); - return ASF_ERROR_OUTOFMEM; - } - - bytesread += payload_hdrlen; - media_object_number = GETVALUE2b((packet_property >> 4) & 0x03, datap); - datap += GETLEN2b((packet_property >> 4) & 0x03); - media_object_offset = GETVALUE2b((packet_property >> 2) & 0x03, datap); - datap += GETLEN2b((packet_property >> 2) & 0x03); - replicated_length = GETVALUE2b(packet_property & 0x03, datap); - datap += GETLEN2b(packet_property & 0x03); - - /* TODO: Validate replicated_length */ - /* TODO: Is the content of this important for us? */ - datap += replicated_length; - bytesread += replicated_length; - - multiple = packet_flags & 0x01; - - - if (multiple) { - int x; - - x = GETLEN2b(payload_length_type); - - if (x != 2) { - /* in multiple payloads datalen should be a word */ - return ASF_ERROR_INVALID_VALUE; - } - - payload_datalen = GETVALUE2b(payload_length_type, datap); - datap += x; - bytesread += x; - } else { - payload_datalen = length - bytesread - padding_length; - } - - if (replicated_length==1) - datap++; - - if (stream_id == wfx->audiostream) - { - if (*audiobuf == NULL) { - /* The first payload can stay where it is */ - *audiobuf = datap; - *audiobufsize = payload_datalen; - } else { - /* The second and subsequent payloads in this packet - that belong to the audio stream need to be moved to be - contiguous with the first payload. - */ - memmove(*audiobuf + *audiobufsize, datap, payload_datalen); - *audiobufsize += payload_datalen; - } - } - datap += payload_datalen; - bytesread += payload_datalen; - } - - if (*audiobuf != NULL) - return 1; - else - return 0; -} - -#include -/* this is the codec entry point */ -void wma(const char* filename) -{ - rt_uint32_t elapsedtime; - asf_waveformatex_t* wfx; - int i; - int wmares, res; - rt_uint8_t* audiobuf; - int audiobufsize; - int packetlength = 0; - int errcount = 0; - rt_device_t snd = RT_NULL; - - int fd; - - snd = rt_device_find("snd"); - if (snd == RT_NULL) - { - rt_kprintf("open audio device failed\n"); - return; - } - - rt_device_open(snd, RT_DEVICE_OFLAG_RDONLY); - - fd = open(filename, O_RDONLY, 0); - if (fd < 0) - { - rt_kprintf("open file: %s failed\n", filename); - return ; - } - - /* create stream */ - stream = stream_buffer_create(fd); - id3 = &_id3; - /* get meta information */ - get_asf_metadata(stream, id3); - - wfx = (asf_waveformatex_t*)id3->user_data; - - if (wma_decode_init(&wmadec, wfx) < 0) { - DEBUGF("WMA: Unsupported or corrupt file\n"); - goto exit; - } - - DEBUGF("**************** IN WMA.C ******************\n"); - - /* The main decoding loop */ - - res = 1; - while (res >= 0) - { - errcount = 0; -new_packet: - res = asf_read_packet(&audiobuf, &audiobufsize, &packetlength, wfx); - - if (res < 0) { - /* We'll try to recover from a parse error a certain number of - * times. If we succeed, the error counter will be reset. - */ - errcount++; - DEBUGF("read_packet error %d, errcount %d\n",wmares, errcount); - if (errcount > 5) { - goto done; - } else { - stream_buffer_advance(stream, packetlength); - goto new_packet; - } - } else if (res > 0) { - wma_decode_superframe_init(&wmadec, audiobuf, audiobufsize); - - for (i=0; i < wmadec.nb_frames; i++) - { - wmares = wma_decode_superframe_frame(&wmadec, - decoded, - audiobuf, audiobufsize); - - if (wmares < 0) { - /* Do the above, but for errors in decode. */ - errcount++; - DEBUGF("WMA decode error %d, errcount %d\n",wmares, errcount); - if (errcount > 5) { - goto done; - } else { - stream_buffer_advance(stream, packetlength); - goto new_packet; - } - } else if (wmares > 0) { - /* write to audio device */ - elapsedtime += (wmares*10)/(wfx->rate/100); - // ci->set_elapsed(elapsedtime); - } - } - } - - stream_buffer_advance(stream, packetlength); - } - -done: -exit: - stream_buffer_close(stream); - stream = RT_NULL; - - return ; -} -FINSH_FUNCTION_EXPORT(wma, wma decode test) -

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