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update cortex-m libcpu: fixed compile error.

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aozima
2017-08-23 16:13:51 +08:00
parent 1f45d8c723
commit 9bbc4e5e6b
3 changed files with 19 additions and 10 deletions
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libcpu/arm/cortex-m3/cpuport.c
+7 -4
View File
@@ -368,11 +368,12 @@ __asm int __rt_ffs(int value)
{ {
CMP r0, #0x00 CMP r0, #0x00
BEQ exit BEQ exit
RBIT r0, r0 RBIT r0, r0
CLZ r0, r0 CLZ r0, r0
ADDS r0, r0, #0x01 ADDS r0, r0, #0x01
exit exit
BX lr BX lr
} }
#elif defined(__IAR_SYSTEMS_ICC__) #elif defined(__IAR_SYSTEMS_ICC__)
@@ -380,9 +381,11 @@ int __rt_ffs(int value)
{ {
if (value == 0) return value; if (value == 0) return value;
__ASM("RBIT r0, r0"); asm("RBIT %0, %1" : "=r"(value) : "r"(value));
__ASM("CLZ r0, r0"); asm("CLZ %0, %1" : "=r"(value) : "r"(value));
__ASM("ADDS r0, r0, #0x01"); asm("ADDS %0, %1, #0x01" : "=r"(value) : "r"(value));
return value;
} }
#elif defined(__GNUC__) #elif defined(__GNUC__)
int __rt_ffs(int value) int __rt_ffs(int value)
libcpu/arm/cortex-m4/cpuport.c
+6 -3
View File
@@ -238,6 +238,7 @@ __asm int __rt_ffs(int value)
{ {
CMP r0, #0x00 CMP r0, #0x00
BEQ exit BEQ exit
RBIT r0, r0 RBIT r0, r0
CLZ r0, r0 CLZ r0, r0
ADDS r0, r0, #0x01 ADDS r0, r0, #0x01
@@ -250,9 +251,11 @@ int __rt_ffs(int value)
{ {
if (value == 0) return value; if (value == 0) return value;
__ASM("RBIT r0, r0"); asm("RBIT %0, %1" : "=r"(value) : "r"(value));
__ASM("CLZ r0, r0"); asm("CLZ %0, %1" : "=r"(value) : "r"(value));
__ASM("ADDS r0, r0, #0x01"); asm("ADDS %0, %1, #0x01" : "=r"(value) : "r"(value));
return value;
} }
#elif defined(__GNUC__) #elif defined(__GNUC__)
int __rt_ffs(int value) int __rt_ffs(int value)
libcpu/arm/cortex-m7/cpuport.c
+6 -3
View File
@@ -238,6 +238,7 @@ __asm int __rt_ffs(int value)
{ {
CMP r0, #0x00 CMP r0, #0x00
BEQ exit BEQ exit
RBIT r0, r0 RBIT r0, r0
CLZ r0, r0 CLZ r0, r0
ADDS r0, r0, #0x01 ADDS r0, r0, #0x01
@@ -250,9 +251,11 @@ int __rt_ffs(int value)
{ {
if (value == 0) return value; if (value == 0) return value;
__ASM("RBIT r0, r0"); asm("RBIT %0, %1" : "=r"(value) : "r"(value));
__ASM("CLZ r0, r0"); asm("CLZ %0, %1" : "=r"(value) : "r"(value));
__ASM("ADDS r0, r0, #0x01"); asm("ADDS %0, %1, #0x01" : "=r"(value) : "r"(value));
return value;
} }
#elif defined(__GNUC__) #elif defined(__GNUC__)
int __rt_ffs(int value) int __rt_ffs(int value)