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update libcpu: ensure fault enable.

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This commit is contained in:
aozima
2017-08-09 09:49:05 +08:00
parent f975ef5146
commit 9b7303e511
12 changed files with 26 additions and 7 deletions
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libcpu/arm/cortex-m0/context_gcc.S
+3 -1
View File
@@ -181,7 +181,9 @@ rt_hw_context_switch_to:
NOP NOP
MSR MSP, R0 MSR MSP, R0
CPSIE I /* enable interrupts at processor level */ /* enable interrupts at processor level */
CPSIE F
CPSIE I
/* never reach here! */ /* never reach here! */
libcpu/arm/cortex-m0/context_iar.S
+1
View File
@@ -188,6 +188,7 @@ rt_hw_context_switch_to:
MSR msp, r0 MSR msp, r0
; enable interrupts at processor level ; enable interrupts at processor level
CPSIE F
CPSIE I CPSIE I
; never reach here! ; never reach here!
libcpu/arm/cortex-m0/context_rvds.S
+1
View File
@@ -191,6 +191,7 @@ rt_hw_context_switch_to PROC
MSR msp, r0 MSR msp, r0
; enable interrupts at processor level ; enable interrupts at processor level
CPSIE F
CPSIE I CPSIE I
; never reach here! ; never reach here!
libcpu/arm/cortex-m3/context_gcc.S
+3 -1
View File
@@ -162,7 +162,9 @@ rt_hw_context_switch_to:
NOP NOP
MSR msp, r0 MSR msp, r0
CPSIE I /* enable interrupts at processor level */ /* enable interrupts at processor level */
CPSIE F
CPSIE I
/* never reach here! */ /* never reach here! */
libcpu/arm/cortex-m3/context_iar.S
+3 -1
View File
@@ -161,7 +161,9 @@ rt_hw_context_switch_to:
NOP NOP
MSR msp, r0 MSR msp, r0
CPSIE I ; enable interrupts at processor level ; enable interrupts at processor level
CPSIE F
CPSIE I
; never reach here! ; never reach here!
libcpu/arm/cortex-m3/context_rvds.S
+1
View File
@@ -168,6 +168,7 @@ rt_hw_context_switch_to PROC
MSR msp, r0 MSR msp, r0
; enable interrupts at processor level ; enable interrupts at processor level
CPSIE F
CPSIE I CPSIE I
; never reach here! ; never reach here!
libcpu/arm/cortex-m4/context_gcc.S
+3 -1
View File
@@ -203,7 +203,9 @@ rt_hw_context_switch_to:
NOP NOP
MSR msp, r0 MSR msp, r0
CPSIE I /* enable interrupts at processor level */ /* enable interrupts at processor level */
CPSIE F
CPSIE I
/* never reach here! */ /* never reach here! */
libcpu/arm/cortex-m4/context_iar.S
+3 -1
View File
@@ -207,7 +207,9 @@ rt_hw_context_switch_to:
NOP NOP
MSR msp, r0 MSR msp, r0
CPSIE I ; enable interrupts at processor level ; enable interrupts at processor level
CPSIE F
CPSIE I
; never reach here! ; never reach here!
libcpu/arm/cortex-m4/context_rvds.S
+1
View File
@@ -208,6 +208,7 @@ rt_hw_context_switch_to PROC
MSR msp, r0 MSR msp, r0
; enable interrupts at processor level ; enable interrupts at processor level
CPSIE F
CPSIE I CPSIE I
; never reach here! ; never reach here!
libcpu/arm/cortex-m7/context_gcc.S
+3 -1
View File
@@ -203,7 +203,9 @@ rt_hw_context_switch_to:
NOP NOP
MSR msp, r0 MSR msp, r0
CPSIE I /* enable interrupts at processor level */ /* enable interrupts at processor level */
CPSIE F
CPSIE I
/* never reach here! */ /* never reach here! */
libcpu/arm/cortex-m7/context_iar.S
+3 -1
View File
@@ -207,7 +207,9 @@ rt_hw_context_switch_to:
NOP NOP
MSR msp, r0 MSR msp, r0
CPSIE I ; enable interrupts at processor level ; enable interrupts at processor level
CPSIE F
CPSIE I
; never reach here! ; never reach here!
libcpu/arm/cortex-m7/context_rvds.S
+1
View File
@@ -208,6 +208,7 @@ rt_hw_context_switch_to PROC
MSR msp, r0 MSR msp, r0
; enable interrupts at processor level ; enable interrupts at processor level
CPSIE F
CPSIE I CPSIE I
; never reach here! ; never reach here!