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[libcpu/riscv]迁移libcpu/riscv/ch32中文件至bsp (#7004)
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@@ -1,12 +0,0 @@
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# RT-Thread building script for component
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from building import *
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cwd = GetCurrentDir()
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src = Glob('*.c') + Glob('*.cpp') + Glob('*_gcc.S')
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CPPPATH = [cwd]
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ASFLAGS = ' -I ' + cwd
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group = DefineGroup('CPU', src, depend = [''], CPPPATH = CPPPATH, ASFLAGS = ASFLAGS)
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Return('group')
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@@ -1,41 +0,0 @@
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/*
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* Copyright (c) 2006-2018, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2021-09-09 WCH the first version
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* 2023-01-04 WangShun Remove redundant files
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*/
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#include "rtconfig.h"
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#if defined (SOC_RISCV_SERIES_CH32V1)
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#include "ch32v10x.h"
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#elif defined (SOC_RISCV_SERIES_CH32V2)
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#include "ch32v20x.h"
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#elif defined (SOC_RISCV_SERIES_CH32V3)
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#include "ch32v30x.h"
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#else
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#error "CH32 architecture doesn't support!"
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#endif
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void rt_trigger_software_interrupt(void)
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{
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/*CH32V103 does not support systick software interrupt*/
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#if defined(SOC_RISCV_SERIES_CH32V1)
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NVIC_SetPendingIRQ(Software_IRQn);
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#else
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SysTick->CTLR |= (1 << 31);
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#endif
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}
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void rt_hw_do_after_save_above(void)
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{
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__asm volatile ("li t0,0x20" );
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__asm volatile ("csrs 0x804, t0");
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/*CH32V103 does not support systick software interrupt*/
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#if defined(SOC_RISCV_SERIES_CH32V1)
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NVIC_ClearPendingIRQ(Software_IRQn);
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#else
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SysTick->CTLR &= ~(1 << 31);
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#endif
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}
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