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feat[ADC]: 新增 ADC V2 驱动支持 (#11440)
* feat[ADC V2]: add ADC V2 driver support add ADC V2 core APIs, session state management, and sequence read support add STM32 ADC V2 HAL backend with internal-channel and VREF handling add per-series STM32 ADC V2 default configuration headers wire ADC V2 Kconfig and SConscript integration for components and STM32 BSP drivers keep ADC V2 mutually exclusive with the legacy ADC driver path * feat[ADC V2]: add ADC V2 MSH special channel read support add generic ADC V2 MSH commands for probing, configuring, raw reads, voltage reads, and sequence reads add STM32 ADC V2 backend special commands for VREFINT, temperature sensor, and VBAT reads add STM32 helper APIs for special logical channels, sampling time, resolution, and temperature calculation wire ADC V2 MSH sources through Kconfig and SConscript * feat[ADC V2]: add ADC V2 stream DMA support add ADC V2 stream APIs with latest-frame and FIFO buffering policies wire STM32 ADC V2 to circular DMA stream mode with per-instance Kconfig options extend STM32 ADC config headers and DMA helpers for stream DMA configuration add FinSH stream commands for start, read, cancel, and stop operations handle Cortex-M7 cache-safe DMA buffers for STM32 stream sampling * feat[ADC V2]: add timer trigger support for ADC V2 streams add ADC V2 trigger configuration, validation, and lifecycle coordination add timer update trigger support through clock timer TRGO controls map STM32 ADC V2 timer update triggers to HAL external trigger selector fields add Kconfig, SConscript, and MSH entries for ADC trigger setup and inspection * feat[ADCV2]: add timer and comparator trigger selectors add ADC V2 timer compare and analog comparator trigger configuration support extend clock timer trigger config with compare event and channel fields wire STM32 ADC external trigger selector mappings for TIM update, TIM compare, and COMP output add FinSH trigger_set commands and Kconfig switches for timer and comparator trigger backends * fix[ADC V2]: resolve ADC V1 compatibility Kconfig loop * ci[ADC V2][stm32]: add ADC v2 peripheral config for stm32f407-rt-spark BSP
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wdfk-prog
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/*
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* Copyright (c) 2006-2026, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2026-05-20 wdfk-prog add ADC V2 trigger declarations
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*/
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/**
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* @file adc_v2_trigger.h
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* @brief ADC V2 trigger framework declarations.
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*/
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#ifndef __ADC_V2_TRIGGER_H__
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#define __ADC_V2_TRIGGER_H__
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#include <rtconfig.h>
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#include <rtthread.h>
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#ifdef __cplusplus
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extern "C" {
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#endif /* __cplusplus */
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#if defined(RT_ADC_USING_TRIGGER)
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struct rt_adc_device;
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struct rt_device;
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/**
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* @brief ADC hardware trigger event type.
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*
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* @note A platform backend may support only part of these trigger types.
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* Unsupported trigger types shall be rejected by the framework or backend
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* with an error such as -RT_ENOSYS.
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*/
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enum rt_adc_trigger_type
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{
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RT_ADC_TRIGGER_TIMER_UPDATE = 0, /**< Use a timer update/TRGO event. */
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RT_ADC_TRIGGER_TIMER_COMPARE, /**< Use a timer compare event. */
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RT_ADC_TRIGGER_PWM_EDGE, /**< Use a PWM edge event. */
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RT_ADC_TRIGGER_EXTI_EDGE, /**< Use an external interrupt edge event. */
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RT_ADC_TRIGGER_ANALOG_COMPARE, /**< Use an analog comparator event. */
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RT_ADC_TRIGGER_BACKEND, /**< Use a backend-specific trigger event. */
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};
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/**
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* @brief ADC trigger edge selector.
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*/
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enum rt_adc_trigger_edge
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{
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RT_ADC_TRIGGER_EDGE_NONE = 0, /**< No edge selection is required. */
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RT_ADC_TRIGGER_EDGE_RISING, /**< Use the rising edge. */
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RT_ADC_TRIGGER_EDGE_FALLING, /**< Use the falling edge. */
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RT_ADC_TRIGGER_EDGE_BOTH, /**< Use both rising and falling edges. */
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};
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/**
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* @brief Timer-based ADC trigger event.
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*/
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struct rt_adc_trigger_timer_event
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{
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struct rt_device *timer; /**< Timer device used as trigger source. */
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rt_uint32_t freq_hz; /**< Timer trigger output frequency in hertz. */
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rt_uint16_t channel; /**< Timer channel, or 0 for update/TRGO event. */
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rt_uint16_t reserved; /**< Reserved for future extension. */
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};
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/**
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* @brief PWM-based ADC trigger event.
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*/
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struct rt_adc_trigger_pwm_event
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{
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struct rt_device *pwm; /**< PWM device used as trigger source. */
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rt_uint16_t channel; /**< PWM channel. */
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enum rt_adc_trigger_edge edge; /**< PWM edge used as trigger event. */
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};
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/**
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* @brief External interrupt ADC trigger event.
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*/
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struct rt_adc_trigger_exti_event
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{
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struct rt_device *pin; /**< Pin or GPIO controller device. */
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rt_uint16_t line; /**< External interrupt line or pin number. */
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enum rt_adc_trigger_edge edge; /**< Interrupt edge used as trigger event. */
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};
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/**
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* @brief Analog comparator ADC trigger event.
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*/
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struct rt_adc_trigger_compare_event
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{
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struct rt_device *comparator; /**< Optional comparator device used as trigger source. */
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rt_uint16_t channel; /**< Comparator channel or instance index. */
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enum rt_adc_trigger_edge edge; /**< Comparator output edge used as trigger event. */
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};
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/**
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* @brief Backend-specific ADC trigger event.
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*/
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struct rt_adc_trigger_backend_event
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{
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rt_uint32_t selector; /**< Backend-specific trigger selector. */
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rt_uint32_t edge; /**< Backend-specific edge selector. */
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const void *data; /**< Optional backend-specific configuration. */
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rt_size_t data_size; /**< Size of backend-specific configuration. */
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};
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/**
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* @brief ADC trigger configuration.
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*/
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struct rt_adc_trigger_cfg
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{
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enum rt_adc_trigger_type type; /**< Trigger event type. */
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rt_uint32_t flags; /**< Common trigger flags, reserved for future extension. */
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union
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{
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struct rt_adc_trigger_timer_event timer; /**< Timer trigger event. */
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struct rt_adc_trigger_pwm_event pwm; /**< PWM trigger event. */
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struct rt_adc_trigger_exti_event exti; /**< External interrupt trigger event. */
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struct rt_adc_trigger_compare_event compare; /**< Comparator trigger event. */
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struct rt_adc_trigger_backend_event backend; /**< Backend-specific trigger event. */
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} event; /**< Trigger event payload. */
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};
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/**
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* @brief ADC trigger runtime control block.
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*/
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struct rt_adc_trigger_ctrl
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{
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struct rt_adc_trigger_cfg cfg; /**< Cached device-level hardware trigger configuration. */
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rt_bool_t configured; /**< Whether cfg contains a cached hardware trigger request. */
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};
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/**
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* @brief Set one device-level ADC hardware trigger request.
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* @param device Pointer to the ADC device object.
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* @param cfg Pointer to the ADC trigger configuration object.
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* @return Operation status.
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* @note This function only checks the framework-level trigger structure and
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* caches the request. It does not write ADC trigger registers immediately.
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* Backend compatibility is reported when the cached trigger is
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* preconfigured before a conversion hardware configuration.
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*/
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rt_err_t rt_adc_trigger_set(struct rt_adc_device *device, const struct rt_adc_trigger_cfg *cfg);
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/**
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* @brief Clear the cached device-level ADC hardware trigger request.
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* @param device Pointer to the ADC device object.
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* @return Operation status.
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* @note This function does not write ADC trigger registers immediately. The
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* next conversion hardware configuration preconfigures the backend
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* software/default trigger state.
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*/
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rt_err_t rt_adc_trigger_clear(struct rt_adc_device *device);
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/**
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* @brief Check whether one ADC device has a cached hardware trigger request.
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* @param device Pointer to the ADC device object.
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* @return RT_TRUE if a hardware trigger request is set, otherwise RT_FALSE.
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*/
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rt_bool_t rt_adc_trigger_is_set(struct rt_adc_device *device);
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#endif /* defined(RT_ADC_USING_TRIGGER) */
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#ifdef __cplusplus
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}
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#endif /* __cplusplus */
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#endif /* __ADC_V2_TRIGGER_H__ */
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@@ -47,9 +47,41 @@ typedef enum
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CLOCK_TIMER_CTRL_FREQ_SET = RT_DEVICE_CTRL_BASE(Timer) + 0x01,
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CLOCK_TIMER_CTRL_STOP = RT_DEVICE_CTRL_BASE(Timer) + 0x02,
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CLOCK_TIMER_CTRL_INFO_GET = RT_DEVICE_CTRL_BASE(Timer) + 0x03,
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CLOCK_TIMER_CTRL_MODE_SET = RT_DEVICE_CTRL_BASE(Timer) + 0x04
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CLOCK_TIMER_CTRL_MODE_SET = RT_DEVICE_CTRL_BASE(Timer) + 0x04,
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#if defined(RT_USING_CLOCK_TIMER_TRIGGER)
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CLOCK_TIMER_CTRL_TRIGGER_CONFIG = RT_DEVICE_CTRL_BASE(Timer) + 0x05,
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CLOCK_TIMER_CTRL_TRIGGER_START = RT_DEVICE_CTRL_BASE(Timer) + 0x06,
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CLOCK_TIMER_CTRL_TRIGGER_STOP = RT_DEVICE_CTRL_BASE(Timer) + 0x07,
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CLOCK_TIMER_CTRL_TRIGGER_RELEASE = RT_DEVICE_CTRL_BASE(Timer) + 0x08
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#endif /* defined(RT_USING_CLOCK_TIMER_TRIGGER) */
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} rt_clock_timer_ctrl_t;
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#if defined(RT_USING_CLOCK_TIMER_TRIGGER)
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/**
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* @brief Hardware timer trigger output event type.
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*/
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enum rt_clock_timer_trigger_event
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{
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CLOCK_TIMER_TRIGGER_EVENT_UPDATE = 0, /**< Generate trigger on timer update/overflow event. */
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CLOCK_TIMER_TRIGGER_EVENT_COMPARE, /**< Generate trigger on timer compare match event. */
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CLOCK_TIMER_TRIGGER_EVENT_PWM_EDGE, /**< Generate trigger on timer PWM output reference edge. */
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CLOCK_TIMER_TRIGGER_EVENT_BACKEND /**< Generate trigger from a backend-specific timer event. */
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};
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/**
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* @brief Hardware trigger output configuration.
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* @note This interface does not arbitrate timer ownership. Callers must
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* provide a timer dedicated to hardware trigger output.
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*/
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struct rt_clock_timer_trigger_cfg
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{
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rt_uint32_t freq_hz; /**< Trigger output frequency in hertz. */
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enum rt_clock_timer_trigger_event event; /**< Timer event used as trigger output. */
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rt_uint16_t channel; /**< Timer compare channel, or 0 for update event. */
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rt_uint16_t reserved; /**< Reserved for future extension. */
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};
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#endif /* defined(RT_USING_CLOCK_TIMER_TRIGGER) */
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typedef enum
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{
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CLOCK_TIMER_MODE_ONESHOT = 0x01,
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@@ -272,9 +272,11 @@ extern "C" {
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#include "drivers/dev_audio.h"
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#endif /* RT_USING_AUDIO */
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#ifdef RT_USING_ADC
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#ifdef RT_USING_ADC_V2
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#include "drivers/adc_v2.h"
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#elif defined(RT_USING_ADC)
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#include "drivers/adc.h"
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#endif /* RT_USING_ADC */
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#endif /* RT_USING_ADC_V2 */
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#ifdef RT_USING_DAC
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#include "drivers/dac.h"
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