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[bsp][c28x] add support to not disable global interrupt in context-switch to enable zero-latency isr for critical interrupts.
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@@ -210,10 +210,18 @@ typedef __gnuc_va_list va_list;
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* GCC and MDK) compilers. See ARM Optimizing C/C++ Compiler 5.9.3 for more
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* details. */
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#define RT_SECTION(x) __attribute__((section(x)))
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#ifdef __TI_EABI__
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#define RT_USED __attribute__((retain)) __attribute__((used))
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#else
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#define RT_USED __attribute__((used))
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#endif
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#define PRAGMA(x) _Pragma(#x)
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#define ALIGN(n) __attribute__((aligned(n)))
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#ifdef __TI_EABI__
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#define RT_WEAK __attribute__((weak))
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#else
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#define RT_WEAK
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#endif
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#define rt_inline static inline
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#define RTT_API
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#elif defined (__TASKING__)
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