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Merge pull request #5389 from mysterywolf/master

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[qemu][lvgl] 优化lvgl显示驱动
This commit is contained in:
guo
2021-12-15 15:38:49 +08:00
committed by GitHub
parent 1390f7d108 df474d79c5
commit 874f6c84f1
26 changed files with 113 additions and 177 deletions
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bsp/qemu-vexpress-a9/drivers/Kconfig
-2
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@@ -36,12 +36,10 @@ config BSP_DRV_MOUSE
if BSP_DRV_CLCD if BSP_DRV_CLCD
config BSP_LCD_WIDTH config BSP_LCD_WIDTH
int "Width of LCD panel" int "Width of LCD panel"
default 480 if PKG_USING_LV_MUSIC_DEMO
default 640 default 640
config BSP_LCD_HEIGHT config BSP_LCD_HEIGHT
int "Height of LCD panel" int "Height of LCD panel"
default 272 if PKG_USING_LV_MUSIC_DEMO
default 480 default 480
endif endif
bsp/qemu-vexpress-a9/drivers/audio/drv_ac97.c
+1 -1
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@@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2020, RT-Thread Development Team * Copyright (c) 2006-2021, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *
bsp/qemu-vexpress-a9/drivers/audio/drv_ac97.h
+28 -28
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@@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2020, RT-Thread Development Team * Copyright (c) 2006-2021, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *
@@ -12,33 +12,33 @@
#define __DRV_AC97_H__ #define __DRV_AC97_H__
/* Register offsets */ /* Register offsets */
#define AC97_RESET 0x00 #define AC97_RESET 0x00
#define AC97_MASTER 0x02 #define AC97_MASTER 0x02
#define AC97_HEADPHONE 0x04 #define AC97_HEADPHONE 0x04
#define AC97_MASTER_MONO 0x06 #define AC97_MASTER_MONO 0x06
#define AC97_MASTER_TONE 0x08 #define AC97_MASTER_TONE 0x08
#define AC97_PC_BEEP 0x0A //mixer volume #define AC97_PC_BEEP 0x0A //mixer volume
#define AC97_PHONE 0x0C #define AC97_PHONE 0x0C
#define AC97_MIC 0x0E //qwert db #define AC97_MIC 0x0E //qwert db
#define AC97_LINE 0x10 #define AC97_LINE 0x10
#define AC97_CD 0x12 #define AC97_CD 0x12
#define AC97_VIDEO 0x14 #define AC97_VIDEO 0x14
#define AC97_AUX 0x16 #define AC97_AUX 0x16
#define AC97_PCM 0x18 #define AC97_PCM 0x18
#define AC97_REC_SEL 0x1A //0 represent mic #define AC97_REC_SEL 0x1A //0 represent mic
#define AC97_REC_GAIN 0x1C #define AC97_REC_GAIN 0x1C
#define AC97_REC_GAIN_MIC 0x1E #define AC97_REC_GAIN_MIC 0x1E
#define AC97_GENERAL_PURPOSE 0x20 #define AC97_GENERAL_PURPOSE 0x20
#define AC97_3D_CONTROL 0x22 #define AC97_3D_CONTROL 0x22
#define AC97_INT_PAGING 0x24 //qwert #define AC97_INT_PAGING 0x24 //qwert
#define AC97_POWERDOWN 0x26 #define AC97_POWERDOWN 0x26
#define AC97_PCM_FRONT_DAC_RATE 0x2c /* PCM Front DAC Rate */ #define AC97_PCM_FRONT_DAC_RATE 0x2c /* PCM Front DAC Rate */
#define AC97_PCM_SURR_DAC_RATE 0x2e /* PCM Surround DAC Rate */ #define AC97_PCM_SURR_DAC_RATE 0x2e /* PCM Surround DAC Rate */
#define AC97_PCM_LFE_DAC_RATE 0x30 /* PCM LFE DAC Rate */ #define AC97_PCM_LFE_DAC_RATE 0x30 /* PCM LFE DAC Rate */
#define AC97_PCM_LR_ADC_RATE 0x32 /* PCM LR ADC Rate */ #define AC97_PCM_LR_ADC_RATE 0x32 /* PCM LR ADC Rate */
#define AC97_PCM_MIC_ADC_RATE 0x34 /* PCM MIC ADC Rate */ #define AC97_PCM_MIC_ADC_RATE 0x34 /* PCM MIC ADC Rate */
#define AC97_DAC_SLOT_MAP 0x6C #define AC97_DAC_SLOT_MAP 0x6C
#define AC97_ADC_SLOT_MAP 0x6E #define AC97_ADC_SLOT_MAP 0x6E
void ac97_reset(void); void ac97_reset(void);
rt_err_t ac97_set_vol(int vol); rt_err_t ac97_set_vol(int vol);
bsp/qemu-vexpress-a9/drivers/audio/drv_pl041.c
+1 -1
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@@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2020, RT-Thread Development Team * Copyright (c) 2006-2021, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *
bsp/qemu-vexpress-a9/drivers/audio/drv_pl041.h
+26 -26
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@@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2020, RT-Thread Development Team * Copyright (c) 2006-2021, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *
@@ -14,11 +14,11 @@
#define PL041_BASE_ADDR (0x10004000) #define PL041_BASE_ADDR (0x10004000)
/* offsets in CTRL_CH */ /* offsets in CTRL_CH */
#define AACI_RXCR 0x00 /* 29 bits Control Rx FIFO */ #define AACI_RXCR 0x00 /* 29 bits Control Rx FIFO */
#define AACI_TXCR 0x04 /* 17 bits Control Tx FIFO */ #define AACI_TXCR 0x04 /* 17 bits Control Tx FIFO */
#define AACI_SR 0x08 /* 12 bits Status */ #define AACI_SR 0x08 /* 12 bits Status */
#define AACI_ISR 0x0C /* 7 bits Int Status */ #define AACI_ISR 0x0C /* 7 bits Int Status */
#define AACI_IE 0x10 /* 7 bits Int Enable */ #define AACI_IE 0x10 /* 7 bits Int Enable */
/* both for AACI_RXCR and AACI_TXCR */ /* both for AACI_RXCR and AACI_TXCR */
#define AACI_CR_FEN (1 << 16) /* fifo enable */ #define AACI_CR_FEN (1 << 16) /* fifo enable */
@@ -39,7 +39,7 @@
#define AACI_CR_SL3 (1 << 3) #define AACI_CR_SL3 (1 << 3)
#define AACI_CR_SL2 (1 << 2) #define AACI_CR_SL2 (1 << 2)
#define AACI_CR_SL1 (1 << 1) #define AACI_CR_SL1 (1 << 1)
#define AACI_CR_EN (1 << 0) /* receive enable */ #define AACI_CR_EN (1 << 0) /* receive enable */
/* status register bits */ /* status register bits */
#define AACI_SR_RXTOFE (1 << 11) /* rx timeout fifo empty */ #define AACI_SR_RXTOFE (1 << 11) /* rx timeout fifo empty */
@@ -66,29 +66,29 @@
/* interrupt enable */ /* interrupt enable */
#define AACI_IE_RXTOIE (1 << 6) /*rx timeout interrupt enable*/ #define AACI_IE_RXTOIE (1 << 6) /*rx timeout interrupt enable*/
#define AACI_IE_URIE (1 << 5) /*Transmit underrun interrupt enable*/ #define AACI_IE_URIE (1 << 5) /*Transmit underrun interrupt enable*/
#define AACI_IE_ORIE (1 << 4) /*Overrun receive interrupt enable*/ #define AACI_IE_ORIE (1 << 4) /*Overrun receive interrupt enable*/
#define AACI_IE_RXIE (1 << 3) /*Receive interrupt enable*/ #define AACI_IE_RXIE (1 << 3) /*Receive interrupt enable*/
#define AACI_IE_TXIE (1 << 2) /*Transmit interrupt enable*/ #define AACI_IE_TXIE (1 << 2) /*Transmit interrupt enable*/
#define AACI_IE_RXTIE (1 << 1) /*Receive timeout interrupt enable*/ #define AACI_IE_RXTIE (1 << 1) /*Receive timeout interrupt enable*/
#define AACI_IE_TXCIE (1 << 0) /*Transmit complete interrupt enable*/ #define AACI_IE_TXCIE (1 << 0) /*Transmit complete interrupt enable*/
/* interrupt status */ /* interrupt status */
#define AACI_ISR_RXTOFE (1 << 6) /* rx timeout fifo empty */ #define AACI_ISR_RXTOFE (1 << 6) /* rx timeout fifo empty */
#define AACI_ISR_UR (1 << 5) /* tx fifo underrun */ #define AACI_ISR_UR (1 << 5) /* tx fifo underrun */
#define AACI_ISR_OR (1 << 4) /* rx fifo overrun */ #define AACI_ISR_OR (1 << 4) /* rx fifo overrun */
#define AACI_ISR_RX (1 << 3) /* rx interrupt status */ #define AACI_ISR_RX (1 << 3) /* rx interrupt status */
#define AACI_ISR_TX (1 << 2) /* tx interrupt status */ #define AACI_ISR_TX (1 << 2) /* tx interrupt status */
#define AACI_ISR_RXTO (1 << 1) /* rx timeout */ #define AACI_ISR_RXTO (1 << 1) /* rx timeout */
#define AACI_ISR_TXC (1 << 0) /* tx complete */ #define AACI_ISR_TXC (1 << 0) /* tx complete */
/* interrupt enable */ /* interrupt enable */
#define AACI_IE_RXTOFE (1 << 6) /* rx timeout fifo empty */ #define AACI_IE_RXTOFE (1 << 6) /* rx timeout fifo empty */
#define AACI_IE_UR (1 << 5) /* tx fifo underrun */ #define AACI_IE_UR (1 << 5) /* tx fifo underrun */
#define AACI_IE_OR (1 << 4) /* rx fifo overrun */ #define AACI_IE_OR (1 << 4) /* rx fifo overrun */
#define AACI_IE_RX (1 << 3) /* rx interrupt status */ #define AACI_IE_RX (1 << 3) /* rx interrupt status */
#define AACI_IE_TX (1 << 2) /* tx interrupt status */ #define AACI_IE_TX (1 << 2) /* tx interrupt status */
#define AACI_IE_RXTO (1 << 1) /* rx timeout */ #define AACI_IE_RXTO (1 << 1) /* rx timeout */
#define AACI_IE_TXC (1 << 0) /* tx complete */ #define AACI_IE_TXC (1 << 0) /* tx complete */
/* slot flag register bits */ /* slot flag register bits */
#define AACI_SLFR_RWIS (1 << 13) /* raw wake-up interrupt status */ #define AACI_SLFR_RWIS (1 << 13) /* raw wake-up interrupt status */
@@ -120,7 +120,7 @@
#define AACI_ICLR_RXOEC2 (1 << 2) /* Receive overrun error clear */ #define AACI_ICLR_RXOEC2 (1 << 2) /* Receive overrun error clear */
#define AACI_ICLR_RXOEC1 (1 << 1) /* Receive overrun error clear */ #define AACI_ICLR_RXOEC1 (1 << 1) /* Receive overrun error clear */
#define AACI_ICLR_WISC (1 << 0) /* Wake-up interrupt status clear */ #define AACI_ICLR_WISC (1 << 0) /* Wake-up interrupt status clear */
/* Main control register bits AACI_MAINCR */ /* Main control register bits AACI_MAINCR */
#define AACI_MAINCR_SCRA(x) ((x) << 10) /* secondary codec reg access */ #define AACI_MAINCR_SCRA(x) ((x) << 10) /* secondary codec reg access */
#define AACI_MAINCR_DMAEN (1 << 9) /* dma enable */ #define AACI_MAINCR_DMAEN (1 << 9) /* dma enable */
@@ -141,8 +141,8 @@
#define SYNC_FORCE (1 << 0) #define SYNC_FORCE (1 << 0)
/* Main flag register bits. P66 */ /* Main flag register bits. P66 */
#define MAINFR_TXB (1 << 1) /* transmit busy */ #define MAINFR_TXB (1 << 1) /* transmit busy */
#define MAINFR_RXB (1 << 0) /* receive busy */ #define MAINFR_RXB (1 << 0) /* receive busy */
#define PL041_CHANNEL_LEFT_DAC (0x1 << 3) #define PL041_CHANNEL_LEFT_DAC (0x1 << 3)
#define PL041_CHANNEL_RIGHT_DAC (0x1 << 3) #define PL041_CHANNEL_RIGHT_DAC (0x1 << 3)
bsp/qemu-vexpress-a9/drivers/audio/drv_sound.c
+2 -2
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@@ -1,6 +1,6 @@
/* /*
* Copyright (c) 2006-2018, RT-Thread Development Team * Copyright (c) 2006-2021, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *
* Date Author Notes * Date Author Notes
bsp/qemu-vexpress-a9/drivers/audio/drv_sound.h
+2 -2
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@@ -1,6 +1,6 @@
/* /*
* Copyright (c) 2006-2018, RT-Thread Development Team * Copyright (c) 2006-2021, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *
* Date Author Notes * Date Author Notes
bsp/qemu-vexpress-a9/drivers/board.c
+1 -1
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@@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2018, RT-Thread Development Team * Copyright (c) 2006-2021, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *
bsp/qemu-vexpress-a9/drivers/board.h
+1 -1
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@@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2020, RT-Thread Development Team * Copyright (c) 2006-2021, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *
bsp/qemu-vexpress-a9/drivers/drv_clcd.c
+3 -3
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@@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2020, RT-Thread Development Team * Copyright (c) 2006-2021, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *
@@ -88,7 +88,7 @@ static rt_err_t drv_clcd_control(struct rt_device *device, int cmd, void *args)
} }
#ifdef RT_USING_DEVICE_OPS #ifdef RT_USING_DEVICE_OPS
const static struct rt_device_ops clcd_ops = const static struct rt_device_ops clcd_ops =
{ {
drv_clcd_init, drv_clcd_init,
RT_NULL, RT_NULL,
@@ -109,7 +109,7 @@ int drv_clcd_hw_init(void)
_lcd.width = CLCD_WIDTH; _lcd.width = CLCD_WIDTH;
_lcd.height = CLCD_HEIGHT; _lcd.height = CLCD_HEIGHT;
_lcd.fb = rt_malloc (_lcd.width * _lcd.height * 2); _lcd.fb = rt_malloc_align(_lcd.width * _lcd.height * 2, 32);
if (_lcd.fb == NULL) if (_lcd.fb == NULL)
{ {
rt_kprintf("initialize frame buffer failed!\n"); rt_kprintf("initialize frame buffer failed!\n");
bsp/qemu-vexpress-a9/drivers/drv_clcd.h
+1 -1
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@@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2020, RT-Thread Development Team * Copyright (c) 2006-2021, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *
bsp/qemu-vexpress-a9/drivers/drv_keyboard.c
+4 -4
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@@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2020, RT-Thread Development Team * Copyright (c) 2006-2021, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *
@@ -141,7 +141,7 @@ static const struct keymap map[] = {
{0x74, RTGUIK_RIGHT, 0, "RIGHT" }, {0x74, RTGUIK_RIGHT, 0, "RIGHT" },
{0x0d, RTGUIK_TAB, 0, "TAB" }, {0x0d, RTGUIK_TAB, 0, "TAB" },
{0x76, RTGUIK_ESCAPE, 0, "ESC" }, {0x76, RTGUIK_ESCAPE, 0, "ESC" },
{0x37, RTGUIK_POWER, 0, "POWER" }, {0x37, RTGUIK_POWER, 0, "POWER" },
{0x5a, RTGUIK_KP_ENTER, 0, "ENTER"}, {0x5a, RTGUIK_KP_ENTER, 0, "ENTER"},
{0x66, RTGUIK_BACKSPACE, 0, "BACKSPACE"}, {0x66, RTGUIK_BACKSPACE, 0, "BACKSPACE"},
}; };
@@ -433,12 +433,12 @@ int rt_hw_keyboard_init(void)
struct keyboard_pl050_pdata_t *pdat; struct keyboard_pl050_pdata_t *pdat;
virtual_addr_t virt = (virtual_addr_t)KEYBOARD_ADDRESS; virtual_addr_t virt = (virtual_addr_t)KEYBOARD_ADDRESS;
int irq = KEYBOARD_IRQ_NUM; int irq = KEYBOARD_IRQ_NUM;
id = (((read32(virt + 0xfec) & 0xff) << 24) | id = (((read32(virt + 0xfec) & 0xff) << 24) |
((read32(virt + 0xfe8) & 0xff) << 16) | ((read32(virt + 0xfe8) & 0xff) << 16) |
((read32(virt + 0xfe4) & 0xff) << 8) | ((read32(virt + 0xfe4) & 0xff) << 8) |
((read32(virt + 0xfe0) & 0xff) << 0)); ((read32(virt + 0xfe0) & 0xff) << 0));
if(((id >> 12) & 0xff) != 0x41 || (id & 0xfff) != 0x050) if(((id >> 12) & 0xff) != 0x41 || (id & 0xfff) != 0x050)
{ {
LOG_E("read id fail id:0x%08x", id); LOG_E("read id fail id:0x%08x", id);
bsp/qemu-vexpress-a9/drivers/drv_keyboard.h
+1 -1
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@@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2020, RT-Thread Development Team * Copyright (c) 2006-2021, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *
bsp/qemu-vexpress-a9/drivers/drv_mouse.c
+1 -1
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@@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2020, RT-Thread Development Team * Copyright (c) 2006-2021, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *
bsp/qemu-vexpress-a9/drivers/drv_mouse.h
+2 -2
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@@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2020, RT-Thread Development Team * Copyright (c) 2006-2021, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *
@@ -12,4 +12,4 @@
int rt_hw_mouse_init(void); int rt_hw_mouse_init(void);
#endif #endif
bsp/qemu-vexpress-a9/drivers/drv_sdio.c
+3 -3
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@@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2020, RT-Thread Development Team * Copyright (c) 2006-2021, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *
@@ -295,7 +295,7 @@ static rt_err_t sdhci_pl180_setclock(struct sdhci_t * sdhci, rt_uint32_t clock)
if(clock) if(clock)
{ {
temp = read32(pdat->virt + PL180_CLOCK) | (0x1<<8); temp = read32(pdat->virt + PL180_CLOCK) | (0x1<<8);
temp = temp; // skip warning temp = temp; // skip warning
write32(pdat->virt + PL180_CLOCK, 0x100); write32(pdat->virt + PL180_CLOCK, 0x100);
} }
else else
@@ -388,7 +388,7 @@ static void mmc_set_iocfg(struct rt_mmcsd_host *host, struct rt_mmcsd_io_cfg *io
LOG_D("clock:%d bus_width:%d", io_cfg->clock, io_cfg->bus_width); LOG_D("clock:%d bus_width:%d", io_cfg->clock, io_cfg->bus_width);
} }
static const struct rt_mmcsd_host_ops ops = static const struct rt_mmcsd_host_ops ops =
{ {
mmc_request_send, mmc_request_send,
mmc_set_iocfg, mmc_set_iocfg,
bsp/qemu-vexpress-a9/drivers/drv_sdio.h
+1 -1
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@@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2020, RT-Thread Development Team * Copyright (c) 2006-2021, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *
bsp/qemu-vexpress-a9/drivers/drv_timer.c
+5 -5
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@@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2018, RT-Thread Development Team * Copyright (c) 2006-2021, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *
@@ -89,7 +89,7 @@ void timer_init(int timer, unsigned int preload)
{ {
uint32_t val; uint32_t val;
if (timer == 0) if (timer == 0)
{ {
/* Setup Timer0 for generating irq */ /* Setup Timer0 for generating irq */
val = TIMER_CTRL(TIMER01_HW_BASE); val = TIMER_CTRL(TIMER01_HW_BASE);
@@ -101,8 +101,8 @@ void timer_init(int timer, unsigned int preload)
/* enable timer */ /* enable timer */
TIMER_CTRL(TIMER01_HW_BASE) |= TIMER_CTRL_ENABLE; TIMER_CTRL(TIMER01_HW_BASE) |= TIMER_CTRL_ENABLE;
} }
else else
{ {
/* Setup Timer1 for generating irq */ /* Setup Timer1 for generating irq */
val = TIMER_CTRL(TIMER23_HW_BASE); val = TIMER_CTRL(TIMER23_HW_BASE);
@@ -122,7 +122,7 @@ void timer_clear_pending(int timer)
if (timer == 0) if (timer == 0)
{ {
TIMER_INTCLR(TIMER01_HW_BASE) = 0x01; TIMER_INTCLR(TIMER01_HW_BASE) = 0x01;
} }
else else
{ {
TIMER_INTCLR(TIMER23_HW_BASE) = 0x01; TIMER_INTCLR(TIMER23_HW_BASE) = 0x01;
bsp/qemu-vexpress-a9/drivers/drv_timer.h
+1 -1
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@@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2018, RT-Thread Development Team * Copyright (c) 2006-2021, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *
bsp/qemu-vexpress-a9/drivers/lvgl/lv_conf.h
+3 -2
View File
@@ -11,11 +11,12 @@
#ifndef LV_CONF_H #ifndef LV_CONF_H
#define LV_CONF_H #define LV_CONF_H
#define LV_USE_PERF_MONITOR 1 #define LV_USE_PERF_MONITOR 1
#define LV_COLOR_DEPTH 16 #define LV_COLOR_DEPTH 16
/* music player demo */ /* music player demo */
#include <rtconfig.h> #include <rtconfig.h>
#define LV_DISP_DEF_REFR_PERIOD 10
#define LV_HOR_RES_MAX BSP_LCD_WIDTH #define LV_HOR_RES_MAX BSP_LCD_WIDTH
#define LV_VER_RES_MAX BSP_LCD_HEIGHT #define LV_VER_RES_MAX BSP_LCD_HEIGHT
#define LV_USE_DEMO_RTT_MUSIC 1 #define LV_USE_DEMO_RTT_MUSIC 1
bsp/qemu-vexpress-a9/drivers/lvgl/lv_port_disp.c
+21 -84
View File
@@ -13,18 +13,11 @@
/*A static or global variable to store the buffers*/ /*A static or global variable to store the buffers*/
static lv_disp_draw_buf_t disp_buf; static lv_disp_draw_buf_t disp_buf;
rt_device_t lcd_device = 0; static rt_device_t lcd_device = 0;
static struct rt_device_graphic_info info; static struct rt_device_graphic_info info;
static lv_disp_drv_t disp_drv; /*Descriptor of a display driver*/ static lv_disp_drv_t disp_drv; /*Descriptor of a display driver*/
typedef struct
{
uint8_t blue;
uint8_t green;
uint8_t red;
} lv_color24_t;
static void color_to16_maybe(lv_color16_t *dst, lv_color_t *src) static void color_to16_maybe(lv_color16_t *dst, lv_color_t *src)
{ {
#if (LV_COLOR_DEPTH == 16) #if (LV_COLOR_DEPTH == 16)
@@ -36,13 +29,6 @@ static void color_to16_maybe(lv_color16_t *dst, lv_color_t *src)
#endif #endif
} }
static void color_to24(lv_color24_t *dst, lv_color_t *src)
{
dst->blue = src->ch.blue;
dst->green = src->ch.green;
dst->red = src->ch.red;
}
/*Flush the content of the internal buffer the specific area on the display /*Flush the content of the internal buffer the specific area on the display
*You can use DMA or any hardware acceleration to do this operation in the background but *You can use DMA or any hardware acceleration to do this operation in the background but
*'lv_disp_flush_ready()' has to be called when finished.*/ *'lv_disp_flush_ready()' has to be called when finished.*/
@@ -75,76 +61,19 @@ static void lcd_fb_flush(lv_disp_drv_t *disp_drv, const lv_area_t *area, lv_colo
uint32_t y; uint32_t y;
long int location = 0; long int location = 0;
/* 8 bit per pixel */
if (info.bits_per_pixel == 8)
{
uint8_t *fbp8 = (uint8_t *)info.framebuffer;
//TODO color convert maybe
for (y = act_y1; y <= act_y2; y++)
{
for (x = act_x1; x <= act_x2; x++)
{
location = (x) + (y)*info.width;
fbp8[location] = color_p->full;
color_p++;
}
color_p += x2 - act_x2;
}
}
/* 16 bit per pixel */ /* 16 bit per pixel */
else if (info.bits_per_pixel == 16) lv_color16_t *fbp16 = (lv_color16_t *)info.framebuffer;
for (y = act_y1; y <= act_y2; y++)
{ {
lv_color16_t *fbp16 = (lv_color16_t *)info.framebuffer; for (x = act_x1; x <= act_x2; x++)
for (y = act_y1; y <= act_y2; y++)
{ {
for (x = act_x1; x <= act_x2; x++) location = (x) + (y)*info.width;
{ color_to16_maybe(&fbp16[location], color_p);
location = (x) + (y)*info.width; color_p++;
color_to16_maybe(&fbp16[location], color_p);
color_p++;
}
color_p += x2 - act_x2;
} }
}
/* 24 bit per pixel */ color_p += x2 - act_x2;
else if (info.bits_per_pixel == 24)
{
lv_color24_t *fbp24 = (lv_color24_t *)info.framebuffer;
for (y = act_y1; y <= act_y2; y++)
{
for (x = act_x1; x <= act_x2; x++)
{
location = (x) + (y)*info.width;
color_to24(&fbp24[location], color_p);
color_p++;
}
color_p += x2 - act_x2;
}
}
/* 32 bit per pixel */
else if (info.bits_per_pixel == 32)
{
uint32_t *fbp32 = (uint32_t *)info.framebuffer;
//TODO
for (y = act_y1; y <= act_y2; y++)
{
for (x = act_x1; x <= act_x2; x++)
{
location = (x) + (y)*info.width;
fbp32[location] = color_p->full;
color_p++;
}
color_p += x2 - act_x2;
}
} }
struct rt_device_rect_info rect_info; struct rt_device_rect_info rect_info;
@@ -161,7 +90,7 @@ static void lcd_fb_flush(lv_disp_drv_t *disp_drv, const lv_area_t *area, lv_colo
void lv_port_disp_init(void) void lv_port_disp_init(void)
{ {
rt_err_t result; rt_err_t result;
lv_color_t *fbuf; lv_color_t *fbuf1, *fbuf2;
lcd_device = rt_device_find("lcd"); lcd_device = rt_device_find("lcd");
if (lcd_device == 0) if (lcd_device == 0)
@@ -187,15 +116,23 @@ void lv_port_disp_init(void)
RT_ASSERT(info.bits_per_pixel == 8 || info.bits_per_pixel == 16 || RT_ASSERT(info.bits_per_pixel == 8 || info.bits_per_pixel == 16 ||
info.bits_per_pixel == 24 || info.bits_per_pixel == 32); info.bits_per_pixel == 24 || info.bits_per_pixel == 32);
fbuf = rt_malloc(info.width * info.height / 10); fbuf1 = rt_malloc_align(info.width * info.height * sizeof(lv_color_t), 32);
if (!fbuf) if (fbuf1 == RT_NULL)
{ {
rt_kprintf("Error: alloc disp buf fail\n"); rt_kprintf("Error: alloc disp buf fail\n");
return; return;
} }
fbuf2 = rt_malloc_align(info.width * info.height * sizeof(lv_color_t), 32);
if (fbuf2 == RT_NULL)
{
rt_kprintf("Error: alloc disp buf fail\n");
rt_free(fbuf1);
return;
}
/*Initialize `disp_buf` with the buffer(s). With only one buffer use NULL instead buf_2 */ /*Initialize `disp_buf` with the buffer(s). With only one buffer use NULL instead buf_2 */
lv_disp_draw_buf_init(&disp_buf, fbuf, RT_NULL, info.width * 10); lv_disp_draw_buf_init(&disp_buf, fbuf1, fbuf2, info.width * info.height);
lv_disp_drv_init(&disp_drv); /*Basic initialization*/ lv_disp_drv_init(&disp_drv); /*Basic initialization*/
bsp/qemu-vexpress-a9/drivers/realview.h
+1 -1
View File
@@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2020, RT-Thread Development Team * Copyright (c) 2006-2021, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *
bsp/qemu-vexpress-a9/drivers/secondary_cpu.c
+1 -1
View File
@@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2018, RT-Thread Development Team * Copyright (c) 2006-2021, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *
bsp/qemu-vexpress-a9/drivers/serial.c
+1 -1
View File
@@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2020, RT-Thread Development Team * Copyright (c) 2006-2021, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *
bsp/qemu-vexpress-a9/drivers/serial.h
+1 -1
View File
@@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2020, RT-Thread Development Team * Copyright (c) 2006-2021, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *
bsp/qemu-vexpress-a9/drivers/vexpress_a9.h
+1 -1
View File
@@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2018, RT-Thread Development Team * Copyright (c) 2006-2021, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *