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[fixup] aarch64 UMP compiler error (#8677)

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Signed-off-by: Shell <smokewood@qq.com>
This commit is contained in:
Shell
2024-03-30 17:58:38 +08:00
committed by GitHub
parent 6d1bc9b2f8
commit 864055bf18
11 changed files with 30 additions and 24 deletions
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4
libcpu/aarch64/common/SConscript
View File

@@ -12,8 +12,8 @@ if GetDepend('RT_USING_OFW') == False:
SrcRemove(src, ['setup.c', 'cpu_psci.c', 'psci.c'])
if GetDepend('RT_USING_PIC') == True:
SrcRemove(src, ['gicv3.c', 'gic.c', 'interrupt.c', 'gtimer.c'])
SrcRemove(src, ['gicv3.c', 'gic.c', 'gtimer.c'])
group = DefineGroup('libcpu', src, depend = [''], CPPPATH = CPPPATH)
# build for sub-directory

23
libcpu/aarch64/common/interrupt.c
View File

@@ -16,10 +16,6 @@
#include "gicv3.h"
#include "ioremap.h"
/* exception and interrupt handler table */
struct rt_irq_desc isr_table[MAX_HANDLERS];
#ifndef RT_USING_SMP
/* Those variables will be accessed in ISR, so we need to share them. */
rt_ubase_t rt_interrupt_from_thread = 0;
@@ -27,6 +23,11 @@ rt_ubase_t rt_interrupt_to_thread = 0;
rt_ubase_t rt_thread_switch_interrupt_flag = 0;
#endif
#ifndef RT_USING_PIC
/* exception and interrupt handler table */
struct rt_irq_desc isr_table[MAX_HANDLERS];
#ifndef RT_CPUS_NR
#define RT_CPUS_NR 1
#endif
@@ -138,17 +139,17 @@ void rt_hw_interrupt_mask(int vector)
#ifdef SOC_BCM283x
if (vector < 32)
{
IRQ_DISABLE1 = (1 << vector);
IRQ_DISABLE1 = (1UL << vector);
}
else if (vector < 64)
{
vector = vector % 32;
IRQ_DISABLE2 = (1 << vector);
IRQ_DISABLE2 = (1UL << vector);
}
else
{
vector = vector - 64;
IRQ_DISABLE_BASIC = (1 << vector);
IRQ_DISABLE_BASIC = (1UL << vector);
}
#else
arm_gic_mask(0, vector);
@@ -164,17 +165,17 @@ void rt_hw_interrupt_umask(int vector)
#ifdef SOC_BCM283x
if (vector < 32)
{
IRQ_ENABLE1 = (1 << vector);
IRQ_ENABLE1 = (1UL << vector);
}
else if (vector < 64)
{
vector = vector % 32;
IRQ_ENABLE2 = (1 << vector);
IRQ_ENABLE2 = (1UL << vector);
}
else
{
vector = vector - 64;
IRQ_ENABLE_BASIC = (1 << vector);
IRQ_ENABLE_BASIC = (1UL << vector);
}
#else
arm_gic_umask(0, vector);
@@ -416,6 +417,8 @@ void rt_hw_ipi_handler_install(int ipi_vector, rt_isr_handler_t ipi_isr_handler)
}
#endif
#endif /* RT_USING_PIC */
#if defined(FINSH_USING_MSH) && defined(RT_USING_INTERRUPT_INFO)
int list_isr()
{

3
libcpu/aarch64/common/mmu.c
View File

@@ -688,6 +688,7 @@ static unsigned long *_query(rt_aspace_t aspace, void *vaddr, int *plvl_shf)
if (!(cur_lv_tbl[off] & MMU_TYPE_USED))
{
*plvl_shf = level_shift;
return (void *)0;
}
@@ -707,11 +708,11 @@ static unsigned long *_query(rt_aspace_t aspace, void *vaddr, int *plvl_shf)
off &= MMU_LEVEL_MASK;
page = cur_lv_tbl[off];
*plvl_shf = level_shift;
if (!(page & MMU_TYPE_USED))
{
return (void *)0;
}
*plvl_shf = level_shift;
return &cur_lv_tbl[off];
}