diff --git a/bsp/stm32f10x/ili_lcd_general.c b/bsp/stm32f10x/ili_lcd_general.c
index 04b1c17381..1fff85f55f 100644
--- a/bsp/stm32f10x/ili_lcd_general.c
+++ b/bsp/stm32f10x/ili_lcd_general.c
@@ -105,6 +105,10 @@ static void LCD_FSMCConfig(void)
     /* FSMC GPIO configure */
 
     /*-- FSMC Configuration -------------------------------------------------*/
+    FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &Timing_read;
+    FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &Timing_write;
+    FSMC_NORSRAMStructInit(&FSMC_NORSRAMInitStructure);
+
     Timing_read.FSMC_AddressSetupTime = 3;             /* 地址建立时间  */
     Timing_read.FSMC_DataSetupTime = 4;                /* 数据建立时间  */
     Timing_read.FSMC_AccessMode = FSMC_AccessMode_A;    /* FSMC 访问模式 */
@@ -134,8 +138,6 @@ static void LCD_FSMCConfig(void)
     FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable;
     FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Enable;
     FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable;
-    FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &Timing_read;
-    FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &Timing_write;
 
     FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure);
     FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM2, ENABLE);
diff --git a/bsp/stm32f10x/rtconfig.h b/bsp/stm32f10x/rtconfig.h
index ed4558978f..805e212f88 100644
--- a/bsp/stm32f10x/rtconfig.h
+++ b/bsp/stm32f10x/rtconfig.h
@@ -138,6 +138,11 @@
 #define RT_LWIP_ETHTHREAD_MBOX_SIZE		10
 #define RT_LWIP_ETHTHREAD_STACKSIZE		512
 
+/* TCP sender buffer space */
+#define RT_LWIP_TCP_SND_BUF	8192
+/* TCP receive window. */
+#define RT_LWIP_TCP_WND		8192
+
 /* SECTION: RT-Thread/GUI */
 /* #define RT_USING_RTGUI */
 
diff --git a/bsp/stm32f10x/ssd1289.c b/bsp/stm32f10x/ssd1289.c
index 6904b50499..a079ed74b2 100644
--- a/bsp/stm32f10x/ssd1289.c
+++ b/bsp/stm32f10x/ssd1289.c
@@ -104,12 +104,18 @@ static void LCD_FSMCConfig(void)
     /* FSMC GPIO configure */
 
     /*-- FSMC Configuration -------------------------------------------------*/
-    Timing_read.FSMC_AddressSetupTime = 30;             /* 地址建立时间  */
-    Timing_read.FSMC_DataSetupTime = 30;                /* 数据建立时间  */
+    FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &Timing_read;
+    FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &Timing_write;
+    FSMC_NORSRAMStructInit(&FSMC_NORSRAMInitStructure);
+
+    Timing_read.FSMC_AddressSetupTime = 8;             /* 地址建立时间  */
+    Timing_read.FSMC_AddressHoldTime  = 8;             /* 地址保持时间  */
+    Timing_read.FSMC_DataSetupTime = 8;                /* 数据建立时间  */
     Timing_read.FSMC_AccessMode = FSMC_AccessMode_A;    /* FSMC 访问模式 */
 
-    Timing_write.FSMC_AddressSetupTime = 3;             /* 地址建立时间  */
-    Timing_write.FSMC_DataSetupTime = 3;                /* 数据建立时间  */
+    Timing_write.FSMC_AddressSetupTime = 8;             /* 地址建立时间  */
+    Timing_write.FSMC_AddressHoldTime  = 8;             /* 地址保持时间  */
+    Timing_write.FSMC_DataSetupTime = 8;                /* 数据建立时间  */
     Timing_write.FSMC_AccessMode = FSMC_AccessMode_A;   /* FSMC 访问模式 */
 
     /* Color LCD configuration ------------------------------------
@@ -133,8 +139,6 @@ static void LCD_FSMCConfig(void)
     FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable;
     FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Enable;
     FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable;
-    FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &Timing_read;
-    FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &Timing_write;
 
     FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure);
     FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM2, ENABLE);
diff --git a/bsp/stm32f10x/startup.c b/bsp/stm32f10x/startup.c
index 0218c4a698..81e3b9c552 100644
--- a/bsp/stm32f10x/startup.c
+++ b/bsp/stm32f10x/startup.c
@@ -39,7 +39,6 @@ extern int Image$$RW_IRAM1$$ZI$$Limit;
 extern int __bss_end;
 #endif
 
-#ifdef  DEBUG
 /*******************************************************************************
 * Function Name  : assert_failed
 * Description    : Reports the name of the source file and the source line number
@@ -57,7 +56,6 @@ void assert_failed(u8* file, u32 line)
 
 	while (1) ;
 }
-#endif
 
 /**
  * This function will startup RT-Thread RTOS.
diff --git a/bsp/stm32f10x/stm32f10x_conf.h b/bsp/stm32f10x/stm32f10x_conf.h
index 59549e3bf1..1dd7e8faa7 100644
--- a/bsp/stm32f10x/stm32f10x_conf.h
+++ b/bsp/stm32f10x/stm32f10x_conf.h
@@ -53,7 +53,7 @@
 /* Exported constants --------------------------------------------------------*/
 /* Uncomment the line below to expanse the "assert_param" macro in the 
    Standard Peripheral Library drivers code */
-/* #define USE_FULL_ASSERT    1 */
+#define USE_FULL_ASSERT    1
 
 /* Exported macro ------------------------------------------------------------*/
 #ifdef  USE_FULL_ASSERT
diff --git a/bsp/stm32f10x/usart.c b/bsp/stm32f10x/usart.c
index 5c7144ec87..dc6b1485c7 100644
--- a/bsp/stm32f10x/usart.c
+++ b/bsp/stm32f10x/usart.c
@@ -189,7 +189,8 @@ static void NVIC_Configuration(void)
 #ifdef RT_USING_UART1
 	/* Enable the USART1 Interrupt */
 	NVIC_InitStructure.NVIC_IRQChannel = USART1_IRQn;
-	NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
+	NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1;
+	NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;
 	NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
 	NVIC_Init(&NVIC_InitStructure);
 #endif
@@ -197,6 +198,7 @@ static void NVIC_Configuration(void)
 #ifdef RT_USING_UART2
 	/* Enable the USART2 Interrupt */
 	NVIC_InitStructure.NVIC_IRQChannel = USART2_IRQn;
+	NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1;
 	NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;
 	NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
 	NVIC_Init(&NVIC_InitStructure);
@@ -205,12 +207,14 @@ static void NVIC_Configuration(void)
 #ifdef RT_USING_UART3
 	/* Enable the USART3 Interrupt */
 	NVIC_InitStructure.NVIC_IRQChannel = USART3_IRQn;
+	NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1;
 	NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;
 	NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
 	NVIC_Init(&NVIC_InitStructure);
 
 	/* Enable the DMA1 Channel2 Interrupt */
 	NVIC_InitStructure.NVIC_IRQChannel = DMA1_Channel2_IRQn;
+	NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1;
 	NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;
 	NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
 	NVIC_Init(&NVIC_InitStructure);