From cc30bd375681fdddd7e6b0bf044171f933c612d3 Mon Sep 17 00:00:00 2001
From: tangyuxin <462747508@qq.com>
Date: Fri, 25 May 2018 15:59:49 +0800
Subject: [PATCH] =?UTF-8?q?[bsp][qemu]=E6=9B=B4=E6=94=B9=E4=B8=AD=E6=96=AD?=
 =?UTF-8?q?=E6=A0=88=E5=A4=A7=E5=B0=8F=E4=B8=BA2048?=
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---
 bsp/qemu-vexpress-a9/cpu/start_gcc.S | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/bsp/qemu-vexpress-a9/cpu/start_gcc.S b/bsp/qemu-vexpress-a9/cpu/start_gcc.S
index 4ab8a4149d..569b14fbc1 100644
--- a/bsp/qemu-vexpress-a9/cpu/start_gcc.S
+++ b/bsp/qemu-vexpress-a9/cpu/start_gcc.S
@@ -34,11 +34,11 @@
 .equ F_Bit,           0x40            @ when F bit is set, FIQ is disabled
 
 .equ UND_Stack_Size,     0x00000000
-.equ SVC_Stack_Size,     0x00000100
+.equ SVC_Stack_Size,     0x00000400
 .equ ABT_Stack_Size,     0x00000000
 .equ RT_FIQ_STACK_PGSZ,  0x00000000
-.equ RT_IRQ_STACK_PGSZ,  0x00000100
-.equ USR_Stack_Size,     0x00000100
+.equ RT_IRQ_STACK_PGSZ,  0x00000800
+.equ USR_Stack_Size,     0x00000400
 
 #define ISR_Stack_Size  (UND_Stack_Size + SVC_Stack_Size + ABT_Stack_Size + \
                  RT_FIQ_STACK_PGSZ + RT_IRQ_STACK_PGSZ)