mirror of
https://github.com/RT-Thread/rt-thread.git
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add the s3c2440 code from old s3c2410 port.
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@196 bbd45198-f89e-11dd-88c7-29a3b14d5316
This commit is contained in:
bernard.xiong
@@ -0,0 +1,77 @@
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/*
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* File : clock.c
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* This file is part of RT-Thread RTOS
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* COPYRIGHT (C) 2006, RT-Thread Development Team
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://openlab.rt-thread.com/license/LICENSE
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*
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* Change Logs:
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* Date Author Notes
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* 2008-04-25 Yi.qiu first version
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*/
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#include <rtthread.h>
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#include "s3c24x0.h"
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#define CONFIG_SYS_CLK_FREQ 12000000 // Fin = 12.00MHz
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rt_uint32_t PCLK;
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rt_uint32_t FCLK;
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rt_uint32_t HCLK;
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rt_uint32_t UCLK;
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void rt_hw_get_clock(void)
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{
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rt_uint32_t val;
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rt_uint8_t m, p, s;
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val = MPLLCON;
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m = (val>>12)&0xff;
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p = (val>>4)&0x3f;
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s = val&3;
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FCLK = ((m+8)*(CONFIG_SYS_CLK_FREQ/100)*2)/((p+2)*(1<<s))*100;
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val = CLKDIVN;
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m = (val>>1)&3;
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p = val&1;
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switch (m) {
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case 0:
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HCLK = FCLK;
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break;
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case 1:
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HCLK = FCLK>>1;
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break;
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case 2:
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if(s&2)
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HCLK = FCLK>>3;
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else
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HCLK = FCLK>>2;
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break;
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case 3:
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if(s&1)
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HCLK = FCLK/6;
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else
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HCLK = FCLK/3;
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break;
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}
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if(p)
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PCLK = HCLK>>1;
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else
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PCLK = HCLK;
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}
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void rt_hw_set_clock(rt_uint8_t sdiv, rt_uint8_t pdiv, rt_uint8_t mdiv)
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{
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MPLLCON = sdiv | pdiv<<4 | mdiv<<12;
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}
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void rt_hw_set_dividor(rt_uint8_t hdivn, rt_uint8_t pdivn)
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{
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CLKDIVN = (hdivn<<1) | pdivn;
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}
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@@ -0,0 +1,99 @@
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/*
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* File : context.S
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* This file is part of RT-Thread RTOS
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* COPYRIGHT (C) 2006, RT-Thread Development Team
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://openlab.rt-thread.com/license/LICENSE
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*
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* Change Logs:
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* Date Author Notes
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* 2006-09-06 XuXinming first version
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*/
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/*!
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* \addtogroup S3C24X0
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*/
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/*@{*/
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#define NOINT 0xc0
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/*
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* rt_base_t rt_hw_interrupt_disable();
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*/
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.globl rt_hw_interrupt_disable
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rt_hw_interrupt_disable:
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mrs r0, cpsr
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orr r1, r0, #NOINT
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msr cpsr_c, r1
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mov pc, lr
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/*
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* void rt_hw_interrupt_enable(rt_base_t level);
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*/
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.globl rt_hw_interrupt_enable
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rt_hw_interrupt_enable:
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msr cpsr, r0
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mov pc, lr
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/*
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* void rt_hw_context_switch(rt_uint32 from, rt_uint32 to);
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* r0 --> from
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* r1 --> to
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*/
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.globl rt_hw_context_switch
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rt_hw_context_switch:
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stmfd sp!, {lr} @ push pc (lr should be pushed in place of PC)
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stmfd sp!, {r0-r12, lr} @ push lr & register file
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mrs r4, cpsr
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stmfd sp!, {r4} @ push cpsr
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mrs r4, spsr
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stmfd sp!, {r4} @ push spsr
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str sp, [r0] @ store sp in preempted tasks TCB
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ldr sp, [r1] @ get new task stack pointer
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ldmfd sp!, {r4} @ pop new task spsr
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msr spsr_cxsf, r4
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ldmfd sp!, {r4} @ pop new task cpsr
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msr cpsr_cxsf, r4
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ldmfd sp!, {r0-r12, lr, pc} @ pop new task r0-r12, lr & pc
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/*
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* void rt_hw_context_switch_to(rt_uint32 to);
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* r0 --> to
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*/
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.globl rt_hw_context_switch_to
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rt_hw_context_switch_to:
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ldr sp, [r0] @ get new task stack pointer
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ldmfd sp!, {r4} @ pop new task spsr
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msr spsr_cxsf, r4
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ldmfd sp!, {r4} @ pop new task cpsr
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msr cpsr_cxsf, r4
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ldmfd sp!, {r0-r12, lr, pc} @ pop new task r0-r12, lr & pc
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/*
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* void rt_hw_context_switch_interrupt(rt_uint32 from, rt_uint32 to);
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*/
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.globl rt_thread_switch_interrput_flag
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.globl rt_interrupt_from_thread
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.globl rt_interrupt_to_thread
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.globl rt_hw_context_switch_interrupt
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rt_hw_context_switch_interrupt:
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ldr r2, =rt_thread_switch_interrput_flag
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ldr r3, [r2]
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cmp r3, #1
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beq _reswitch
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mov r3, #1 @ set rt_thread_switch_interrput_flag to 1
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str r3, [r2]
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ldr r2, =rt_interrupt_from_thread @ set rt_interrupt_from_thread
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str r0, [r2]
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_reswitch:
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ldr r2, =rt_interrupt_to_thread @ set rt_interrupt_to_thread
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str r1, [r2]
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mov pc, lr
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@@ -0,0 +1,107 @@
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;/*
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; * File : context_rvds.S
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; * This file is part of RT-Thread RTOS
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; * COPYRIGHT (C) 2006, RT-Thread Development Team
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; *
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; * The license and distribution terms for this file may be
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; * found in the file LICENSE in this distribution or at
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; * http://www.rt-thread.org/license/LICENSE
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; *
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; * Change Logs:
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; * Date Author Notes
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; * 2009-01-20 Bernard first version
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; */
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NOINT EQU 0xc0 ; disable interrupt in psr
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AREA |.text|, CODE, READONLY, ALIGN=2
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ARM
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REQUIRE8
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PRESERVE8
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;/*
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; * rt_base_t rt_hw_interrupt_disable();
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; */
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rt_hw_interrupt_disable PROC
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EXPORT rt_hw_interrupt_disable
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MRS r0, cpsr
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ORR r1, r0, #NOINT
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MSR cpsr_c, r1
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BX lr
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ENDP
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;/*
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; * void rt_hw_interrupt_enable(rt_base_t level);
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; */
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rt_hw_interrupt_enable PROC
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EXPORT rt_hw_interrupt_enable
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MSR cpsr_c, r0
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BX lr
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ENDP
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;/*
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; * void rt_hw_context_switch(rt_uint32 from, rt_uint32 to);
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; * r0 --> from
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; * r1 --> to
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; */
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rt_hw_context_switch PROC
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EXPORT rt_hw_context_switch
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STMFD sp!, {lr} ; push pc (lr should be pushed in place of PC)
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STMFD sp!, {r0-r12, lr} ; push lr & register file
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MRS r4, cpsr
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STMFD sp!, {r4} ; push cpsr
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MRS r4, spsr
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STMFD sp!, {r4} ; push spsr
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STR sp, [r0] ; store sp in preempted tasks TCB
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LDR sp, [r1] ; get new task stack pointer
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LDMFD sp!, {r4} ; pop new task spsr
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MSR spsr_cxsf, r4
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LDMFD sp!, {r4} ; pop new task cpsr
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MSR cpsr_cxsf, r4
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LDMFD sp!, {r0-r12, lr, pc} ; pop new task r0-r12, lr & pc
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ENDP
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;/*
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; * void rt_hw_context_switch_to(rt_uint32 to);
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; * r0 --> to
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; */
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rt_hw_context_switch_to PROC
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EXPORT rt_hw_context_switch_to
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LDR sp, [r0] ; get new task stack pointer
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LDMFD sp!, {r4} ; pop new task spsr
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MSR spsr_cxsf, r4
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LDMFD sp!, {r4} ; pop new task cpsr
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MSR cpsr_cxsf, r4
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LDMFD sp!, {r0-r12, lr, pc} ; pop new task r0-r12, lr & pc
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ENDP
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;/*
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; * void rt_hw_context_switch_interrupt(rt_uint32 from, rt_uint32 to);
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; */
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IMPORT rt_thread_switch_interrput_flag
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IMPORT rt_interrupt_from_thread
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IMPORT rt_interrupt_to_thread
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rt_hw_context_switch_interrupt PROC
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EXPORT rt_hw_context_switch_interrupt
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LDR r2, =rt_thread_switch_interrput_flag
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LDR r3, [r2]
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CMP r3, #1
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BEQ _reswitch
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MOV r3, #1 ; set rt_thread_switch_interrput_flag to 1
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STR r3, [r2]
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LDR r2, =rt_interrupt_from_thread ; set rt_interrupt_from_thread
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STR r0, [r2]
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_reswitch
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LDR r2, =rt_interrupt_to_thread ; set rt_interrupt_to_thread
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STR r1, [r2]
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BX lr
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ENDP
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END
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@@ -0,0 +1,143 @@
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/*
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* File : cpu.c
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* This file is part of RT-Thread RTOS
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* COPYRIGHT (C) 2006, RT-Thread Develop Team
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*
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* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://openlab.rt-thread.com/license/LICENSE
|
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*
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* Change Logs:
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* Date Author Notes
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* 2006-03-13 Bernard first version
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*/
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#include <rtthread.h>
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#include "s3c24x0.h"
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/**
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* @addtogroup S3C24X0
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*/
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/*@{*/
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#define ICACHE_MASK (rt_uint32_t)(1 << 12)
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#define DCACHE_MASK (rt_uint32_t)(1 << 2)
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static rt_uint32_t cp15_rd(void)
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{
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rt_uint32_t i;
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asm ("mrc p15, 0, %0, c1, c0, 0":"=r" (i));
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return i;
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}
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rt_inline void cache_enable(rt_uint32_t bit)
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{
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__asm__ __volatile__( \
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"mrc p15,0,r0,c1,c0,0\n\t" \
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"orr r0,r0,%0\n\t" \
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"mcr p15,0,r0,c1,c0,0" \
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: \
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:"r" (bit) \
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:"memory");
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}
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rt_inline void cache_disable(rt_uint32_t bit)
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{
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__asm__ __volatile__( \
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"mrc p15,0,r0,c1,c0,0\n\t" \
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"bic r0,r0,%0\n\t" \
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"mcr p15,0,%0,c1,c0,0" \
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: \
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:"r" (bit) \
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:"memory");
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}
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/**
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* enable I-Cache
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*
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*/
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void rt_hw_cpu_icache_enable()
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{
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cache_enable(ICACHE_MASK);
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}
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/**
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* disable I-Cache
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*
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*/
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void rt_hw_cpu_icache_disable()
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{
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cache_disable(ICACHE_MASK);
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}
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/**
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* return the status of I-Cache
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*
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*/
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rt_base_t rt_hw_cpu_icache_status()
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{
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return (cp15_rd() & ICACHE_MASK);
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}
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|
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/**
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* enable D-Cache
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*
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*/
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void rt_hw_cpu_dcache_enable()
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{
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cache_enable(DCACHE_MASK);
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}
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/**
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* disable D-Cache
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*
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*/
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void rt_hw_cpu_dcache_disable()
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{
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cache_disable(DCACHE_MASK);
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}
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|
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/**
|
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* return the status of D-Cache
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*
|
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*/
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rt_base_t rt_hw_cpu_dcache_status()
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{
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return (cp15_rd() & DCACHE_MASK);
|
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}
|
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|
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/**
|
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* reset cpu by dog's time-out
|
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*
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||||
*/
|
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void rt_hw_cpu_reset()
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{
|
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/* Disable all interrupt except the WDT */
|
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INTMSK = (~((rt_uint32_t)1 << INTWDT));
|
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|
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/* Disable watchdog */
|
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WTCON = 0x0000;
|
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|
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/* Initialize watchdog timer count register */
|
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WTCNT = 0x0001;
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|
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/* Enable watchdog timer; assert reset at timer timeout */
|
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WTCON = 0x0021;
|
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|
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while(1); /* loop forever and wait for reset to happen */
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/*NOTREACHED*/
|
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}
|
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|
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/**
|
||||
* shutdown CPU
|
||||
*
|
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*/
|
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void rt_hw_cpu_shutdown()
|
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{
|
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rt_kprintf("shutdown...\n");
|
||||
|
||||
RT_ASSERT(RT_NULL);
|
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}
|
||||
|
||||
/*@}*/
|
||||
@@ -0,0 +1,117 @@
|
||||
/*
|
||||
* File : trap.c
|
||||
* This file is part of RT-Thread RTOS
|
||||
* COPYRIGHT (C) 2006, RT-Thread Development Team
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://openlab.rt-thread.com/license/LICENSE
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2006-03-13 Bernard first version
|
||||
*/
|
||||
|
||||
#include <rtthread.h>
|
||||
#include "s3c24x0.h"
|
||||
|
||||
#define MAX_HANDLERS 32
|
||||
|
||||
extern rt_uint32_t rt_interrupt_nest;
|
||||
|
||||
/* exception and interrupt handler table */
|
||||
rt_isr_handler_t isr_table[MAX_HANDLERS];
|
||||
rt_uint32_t rt_interrupt_from_thread, rt_interrupt_to_thread;
|
||||
rt_uint32_t rt_thread_switch_interrput_flag;
|
||||
|
||||
/**
|
||||
* @addtogroup S3C24X0
|
||||
*/
|
||||
/*@{*/
|
||||
|
||||
rt_isr_handler_t rt_hw_interrupt_handle(rt_uint32_t vector)
|
||||
{
|
||||
rt_kprintf("Unhandled interrupt %d occured!!!\n", vector);
|
||||
return RT_NULL;
|
||||
}
|
||||
|
||||
/**
|
||||
* This function will initialize hardware interrupt
|
||||
*/
|
||||
void rt_hw_interrupt_init()
|
||||
{
|
||||
register rt_uint32_t idx;
|
||||
|
||||
/* all clear source pending */
|
||||
SRCPND = 0x0;
|
||||
|
||||
/* all clear sub source pending */
|
||||
SUBSRCPND = 0x0;
|
||||
|
||||
/* all=IRQ mode */
|
||||
INTMOD = 0x0;
|
||||
|
||||
/* all interrupt disabled include global bit */
|
||||
INTMSK = BIT_ALLMSK;
|
||||
|
||||
/* all sub interrupt disable */
|
||||
INTSUBMSK = BIT_SUB_ALLMSK;
|
||||
|
||||
/* all clear interrupt pending */
|
||||
INTPND = BIT_ALLMSK;
|
||||
|
||||
/* init exceptions table */
|
||||
for(idx=0; idx < MAX_HANDLERS; idx++)
|
||||
{
|
||||
isr_table[idx] = (rt_isr_handler_t)rt_hw_interrupt_handle;
|
||||
}
|
||||
|
||||
/* init interrupt nest, and context in thread sp */
|
||||
rt_interrupt_nest = 0;
|
||||
rt_interrupt_from_thread = 0;
|
||||
rt_interrupt_to_thread = 0;
|
||||
rt_thread_switch_interrput_flag = 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* This function will mask a interrupt.
|
||||
* @param vector the interrupt number
|
||||
*/
|
||||
void rt_hw_interrupt_mask(rt_uint32_t vector)
|
||||
{
|
||||
INTMSK |= 1 << vector;
|
||||
}
|
||||
|
||||
/**
|
||||
* This function will un-mask a interrupt.
|
||||
* @param vector the interrupt number
|
||||
*/
|
||||
void rt_hw_interrupt_umask(rt_uint32_t vector)
|
||||
{
|
||||
if (vector == INTNOTUSED6)
|
||||
{
|
||||
rt_kprintf("Interrupt vec %d is not used!\n", vector);
|
||||
// while(1);
|
||||
}
|
||||
else if (vector == INTGLOBAL)
|
||||
INTMSK = 0x0;
|
||||
else
|
||||
INTMSK &= ~(1 << vector);
|
||||
}
|
||||
|
||||
/**
|
||||
* This function will install a interrupt service routine to a interrupt.
|
||||
* @param vector the interrupt number
|
||||
* @param new_handler the interrupt service routine to be installed
|
||||
* @param old_handler the old interrupt service routine
|
||||
*/
|
||||
void rt_hw_interrupt_install(rt_uint32_t vector, rt_isr_handler_t new_handler, rt_isr_handler_t *old_handler)
|
||||
{
|
||||
if(vector < MAX_HANDLERS)
|
||||
{
|
||||
if (*old_handler != RT_NULL) *old_handler = isr_table[vector];
|
||||
if (new_handler != RT_NULL) isr_table[vector] = new_handler;
|
||||
}
|
||||
}
|
||||
|
||||
/*@}*/
|
||||
@@ -0,0 +1,248 @@
|
||||
/*
|
||||
* File : mmu.c
|
||||
* This file is part of RT-Thread RTOS
|
||||
* COPYRIGHT (C) 2006, RT-Thread Development Team
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://openlab.rt-thread.com/license/LICENSE
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2008-04-25 Yi.qiu first version
|
||||
*/
|
||||
|
||||
#include <rtthread.h>
|
||||
#include "s3c24x0.h"
|
||||
|
||||
// #define _MMUTT_STARTADDRESS 0x30080000
|
||||
#define _MMUTT_STARTADDRESS 0x30200000
|
||||
|
||||
#define DESC_SEC (0x2|(1<<4))
|
||||
#define CB (3<<2) //cache_on, write_back
|
||||
#define CNB (2<<2) //cache_on, write_through
|
||||
#define NCB (1<<2) //cache_off,WR_BUF on
|
||||
#define NCNB (0<<2) //cache_off,WR_BUF off
|
||||
#define AP_RW (3<<10) //supervisor=RW, user=RW
|
||||
#define AP_RO (2<<10) //supervisor=RW, user=RO
|
||||
|
||||
#define DOMAIN_FAULT (0x0)
|
||||
#define DOMAIN_CHK (0x1)
|
||||
#define DOMAIN_NOTCHK (0x3)
|
||||
#define DOMAIN0 (0x0<<5)
|
||||
#define DOMAIN1 (0x1<<5)
|
||||
|
||||
#define DOMAIN0_ATTR (DOMAIN_CHK<<0)
|
||||
#define DOMAIN1_ATTR (DOMAIN_FAULT<<2)
|
||||
|
||||
#define RW_CB (AP_RW|DOMAIN0|CB|DESC_SEC)
|
||||
#define RW_CNB (AP_RW|DOMAIN0|CNB|DESC_SEC)
|
||||
#define RW_NCNB (AP_RW|DOMAIN0|NCNB|DESC_SEC)
|
||||
#define RW_FAULT (AP_RW|DOMAIN1|NCNB|DESC_SEC)
|
||||
|
||||
void rt_hw_mmu_init(void);
|
||||
|
||||
void mmu_setttbase(register rt_uint32_t i)
|
||||
{
|
||||
asm ("mcr p15, 0, %0, c2, c2, 0": :"r" (i));
|
||||
}
|
||||
|
||||
void mmu_setdomain(register rt_uint32_t i)
|
||||
{
|
||||
asm ("mcr p15,0, %0, c3, c0, 0": :"r" (i));
|
||||
}
|
||||
|
||||
void mmu_enablemmu()
|
||||
{
|
||||
register rt_uint32_t i;
|
||||
|
||||
/* read control register */
|
||||
asm ("mrc p15, 0, %0, c1, c0, 0":"=r" (i));
|
||||
|
||||
i |= 0x1;
|
||||
|
||||
/* write back to control register */
|
||||
asm ("mcr p15, 0, %0, c1, c0, 0": :"r" (i));
|
||||
}
|
||||
|
||||
void mmu_disablemmu()
|
||||
{
|
||||
register rt_uint32_t i;
|
||||
|
||||
/* read control register */
|
||||
asm ("mrc p15, 0, %0, c1, c0, 0":"=r" (i));
|
||||
|
||||
i &= ~0x1;
|
||||
|
||||
/* write back to control register */
|
||||
asm ("mcr p15, 0, %0, c1, c0, 0": :"r" (i));
|
||||
}
|
||||
|
||||
void mmu_enableicache()
|
||||
{
|
||||
register rt_uint32_t i;
|
||||
|
||||
/* read control register */
|
||||
asm ("mrc p15, 0, %0, c1, c0, 0":"=r" (i));
|
||||
|
||||
i |= (1 << 12);
|
||||
|
||||
/* write back to control register */
|
||||
asm ("mcr p15, 0, %0, c1, c0, 0": :"r" (i));
|
||||
}
|
||||
|
||||
void mmu_enabledcache()
|
||||
{
|
||||
register rt_uint32_t i;
|
||||
|
||||
/* read control register */
|
||||
asm ("mrc p15, 0, %0, c1, c0, 0":"=r" (i));
|
||||
|
||||
i |= (1 << 2);
|
||||
|
||||
/* write back to control register */
|
||||
asm ("mcr p15, 0, %0, c1, c0, 0": :"r" (i));
|
||||
}
|
||||
|
||||
void mmu_disableicache()
|
||||
{
|
||||
register rt_uint32_t i;
|
||||
|
||||
/* read control register */
|
||||
asm ("mrc p15, 0, %0, c1, c0, 0":"=r" (i));
|
||||
|
||||
i &= ~(1 << 12);
|
||||
|
||||
/* write back to control register */
|
||||
asm ("mcr p15, 0, %0, c1, c0, 0": :"r" (i));
|
||||
}
|
||||
|
||||
void mmu_disabledcache()
|
||||
{
|
||||
register rt_uint32_t i;
|
||||
|
||||
/* read control register */
|
||||
asm ("mrc p15, 0, %0, c1, c0, 0":"=r" (i));
|
||||
|
||||
i &= ~(1 << 2);
|
||||
|
||||
/* write back to control register */
|
||||
asm ("mcr p15, 0, %0, c1, c0, 0": :"r" (i));
|
||||
}
|
||||
|
||||
void mmu_enablealignfault()
|
||||
{
|
||||
register rt_uint32_t i;
|
||||
|
||||
/* read control register */
|
||||
asm ("mrc p15, 0, %0, c1, c0, 0":"=r" (i));
|
||||
|
||||
i |= (1 << 1);
|
||||
|
||||
/* write back to control register */
|
||||
asm ("mcr p15, 0, %0, c1, c0, 0": :"r" (i));
|
||||
}
|
||||
|
||||
void mmu_disablealignfault()
|
||||
{
|
||||
register rt_uint32_t i;
|
||||
|
||||
/* read control register */
|
||||
asm ("mrc p15, 0, %0, c1, c0, 0":"=r" (i));
|
||||
|
||||
i &= ~(1 << 1);
|
||||
|
||||
/* write back to control register */
|
||||
asm ("mcr p15, 0, %0, c1, c0, 0": :"r" (i));
|
||||
}
|
||||
|
||||
void mmu_cleaninvalidatedcacheindex(int index)
|
||||
{
|
||||
asm ("mcr p15, 0, %0, c7, c14, 2": :"r" (index));
|
||||
}
|
||||
|
||||
void mmu_invalidatetlb()
|
||||
{
|
||||
asm ("mcr p15, 0, %0, c8, c7, 0": :"r" (0));
|
||||
}
|
||||
|
||||
void mmu_invalidateicache()
|
||||
{
|
||||
asm ("mcr p15, 0, %0, c7, c5, 0": :"r" (0));
|
||||
}
|
||||
|
||||
void mmu_setmtt(int vaddrStart,int vaddrEnd,int paddrStart,int attr)
|
||||
{
|
||||
volatile rt_uint32_t *pTT;
|
||||
volatile int i,nSec;
|
||||
pTT=(rt_uint32_t *)_MMUTT_STARTADDRESS+(vaddrStart>>20);
|
||||
nSec=(vaddrEnd>>20)-(vaddrStart>>20);
|
||||
for(i=0;i<=nSec;i++)
|
||||
{
|
||||
*pTT = attr |(((paddrStart>>20)+i)<<20);
|
||||
pTT++;
|
||||
}
|
||||
}
|
||||
|
||||
void rt_hw_mmu_init(void)
|
||||
{
|
||||
int i,j;
|
||||
//========================== IMPORTANT NOTE =========================
|
||||
//The current stack and code area can't be re-mapped in this routine.
|
||||
//If you want memory map mapped freely, your own sophiscated mmu
|
||||
//initialization code is needed.
|
||||
//===================================================================
|
||||
|
||||
mmu_disabledcache();
|
||||
mmu_disableicache();
|
||||
|
||||
//If write-back is used,the DCache should be cleared.
|
||||
for(i=0;i<64;i++)
|
||||
for(j=0;j<8;j++)
|
||||
mmu_cleaninvalidatedcacheindex((i<<26)|(j<<5));
|
||||
|
||||
mmu_invalidateicache();
|
||||
|
||||
//To complete mmu_Init() fast, Icache may be turned on here.
|
||||
mmu_enableicache();
|
||||
|
||||
mmu_disablemmu();
|
||||
mmu_invalidatetlb();
|
||||
|
||||
//mmu_setmtt(int vaddrStart,int vaddrEnd,int paddrStart,int attr);
|
||||
mmu_setmtt(0x00000000,0x07f00000,0x00000000,RW_CNB); //bank0
|
||||
mmu_setmtt(0x00000000,0x03f00000,(int)0x30000000,RW_CB); //bank0
|
||||
mmu_setmtt(0x04000000,0x07f00000,0,RW_NCNB); //bank0
|
||||
mmu_setmtt(0x08000000,0x0ff00000,0x08000000,RW_CNB); //bank1
|
||||
mmu_setmtt(0x10000000,0x17f00000,0x10000000,RW_NCNB); //bank2
|
||||
mmu_setmtt(0x18000000,0x1ff00000,0x18000000,RW_NCNB); //bank3
|
||||
//mmu_setmtt(0x20000000,0x27f00000,0x20000000,RW_CB); //bank4
|
||||
mmu_setmtt(0x20000000,0x27f00000,0x20000000,RW_CNB); //bank4 for STRATA Flash
|
||||
mmu_setmtt(0x28000000,0x2ff00000,0x28000000,RW_NCNB); //bank5
|
||||
//30f00000->30100000, 31000000->30200000
|
||||
mmu_setmtt(0x30000000,0x30100000,0x30000000,RW_CB); //bank6-1
|
||||
mmu_setmtt(0x30200000,0x33e00000,0x30200000,RW_NCNB); //bank6-2
|
||||
|
||||
mmu_setmtt(0x33f00000,0x33f00000,0x33f00000,RW_CB); //bank6-3
|
||||
mmu_setmtt(0x38000000,0x3ff00000,0x38000000,RW_NCNB); //bank7
|
||||
|
||||
mmu_setmtt(0x40000000,0x47f00000,0x40000000,RW_NCNB); //SFR
|
||||
mmu_setmtt(0x48000000,0x5af00000,0x48000000,RW_NCNB); //SFR
|
||||
mmu_setmtt(0x5b000000,0x5b000000,0x5b000000,RW_NCNB); //SFR
|
||||
mmu_setmtt(0x5b100000,0xfff00000,0x5b100000,RW_FAULT);//not used
|
||||
mmu_setmtt(0x60000000,0x67f00000,0x60000000,RW_NCNB); //SFR
|
||||
|
||||
mmu_setttbase(_MMUTT_STARTADDRESS);
|
||||
|
||||
/* DOMAIN1: no_access, DOMAIN0,2~15=client(AP is checked) */
|
||||
mmu_setdomain(0x55555550|DOMAIN1_ATTR|DOMAIN0_ATTR);
|
||||
|
||||
//mmu_SetProcessId(0x0);
|
||||
mmu_enablealignfault();
|
||||
|
||||
mmu_enablemmu();
|
||||
mmu_enableicache();
|
||||
|
||||
/* DCache should be turned on after mmu is turned on. */
|
||||
mmu_enabledcache();
|
||||
}
|
||||
@@ -0,0 +1,152 @@
|
||||
/*
|
||||
* File : rtc.c
|
||||
* This file is part of RT-Thread RTOS
|
||||
* COPYRIGHT (C) 2006, RT-Thread Development Team
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://openlab.rt-thread.com/license/LICENSE
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2009-04-26 yi.qiu first version
|
||||
*/
|
||||
|
||||
#include "rtc.h"
|
||||
|
||||
/**
|
||||
* This function access to rtc
|
||||
*/
|
||||
static inline void rt_hw_rtc_access(int a)
|
||||
{
|
||||
switch (a)
|
||||
{
|
||||
case RTC_ENABLE:
|
||||
RTCCON |= 0x01;
|
||||
break;
|
||||
|
||||
case RTC_DISABLE:
|
||||
RTCCON &= ~0x01;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
static inline rt_uint32_t BCD2BIN(rt_uint8_t n)
|
||||
{
|
||||
return ((((n >> 4) & 0x0F) * 10) + (n & 0x0F));
|
||||
}
|
||||
|
||||
static inline rt_uint8_t BIN2BCD(rt_uint32_t n)
|
||||
{
|
||||
return (((n / 10) << 4) | (n % 10));
|
||||
}
|
||||
|
||||
/**
|
||||
* This function get rtc time
|
||||
*/
|
||||
void rt_hw_rtc_get (struct rtc_time *tmp)
|
||||
{
|
||||
rt_uint8_t sec, min, hour, mday, wday, mon, year;
|
||||
rt_uint8_t a_sec,a_min, a_hour, a_date, a_mon, a_year, a_armed;
|
||||
|
||||
/* enable access to RTC registers */
|
||||
rt_hw_rtc_access(RTC_ENABLE);
|
||||
|
||||
/* read RTC registers */
|
||||
do
|
||||
{
|
||||
sec = BCDSEC;
|
||||
min = BCDMIN;
|
||||
hour = BCDHOUR;
|
||||
mday = BCDDATE;
|
||||
wday = BCDDAY;
|
||||
mon = BCDMON;
|
||||
year = BCDYEAR;
|
||||
} while (sec != BCDSEC);
|
||||
|
||||
/* read ALARM registers */
|
||||
a_sec = ALMSEC;
|
||||
a_min = ALMMIN;
|
||||
a_hour = ALMHOUR;
|
||||
a_date = ALMDATE;
|
||||
a_mon = ALMMON;
|
||||
a_year = ALMYEAR;
|
||||
a_armed = RTCALM;
|
||||
|
||||
/* disable access to RTC registers */
|
||||
rt_hw_rtc_access(RTC_DISABLE);
|
||||
|
||||
#ifdef RTC_DEBUG
|
||||
rt_kprintf ( "Get RTC year: %02x mon/cent: %02x mday: %02x wday: %02x "
|
||||
"hr: %02x min: %02x sec: %02x\n",
|
||||
year, mon, mday, wday,
|
||||
hour, min, sec);
|
||||
rt_kprintf ( "Alarms: %02x: year: %02x month: %02x date: %02x hour: %02x min: %02x sec: %02x\n",
|
||||
a_armed,
|
||||
a_year, a_mon, a_date,
|
||||
a_hour, a_min, a_sec);
|
||||
#endif
|
||||
|
||||
tmp->tm_sec = BCD2BIN(sec & 0x7F);
|
||||
tmp->tm_min = BCD2BIN(min & 0x7F);
|
||||
tmp->tm_hour = BCD2BIN(hour & 0x3F);
|
||||
tmp->tm_mday = BCD2BIN(mday & 0x3F);
|
||||
tmp->tm_mon = BCD2BIN(mon & 0x1F);
|
||||
tmp->tm_year = BCD2BIN(year);
|
||||
tmp->tm_wday = BCD2BIN(wday & 0x07);
|
||||
if(tmp->tm_year < 70) tmp->tm_year += 2000;
|
||||
else tmp->tm_year += 1900;
|
||||
tmp->tm_yday = 0;
|
||||
tmp->tm_isdst = 0;
|
||||
#ifdef RTC_DEBUG
|
||||
rt_kprintf ( "Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
|
||||
tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
|
||||
tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
|
||||
#endif
|
||||
}
|
||||
|
||||
/**
|
||||
* This function set rtc time
|
||||
*/
|
||||
void rt_hw_rtc_set (struct rtc_time *tmp)
|
||||
{
|
||||
rt_uint8_t sec, min, hour, mday, wday, mon, year;
|
||||
|
||||
#ifdef RTC_DEBUG
|
||||
rt_kprintf ( "Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
|
||||
tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
|
||||
tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
|
||||
#endif
|
||||
year = BIN2BCD(tmp->tm_year % 100);
|
||||
mon = BIN2BCD(tmp->tm_mon);
|
||||
wday = BIN2BCD(tmp->tm_wday);
|
||||
mday = BIN2BCD(tmp->tm_mday);
|
||||
hour = BIN2BCD(tmp->tm_hour);
|
||||
min = BIN2BCD(tmp->tm_min);
|
||||
sec = BIN2BCD(tmp->tm_sec);
|
||||
|
||||
/* enable access to RTC registers */
|
||||
rt_hw_rtc_access(RTC_ENABLE);
|
||||
|
||||
/* write RTC registers */
|
||||
BCDSEC = sec;
|
||||
BCDMIN = min;
|
||||
BCDHOUR = hour;
|
||||
BCDDATE = mday;
|
||||
BCDDAY = wday;
|
||||
BCDMON = mon;
|
||||
BCDYEAR = year;
|
||||
|
||||
/* disable access to RTC registers */
|
||||
rt_hw_rtc_access(RTC_DISABLE);
|
||||
}
|
||||
|
||||
/**
|
||||
* This function reset rtc
|
||||
*/
|
||||
void rt_hw_rtc_reset (void)
|
||||
{
|
||||
RTCCON = (RTCCON & ~0x06) | 0x08;
|
||||
RTCCON &= ~(0x08|0x01);
|
||||
}
|
||||
|
||||
@@ -0,0 +1,40 @@
|
||||
#ifndef __RT_HW_SERIAL_H__
|
||||
#define __RT_HW_SERIAL_H__
|
||||
|
||||
#include <rthw.h>
|
||||
#include <rtthread.h>
|
||||
|
||||
#include "s3c24x0.h"
|
||||
|
||||
#define RTC_DEBUG
|
||||
|
||||
#define RTC_ENABLE 0x01
|
||||
#define RTC_DISABLE 0x02
|
||||
|
||||
static const unsigned char days_in_month[] =
|
||||
{
|
||||
31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31
|
||||
};
|
||||
|
||||
#define LEAPS_THRU_END_OF(y) ((y)/4 - (y)/100 + (y)/400)
|
||||
#define LEAP_YEAR(year) ((!(year % 4) && (year % 100)) || !(year % 400))
|
||||
|
||||
struct rtc_time
|
||||
{
|
||||
int tm_sec;
|
||||
int tm_min;
|
||||
int tm_hour;
|
||||
int tm_mday;
|
||||
int tm_mon;
|
||||
int tm_year;
|
||||
int tm_wday;
|
||||
int tm_yday;
|
||||
int tm_isdst;
|
||||
};
|
||||
|
||||
void rt_hw_rtc_get (struct rtc_time *tmp);
|
||||
void rt_hw_rtc_set (struct rtc_time *tmp);
|
||||
void rt_hw_rtc_reset (void);
|
||||
void rt_rtc_time_to_tm(rt_uint32_t time, struct rtc_time *tm);
|
||||
|
||||
#endif
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,313 @@
|
||||
/*
|
||||
* File : serial.c
|
||||
* This file is part of RT-Thread RTOS
|
||||
* COPYRIGHT (C) 2006, RT-Thread Development Team
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://openlab.rt-thread.com/license/LICENSE
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2006-03-13 Bernard first version
|
||||
* 2009-04-20 yi.qiu modified according bernard's stm32 version
|
||||
*/
|
||||
|
||||
#include <rtthread.h>
|
||||
|
||||
#include "serial.h"
|
||||
|
||||
/**
|
||||
* @addtogroup S3C24X0
|
||||
*/
|
||||
/*@{*/
|
||||
|
||||
/* RT-Thread Device Interface */
|
||||
/**
|
||||
* This function initializes serial
|
||||
*/
|
||||
static rt_err_t rt_serial_init (rt_device_t dev)
|
||||
{
|
||||
struct serial_device* uart = (struct serial_device*) dev->private;
|
||||
|
||||
if (!(dev->flag & RT_DEVICE_FLAG_ACTIVATED))
|
||||
{
|
||||
|
||||
if (dev->flag & RT_DEVICE_FLAG_INT_RX)
|
||||
{
|
||||
rt_memset(uart->int_rx->rx_buffer, 0,
|
||||
sizeof(uart->int_rx->rx_buffer));
|
||||
uart->int_rx->read_index = uart->int_rx->read_index = 0;
|
||||
}
|
||||
|
||||
if (dev->flag & RT_DEVICE_FLAG_INT_TX)
|
||||
{
|
||||
rt_memset(uart->int_tx->tx_buffer, 0,
|
||||
sizeof(uart->int_tx->tx_buffer));
|
||||
uart->int_tx->write_index = uart->int_tx->save_index = 0;
|
||||
}
|
||||
|
||||
dev->flag |= RT_DEVICE_FLAG_ACTIVATED;
|
||||
}
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
/**
|
||||
* This function read a character from serial without interrupt enable mode
|
||||
*
|
||||
* @return the read char
|
||||
*/
|
||||
char rt_serial_getc(struct serial_device* uart)
|
||||
{
|
||||
rt_base_t level;
|
||||
char ch = 0;
|
||||
|
||||
/* disable interrupt */
|
||||
level = rt_hw_interrupt_disable();
|
||||
|
||||
if (uart->int_rx->read_index != uart->int_rx->save_index)
|
||||
{
|
||||
ch = uart->int_rx->rx_buffer[uart->int_rx->read_index];
|
||||
|
||||
uart->int_rx->read_index ++;
|
||||
if (uart->int_rx->read_index >= UART_RX_BUFFER_SIZE)
|
||||
uart->int_rx->read_index = 0;
|
||||
}
|
||||
|
||||
/* enable interrupt */
|
||||
rt_hw_interrupt_enable(level);
|
||||
|
||||
return ch;
|
||||
}
|
||||
|
||||
/* save a char to serial buffer */
|
||||
void rt_serial_savechar(struct serial_device* uart, char ch)
|
||||
{
|
||||
rt_base_t level;
|
||||
|
||||
/* disable interrupt */
|
||||
level = rt_hw_interrupt_disable();
|
||||
|
||||
uart->int_rx->rx_buffer[uart->int_rx->save_index] = ch;
|
||||
uart->int_rx->save_index ++;
|
||||
if (uart->int_rx->save_index >= UART_RX_BUFFER_SIZE)
|
||||
uart->int_rx->save_index = 0;
|
||||
|
||||
/* if the next position is read index, discard this 'read char' */
|
||||
if (uart->int_rx->save_index == uart->int_rx->read_index)
|
||||
{
|
||||
uart->int_rx->read_index ++;
|
||||
if (uart->int_rx->read_index >= UART_RX_BUFFER_SIZE)
|
||||
uart->int_rx->read_index = 0;
|
||||
}
|
||||
|
||||
/* enable interrupt */
|
||||
rt_hw_interrupt_enable(level);
|
||||
}
|
||||
|
||||
/**
|
||||
* This function will write a character to serial without interrupt enable mode
|
||||
*
|
||||
* @param c the char to write
|
||||
*/
|
||||
void rt_serial_putc(rt_device_t device, const char c)
|
||||
{
|
||||
struct serial_device* uart = (struct serial_device*) device->private;
|
||||
|
||||
/*
|
||||
* to be polite with serial console add a line feed
|
||||
* to the carriage return character
|
||||
*/
|
||||
if (c=='\n' && (device->flag & RT_DEVICE_FLAG_STREAM))
|
||||
rt_serial_putc(device, '\r');
|
||||
|
||||
while (!(uart->uart_device->ustat & USTAT_TXB_EMPTY));
|
||||
uart->uart_device->utxh = (c & 0x1FF);
|
||||
}
|
||||
|
||||
static rt_err_t rt_serial_open(rt_device_t dev, rt_uint16_t oflag)
|
||||
{
|
||||
RT_ASSERT(dev != RT_NULL);
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
static rt_err_t rt_serial_close(rt_device_t dev)
|
||||
{
|
||||
RT_ASSERT(dev != RT_NULL);
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
static rt_size_t rt_serial_read (rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size)
|
||||
{
|
||||
rt_uint8_t* ptr;
|
||||
rt_err_t err_code;
|
||||
struct serial_device* uart;
|
||||
|
||||
ptr = buffer;
|
||||
err_code = RT_EOK;
|
||||
uart = (struct serial_device*)dev->private;
|
||||
|
||||
if (dev->flag & RT_DEVICE_FLAG_INT_RX)
|
||||
{
|
||||
rt_int32_t ch;
|
||||
|
||||
/* interrupt mode Rx */
|
||||
while (size)
|
||||
{
|
||||
/* get a character */
|
||||
ch = rt_serial_getc(uart);
|
||||
if (ch < 0)
|
||||
{
|
||||
/* set error code */
|
||||
err_code = -RT_EEMPTY;
|
||||
}
|
||||
else
|
||||
{
|
||||
*ptr++ = ch;
|
||||
size --;
|
||||
}
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
/* polling mode */
|
||||
while ((rt_uint32_t)ptr - (rt_uint32_t)buffer < size)
|
||||
{
|
||||
while (uart->uart_device->ustat & USTAT_RCV_READY)
|
||||
{
|
||||
*ptr = uart->uart_device->urxh & 0xff;
|
||||
ptr ++;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/* set error code */
|
||||
rt_set_errno(err_code);
|
||||
return (rt_uint32_t)ptr - (rt_uint32_t)buffer;
|
||||
}
|
||||
|
||||
static rt_size_t rt_serial_write (rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size)
|
||||
{
|
||||
rt_uint8_t* ptr;
|
||||
rt_err_t err_code;
|
||||
struct serial_device* uart;
|
||||
|
||||
err_code = RT_EOK;
|
||||
ptr = (rt_uint8_t*)buffer;
|
||||
uart = (struct serial_device*)dev->private;
|
||||
|
||||
if (dev->flag & RT_DEVICE_FLAG_INT_TX)
|
||||
{
|
||||
/* interrupt mode Tx */
|
||||
while (uart->int_tx->save_index != uart->int_tx->write_index)
|
||||
{
|
||||
/* save on tx buffer */
|
||||
uart->int_tx->tx_buffer[uart->int_tx->save_index] = *ptr++;
|
||||
|
||||
-- size;
|
||||
|
||||
/* move to next position */
|
||||
uart->int_tx->save_index ++;
|
||||
|
||||
/* wrap save index */
|
||||
if (uart->int_tx->save_index >= UART_TX_BUFFER_SIZE)
|
||||
uart->int_tx->save_index = 0;
|
||||
}
|
||||
|
||||
/* set error code */
|
||||
if (size > 0)
|
||||
err_code = -RT_EFULL;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* polling mode */
|
||||
while (size)
|
||||
{
|
||||
rt_serial_putc(dev, *ptr);
|
||||
++ptr; --size;
|
||||
}
|
||||
}
|
||||
|
||||
/* set error code */
|
||||
rt_set_errno(err_code);
|
||||
|
||||
return (rt_uint32_t)ptr - (rt_uint32_t)buffer;
|
||||
}
|
||||
|
||||
static rt_err_t rt_serial_control (rt_device_t dev, rt_uint8_t cmd, void *args)
|
||||
{
|
||||
struct serial_device* uart;
|
||||
|
||||
RT_ASSERT(dev != RT_NULL);
|
||||
|
||||
uart = (struct serial_device*)dev->private;
|
||||
switch (cmd)
|
||||
{
|
||||
case RT_DEVICE_CTRL_SUSPEND:
|
||||
/* suspend device */
|
||||
dev->flag |= RT_DEVICE_FLAG_SUSPENDED;
|
||||
break;
|
||||
|
||||
case RT_DEVICE_CTRL_RESUME:
|
||||
/* resume device */
|
||||
dev->flag &= ~RT_DEVICE_FLAG_SUSPENDED;
|
||||
break;
|
||||
}
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
/*
|
||||
* serial register
|
||||
*/
|
||||
rt_err_t rt_hw_serial_register(rt_device_t device, const char* name, rt_uint32_t flag, struct serial_device *serial)
|
||||
{
|
||||
RT_ASSERT(device != RT_NULL);
|
||||
|
||||
device->type = RT_Device_Class_Char;
|
||||
device->rx_indicate = RT_NULL;
|
||||
device->tx_complete = RT_NULL;
|
||||
device->init = rt_serial_init;
|
||||
device->open = rt_serial_open;
|
||||
device->close = rt_serial_close;
|
||||
device->read = rt_serial_read;
|
||||
device->write = rt_serial_write;
|
||||
device->control = rt_serial_control;
|
||||
device->private = serial;
|
||||
|
||||
/* register a character device */
|
||||
return rt_device_register(device, name, RT_DEVICE_FLAG_RDWR | flag);
|
||||
}
|
||||
|
||||
/* ISR for serial interrupt */
|
||||
void rt_hw_serial_isr(rt_device_t device)
|
||||
{
|
||||
struct serial_device* uart = (struct serial_device*) device->private;
|
||||
|
||||
/* interrupt mode receive */
|
||||
RT_ASSERT(device->flag & RT_DEVICE_FLAG_INT_RX);
|
||||
|
||||
/* save on rx buffer */
|
||||
while (uart->uart_device->ustat & USTAT_RCV_READY)
|
||||
{
|
||||
rt_serial_savechar(uart, uart->uart_device->urxh & 0xff);
|
||||
}
|
||||
|
||||
/* invoke callback */
|
||||
if (device->rx_indicate != RT_NULL)
|
||||
{
|
||||
rt_size_t rx_length;
|
||||
|
||||
/* get rx length */
|
||||
rx_length = uart->int_rx->read_index > uart->int_rx->save_index ?
|
||||
UART_RX_BUFFER_SIZE - uart->int_rx->read_index + uart->int_rx->save_index :
|
||||
uart->int_rx->save_index - uart->int_rx->read_index;
|
||||
|
||||
device->rx_indicate(device, rx_length);
|
||||
}
|
||||
}
|
||||
|
||||
/*@}*/
|
||||
@@ -0,0 +1,58 @@
|
||||
#ifndef __RT_HW_SERIAL_H__
|
||||
#define __RT_HW_SERIAL_H__
|
||||
|
||||
#include <rthw.h>
|
||||
#include <rtthread.h>
|
||||
|
||||
#include "s3c24x0.h"
|
||||
|
||||
#define USTAT_RCV_READY 0x01 /* receive data ready */
|
||||
#define USTAT_TXB_EMPTY 0x02 /* tx buffer empty */
|
||||
#define BPS 115200 /* serial baudrate */
|
||||
|
||||
#define UART_RX_BUFFER_SIZE 64
|
||||
#define UART_TX_BUFFER_SIZE 64
|
||||
|
||||
struct serial_int_rx
|
||||
{
|
||||
rt_uint8_t rx_buffer[UART_RX_BUFFER_SIZE];
|
||||
rt_uint32_t read_index, save_index;
|
||||
};
|
||||
|
||||
struct serial_int_tx
|
||||
{
|
||||
rt_uint8_t tx_buffer[UART_TX_BUFFER_SIZE];
|
||||
rt_uint32_t write_index, save_index;
|
||||
};
|
||||
|
||||
typedef struct uartport
|
||||
{
|
||||
rt_uint32_t ulcon;
|
||||
rt_uint32_t ucon;
|
||||
rt_uint32_t ufcon;
|
||||
rt_uint32_t umcon;
|
||||
rt_uint32_t ustat;
|
||||
rt_uint32_t urxb;
|
||||
rt_uint32_t ufstat;
|
||||
rt_uint32_t umstat;
|
||||
rt_uint32_t utxh;
|
||||
rt_uint32_t urxh;
|
||||
rt_uint32_t ubrd;
|
||||
}uartport;
|
||||
|
||||
struct serial_device
|
||||
{
|
||||
uartport* uart_device;
|
||||
|
||||
/* rx structure */
|
||||
struct serial_int_rx* int_rx;
|
||||
|
||||
/* tx structure */
|
||||
struct serial_int_tx* int_tx;
|
||||
};
|
||||
|
||||
rt_err_t rt_hw_serial_register(rt_device_t device, const char* name, rt_uint32_t flag, struct serial_device *serial);
|
||||
|
||||
void rt_hw_serial_isr(rt_device_t device);
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,60 @@
|
||||
/*
|
||||
* File : stack.c
|
||||
* This file is part of RT-Thread RTOS
|
||||
* COPYRIGHT (C) 2006, RT-Thread Development Team
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://openlab.rt-thread.com/license/LICENSE
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2006-03-13 Bernard the first version
|
||||
*/
|
||||
#include <rtthread.h>
|
||||
#include "s3c24x0.h"
|
||||
|
||||
/**
|
||||
* @addtogroup S3C24X0
|
||||
*/
|
||||
/*@{*/
|
||||
|
||||
/**
|
||||
* This function will initialize thread stack
|
||||
*
|
||||
* @param tentry the entry of thread
|
||||
* @param parameter the parameter of entry
|
||||
* @param stack_addr the beginning stack address
|
||||
* @param texit the function will be called when thread exit
|
||||
*
|
||||
* @return stack address
|
||||
*/
|
||||
rt_uint8_t *rt_hw_stack_init(void *tentry, void *parameter,
|
||||
rt_uint8_t *stack_addr, void *texit)
|
||||
{
|
||||
rt_uint32_t *stk;
|
||||
|
||||
stk = (rt_uint32_t*)stack_addr;
|
||||
*(stk) = (rt_uint32_t)tentry; /* entry point */
|
||||
*(--stk) = (rt_uint32_t)texit; /* lr */
|
||||
*(--stk) = 0; /* r12 */
|
||||
*(--stk) = 0; /* r11 */
|
||||
*(--stk) = 0; /* r10 */
|
||||
*(--stk) = 0; /* r9 */
|
||||
*(--stk) = 0; /* r8 */
|
||||
*(--stk) = 0; /* r7 */
|
||||
*(--stk) = 0; /* r6 */
|
||||
*(--stk) = 0; /* r5 */
|
||||
*(--stk) = 0; /* r4 */
|
||||
*(--stk) = 0; /* r3 */
|
||||
*(--stk) = 0; /* r2 */
|
||||
*(--stk) = 0; /* r1 */
|
||||
*(--stk) = (rt_uint32_t)parameter; /* r0 : argument */
|
||||
*(--stk) = SVCMODE; /* cpsr */
|
||||
*(--stk) = SVCMODE; /* spsr */
|
||||
|
||||
/* return task's current stack address */
|
||||
return (rt_uint8_t *)stk;
|
||||
}
|
||||
|
||||
/*@}*/
|
||||
@@ -0,0 +1,160 @@
|
||||
/*
|
||||
* File : trap.c
|
||||
* This file is part of RT-Thread RTOS
|
||||
* COPYRIGHT (C) 2006, RT-Thread Development Team
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://openlab.rt-thread.com/license/LICENSE
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2006-03-13 Bernard first version
|
||||
* 2006-05-27 Bernard add skyeye support
|
||||
* 2007-11-19 Yi.Qiu fix rt_hw_trap_irq function
|
||||
*/
|
||||
|
||||
#include <rtthread.h>
|
||||
#include <rthw.h>
|
||||
|
||||
#include "s3c24x0.h"
|
||||
|
||||
/**
|
||||
* @addtogroup S3C24X0
|
||||
*/
|
||||
/*@{*/
|
||||
|
||||
extern struct rt_thread *rt_current_thread;
|
||||
|
||||
/**
|
||||
* this function will show registers of CPU
|
||||
*
|
||||
* @param regs the registers point
|
||||
*/
|
||||
|
||||
void rt_hw_show_register (struct rt_hw_register *regs)
|
||||
{
|
||||
rt_kprintf("Execption:\n");
|
||||
rt_kprintf("r00:0x%08x r01:0x%08x r02:0x%08x r03:0x%08x\n", regs->r0, regs->r1, regs->r2, regs->r3);
|
||||
rt_kprintf("r04:0x%08x r05:0x%08x r06:0x%08x r07:0x%08x\n", regs->r4, regs->r5, regs->r6, regs->r7);
|
||||
rt_kprintf("r08:0x%08x r09:0x%08x r10:0x%08x\n", regs->r8, regs->r9, regs->r10);
|
||||
rt_kprintf("fp :0x%08x ip :0x%08x\n", regs->fp, regs->ip);
|
||||
rt_kprintf("sp :0x%08x lr :0x%08x pc :0x%08x\n", regs->sp, regs->lr, regs->pc);
|
||||
rt_kprintf("cpsr:0x%08x\n", regs->cpsr);
|
||||
}
|
||||
|
||||
/**
|
||||
* When ARM7TDMI comes across an instruction which it cannot handle,
|
||||
* it takes the undefined instruction trap.
|
||||
*
|
||||
* @param regs system registers
|
||||
*
|
||||
* @note never invoke this function in application
|
||||
*/
|
||||
void rt_hw_trap_udef(struct rt_hw_register *regs)
|
||||
{
|
||||
rt_hw_show_register(regs);
|
||||
|
||||
rt_kprintf("undefined instruction\n");
|
||||
rt_kprintf("thread - %s stack:\n", rt_current_thread->name);
|
||||
rt_hw_backtrace((rt_uint32_t *)regs->fp, (rt_uint32_t)rt_current_thread->entry);
|
||||
|
||||
rt_hw_cpu_shutdown();
|
||||
}
|
||||
|
||||
/**
|
||||
* The software interrupt instruction (SWI) is used for entering
|
||||
* Supervisor mode, usually to request a particular supervisor
|
||||
* function.
|
||||
*
|
||||
* @param regs system registers
|
||||
*
|
||||
* @note never invoke this function in application
|
||||
*/
|
||||
void rt_hw_trap_swi(struct rt_hw_register *regs)
|
||||
{
|
||||
rt_hw_show_register(regs);
|
||||
|
||||
rt_kprintf("software interrupt\n");
|
||||
rt_hw_cpu_shutdown();
|
||||
}
|
||||
|
||||
/**
|
||||
* An abort indicates that the current memory access cannot be completed,
|
||||
* which occurs during an instruction prefetch.
|
||||
*
|
||||
* @param regs system registers
|
||||
*
|
||||
* @note never invoke this function in application
|
||||
*/
|
||||
void rt_hw_trap_pabt(struct rt_hw_register *regs)
|
||||
{
|
||||
rt_hw_show_register(regs);
|
||||
|
||||
rt_kprintf("prefetch abort\n");
|
||||
rt_kprintf("thread - %s stack:\n", rt_current_thread->name);
|
||||
rt_hw_backtrace((rt_uint32_t *)regs->fp, (rt_uint32_t)rt_current_thread->entry);
|
||||
|
||||
rt_hw_cpu_shutdown();
|
||||
}
|
||||
|
||||
/**
|
||||
* An abort indicates that the current memory access cannot be completed,
|
||||
* which occurs during a data access.
|
||||
*
|
||||
* @param regs system registers
|
||||
*
|
||||
* @note never invoke this function in application
|
||||
*/
|
||||
void rt_hw_trap_dabt(struct rt_hw_register *regs)
|
||||
{
|
||||
rt_hw_show_register(regs);
|
||||
|
||||
rt_kprintf("data abort\n");
|
||||
rt_kprintf("thread - %s stack:\n", rt_current_thread->name);
|
||||
rt_hw_backtrace((rt_uint32_t *)regs->fp, (rt_uint32_t)rt_current_thread->entry);
|
||||
|
||||
rt_hw_cpu_shutdown();
|
||||
}
|
||||
|
||||
/**
|
||||
* Normally, system will never reach here
|
||||
*
|
||||
* @param regs system registers
|
||||
*
|
||||
* @note never invoke this function in application
|
||||
*/
|
||||
void rt_hw_trap_resv(struct rt_hw_register *regs)
|
||||
{
|
||||
rt_kprintf("not used\n");
|
||||
rt_hw_show_register(regs);
|
||||
rt_hw_cpu_shutdown();
|
||||
}
|
||||
|
||||
extern rt_isr_handler_t isr_table[];
|
||||
|
||||
void rt_hw_trap_irq()
|
||||
{
|
||||
unsigned long intstat;
|
||||
rt_isr_handler_t isr_func;
|
||||
|
||||
intstat = INTOFFSET;
|
||||
|
||||
if (intstat == INTGLOBAL) return;
|
||||
|
||||
/* get interrupt service routine */
|
||||
isr_func = isr_table[intstat];
|
||||
|
||||
/* turn to interrupt service routine */
|
||||
isr_func(intstat);
|
||||
|
||||
/* clear pending register */
|
||||
ClearPending(1 << intstat);
|
||||
}
|
||||
|
||||
void rt_hw_trap_fiq()
|
||||
{
|
||||
rt_kprintf("fast interrupt request\n");
|
||||
}
|
||||
|
||||
/*@}*/
|
||||
Reference in New Issue
Block a user