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This commit is contained in:
Bernard Xiong
2013-01-08 05:05:02 -08:00
parent b3cf278502
commit 72782e9203
229 changed files with 37399 additions and 37399 deletions
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libcpu/blackfin/bf53x/context_vdsp.S
+165 -165
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@@ -1,165 +1,165 @@
/*
* File : context_vdsp.S
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2009 - 2012, RT-Thread Development Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rt-thread.org/license/LICENSE
*
* Change Logs:
* Date Author Notes
* 2012-02-13 mojingxian First version
*/
.global _rt_hw_interrupt_disable;
.global _rt_hw_interrupt_enable;
.global _interrupt_thread_switch;
.extern _rt_interrupt_from_thread;
.extern _rt_interrupt_to_thread;
.extern _rt_thread_switch_interrupt_flag;
.section/DOUBLE64 program;
/*
* rt_base_t rt_hw_interrupt_disable();
* return value in R0.
*/
_rt_hw_interrupt_disable:
CLI R0;
_rt_hw_interrupt_disable.end:
NOP;
NOP;
NOP;
RTS;
/*
* void rt_hw_interrupt_enable(rt_base_t level);
* R0->level
*/
_rt_hw_interrupt_enable:
STI R0;
_rt_hw_interrupt_enable.end:
NOP;
NOP;
NOP;
RTS;
_interrupt_thread_switch:
/* Save context, interrupts disabled by IPEND[4] bit */
[ -- SP ] = R0;
[ -- SP ] = P1;
[ -- SP ] = RETS;
[ -- SP ] = R1;
[ -- SP ] = R2;
[ -- SP ] = P0;
[ -- SP ] = P2;
[ -- SP ] = ASTAT;
R1 = RETI; /* IPEND[4] is currently set, globally disabling interrupts */
/* IPEND[4] will stay set when RETI is saved through R1 */
[ -- SP ] = R1;
[ -- SP ] = (R7:3, P5:3);
[ -- SP ] = FP;
[ -- SP ] = I0;
[ -- SP ] = I1;
[ -- SP ] = I2;
[ -- SP ] = I3;
[ -- SP ] = B0;
[ -- SP ] = B1;
[ -- SP ] = B2;
[ -- SP ] = B3;
[ -- SP ] = L0;
[ -- SP ] = L1;
[ -- SP ] = L2;
[ -- SP ] = L3;
[ -- SP ] = M0;
[ -- SP ] = M1;
[ -- SP ] = M2;
[ -- SP ] = M3;
R1.L = A0.x;
[ -- SP ] = R1;
R1 = A0.w;
[ -- SP ] = R1;
R1.L = A1.x;
[ -- SP ] = R1;
R1 = A1.w;
[ -- SP ] = R1;
[ -- SP ] = LC0;
R3 = 0;
LC0 = R3;
[ -- SP ] = LC1;
R3 = 0;
LC1 = R3;
[ -- SP ] = LT0;
[ -- SP ] = LT1;
[ -- SP ] = LB0;
[ -- SP ] = LB1;
/* Context save done so save SP in the TCB */
P1.h = _rt_interrupt_from_thread;
P1.l = _rt_interrupt_from_thread;
P2 = [ P1 ];
[ P2 ] = SP;
/* clear rt_thread_switch_interrupt_flag to 0 */
P1.h = _rt_thread_switch_interrupt_flag;
P1.l = _rt_thread_switch_interrupt_flag;
R0 = 0;
[ P1 ] = R0;
/* Get a pointer to the high ready task's TCB */
P1.h = _rt_interrupt_to_thread;
P1.l = _rt_interrupt_to_thread;
P2 = [ P1 ];
SP = [ P2 ];
/* Restoring CPU context and return to task */
LB1 = [ SP ++ ];
LB0 = [ SP ++ ];
LT1 = [ SP ++ ];
LT0 = [ SP ++ ];
LC1 = [ SP ++ ];
LC0 = [ SP ++ ];
R0 = [ SP ++ ];
A1 = R0;
R0 = [ SP ++ ];
A1.x = R0.L;
R0 = [ SP ++ ];
A0 = R0;
R0 = [ SP ++ ];
A0.x = R0.L;
M3 = [ SP ++ ];
M2 = [ SP ++ ];
M1 = [ SP ++ ];
M0 = [ SP ++ ];
L3 = [ SP ++ ];
L2 = [ SP ++ ];
L1 = [ SP ++ ];
L0 = [ SP ++ ];
B3 = [ SP ++ ];
B2 = [ SP ++ ];
B1 = [ SP ++ ];
B0 = [ SP ++ ];
I3 = [ SP ++ ];
I2 = [ SP ++ ];
I1 = [ SP ++ ];
I0 = [ SP ++ ];
FP = [ SP ++ ];
(R7:3, P5:3) = [ SP ++ ];
RETI = [ SP ++ ]; /* IPEND[4] will stay set when RETI popped from stack */
ASTAT = [ SP ++ ];
P2 = [ SP ++ ];
P0 = [ SP ++ ];
R2 = [ SP ++ ];
R1 = [ SP ++ ];
RETS = [ SP ++ ];
P1 = [ SP ++ ];
R0 = [ SP ++ ];
_interrupt_thread_switch.end:
RTI;
/*
* File : context_vdsp.S
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2009 - 2012, RT-Thread Development Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rt-thread.org/license/LICENSE
*
* Change Logs:
* Date Author Notes
* 2012-02-13 mojingxian First version
*/
.global _rt_hw_interrupt_disable;
.global _rt_hw_interrupt_enable;
.global _interrupt_thread_switch;
.extern _rt_interrupt_from_thread;
.extern _rt_interrupt_to_thread;
.extern _rt_thread_switch_interrupt_flag;
.section/DOUBLE64 program;
/*
* rt_base_t rt_hw_interrupt_disable();
* return value in R0.
*/
_rt_hw_interrupt_disable:
CLI R0;
_rt_hw_interrupt_disable.end:
NOP;
NOP;
NOP;
RTS;
/*
* void rt_hw_interrupt_enable(rt_base_t level);
* R0->level
*/
_rt_hw_interrupt_enable:
STI R0;
_rt_hw_interrupt_enable.end:
NOP;
NOP;
NOP;
RTS;
_interrupt_thread_switch:
/* Save context, interrupts disabled by IPEND[4] bit */
[ -- SP ] = R0;
[ -- SP ] = P1;
[ -- SP ] = RETS;
[ -- SP ] = R1;
[ -- SP ] = R2;
[ -- SP ] = P0;
[ -- SP ] = P2;
[ -- SP ] = ASTAT;
R1 = RETI; /* IPEND[4] is currently set, globally disabling interrupts */
/* IPEND[4] will stay set when RETI is saved through R1 */
[ -- SP ] = R1;
[ -- SP ] = (R7:3, P5:3);
[ -- SP ] = FP;
[ -- SP ] = I0;
[ -- SP ] = I1;
[ -- SP ] = I2;
[ -- SP ] = I3;
[ -- SP ] = B0;
[ -- SP ] = B1;
[ -- SP ] = B2;
[ -- SP ] = B3;
[ -- SP ] = L0;
[ -- SP ] = L1;
[ -- SP ] = L2;
[ -- SP ] = L3;
[ -- SP ] = M0;
[ -- SP ] = M1;
[ -- SP ] = M2;
[ -- SP ] = M3;
R1.L = A0.x;
[ -- SP ] = R1;
R1 = A0.w;
[ -- SP ] = R1;
R1.L = A1.x;
[ -- SP ] = R1;
R1 = A1.w;
[ -- SP ] = R1;
[ -- SP ] = LC0;
R3 = 0;
LC0 = R3;
[ -- SP ] = LC1;
R3 = 0;
LC1 = R3;
[ -- SP ] = LT0;
[ -- SP ] = LT1;
[ -- SP ] = LB0;
[ -- SP ] = LB1;
/* Context save done so save SP in the TCB */
P1.h = _rt_interrupt_from_thread;
P1.l = _rt_interrupt_from_thread;
P2 = [ P1 ];
[ P2 ] = SP;
/* clear rt_thread_switch_interrupt_flag to 0 */
P1.h = _rt_thread_switch_interrupt_flag;
P1.l = _rt_thread_switch_interrupt_flag;
R0 = 0;
[ P1 ] = R0;
/* Get a pointer to the high ready task's TCB */
P1.h = _rt_interrupt_to_thread;
P1.l = _rt_interrupt_to_thread;
P2 = [ P1 ];
SP = [ P2 ];
/* Restoring CPU context and return to task */
LB1 = [ SP ++ ];
LB0 = [ SP ++ ];
LT1 = [ SP ++ ];
LT0 = [ SP ++ ];
LC1 = [ SP ++ ];
LC0 = [ SP ++ ];
R0 = [ SP ++ ];
A1 = R0;
R0 = [ SP ++ ];
A1.x = R0.L;
R0 = [ SP ++ ];
A0 = R0;
R0 = [ SP ++ ];
A0.x = R0.L;
M3 = [ SP ++ ];
M2 = [ SP ++ ];
M1 = [ SP ++ ];
M0 = [ SP ++ ];
L3 = [ SP ++ ];
L2 = [ SP ++ ];
L1 = [ SP ++ ];
L0 = [ SP ++ ];
B3 = [ SP ++ ];
B2 = [ SP ++ ];
B1 = [ SP ++ ];
B0 = [ SP ++ ];
I3 = [ SP ++ ];
I2 = [ SP ++ ];
I1 = [ SP ++ ];
I0 = [ SP ++ ];
FP = [ SP ++ ];
(R7:3, P5:3) = [ SP ++ ];
RETI = [ SP ++ ]; /* IPEND[4] will stay set when RETI popped from stack */
ASTAT = [ SP ++ ];
P2 = [ SP ++ ];
P0 = [ SP ++ ];
R2 = [ SP ++ ];
R1 = [ SP ++ ];
RETS = [ SP ++ ];
P1 = [ SP ++ ];
R0 = [ SP ++ ];
_interrupt_thread_switch.end:
RTI;
libcpu/blackfin/bf53x/serial.h
+56 -56
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@@ -1,56 +1,56 @@
#ifndef __RT_HW_SERIAL_H__
#define __RT_HW_SERIAL_H__
#include <rthw.h>
#include <rtthread.h>
#define USTAT_RCV_READY 0x01 /* receive data ready */
#define USTAT_TXB_EMPTY 0x02 /* tx buffer empty */
#define BPS 115200 /* serial baudrate */
#define UART_RX_BUFFER_SIZE 64
#define UART_TX_BUFFER_SIZE 64
struct serial_int_rx
{
rt_uint8_t rx_buffer[UART_RX_BUFFER_SIZE];
rt_uint32_t read_index, save_index;
};
struct serial_int_tx
{
rt_uint8_t tx_buffer[UART_TX_BUFFER_SIZE];
rt_uint32_t write_index, save_index;
};
typedef struct uartport
{
volatile rt_uint16_t rbr_thr; //receive buffer register and transmit hold register
volatile rt_uint16_t reserved0;
volatile rt_uint16_t reserved1;
volatile rt_uint16_t reserved2;
volatile rt_uint16_t reserved3;
volatile rt_uint16_t reserved4;
volatile rt_uint16_t reserved5;
volatile rt_uint16_t reserved6;
volatile rt_uint16_t reserved7;
volatile rt_uint16_t reserved8;
volatile rt_uint16_t lsr; //line status register
}uartport;
struct serial_device
{
uartport* uart_device;
/* rx structure */
struct serial_int_rx* int_rx;
/* tx structure */
struct serial_int_tx* int_tx;
};
rt_err_t rt_hw_serial_register(rt_device_t device, const char* name, rt_uint32_t flag, struct serial_device *serial);
void rt_hw_serial_isr(rt_device_t device);
#endif
#ifndef __RT_HW_SERIAL_H__
#define __RT_HW_SERIAL_H__
#include <rthw.h>
#include <rtthread.h>
#define USTAT_RCV_READY 0x01 /* receive data ready */
#define USTAT_TXB_EMPTY 0x02 /* tx buffer empty */
#define BPS 115200 /* serial baudrate */
#define UART_RX_BUFFER_SIZE 64
#define UART_TX_BUFFER_SIZE 64
struct serial_int_rx
{
rt_uint8_t rx_buffer[UART_RX_BUFFER_SIZE];
rt_uint32_t read_index, save_index;
};
struct serial_int_tx
{
rt_uint8_t tx_buffer[UART_TX_BUFFER_SIZE];
rt_uint32_t write_index, save_index;
};
typedef struct uartport
{
volatile rt_uint16_t rbr_thr; //receive buffer register and transmit hold register
volatile rt_uint16_t reserved0;
volatile rt_uint16_t reserved1;
volatile rt_uint16_t reserved2;
volatile rt_uint16_t reserved3;
volatile rt_uint16_t reserved4;
volatile rt_uint16_t reserved5;
volatile rt_uint16_t reserved6;
volatile rt_uint16_t reserved7;
volatile rt_uint16_t reserved8;
volatile rt_uint16_t lsr; //line status register
}uartport;
struct serial_device
{
uartport* uart_device;
/* rx structure */
struct serial_int_rx* int_rx;
/* tx structure */
struct serial_int_tx* int_tx;
};
rt_err_t rt_hw_serial_register(rt_device_t device, const char* name, rt_uint32_t flag, struct serial_device *serial);
void rt_hw_serial_isr(rt_device_t device);
#endif