[libcpu] auto formatted

This commit is contained in:
Meco Man
2021-03-27 17:51:56 +08:00
parent 1ba020f3c8
commit 6c907c3a47
225 changed files with 9467 additions and 9467 deletions

View File

@@ -45,51 +45,51 @@ rt_uint32_t __attribute__((nomips16)) _get_gp(void)
*/
rt_uint8_t *rt_hw_stack_init(void *tentry, void *parameter, rt_uint8_t *stack_addr, void *texit)
{
rt_uint32_t *stk;
rt_uint32_t *stk;
/** Start at stack top */
stk = (rt_uint32_t *)stack_addr;
*(stk) = (rt_uint32_t) tentry; /* pc: Entry Point */
*(--stk) = (rt_uint32_t) 0x00800000; /* c0_cause: IV=1, */
*(--stk) = (rt_uint32_t) 0; /* c0_badvaddr */
*(--stk) = (rt_uint32_t) 0; /* lo */
*(--stk) = (rt_uint32_t) 0; /* hi */
*(--stk) = (rt_uint32_t) 1; /* C0_SR: IE = En, */
*(--stk) = (rt_uint32_t) texit; /* 31 ra */
*(--stk) = (rt_uint32_t) 0x0000001e; /* 30 s8 */
*(--stk) = (rt_uint32_t) stack_addr; /* 29 sp */
*(--stk) = (rt_uint32_t) _get_gp(); /* 28 gp */
*(--stk) = (rt_uint32_t) 0x0000001b; /* 27 k1 */
*(--stk) = (rt_uint32_t) 0x0000001a; /* 26 k0 */
*(--stk) = (rt_uint32_t) 0x00000019; /* 25 t9 */
*(--stk) = (rt_uint32_t) 0x00000018; /* 24 t8 */
*(--stk) = (rt_uint32_t) 0x00000017; /* 23 s7 */
*(--stk) = (rt_uint32_t) 0x00000016; /* 22 s6 */
*(--stk) = (rt_uint32_t) 0x00000015; /* 21 s5 */
*(--stk) = (rt_uint32_t) 0x00000014; /* 20 s4 */
*(--stk) = (rt_uint32_t) 0x00000013; /* 19 s3 */
*(--stk) = (rt_uint32_t) 0x00000012; /* 18 s2 */
*(--stk) = (rt_uint32_t) 0x00000011; /* 17 s1 */
*(--stk) = (rt_uint32_t) 0x00000010; /* 16 s0 */
*(--stk) = (rt_uint32_t) 0x0000000f; /* 15 t7 */
*(--stk) = (rt_uint32_t) 0x0000000e; /* 14 t6 */
*(--stk) = (rt_uint32_t) 0x0000000d; /* 13 t5 */
*(--stk) = (rt_uint32_t) 0x0000000c; /* 12 t4 */
*(--stk) = (rt_uint32_t) 0x0000000b; /* 11 t3 */
*(--stk) = (rt_uint32_t) 0x0000000a; /* 10 t2 */
*(--stk) = (rt_uint32_t) 0x00000009; /* 9 t1 */
*(--stk) = (rt_uint32_t) 0x00000008; /* 8 t0 */
*(--stk) = (rt_uint32_t) 0x00000007; /* 7 a3 */
*(--stk) = (rt_uint32_t) 0x00000006; /* 6 a2 */
*(--stk) = (rt_uint32_t) 0x00000005; /* 5 a1 */
*(--stk) = (rt_uint32_t) parameter; /* 4 a0 */
*(--stk) = (rt_uint32_t) 0x00000003; /* 3 v1 */
*(--stk) = (rt_uint32_t) 0x00000002; /* 2 v0 */
*(--stk) = (rt_uint32_t) 0x00000001; /* 1 at */
*(--stk) = (rt_uint32_t) 0x00000000; /* 0 zero */
*(stk) = (rt_uint32_t) tentry; /* pc: Entry Point */
*(--stk) = (rt_uint32_t) 0x00800000; /* c0_cause: IV=1, */
*(--stk) = (rt_uint32_t) 0; /* c0_badvaddr */
*(--stk) = (rt_uint32_t) 0; /* lo */
*(--stk) = (rt_uint32_t) 0; /* hi */
*(--stk) = (rt_uint32_t) 1; /* C0_SR: IE = En, */
*(--stk) = (rt_uint32_t) texit; /* 31 ra */
*(--stk) = (rt_uint32_t) 0x0000001e; /* 30 s8 */
*(--stk) = (rt_uint32_t) stack_addr; /* 29 sp */
*(--stk) = (rt_uint32_t) _get_gp(); /* 28 gp */
*(--stk) = (rt_uint32_t) 0x0000001b; /* 27 k1 */
*(--stk) = (rt_uint32_t) 0x0000001a; /* 26 k0 */
*(--stk) = (rt_uint32_t) 0x00000019; /* 25 t9 */
*(--stk) = (rt_uint32_t) 0x00000018; /* 24 t8 */
*(--stk) = (rt_uint32_t) 0x00000017; /* 23 s7 */
*(--stk) = (rt_uint32_t) 0x00000016; /* 22 s6 */
*(--stk) = (rt_uint32_t) 0x00000015; /* 21 s5 */
*(--stk) = (rt_uint32_t) 0x00000014; /* 20 s4 */
*(--stk) = (rt_uint32_t) 0x00000013; /* 19 s3 */
*(--stk) = (rt_uint32_t) 0x00000012; /* 18 s2 */
*(--stk) = (rt_uint32_t) 0x00000011; /* 17 s1 */
*(--stk) = (rt_uint32_t) 0x00000010; /* 16 s0 */
*(--stk) = (rt_uint32_t) 0x0000000f; /* 15 t7 */
*(--stk) = (rt_uint32_t) 0x0000000e; /* 14 t6 */
*(--stk) = (rt_uint32_t) 0x0000000d; /* 13 t5 */
*(--stk) = (rt_uint32_t) 0x0000000c; /* 12 t4 */
*(--stk) = (rt_uint32_t) 0x0000000b; /* 11 t3 */
*(--stk) = (rt_uint32_t) 0x0000000a; /* 10 t2 */
*(--stk) = (rt_uint32_t) 0x00000009; /* 9 t1 */
*(--stk) = (rt_uint32_t) 0x00000008; /* 8 t0 */
*(--stk) = (rt_uint32_t) 0x00000007; /* 7 a3 */
*(--stk) = (rt_uint32_t) 0x00000006; /* 6 a2 */
*(--stk) = (rt_uint32_t) 0x00000005; /* 5 a1 */
*(--stk) = (rt_uint32_t) parameter; /* 4 a0 */
*(--stk) = (rt_uint32_t) 0x00000003; /* 3 v1 */
*(--stk) = (rt_uint32_t) 0x00000002; /* 2 v0 */
*(--stk) = (rt_uint32_t) 0x00000001; /* 1 at */
*(--stk) = (rt_uint32_t) 0x00000000; /* 0 zero */
/* return task's current stack address */
return (rt_uint8_t *)stk;
/* return task's current stack address */
return (rt_uint8_t *)stk;
}

View File

@@ -11,13 +11,13 @@
* Complier: MPLAB C32
* MPLAB IDE
* Company: Microchip Technology, Inc.
* Author: Darren Wenn
* Author: Darren Wenn
*
* Software License Agreement
*
* The software supplied herewith by Microchip Technology Incorporated
* (the “Company”) for its PIC32/PIC24 Microcontroller is intended
* and supplied to you, the Companys customer, for use solely and
* (the “Company”) for its PIC32/PIC24 Microcontroller is intended
* and supplied to you, the Companys customer, for use solely and
* exclusively on Microchip PIC32/PIC24 Microcontroller products.
* The software is owned by the Company and/or its supplier, and is
* protected under applicable copyright laws. All rights are reserved.
@@ -26,7 +26,7 @@
* civil liability for the breach of the terms and conditions of this
* license.
*
* THIS SOFTWARE IS PROVIDED IN AN “AS IS” CONDITION. NO WARRANTIES,
* THIS SOFTWARE IS PROVIDED IN AN “AS IS” CONDITION. NO WARRANTIES,
* WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED
* TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
* PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. THE COMPANY SHALL NOT,
@@ -42,20 +42,20 @@
// declared static in case exception condition would prevent
// auto variable being created
static enum {
EXCEP_IRQ = 0, // interrupt
EXCEP_AdEL = 4, // address error exception (load or ifetch)
EXCEP_AdES, // address error exception (store)
EXCEP_IBE, // bus error (ifetch)
EXCEP_DBE, // bus error (load/store)
EXCEP_Sys, // syscall
EXCEP_Bp, // breakpoint
EXCEP_RI, // reserved instruction
EXCEP_CpU, // coprocessor unusable
EXCEP_Overflow, // arithmetic overflow
EXCEP_Trap, // trap (possible divide by zero)
EXCEP_IS1 = 16, // implementation specfic 1
EXCEP_CEU, // CorExtend Unuseable
EXCEP_C2E // coprocessor 2
EXCEP_IRQ = 0, // interrupt
EXCEP_AdEL = 4, // address error exception (load or ifetch)
EXCEP_AdES, // address error exception (store)
EXCEP_IBE, // bus error (ifetch)
EXCEP_DBE, // bus error (load/store)
EXCEP_Sys, // syscall
EXCEP_Bp, // breakpoint
EXCEP_RI, // reserved instruction
EXCEP_CpU, // coprocessor unusable
EXCEP_Overflow, // arithmetic overflow
EXCEP_Trap, // trap (possible divide by zero)
EXCEP_IS1 = 16, // implementation specfic 1
EXCEP_CEU, // CorExtend Unuseable
EXCEP_C2E // coprocessor 2
} _excep_code;
static unsigned int _epc_code;
@@ -65,34 +65,34 @@ static unsigned int _excep_addr;
// this function overrides the normal _weak_ generic handler
void _general_exception_handler(void)
{
asm volatile("mfc0 %0,$13" : "=r" (_excep_code));
asm volatile("mfc0 %0,$14" : "=r" (_excep_addr));
asm volatile("mfc0 %0,$13" : "=r" (_excep_code));
asm volatile("mfc0 %0,$14" : "=r" (_excep_addr));
_excep_code = (_excep_code & 0x0000007C) >> 2;
_excep_code = (_excep_code & 0x0000007C) >> 2;
rt_kprintf("\r\n_excep_code : %08X\r\n",_excep_code);
rt_kprintf("_excep_addr : %08X\r\n",_excep_addr);
switch(_excep_code)
{
case EXCEP_IRQ:rt_kprintf("interrupt\r\n");break;
case EXCEP_AdEL:rt_kprintf("address error exception (load or ifetch)\r\n");break;
case EXCEP_AdES:rt_kprintf("address error exception (store)\r\n");break;
case EXCEP_IBE:rt_kprintf("bus error (ifetch)\r\n");break;
case EXCEP_DBE:rt_kprintf("bus error (load/store)\r\n");break;
case EXCEP_Sys:rt_kprintf("syscall\r\n");break;
case EXCEP_Bp:rt_kprintf("breakpoint\r\n");break;
case EXCEP_RI:rt_kprintf("reserved instruction\r\n");break;
case EXCEP_CpU:rt_kprintf("coprocessor unusable\r\n");break;
case EXCEP_Overflow:rt_kprintf("arithmetic overflow\r\n");break;
case EXCEP_Trap:rt_kprintf("trap (possible divide by zero)\r\n");break;
case EXCEP_IS1:rt_kprintf("implementation specfic 1\r\n");break;
case EXCEP_CEU:rt_kprintf("CorExtend Unuseable\r\n");break;
case EXCEP_C2E:rt_kprintf("coprocessor 2\r\n");break;
default : rt_kprintf("unkown exception\r\n");break;
}
rt_kprintf("\r\n_excep_code : %08X\r\n",_excep_code);
rt_kprintf("_excep_addr : %08X\r\n",_excep_addr);
switch(_excep_code)
{
case EXCEP_IRQ:rt_kprintf("interrupt\r\n");break;
case EXCEP_AdEL:rt_kprintf("address error exception (load or ifetch)\r\n");break;
case EXCEP_AdES:rt_kprintf("address error exception (store)\r\n");break;
case EXCEP_IBE:rt_kprintf("bus error (ifetch)\r\n");break;
case EXCEP_DBE:rt_kprintf("bus error (load/store)\r\n");break;
case EXCEP_Sys:rt_kprintf("syscall\r\n");break;
case EXCEP_Bp:rt_kprintf("breakpoint\r\n");break;
case EXCEP_RI:rt_kprintf("reserved instruction\r\n");break;
case EXCEP_CpU:rt_kprintf("coprocessor unusable\r\n");break;
case EXCEP_Overflow:rt_kprintf("arithmetic overflow\r\n");break;
case EXCEP_Trap:rt_kprintf("trap (possible divide by zero)\r\n");break;
case EXCEP_IS1:rt_kprintf("implementation specfic 1\r\n");break;
case EXCEP_CEU:rt_kprintf("CorExtend Unuseable\r\n");break;
case EXCEP_C2E:rt_kprintf("coprocessor 2\r\n");break;
default : rt_kprintf("unkown exception\r\n");break;
}
while (1) {
// Examine _excep_code to identify the type of exception
// Examine _excep_addr to find the address that caused the exception
}
while (1) {
// Examine _excep_code to identify the type of exception
// Examine _excep_addr to find the address that caused the exception
}
}