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[libcpu] auto formatted
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@@ -14,7 +14,7 @@
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extern void cache_init(rt_ubase_t cache_size, rt_ubase_t cache_line_size);
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void r4k_cache_init(void)
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{
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// cache_init(dcache_size, cpu_dcache_line_size);
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// cache_init(dcache_size, cpu_dcache_line_size);
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}
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void r4k_cache_flush_all(void)
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@@ -31,7 +31,7 @@ void r4k_icache_flush_all(void)
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void r4k_icache_flush_range(rt_ubase_t addr, rt_ubase_t size)
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{
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rt_ubase_t end, a;
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rt_ubase_t end, a;
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if (size > g_mips_core.icache_size)
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{
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@@ -39,7 +39,7 @@ void r4k_icache_flush_range(rt_ubase_t addr, rt_ubase_t size)
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}
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else
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{
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rt_ubase_t ic_lsize = g_mips_core.icache_line_size;
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rt_ubase_t ic_lsize = g_mips_core.icache_line_size;
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a = addr & ~(ic_lsize - 1);
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end = ((addr + size) - 1) & ~(ic_lsize - 1);
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@@ -55,8 +55,8 @@ void r4k_icache_flush_range(rt_ubase_t addr, rt_ubase_t size)
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void r4k_icache_lock_range(rt_ubase_t addr, rt_ubase_t size)
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{
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rt_ubase_t end, a;
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rt_ubase_t ic_lsize = g_mips_core.icache_line_size;
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rt_ubase_t end, a;
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rt_ubase_t ic_lsize = g_mips_core.icache_line_size;
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a = addr & ~(ic_lsize - 1);
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end = ((addr + size) - 1) & ~(ic_lsize - 1);
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@@ -71,7 +71,7 @@ void r4k_icache_lock_range(rt_ubase_t addr, rt_ubase_t size)
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void r4k_dcache_inv(rt_ubase_t addr, rt_ubase_t size)
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{
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rt_ubase_t end, a;
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rt_ubase_t end, a;
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rt_ubase_t dc_lsize = g_mips_core.dcache_line_size;
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a = addr & ~(dc_lsize - 1);
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@@ -87,7 +87,7 @@ void r4k_dcache_inv(rt_ubase_t addr, rt_ubase_t size)
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void r4k_dcache_wback_inv(rt_ubase_t addr, rt_ubase_t size)
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{
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rt_ubase_t end, a;
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rt_ubase_t end, a;
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if (size >= g_mips_core.dcache_size)
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{
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@@ -95,7 +95,7 @@ void r4k_dcache_wback_inv(rt_ubase_t addr, rt_ubase_t size)
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}
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else
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{
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rt_ubase_t dc_lsize = g_mips_core.dcache_line_size;
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rt_ubase_t dc_lsize = g_mips_core.dcache_line_size;
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a = addr & ~(dc_lsize - 1);
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end = ((addr + size) - 1) & ~(dc_lsize - 1);
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