mirror of
https://github.com/RT-Thread/rt-thread.git
synced 2026-09-21 18:57:16 +08:00
[bsp/ls1cdev]
1、uart驱动重写，采用uart驱动框架 2、添加并修改勤为本ls1c_uart 3、开启main为用户程序入口，删除application.c和startup.c,并对初始化部分做相应调整更新。 4、开启dhcp
This commit is contained in:
zhuangwei123
+32
-38
@@ -18,9 +18,22 @@
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#include <rthw.h>
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#include "board.h"
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#include "uart.h"
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#include "drv_uart.h"
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#include "ls1c.h"
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#define A_K0BASE 0x80000000
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extern unsigned char __bss_end;
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extern void tlb_refill_exception(void);
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extern void general_exception(void);
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extern void irq_exception(void);
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extern void rt_hw_cache_init(void);
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extern void invalidate_writeback_dcache_all(void);
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extern void invalidate_icache_all(void);
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/**
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* @addtogroup Loongson LS1B
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*/
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@@ -81,6 +94,24 @@ void rt_hw_fpu_init(void)
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*/
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void rt_hw_board_init(void)
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{
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/* init cache */
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rt_hw_cache_init();
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/* init hardware interrupt */
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rt_hw_interrupt_init();
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/* copy vector */
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rt_memcpy((void *)A_K0BASE, tlb_refill_exception, 0x80);
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rt_memcpy((void *)(A_K0BASE + 0x180), general_exception, 0x80);
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rt_memcpy((void *)(A_K0BASE + 0x200), irq_exception, 0x80);
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invalidate_writeback_dcache_all();
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invalidate_icache_all();
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#ifdef RT_USING_HEAP
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rt_system_heap_init((void*)&__bss_end, (void*)RT_HW_HEAP_END);
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#endif
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#ifdef RT_USING_SERIAL
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/* init hardware UART device */
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rt_hw_uart_init();
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@@ -105,41 +136,4 @@ void rt_hw_board_init(void)
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rt_kprintf("current sr: 0x%08x\n", read_c0_status());
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}
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#define __raw_out_put(unr) \
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while (*ptr) \
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{ \
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if (*ptr == '\n') \
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{ \
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/* FIFO status, contain valid data */ \
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while (!(UART_LSR(UART##unr##_BASE) & (UARTLSR_TE | UARTLSR_TFE))); \
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/* write data */ \
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UART_DAT(UART##unr##_BASE) = '\r'; \
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} \
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/* FIFO status, contain valid data */ \
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while (!(UART_LSR(UART##unr##_BASE) & (UARTLSR_TE | UARTLSR_TFE))); \
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/* write data */ \
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UART_DAT(UART##unr##_BASE) = *ptr; \
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ptr ++; \
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}
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/* UART line status register value */
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#define UARTLSR_ERROR (1 << 7)
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#define UARTLSR_TE (1 << 6)
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#define UARTLSR_TFE (1 << 5)
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#define UARTLSR_BI (1 << 4)
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#define UARTLSR_FE (1 << 3)
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#define UARTLSR_PE (1 << 2)
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#define UARTLSR_OE (1 << 1)
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#define UARTLSR_DR (1 << 0)
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void rt_hw_console_output(const char *ptr)
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{
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#if defined(RT_USING_UART0)
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__raw_out_put(0);
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#elif defined(RT_USING_UART2)
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__raw_out_put(2);
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#elif defined(RT_USING_UART3)
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__raw_out_put(3);
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#endif
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}
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/*@}*/
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@@ -0,0 +1,177 @@
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/*
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* File : drv_uart.c
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* This file is part of RT-Thread RTOS
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* COPYRIGHT (C) 2008 - 2016, RT-Thread Development Team
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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*
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* Change Logs:
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* Date Author Notes
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* 2018-05-08 zhuangwei the first version
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*/
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#include <rtthread.h>
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#include <rtdevice.h>
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#include <rthw.h>
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#include "drv_uart.h"
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#include "ls1c_pin.h"
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#include "ls1c_uart.h"
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/* STM32 uart driver */
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struct rt_uart_ls1c
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{
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ls1c_uart_t UARTx;
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rt_uint32_t IRQ;
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};
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static rt_err_t ls1c_uart_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
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{
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struct rt_uart_ls1c *uart_dev = RT_NULL;
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ls1c_uart_info_t uart_info = {0};
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RT_ASSERT(serial != RT_NULL);
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RT_ASSERT(cfg != RT_NULL);
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uart_dev = (struct rt_uart_ls1c *)serial->parent.user_data;
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// 初始化串口
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uart_info.UARTx = uart_dev->UARTx;
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uart_info.baudrate = cfg->baud_rate;
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uart_info.rx_enable= TRUE;
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uart_init(&uart_info);
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return RT_EOK;
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}
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static rt_err_t ls1c_uart_control(struct rt_serial_device *serial, int cmd, void *arg)
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{
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struct rt_uart_ls1c *uart_dev = RT_NULL;
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RT_ASSERT(serial != RT_NULL);
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uart_dev = (struct rt_uart_ls1c *)serial->parent.user_data;
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switch (cmd)
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{
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case RT_DEVICE_CTRL_CLR_INT: /* disable rx irq */
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rt_hw_interrupt_mask(uart_dev->IRQ);
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break;
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case RT_DEVICE_CTRL_SET_INT: /* enable rx irq */
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rt_hw_interrupt_umask(uart_dev->IRQ);
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break;
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default:
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break;
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}
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return RT_EOK;
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}
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static int ls1c_uart_putc(struct rt_serial_device *serial, char c)
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{
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struct rt_uart_ls1c *uart_dev = RT_NULL;
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RT_ASSERT(serial != RT_NULL);
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uart_dev = (struct rt_uart_ls1c *)serial->parent.user_data;
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uart_putc(uart_dev->UARTx, c);
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return 1;
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}
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static int ls1c_uart_getc(struct rt_serial_device *serial)
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{
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struct rt_uart_ls1c *uart_dev = RT_NULL;
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RT_ASSERT(serial != RT_NULL);
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uart_dev = (struct rt_uart_ls1c *)serial->parent.user_data;
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void *uart_base = uart_get_base(uart_dev->UARTx);
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if(LSR_RXRDY & reg_read_8(uart_base + LS1C_UART_LSR_OFFSET))
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{
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return reg_read_8(uart_base + LS1C_UART_DAT_OFFSET);
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}
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return -1;
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}
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/* UART interrupt handler */
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static void uart_irq_handler(int vector, void *param)
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{
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struct rt_serial_device *serial = (struct rt_serial_device*)param;
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struct rt_uart_ls1c *uart_dev = RT_NULL;
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RT_ASSERT(serial != RT_NULL);
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uart_dev = (struct rt_uart_ls1c *)serial->parent.user_data;
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void *uart_base = uart_get_base(uart_dev->UARTx);
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unsigned char iir = reg_read_8(uart_base + LS1C_UART_IIR_OFFSET);
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// 判断是否为接收超时或接收到有效数据
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if ((IIR_RXTOUT & iir) || (IIR_RXRDY & iir))
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{
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rt_interrupt_enter();
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rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND);
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rt_interrupt_leave();
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}
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}
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static const struct rt_uart_ops stm32_uart_ops =
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{
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ls1c_uart_configure,
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ls1c_uart_control,
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ls1c_uart_putc,
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ls1c_uart_getc,
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};
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#if defined(RT_USING_UART2)
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struct rt_uart_ls1c uart2 =
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{
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LS1C_UART2,
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LS1C_UART2_IRQ,
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};
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struct rt_serial_device serial2;
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#endif /* RT_USING_UART1 */
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void rt_hw_uart_init(void)
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{
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struct rt_uart_ls1c *uart;
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struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
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#ifdef RT_USING_UART2
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uart = &uart2;
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serial2.ops = &stm32_uart_ops;
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serial2.config = config;
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pin_set_purpose(36, PIN_PURPOSE_OTHER);
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pin_set_purpose(37, PIN_PURPOSE_OTHER);
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pin_set_remap(36, PIN_REMAP_SECOND);
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pin_set_remap(37, PIN_REMAP_SECOND);
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rt_hw_interrupt_install(uart->IRQ, uart_irq_handler, &serial2, "UART2");
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/* register UART1 device */
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rt_hw_serial_register(&serial2,
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"uart2",
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//RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_DMA_RX,
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RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
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uart);
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#endif /* RT_USING_UART1 */
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}
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@@ -1,20 +1,19 @@
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/*
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* File : uart.h
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* File : drv_uart.h
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* This file is part of RT-Thread RTOS
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* COPYRIGHT (C) 2006-2012, RT-Thread Develop Team
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* COPYRIGHT (C) 2009, RT-Thread Development Team
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.rt-thread.org/license/LICENSE
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*
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* Change Logs:
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* Date Author Notes
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* 2011-08-08 lgnq first version for LS1B
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* 2015-07-06 chinesebear modified for loongson 1c
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* Date Author Notes
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* 2018-05-08 zhuangwei the first version
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*/
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#ifndef __UART_H__
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#define __UART_H__
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#ifndef __DRV_UART_H__
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#define __DRV_UART_H__
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#include "ls1c.h"
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@@ -100,4 +99,5 @@
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void rt_hw_uart_init(void);
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#endif
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@@ -860,7 +860,7 @@ void eth_rx_irq(int irqno,void *param)
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return;
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}
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void rt_hw_eth_init(void)
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int rt_hw_eth_init(void)
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{
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u64 base_addr = Gmac_base;
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struct synopGMACNetworkAdapter * synopGMACadapter;
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@@ -925,4 +925,9 @@ void rt_hw_eth_init(void)
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eth_dev.parent.eth_rx = rt_eth_rx;
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eth_device_init(&(eth_dev.parent), "e0");
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return 0;
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}
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INIT_DEVICE_EXPORT(rt_hw_eth_init);
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@@ -32,6 +32,6 @@
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#include "mii.h"
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#include "synopGMAC_types.h"
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void rt_hw_eth_init(void);
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int rt_hw_eth_init(void);
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#endif /*__SYNOPGMAC__H*/
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@@ -117,8 +117,8 @@ typedef int bool;
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*/
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//sw: nothing to display
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#define TR0(fmt, args...) rt_kprintf(fmt, ##args)
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#define TR(fmt, args...) rt_kprintf(fmt, ##args)
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#define TR0(fmt, args...) //rt_kprintf(fmt, ##args)
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#define TR(fmt, args...) //rt_kprintf(fmt, ##args)
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//#define TR rt_kprintf
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//typedef int bool;
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@@ -1,286 +0,0 @@
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/*
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* File : board.c
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* This file is part of RT-Thread RTOS
|
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* COPYRIGHT (C) 2006-2012, RT-Thread Develop Team
|
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*
|
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* The license and distribution terms for this file may be
|
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* found in the file LICENSE in this distribution or at
|
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* http://www.rt-thread.org/license/LICENSE
|
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*
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* Change Logs:
|
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* Date Author Notes
|
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* 2011-08-08 lgnq first version
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* 2015-07-09 chinesebear modified for loongson 1c
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*/
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#include <rthw.h>
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#include <rtthread.h>
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#include "uart.h"
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/**
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* @addtogroup Loongson LS1B
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*/
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/*@{*/
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#if defined(RT_USING_SERIAL) && defined(RT_USING_DEVICE)
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struct rt_uart_ls1c
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{
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struct rt_device parent;
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rt_uint32_t hw_base;
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rt_uint32_t irq;
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/* buffer for reception */
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rt_uint8_t read_index, save_index;
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rt_uint8_t rx_buffer[RT_UART_RX_BUFFER_SIZE];
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}uart_device;
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static void rt_uart_irqhandler(int irqno, void *param)
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{
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rt_ubase_t level;
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rt_uint8_t isr;
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struct rt_uart_ls1c *uart = &uart_device;
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/* read interrupt status and clear it */
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isr = UART_IIR(uart->hw_base);
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isr = (isr >> 1) & 0x3;
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/* receive data available */
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if (isr & 0x02)
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{
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/* Receive Data Available */
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while (UART_LSR(uart->hw_base) & UARTLSR_DR)
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{
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uart->rx_buffer[uart->save_index] = UART_DAT(uart->hw_base);
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level = rt_hw_interrupt_disable();
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uart->save_index ++;
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if (uart->save_index >= RT_UART_RX_BUFFER_SIZE)
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uart->save_index = 0;
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rt_hw_interrupt_enable(level);
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}
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/* invoke callback */
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if (uart->parent.rx_indicate != RT_NULL)
|
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{
|
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rt_size_t length;
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if (uart->read_index > uart->save_index)
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length = RT_UART_RX_BUFFER_SIZE - uart->read_index + uart->save_index;
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else
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length = uart->save_index - uart->read_index;
|
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|
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uart->parent.rx_indicate(&uart->parent, length);
|
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}
|
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}
|
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|
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return;
|
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}
|
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|
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static rt_err_t rt_uart_init(rt_device_t dev)
|
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{
|
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rt_uint32_t baud_div;
|
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struct rt_uart_ls1c *uart = (struct rt_uart_ls1c *)dev;
|
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|
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RT_ASSERT(uart != RT_NULL);
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|
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//#if 0
|
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/* init UART Hardware */
|
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UART_IER(uart->hw_base) = 0; /* clear interrupt */
|
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UART_FCR(uart->hw_base) = 0xc3; /* reset UART Rx/Tx */
|
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|
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/* enable UART clock */
|
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/* set databits, stopbits and parity. (8-bit data, 1 stopbit, no parity) */
|
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UART_LCR(uart->hw_base) = 0x80;
|
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|
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/* set baudrate */
|
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baud_div = DEV_CLK / 16 / UART_BAUDRATE /2;
|
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|
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UART_MSB(uart->hw_base) = (baud_div >> 8) & 0xff;
|
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UART_LSB(uart->hw_base) = baud_div & 0xff;
|
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|
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UART_LCR(uart->hw_base) = 0x03;
|
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|
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/* Enable UART unit, enable and clear FIFO */
|
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//UART_FCR(uart->hw_base) = UARTFCR_UUE | UARTFCR_FE | UARTFCR_TFLS | UARTFCR_RFLS;
|
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|
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/* enable RX interrupt */
|
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UART_IER(uart->hw_base) = UARTIER_IRXE|UARTIER_ILE;
|
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|
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//#endif
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|
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return RT_EOK;
|
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}
|
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|
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static rt_err_t rt_uart_open(rt_device_t dev, rt_uint16_t oflag)
|
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{
|
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struct rt_uart_ls1c *uart = (struct rt_uart_ls1c *)dev;
|
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|
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RT_ASSERT(uart != RT_NULL);
|
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if (dev->flag & RT_DEVICE_FLAG_INT_RX)
|
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{
|
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/* Enable the UART Interrupt */
|
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UART_IER(uart->hw_base) |= UARTIER_IRXE;
|
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|
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/* install interrupt */
|
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rt_hw_interrupt_install(uart->irq, rt_uart_irqhandler, RT_NULL, "UART");
|
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rt_hw_interrupt_umask(uart->irq);
|
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}
|
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return RT_EOK;
|
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}
|
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|
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static rt_err_t rt_uart_close(rt_device_t dev)
|
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{
|
||||
struct rt_uart_ls1c *uart = (struct rt_uart_ls1c *)dev;
|
||||
|
||||
RT_ASSERT(uart != RT_NULL);
|
||||
if (dev->flag & RT_DEVICE_FLAG_INT_RX)
|
||||
{
|
||||
/* Disable the UART Interrupt */
|
||||
UART_IER(uart->hw_base) &= ~(UARTIER_IRXE);
|
||||
}
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
static rt_size_t rt_uart_read(rt_device_t dev, rt_off_t pos, void *buffer, rt_size_t size)
|
||||
{
|
||||
rt_uint8_t *ptr;
|
||||
struct rt_uart_ls1c *uart = (struct rt_uart_ls1c *)dev;
|
||||
|
||||
RT_ASSERT(uart != RT_NULL);
|
||||
|
||||
/* point to buffer */
|
||||
ptr = (rt_uint8_t *)buffer;
|
||||
if (dev->flag & RT_DEVICE_FLAG_INT_RX)
|
||||
{
|
||||
while (size)
|
||||
{
|
||||
/* interrupt receive */
|
||||
rt_base_t level;
|
||||
|
||||
/* disable interrupt */
|
||||
level = rt_hw_interrupt_disable();
|
||||
if (uart->read_index != uart->save_index)
|
||||
{
|
||||
*ptr = uart->rx_buffer[uart->read_index];
|
||||
|
||||
uart->read_index ++;
|
||||
if (uart->read_index >= RT_UART_RX_BUFFER_SIZE)
|
||||
uart->read_index = 0;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* no data in rx buffer */
|
||||
|
||||
/* enable interrupt */
|
||||
rt_hw_interrupt_enable(level);
|
||||
break;
|
||||
}
|
||||
|
||||
/* enable interrupt */
|
||||
rt_hw_interrupt_enable(level);
|
||||
|
||||
ptr ++;
|
||||
size --;
|
||||
}
|
||||
|
||||
return (rt_uint32_t)ptr - (rt_uint32_t)buffer;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static rt_size_t rt_uart_write(rt_device_t dev, rt_off_t pos, const void *buffer, rt_size_t size)
|
||||
{
|
||||
char *ptr;
|
||||
struct rt_uart_ls1c *uart = (struct rt_uart_ls1c *)dev;
|
||||
|
||||
RT_ASSERT(uart != RT_NULL);
|
||||
|
||||
ptr = (char *)buffer;
|
||||
|
||||
if (dev->flag & RT_DEVICE_FLAG_STREAM)
|
||||
{
|
||||
/* stream mode */
|
||||
while (size)
|
||||
{
|
||||
if (*ptr == '\n')
|
||||
{
|
||||
/* FIFO status, contain valid data */
|
||||
while (!(UART_LSR(uart->hw_base) & (UARTLSR_TE | UARTLSR_TFE)));
|
||||
/* write data */
|
||||
UART_DAT(uart->hw_base) = '\r';
|
||||
}
|
||||
|
||||
/* FIFO status, contain valid data */
|
||||
while (!(UART_LSR(uart->hw_base) & (UARTLSR_TE | UARTLSR_TFE)));
|
||||
/* write data */
|
||||
UART_DAT(uart->hw_base) = *ptr;
|
||||
|
||||
ptr ++;
|
||||
size --;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
while (size != 0)
|
||||
{
|
||||
/* FIFO status, contain valid data */
|
||||
while (!(UART_LSR(uart->hw_base) & (UARTLSR_TE | UARTLSR_TFE)));
|
||||
|
||||
/* write data */
|
||||
UART_DAT(uart->hw_base) = *ptr;
|
||||
|
||||
ptr++;
|
||||
size--;
|
||||
}
|
||||
}
|
||||
|
||||
return (rt_size_t)ptr - (rt_size_t)buffer;
|
||||
}
|
||||
|
||||
void rt_hw_uart_init(void)
|
||||
{
|
||||
struct rt_uart_ls1c *uart;
|
||||
|
||||
/* get uart device */
|
||||
uart = &uart_device;
|
||||
|
||||
/* device initialization */
|
||||
uart->parent.type = RT_Device_Class_Char;
|
||||
rt_memset(uart->rx_buffer, 0, sizeof(uart->rx_buffer));
|
||||
uart->read_index = uart->save_index = 0;
|
||||
|
||||
#if defined(RT_USING_UART0)
|
||||
uart->hw_base = UART0_BASE;
|
||||
uart->irq = LS1C_UART0_IRQ;
|
||||
#elif defined(RT_USING_UART2)
|
||||
uart->hw_base = UART2_BASE;
|
||||
uart->irq = LS1C_UART2_IRQ;
|
||||
#elif defined(RT_USING_UART3)
|
||||
uart->hw_base = UART3_BASE;
|
||||
uart->irq = LS1C_UART3_IRQ;
|
||||
#endif
|
||||
|
||||
/* device interface */
|
||||
uart->parent.init = rt_uart_init;
|
||||
uart->parent.open = rt_uart_open;
|
||||
uart->parent.close = rt_uart_close;
|
||||
uart->parent.read = rt_uart_read;
|
||||
uart->parent.write = rt_uart_write;
|
||||
uart->parent.control = RT_NULL;
|
||||
uart->parent.user_data = RT_NULL;
|
||||
|
||||
rt_device_register(&uart->parent, "uart2",
|
||||
RT_DEVICE_FLAG_RDWR |
|
||||
RT_DEVICE_FLAG_STREAM |
|
||||
RT_DEVICE_FLAG_INT_RX);
|
||||
}
|
||||
#endif /* end of UART */
|
||||
|
||||
|
||||
|
||||
/*@}*/
|
||||
Reference in New Issue
Block a user