From 3defb749cb61f8b73ee96d37edb1a75ddb977d5d Mon Sep 17 00:00:00 2001 From: margguo Date: Mon, 23 May 2016 21:57:19 +0800 Subject: [PATCH 1/3] add 48 pins IC define in BSP/stm32f10x --- bsp/stm32f10x/drivers/gpio.c | 63 +++++++++++++++++++++++++++++++++--- 1 file changed, 58 insertions(+), 5 deletions(-) mode change 100644 => 100755 bsp/stm32f10x/drivers/gpio.c diff --git a/bsp/stm32f10x/drivers/gpio.c b/bsp/stm32f10x/drivers/gpio.c old mode 100644 new mode 100755 index 9a1b707456..f07c0a1c36 --- a/bsp/stm32f10x/drivers/gpio.c +++ b/bsp/stm32f10x/drivers/gpio.c @@ -8,8 +8,9 @@ * http://www.rt-thread.org/license/LICENSE * * Change Logs: - * Date Author Notes - * 2015-03-24 Bright the first version + * Date Author Notes + * 2015-03-24 Bright the first version + * 2016-05-23 Margguo@gmail.com Add 48 pins IC define */ #include @@ -19,7 +20,7 @@ #ifdef RT_USING_PIN -#define STM32F10X_PIN_NUMBERS 100 //[ 64, 100, 144 ] +#define STM32F10X_PIN_NUMBERS 48 //[48, 64, 100, 144 ] #define __STM32_PIN(index, rcc, gpio, gpio_index) { 0, RCC_##rcc##Periph_GPIO##gpio, GPIO##gpio, GPIO_Pin_##gpio_index} #define __STM32_PIN_DEFAULT {-1, 0, 0, 0} @@ -35,6 +36,58 @@ struct pin_index static const struct pin_index pins[] = { +#if (STM32F10X_PIN_NUMBERS == 48) + __STM32_PIN_DEFAULT, + __STM32_PIN_DEFAULT, + __STM32_PIN(2, APB2, C, 13), + __STM32_PIN(3, APB2, C, 14), + __STM32_PIN(4, APB2, C, 15), + __STM32_PIN(3, APB2, C, 14), + __STM32_PIN(4, APB2, C, 15), + __STM32_PIN_DEFAULT, + __STM32_PIN_DEFAULT, + __STM32_PIN_DEFAULT, + __STM32_PIN(10, APB2, A, 0), + __STM32_PIN(11, APB2, A, 1), + __STM32_PIN(11, APB2, A, 2), + __STM32_PIN(11, APB2, A, 3), + __STM32_PIN(14, APB2, A, 4), + __STM32_PIN(15, APB2, A, 5), + __STM32_PIN(16, APB2, A, 6), + __STM32_PIN(17, APB2, A, 7), + __STM32_PIN(18, APB2, B, 0), + __STM32_PIN(19, APB2, B, 1), + __STM32_PIN(20, APB2, B, 2), + __STM32_PIN(21, APB2, B, 10), + __STM32_PIN(22, APB2, B, 11), + __STM32_PIN_DEFAULT, + __STM32_PIN_DEFAULT, + __STM32_PIN(25, APB2, B, 12), + __STM32_PIN(26, APB2, B, 13), + __STM32_PIN(27, APB2, B, 14), + __STM32_PIN(28, APB2, B, 15), + __STM32_PIN(29, APB2, A, 8), + __STM32_PIN(30, APB2, A, 9), + __STM32_PIN(31, APB2, A, 10), + __STM32_PIN(32, APB2, A, 11), + __STM32_PIN(33, APB2, A, 12), + __STM32_PIN(34, APB2, A, 13), + __STM32_PIN_DEFAULT, + __STM32_PIN_DEFAULT, + __STM32_PIN(37, APB2, A, 14), + __STM32_PIN(38, APB2, A, 15), + __STM32_PIN(39, APB2, B, 3), + __STM32_PIN(40, APB2, B, 4), + __STM32_PIN(41, APB2, B, 5), + __STM32_PIN(42, APB2, B, 6), + __STM32_PIN(43, APB2, B, 7), + __STM32_PIN_DEFAULT, + __STM32_PIN(45, APB2, B, 8), + __STM32_PIN(46, APB2, B, 9), + __STM32_PIN_DEFAULT, + __STM32_PIN_DEFAULT, + +#endif #if (STM32F10X_PIN_NUMBERS == 64) __STM32_PIN_DEFAULT, __STM32_PIN_DEFAULT, @@ -216,7 +269,7 @@ static const struct pin_index pins[] = __STM32_PIN(7, APB2, C, 13), __STM32_PIN(8, APB2, C, 14), __STM32_PIN(9, APB2, C, 15), - + __STM32_PIN(10, APB2, F, 0), __STM32_PIN(11, APB2, F, 1), __STM32_PIN(12, APB2, F, 2), @@ -472,7 +525,7 @@ const static struct rt_pin_ops _stm32_pin_ops = int stm32_hw_pin_init(void) { int result; - + result = rt_device_pin_register("pin", &_stm32_pin_ops, RT_NULL); return result; } From 4bbbfab29ca29e3f74c21f2f840c7e3de621ff2b Mon Sep 17 00:00:00 2001 From: margguo Date: Mon, 23 May 2016 22:00:21 +0800 Subject: [PATCH 2/3] add 48 pins IC define in BSP/stm32f10x --- bsp/stm32f10x/drivers/gpio.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/bsp/stm32f10x/drivers/gpio.c b/bsp/stm32f10x/drivers/gpio.c index f07c0a1c36..8e3209dc3d 100755 --- a/bsp/stm32f10x/drivers/gpio.c +++ b/bsp/stm32f10x/drivers/gpio.c @@ -10,7 +10,7 @@ * Change Logs: * Date Author Notes * 2015-03-24 Bright the first version - * 2016-05-23 Margguo@gmail.com Add 48 pins IC define + * 2016-05-23 Margguo@gmail.com Add 48 pins IC define */ #include @@ -20,7 +20,7 @@ #ifdef RT_USING_PIN -#define STM32F10X_PIN_NUMBERS 48 //[48, 64, 100, 144 ] +#define STM32F10X_PIN_NUMBERS 100 //[48, 64, 100, 144 ] #define __STM32_PIN(index, rcc, gpio, gpio_index) { 0, RCC_##rcc##Periph_GPIO##gpio, GPIO##gpio, GPIO_Pin_##gpio_index} #define __STM32_PIN_DEFAULT {-1, 0, 0, 0} From 09b0e48439463e20d610b2e269f81a7b149930ee Mon Sep 17 00:00:00 2001 From: margguo Date: Mon, 23 May 2016 22:15:14 +0800 Subject: [PATCH 3/3] add 48 pins IC define in BSP/stm32f10x --- bsp/stm32f10x/drivers/gpio.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/bsp/stm32f10x/drivers/gpio.c b/bsp/stm32f10x/drivers/gpio.c index 8e3209dc3d..7bcff4602f 100755 --- a/bsp/stm32f10x/drivers/gpio.c +++ b/bsp/stm32f10x/drivers/gpio.c @@ -42,15 +42,15 @@ static const struct pin_index pins[] = __STM32_PIN(2, APB2, C, 13), __STM32_PIN(3, APB2, C, 14), __STM32_PIN(4, APB2, C, 15), - __STM32_PIN(3, APB2, C, 14), - __STM32_PIN(4, APB2, C, 15), + __STM32_PIN_DEFAULT, + __STM32_PIN_DEFAULT, __STM32_PIN_DEFAULT, __STM32_PIN_DEFAULT, __STM32_PIN_DEFAULT, __STM32_PIN(10, APB2, A, 0), __STM32_PIN(11, APB2, A, 1), - __STM32_PIN(11, APB2, A, 2), - __STM32_PIN(11, APB2, A, 3), + __STM32_PIN(12, APB2, A, 2), + __STM32_PIN(13, APB2, A, 3), __STM32_PIN(14, APB2, A, 4), __STM32_PIN(15, APB2, A, 5), __STM32_PIN(16, APB2, A, 6),