diff --git a/bsp/Infineon/libraries/HAL_Drivers/drv_soft_i2c.c b/bsp/Infineon/libraries/HAL_Drivers/drv_soft_i2c.c index f1d77bfa68..acba72991a 100644 --- a/bsp/Infineon/libraries/HAL_Drivers/drv_soft_i2c.c +++ b/bsp/Infineon/libraries/HAL_Drivers/drv_soft_i2c.c @@ -161,9 +161,9 @@ int rt_hw_i2c_init(void) { i2c_obj[i].ops = ifx_bit_ops_default; i2c_obj[i].ops.data = (void *)&soft_i2c_config[i]; - i2c_obj[i].i2c2_bus.priv = &i2c_obj[i].ops; + i2c_obj[i].i2c_bus.priv = &i2c_obj[i].ops; ifx_i2c_gpio_init(&i2c_obj[i]); - result = rt_i2c_bit_add_bus(&i2c_obj[i].i2c2_bus, soft_i2c_config[i].bus_name); + result = rt_i2c_bit_add_bus(&i2c_obj[i].i2c_bus, soft_i2c_config[i].bus_name); RT_ASSERT(result == RT_EOK); ifx_i2c_bus_unlock(&soft_i2c_config[i]); diff --git a/bsp/Infineon/libraries/HAL_Drivers/drv_soft_i2c.h b/bsp/Infineon/libraries/HAL_Drivers/drv_soft_i2c.h index a3f57ccab5..2c009ac89d 100644 --- a/bsp/Infineon/libraries/HAL_Drivers/drv_soft_i2c.h +++ b/bsp/Infineon/libraries/HAL_Drivers/drv_soft_i2c.h @@ -26,7 +26,7 @@ struct ifx_soft_i2c_config struct ifx_i2c { struct rt_i2c_bit_ops ops; - struct rt_i2c_bus_device i2c2_bus; + struct rt_i2c_bus_device i2c_bus; }; #ifdef BSP_USING_I2C1 diff --git a/bsp/airm2m/air32f103/libraries/rt_drivers/drv_soft_i2c.c b/bsp/airm2m/air32f103/libraries/rt_drivers/drv_soft_i2c.c index c0b188cdf2..e4815d7aeb 100644 --- a/bsp/airm2m/air32f103/libraries/rt_drivers/drv_soft_i2c.c +++ b/bsp/airm2m/air32f103/libraries/rt_drivers/drv_soft_i2c.c @@ -200,9 +200,9 @@ int rt_sw_i2c_init(void) { i2c_obj[i].ops = air32_bit_ops_default; i2c_obj[i].ops.data = (void*)&soft_i2c_config[i]; - i2c_obj[i].i2c2_bus.priv = &i2c_obj[i].ops; + i2c_obj[i].i2c_bus.priv = &i2c_obj[i].ops; air32_i2c_gpio_init(&i2c_obj[i]); - result = rt_i2c_bit_add_bus(&i2c_obj[i].i2c2_bus, soft_i2c_config[i].bus_name); + result = rt_i2c_bit_add_bus(&i2c_obj[i].i2c_bus, soft_i2c_config[i].bus_name); RT_ASSERT(result == RT_EOK); air32_i2c_bus_unlock(&soft_i2c_config[i]); diff --git a/bsp/airm2m/air32f103/libraries/rt_drivers/drv_soft_i2c.h b/bsp/airm2m/air32f103/libraries/rt_drivers/drv_soft_i2c.h index 7151ad1fab..2d7c723dc6 100644 --- a/bsp/airm2m/air32f103/libraries/rt_drivers/drv_soft_i2c.h +++ b/bsp/airm2m/air32f103/libraries/rt_drivers/drv_soft_i2c.h @@ -26,7 +26,7 @@ struct air32_soft_i2c_config struct air32_i2c { struct rt_i2c_bit_ops ops; - struct rt_i2c_bus_device i2c2_bus; + struct rt_i2c_bus_device i2c_bus; }; #ifdef BSP_USING_I2C1 diff --git a/bsp/apm32/libraries/Drivers/drv_soft_i2c.c b/bsp/apm32/libraries/Drivers/drv_soft_i2c.c index 3d45569e41..e9e6b1fcf0 100644 --- a/bsp/apm32/libraries/Drivers/drv_soft_i2c.c +++ b/bsp/apm32/libraries/Drivers/drv_soft_i2c.c @@ -33,7 +33,7 @@ struct apm32_soft_i2c_config struct apm32_soft_i2c { struct rt_i2c_bit_ops ops; - struct rt_i2c_bus_device i2c2_bus; + struct rt_i2c_bus_device i2c_bus; }; static const struct apm32_soft_i2c_config soft_i2c_config[] = @@ -222,10 +222,10 @@ int rt_hw_i2c_init(void) { i2c_obj[i].ops = apm32_bit_ops_default; i2c_obj[i].ops.data = (void *)&soft_i2c_config[i]; - i2c_obj[i].i2c2_bus.priv = &i2c_obj[i].ops; + i2c_obj[i].i2c_bus.priv = &i2c_obj[i].ops; apm32_soft_i2c_gpio_init(&i2c_obj[i]); - result = rt_i2c_bit_add_bus(&i2c_obj[i].i2c2_bus, soft_i2c_config[i].bus_name); + result = rt_i2c_bit_add_bus(&i2c_obj[i].i2c_bus, soft_i2c_config[i].bus_name); RT_ASSERT(result == RT_EOK); diff --git a/bsp/avr32/drivers/drv_soft_i2c.c b/bsp/avr32/drivers/drv_soft_i2c.c index 4409422445..756d0db04c 100644 --- a/bsp/avr32/drivers/drv_soft_i2c.c +++ b/bsp/avr32/drivers/drv_soft_i2c.c @@ -150,9 +150,9 @@ int rt_sw_i2c_init(void) { i2c_obj[i].ops = avr32_bit_ops_default; i2c_obj[i].ops.data = (void*)&soft_i2c_config[i]; - i2c_obj[i].i2c2_bus.priv = &i2c_obj[i].ops; + i2c_obj[i].i2c_bus.priv = &i2c_obj[i].ops; avr32_i2c_gpio_init(&i2c_obj[i]); - result = rt_i2c_bit_add_bus(&i2c_obj[i].i2c2_bus, soft_i2c_config[i].bus_name); + result = rt_i2c_bit_add_bus(&i2c_obj[i].i2c_bus, soft_i2c_config[i].bus_name); RT_ASSERT(result == RT_EOK); avr32_i2c_bus_unlock(&soft_i2c_config[i]); diff --git a/bsp/avr32/drivers/drv_soft_i2c.h b/bsp/avr32/drivers/drv_soft_i2c.h index e5bcc77ebd..01d81d7289 100644 --- a/bsp/avr32/drivers/drv_soft_i2c.h +++ b/bsp/avr32/drivers/drv_soft_i2c.h @@ -20,7 +20,7 @@ struct avr32_i2c { struct rt_i2c_bit_ops ops; - struct rt_i2c_bus_device i2c2_bus; + struct rt_i2c_bus_device i2c_bus; }; /* AVR32 config class */ diff --git a/bsp/bluetrum/libraries/hal_drivers/drv_soft_i2c.c b/bsp/bluetrum/libraries/hal_drivers/drv_soft_i2c.c index a73da2b860..c76f367978 100644 --- a/bsp/bluetrum/libraries/hal_drivers/drv_soft_i2c.c +++ b/bsp/bluetrum/libraries/hal_drivers/drv_soft_i2c.c @@ -193,9 +193,9 @@ int rt_hw_i2c_init(void) { i2c_obj[i].ops = ab32_bit_ops_default; i2c_obj[i].ops.data = (void*)&soft_i2c_config[i]; - i2c_obj[i].i2c2_bus.priv = &i2c_obj[i].ops; + i2c_obj[i].i2c_bus.priv = &i2c_obj[i].ops; ab32_i2c_gpio_init(&i2c_obj[i]); - result = rt_i2c_bit_add_bus(&i2c_obj[i].i2c2_bus, soft_i2c_config[i].bus_name); + result = rt_i2c_bit_add_bus(&i2c_obj[i].i2c_bus, soft_i2c_config[i].bus_name); RT_ASSERT(result == RT_EOK); ab32_i2c_bus_unlock(&soft_i2c_config[i]); diff --git a/bsp/bluetrum/libraries/hal_drivers/drv_soft_i2c.h b/bsp/bluetrum/libraries/hal_drivers/drv_soft_i2c.h index 9e26cf8ba4..216c3c4c67 100644 --- a/bsp/bluetrum/libraries/hal_drivers/drv_soft_i2c.h +++ b/bsp/bluetrum/libraries/hal_drivers/drv_soft_i2c.h @@ -29,7 +29,7 @@ struct ab32_soft_i2c_config struct ab32_i2c { struct rt_i2c_bit_ops ops; - struct rt_i2c_bus_device i2c2_bus; + struct rt_i2c_bus_device i2c_bus; }; #ifdef BSP_USING_I2C1 diff --git a/bsp/bouffalo_lab/libraries/rt_drivers/drv_soft_i2c.c b/bsp/bouffalo_lab/libraries/rt_drivers/drv_soft_i2c.c index 5278a927f4..4734b3888d 100644 --- a/bsp/bouffalo_lab/libraries/rt_drivers/drv_soft_i2c.c +++ b/bsp/bouffalo_lab/libraries/rt_drivers/drv_soft_i2c.c @@ -260,9 +260,9 @@ int rt_hw_i2c_init(void) { i2c_obj[i].ops = bl_bit_ops_default; i2c_obj[i].ops.data = (void*)&soft_i2c_config[i]; - i2c_obj[i].i2c2_bus.priv = &i2c_obj[i].ops; + i2c_obj[i].i2c_bus.priv = &i2c_obj[i].ops; bl_i2c_gpio_init(&i2c_obj[i]); - result = rt_i2c_bit_add_bus(&i2c_obj[i].i2c2_bus, soft_i2c_config[i].bus_name); + result = rt_i2c_bit_add_bus(&i2c_obj[i].i2c_bus, soft_i2c_config[i].bus_name); RT_ASSERT(result == RT_EOK); bl_i2c_bus_unlock(&soft_i2c_config[i]); diff --git a/bsp/bouffalo_lab/libraries/rt_drivers/drv_soft_i2c.h b/bsp/bouffalo_lab/libraries/rt_drivers/drv_soft_i2c.h index 07896eb399..3275c2c4c6 100644 --- a/bsp/bouffalo_lab/libraries/rt_drivers/drv_soft_i2c.h +++ b/bsp/bouffalo_lab/libraries/rt_drivers/drv_soft_i2c.h @@ -19,7 +19,7 @@ struct bl_i2c { struct rt_i2c_bit_ops ops; - struct rt_i2c_bus_device i2c2_bus; + struct rt_i2c_bus_device i2c_bus; }; /* bl config class */ diff --git a/bsp/gd32/arm/libraries/gd32_drivers/drv_soft_i2c.c b/bsp/gd32/arm/libraries/gd32_drivers/drv_soft_i2c.c index 18c9795c9e..75d976285b 100644 --- a/bsp/gd32/arm/libraries/gd32_drivers/drv_soft_i2c.c +++ b/bsp/gd32/arm/libraries/gd32_drivers/drv_soft_i2c.c @@ -179,10 +179,10 @@ int rt_hw_i2c_init(void) { i2c_obj[i].ops = gd32_bit_ops_default; i2c_obj[i].ops.data = (void*)&soft_i2c_config[i]; - i2c_obj[i].i2c2_bus.priv = &i2c_obj[i].ops; + i2c_obj[i].i2c_bus.priv = &i2c_obj[i].ops; gd32_i2c_gpio_init(&i2c_obj[i]); - result = rt_i2c_bit_add_bus(&i2c_obj[i].i2c2_bus, soft_i2c_config[i].bus_name); + result = rt_i2c_bit_add_bus(&i2c_obj[i].i2c_bus, soft_i2c_config[i].bus_name); RT_ASSERT(result == RT_EOK); diff --git a/bsp/gd32/arm/libraries/gd32_drivers/drv_soft_i2c.h b/bsp/gd32/arm/libraries/gd32_drivers/drv_soft_i2c.h index 2ce47fc88b..f8ef15653c 100644 --- a/bsp/gd32/arm/libraries/gd32_drivers/drv_soft_i2c.h +++ b/bsp/gd32/arm/libraries/gd32_drivers/drv_soft_i2c.h @@ -32,7 +32,7 @@ struct gd32_soft_i2c_config struct gd32_i2c { struct rt_i2c_bit_ops ops; - struct rt_i2c_bus_device i2c2_bus; + struct rt_i2c_bus_device i2c_bus; }; #ifdef BSP_USING_I2C0 diff --git a/bsp/gd32/risc-v/libraries/gd32_drivers/drv_soft_i2c.c b/bsp/gd32/risc-v/libraries/gd32_drivers/drv_soft_i2c.c index a8282e16ff..956cbdd460 100644 --- a/bsp/gd32/risc-v/libraries/gd32_drivers/drv_soft_i2c.c +++ b/bsp/gd32/risc-v/libraries/gd32_drivers/drv_soft_i2c.c @@ -179,10 +179,10 @@ int rt_hw_i2c_init(void) { i2c_obj[i].ops = gd32_bit_ops_default; i2c_obj[i].ops.data = (void*)&soft_i2c_config[i]; - i2c_obj[i].i2c2_bus.priv = &i2c_obj[i].ops; + i2c_obj[i].i2c_bus.priv = &i2c_obj[i].ops; gd32_i2c_gpio_init(&i2c_obj[i]); - result = rt_i2c_bit_add_bus(&i2c_obj[i].i2c2_bus, soft_i2c_config[i].bus_name); + result = rt_i2c_bit_add_bus(&i2c_obj[i].i2c_bus, soft_i2c_config[i].bus_name); RT_ASSERT(result == RT_EOK); diff --git a/bsp/gd32/risc-v/libraries/gd32_drivers/drv_soft_i2c.h b/bsp/gd32/risc-v/libraries/gd32_drivers/drv_soft_i2c.h index 1c8e21dcc0..af91af4c97 100644 --- a/bsp/gd32/risc-v/libraries/gd32_drivers/drv_soft_i2c.h +++ b/bsp/gd32/risc-v/libraries/gd32_drivers/drv_soft_i2c.h @@ -32,7 +32,7 @@ struct gd32_soft_i2c_config struct gd32_i2c { struct rt_i2c_bit_ops ops; - struct rt_i2c_bus_device i2c2_bus; + struct rt_i2c_bus_device i2c_bus; }; #ifdef BSP_USING_I2C0 diff --git a/bsp/lpc55sxx/Libraries/drivers/drv_soft_i2c.c b/bsp/lpc55sxx/Libraries/drivers/drv_soft_i2c.c index 54e007b791..9de56d4ffb 100644 --- a/bsp/lpc55sxx/Libraries/drivers/drv_soft_i2c.c +++ b/bsp/lpc55sxx/Libraries/drivers/drv_soft_i2c.c @@ -194,9 +194,9 @@ int rt_soft_i2c_init(void) { i2c_obj[i].ops = lpc55s69_bit_ops_default; i2c_obj[i].ops.data = (void*)&soft_i2c_config[i]; - i2c_obj[i].i2c2_bus.priv = &i2c_obj[i].ops; + i2c_obj[i].i2c_bus.priv = &i2c_obj[i].ops; lpc55s69_i2c_gpio_init(&i2c_obj[i]); - result = rt_i2c_bit_add_bus(&i2c_obj[i].i2c2_bus, soft_i2c_config[i].bus_name); + result = rt_i2c_bit_add_bus(&i2c_obj[i].i2c_bus, soft_i2c_config[i].bus_name); RT_ASSERT(result == RT_EOK); lpc55s69_i2c_bus_unlock(&soft_i2c_config[i]); diff --git a/bsp/lpc55sxx/Libraries/drivers/drv_soft_i2c.h b/bsp/lpc55sxx/Libraries/drivers/drv_soft_i2c.h index a1459dae0c..41fd652490 100644 --- a/bsp/lpc55sxx/Libraries/drivers/drv_soft_i2c.h +++ b/bsp/lpc55sxx/Libraries/drivers/drv_soft_i2c.h @@ -24,7 +24,7 @@ struct lpc55s69_soft_i2c_config struct lpc55s69_i2c { struct rt_i2c_bit_ops ops; - struct rt_i2c_bus_device i2c2_bus; + struct rt_i2c_bus_device i2c_bus; }; #ifdef BSP_USING_SOFT_I2C1 diff --git a/bsp/n32/libraries/n32_drivers/drv_i2c.c b/bsp/n32/libraries/n32_drivers/drv_i2c.c index 3b2cb35e0e..d1cec93bf0 100644 --- a/bsp/n32/libraries/n32_drivers/drv_i2c.c +++ b/bsp/n32/libraries/n32_drivers/drv_i2c.c @@ -395,10 +395,10 @@ int rt_hw_i2c_init(void) { i2c_obj[i].ops = n32_bit_ops_default; i2c_obj[i].ops.data = (void*)&soft_i2c_config[i]; - i2c_obj[i].i2c2_bus.priv = &i2c_obj[i].ops; + i2c_obj[i].i2c_bus.priv = &i2c_obj[i].ops; n32_i2c_gpio_init(&i2c_obj[i]); - result = rt_i2c_bit_add_bus(&i2c_obj[i].i2c2_bus, soft_i2c_config[i].bus_name); + result = rt_i2c_bit_add_bus(&i2c_obj[i].i2c_bus, soft_i2c_config[i].bus_name); RT_ASSERT(result == RT_EOK); n32_i2c_bus_unlock(&soft_i2c_config[i]); diff --git a/bsp/n32/libraries/n32_drivers/drv_i2c.h b/bsp/n32/libraries/n32_drivers/drv_i2c.h index 27438fc2d4..93b2f19658 100644 --- a/bsp/n32/libraries/n32_drivers/drv_i2c.h +++ b/bsp/n32/libraries/n32_drivers/drv_i2c.h @@ -32,7 +32,7 @@ struct n32_soft_i2c_config struct n32_i2c { struct rt_i2c_bit_ops ops; - struct rt_i2c_bus_device i2c2_bus; + struct rt_i2c_bus_device i2c_bus; }; #ifdef BSP_USING_I2C1 diff --git a/bsp/nrf5x/libraries/drivers/drv_i2c.c b/bsp/nrf5x/libraries/drivers/drv_i2c.c index d66b74a83f..c2efab809b 100644 --- a/bsp/nrf5x/libraries/drivers/drv_i2c.c +++ b/bsp/nrf5x/libraries/drivers/drv_i2c.c @@ -53,7 +53,7 @@ static drv_i2c_cfg_t drv_i2c_2 = .sda_pin = BSP_I2C2_SDA_PIN, .twi_instance = NRFX_TWIM_INSTANCE(2) }; -static struct rt_i2c_bus_device i2c2_bus; +static struct rt_i2c_bus_device i2c_bus; #endif #ifdef BSP_USING_I2C3 static drv_i2c_cfg_t drv_i2c_3 = @@ -153,11 +153,11 @@ int rt_hw_i2c_init(void) rt_i2c_bus_device_register(&i2c1_bus, "i2c1"); #endif #ifdef BSP_USING_I2C2 - i2c2_bus.ops= &_i2c_ops; - i2c2_bus.timeout = 0; - i2c2_bus.priv = (void *)&drv_i2c_2; - twi_master_init(&i2c2_bus); - rt_i2c_bus_device_register(&i2c2_bus, "i2c2"); + i2c_bus.ops= &_i2c_ops; + i2c_bus.timeout = 0; + i2c_bus.priv = (void *)&drv_i2c_2; + twi_master_init(&i2c_bus); + rt_i2c_bus_device_register(&i2c_bus, "i2c2"); #endif #ifdef BSP_USING_I2C3 i2c3_bus.ops= &_i2c_ops; diff --git a/bsp/raspberry-pico/drivers/drv_soft_i2c.c b/bsp/raspberry-pico/drivers/drv_soft_i2c.c index f1e33de19a..1b9421c136 100644 --- a/bsp/raspberry-pico/drivers/drv_soft_i2c.c +++ b/bsp/raspberry-pico/drivers/drv_soft_i2c.c @@ -158,9 +158,9 @@ int rt_soft_i2c_init(void) { i2c_obj[i].ops = pico_bit_ops_default; i2c_obj[i].ops.data = (void*)&soft_i2c_config[i]; - i2c_obj[i].i2c2_bus.priv = &i2c_obj[i].ops; + i2c_obj[i].i2c_bus.priv = &i2c_obj[i].ops; pico_i2c_gpio_init(&i2c_obj[i]); - result = rt_i2c_bit_add_bus(&i2c_obj[i].i2c2_bus, soft_i2c_config[i].bus_name); + result = rt_i2c_bit_add_bus(&i2c_obj[i].i2c_bus, soft_i2c_config[i].bus_name); RT_ASSERT(result == RT_EOK); pico_i2c_bus_unlock(&soft_i2c_config[i]); diff --git a/bsp/raspberry-pico/drivers/drv_soft_i2c.h b/bsp/raspberry-pico/drivers/drv_soft_i2c.h index d32617a8db..b5e663b673 100644 --- a/bsp/raspberry-pico/drivers/drv_soft_i2c.h +++ b/bsp/raspberry-pico/drivers/drv_soft_i2c.h @@ -20,7 +20,7 @@ struct pico_i2c { struct rt_i2c_bit_ops ops; - struct rt_i2c_bus_device i2c2_bus; + struct rt_i2c_bus_device i2c_bus; }; /* pico config class */ diff --git a/bsp/renesas/libraries/HAL_Drivers/SConscript b/bsp/renesas/libraries/HAL_Drivers/SConscript index c0db499f86..4e5d85fb40 100644 --- a/bsp/renesas/libraries/HAL_Drivers/SConscript +++ b/bsp/renesas/libraries/HAL_Drivers/SConscript @@ -25,14 +25,14 @@ if GetDepend(['BSP_USING_WDT']): if GetDepend(['BSP_USING_ONCHIP_RTC']): src += ['drv_rtc.c'] -if GetDepend(['BSP_USING_I2C', 'RT_USING_I2C_BITOPS']): +if GetDepend(['BSP_USING_SOFT_I2C']): if GetDepend('BSP_USING_I2C0') or GetDepend('BSP_USING_I2C1') or GetDepend('BSP_USING_I2C2'): src += ['drv_soft_i2c.c'] -if GetDepend(['BSP_USING_I2C', 'BSP_USING_HW_I2C']): +if GetDepend(['BSP_USING_HW_I2C']): src += ['drv_i2c.c'] -if GetDepend(['BSP_USING_I2C', 'BSP_USING_SCI_I2C']): +if GetDepend(['BSP_USING_SCI_I2C']): src += ['drv_sci_i2c.c'] if GetDepend(['BSP_USING_SPI']): diff --git a/bsp/renesas/libraries/HAL_Drivers/drv_soft_i2c.c b/bsp/renesas/libraries/HAL_Drivers/drv_soft_i2c.c index ac2ea26284..3eede605a1 100644 --- a/bsp/renesas/libraries/HAL_Drivers/drv_soft_i2c.c +++ b/bsp/renesas/libraries/HAL_Drivers/drv_soft_i2c.c @@ -12,7 +12,7 @@ #include "drv_soft_i2c.h" #include "drv_config.h" -#ifdef RT_USING_I2C +#ifdef BSP_USING_SOFT_I2C #define DBG_TAG "drv.i2c" #ifdef DRV_DEBUG @@ -202,9 +202,9 @@ int rt_hw_i2c_init(void) { i2c_obj[i].ops = ra_bit_ops_default; i2c_obj[i].ops.data = (void *)&soft_i2c_config[i]; - i2c_obj[i].i2c2_bus.priv = &i2c_obj[i].ops; + i2c_obj[i].i2c_bus.priv = &i2c_obj[i].ops; ra_i2c_gpio_init(&i2c_obj[i]); - result = rt_i2c_bit_add_bus(&i2c_obj[i].i2c2_bus, soft_i2c_config[i].bus_name); + result = rt_i2c_bit_add_bus(&i2c_obj[i].i2c_bus, soft_i2c_config[i].bus_name); RT_ASSERT(result == RT_EOK); ra_i2c_bus_unlock(&soft_i2c_config[i]); @@ -218,4 +218,4 @@ int rt_hw_i2c_init(void) } INIT_BOARD_EXPORT(rt_hw_i2c_init); -#endif /* RT_USING_I2C */ +#endif /* BSP_USING_SOFT_I2C */ diff --git a/bsp/renesas/libraries/HAL_Drivers/drv_soft_i2c.h b/bsp/renesas/libraries/HAL_Drivers/drv_soft_i2c.h index 24881cd25b..9873659492 100644 --- a/bsp/renesas/libraries/HAL_Drivers/drv_soft_i2c.h +++ b/bsp/renesas/libraries/HAL_Drivers/drv_soft_i2c.h @@ -27,9 +27,15 @@ struct ra_soft_i2c_config struct ra_i2c { struct rt_i2c_bit_ops ops; - struct rt_i2c_bus_device i2c2_bus; + struct rt_i2c_bus_device i2c_bus; }; +#ifdef BSP_USING_I2C0 + #define BSP_I2C0_SCL_PIN BSP_IO_PORT_02_PIN_02 + #define BSP_I2C0_SDA_PIN BSP_IO_PORT_02_PIN_03 +#endif + + #ifdef BSP_USING_I2C0 #define I2C0_BUS_CONFIG \ { \ diff --git a/bsp/renesas/ra6m3-hmi-board/.settings/standalone.prefs b/bsp/renesas/ra6m3-hmi-board/.settings/standalone.prefs index 1394e92dba..f1d840075d 100644 --- a/bsp/renesas/ra6m3-hmi-board/.settings/standalone.prefs +++ b/bsp/renesas/ra6m3-hmi-board/.settings/standalone.prefs @@ -1,23 +1,23 @@ -#Tue Oct 31 10:46:22 CST 2023 +#Wed Jan 10 09:43:46 CST 2024 com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#Common\#\#all\#\#fsp_common\#\#\#\#3.5.0/libraries= com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#ra6m3\#\#fsp\#\#\#\#3.5.0/libraries= com.renesas.cdt.ddsc.content/com.renesas.cdt.ddsc.content.defaultlinkerscript=script/fsp.scat com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#ra6m3\#\#fsp\#\#\#\#3.5.0/all=143358381,ra/fsp/src/bsp/mcu/ra6m3/bsp_elc.h|3427620923,ra/fsp/src/bsp/mcu/ra6m3/bsp_mcu_info.h|2743353138,ra/fsp/src/bsp/mcu/ra6m3/bsp_feature.h com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_adc\#\#\#\#3.5.0/libraries= com.renesas.cdt.ddsc.threads.configurator/collapse/module.driver.uart_on_sci_uart.552817864=false -com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#Common\#\#all\#\#fsp_common\#\#\#\#3.5.0/all=546480625,ra/fsp/inc/fsp_common_api.h|400573940,ra/fsp/src/bsp/mcu/all/bsp_register_protection.h|2977689308,ra/fsp/src/bsp/mcu/all/bsp_mcu_api.h|2386285210,ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/renesas.h|2425160085,ra/fsp/inc/api/bsp_api.h|3998046333,ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/base_addresses.h|460577388,ra/fsp/src/bsp/mcu/all/bsp_io.h|3492513568,ra/fsp/src/bsp/mcu/all/bsp_register_protection.c|3753300083,ra/fsp/src/bsp/mcu/all/bsp_arm_exceptions.h|568600546,ra/fsp/src/bsp/cmsis/Device/RENESAS/Source/startup.c|3297195641,ra/fsp/inc/fsp_version.h|3606266210,ra/fsp/src/bsp/mcu/all/bsp_rom_registers.c|470601830,ra/fsp/src/bsp/mcu/all/bsp_clocks.c|3255765648,ra/fsp/src/bsp/cmsis/Device/RENESAS/Source/system.c|2208590403,ra/fsp/inc/instances/r_ioport.h|1630997354,ra/fsp/src/bsp/mcu/all/bsp_irq.c|3984836408,ra/fsp/src/bsp/mcu/all/bsp_group_irq.h|4222527282,ra/fsp/src/bsp/mcu/all/bsp_module_stop.h|1499520276,ra/fsp/src/bsp/mcu/all/bsp_group_irq.c|731782070,ra/fsp/src/bsp/mcu/all/bsp_irq.h|1904866635,ra/fsp/src/bsp/mcu/all/bsp_clocks.h|1615019982,ra/fsp/src/bsp/mcu/all/bsp_sbrk.c|2308894280,ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/system.h|3549961311,ra/fsp/src/bsp/mcu/all/bsp_tfu.h|521902797,ra/fsp/src/bsp/mcu/all/bsp_security.h|2847966430,ra/fsp/src/bsp/mcu/all/bsp_security.c|1236602439,ra/fsp/src/bsp/mcu/all/bsp_io.c|1552630912,ra/fsp/src/bsp/mcu/all/bsp_guard.h|4051445857,ra/fsp/src/bsp/mcu/all/bsp_common.h|1353647784,ra/fsp/src/bsp/mcu/all/bsp_delay.c|2906400,ra/fsp/src/bsp/mcu/all/bsp_common.c|2920829723,ra/fsp/src/bsp/mcu/all/bsp_guard.c|3983299396,ra/fsp/src/bsp/mcu/all/bsp_delay.h|1992062042,ra/fsp/src/bsp/mcu/all/bsp_compiler_support.h|1728953905,ra/fsp/inc/fsp_features.h|1939984091,ra/fsp/inc/api/r_ioport_api.h +com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#Common\#\#all\#\#fsp_common\#\#\#\#3.5.0/all=470601830,ra/fsp/src/bsp/mcu/all/bsp_clocks.c|2847966430,ra/fsp/src/bsp/mcu/all/bsp_security.c|2208590403,ra/fsp/inc/instances/r_ioport.h|4222527282,ra/fsp/src/bsp/mcu/all/bsp_module_stop.h|1992062042,ra/fsp/src/bsp/mcu/all/bsp_compiler_support.h|2425160085,ra/fsp/inc/api/bsp_api.h|521902797,ra/fsp/src/bsp/mcu/all/bsp_security.h|4051445857,ra/fsp/src/bsp/mcu/all/bsp_common.h|2920829723,ra/fsp/src/bsp/mcu/all/bsp_guard.c|400573940,ra/fsp/src/bsp/mcu/all/bsp_register_protection.h|1552630912,ra/fsp/src/bsp/mcu/all/bsp_guard.h|731782070,ra/fsp/src/bsp/mcu/all/bsp_irq.h|2906400,ra/fsp/src/bsp/mcu/all/bsp_common.c|1499520276,ra/fsp/src/bsp/mcu/all/bsp_group_irq.c|3492513568,ra/fsp/src/bsp/mcu/all/bsp_register_protection.c|2308894280,ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/system.h|1236602439,ra/fsp/src/bsp/mcu/all/bsp_io.c|3297195641,ra/fsp/inc/fsp_version.h|546480625,ra/fsp/inc/fsp_common_api.h|3998046333,ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/base_addresses.h|460577388,ra/fsp/src/bsp/mcu/all/bsp_io.h|1728953905,ra/fsp/inc/fsp_features.h|3983299396,ra/fsp/src/bsp/mcu/all/bsp_delay.h|3255765648,ra/fsp/src/bsp/cmsis/Device/RENESAS/Source/system.c|1615019982,ra/fsp/src/bsp/mcu/all/bsp_sbrk.c|2386285210,ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/renesas.h|2977689308,ra/fsp/src/bsp/mcu/all/bsp_mcu_api.h|3753300083,ra/fsp/src/bsp/mcu/all/bsp_arm_exceptions.h|1353647784,ra/fsp/src/bsp/mcu/all/bsp_delay.c|3606266210,ra/fsp/src/bsp/mcu/all/bsp_rom_registers.c|3984836408,ra/fsp/src/bsp/mcu/all/bsp_group_irq.h|1630997354,ra/fsp/src/bsp/mcu/all/bsp_irq.c|3549961311,ra/fsp/src/bsp/mcu/all/bsp_tfu.h|1939984091,ra/fsp/inc/api/r_ioport_api.h|568600546,ra/fsp/src/bsp/cmsis/Device/RENESAS/Source/startup.c|1904866635,ra/fsp/src/bsp/mcu/all/bsp_clocks.h com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#ra6m3\#\#device\#\#R7FA6M3AH3CFB\#\#3.5.0/libraries= com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_sci_uart\#\#\#\#3.5.0/libraries= com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_gpt\#\#\#\#3.5.0/libraries= com.renesas.cdt.ddsc.settingseditor/com.renesas.cdt.ddsc.settingseditor.active_page=SWPConfigurator -com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_gpt\#\#\#\#3.5.0/all=1958999550,ra/fsp/src/r_gpt/r_gpt.c|232390045,ra/fsp/inc/api/r_timer_api.h|2886639616,ra/fsp/inc/instances/r_gpt.h -com.renesas.cdt.ddsc.packs.componentfiles/Arm\#\#CMSIS\#\#CMSIS5\#\#CoreM\#\#\#\#5.8.0+renesas.0.fsp.3.5.0/all=1441545198,ra/arm/CMSIS_5/LICENSE.txt|3898569239,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_armclang.h|2327633156,ra/arm/CMSIS_5/CMSIS/Core/Include/core_sc000.h|1372010515,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm23.h|3552689244,ra/arm/CMSIS_5/CMSIS/Core/Include/core_armv81mml.h|2381390623,ra/arm/CMSIS_5/CMSIS/Core/Include/core_armv8mml.h|1044777225,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_armcc.h|965562395,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_gcc.h|2333906976,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_version.h|2701379970,ra/arm/CMSIS_5/CMSIS/Core/Include/mpu_armv8.h|3911746910,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_armclang_ltm.h|1494441116,ra/arm/CMSIS_5/CMSIS/Core/Include/mpu_armv7.h|2635219934,ra/arm/CMSIS_5/CMSIS/Core/Include/tz_context.h|1168186370,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm55.h|4290386133,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm0plus.h|302860276,ra/arm/CMSIS_5/CMSIS/Core/Include/cachel1_armv7.h|3163610011,ra/arm/CMSIS_5/CMSIS/Core/Include/pmu_armv8.h|2718020009,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm33.h|364344841,ra/arm/CMSIS_5/CMSIS/Core/Include/core_sc300.h|3007265674,ra/arm/CMSIS_5/CMSIS/Core/Include/core_armv8mbl.h|1745843273,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm0.h|3127123217,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm35p.h|1564341101,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm7.h|1577199483,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_iccarm.h|304461792,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm3.h|3358993753,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm4.h|1017116116,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_compiler.h|2851112248,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm1.h +com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_gpt\#\#\#\#3.5.0/all=1958999550,ra/fsp/src/r_gpt/r_gpt.c|2886639616,ra/fsp/inc/instances/r_gpt.h|232390045,ra/fsp/inc/api/r_timer_api.h +com.renesas.cdt.ddsc.packs.componentfiles/Arm\#\#CMSIS\#\#CMSIS5\#\#CoreM\#\#\#\#5.8.0+renesas.0.fsp.3.5.0/all=965562395,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_gcc.h|1494441116,ra/arm/CMSIS_5/CMSIS/Core/Include/mpu_armv7.h|2701379970,ra/arm/CMSIS_5/CMSIS/Core/Include/mpu_armv8.h|1577199483,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_iccarm.h|1017116116,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_compiler.h|1372010515,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm23.h|3163610011,ra/arm/CMSIS_5/CMSIS/Core/Include/pmu_armv8.h|2327633156,ra/arm/CMSIS_5/CMSIS/Core/Include/core_sc000.h|2635219934,ra/arm/CMSIS_5/CMSIS/Core/Include/tz_context.h|1564341101,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm7.h|3007265674,ra/arm/CMSIS_5/CMSIS/Core/Include/core_armv8mbl.h|3911746910,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_armclang_ltm.h|4290386133,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm0plus.h|1745843273,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm0.h|1441545198,ra/arm/CMSIS_5/LICENSE.txt|2851112248,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm1.h|364344841,ra/arm/CMSIS_5/CMSIS/Core/Include/core_sc300.h|2381390623,ra/arm/CMSIS_5/CMSIS/Core/Include/core_armv8mml.h|3358993753,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm4.h|304461792,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm3.h|2333906976,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_version.h|3898569239,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_armclang.h|1168186370,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm55.h|2718020009,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm33.h|3127123217,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm35p.h|1044777225,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_armcc.h|3552689244,ra/arm/CMSIS_5/CMSIS/Core/Include/core_armv81mml.h|302860276,ra/arm/CMSIS_5/CMSIS/Core/Include/cachel1_armv7.h com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#ra6m3\#\#device\#\#\#\#3.5.0/all=2308894280,ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/system.h com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#Board\#\#custom\#\#\#\#3.5.0/all= -com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_adc\#\#\#\#3.5.0/all=4250819551,ra/fsp/inc/instances/r_adc.h|1515334001,ra/fsp/inc/api/r_elc_api.h|1610456547,ra/fsp/inc/api/r_transfer_api.h|1675086128,ra/fsp/inc/api/r_adc_api.h|377989633,ra/fsp/src/r_adc/r_adc.c -com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_ioport\#\#\#\#3.5.0/all=3254285722,ra/fsp/src/r_ioport/r_ioport.c|1939984091,ra/fsp/inc/api/r_ioport_api.h|2208590403,ra/fsp/inc/instances/r_ioport.h +com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_adc\#\#\#\#3.5.0/all=1675086128,ra/fsp/inc/api/r_adc_api.h|1515334001,ra/fsp/inc/api/r_elc_api.h|1610456547,ra/fsp/inc/api/r_transfer_api.h|4250819551,ra/fsp/inc/instances/r_adc.h|377989633,ra/fsp/src/r_adc/r_adc.c +com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_ioport\#\#\#\#3.5.0/all=1939984091,ra/fsp/inc/api/r_ioport_api.h|2208590403,ra/fsp/inc/instances/r_ioport.h|3254285722,ra/fsp/src/r_ioport/r_ioport.c com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#ra6m3\#\#device\#\#\#\#3.5.0/libraries= -com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_sci_uart\#\#\#\#3.5.0/all=1889256766,ra/fsp/inc/instances/r_sci_uart.h|1610456547,ra/fsp/inc/api/r_transfer_api.h|3916852077,ra/fsp/inc/api/r_uart_api.h|3094200246,ra/fsp/src/r_sci_uart/r_sci_uart.c +com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_sci_uart\#\#\#\#3.5.0/all=3094200246,ra/fsp/src/r_sci_uart/r_sci_uart.c|1610456547,ra/fsp/inc/api/r_transfer_api.h|1889256766,ra/fsp/inc/instances/r_sci_uart.h|3916852077,ra/fsp/inc/api/r_uart_api.h com.renesas.cdt.ddsc.threads.configurator/collapse/module.driver.uart_on_sci_uart.606654632=false com.renesas.cdt.ddsc.packs.componentfiles/Arm\#\#CMSIS\#\#CMSIS5\#\#CoreM\#\#\#\#5.8.0+renesas.0.fsp.3.5.0/libraries= com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#Board\#\#custom\#\#\#\#3.5.0/libraries= diff --git a/bsp/renesas/ra6m3-hmi-board/board/Kconfig b/bsp/renesas/ra6m3-hmi-board/board/Kconfig index 1cddff6ff2..b9e8d8a5fa 100644 --- a/bsp/renesas/ra6m3-hmi-board/board/Kconfig +++ b/bsp/renesas/ra6m3-hmi-board/board/Kconfig @@ -14,15 +14,14 @@ menu "Hardware Drivers Config" select PKG_USING_RTDUINO select BSP_USING_UART4 select BSP_USING_GPIO - select BSP_USING_TIM - select BSP_USING_TIM2 select BSP_USING_ADC select BSP_USING_ADC0 select BSP_USING_PWM + select BSP_USING_PWM0 select BSP_USING_PWM2 - select BSP_USING_PWM2_CH2 - select BSP_USING_I2C - select BSP_USING_I2C2 + select BSP_USING_PWM8 + select BSP_USING_SOFT_I2C + select BSP_USING_I2C0 imply RTDUINO_USING_SERVO imply RTDUINO_USING_WIRE default n @@ -463,53 +462,22 @@ menu "Hardware Drivers Config" default n endif - menuconfig BSP_USING_I2C + menuconfig BSP_USING_SOFT_I2C bool "Enable software I2C bus" select RT_USING_I2C select RT_USING_I2C_BITOPS select RT_USING_PIN default n - - if BSP_USING_I2C - config BSP_USING_I2C - menuconfig BSP_USING_I2C0 + if BSP_USING_SOFT_I2C + config BSP_USING_I2C0 bool "Enable I2C0 Bus (software simulation)" default n - if BSP_USING_I2C0 - comment "Please select your i2c analog pin, e.g. 'P512': BSP_IO_PORT_05_PIN_12" - config BSP_I2C0_SCL_PIN - string "i2c0 scl pin number (Pxxx)" - default "pxxx" - config BSP_I2C0_SDA_PIN - string "i2c0 sda pin number (Pxxx)" - default "pxxx" - endif - - menuconfig BSP_USING_I2C1 + config BSP_USING_I2C1 bool "Enable I2C1 Bus (software simulation)" default n - if BSP_USING_I2C1 - comment "Please select your i2c analog pin, e.g. 'P512': BSP_IO_PORT_05_PIN_12" - config BSP_I2C1_SCL_PIN - string "i2c1 scl pin number (Pxxx)" - default "pxxx" - config BSP_I2C1_SDA_PIN - string "i2c1 sda pin number (Pxxx)" - default "pxxx" - endif - - menuconfig BSP_USING_I2C2 + config BSP_USING_I2C2 bool "Enable I2C2 Bus (software simulation)" default n - if BSP_USING_I2C2 - comment "Please select your i2c analog pin, e.g. 'P512': BSP_IO_PORT_05_PIN_12" - config BSP_I2C2_SCL_PIN - string "i2c2 scl pin number (P512)" - default "BSP_IO_PORT_05_PIN_12" - config BSP_I2C2_SDA_PIN - string "i2c2 sda pin number (P511)" - default "BSP_IO_PORT_05_PIN_11" - endif endif menuconfig BSP_USING_ADC @@ -568,18 +536,17 @@ menu "Hardware Drivers Config" default n select RT_USING_PWM if BSP_USING_PWM - config BSP_USING_PWM12 - bool "Enable GPT12 (16-Bits) output PWM" + config BSP_USING_PWM0 + bool "Enable GPT0 (32-Bits) output PWM" default n - menuconfig BSP_USING_PWM2 - bool "Enable timer2 output PWM" + config BSP_USING_PWM2 + bool "Enable GPT2 (32-Bits) output PWM" + default n + + config BSP_USING_PWM8 + bool "Enable GPT8 (32-Bits) output PWM" default n - if BSP_USING_PWM2 - config BSP_USING_PWM2_CH2 - bool "Enable PWM2 channel2" - default n - endif endif diff --git a/bsp/renesas/ra6m3-hmi-board/board/rtduino/arduino_pinout/README.md b/bsp/renesas/ra6m3-hmi-board/board/rtduino/arduino_pinout/README.md index 16846da661..2d436f17b5 100644 --- a/bsp/renesas/ra6m3-hmi-board/board/rtduino/arduino_pinout/README.md +++ b/bsp/renesas/ra6m3-hmi-board/board/rtduino/arduino_pinout/README.md @@ -1,14 +1,14 @@ -# ra6m3-hmi-board Arduino Eco-compatibility Guide +# ra6m3-hmi-board Arduino Ecosystem Compatibility Guide -**[中文](README_zh.md)** | **English** +**[English](README.md)** | **中文** -## 1 RTduino - Arduino Eco-compatibility Layer for RT-Thread +## 1 RTduino - Arduino Ecosystem Compatibility Layer for RT-Thread -The ra6m3-hmi-board development board has been fully adapted to the [RTduino software package](https://github.com/RTduino/RTduino), which is an Arduino eco-compatibility layer for RT-Thread. Users can program this BSP in accordance with Arduino coding conventions and can utilize a wide range of libraries from the Arduino community, significantly enhancing the RT-Thread ecosystem. For more information, please refer to the [RTduino software package documentation](https://github.com/RTduino/RTduino). +The ra6m3-hmi-board development board has been fully adapted for the [RTduino software package](https://github.com/RTduino/RTduino), the Arduino Ecosystem compatibility layer for RT-Thread. Users can operate this BSP following Arduino programming conventions and leverage a vast array of libraries from the Arduino community, providing significant enhancement to the RT-Thread ecosystem. For more information, refer to the [RTduino Software Package Documentation](https://github.com/RTduino/RTduino). -### 1.1 Enabling the Arduino Eco-compatibility Layer for this BSP +### 1.1 Activating Arduino Ecosystem Compatibility Layer for this BSP -In the Env tool, enter the "menuconfig" command, or in the RT-Thread Studio IDE, select "RT-Thread Settings": +Enter the `menuconfig` command under the Env tool, or select RT-Thread Settings in the RT-Thread Studio IDE: ```Kconfig Hardware Drivers Config ---> @@ -16,35 +16,37 @@ Hardware Drivers Config ---> [*] Compatible with Arduino Ecosystem (RTduino) ``` -## 2 Arduino Pin Layout +## 2 Arduino Pin Configuration -For more information about pin layout, please see [pins_arduino.c](pins_arduino.c) and [pins_arduino.h](pins_arduino.h). +For more information about pin layout, refer to [pins_arduino.c](pins_arduino.c) and [pins_arduino.h](pins_arduino.h). ![ra6m3-hmi-board-pinout-figure](ra6m3-hmi-board-pinout-figure.jpg) | Arduino Pin Number | STM32 Pin Number | 5V Tolerance | Remarks | -| ------------------- | --------- | ---- | ------------------------------------------------------------------------- | -| 0 (D0) | P206 | Yes | Serial4-RX, managed by RT-Thread's UART device framework uart4 by default | -| 1 (D1) | P205 | Yes | Serial4-TX, managed by RT-Thread's UART device framework uart4 by default | +| ------------------- | ----------------- | ------------ | ------------------------------------------- | +| 0 (D0) | P206 | Yes | Serial4-RX, default handled by RT-Thread's UART device framework uart4 | +| 1 (D1) | P205 | Yes | Serial4-TX, default handled by RT-Thread's UART device framework uart4 | | 2 (D2) | P008 | Yes | | | 3 (D3) | P506 | Yes | | | 4 (D4) | P603 | Yes | | -| 5 (D5) | P604 | Yes | | -| 6 (D6) | P605 | Yes | | +| 5 (D5) | P604 | Yes | PWM8-CH0, default handled by RT-Thread's PWM device framework pwm8 channel 0 | +| 6 (D6) | P605 | Yes | PWM8-CH0, default handled by RT-Thread's PWM device framework pwm8 channel 0 | | 7 (D7) | P208 | Yes | | | 8 (D8) | P207 | Yes | | | 9 (D9) | P009 | Yes | | -| 10 (D10) | P712 | Yes | PWM2-CH2, managed by RT-Thread's PWM device framework pwm2's channel2 by default | -| 11 (D11) | P512 | Yes | I2C2-SCL, managed by RT-Thread's I2C device framework i2c2 by default | -| 12 (D12) | P511 | Yes | I2C2-SDA, managed by RT-Thread's I2C device framework i2c2 by default | +| 10 (D10) | P712 | Yes | PWM2-CH0, default handled by RT-Thread's PWM device framework pwm2 channel 0 | +| 11 (D11) | P512 | Yes | PWM0-CH0, default handled by RT-Thread's PWM device framework pwm0 channel 0 | +| 12 (D12) | P511 | Yes | | | 13 (D13) | P204 | Yes | | | 14 (D14) | P203 | Yes | | | 15 (D15) | P202 | Yes | | -| 16 (A0) | P000 | Yes | ADC1-CH0-EXTVOL (external voltage), managed by RT-Thread's ADC device framework adc0's channel0 by default | -| 17 (A1) | P001 | Yes | ADC1-CH1-EXTVOL (external voltage), managed by RT-Thread's ADC device framework adc0's channel1 by default | -| 18 (A2) | P002 | Yes | ADC1-CH2-EXTVOL (external voltage), managed by RT-Thread's ADC device framework adc0's channel2 by default | -| 19 (A3) | P003 | Yes | ADC1-CH7-EXTVOL (external voltage), managed by RT-Thread's ADC device framework adc0's channel7 by default | -| 20 (A4) | P508 | Yes | ADC1-CH19-EXTVOL (external voltage), managed by RT-Thread's ADC device framework adc0's channel20 by default | -| 21 (A5) | P014 | Yes | ADC1-CH5-EXTVOL (external voltage), managed by RT-Thread's ADC device framework adc0's channel5 by default | +| 16 (A0) | P000 | Yes | ADC1-CH0-EXTVOL (External Voltage), default handled by RT-Thread's ADC device framework adc0 channel 0 | +| 17 (A1) | P001 | Yes | ADC1-CH1-EXTVOL (External Voltage), default handled by RT-Thread's ADC device framework adc0 channel 1 | +| 18 (A2) | P002 | Yes | ADC1-CH2-EXTVOL (External Voltage), default handled by RT-Thread's ADC device framework adc0 channel 2 | +| 19 (A3) | P003 | Yes | ADC1-CH7-EXTVOL (External Voltage), default handled by RT-Thread's ADC device framework adc0 channel 7 | +| 20 (A4) | P508 | Yes | ADC1-CH19-EXTVOL (External Voltage), default handled by RT-Thread's ADC device framework adc0 channel 20 | +| 21 (A5) | P014 | Yes | ADC1-CH5-EXTVOL (External Voltage), default handled by RT-Thread's ADC device framework adc0 channel 5 | -> Note: RTduino does not currently support MDK. It is recommended to use the GNU GCC toolchain for compilation. \ No newline at end of file +> Note: +> 1. RTduino currently does not support MDK; it is recommended to use the GNU GCC toolchain for compilation. +> 2. The default PWM channel for Renesas is channel 0; for detailed driver information, refer to the `bsp\renesas\libraries\HAL_Drivers\drv_pwm.c` file. \ No newline at end of file diff --git a/bsp/renesas/ra6m3-hmi-board/board/rtduino/arduino_pinout/README_zh.md b/bsp/renesas/ra6m3-hmi-board/board/rtduino/arduino_pinout/README_zh.md index 38715e6944..f120974718 100644 --- a/bsp/renesas/ra6m3-hmi-board/board/rtduino/arduino_pinout/README_zh.md +++ b/bsp/renesas/ra6m3-hmi-board/board/rtduino/arduino_pinout/README_zh.md @@ -29,14 +29,14 @@ Hardware Drivers Config ---> | 2 (D2) | P008 | 是 | | | 3 (D3) | P506 | 是 | | | 4 (D4) | P603 | 是 | | -| 5 (D5) | P604 | 是 | | -| 6 (D6) | P605 | 是 | | +| 5 (D5) | P604 | 是 | PWM8-CH0,默认被RT-Thread的PWM设备框架pwm8的channel0接管 | +| 6 (D6) | P605 | 是 | PWM8-CH0,默认被RT-Thread的PWM设备框架pwm8的channel0接管 | | 7 (D7) | P208 | 是 | | | 8 (D8) | P207 | 是 | | | 9 (D9) | P009 | 是 | | -| 10 (D10) | P712 | 是 | PWM2-CH2,默认被RT-Thread的PWM设备框架pwm2的channel2接管 | -| 11 (D11) | P512 | 是 | I2C2-SCL,默认被RT-Thread的I2C设备框架i2c2接管 | -| 12 (D12) | P511 | 是 | I2C2-SDA,默认被RT-Thread的I2C设备框架i2c2接管 | +| 10 (D10) | P712 | 是 | PWM2-CH0,默认被RT-Thread的PWM设备框架pwm2的channel0接管 | +| 11 (D11) | P512 | 是 | PWM0-CH0,默认被RT-Thread的PWM设备框架pwm0的channel0接管 | +| 12 (D12) | P511 | 是 | | | 13 (D13) | P204 | 是 | | | 14 (D14) | P203 | 是 | | | 15 (D15) | P202 | 是 | | @@ -47,4 +47,6 @@ Hardware Drivers Config ---> | 20 (A4) | P508 | 是 | ADC1-CH19-EXTVOL(外部电压),默认被RT-Thread的ADC设备框架adc0的channel20接管 | | 21 (A5) | P014 | 是 | ADC1-CH5-EXTVOL(外部电压),默认被RT-Thread的ADC设备框架adc0的channel5接管 | -> 注意：RTduino暂时不对MDK支持，建议使用GNU GCC工具链编译 +> 注意： +> 1.RTduino暂时不对MDK支持，建议使用GNU GCC工具链编译 +> 2.renesas的pwm通道默认使用channel0，详细驱动细节请查阅`bsp\renesas\libraries\HAL_Drivers\drv_pwm.c`文件 \ No newline at end of file diff --git a/bsp/renesas/ra6m3-hmi-board/board/rtduino/arduino_pinout/pins_arduino.c b/bsp/renesas/ra6m3-hmi-board/board/rtduino/arduino_pinout/pins_arduino.c index 1f92ba9b06..55988b14b0 100644 --- a/bsp/renesas/ra6m3-hmi-board/board/rtduino/arduino_pinout/pins_arduino.c +++ b/bsp/renesas/ra6m3-hmi-board/board/rtduino/arduino_pinout/pins_arduino.c @@ -29,21 +29,21 @@ const pin_map_t pin_map_table[]= {D2, BSP_IO_PORT_00_PIN_08}, {D3, BSP_IO_PORT_05_PIN_06}, {D4, BSP_IO_PORT_06_PIN_03}, - {D5, BSP_IO_PORT_06_PIN_04}, - {D6, BSP_IO_PORT_06_PIN_05}, + {D5, BSP_IO_PORT_06_PIN_04, "pwm8", 0}, + {D6, BSP_IO_PORT_06_PIN_05, "pwm8", 0}, {D7, BSP_IO_PORT_02_PIN_08}, {D8, BSP_IO_PORT_02_PIN_07}, - {D9, BSP_IO_PORT_00_PIN_09}, /* SPI-SS */ + {D9, BSP_IO_PORT_00_PIN_09}, {D10, BSP_IO_PORT_07_PIN_12, "pwm2", 0}, /* PWM */ - {D11, BSP_IO_PORT_05_PIN_12, "i2c2"}, /* I2C-SCL (Wire) */ - {D12, BSP_IO_PORT_05_PIN_11, "i2c2"}, /* I2C-SDA (Wire) */ + {D11, BSP_IO_PORT_05_PIN_12, "pwm0", 0}, /* PWM */ + {D12, BSP_IO_PORT_05_PIN_11}, {D13, BSP_IO_PORT_02_PIN_04}, - {D14, BSP_IO_PORT_02_PIN_03}, - {D15, BSP_IO_PORT_02_PIN_02}, + {D14, BSP_IO_PORT_02_PIN_03, "i2c0"}, /* I2C-SDA (Soft Wire) */ + {D15, BSP_IO_PORT_02_PIN_02, "i2c0"}, /* I2C-SCL (Soft Wire) */ {A0, BSP_IO_PORT_00_PIN_00, "adc0", 0}, /* ADC */ {A1, BSP_IO_PORT_00_PIN_01, "adc0", 1}, /* ADC */ {A2, BSP_IO_PORT_00_PIN_02, "adc0", 2}, /* ADC */ {A3, BSP_IO_PORT_00_PIN_03, "adc0", 7}, /* ADC */ {A4, BSP_IO_PORT_05_PIN_08, "adc0", 20}, /* ADC */ - {A5, BSP_IO_PORT_00_PIN_14, "adc0", 5} /* ADC */ + {A5, BSP_IO_PORT_00_PIN_14, "adc0", 5} /* ADC */ }; \ No newline at end of file diff --git a/bsp/renesas/ra6m3-hmi-board/board/rtduino/arduino_pinout/pins_arduino.h b/bsp/renesas/ra6m3-hmi-board/board/rtduino/arduino_pinout/pins_arduino.h index 2cf8b744e7..2e5f56e733 100644 --- a/bsp/renesas/ra6m3-hmi-board/board/rtduino/arduino_pinout/pins_arduino.h +++ b/bsp/renesas/ra6m3-hmi-board/board/rtduino/arduino_pinout/pins_arduino.h @@ -39,12 +39,10 @@ #define F_CPU 120000000L /* CPU:120MHz */ -/* i2c2 : PD10-SDA PD10-SCL */ -#define RTDUINO_DEFAULT_IIC_BUS_NAME "i2c2" +/* i2c0 : P203-SDA P202-SCL */ +#define RTDUINO_DEFAULT_IIC_BUS_NAME "i2c0" /* Serial4(uart4) : P205-TX P206-RX */ #define RTDUINO_SERIAL2_DEVICE_NAME "uart4" -#define RTDUINO_DEFAULT_HWTIMER_DEVICE_NAME "timer2" - #endif /* Pins_Arduino_h */ diff --git a/bsp/renesas/ra6m3-hmi-board/buildinfo.gpdsc b/bsp/renesas/ra6m3-hmi-board/buildinfo.gpdsc index 55be25e21d..53e32c454d 100644 --- a/bsp/renesas/ra6m3-hmi-board/buildinfo.gpdsc +++ b/bsp/renesas/ra6m3-hmi-board/buildinfo.gpdsc @@ -75,39 +75,57 @@ + + + + + + + + + + + + + + + + + + diff --git a/bsp/renesas/ra6m3-hmi-board/configuration.xml b/bsp/renesas/ra6m3-hmi-board/configuration.xml index 3337f216f3..681297d6dd 100644 --- a/bsp/renesas/ra6m3-hmi-board/configuration.xml +++ b/bsp/renesas/ra6m3-hmi-board/configuration.xml @@ -318,12 +318,110 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + @@ -357,8 +455,13 @@ + + + + + @@ -385,6 +488,12 @@ + + + + + + diff --git a/bsp/renesas/ra6m3-hmi-board/ra_gen/hal_data.c b/bsp/renesas/ra6m3-hmi-board/ra_gen/hal_data.c index 848ce6e5a9..1e3a11e13e 100644 --- a/bsp/renesas/ra6m3-hmi-board/ra_gen/hal_data.c +++ b/bsp/renesas/ra6m3-hmi-board/ra_gen/hal_data.c @@ -6,6 +6,214 @@ #define ADC_TRIGGER_ADC0_B ADC_TRIGGER_SYNC_ELC #define ADC_TRIGGER_ADC1 ADC_TRIGGER_SYNC_ELC #define ADC_TRIGGER_ADC1_B ADC_TRIGGER_SYNC_ELC +gpt_instance_ctrl_t g_timer8_ctrl; +#if 0 +const gpt_extended_pwm_cfg_t g_timer8_pwm_extend = +{ + .trough_ipl = (BSP_IRQ_DISABLED), +#if defined(VECTOR_NUMBER_GPT8_COUNTER_UNDERFLOW) + .trough_irq = VECTOR_NUMBER_GPT8_COUNTER_UNDERFLOW, +#else + .trough_irq = FSP_INVALID_VECTOR, +#endif + .poeg_link = GPT_POEG_LINK_POEG0, + .output_disable = GPT_OUTPUT_DISABLE_NONE, + .adc_trigger = GPT_ADC_TRIGGER_NONE, + .dead_time_count_up = 0, + .dead_time_count_down = 0, + .adc_a_compare_match = 0, + .adc_b_compare_match = 0, + .interrupt_skip_source = GPT_INTERRUPT_SKIP_SOURCE_NONE, + .interrupt_skip_count = GPT_INTERRUPT_SKIP_COUNT_0, + .interrupt_skip_adc = GPT_INTERRUPT_SKIP_ADC_NONE, + .gtioca_disable_setting = GPT_GTIOC_DISABLE_PROHIBITED, + .gtiocb_disable_setting = GPT_GTIOC_DISABLE_PROHIBITED, +}; +#endif +const gpt_extended_cfg_t g_timer8_extend = +{ + .gtioca = { .output_enabled = true, + .stop_level = GPT_PIN_LEVEL_LOW + }, + .gtiocb = { .output_enabled = true, + .stop_level = GPT_PIN_LEVEL_LOW + }, + .start_source = (gpt_source_t) ( GPT_SOURCE_NONE), + .stop_source = (gpt_source_t) ( GPT_SOURCE_NONE), + .clear_source = (gpt_source_t) ( GPT_SOURCE_NONE), + .count_up_source = (gpt_source_t) ( GPT_SOURCE_NONE), + .count_down_source = (gpt_source_t) ( GPT_SOURCE_NONE), + .capture_a_source = (gpt_source_t) ( GPT_SOURCE_NONE), + .capture_b_source = (gpt_source_t) ( GPT_SOURCE_NONE), + .capture_a_ipl = (BSP_IRQ_DISABLED), + .capture_b_ipl = (BSP_IRQ_DISABLED), +#if defined(VECTOR_NUMBER_GPT8_CAPTURE_COMPARE_A) + .capture_a_irq = VECTOR_NUMBER_GPT8_CAPTURE_COMPARE_A, +#else + .capture_a_irq = FSP_INVALID_VECTOR, +#endif +#if defined(VECTOR_NUMBER_GPT8_CAPTURE_COMPARE_B) + .capture_b_irq = VECTOR_NUMBER_GPT8_CAPTURE_COMPARE_B, +#else + .capture_b_irq = FSP_INVALID_VECTOR, +#endif + .capture_filter_gtioca = GPT_CAPTURE_FILTER_NONE, + .capture_filter_gtiocb = GPT_CAPTURE_FILTER_NONE, +#if 0 + .p_pwm_cfg = &g_timer8_pwm_extend, +#else + .p_pwm_cfg = NULL, +#endif +#if 0 + .gtior_setting.gtior_b.gtioa = (0U << 4U) | (0U << 2U) | (0U << 0U), + .gtior_setting.gtior_b.oadflt = (uint32_t) GPT_PIN_LEVEL_LOW, + .gtior_setting.gtior_b.oahld = 0U, + .gtior_setting.gtior_b.oae = (uint32_t) true, + .gtior_setting.gtior_b.oadf = (uint32_t) GPT_GTIOC_DISABLE_PROHIBITED, + .gtior_setting.gtior_b.nfaen = ((uint32_t) GPT_CAPTURE_FILTER_NONE & 1U), + .gtior_setting.gtior_b.nfcsa = ((uint32_t) GPT_CAPTURE_FILTER_NONE >> 1U), + .gtior_setting.gtior_b.gtiob = (0U << 4U) | (0U << 2U) | (0U << 0U), + .gtior_setting.gtior_b.obdflt = (uint32_t) GPT_PIN_LEVEL_LOW, + .gtior_setting.gtior_b.obhld = 0U, + .gtior_setting.gtior_b.obe = (uint32_t) true, + .gtior_setting.gtior_b.obdf = (uint32_t) GPT_GTIOC_DISABLE_PROHIBITED, + .gtior_setting.gtior_b.nfben = ((uint32_t) GPT_CAPTURE_FILTER_NONE & 1U), + .gtior_setting.gtior_b.nfcsb = ((uint32_t) GPT_CAPTURE_FILTER_NONE >> 1U), +#else + .gtior_setting.gtior = 0U, +#endif +}; +const timer_cfg_t g_timer8_cfg = +{ + .mode = TIMER_MODE_PWM, + /* Actual period: 35.791394133333334 seconds. Actual duty: 50%. */ .period_counts = (uint32_t) 0x100000000, .duty_cycle_counts = 0x80000000, .source_div = (timer_source_div_t)0, + .channel = 8, + .p_callback = NULL, + /** If NULL then do not add & */ +#if defined(NULL) + .p_context = NULL, +#else + .p_context = &NULL, +#endif + .p_extend = &g_timer8_extend, + .cycle_end_ipl = (BSP_IRQ_DISABLED), +#if defined(VECTOR_NUMBER_GPT8_COUNTER_OVERFLOW) + .cycle_end_irq = VECTOR_NUMBER_GPT8_COUNTER_OVERFLOW, +#else + .cycle_end_irq = FSP_INVALID_VECTOR, +#endif +}; +/* Instance structure to use this module. */ +const timer_instance_t g_timer8 = +{ + .p_ctrl = &g_timer8_ctrl, + .p_cfg = &g_timer8_cfg, + .p_api = &g_timer_on_gpt +}; +gpt_instance_ctrl_t g_timer0_ctrl; +#if 0 +const gpt_extended_pwm_cfg_t g_timer0_pwm_extend = +{ + .trough_ipl = (BSP_IRQ_DISABLED), +#if defined(VECTOR_NUMBER_GPT0_COUNTER_UNDERFLOW) + .trough_irq = VECTOR_NUMBER_GPT0_COUNTER_UNDERFLOW, +#else + .trough_irq = FSP_INVALID_VECTOR, +#endif + .poeg_link = GPT_POEG_LINK_POEG0, + .output_disable = GPT_OUTPUT_DISABLE_NONE, + .adc_trigger = GPT_ADC_TRIGGER_NONE, + .dead_time_count_up = 0, + .dead_time_count_down = 0, + .adc_a_compare_match = 0, + .adc_b_compare_match = 0, + .interrupt_skip_source = GPT_INTERRUPT_SKIP_SOURCE_NONE, + .interrupt_skip_count = GPT_INTERRUPT_SKIP_COUNT_0, + .interrupt_skip_adc = GPT_INTERRUPT_SKIP_ADC_NONE, + .gtioca_disable_setting = GPT_GTIOC_DISABLE_PROHIBITED, + .gtiocb_disable_setting = GPT_GTIOC_DISABLE_PROHIBITED, +}; +#endif +const gpt_extended_cfg_t g_timer0_extend = +{ + .gtioca = { .output_enabled = true, + .stop_level = GPT_PIN_LEVEL_LOW + }, + .gtiocb = { .output_enabled = false, + .stop_level = GPT_PIN_LEVEL_LOW + }, + .start_source = (gpt_source_t) ( GPT_SOURCE_NONE), + .stop_source = (gpt_source_t) ( GPT_SOURCE_NONE), + .clear_source = (gpt_source_t) ( GPT_SOURCE_NONE), + .count_up_source = (gpt_source_t) ( GPT_SOURCE_NONE), + .count_down_source = (gpt_source_t) ( GPT_SOURCE_NONE), + .capture_a_source = (gpt_source_t) ( GPT_SOURCE_NONE), + .capture_b_source = (gpt_source_t) ( GPT_SOURCE_NONE), + .capture_a_ipl = (BSP_IRQ_DISABLED), + .capture_b_ipl = (BSP_IRQ_DISABLED), +#if defined(VECTOR_NUMBER_GPT0_CAPTURE_COMPARE_A) + .capture_a_irq = VECTOR_NUMBER_GPT0_CAPTURE_COMPARE_A, +#else + .capture_a_irq = FSP_INVALID_VECTOR, +#endif +#if defined(VECTOR_NUMBER_GPT0_CAPTURE_COMPARE_B) + .capture_b_irq = VECTOR_NUMBER_GPT0_CAPTURE_COMPARE_B, +#else + .capture_b_irq = FSP_INVALID_VECTOR, +#endif + .capture_filter_gtioca = GPT_CAPTURE_FILTER_NONE, + .capture_filter_gtiocb = GPT_CAPTURE_FILTER_NONE, +#if 0 + .p_pwm_cfg = &g_timer0_pwm_extend, +#else + .p_pwm_cfg = NULL, +#endif +#if 0 + .gtior_setting.gtior_b.gtioa = (0U << 4U) | (0U << 2U) | (0U << 0U), + .gtior_setting.gtior_b.oadflt = (uint32_t) GPT_PIN_LEVEL_LOW, + .gtior_setting.gtior_b.oahld = 0U, + .gtior_setting.gtior_b.oae = (uint32_t) true, + .gtior_setting.gtior_b.oadf = (uint32_t) GPT_GTIOC_DISABLE_PROHIBITED, + .gtior_setting.gtior_b.nfaen = ((uint32_t) GPT_CAPTURE_FILTER_NONE & 1U), + .gtior_setting.gtior_b.nfcsa = ((uint32_t) GPT_CAPTURE_FILTER_NONE >> 1U), + .gtior_setting.gtior_b.gtiob = (0U << 4U) | (0U << 2U) | (0U << 0U), + .gtior_setting.gtior_b.obdflt = (uint32_t) GPT_PIN_LEVEL_LOW, + .gtior_setting.gtior_b.obhld = 0U, + .gtior_setting.gtior_b.obe = (uint32_t) false, + .gtior_setting.gtior_b.obdf = (uint32_t) GPT_GTIOC_DISABLE_PROHIBITED, + .gtior_setting.gtior_b.nfben = ((uint32_t) GPT_CAPTURE_FILTER_NONE & 1U), + .gtior_setting.gtior_b.nfcsb = ((uint32_t) GPT_CAPTURE_FILTER_NONE >> 1U), +#else + .gtior_setting.gtior = 0U, +#endif +}; +const timer_cfg_t g_timer0_cfg = +{ + .mode = TIMER_MODE_PWM, + /* Actual period: 35.791394133333334 seconds. Actual duty: 50%. */ .period_counts = (uint32_t) 0x100000000, .duty_cycle_counts = 0x80000000, .source_div = (timer_source_div_t)0, + .channel = 0, + .p_callback = NULL, + /** If NULL then do not add & */ +#if defined(NULL) + .p_context = NULL, +#else + .p_context = &NULL, +#endif + .p_extend = &g_timer0_extend, + .cycle_end_ipl = (BSP_IRQ_DISABLED), +#if defined(VECTOR_NUMBER_GPT0_COUNTER_OVERFLOW) + .cycle_end_irq = VECTOR_NUMBER_GPT0_COUNTER_OVERFLOW, +#else + .cycle_end_irq = FSP_INVALID_VECTOR, +#endif +}; +/* Instance structure to use this module. */ +const timer_instance_t g_timer0 = +{ + .p_ctrl = &g_timer0_ctrl, + .p_cfg = &g_timer0_cfg, + .p_api = &g_timer_on_gpt +}; gpt_instance_ctrl_t g_timer2_ctrl; #if 0 const gpt_extended_pwm_cfg_t g_timer2_pwm_extend = diff --git a/bsp/renesas/ra6m3-hmi-board/ra_gen/hal_data.h b/bsp/renesas/ra6m3-hmi-board/ra_gen/hal_data.h index 8a38ab2658..c5e48699b0 100644 --- a/bsp/renesas/ra6m3-hmi-board/ra_gen/hal_data.h +++ b/bsp/renesas/ra6m3-hmi-board/ra_gen/hal_data.h @@ -12,6 +12,26 @@ #include "r_adc_api.h" FSP_HEADER /** Timer on GPT Instance. */ +extern const timer_instance_t g_timer8; + +/** Access the GPT instance using these structures when calling API functions directly (::p_api is not used). */ +extern gpt_instance_ctrl_t g_timer8_ctrl; +extern const timer_cfg_t g_timer8_cfg; + +#ifndef NULL +void NULL(timer_callback_args_t * p_args); +#endif +/** Timer on GPT Instance. */ +extern const timer_instance_t g_timer0; + +/** Access the GPT instance using these structures when calling API functions directly (::p_api is not used). */ +extern gpt_instance_ctrl_t g_timer0_ctrl; +extern const timer_cfg_t g_timer0_cfg; + +#ifndef NULL +void NULL(timer_callback_args_t * p_args); +#endif +/** Timer on GPT Instance. */ extern const timer_instance_t g_timer2; /** Access the GPT instance using these structures when calling API functions directly (::p_api is not used). */ diff --git a/bsp/renesas/ra6m3-hmi-board/ra_gen/pin_data.c b/bsp/renesas/ra6m3-hmi-board/ra_gen/pin_data.c index 80f6607eb5..f0272077ae 100644 --- a/bsp/renesas/ra6m3-hmi-board/ra_gen/pin_data.c +++ b/bsp/renesas/ra6m3-hmi-board/ra_gen/pin_data.c @@ -56,6 +56,18 @@ const ioport_pin_cfg_t g_bsp_pin_cfg_data[] = { .pin = BSP_IO_PORT_05_PIN_08, .pin_cfg = ((uint32_t) IOPORT_CFG_ANALOG_ENABLE) }, + { + .pin = BSP_IO_PORT_05_PIN_12, + .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_GPT1) + }, + { + .pin = BSP_IO_PORT_06_PIN_04, + .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_GPT1) + }, + { + .pin = BSP_IO_PORT_06_PIN_05, + .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_GPT1) + }, { .pin = BSP_IO_PORT_07_PIN_12, .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_GPT1) diff --git a/bsp/stm32/libraries/HAL_Drivers/drivers/drv_soft_i2c.c b/bsp/stm32/libraries/HAL_Drivers/drivers/drv_soft_i2c.c index 545c16d980..6f538fe44a 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drivers/drv_soft_i2c.c +++ b/bsp/stm32/libraries/HAL_Drivers/drivers/drv_soft_i2c.c @@ -167,9 +167,9 @@ int rt_hw_i2c_init(void) { i2c_obj[i].ops = stm32_bit_ops_default; i2c_obj[i].ops.data = (void*)&soft_i2c_config[i]; - i2c_obj[i].i2c2_bus.priv = &i2c_obj[i].ops; + i2c_obj[i].i2c_bus.priv = &i2c_obj[i].ops; stm32_i2c_gpio_init(&i2c_obj[i]); - result = rt_i2c_bit_add_bus(&i2c_obj[i].i2c2_bus, soft_i2c_config[i].bus_name); + result = rt_i2c_bit_add_bus(&i2c_obj[i].i2c_bus, soft_i2c_config[i].bus_name); RT_ASSERT(result == RT_EOK); stm32_i2c_bus_unlock(&soft_i2c_config[i]); diff --git a/bsp/stm32/libraries/HAL_Drivers/drivers/drv_soft_i2c.h b/bsp/stm32/libraries/HAL_Drivers/drivers/drv_soft_i2c.h index 1cdaf6258e..e5f8695b7a 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drivers/drv_soft_i2c.h +++ b/bsp/stm32/libraries/HAL_Drivers/drivers/drv_soft_i2c.h @@ -26,7 +26,7 @@ struct stm32_soft_i2c_config struct stm32_i2c { struct rt_i2c_bit_ops ops; - struct rt_i2c_bus_device i2c2_bus; + struct rt_i2c_bus_device i2c_bus; }; #ifdef BSP_USING_I2C1 diff --git a/bsp/stm32/stm32h750-artpi/.config b/bsp/stm32/stm32h750-artpi/.config index 9af4743ef3..e14d738d5a 100644 --- a/bsp/stm32/stm32h750-artpi/.config +++ b/bsp/stm32/stm32h750-artpi/.config @@ -9,8 +9,10 @@ CONFIG_RT_NAME_MAX=8 # CONFIG_RT_USING_ARCH_DATA_TYPE is not set # CONFIG_RT_USING_SMART is not set +# CONFIG_RT_USING_NANO is not set # CONFIG_RT_USING_AMP is not set # CONFIG_RT_USING_SMP is not set +CONFIG_RT_CPUS_NR=1 CONFIG_RT_ALIGN_SIZE=8 # CONFIG_RT_THREAD_PRIORITY_8 is not set CONFIG_RT_THREAD_PRIORITY_32=y @@ -35,7 +37,7 @@ CONFIG_IDLE_THREAD_STACK_SIZE=256 CONFIG_RT_USING_DEBUG=y CONFIG_RT_DEBUGING_COLOR=y CONFIG_RT_DEBUGING_CONTEXT=y -# CONFIG_RT_DEBUGING_INIT is not set +# CONFIG_RT_DEBUGING_AUTO_INIT is not set # # Inter-Thread communication @@ -63,21 +65,17 @@ CONFIG_RT_USING_SMALL_MEM_AS_HEAP=y # CONFIG_RT_USING_MEMTRACE is not set # CONFIG_RT_USING_HEAP_ISR is not set CONFIG_RT_USING_HEAP=y - -# -# Kernel Device Object -# CONFIG_RT_USING_DEVICE=y # CONFIG_RT_USING_DEVICE_OPS is not set -# CONFIG_RT_USING_DM is not set # CONFIG_RT_USING_INTERRUPT_INFO is not set CONFIG_RT_USING_CONSOLE=y CONFIG_RT_CONSOLEBUF_SIZE=128 CONFIG_RT_CONSOLE_DEVICE_NAME="uart4" -CONFIG_RT_VER_NUM=0x50002 +CONFIG_RT_VER_NUM=0x50100 # CONFIG_RT_USING_STDC_ATOMIC is not set +CONFIG_RT_BACKTRACE_LEVEL_MAX_NR=32 CONFIG_RT_USING_CACHE=y -CONFIG_RT_USING_HW_ATOMIC=y +# CONFIG_RT_USING_HW_ATOMIC is not set # CONFIG_ARCH_ARM_BOOTWITH_FLUSH_CACHE is not set # CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set CONFIG_RT_USING_CPU_FFS=y @@ -119,6 +117,7 @@ CONFIG_FINSH_USING_OPTION_COMPLETION=y # # Device Drivers # +# CONFIG_RT_USING_DM is not set CONFIG_RT_USING_DEVICE_IPC=y CONFIG_RT_UNAMED_PIPE_NUMBER=64 # CONFIG_RT_USING_SYSTEM_WORKQUEUE is not set @@ -133,6 +132,7 @@ CONFIG_RT_USING_I2C=y # CONFIG_RT_I2C_DEBUG is not set CONFIG_RT_USING_I2C_BITOPS=y # CONFIG_RT_I2C_BITOPS_DEBUG is not set +# CONFIG_RT_USING_SOFT_I2C is not set # CONFIG_RT_USING_PHY is not set CONFIG_RT_USING_PIN=y # CONFIG_RT_USING_ADC is not set @@ -144,7 +144,6 @@ CONFIG_RT_USING_PIN=y # CONFIG_RT_USING_MTD_NOR is not set # CONFIG_RT_USING_MTD_NAND is not set # CONFIG_RT_USING_PM is not set -# CONFIG_RT_USING_FDT is not set # CONFIG_RT_USING_RTC is not set # CONFIG_RT_USING_SDIO is not set CONFIG_RT_USING_SPI=y @@ -222,6 +221,12 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0 # CONFIG_RT_USING_LWIP is not set # CONFIG_RT_USING_AT is not set +# +# Memory protection +# +# CONFIG_RT_USING_MEM_PROTECTION is not set +# CONFIG_RT_USING_HW_STACK_GUARD is not set + # # Utilities # @@ -274,6 +279,11 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0 # # CONFIG_PKG_USING_WLAN_WICED is not set # CONFIG_PKG_USING_RW007 is not set + +# +# CYW43012 WiFi +# +# CONFIG_PKG_USING_WLAN_CYW43012 is not set # CONFIG_PKG_USING_COAP is not set # CONFIG_PKG_USING_NOPOLL is not set # CONFIG_PKG_USING_NETUTILS is not set @@ -316,6 +326,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0 # CONFIG_PKG_USING_NMEALIB is not set # CONFIG_PKG_USING_PDULIB is not set # CONFIG_PKG_USING_BTSTACK is not set +# CONFIG_PKG_USING_BT_CYW43012 is not set # CONFIG_PKG_USING_LORAWAN_ED_STACK is not set # CONFIG_PKG_USING_WAYZ_IOTKIT is not set # CONFIG_PKG_USING_MAVLINK is not set @@ -335,6 +346,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0 # CONFIG_PKG_USING_ZFTP is not set # CONFIG_PKG_USING_WOL is not set # CONFIG_PKG_USING_ZEPHYR_POLLING is not set +# CONFIG_PKG_USING_MATTER_ADAPTATION_LAYER is not set # # security packages @@ -381,7 +393,6 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0 # LVGL: powerful and easy-to-use embedded GUI library # # CONFIG_PKG_USING_LVGL is not set -# CONFIG_PKG_USING_LITTLEVGL2RTT is not set # CONFIG_PKG_USING_LV_MUSIC_DEMO is not set # CONFIG_PKG_USING_GUI_GUIDER_DEMO is not set @@ -458,6 +469,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0 # CONFIG_PKG_USING_ARMV7M_DWT_TOOL is not set # CONFIG_PKG_USING_VOFA_PLUS is not set # CONFIG_PKG_USING_RT_TRACE is not set +# CONFIG_PKG_USING_ZDEBUG is not set # # system packages @@ -494,6 +506,8 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0 # CONFIG_PKG_USING_UC_COMMON is not set # CONFIG_PKG_USING_UC_MODBUS is not set # CONFIG_PKG_USING_FREERTOS_WRAPPER is not set +# CONFIG_PKG_USING_LITEOS_SDK is not set +# CONFIG_PKG_USING_TZ_DATABASE is not set # CONFIG_PKG_USING_CAIRO is not set # CONFIG_PKG_USING_PIXMAN is not set # CONFIG_PKG_USING_PARTITION is not set @@ -517,6 +531,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0 # CONFIG_PKG_USING_QBOOT is not set # CONFIG_PKG_USING_PPOOL is not set # CONFIG_PKG_USING_OPENAMP is not set +# CONFIG_PKG_USING_RPMSG_LITE is not set # CONFIG_PKG_USING_LPM is not set # CONFIG_PKG_USING_TLSF is not set # CONFIG_PKG_USING_EVENT_RECORDER is not set @@ -530,6 +545,10 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0 # CONFIG_PKG_USING_AGILE_UPGRADE is not set # CONFIG_PKG_USING_FLASH_BLOB is not set # CONFIG_PKG_USING_MLIBC is not set +# CONFIG_PKG_USING_TASK_MSG_BUS is not set +# CONFIG_PKG_USING_SFDB is not set +# CONFIG_PKG_USING_RTP is not set +# CONFIG_PKG_USING_REB is not set # # peripheral libraries and drivers @@ -594,6 +613,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0 # CONFIG_PKG_USING_BALANCE is not set # CONFIG_PKG_USING_SHT2X is not set # CONFIG_PKG_USING_SHT3X is not set +# CONFIG_PKG_USING_SHT4X is not set # CONFIG_PKG_USING_AD7746 is not set # CONFIG_PKG_USING_ADT74XX is not set # CONFIG_PKG_USING_MAX17048 is not set @@ -694,6 +714,9 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0 # CONFIG_PKG_USING_FINGERPRINT is not set # CONFIG_PKG_USING_BT_ECB02C is not set # CONFIG_PKG_USING_UAT is not set +# CONFIG_PKG_USING_ST7789 is not set +# CONFIG_PKG_USING_VS1003 is not set +# CONFIG_PKG_USING_X9555 is not set # CONFIG_PKG_USING_SPI_TOOLS is not set # @@ -717,6 +740,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0 # CONFIG_PKG_USING_UKAL is not set # CONFIG_PKG_USING_DIGITALCTRL is not set # CONFIG_PKG_USING_KISSFFT is not set +# CONFIG_PKG_USING_CMSIS_DSP is not set # # miscellaneous packages @@ -748,12 +772,14 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0 # CONFIG_PKG_USING_DONUT is not set # CONFIG_PKG_USING_COWSAY is not set # CONFIG_PKG_USING_MORSE is not set +# CONFIG_PKG_USING_TINYSQUARE is not set # CONFIG_PKG_USING_LIBCSV is not set # CONFIG_PKG_USING_OPTPARSE is not set # CONFIG_PKG_USING_FASTLZ is not set # CONFIG_PKG_USING_MINILZO is not set # CONFIG_PKG_USING_QUICKLZ is not set # CONFIG_PKG_USING_LZMA is not set +# CONFIG_PKG_USING_RALARAM is not set # CONFIG_PKG_USING_MULTIBUTTON is not set # CONFIG_PKG_USING_FLEXIBLE_BUTTON is not set # CONFIG_PKG_USING_CANFESTIVAL is not set @@ -939,6 +965,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0 # # CONFIG_PKG_USING_ARDUINO_ADAFRUIT_GFX_LIBRARY is not set # CONFIG_PKG_USING_ARDUINO_U8G2 is not set +# CONFIG_PKG_USING_ARDUINO_TFT_ESPI is not set # CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ST7735 is not set # CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SSD1306 is not set # CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ILI9341 is not set @@ -947,6 +974,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0 # # Timing # +# CONFIG_PKG_USING_ARDUINO_RTCLIB is not set # CONFIG_PKG_USING_ARDUINO_MSTIMER2 is not set # CONFIG_PKG_USING_ARDUINO_TICKER is not set # CONFIG_PKG_USING_ARDUINO_TASKSCHEDULER is not set @@ -983,7 +1011,6 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0 # # CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MFRC630 is not set # CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SI5351 is not set -# CONFIG_PKG_USING_ARDUINO_RTCLIB is not set # # Signal IO @@ -1000,6 +1027,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0 # # Uncategorized # +# CONFIG_PKG_USING_MICRO_ROS_RTTHREAD_PACKAGE is not set CONFIG_SOC_FAMILY_STM32=y CONFIG_SOC_SERIES_STM32H7=y diff --git a/bsp/stm32/stm32h750-artpi/rtconfig.h b/bsp/stm32/stm32h750-artpi/rtconfig.h index 327a12ee55..99cde7ba9e 100644 --- a/bsp/stm32/stm32h750-artpi/rtconfig.h +++ b/bsp/stm32/stm32h750-artpi/rtconfig.h @@ -7,6 +7,7 @@ /* RT-Thread Kernel */ #define RT_NAME_MAX 8 +#define RT_CPUS_NR 1 #define RT_ALIGN_SIZE 8 #define RT_THREAD_PRIORITY_32 #define RT_THREAD_PRIORITY_MAX 32 @@ -38,16 +39,13 @@ #define RT_USING_SMALL_MEM #define RT_USING_SMALL_MEM_AS_HEAP #define RT_USING_HEAP - -/* Kernel Device Object */ - #define RT_USING_DEVICE #define RT_USING_CONSOLE #define RT_CONSOLEBUF_SIZE 128 #define RT_CONSOLE_DEVICE_NAME "uart4" -#define RT_VER_NUM 0x50002 +#define RT_VER_NUM 0x50100 +#define RT_BACKTRACE_LEVEL_MAX_NR 32 #define RT_USING_CACHE -#define RT_USING_HW_ATOMIC #define RT_USING_CPU_FFS #define ARCH_ARM #define ARCH_ARM_CORTEX_M @@ -116,6 +114,9 @@ /* Network */ +/* Memory protection */ + + /* Utilities */ @@ -135,6 +136,9 @@ /* Wiced WiFi */ +/* CYW43012 WiFi */ + + /* IoT Cloud */ diff --git a/bsp/synwit/libraries/SWM320_drivers/drv_soft_i2c.c b/bsp/synwit/libraries/SWM320_drivers/drv_soft_i2c.c index eb5a1c6286..d2718fb43c 100644 --- a/bsp/synwit/libraries/SWM320_drivers/drv_soft_i2c.c +++ b/bsp/synwit/libraries/SWM320_drivers/drv_soft_i2c.c @@ -61,7 +61,7 @@ struct swm_soft_i2c_cfg struct swm_soft_i2c_device { struct rt_i2c_bit_ops ops; - struct rt_i2c_bus_device i2c2_bus; + struct rt_i2c_bus_device i2c_bus; }; static const struct swm_soft_i2c_cfg swm_soft_i2c_cfg[] = { @@ -210,9 +210,9 @@ int swm_i2c_init(void) { i2c_obj[i].ops = swm_i2c_bit_ops; i2c_obj[i].ops.data = (void *)&swm_soft_i2c_cfg[i]; - i2c_obj[i].i2c2_bus.priv = &i2c_obj[i].ops; + i2c_obj[i].i2c_bus.priv = &i2c_obj[i].ops; swm_i2c_gpio_init(&i2c_obj[i]); - result = rt_i2c_bit_add_bus(&i2c_obj[i].i2c2_bus, swm_soft_i2c_cfg[i].name); + result = rt_i2c_bit_add_bus(&i2c_obj[i].i2c_bus, swm_soft_i2c_cfg[i].name); RT_ASSERT(result == RT_EOK); LOG_D("software simulation %s init done, pin scl: %d, pin sda %d", diff --git a/bsp/synwit/libraries/SWM341_drivers/drv_soft_i2c.c b/bsp/synwit/libraries/SWM341_drivers/drv_soft_i2c.c index 92228f3a4f..f74715d03d 100644 --- a/bsp/synwit/libraries/SWM341_drivers/drv_soft_i2c.c +++ b/bsp/synwit/libraries/SWM341_drivers/drv_soft_i2c.c @@ -51,7 +51,7 @@ struct swm_soft_i2c_cfg struct swm_soft_i2c_device { struct rt_i2c_bit_ops ops; - struct rt_i2c_bus_device i2c2_bus; + struct rt_i2c_bus_device i2c_bus; }; static const struct swm_soft_i2c_cfg swm_soft_i2c_cfg[] = @@ -201,9 +201,9 @@ int swm_i2c_init(void) { i2c_obj[i].ops = swm_i2c_bit_ops; i2c_obj[i].ops.data = (void *)&swm_soft_i2c_cfg[i]; - i2c_obj[i].i2c2_bus.priv = &i2c_obj[i].ops; + i2c_obj[i].i2c_bus.priv = &i2c_obj[i].ops; swm_i2c_gpio_init(&i2c_obj[i]); - result = rt_i2c_bit_add_bus(&i2c_obj[i].i2c2_bus, swm_soft_i2c_cfg[i].name); + result = rt_i2c_bit_add_bus(&i2c_obj[i].i2c_bus, swm_soft_i2c_cfg[i].name); RT_ASSERT(result == RT_EOK); LOG_D("software simulation %s init done, pin scl: %d, pin sda %d", diff --git a/bsp/w60x/drivers/drv_soft_i2c.c b/bsp/w60x/drivers/drv_soft_i2c.c index 1e44d52662..6b4345c4ca 100644 --- a/bsp/w60x/drivers/drv_soft_i2c.c +++ b/bsp/w60x/drivers/drv_soft_i2c.c @@ -191,9 +191,9 @@ int rt_soft_i2c_init(void) { i2c_obj[i].ops = w60x_bit_ops_default; i2c_obj[i].ops.data = (void*)&soft_i2c_config[i]; - i2c_obj[i].i2c2_bus.priv = &i2c_obj[i].ops; + i2c_obj[i].i2c_bus.priv = &i2c_obj[i].ops; w60x_i2c_gpio_init(&i2c_obj[i]); - result = rt_i2c_bit_add_bus(&i2c_obj[i].i2c2_bus, soft_i2c_config[i].bus_name); + result = rt_i2c_bit_add_bus(&i2c_obj[i].i2c_bus, soft_i2c_config[i].bus_name); RT_ASSERT(result == RT_EOK); w60x_i2c_bus_unlock(&soft_i2c_config[i]); diff --git a/bsp/w60x/drivers/drv_soft_i2c.h b/bsp/w60x/drivers/drv_soft_i2c.h index 9901a5958f..bd0cdc0431 100644 --- a/bsp/w60x/drivers/drv_soft_i2c.h +++ b/bsp/w60x/drivers/drv_soft_i2c.h @@ -26,7 +26,7 @@ struct w60x_soft_i2c_config struct w60x_i2c { struct rt_i2c_bit_ops ops; - struct rt_i2c_bus_device i2c2_bus; + struct rt_i2c_bus_device i2c_bus; }; #ifdef BSP_USING_SOFT_I2C1 diff --git a/bsp/wch/risc-v/Libraries/ch32_drivers/drv_soft_i2c.c b/bsp/wch/risc-v/Libraries/ch32_drivers/drv_soft_i2c.c index ae460ccd2e..46f3a97d2e 100644 --- a/bsp/wch/risc-v/Libraries/ch32_drivers/drv_soft_i2c.c +++ b/bsp/wch/risc-v/Libraries/ch32_drivers/drv_soft_i2c.c @@ -196,9 +196,9 @@ int rt_hw_i2c_init(void) { i2c_obj[i].ops = ch32_bit_ops_default; i2c_obj[i].ops.data = (void*)&soft_i2c_config[i]; - i2c_obj[i].i2c2_bus.priv = &i2c_obj[i].ops; + i2c_obj[i].i2c_bus.priv = &i2c_obj[i].ops; ch32_i2c_gpio_init(&i2c_obj[i]); - result = rt_i2c_bit_add_bus(&i2c_obj[i].i2c2_bus, soft_i2c_config[i].bus_name); + result = rt_i2c_bit_add_bus(&i2c_obj[i].i2c_bus, soft_i2c_config[i].bus_name); RT_ASSERT(result == RT_EOK); ch32_i2c_bus_unlock(&soft_i2c_config[i]); LOG_D("software simulation %s init done, pin scl: %d, pin sda %d", diff --git a/bsp/wch/risc-v/Libraries/ch32_drivers/drv_soft_i2c.h b/bsp/wch/risc-v/Libraries/ch32_drivers/drv_soft_i2c.h index 1f3170cc4c..b0d9912fa4 100644 --- a/bsp/wch/risc-v/Libraries/ch32_drivers/drv_soft_i2c.h +++ b/bsp/wch/risc-v/Libraries/ch32_drivers/drv_soft_i2c.h @@ -27,7 +27,7 @@ struct ch32_soft_i2c_config struct ch32_i2c { struct rt_i2c_bit_ops ops; - struct rt_i2c_bus_device i2c2_bus; + struct rt_i2c_bus_device i2c_bus; }; #ifdef BSP_USING_I2C1