diff --git a/libcpu/arm/common/atomic_arm.c b/libcpu/arm/common/atomic_arm.c
index 18d186233f..290d72e717 100644
--- a/libcpu/arm/common/atomic_arm.c
+++ b/libcpu/arm/common/atomic_arm.c
@@ -10,6 +10,9 @@
 
 #include <rtthread.h>
 
+#if defined (__IAR_SYSTEMS_ICC__)     /* for IAR Compiler */
+#include <intrinsics.h>
+#endif
 /**
  \brief   LDR Exclusive (32 bit)
  \details Executes a exclusive LDR instruction for 32 bit values.
@@ -27,7 +30,7 @@
 #elif defined (__IAR_SYSTEMS_ICC__)     /* for IAR Compiler */
 _Pragma("inline=forced") __intrinsic rt_atomic_t __LDREXW(volatile rt_atomic_t *ptr)
 {
-    return __LDREX((unsigned long *)ptr);
+    return __LDREX((unsigned int *)ptr);
 }
 #elif defined (__GNUC__)                /* GNU GCC Compiler */
 __attribute__((always_inline))     static inline rt_atomic_t __LDREXW(volatile rt_atomic_t *addr)
@@ -58,7 +61,7 @@ __attribute__((always_inline))     static inline rt_atomic_t __LDREXW(volatile r
 #elif defined (__IAR_SYSTEMS_ICC__)     /* for IAR Compiler */
 _Pragma("inline=forced") __intrinsic rt_atomic_t __STREXW(rt_atomic_t value, volatile rt_atomic_t *ptr)
 {
-    return __STREX(value, (unsigned long *)ptr);
+    return __STREX(value, (unsigned int *)ptr);
 }
 #elif defined (__GNUC__)                /* GNU GCC Compiler */
 __attribute__((always_inline))     static inline rt_atomic_t __STREXW(volatile rt_atomic_t value, volatile rt_atomic_t *addr)