🎈 perf: perf rt_hw_interrupt_disable/enable (#8042)

Signed-off-by: Shell <smokewood@qq.com>
Co-authored-by: Shell <smokewood@qq.com>

components/lwp/arch/aarch64/cortex-a/lwp_arch.c

@@ -96,6 +96,31 @@ int arch_expand_user_stack(void *addr)
 }
 
 #endif
+
+int arch_set_thread_context(void (*exit)(void), void *new_thread_stack,
+                            void *user_stack, void **thread_sp)
+{
+    struct rt_hw_exp_stack *syscall_frame;
+    struct rt_hw_exp_stack *thread_frame;
+    struct rt_hw_exp_stack *ori_syscall = rt_thread_self()->user_ctx.ctx;
+    RT_ASSERT(ori_syscall != RT_NULL);
+
+    thread_frame = (void *)((long)new_thread_stack - sizeof(struct rt_hw_exp_stack));
+    syscall_frame = (void *)((long)new_thread_stack - 2 * sizeof(struct rt_hw_exp_stack));
+
+    memcpy(syscall_frame, ori_syscall, sizeof(*syscall_frame));
+    syscall_frame->sp_el0 = (long)user_stack;
+    syscall_frame->x0 = 0;
+
+    thread_frame->cpsr = ((3 << 6) | 0x4 | 0x1);
+    thread_frame->pc = (long)exit;
+    thread_frame->x0 = 0;
+
+    *thread_sp = syscall_frame;
+
+    return 0;
+}
+
 #define ALGIN_BYTES (16)
 
 struct signal_ucontext

components/lwp/arch/aarch64/cortex-a/lwp_gcc.S

@@ -94,21 +94,6 @@ arch_crt_start_umode:
     msr elr_el1, x1
     eret
 
-/*
-void arch_set_thread_context(void *exit_addr, void *new_thread_stack, void *user_stack, void **thread_sp);
-*/
-.global arch_set_thread_context
-arch_set_thread_context:
-    sub x1, x1, #CONTEXT_SIZE
-    str x2, [x1, #CONTEXT_OFFSET_SP_EL0]
-    sub x1, x1, #CONTEXT_SIZE
-    str xzr, [x1, #CONTEXT_OFFSET_X0]       /* new thread return 0 */
-    mov x4, #((3 << 6) | 0x4 | 0x1)         /* el1h, disable interrupt */
-    str x4, [x1, #CONTEXT_OFFSET_SPSR_EL1]
-    str x0, [x1, #CONTEXT_OFFSET_ELR_EL1]
-    str x1, [x3]
-    ret
-
 .global arch_get_user_sp
 arch_get_user_sp:
     mrs x0, sp_el0
@@ -197,6 +182,7 @@ arch_syscall_exit:
 
 /* the sp is reset to the outer most level, irq and fiq are disabled */
 START_POINT(arch_ret_to_user)
+    msr daifset, #3
     /* save exception frame */
     SAVE_FPU sp
     stp x0, x1, [sp, #-0x10]!
@@ -226,6 +212,7 @@ START_POINT(arch_ret_to_user)
     bl lwp_check_exit_request
     cbz w0, 1f
     /* exit on event */
+    msr daifclr, #3
     mov x0, xzr
     b sys_exit
 1:
@@ -247,7 +234,7 @@ START_POINT(arch_ret_to_user)
 
     /**
      * push 2 dummy words to simulate a exception frame of interrupt
-     * @note in kernel state, the context switch dont saved the context
+     * Note: in kernel state, the context switch dont saved the context
      */
     mrs x0, spsr_el1
     mrs x1, elr_el1
@@ -397,7 +384,6 @@ lwp_check_debug_quit:
     ret
 
 arch_signal_quit:
-    msr daifset, #3
 
     /* drop current exception frame */
     add sp, sp, #CONTEXT_SIZE
@@ -406,6 +392,12 @@ arch_signal_quit:
     add x0, x0, #-CONTEXT_SIZE
     msr sp_el0, x0
 
+    /**
+     * Note: Since we will reset spsr, but the reschedule will
+     * corrupt the spsr, we diable irq for a short period here
+     */
+    msr daifset, #3
+
     /* restore previous exception frame */
     msr spsel, #0
 
@@ -471,14 +463,14 @@ arch_thread_signal_enter:
     dsb sy
 
     /**
-     * @brief Prepare the environment for signal handler
+     * Brief: Prepare the environment for signal handler
      */
 
-    /** 
+    /**
      * reset the cpsr
      * and drop exp frame on kernel stack, reset kernel sp
      *
-     * @note Since we will reset spsr, but the reschedule will
+     * Note: Since we will reset spsr, but the reschedule will
      * corrupt the spsr, we diable irq for a short period here
      */
     msr daifset, #3
@@ -501,6 +493,7 @@ arch_thread_signal_enter:
 
     /**
      * handler(signo, psi, ucontext);
+     *
      */
     eret